Attachment 1474453 Details for Bug 1613953 – verbose format and lsblk output

verbose format and lsblk output

crypt (text/plain), 19.67 KB, created by Corey Marthaler on 2018-08-08 18:40:10 UTC

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Creator: Corey Marthaler

Created: 2018-08-08 18:40:10 UTC

Size: 19.67 KB

patch

obsolete

># cryptsetup 2.0.3 processing "cryptsetup --debug luksFormat --type luks2 /dev/test/lv"
># Running command luksFormat.
># Locking memory.
># Installing SIGINT/SIGTERM handler.
># Unblocking interruption on signal.
># Allocating context for crypt device /dev/test/lv.
># Trying to open and read device /dev/test/lv with direct-io.
># Initialising device-mapper backend library.
># STDIN descriptor passphrase entry requested.
># Checking new password using default pwquality settings.
># New password libpwquality score is 100.
># PBKDF argon2i, hash sha256, time_ms 2000 (iterations 0), max_memory_kb 1048576, parallel_threads 4.
># Formatting device /dev/test/lv as type LUKS2.
># Crypto backend (gcrypt 1.5.3) initialized in cryptsetup library version 2.0.3.
># Detected kernel Linux 3.10.0-931.el7.x86_64 x86_64.
># Topology: IO (8192/33553920), offset = 512; Required alignment is 1048576 bytes.
># Checking if cipher aes-xts-plain64 is usable.
># Using userspace crypto wrapper to access keyslot area.
># Creating new digest 0 (pbkdf2).
># Setting PBKDF2 type key digest 0.
># Running pbkdf2(sha256) benchmark.
># PBKDF benchmark: memory cost = 0, iterations = 91530, threads = 0 (took 358 ms)
># PBKDF benchmark: memory cost = 0, iterations = 121588, threads = 0 (took 539 ms)
># Benchmark returns pbkdf2(sha256) 121588 iterations, 0 memory, 0 threads (for 256-bits key).
># Digest JSON:
># {
>  "type":"pbkdf2",
>  "keyslots":[
>  ],
>  "segments":[
>  ],
>  "hash":"sha256",
>  "iterations":15198,
>  "salt":"cUpZ63\/17WczjWCzgvrfGvf8vSMPnc2Y+JYS8C6zfNs=",
>  "digest":"fAk7zSxgDlPeFlobTdyEz3VAp5QwPUCyG9gHsWwJSSk="
>}
># Segment 0 assigned to digest 0.
># Header JSON:
># {
>  "keyslots":{
>  },
>  "tokens":{
>  },
>  "segments":{
>    "0":{
>      "type":"crypt",
>      "offset":"4194305",
>      "iv_tweak":"0",
>      "size":"dynamic",
>      "encryption":"aes-xts-plain64",
>      "sector_size":512
>    }
>  },
>  "digests":{
>    "0":{
>      "type":"pbkdf2",
>      "keyslots":[
>      ],
>      "segments":[
>        "0"
>      ],
>      "hash":"sha256",
>      "iterations":15198,
>      "salt":"cUpZ63\/17WczjWCzgvrfGvf8vSMPnc2Y+JYS8C6zfNs=",
>      "digest":"fAk7zSxgDlPeFlobTdyEz3VAp5QwPUCyG9gHsWwJSSk="
>    }
>  },
>  "config":{
>    "json_size":"12288",
>    "keyslots_size":"4161536"
>  }
>}
># Offset field has to be aligned to sector size: 512
># Releasing crypt device /dev/test/lv context.
># Releasing device-mapper backend.
># Unlocking memory.
>Command failed with code -1 (wrong or missing parameters).
>
>
>
>
>NAME                       ALIGNMENT MIN-IO   OPT-IO PHY-SEC LOG-SEC ROTA SCHED    RQ-SIZE   RA WSAME
>sda                                0    512        0     512     512    1 deadline     128 4096    0B
>ââsda1                             0    512        0     512     512    1 deadline     128 4096    0B
>ââsda2                             0    512        0     512     512    1 deadline     128 4096    0B
>  âârhel_mckinley--01-root         0    512        0     512     512    1              128 4096    0B
>  âârhel_mckinley--01-swap         0    512        0     512     512    1              128 4096    0B
>  âârhel_mckinley--01-home         0    512        0     512     512    1              128 4096    0B
>sdb                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdb1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdb2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpatha                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpatha1                     4096   8192 33553920     512     512    1              128 4096   32M
>  â ââtest-lv                    512   8192 33553920     512     512    1              128 4096   32M
>  ââmpatha2                        0   8192 33553920     512     512    1              128 4096   32M
>sdc                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdc1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdc2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathb                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathb1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathb2                        0   8192 33553920     512     512    1              128 4096   32M
>sdd                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdd1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdd2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathc                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathc1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathc2                        0   8192 33553920     512     512    1              128 4096   32M
>sde                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsde1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsde2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathd                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathd1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathd2                        0   8192 33553920     512     512    1              128 4096   32M
>sdf                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdf1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdf2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathe                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathe1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathe2                        0   8192 33553920     512     512    1              128 4096   32M
>sdg                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdg1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdg2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathf                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathf1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathf2                        0   8192 33553920     512     512    1              128 4096   32M
>sdh                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdh1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdh2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathg                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathg1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathg2                        0   8192 33553920     512     512    1              128 4096   32M
>sdi                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdi1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdi2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathh                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathh1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathh2                        0   8192 33553920     512     512    1              128 4096   32M
>sdj                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdj1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdj2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpatha                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpatha1                     4096   8192 33553920     512     512    1              128 4096   32M
>  â ââtest-lv                    512   8192 33553920     512     512    1              128 4096   32M
>  ââmpatha2                        0   8192 33553920     512     512    1              128 4096   32M
>sdk                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdk1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdk2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathb                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathb1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathb2                        0   8192 33553920     512     512    1              128 4096   32M
>sdl                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdl1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdl2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathc                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathc1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathc2                        0   8192 33553920     512     512    1              128 4096   32M
>sdm                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdm1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdm2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathd                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathd1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathd2                        0   8192 33553920     512     512    1              128 4096   32M
>sdn                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdn1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdn2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathe                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathe1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathe2                        0   8192 33553920     512     512    1              128 4096   32M
>sdo                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdo1                          4096   8192 33553920     512     512    1 deadline     128 4096   32M
>ââsdo2                             0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathf                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathf1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathf2                        0   8192 33553920     512     512    1              128 4096   32M
>sdp                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathg                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathg1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathg2                        0   8192 33553920     512     512    1              128 4096   32M
>sdq                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathh                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathh1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathh2                        0   8192 33553920     512     512    1              128 4096   32M
>sdr                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpatha                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpatha1                     4096   8192 33553920     512     512    1              128 4096   32M
>  â ââtest-lv                    512   8192 33553920     512     512    1              128 4096   32M
>  ââmpatha2                        0   8192 33553920     512     512    1              128 4096   32M
>sds                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathb                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathb1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathb2                        0   8192 33553920     512     512    1              128 4096   32M
>sdt                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathc                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathc1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathc2                        0   8192 33553920     512     512    1              128 4096   32M
>sdu                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathd                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathd1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathd2                        0   8192 33553920     512     512    1              128 4096   32M
>sdv                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathe                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathe1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathe2                        0   8192 33553920     512     512    1              128 4096   32M
>sdw                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathf                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathf1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathf2                        0   8192 33553920     512     512    1              128 4096   32M
>sdx                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathg                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathg1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathg2                        0   8192 33553920     512     512    1              128 4096   32M
>sdy                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathh                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathh1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathh2                        0   8192 33553920     512     512    1              128 4096   32M
>sdz                                0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpatha                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpatha1                     4096   8192 33553920     512     512    1              128 4096   32M
>  â ââtest-lv                    512   8192 33553920     512     512    1              128 4096   32M
>  ââmpatha2                        0   8192 33553920     512     512    1              128 4096   32M
>sr0                                0    512        0     512     512    1 deadline     128  128    0B
>sdaa                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathb                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathb1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathb2                        0   8192 33553920     512     512    1              128 4096   32M
>sdab                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathc                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathc1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathc2                        0   8192 33553920     512     512    1              128 4096   32M
>sdac                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathd                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathd1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathd2                        0   8192 33553920     512     512    1              128 4096   32M
>sdad                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathe                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathe1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathe2                        0   8192 33553920     512     512    1              128 4096   32M
>sdae                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathf                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathf1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathf2                        0   8192 33553920     512     512    1              128 4096   32M
>sdaf                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathg                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathg1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathg2                        0   8192 33553920     512     512    1              128 4096   32M
>sdag                               0   8192 33553920     512     512    1 deadline     128 4096   32M
>ââmpathh                           0   8192 33553920     512     512    1 deadline     128 4096   32M
>  ââmpathh1                     4096   8192 33553920     512     512    1              128 4096   32M
>  ââmpathh2                        0   8192 33553920     512     512    1              128 4096   32M

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Attachments on bug 1613953: 1474453