Attachment 154278 Details for Bug 234989 – Fix a typo in the default definition of the new target hook

[patch] Fix a typo in the default definition of the new target hook

gcc41-rh234989.patch (text/plain), 5.98 KB, created by Alexandre Oliva on 2007-05-07 16:39:01 UTC

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Creator: Alexandre Oliva

Created: 2007-05-07 16:39:01 UTC

Size: 5.98 KB

patch

obsolete

>for gcc/ChangeLog
>from  Alexandre Oliva  <aoliva@redhat.com>
>
>	* cfgbuild.c: Include target.h.
>	(default_control_flow_insn_p): Rename from...
>	(control_flow_insn_p): ... this.  Pass the result of the above to
>	a new targetm hook.
>	* target.h (struct gcc_target): Add cfg_control_flow_insn_p to
>	sched.
>	* target-def.h (TARGET_SCHED_CFG_CONTROL_FLOW_INSN_P): New.
>	(TARGET_SCHED): Add it.
>	* config/ia64/ia64.c (TARGET_SCHED_CFG_CONTROL_FLOW_INSN_P): Define.
>	(ia64_control_flow_insn_p): New.
>	(ia64_emit_insn_before): Prefer the basic block of the preceding
>	insn.
>
>Index: gcc/cfgbuild.c
>===================================================================
>--- gcc/cfgbuild.c.orig	2007-02-20 19:39:12.000000000 -0200
>+++ gcc/cfgbuild.c	2007-05-07 04:22:30.000000000 -0300
>@@ -45,6 +45,7 @@ Software Foundation, 51 Franklin Street,
> #include "except.h"
> #include "toplev.h"
> #include "timevar.h"
>+#include "target.h"
> 
> static int count_basic_blocks (rtx);
> static void find_basic_blocks_1 (rtx);
>@@ -88,8 +89,8 @@ inside_basic_block_p (rtx insn)
> /* Return true if INSN may cause control flow transfer, so it should be last in
>    the basic block.  */
> 
>-bool
>-control_flow_insn_p (rtx insn)
>+static bool
>+default_control_flow_insn_p (rtx insn)
> {
>   rtx note;
> 
>@@ -133,6 +134,18 @@ control_flow_insn_p (rtx insn)
>     }
> }
> 
>+bool
>+control_flow_insn_p (rtx insn)
>+{
>+  bool result = default_control_flow_insn_p (insn);
>+
>+  if (targetm.sched.cfg_control_flow_insn_p)
>+    return targetm.sched.cfg_control_flow_insn_p (insn, result);
>+
>+  return result;
>+}
>+
>+
> /* Count the basic blocks of the function.  */
> 
> static int
>Index: gcc/config/ia64/ia64.c
>===================================================================
>--- gcc/config/ia64/ia64.c.orig	2007-05-07 03:08:21.000000000 -0300
>+++ gcc/config/ia64/ia64.c	2007-05-07 04:50:08.000000000 -0300
>@@ -159,6 +159,7 @@ static void ia64_init_dfa_pre_cycle_insn
> static rtx ia64_dfa_pre_cycle_insn (void);
> static int ia64_first_cycle_multipass_dfa_lookahead_guard (rtx);
> static int ia64_dfa_new_cycle (FILE *, int, rtx, int, int, int *);
>+static bool ia64_control_flow_insn_p (rtx, bool);
> static rtx gen_tls_get_addr (void);
> static rtx gen_thread_pointer (void);
> static int find_gr_spill (int);
>@@ -346,6 +347,9 @@ static const struct attribute_spec ia64_
> #undef TARGET_SCHED_DFA_NEW_CYCLE
> #define TARGET_SCHED_DFA_NEW_CYCLE ia64_dfa_new_cycle
> 
>+#undef TARGET_SCHED_CFG_CONTROL_FLOW_INSN_P
>+#define TARGET_SCHED_CFG_CONTROL_FLOW_INSN_P ia64_control_flow_insn_p
>+
> #undef TARGET_FUNCTION_OK_FOR_SIBCALL
> #define TARGET_FUNCTION_OK_FOR_SIBCALL ia64_function_ok_for_sibcall
> #undef TARGET_ARG_PARTIAL_BYTES
>@@ -6236,7 +6240,10 @@ ia64_adjust_cost (rtx insn, rtx link, rt
> static void
> ia64_emit_insn_before (rtx insn, rtx before)
> {
>-  emit_insn_before (insn, before);
>+  rtx prev = PREV_INSN (before);
>+  insn = emit_insn_before (insn, before);
>+  if (prev && INSN_P (prev))
>+    set_block_for_insn (insn, BLOCK_FOR_INSN (prev));
> }
> 
> /* The following function marks insns who produce addresses for load
>@@ -7629,6 +7636,52 @@ ia64_dfa_pre_cycle_insn (void)
>   return dfa_pre_cycle_insn;
> }
> 
>+/* If we have a sequence with a CALL_INSN and nops in the same basic
>+   block with the same REG_EH_REGION note, make sure only the last one
>+   of them is regarded as a basic block-ending instruction.  */
>+
>+static bool
>+ia64_control_flow_insn_p (rtx insn, bool result)
>+{
>+  int code;
>+  basic_block bb;
>+  rtx note, note2;
>+  rtx orig = insn, prev;
>+
>+  if (!result)
>+    return result;
>+
>+  if (GET_CODE (insn) != CALL_INSN
>+      && (code = recog_memoized (insn)) != CODE_FOR_nop
>+      && code != CODE_FOR_nop_b)
>+    return result;
>+
>+  bb = BLOCK_FOR_INSN (insn);
>+  note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
>+
>+  for (;;)
>+    {
>+      prev = insn;
>+      insn = NEXT_INSN (insn);
>+
>+      if (! insn || ! INSN_P (insn) || BLOCK_FOR_INSN (insn) != bb
>+	  || ((code = recog_memoized (insn)) != CODE_FOR_nop
>+	      && code != CODE_FOR_nop_b))
>+	break;
>+
>+      note2 = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
>+
>+      if (!note != !note2
>+	  || (note && XEXP (note, 0) != XEXP (note2, 0)))
>+	break;
>+    }
>+
>+  if (prev != orig && control_flow_insn_p (prev))
>+    return false;
>+
>+  return result;
>+}
>+
> /* The following function returns TRUE if PRODUCER (of type ilog or
>    ld) produces address for CONSUMER (of type st or stf). */
> 
>Index: gcc/target-def.h
>===================================================================
>--- gcc/target-def.h.orig	2007-02-20 19:39:13.000000000 -0200
>+++ gcc/target-def.h	2007-05-07 03:58:17.000000000 -0300
>@@ -271,6 +271,7 @@ Foundation, 51 Franklin Street, Fifth Fl
> #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD 0
> #define TARGET_SCHED_DFA_NEW_CYCLE 0
> #define TARGET_SCHED_IS_COSTLY_DEPENDENCE 0
>+#define TARGET_SCHED_CFG_CONTROL_FLOW_INSN_P 0
> 
> #define TARGET_SCHED						\
>   {TARGET_SCHED_ADJUST_COST,					\
>@@ -291,7 +292,8 @@ Foundation, 51 Franklin Street, Fifth Fl
>    TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD,		\
>    TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD,	\
>    TARGET_SCHED_DFA_NEW_CYCLE,					\
>-   TARGET_SCHED_IS_COSTLY_DEPENDENCE}
>+   TARGET_SCHED_IS_COSTLY_DEPENDENCE,				\
>+   TARGET_SCHED_CFG_CONTROL_FLOW_INSN_P}
> 
> #define TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD 0
> 
>Index: gcc/target.h
>===================================================================
>--- gcc/target.h.orig	2007-02-20 19:39:12.000000000 -0200
>+++ gcc/target.h	2007-05-07 04:19:41.000000000 -0300
>@@ -288,6 +288,12 @@ struct gcc_target
>        between the already scheduled insn (first parameter) and the
>        the second insn (second parameter).  */
>     bool (* is_costly_dependence) (rtx, rtx, rtx, int, int);
>+
>+    /* The following member value is a pointer to a function called by
>+       control_flow_insn_p ().  It is passed the boolean result
>+       control_flow_insn_p() would return if this function was NULL,
>+       such that it can override it.  */
>+    bool (* cfg_control_flow_insn_p) (rtx, bool);
>   } sched;
> 
>   /* Functions relating to vectorization.  */

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Attachments on bug 234989: 154243 | 154278