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Red Hat Bugzilla – Attachment 156621 Details for
Bug 242557
Using intel driver on Intel 855GM fails to display correctly
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X.org log file using intel driver
Xorg.0.log (text/plain), 104.16 KB, created by
James
on 2007-06-08 21:48:42 UTC
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hide
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Description:
X.org log file using intel driver
Filename:
MIME Type:
Creator:
James
Created:
2007-06-08 21:48:42 UTC
Size:
104.16 KB
patch
obsolete
> >X Window System Version 1.3.0 >Release Date: 19 April 2007 >X Protocol Version 11, Revision 0, Release 1.3 >Build Operating System: Fedora Core 7 Red Hat, Inc. >Current Operating System: Linux harmony 2.6.21-1.3194.fc7 #1 SMP Wed May 23 22:35:01 EDT 2007 i686 >Build Date: 04 June 2007 >Build ID: xorg-x11-server 1.3.0.0-7.fc7 > Before reporting problems, check http://wiki.x.org > to make sure that you have the latest version. >Module Loader present >Markers: (--) probed, (**) from config file, (==) default setting, > (++) from command line, (!!) notice, (II) informational, > (WW) warning, (EE) error, (NI) not implemented, (??) unknown. >(==) Log file: "/var/log/Xorg.0.log", Time: Fri Jun 8 13:40:04 2007 >(==) Using config file: "/etc/X11/xorg.conf" >(==) ServerLayout "single head configuration" >(**) |-->Screen "Screen0" (0) >(**) | |-->Monitor "<default monitor>" >(**) | |-->Device "Videocard0" >(WW) No monitor specified for screen "Screen0". > Using a default monitor configuration. >(**) |-->Input Device "Keyboard0" >(**) |-->Input Device "Synaptics" >(II) No default mouse found, adding one >(**) |-->Input Device "<default pointer>" >(WW) No FontPath specified. Using compiled-in default. >(==) FontPath set to: > unix/:7100, > built-ins >(==) RgbPath set to "/usr/share/X11/rgb" >(==) ModulePath set to "/usr/lib/xorg/modules" >(II) Open ACPI successful (/var/run/acpid.socket) >(II) Loader magic: 0x8209ac0 >(II) Module ABI versions: > X.Org ANSI C Emulation: 0.3 > X.Org Video Driver: 1.2 > X.Org XInput driver : 0.7 > X.Org Server Extension : 0.3 > X.Org Font Renderer : 0.5 >(II) Loader running on linux >(II) LoadModule: "pcidata" >(II) Loading /usr/lib/xorg/modules//libpcidata.so >(II) Module pcidata: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > ABI class: X.Org Video Driver, version 1.2 >(--) using VT number 7 > >(II) PCI: PCI scan (all values are in hex) >(II) PCI: 00:00:0: chip 8086,3580 card 1071,8011 rev 02 class 06,00,00 hdr 80 >(II) PCI: 00:00:1: chip 8086,3584 card 1071,8011 rev 02 class 08,80,00 hdr 00 >(II) PCI: 00:00:3: chip 8086,3585 card 1071,8011 rev 02 class 08,80,00 hdr 80 >(II) PCI: 00:02:0: chip 8086,3582 card 1071,8011 rev 02 class 03,00,00 hdr 80 >(II) PCI: 00:02:1: chip 8086,3582 card 1071,8011 rev 02 class 03,80,00 hdr 80 >(II) PCI: 00:1d:0: chip 8086,24c2 card 1071,8011 rev 03 class 0c,03,00 hdr 80 >(II) PCI: 00:1d:1: chip 8086,24c4 card 1071,8011 rev 03 class 0c,03,00 hdr 00 >(II) PCI: 00:1d:2: chip 8086,24c7 card 1071,8011 rev 03 class 0c,03,00 hdr 00 >(II) PCI: 00:1d:7: chip 8086,24cd card 1071,8011 rev 03 class 0c,03,20 hdr 00 >(II) PCI: 00:1e:0: chip 8086,2448 card 0000,0000 rev 83 class 06,04,00 hdr 01 >(II) PCI: 00:1f:0: chip 8086,24cc card 0000,0000 rev 03 class 06,01,00 hdr 80 >(II) PCI: 00:1f:1: chip 8086,24ca card 1071,8011 rev 03 class 01,01,8a hdr 00 >(II) PCI: 00:1f:3: chip 8086,24c3 card 1071,8011 rev 03 class 0c,05,00 hdr 00 >(II) PCI: 00:1f:5: chip 8086,24c5 card 1071,8011 rev 03 class 04,01,00 hdr 00 >(II) PCI: 00:1f:6: chip 8086,24c6 card 1071,8011 rev 03 class 07,03,00 hdr 00 >(II) PCI: 01:01:0: chip 8086,4220 card 8086,2702 rev 05 class 02,80,00 hdr 00 >(II) PCI: 01:02:0: chip 10ec,8139 card 1071,8011 rev 10 class 02,00,00 hdr 00 >(II) PCI: 01:04:0: chip 104c,ac50 card c400,0000 rev 02 class 06,07,00 hdr 02 >(II) PCI: 01:05:0: chip 1106,3044 card 1071,8011 rev 80 class 0c,00,10 hdr 00 >(II) PCI: End of PCI scan >(II) Intel Bridge workaround enabled >(II) Host-to-PCI bridge: >(II) Bus 0: bridge is at (0:0:0), (0,0,2), BCTRL: 0x0008 (VGA_EN is set) >(II) Bus 0 I/O range: > [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] >(II) Bus 0 non-prefetchable memory range: > [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] >(II) Bus 0 prefetchable memory range: > [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] >(II) Subtractive PCI-to-PCI bridge: >(II) Bus 1: bridge is at (0:30:0), (0,1,5), BCTRL: 0x0806 (VGA_EN is cleared) >(II) Bus 1 I/O range: > [0] -1 0 0x0000c000 - 0x0000c0ff (0x100) IX[B] > [1] -1 0 0x0000c400 - 0x0000c4ff (0x100) IX[B] > [2] -1 0 0x0000c800 - 0x0000c8ff (0x100) IX[B] > [3] -1 0 0x0000cc00 - 0x0000ccff (0x100) IX[B] > [4] -1 0 0x0000d000 - 0x0000d0ff (0x100) IX[B] > [5] -1 0 0x0000d400 - 0x0000d4ff (0x100) IX[B] > [6] -1 0 0x0000d800 - 0x0000d8ff (0x100) IX[B] > [7] -1 0 0x0000dc00 - 0x0000dcff (0x100) IX[B] >(II) Bus 1 non-prefetchable memory range: > [0] -1 0 0xe0000000 - 0xefffffff (0x10000000) MX[B] >(II) Bus 1 prefetchable memory range: > [0] -1 0 0xa0000000 - 0xafffffff (0x10000000) MX[B] >(II) PCI-to-ISA bridge: >(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set) >(II) PCI-to-CardBus bridge: >(II) Bus 2: bridge is at (1:4:0), (1,2,5), BCTRL: 0x05c0 (VGA_EN is cleared) >(II) Bus 2 I/O range: > [0] -1 0 0x0000c400 - 0x0000c4ff (0x100) IX[B] > [1] -1 0 0x0000c800 - 0x0000c8ff (0x100) IX[B] >(II) Bus 2 non-prefetchable memory range: > [0] -1 0 0xe4000000 - 0xe7ffffff (0x4000000) MX[B] >(II) Bus 2 prefetchable memory range: > [0] -1 0 0xa0000000 - 0xa3ffffff (0x4000000) MX[B] >(--) PCI:*(0:2:0) Intel Corporation 82852/855GM Integrated Graphics Device rev 2, Mem @ 0xb0000000/27, 0xf0000000/19, I/O @ 0xe000/3 >(--) PCI: (0:2:1) Intel Corporation 82852/855GM Integrated Graphics Device rev 2, Mem @ 0x20000000/27, 0x28000000/19 >(II) Addressable bus resource ranges are > [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] > [1] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] >(II) OS-reported resource ranges: > [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) > [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] > [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] > [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] > [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] > [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] >(II) Active PCI resource ranges: > [0] -1 0 0xe0000000 - 0xe00007ff (0x800) MX[B] > [1] -1 0 0xe0000800 - 0xe00008ff (0x100) MX[B] > [2] -1 0 0xe0001000 - 0xe0001fff (0x1000) MX[B] > [3] -1 0 0xf0080600 - 0xf00806ff (0x100) MX[B] > [4] -1 0 0xf0080400 - 0xf00805ff (0x200) MX[B] > [5] -1 0 0x28080000 - 0x280803ff (0x400) MX[B] > [6] -1 0 0xfebff000 - 0xfebff3ff (0x400) MX[B] > [7] -1 0 0xf0000000 - 0xf007ffff (0x80000) MX[B](B) > [8] -1 0 0xb0000000 - 0xb7ffffff (0x8000000) MX[B](B) > [9] -1 0 0x0000c000 - 0x0000c07f (0x80) IX[B] > [10] -1 0 0x0000c100 - 0x0000c1ff (0x100) IX[B] > [11] -1 0 0x0000e400 - 0x0000e47f (0x80) IX[B] > [12] -1 0 0x0000e300 - 0x0000e3ff (0x100) IX[B] > [13] -1 0 0x0000e200 - 0x0000e23f (0x40) IX[B] > [14] -1 0 0x0000e100 - 0x0000e1ff (0x100) IX[B] > [15] -1 0 0x00001400 - 0x0000141f (0x20) IX[B] > [16] -1 0 0x00001100 - 0x0000110f (0x10) IX[B] > [17] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [18] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [19] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [20] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [21] -1 0 0x00001700 - 0x0000171f (0x20) IX[B] > [22] -1 0 0x00001600 - 0x0000161f (0x20) IX[B] > [23] -1 0 0x00001200 - 0x0000121f (0x20) IX[B] > [24] -1 0 0x0000e000 - 0x0000e007 (0x8) IX[B](B) >(II) Inactive PCI resource ranges: > [0] -1 0 0x28000000 - 0x2807ffff (0x80000) MX[B](B) > [1] -1 0 0x20000000 - 0x27ffffff (0x8000000) MX[B](B) >(II) Active PCI resource ranges after removing overlaps: > [0] -1 0 0xe0000000 - 0xe00007ff (0x800) MX[B] > [1] -1 0 0xe0000800 - 0xe00008ff (0x100) MX[B] > [2] -1 0 0xe0001000 - 0xe0001fff (0x1000) MX[B] > [3] -1 0 0xf0080600 - 0xf00806ff (0x100) MX[B] > [4] -1 0 0xf0080400 - 0xf00805ff (0x200) MX[B] > [5] -1 0 0x28080000 - 0x280803ff (0x400) MX[B] > [6] -1 0 0xfebff000 - 0xfebff3ff (0x400) MX[B] > [7] -1 0 0xf0000000 - 0xf007ffff (0x80000) MX[B](B) > [8] -1 0 0xb0000000 - 0xb7ffffff (0x8000000) MX[B](B) > [9] -1 0 0x0000c000 - 0x0000c07f (0x80) IX[B] > [10] -1 0 0x0000c100 - 0x0000c1ff (0x100) IX[B] > [11] -1 0 0x0000e400 - 0x0000e47f (0x80) IX[B] > [12] -1 0 0x0000e300 - 0x0000e3ff (0x100) IX[B] > [13] -1 0 0x0000e200 - 0x0000e23f (0x40) IX[B] > [14] -1 0 0x0000e100 - 0x0000e1ff (0x100) IX[B] > [15] -1 0 0x00001400 - 0x0000141f (0x20) IX[B] > [16] -1 0 0x00001100 - 0x0000110f (0x10) IX[B] > [17] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [18] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [19] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [20] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [21] -1 0 0x00001700 - 0x0000171f (0x20) IX[B] > [22] -1 0 0x00001600 - 0x0000161f (0x20) IX[B] > [23] -1 0 0x00001200 - 0x0000121f (0x20) IX[B] > [24] -1 0 0x0000e000 - 0x0000e007 (0x8) IX[B](B) >(II) Inactive PCI resource ranges after removing overlaps: > [0] -1 0 0x28000000 - 0x2807ffff (0x80000) MX[B](B) > [1] -1 0 0x20000000 - 0x27ffffff (0x8000000) MX[B](B) >(II) OS-reported resource ranges after removing overlaps with PCI: > [0] -1 0 0x00100000 - 0x27ffffff (0x27f00000) MX[B]E(B) > [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] > [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] > [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] > [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] > [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] >(II) All system resource ranges: > [0] -1 0 0x00100000 - 0x27ffffff (0x27f00000) MX[B]E(B) > [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] > [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] > [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] > [4] -1 0 0xe0000000 - 0xe00007ff (0x800) MX[B] > [5] -1 0 0xe0000800 - 0xe00008ff (0x100) MX[B] > [6] -1 0 0xe0001000 - 0xe0001fff (0x1000) MX[B] > [7] -1 0 0xf0080600 - 0xf00806ff (0x100) MX[B] > [8] -1 0 0xf0080400 - 0xf00805ff (0x200) MX[B] > [9] -1 0 0x28080000 - 0x280803ff (0x400) MX[B] > [10] -1 0 0xfebff000 - 0xfebff3ff (0x400) MX[B] > [11] -1 0 0xf0000000 - 0xf007ffff (0x80000) MX[B](B) > [12] -1 0 0xb0000000 - 0xb7ffffff (0x8000000) MX[B](B) > [13] -1 0 0x28000000 - 0x2807ffff (0x80000) MX[B](B) > [14] -1 0 0x20000000 - 0x27ffffff (0x8000000) MX[B](B) > [15] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] > [16] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] > [17] -1 0 0x0000c000 - 0x0000c07f (0x80) IX[B] > [18] -1 0 0x0000c100 - 0x0000c1ff (0x100) IX[B] > [19] -1 0 0x0000e400 - 0x0000e47f (0x80) IX[B] > [20] -1 0 0x0000e300 - 0x0000e3ff (0x100) IX[B] > [21] -1 0 0x0000e200 - 0x0000e23f (0x40) IX[B] > [22] -1 0 0x0000e100 - 0x0000e1ff (0x100) IX[B] > [23] -1 0 0x00001400 - 0x0000141f (0x20) IX[B] > [24] -1 0 0x00001100 - 0x0000110f (0x10) IX[B] > [25] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [26] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [27] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [28] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [29] -1 0 0x00001700 - 0x0000171f (0x20) IX[B] > [30] -1 0 0x00001600 - 0x0000161f (0x20) IX[B] > [31] -1 0 0x00001200 - 0x0000121f (0x20) IX[B] > [32] -1 0 0x0000e000 - 0x0000e007 (0x8) IX[B](B) >(II) LoadModule: "extmod" >(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so >(II) Module extmod: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > Module class: X.Org Server Extension > ABI class: X.Org Server Extension, version 0.3 >(II) Loading extension SHAPE >(II) Loading extension MIT-SUNDRY-NONSTANDARD >(II) Loading extension BIG-REQUESTS >(II) Loading extension SYNC >(II) Loading extension MIT-SCREEN-SAVER >(II) Loading extension XC-MISC >(II) Loading extension XFree86-VidModeExtension >(II) Loading extension XFree86-Misc >(II) Loading extension XFree86-DGA >(II) Loading extension DPMS >(II) Loading extension TOG-CUP >(II) Loading extension Extended-Visual-Information >(II) Loading extension XVideo >(II) Loading extension XVideo-MotionCompensation >(II) Loading extension X-Resource >(II) LoadModule: "dbe" >(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so >(II) Module dbe: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > Module class: X.Org Server Extension > ABI class: X.Org Server Extension, version 0.3 >(II) Loading extension DOUBLE-BUFFER >(II) LoadModule: "glx" >(II) Loading /usr/lib/xorg/modules/extensions//libglx.so >(II) Module glx: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > ABI class: X.Org Server Extension, version 0.3 >(==) AIGLX enabled >(II) Loading extension GLX >(II) LoadModule: "freetype" >(II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so >(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project" > compiled for 1.3.0, module version = 2.1.0 > Module class: X.Org Font Renderer > ABI class: X.Org Font Renderer, version 0.5 >(II) Loading font FreeType >(II) LoadModule: "type1" >(II) Loading /usr/lib/xorg/modules/fonts//libtype1.so >(II) Module type1: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.2 > Module class: X.Org Font Renderer > ABI class: X.Org Font Renderer, version 0.5 >(II) Loading font Type1 >(II) LoadModule: "record" >(II) Loading /usr/lib/xorg/modules/extensions//librecord.so >(II) Module record: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.13.0 > Module class: X.Org Server Extension > ABI class: X.Org Server Extension, version 0.3 >(II) Loading extension RECORD >(II) LoadModule: "dri" >(II) Loading /usr/lib/xorg/modules/extensions//libdri.so >(II) Module dri: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > ABI class: X.Org Server Extension, version 0.3 >(II) Loading extension XFree86-DRI >(II) LoadModule: "intel" >(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so >(II) Module intel: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 2.0.0 > Module class: X.Org Video Driver > ABI class: X.Org Video Driver, version 1.2 >(II) LoadModule: "kbd" >(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so >(II) Module kbd: vendor="X.Org Foundation" > compiled for 7.2.0, module version = 1.1.0 > Module class: X.Org XInput Driver > ABI class: X.Org XInput driver, version 0.6 >(II) LoadModule: "synaptics" >(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so >(II) Module synaptics: vendor="X.Org Foundation" > compiled for 4.3.99.902, module version = 1.0.0 > Module class: X.Org XInput Driver > ABI class: X.Org XInput driver, version 0.6 >(II) LoadModule: "mouse" >(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so >(II) Module mouse: vendor="X.Org Foundation" > compiled for 7.2.0, module version = 1.1.1 > Module class: X.Org XInput Driver > ABI class: X.Org XInput driver, version 0.6 >(II) intel: Driver for Intel Integrated Graphics Chipsets: i810, > i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G, > E7221 (i915), 915GM, 945G, 945GM, 965G, 965G, 965Q, 946GZ, 965GM >(II) Primary Device is: PCI 00:02:0 >(--) Assigning device section with no busID to primary device >(--) Chipset 852GM/855GM found >(II) resource ranges after xf86ClaimFixedResources() call: > [0] -1 0 0x00100000 - 0x27ffffff (0x27f00000) MX[B]E(B) > [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] > [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] > [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] > [4] -1 0 0xe0000000 - 0xe00007ff (0x800) MX[B] > [5] -1 0 0xe0000800 - 0xe00008ff (0x100) MX[B] > [6] -1 0 0xe0001000 - 0xe0001fff (0x1000) MX[B] > [7] -1 0 0xf0080600 - 0xf00806ff (0x100) MX[B] > [8] -1 0 0xf0080400 - 0xf00805ff (0x200) MX[B] > [9] -1 0 0x28080000 - 0x280803ff (0x400) MX[B] > [10] -1 0 0xfebff000 - 0xfebff3ff (0x400) MX[B] > [11] -1 0 0xf0000000 - 0xf007ffff (0x80000) MX[B](B) > [12] -1 0 0xb0000000 - 0xb7ffffff (0x8000000) MX[B](B) > [13] -1 0 0x28000000 - 0x2807ffff (0x80000) MX[B](B) > [14] -1 0 0x20000000 - 0x27ffffff (0x8000000) MX[B](B) > [15] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] > [16] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] > [17] -1 0 0x0000c000 - 0x0000c07f (0x80) IX[B] > [18] -1 0 0x0000c100 - 0x0000c1ff (0x100) IX[B] > [19] -1 0 0x0000e400 - 0x0000e47f (0x80) IX[B] > [20] -1 0 0x0000e300 - 0x0000e3ff (0x100) IX[B] > [21] -1 0 0x0000e200 - 0x0000e23f (0x40) IX[B] > [22] -1 0 0x0000e100 - 0x0000e1ff (0x100) IX[B] > [23] -1 0 0x00001400 - 0x0000141f (0x20) IX[B] > [24] -1 0 0x00001100 - 0x0000110f (0x10) IX[B] > [25] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [26] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [27] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [28] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [29] -1 0 0x00001700 - 0x0000171f (0x20) IX[B] > [30] -1 0 0x00001600 - 0x0000161f (0x20) IX[B] > [31] -1 0 0x00001200 - 0x0000121f (0x20) IX[B] > [32] -1 0 0x0000e000 - 0x0000e007 (0x8) IX[B](B) >(II) resource ranges after probing: > [0] -1 0 0x00100000 - 0x27ffffff (0x27f00000) MX[B]E(B) > [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] > [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] > [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] > [4] -1 0 0xe0000000 - 0xe00007ff (0x800) MX[B] > [5] -1 0 0xe0000800 - 0xe00008ff (0x100) MX[B] > [6] -1 0 0xe0001000 - 0xe0001fff (0x1000) MX[B] > [7] -1 0 0xf0080600 - 0xf00806ff (0x100) MX[B] > [8] -1 0 0xf0080400 - 0xf00805ff (0x200) MX[B] > [9] -1 0 0x28080000 - 0x280803ff (0x400) MX[B] > [10] -1 0 0xfebff000 - 0xfebff3ff (0x400) MX[B] > [11] -1 0 0xf0000000 - 0xf007ffff (0x80000) MX[B](B) > [12] -1 0 0xb0000000 - 0xb7ffffff (0x8000000) MX[B](B) > [13] -1 0 0x28000000 - 0x2807ffff (0x80000) MX[B](B) > [14] -1 0 0x20000000 - 0x27ffffff (0x8000000) MX[B](B) > [15] 1 0 0x000a0000 - 0x000affff (0x10000) MS[B] > [16] 1 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] > [17] 1 0 0x000b8000 - 0x000bffff (0x8000) MS[B] > [18] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] > [19] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] > [20] -1 0 0x0000c000 - 0x0000c07f (0x80) IX[B] > [21] -1 0 0x0000c100 - 0x0000c1ff (0x100) IX[B] > [22] -1 0 0x0000e400 - 0x0000e47f (0x80) IX[B] > [23] -1 0 0x0000e300 - 0x0000e3ff (0x100) IX[B] > [24] -1 0 0x0000e200 - 0x0000e23f (0x40) IX[B] > [25] -1 0 0x0000e100 - 0x0000e1ff (0x100) IX[B] > [26] -1 0 0x00001400 - 0x0000141f (0x20) IX[B] > [27] -1 0 0x00001100 - 0x0000110f (0x10) IX[B] > [28] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [29] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [30] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [31] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [32] -1 0 0x00001700 - 0x0000171f (0x20) IX[B] > [33] -1 0 0x00001600 - 0x0000161f (0x20) IX[B] > [34] -1 0 0x00001200 - 0x0000121f (0x20) IX[B] > [35] -1 0 0x0000e000 - 0x0000e007 (0x8) IX[B](B) > [36] 1 0 0x000003b0 - 0x000003bb (0xc) IS[B] > [37] 1 0 0x000003c0 - 0x000003df (0x20) IS[B] >(II) Setting vga for screen 0. >(II) Enabling PCI device >(II) Loading sub module "int10" >(II) LoadModule: "int10" >(II) Loading /usr/lib/xorg/modules//libint10.so >(II) Module int10: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > ABI class: X.Org Video Driver, version 1.2 >(II) Loading sub module "vbe" >(II) LoadModule: "vbe" >(II) Loading /usr/lib/xorg/modules//libvbe.so >(II) Module vbe: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.1.0 > ABI class: X.Org Video Driver, version 1.2 >(II) Loading sub module "vgahw" >(II) LoadModule: "vgahw" >(II) Loading /usr/lib/xorg/modules//libvgahw.so >(II) Module vgahw: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 0.1.0 > ABI class: X.Org Video Driver, version 1.2 >(**) intel(0): Depth 24, (--) framebuffer bpp 32 >(==) intel(0): RGB weight 888 >(==) intel(0): Default visual is TrueColor >(**) intel(0): Option "ModeDebug" "true" >(II) intel(0): Integrated Graphics Chipset: Intel(R) 855GME >(--) intel(0): Chipset: "852GM/855GM" >(--) intel(0): Linear framebuffer at 0xB0000000 >(--) intel(0): IO registers at addr 0xF0000000 >(II) intel(0): Hardware state on X startup: >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0x19000000 (disabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00000a00 (2560 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) >(II) intel(0): DSPBBASE: 0x00000000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x027f018f (640, 400) >(II) intel(0): FPB0: 0x00061407 (n = 6, m1 = 20, m2 = 7) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x059f04ff (1280 start, 1440 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x2204008e (enabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x00 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x8e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x20 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 148750 n 6 m1 20 m2 7 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): 2 display pipes available. >(==) intel(0): Using XAA for acceleration >(--) intel(0): Will try to allocate texture pool for old Mesa 3D driver. >(II) intel(0): Will try to reserve 32768 kiB of AGP aperture space > for the DRM memory manager. >(II) Loading sub module "ddc" >(II) LoadModule: "ddc"(II) Module already built-in >(II) Loading sub module "i2c" >(II) LoadModule: "i2c"(II) Module already built-in >(II) intel(0): Output VGA has no monitor section >(II) intel(0): I2C bus "CRTDDC_A" initialized. >(II) intel(0): Output LVDS has no monitor section >(II) intel(0): I2C bus "LVDSDDC_C" initialized. >(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0. >(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed. >(II) intel(0): EDID for output LVDS >(II) Loading sub module "int10" >(II) LoadModule: "int10" >(II) Reloading /usr/lib/xorg/modules//libint10.so >(II) intel(0): initializing int10 >(WW) intel(0): Bad V_BIOS checksum >(II) intel(0): Primary V_BIOS segment is: 0xc000 >(II) intel(0): VESA BIOS detected >(II) intel(0): VESA VBE Version 3.0 >(II) intel(0): VESA VBE Total Mem: 32576 kB >(II) intel(0): VESA VBE OEM: Intel(r)852GM/852GME/855GM/855GME Graphics Chip Accelerated VGA BIOS >(II) intel(0): VESA VBE OEM Software Rev: 1.0 >(II) intel(0): VESA VBE OEM Vendor: Intel Corporation >(II) intel(0): VESA VBE OEM Product: Intel(r)852GM/852GME/855GM/855GME Graphics Controller >(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0 >(II) intel(0): Found panel mode in BIOS VBT tables: >(II) intel(0): Modeline "1280x768"x0.0 71.10 1280 1376 1488 1440 768 771 777 823 (49.4 kHz) >(WW) intel(0): BIOS panel mode data doesn't match probed data, continuing with probed. >(II) intel(0): BIOS mode: >(II) intel(0): Modeline "1280x768"x0.0 71.10 1280 1376 1488 1440 768 771 777 823 (49.4 kHz) >(II) intel(0): probed mode: >(II) intel(0): Modeline "1280x768"x0.0 70.12 1280 1376 1488 1440 768 771 777 823 (48.7 kHz) >(II) intel(0): Output TMDS has no monitor section >(II) intel(0): I2C bus "DVODDC_D" initialized. >(II) Loading sub module "sil164" >(II) LoadModule: "sil164" >(II) Loading /usr/lib/xorg/modules/drivers//sil164.so >(II) Module sil164: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > ABI class: X.Org Video Driver, version 1.2 >(II) intel(0): I2C bus "DVOI2C_E" initialized. >(EE) intel(0): detecting sil164 >(II) intel(0): I2C device "DVOI2C_E:SIL164 TMDS Controller" registered at address 0x70. >(II) intel(0): Mode for pipe A: >(II) intel(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz) >chosen: dotclock 31500 vco 1008000 ((m 126, m1 20, m2 14), n 4, (p 32, p1 8, p2 4)) >(II) intel(0): Output VGA disconnected >(II) intel(0): EDID for output VGA >(II) intel(0): Output LVDS connected >(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0. >(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed. >(II) intel(0): EDID for output LVDS >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x800" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x800" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x800" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1280x800" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1080" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1080" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1080" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1080" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1080" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1200" (exceeds panel dimensions) >(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions) >(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions) >(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions) >(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions) >(II) intel(0): Not using default mode "2560x1600" (width too large for virtual size) >(II) intel(0): Printing probed modes for output LVDS >(II) intel(0): Modeline "1280x768"x59.2 70.12 1280 1376 1488 1440 768 771 777 823 (48.7 kHz) >(II) intel(0): Modeline "1280x768"x85.0 118.53 1280 1368 1504 1728 768 769 772 807 -hsync +vsync (68.6 kHz) >(II) intel(0): Modeline "1280x768"x75.0 102.98 1280 1360 1496 1712 768 769 772 802 -hsync +vsync (60.2 kHz) >(II) intel(0): Modeline "1280x768"x70.0 94.98 1280 1352 1488 1696 768 769 772 800 -hsync +vsync (56.0 kHz) >(II) intel(0): Modeline "1280x768"x60.0 80.14 1280 1344 1480 1680 768 769 772 795 -hsync +vsync (47.7 kHz) >(II) intel(0): Modeline "1280x720"x85.0 110.01 1280 1360 1496 1712 720 721 724 756 -hsync +vsync (64.3 kHz) >(II) intel(0): Modeline "1280x720"x75.0 95.65 1280 1352 1488 1696 720 721 724 752 -hsync +vsync (56.4 kHz) >(II) intel(0): Modeline "1280x720"x70.0 89.04 1280 1352 1488 1696 720 721 724 750 -hsync +vsync (52.5 kHz) >(II) intel(0): Modeline "1280x720"x60.0 74.48 1280 1336 1472 1664 720 721 724 746 -hsync +vsync (44.8 kHz) >(II) intel(0): Modeline "1152x768"x54.8 65.00 1152 1178 1314 1472 768 771 777 806 +hsync +vsync (44.2 kHz) >(II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 808 +hsync +vsync (68.7 kHz) >(II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz) >(II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz) >(II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) >(II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz) >(II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 +hsync +vsync (53.7 kHz) >(II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz) >(II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) >(II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) >(II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz) >(II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 -hsync -vsync (43.3 kHz) >(II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz) >(II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) >(II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) >(II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 -hsync +vsync (37.9 kHz) >(II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 -hsync +vsync (37.9 kHz) >(II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 +hsync -vsync (37.9 kHz) >(II) intel(0): Output TMDS disconnected >(II) intel(0): EDID for output TMDS >(II) intel(0): Output VGA disconnected >(II) intel(0): Output LVDS connected >(II) intel(0): Output TMDS disconnected >(II) intel(0): Output LVDS using initial mode 1280x768 >(II) intel(0): Monitoring connected displays enabled >(II) intel(0): detected 128 kB GTT. >(II) intel(0): detected 32636 kB stolen memory. >(==) intel(0): video overlay key set to 0x101fe >(==) intel(0): Will not try to enable page flipping >(==) intel(0): Triple buffering disabled >(==) intel(0): Using gamma correction (1.0, 1.0, 1.0) >(==) intel(0): DPI set to (75, 75) >(II) Loading sub module "fb" >(II) LoadModule: "fb" >(II) Loading /usr/lib/xorg/modules//libfb.so >(II) Module fb: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.0.0 > ABI class: X.Org ANSI C Emulation, version 0.3 >(II) Loading sub module "xaa" >(II) LoadModule: "xaa" >(II) Loading /usr/lib/xorg/modules//libxaa.so >(II) Module xaa: vendor="X.Org Foundation" > compiled for 1.3.0, module version = 1.2.0 > ABI class: X.Org Video Driver, version 1.2 >(II) Loading sub module "ramdac" >(II) LoadModule: "ramdac"(II) Module already built-in >(II) intel(0): Comparing regs from server start up to After PreInit >(==) Depth 24 pixmap format is 32 bpp >(II) do I need RAC? No, I don't. >(II) resource ranges after preInit: > [0] 1 0 0xf0000000 - 0xf007ffff (0x80000) MS[B] > [1] 1 0 0xb0000000 - 0xb7ffffff (0x8000000) MS[B] > [2] -1 0 0x00100000 - 0x27ffffff (0x27f00000) MX[B]E(B) > [3] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] > [4] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] > [5] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] > [6] -1 0 0xe0000000 - 0xe00007ff (0x800) MX[B] > [7] -1 0 0xe0000800 - 0xe00008ff (0x100) MX[B] > [8] -1 0 0xe0001000 - 0xe0001fff (0x1000) MX[B] > [9] -1 0 0xf0080600 - 0xf00806ff (0x100) MX[B] > [10] -1 0 0xf0080400 - 0xf00805ff (0x200) MX[B] > [11] -1 0 0x28080000 - 0x280803ff (0x400) MX[B] > [12] -1 0 0xfebff000 - 0xfebff3ff (0x400) MX[B] > [13] -1 0 0xf0000000 - 0xf007ffff (0x80000) MX[B](B) > [14] -1 0 0xb0000000 - 0xb7ffffff (0x8000000) MX[B](B) > [15] -1 0 0x28000000 - 0x2807ffff (0x80000) MX[B](B) > [16] -1 0 0x20000000 - 0x27ffffff (0x8000000) MX[B](B) > [17] 1 0 0x000a0000 - 0x000affff (0x10000) MS[B](OprD) > [18] 1 0 0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD) > [19] 1 0 0x000b8000 - 0x000bffff (0x8000) MS[B](OprD) > [20] 1 0 0x0000e000 - 0x0000e007 (0x8) IS[B] > [21] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] > [22] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] > [23] -1 0 0x0000c000 - 0x0000c07f (0x80) IX[B] > [24] -1 0 0x0000c100 - 0x0000c1ff (0x100) IX[B] > [25] -1 0 0x0000e400 - 0x0000e47f (0x80) IX[B] > [26] -1 0 0x0000e300 - 0x0000e3ff (0x100) IX[B] > [27] -1 0 0x0000e200 - 0x0000e23f (0x40) IX[B] > [28] -1 0 0x0000e100 - 0x0000e1ff (0x100) IX[B] > [29] -1 0 0x00001400 - 0x0000141f (0x20) IX[B] > [30] -1 0 0x00001100 - 0x0000110f (0x10) IX[B] > [31] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [32] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [33] -1 0 0x000001f0 - 0x000001f0 (0x1) IX[B] > [34] -1 0 0x000001f0 - 0x000001f7 (0x8) IX[B] > [35] -1 0 0x00001700 - 0x0000171f (0x20) IX[B] > [36] -1 0 0x00001600 - 0x0000161f (0x20) IX[B] > [37] -1 0 0x00001200 - 0x0000121f (0x20) IX[B] > [38] -1 0 0x0000e000 - 0x0000e007 (0x8) IX[B](B) > [39] 1 0 0x000003b0 - 0x000003bb (0xc) IS[B](OprU) > [40] 1 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) >(II) intel(0): Kernel reported 104704 total, 1 used >(II) intel(0): I830CheckAvailableMemory: 418812 kB available >(==) intel(0): VideoRam: 131072 KB >(II) intel(0): Attempting memory allocation with tiled buffers and > large DRI memory manager reservation: >(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed > (Cannot allocate memory) >(II) intel(0): Allocating 4860 scanlines for pixmap cache >(II) intel(0): Attempting memory allocation with tiled buffers and > small DRI memory manager reservation: >(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed > (Cannot allocate memory) >(II) intel(0): Allocating 4860 scanlines for pixmap cache >(WW) intel(0): Failed to allocate texture space. >(II) intel(0): Attempting memory allocation with untiled buffers and > large DRI memory manager reservation: >(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed > (Cannot allocate memory) >(II) intel(0): Allocating 5472 scanlines for pixmap cache >(WW) intel(0): Failed to allocate texture space. >(II) intel(0): Attempting memory allocation with untiled buffers and > small DRI memory manager reservation: >(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed > (Cannot allocate memory) >(II) intel(0): Allocating 5472 scanlines for pixmap cache >(II) intel(0): Success. >(II) intel(0): Memory allocation layout: >(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB) >(II) intel(0): 0x00020000-0x00027fff: logical 3D context (32 kB) >(II) intel(0): 0x00028000-0x00037fff: xaa scratch (64 kB) >(II) intel(0): 0x00038000-0x00677fff: back buffer (6400 kB) >(II) intel(0): 0x00678000-0x00cb7fff: depth buffer (6400 kB) >(II) intel(0): 0x00cb8000-0x00eb7fff: DRI memory manager (2048 kB) >(II) intel(0): 0x01fdf000: end of stolen memory >(II) intel(0): 0x01fdf000-0x01fdffff: Core cursor (4 kB, 0x051de000 physical) >(II) intel(0): 0x01fe0000-0x01fe3fff: ARGB cursor (16 kB, 0x17314000 physical) >(II) intel(0): 0x01fe4000-0x01fe4fff: Core cursor (4 kB, 0x0ef14000 physical) >(II) intel(0): 0x01fe5000-0x01fe8fff: ARGB cursor (16 kB, 0x04f74000 physical) >(II) intel(0): 0x01fe9000-0x01fe9fff: overlay registers (4 kB, 0x1524a000 physical) >(II) intel(0): 0x01ff0000-0x040e7fff: front buffer (33760 kB) >(II) intel(0): 0x040e8000-0x060e7fff: textures (32768 kB) >(II) intel(0): 0x08000000: end of aperture >(II) intel(0): front buffer is not tiled >(II) intel(0): back buffer is not tiled >(II) intel(0): depth buffer is not tiled >drmOpenDevice: node name is /dev/dri/card0 >drmOpenDevice: open result is 10, (OK) >drmOpenDevice: node name is /dev/dri/card0 >drmOpenDevice: open result is 10, (OK) >drmOpenByBusid: Searching for BusID pci:0000:00:02.0 >drmOpenDevice: node name is /dev/dri/card0 >drmOpenDevice: open result is 10, (OK) >drmOpenByBusid: drmOpenMinor returns 10 >drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 >(II) intel(0): [drm] DRM interface version 1.3 >(II) intel(0): [drm] created "i915" driver at busid "pci:0000:00:02.0" >(II) intel(0): [drm] added 8192 byte SAREA at 0xdecb3000 >(II) intel(0): [drm] mapped SAREA 0xdecb3000 to 0xb7f19000 >(II) intel(0): [drm] framebuffer handle = 0xb1ff0000 >(II) intel(0): [drm] added 1 reserved context for kernel >(II) intel(0): Unable to use TTM-based memory manager with DRM version 1.6 >(II) intel(0): [drm] Registers = 0xf0000000 >(II) intel(0): [drm] ring buffer = 0xb0000000 >(II) intel(0): [drm] init sarea width,height = 1280 x 1280 (pitch 1280) >(II) intel(0): [drm] Mapping front buffer >(II) intel(0): [drm] Front Buffer = 0x263fe000 >(II) intel(0): [drm] Back Buffer = 0xb0038000 >(II) intel(0): [drm] Depth Buffer = 0xb0678000 >(II) intel(0): [drm] textures = 0xb40e8000 >(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432 >(II) intel(0): [dri] visual configs initialized >(II) intel(0): Page Flipping disabled >(==) intel(0): Write-combining range (0xb0000000,0x8000000) >(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 >(II) intel(0): Using XFree86 Acceleration Architecture (XAA) > Screen to screen bit blits > Solid filled rectangles > 8x8 mono pattern filled rectangles > Indirect CPU to Screen color expansion > Solid Horizontal and Vertical Lines > Offscreen Pixmaps > Setting up tile and stipple cache: > 32 128x128 slots > 32 256x256 slots > 16 512x512 slots >(==) intel(0): Backing store disabled >(==) intel(0): Silken mouse enabled >(II) intel(0): Initializing HW Cursor >(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01fdf000 (pgoffset 8159) >(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01fe0000 (pgoffset 8160) >(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x01fe4000 (pgoffset 8164) >(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x01fe5000 (pgoffset 8165) >(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x01fe9000 (pgoffset 8169) >(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x01ff0000 (pgoffset 8176) >(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x040e8000 (pgoffset 16616) >(II) intel(0): Mode for pipe B: >(II) intel(0): Modeline "1280x768"x59.2 70.12 1280 1376 1488 1440 768 771 777 823 (48.7 kHz) >chosen: dotclock 70285 vco 984000 ((m 123, m1 19, m2 16), n 4, (p 14, p1 1, p2 14)) >(II) intel(0): Hardware state at EnterVT: >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x00000000 (disabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x008b0000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00001400 (5120 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x02ff04ff (1280, 768) >(II) intel(0): DSPBBASE: 0x01ff0000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x04ff02ff (1280, 768) >(II) intel(0): FPB0: 0x00041310 (n = 4, m1 = 19, m2 = 16) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90010000 (enabled, non-dvo, default clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x05cf04ff (1280 start, 1488 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x80000000 (disabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x00 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x0e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x00 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 196800 n 4 m1 19 m2 16 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): Output configuration: >(II) intel(0): Pipe A is off >(II) intel(0): Display plane A is now disabled and connected to pipe A. >(II) intel(0): Pipe B is on >(II) intel(0): Display plane B is now enabled and connected to pipe B. >(II) intel(0): Output VGA is connected to pipe none >(II) intel(0): Output LVDS is connected to pipe B >(II) intel(0): Output TMDS is connected to pipe none >(II) intel(0): Set up overlay video >(II) intel(0): X context handle = 0x1 >(II) intel(0): [drm] installed DRM signal handler >(II) intel(0): [DRI] installation complete >(II) intel(0): [drm] dma control initialized, using IRQ 10 >(II) intel(0): direct rendering: Enabled >(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message. >(--) RandR disabled >(II) Initializing built-in extension MIT-SHM >(II) Initializing built-in extension XInputExtension >(II) Initializing built-in extension XTEST >(II) Initializing built-in extension XKEYBOARD >(II) Initializing built-in extension XC-APPGROUP >(II) Initializing built-in extension XAccessControlExtension >(II) Initializing built-in extension SECURITY >(II) Initializing built-in extension XINERAMA >(II) Initializing built-in extension XFIXES >(II) Initializing built-in extension XFree86-Bigfont >(II) Initializing built-in extension RENDER >(II) Initializing built-in extension RANDR >(II) Initializing built-in extension COMPOSITE >(II) Initializing built-in extension DAMAGE >(II) Initializing built-in extension XEVIE >drmOpenDevice: node name is /dev/dri/card0 >drmOpenDevice: open result is 11, (OK) >drmOpenByBusid: Searching for BusID pci:0000:00:02.0 >drmOpenDevice: node name is /dev/dri/card0 >drmOpenDevice: open result is 11, (OK) >drmOpenByBusid: drmOpenMinor returns 11 >drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 >(WW) AIGLX: 3D driver claims to not support visual 0x23 >(WW) AIGLX: 3D driver claims to not support visual 0x24 >(WW) AIGLX: 3D driver claims to not support visual 0x25 >(WW) AIGLX: 3D driver claims to not support visual 0x26 >(WW) AIGLX: 3D driver claims to not support visual 0x27 >(WW) AIGLX: 3D driver claims to not support visual 0x28 >(WW) AIGLX: 3D driver claims to not support visual 0x29 >(WW) AIGLX: 3D driver claims to not support visual 0x2a >(WW) AIGLX: 3D driver claims to not support visual 0x2b >(WW) AIGLX: 3D driver claims to not support visual 0x2c >(WW) AIGLX: 3D driver claims to not support visual 0x2d >(WW) AIGLX: 3D driver claims to not support visual 0x2e >(WW) AIGLX: 3D driver claims to not support visual 0x2f >(WW) AIGLX: 3D driver claims to not support visual 0x30 >(WW) AIGLX: 3D driver claims to not support visual 0x31 >(WW) AIGLX: 3D driver claims to not support visual 0x32 >(II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so >(II) GLX: Initialized DRI GL provider for screen 0 >(II) intel(0): Setting screen physical size to 338 x 203 >(**) Option "CoreKeyboard" >(**) Keyboard0: Core Keyboard >(**) Option "Protocol" "standard" >(**) Keyboard0: Protocol: standard >(**) Option "AutoRepeat" "500 30" >(**) Option "XkbRules" "xorg" >(**) Keyboard0: XkbRules: "xorg" >(**) Option "XkbModel" "pc105" >(**) Keyboard0: XkbModel: "pc105" >(**) Option "XkbLayout" "gb" >(**) Keyboard0: XkbLayout: "gb" >(**) Option "CustomKeycodes" "off" >(**) Keyboard0: CustomKeycodes disabled >(II) Synaptics touchpad driver version 0.14.4 (1404) >(--) Synaptics auto-dev sets device to /dev/input/event1 >(**) Option "Device" "/dev/input/event1" >(--) Synaptics touchpad found >(**) Option "CorePointer" >(**) Synaptics: Core Pointer >(WW) <default pointer>: No Device specified, looking for one... >(II) <default pointer>: Setting Device option to "/dev/input/mice" >(--) <default pointer>: Device: "/dev/input/mice" >(==) <default pointer>: Protocol: "Auto" >(**) Option "AlwaysCore" >(**) <default pointer>: always reports core events >(==) <default pointer>: Emulate3Buttons, Emulate3Timeout: 50 >(**) <default pointer>: ZAxisMapping: buttons 4 and 5 >(**) <default pointer>: Buttons: 9 >(II) XINPUT: Adding extended input device "<default pointer>" (type: MOUSE) >(II) XINPUT: Adding extended input device "Synaptics" (type: MOUSE) >(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD) >Synaptics DeviceInit called >SynapticsCtrl called. >Synaptics DeviceOn called >(--) Synaptics auto-dev sets device to /dev/input/event1 >(**) Option "Device" "/dev/input/event1" >(--) Synaptics touchpad found >(--) <default pointer>: PnP-detected protocol: "ExplorerPS/2" >(II) <default pointer>: ps2EnableDataReporting: succeeded >ProcXCloseDevice to close or not ? >SynapticsCtrl called. >SynapticsCtrl called. >(II) PM Event received: Capability Changed >I830PMEvent: Capability change >(II) PM Event received: Capability Changed >I830PMEvent: Capability change >Synaptics DeviceOff called >(II) AIGLX: Suspending AIGLX clients for VT switch >(II) intel(0): Comparing regs from server start up to After LeaveVT >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0x19000000 (disabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00000a00 (2560 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) >(II) intel(0): DSPBBASE: 0x00000000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x027f018f (640, 400) >(II) intel(0): FPB0: 0x00061407 (n = 6, m1 = 20, m2 = 7) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x059f04ff (1280 start, 1440 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x2204008e (enabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x58 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x8e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x00 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 148750 n 6 m1 20 m2 7 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): xf86UnbindGARTMemory: unbind key 0 >(II) intel(0): xf86UnbindGARTMemory: unbind key 1 >(II) intel(0): xf86UnbindGARTMemory: unbind key 2 >(II) intel(0): xf86UnbindGARTMemory: unbind key 3 >(II) intel(0): xf86UnbindGARTMemory: unbind key 4 >(II) intel(0): xf86UnbindGARTMemory: unbind key 5 >(II) intel(0): xf86UnbindGARTMemory: unbind key 6 >(II) Open ACPI successful (/var/run/acpid.socket) >(II) AIGLX: Resuming AIGLX clients after VT switch >(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01fdf000 (pgoffset 8159) >(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01fe0000 (pgoffset 8160) >(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x01fe4000 (pgoffset 8164) >(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x01fe5000 (pgoffset 8165) >(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x01fe9000 (pgoffset 8169) >(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x01ff0000 (pgoffset 8176) >(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x040e8000 (pgoffset 16616) >(II) intel(0): Mode for pipe B: >(II) intel(0): Modeline "1280x768"x59.2 70.12 1280 1376 1488 1440 768 771 777 823 (48.7 kHz) >chosen: dotclock 70285 vco 984000 ((m 123, m1 19, m2 16), n 4, (p 14, p1 1, p2 14)) >(II) intel(0): Hardware state at EnterVT: >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x00000000 (disabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x008b0000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00001400 (5120 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x02ff04ff (1280, 768) >(II) intel(0): DSPBBASE: 0x01ff0000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x04ff02ff (1280, 768) >(II) intel(0): FPB0: 0x00041310 (n = 4, m1 = 19, m2 = 16) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90010000 (enabled, non-dvo, default clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x05cf04ff (1280 start, 1488 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x80000000 (disabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x00 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x8e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x20 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 196800 n 4 m1 19 m2 16 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): Output configuration: >(II) intel(0): Pipe A is off >(II) intel(0): Display plane A is now disabled and connected to pipe A. >(II) intel(0): Pipe B is on >(II) intel(0): Display plane B is now enabled and connected to pipe B. >(II) intel(0): Output VGA is connected to pipe none >(II) intel(0): Output LVDS is connected to pipe B >(II) intel(0): Output TMDS is connected to pipe none >(II) intel(0): [drm] dma control initialized, using IRQ 10 >(II) <default pointer>: ps2EnableDataReporting: succeeded >Synaptics DeviceOn called >(--) Synaptics auto-dev sets device to /dev/input/event1 >(**) Option "Device" "/dev/input/event1" >(--) Synaptics touchpad found >Synaptics DeviceOff called >(II) AIGLX: Suspending AIGLX clients for VT switch >(II) intel(0): Comparing regs from server start up to After LeaveVT >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0x19000000 (disabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00000a00 (2560 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) >(II) intel(0): DSPBBASE: 0x00000000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x027f018f (640, 400) >(II) intel(0): FPB0: 0x00061407 (n = 6, m1 = 20, m2 = 7) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x059f04ff (1280 start, 1440 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x2204008e (enabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x58 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x8e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x20 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 148750 n 6 m1 20 m2 7 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): xf86UnbindGARTMemory: unbind key 0 >(II) intel(0): xf86UnbindGARTMemory: unbind key 1 >(II) intel(0): xf86UnbindGARTMemory: unbind key 2 >(II) intel(0): xf86UnbindGARTMemory: unbind key 3 >(II) intel(0): xf86UnbindGARTMemory: unbind key 4 >(II) intel(0): xf86UnbindGARTMemory: unbind key 5 >(II) intel(0): xf86UnbindGARTMemory: unbind key 6 >(II) <default pointer>: ps2EnableDataReporting: succeeded >(II) Open ACPI successful (/var/run/acpid.socket) >(II) AIGLX: Resuming AIGLX clients after VT switch >(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01fdf000 (pgoffset 8159) >(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01fe0000 (pgoffset 8160) >(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x01fe4000 (pgoffset 8164) >(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x01fe5000 (pgoffset 8165) >(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x01fe9000 (pgoffset 8169) >(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x01ff0000 (pgoffset 8176) >(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x040e8000 (pgoffset 16616) >(II) intel(0): Mode for pipe B: >(II) intel(0): Modeline "1280x768"x59.2 70.12 1280 1376 1488 1440 768 771 777 823 (48.7 kHz) >chosen: dotclock 70285 vco 984000 ((m 123, m1 19, m2 16), n 4, (p 14, p1 1, p2 14)) >(II) intel(0): Hardware state at EnterVT: >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x00000000 (disabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x008b0000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00001400 (5120 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x02ff04ff (1280, 768) >(II) intel(0): DSPBBASE: 0x01ff0000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x04ff02ff (1280, 768) >(II) intel(0): FPB0: 0x00041310 (n = 4, m1 = 19, m2 = 16) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90010000 (enabled, non-dvo, default clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x05cf04ff (1280 start, 1488 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x80000000 (disabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x00 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x8e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x20 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 196800 n 4 m1 19 m2 16 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): Output configuration: >(II) intel(0): Pipe A is off >(II) intel(0): Display plane A is now disabled and connected to pipe A. >(II) intel(0): Pipe B is on >(II) intel(0): Display plane B is now enabled and connected to pipe B. >(II) intel(0): Output VGA is connected to pipe none >(II) intel(0): Output LVDS is connected to pipe B >(II) intel(0): Output TMDS is connected to pipe none >(II) intel(0): [drm] dma control initialized, using IRQ 10 >Synaptics DeviceOn called >(--) Synaptics auto-dev sets device to /dev/input/event1 >(**) Option "Device" "/dev/input/event1" >(--) Synaptics touchpad found >(II) PM Event received: Capability Changed >I830PMEvent: Capability change >Synaptics DeviceOff called >(II) intel(0): [drm] removed 1 reserved context for kernel >(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xdecb3000 at 0xb7f19000 >(EE) intel(0): I830 Vblank Pipe Setup Failed 0 >(II) intel(0): Comparing regs from server start up to After LeaveVT >(II) intel(0): DumpRegsBegin >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) >(II) intel(0): VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) >(II) intel(0): DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) >(II) intel(0): D_STATE: 0x0000030f >(II) intel(0): DSPCLK_GATE_D: 0x00000000 >(II) intel(0): RENCLK_GATE_D1: 0x00000000 >(II) intel(0): RENCLK_GATE_D2: 0x00000000 >(II) intel(0): SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) >(II) intel(0): SDVOUDI: 0x00000000 >(II) intel(0): DSPARB: 0x00015455 >(II) intel(0): DSPFW1: 0x00000000 >(II) intel(0): DSPFW2: 0x00000000 >(II) intel(0): DSPFW3: 0x00000000 >(II) intel(0): ADPA: 0x40009c18 (disabled, pipe B, +hsync, +vsync) >(II) intel(0): LVDS: 0xc0000300 (enabled, pipe B, 18 bit, 1 channel) >(II) intel(0): DVOA: 0x00000000 >(II) intel(0): DVOB: 0x00000000 >(II) intel(0): DVOC: 0x00000000 >(II) intel(0): DVOA_SRCDIM: 0x00000000 >(II) intel(0): DVOB_SRCDIM: 0x00000000 >(II) intel(0): DVOC_SRCDIM: 0x00000000 >(II) intel(0): PP_CONTROL: 0x00000001 (power target: on) >(II) intel(0): PP_STATUS: 0xc0000008 (on, ready, sequencing idle) >(II) intel(0): PFIT_CONTROL: 0x80000668 >(II) intel(0): PFIT_PGM_RATIOS: 0x00000000 >(II) intel(0): PORT_HOTPLUG_EN: 0x00000000 >(II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 >(II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) >(II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) >(II) intel(0): DSPAPOS: 0x00000000 (0, 0) >(II) intel(0): DSPASIZE: 0x00000000 (1, 1) >(II) intel(0): DSPABASE: 0x00000000 >(II) intel(0): DSPASURF: 0x00000000 >(II) intel(0): DSPATILEOFF: 0x00000000 >(II) intel(0): PIPEACONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEASRC: 0x027f01df (640, 480) >(II) intel(0): FPA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): FPA1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_A: 0x808b0000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 13, p2 = 4) >(II) intel(0): DPLL_A_MD: 0x00000000 >(II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) >(II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) >(II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) >(II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) >(II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) >(II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) >(II) intel(0): BCLRPAT_A: 0x00000000 >(II) intel(0): VSYNCSHIFT_A: 0x00000000 >(II) intel(0): DSPBCNTR: 0x19000000 (disabled, pipe B) >(II) intel(0): DSPBSTRIDE: 0x00000a00 (2560 bytes) >(II) intel(0): DSPBPOS: 0x00000000 (0, 0) >(II) intel(0): DSPBSIZE: 0x018f02cf (720, 400) >(II) intel(0): DSPBBASE: 0x00000000 >(II) intel(0): DSPBSURF: 0x00000000 >(II) intel(0): DSPBTILEOFF: 0x00000000 >(II) intel(0): PIPEBCONF: 0x80000000 (enabled, single-wide) >(II) intel(0): PIPEBSRC: 0x027f018f (640, 400) >(II) intel(0): FPB0: 0x00061407 (n = 6, m1 = 20, m2 = 7) >(II) intel(0): FPB1: 0x00021207 (n = 2, m1 = 18, m2 = 7) >(II) intel(0): DPLL_B: 0x90016000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 1, p2 = 14) >(II) intel(0): DPLL_B_MD: 0x00000000 >(II) intel(0): HTOTAL_B: 0x059f04ff (1280 active, 1440 total) >(II) intel(0): HBLANK_B: 0x059f04ff (1280 start, 1440 end) >(II) intel(0): HSYNC_B: 0x05cf055f (1376 start, 1488 end) >(II) intel(0): VTOTAL_B: 0x033602ff (768 active, 823 total) >(II) intel(0): VBLANK_B: 0x033602ff (768 start, 823 end) >(II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) >(II) intel(0): BCLRPAT_B: 0x00000000 >(II) intel(0): VSYNCSHIFT_B: 0x00000000 >(II) intel(0): VCLK_DIVISOR_VGA0: 0x00021207 >(II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 >(II) intel(0): VCLK_POST_DIV: 0x0000888b >(II) intel(0): VGACNTRL: 0x2204008e (enabled) >(II) intel(0): TV_CTL: 0x00000000 >(II) intel(0): TV_DAC: 0x00000000 >(II) intel(0): TV_CSC_Y: 0x00000000 >(II) intel(0): TV_CSC_Y2: 0x00000000 >(II) intel(0): TV_CSC_U: 0x00000000 >(II) intel(0): TV_CSC_U2: 0x00000000 >(II) intel(0): TV_CSC_V: 0x00000000 >(II) intel(0): TV_CSC_V2: 0x00000000 >(II) intel(0): TV_CLR_KNOBS: 0x00000000 >(II) intel(0): TV_CLR_LEVEL: 0x00000000 >(II) intel(0): TV_H_CTL_1: 0x00000000 >(II) intel(0): TV_H_CTL_2: 0x00000000 >(II) intel(0): TV_H_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_1: 0x00000000 >(II) intel(0): TV_V_CTL_2: 0x00000000 >(II) intel(0): TV_V_CTL_3: 0x00000000 >(II) intel(0): TV_V_CTL_4: 0x00000000 >(II) intel(0): TV_V_CTL_5: 0x00000000 >(II) intel(0): TV_V_CTL_6: 0x00000000 >(II) intel(0): TV_V_CTL_7: 0x00000000 >(II) intel(0): TV_SC_CTL_1: 0x00000000 >(II) intel(0): TV_SC_CTL_2: 0x00000000 >(II) intel(0): TV_SC_CTL_3: 0x00000000 >(II) intel(0): TV_WIN_POS: 0x00000000 >(II) intel(0): TV_WIN_SIZE: 0x00000000 >(II) intel(0): TV_FILTER_CTL_1: 0x00000000 >(II) intel(0): TV_FILTER_CTL_2: 0x00000000 >(II) intel(0): TV_FILTER_CTL_3: 0x00000000 >(II) intel(0): TV_CC_CONTROL: 0x00000000 >(II) intel(0): TV_CC_DATA: 0x00000000 >(II) intel(0): TV_H_LUMA_0: 0x00000000 >(II) intel(0): TV_H_LUMA_59: 0x00000000 >(II) intel(0): TV_H_CHROMA_0: 0x00000000 >(II) intel(0): TV_H_CHROMA_59: 0x00000000 >(II) intel(0): SR00: 0x03 >(II) intel(0): SR01: 0x00 >(II) intel(0): SR02: 0x03 >(II) intel(0): SR03: 0x04 >(II) intel(0): SR04: 0x02 >(II) intel(0): SR05: 0x00 >(II) intel(0): SR06: 0x00 >(II) intel(0): SR07: 0x00 >(II) intel(0): MSR: 0x67 >(II) intel(0): CR00: 0x5f >(II) intel(0): CR01: 0x4f >(II) intel(0): CR02: 0x50 >(II) intel(0): CR03: 0x82 >(II) intel(0): CR04: 0x55 >(II) intel(0): CR05: 0x81 >(II) intel(0): CR06: 0xbf >(II) intel(0): CR07: 0x1f >(II) intel(0): CR08: 0x00 >(II) intel(0): CR09: 0x4f >(II) intel(0): CR0a: 0x1f >(II) intel(0): CR0b: 0x1e >(II) intel(0): CR0c: 0x00 >(II) intel(0): CR0d: 0x00 >(II) intel(0): CR0e: 0x00 >(II) intel(0): CR0f: 0x00 >(II) intel(0): CR10: 0x9c >(II) intel(0): CR11: 0x8e >(II) intel(0): CR12: 0x8f >(II) intel(0): CR13: 0x28 >(II) intel(0): CR14: 0x1f >(II) intel(0): CR15: 0x96 >(II) intel(0): CR16: 0xb9 >(II) intel(0): CR17: 0xa3 >(II) intel(0): CR18: 0xff >(II) intel(0): CR19: 0x00 >(II) intel(0): CR1a: 0x00 >(II) intel(0): CR1b: 0x00 >(II) intel(0): CR1c: 0x00 >(II) intel(0): CR1d: 0x00 >(II) intel(0): CR1e: 0x00 >(II) intel(0): CR1f: 0x00 >(II) intel(0): CR20: 0x00 >(II) intel(0): CR21: 0x00 >(II) intel(0): CR22: 0x20 >(II) intel(0): CR23: 0x00 >(II) intel(0): CR24: 0x00 >(WW) intel(0): p1 out of range >(II) intel(0): pipe A dot 261600 n 2 m1 18 m2 7 p1 1 p2 10 >(II) intel(0): pipe B dot 148750 n 6 m1 20 m2 7 p1 1 p2 10 >(II) intel(0): DumpRegsEnd >(II) intel(0): xf86UnbindGARTMemory: unbind key 0 >(II) intel(0): xf86UnbindGARTMemory: unbind key 1 >(II) intel(0): xf86UnbindGARTMemory: unbind key 2 >(II) intel(0): xf86UnbindGARTMemory: unbind key 3 >(II) intel(0): xf86UnbindGARTMemory: unbind key 4 >(II) intel(0): xf86UnbindGARTMemory: unbind key 5 >(II) intel(0): xf86UnbindGARTMemory: unbind key 6
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bug 242557
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