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Red Hat Bugzilla – Attachment 159358 Details for
Bug 247641
guest OS reports same MAC for every virtual NIC
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[patch]
Make QEMU support subpage IO mappings
kvm-subpages.patch (text/plain), 11.32 KB, created by
Daniel Berrangé
on 2007-07-16 18:55:57 UTC
(
hide
)
Description:
Make QEMU support subpage IO mappings
Filename:
MIME Type:
Creator:
Daniel Berrangé
Created:
2007-07-16 18:55:57 UTC
Size:
11.32 KB
patch
obsolete
>diff -rup kvm-24/qemu/cpu-all.h kvm-24.new/qemu/cpu-all.h >--- kvm-24/qemu/cpu-all.h 2007-05-08 04:44:27.000000000 -0400 >+++ kvm-24.new/qemu/cpu-all.h 2007-07-16 14:39:16.000000000 -0400 >@@ -841,6 +841,7 @@ extern uint8_t *bios_mem; > exception, the write memory callback gets the ram offset instead of > the physical address */ > #define IO_MEM_ROMD (1) >+#define IO_MEM_SUBPAGE (2) > > typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); > typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); >diff -rup kvm-24/qemu/exec.c kvm-24.new/qemu/exec.c >--- kvm-24/qemu/exec.c 2007-05-08 04:44:27.000000000 -0400 >+++ kvm-24.new/qemu/exec.c 2007-07-16 14:33:40.000000000 -0400 >@@ -144,6 +144,14 @@ static int tlb_flush_count; > static int tb_flush_count; > static int tb_phys_invalidate_count; > >+#define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK) >+typedef struct subpage_t { >+ target_phys_addr_t base; >+ CPUReadMemoryFunc **mem_read[TARGET_PAGE_SIZE]; >+ CPUWriteMemoryFunc **mem_write[TARGET_PAGE_SIZE]; >+ void *opaque[TARGET_PAGE_SIZE]; >+} subpage_t; >+ > static void page_init(void) > { > /* NOTE: we can always suppose that qemu_host_page_size >= >@@ -1808,6 +1816,30 @@ static inline void tlb_set_dirty(CPUStat > } > #endif /* defined(CONFIG_USER_ONLY) */ > >+static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, >+ int memory); >+static void *subpage_init (target_phys_addr_t base, uint32_t *phys, >+ int orig_memory); >+#define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \ >+ need_subpage) \ >+ do { \ >+ if (addr > start_addr) \ >+ start_addr2 = 0; \ >+ else { \ >+ start_addr2 = start_addr & ~TARGET_PAGE_MASK; \ >+ if (start_addr2 > 0) \ >+ need_subpage = 1; \ >+ } \ >+ \ >+ if ((start_addr + orig_size) - addr >= TARGET_PAGE_SIZE) \ >+ end_addr2 = TARGET_PAGE_SIZE - 1; \ >+ else { \ >+ end_addr2 = (start_addr + orig_size - 1) & ~TARGET_PAGE_MASK; \ >+ if (end_addr2 < TARGET_PAGE_SIZE - 1) \ >+ need_subpage = 1; \ >+ } \ >+ } while (0) >+ > /* register physical memory. 'size' must be a multiple of the target > page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an > io memory page */ >@@ -1818,15 +1850,56 @@ void cpu_register_physical_memory(target > target_phys_addr_t addr, end_addr; > PhysPageDesc *p; > CPUState *env; >+ unsigned long orig_size = size; >+ void *subpage; > > size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; >- end_addr = start_addr + size; >+ end_addr = start_addr + (target_phys_addr_t)size; > for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) { >- p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1); >- p->phys_offset = phys_offset; >- if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM || >- (phys_offset & IO_MEM_ROMD)) >- phys_offset += TARGET_PAGE_SIZE; >+ p = phys_page_find(addr >> TARGET_PAGE_BITS); >+ if (p && p->phys_offset != IO_MEM_UNASSIGNED) { >+ unsigned long orig_memory = p->phys_offset; >+ target_phys_addr_t start_addr2, end_addr2; >+ int need_subpage = 0; >+ >+ CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, >+ need_subpage); >+ if (need_subpage) { >+ if (!(orig_memory & IO_MEM_SUBPAGE)) { >+ subpage = subpage_init((addr & TARGET_PAGE_MASK), >+ &p->phys_offset, orig_memory); >+ } else { >+ subpage = io_mem_opaque[(orig_memory & ~TARGET_PAGE_MASK) >+ >> IO_MEM_SHIFT]; >+ } >+ subpage_register(subpage, start_addr2, end_addr2, phys_offset); >+ } else { >+ p->phys_offset = phys_offset; >+ if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM || >+ (phys_offset & IO_MEM_ROMD)) >+ phys_offset += TARGET_PAGE_SIZE; >+ } >+ } else { >+ p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1); >+ p->phys_offset = phys_offset; >+ if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM || >+ (phys_offset & IO_MEM_ROMD)) >+ phys_offset += TARGET_PAGE_SIZE; >+ else { >+ target_phys_addr_t start_addr2, end_addr2; >+ int need_subpage = 0; >+ >+ CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, >+ end_addr2, need_subpage); >+ >+ if (need_subpage) { >+ subpage = subpage_init((addr & TARGET_PAGE_MASK), >+ &p->phys_offset, IO_MEM_UNASSIGNED); >+ subpage_register(subpage, start_addr2, end_addr2, >+ phys_offset); >+ } >+ } >+ } > } > > /* since each CPU stores ram addresses in its TLB cache, we must >@@ -1965,6 +2038,149 @@ static CPUWriteMemoryFunc *notdirty_mem_ > notdirty_mem_writel, > }; > >+static inline uint32_t subpage_readlen (subpage_t *mmio, target_phys_addr_t addr, >+ unsigned int len) >+{ >+ CPUReadMemoryFunc **mem_read; >+ uint32_t ret; >+ unsigned int idx; >+ >+ idx = SUBPAGE_IDX(addr - mmio->base); >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d\n", __func__, >+ mmio, len, addr, idx); >+#endif >+ mem_read = mmio->mem_read[idx]; >+ ret = (*mem_read[len])(mmio->opaque[idx], addr); >+ >+ return ret; >+} >+ >+static inline void subpage_writelen (subpage_t *mmio, target_phys_addr_t addr, >+ uint32_t value, unsigned int len) >+{ >+ CPUWriteMemoryFunc **mem_write; >+ unsigned int idx; >+ >+ idx = SUBPAGE_IDX(addr - mmio->base); >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: subpage %p len %d addr " TARGET_FMT_plx " idx %d value %08x\n", __func__, >+ mmio, len, addr, idx, value); >+#endif >+ mem_write = mmio->mem_write[idx]; >+ (*mem_write[len])(mmio->opaque[idx], addr, value); >+} >+ >+static uint32_t subpage_readb (void *opaque, target_phys_addr_t addr) >+{ >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); >+#endif >+ >+ return subpage_readlen(opaque, addr, 0); >+} >+ >+static void subpage_writeb (void *opaque, target_phys_addr_t addr, >+ uint32_t value) >+{ >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, addr, value); >+#endif >+ subpage_writelen(opaque, addr, value, 0); >+} >+ >+static uint32_t subpage_readw (void *opaque, target_phys_addr_t addr) >+{ >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); >+#endif >+ >+ return subpage_readlen(opaque, addr, 1); >+} >+ >+static void subpage_writew (void *opaque, target_phys_addr_t addr, >+ uint32_t value) >+{ >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, addr, value); >+#endif >+ subpage_writelen(opaque, addr, value, 1); >+} >+ >+static uint32_t subpage_readl (void *opaque, target_phys_addr_t addr) >+{ >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: addr " TARGET_FMT_plx "\n", __func__, addr); >+#endif >+ >+ return subpage_readlen(opaque, addr, 2); >+} >+ >+static void subpage_writel (void *opaque, >+ target_phys_addr_t addr, uint32_t value) >+{ >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: addr " TARGET_FMT_plx " val %08x\n", __func__, addr, value); >+#endif >+ subpage_writelen(opaque, addr, value, 2); >+} >+ >+static CPUReadMemoryFunc *subpage_read[] = { >+ &subpage_readb, >+ &subpage_readw, >+ &subpage_readl, >+}; >+ >+static CPUWriteMemoryFunc *subpage_write[] = { >+ &subpage_writeb, >+ &subpage_writew, >+ &subpage_writel, >+}; >+ >+static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, >+ int memory) >+{ >+ int idx, eidx; >+ >+ if (start >= TARGET_PAGE_SIZE || end >= TARGET_PAGE_SIZE) >+ return -1; >+ idx = SUBPAGE_IDX(start); >+ eidx = SUBPAGE_IDX(end); >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %d\n", __func__, >+ mmio, start, end, idx, eidx, memory); >+#endif >+ memory >>= IO_MEM_SHIFT; >+ for (; idx <= eidx; idx++) { >+ mmio->mem_read[idx] = io_mem_read[memory]; >+ mmio->mem_write[idx] = io_mem_write[memory]; >+ mmio->opaque[idx] = io_mem_opaque[memory]; >+ } >+ >+ return 0; >+} >+ >+static void *subpage_init (target_phys_addr_t base, uint32_t *phys, >+ int orig_memory) >+{ >+ subpage_t *mmio; >+ int subpage_memory; >+ >+ mmio = qemu_mallocz(sizeof(subpage_t)); >+ if (mmio != NULL) { >+ mmio->base = base; >+ subpage_memory = cpu_register_io_memory(0, subpage_read, subpage_write, mmio); >+#if defined(DEBUG_SUBPAGE) >+ printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__, >+ mmio, base, TARGET_PAGE_SIZE, subpage_memory); >+#endif >+ *phys = subpage_memory | IO_MEM_SUBPAGE; >+ subpage_register(mmio, 0, TARGET_PAGE_SIZE - 1, orig_memory); >+ } >+ >+ return mmio; >+} >+ > static void io_mem_init(void) > { > cpu_register_io_memory(IO_MEM_ROM >> IO_MEM_SHIFT, error_mem_read, unassigned_mem_write, NULL); >Only in kvm-24.new/qemu: exec.c.orig >Only in kvm-24.new/qemu: exec.c.rej >diff -rup kvm-24/qemu/hw/rtl8139.c kvm-24.new/qemu/hw/rtl8139.c >--- kvm-24/qemu/hw/rtl8139.c 2007-05-08 04:44:27.000000000 -0400 >+++ kvm-24.new/qemu/hw/rtl8139.c 2007-07-16 14:33:22.000000000 -0400 >@@ -3325,7 +3325,7 @@ static void rtl8139_mmio_map(PCIDevice * > PCIRTL8139State *d = (PCIRTL8139State *)pci_dev; > RTL8139State *s = &d->rtl8139; > >- cpu_register_physical_memory(addr + 0, 0x100, s->rtl8139_mmio_io_addr); >+ cpu_register_physical_memory(addr + 0, 0x1000, s->rtl8139_mmio_io_addr); > } > > static void rtl8139_ioport_map(PCIDevice *pci_dev, int region_num, >@@ -3438,10 +3438,10 @@ void pci_rtl8139_init(PCIBus *bus, NICIn > s->rtl8139_mmio_io_addr = > cpu_register_io_memory(0, rtl8139_mmio_read, rtl8139_mmio_write, s); > >- pci_register_io_region(&d->dev, 0, 0x100, >+ pci_register_io_region(&d->dev, 0, 0x1000, > PCI_ADDRESS_SPACE_IO, rtl8139_ioport_map); > >- pci_register_io_region(&d->dev, 1, 0x100, >+ pci_register_io_region(&d->dev, 1, 0x1000, > PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map); > > s->irq = 16; /* PCI interrupt */ >Only in kvm-24.new/qemu/hw: rtl8139.c.defaults
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