Attachment 184951 Details for Bug 274811 – add pixel clock check while validate mode for digital monitors

[patch] add pixel clock check while validate mode for digital monitors

restrict-mode-within-RN50-capability.patch (text/plain), 3.32 KB, created by LisaWu on 2007-09-03 02:41:49 UTC

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Creator: LisaWu

Created: 2007-09-03 02:41:49 UTC

Size: 3.32 KB

patch

obsolete

>--- src/radeon_driver.c	2007-08-24 03:08:36.000000000 +0800
>+++ src/radeon_driver.c-mod	2007-08-24 03:06:13.000000000 +0800
>@@ -3220,7 +3220,7 @@
> /* When no mode provided in config file, this will add all modes supported in
>  * DDC date the pScrn->modes list
>  */
>-static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn)
>+static DisplayModePtr RADEONDDCModes(ScrnInfoPtr pScrn, ClockRangePtr clockRanges)
> {
>     DisplayModePtr  p;
>     DisplayModePtr  last  = NULL;
>@@ -3231,15 +3231,18 @@
>     char            stmp[32];
>     xf86MonPtr      ddc   = pScrn->monitor->DDC;
>     int		    preferred = PREFERRED_TIMING_MODE(ddc->features.msc);
>-
>-    /* Go thru detailed timing table first */
>+        /* Go thru detailed timing table first */
>     for (j = 0; j < 4; j++) {
> 	if (ddc->det_mon[j].type == 0) {
> 	    struct detailed_timings *d_timings =
> 		&ddc->det_mon[j].section.d_timings;
>+        
>+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR, " clockRanges->maxClock %d\t, ddctiming->clock %d\n",
>+            clockRanges->maxClock, d_timings->clock/1000);
> 
> 	    if (d_timings->h_active == 0 || d_timings->v_active == 0) break;
>-
>+        if ((d_timings->clock/1000 <= clockRanges->maxClock) 
>+             &&(d_timings->clock/1000 >= clockRanges->minClock)){
> 	    new = xnfcalloc(1, sizeof (DisplayModeRec));
> 	    memset(new, 0, sizeof (DisplayModeRec));
> 
>@@ -3282,6 +3285,7 @@
> 	    RADEONSortModes(&new, &first, &last);
> 	}
>     }
>+    }
> 
>     /* Search thru standard VESA modes from EDID */
>     for (j = 0; j < 8; j++) {
>@@ -3294,7 +3298,8 @@
> 		float  refresh =
> 		    (float)p->Clock * 1000.0 / p->HTotal / p->VTotal;
> 
>-		if (abs((float)ddc->timings2[j].refresh - refresh) < 1.0) {
>+		if (abs((float)ddc->timings2[j].refresh - refresh) < 1.0 && (p->Clock >= clockRanges-> minClock) 
>+                && (p->Clock <= clockRanges-> maxClock)) {
> 		    /* Is this good enough? */
> 		    new = xnfcalloc(1, sizeof (DisplayModeRec));
> 		    memcpy(new, p, sizeof(DisplayModeRec));
>@@ -3358,7 +3363,7 @@
> /* XFree86's xf86ValidateModes routine doesn't work well with DDC modes,
>  * so here is our own validation routine.
>  */
>-static int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,
>+static int RADEONValidateDDCModes(ScrnInfoPtr pScrn1, char **ppModeName,ClockRangePtr clockRanges,
> 				  RADEONMonitorType DisplayType, int crtc2)
> {
>     RADEONInfoPtr   info       = RADEONPTR(pScrn1);
>@@ -3381,7 +3386,7 @@
> 	int  maxVirtY = pScrn->virtualY;
> 
> 	/* Collect all of the DDC modes */
>-	first = last = ddcModes = RADEONDDCModes(pScrn);
>+	first = last = ddcModes = RADEONDDCModes(pScrn,clockRanges);
> 
> 	for (p = ddcModes; p; p = p->next) {
> 
>@@ -3896,7 +3901,7 @@
> 	    xf86DeleteMode(&pScrn->modePool, pScrn->modePool);
> 
> 	/* Next try to add DDC modes */
>-	modesFound = RADEONValidateDDCModes(pScrn, pScrn1->display->modes,
>+	modesFound = RADEONValidateDDCModes(pScrn, pScrn1->display->modes,clockRanges,
> 					    info->MergeType, 1);
> 
> 	/* If that fails and we're connect to a flat panel, then try to
>@@ -4176,7 +4181,7 @@
> 	    xf86DeleteMode(&pScrn->modePool, pScrn->modePool);
> 
> 	/* Next try to add DDC modes */
>-	modesFound = RADEONValidateDDCModes(pScrn, pScrn->display->modes,
>+	modesFound = RADEONValidateDDCModes(pScrn, pScrn->display->modes,clockRanges,
> 					    info->DisplayType, 0);
> 
> 	/* If that fails and we're connect to a flat panel, then try to

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Attachments on bug 274811: 184951