Attachment 1972568 Details for Bug 2217401 – File: cpuinfo

File: cpuinfo

cpuinfo (text/plain), 2.85 KB, created by Tim Waugh on 2023-06-26 07:52:05 UTC

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Creator: Tim Waugh

Created: 2023-06-26 07:52:05 UTC

Size: 2.85 KB

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>Architecture:                    x86_64
>CPU op-mode(s):                  32-bit, 64-bit
>Address sizes:                   39 bits physical, 48 bits virtual
>Byte Order:                      Little Endian
>CPU(s):                          4
>On-line CPU(s) list:             0-3
>Vendor ID:                       GenuineIntel
>BIOS Vendor ID:                  Intel(R) Corporation
>Model name:                      Intel(R) Core(TM) i7-7600U CPU @ 2.80GHz
>BIOS Model name:                 Intel(R) Core(TM) i7-7600U CPU @ 2.80GHz None CPU @ 2.8GHz
>BIOS CPU family:                 198
>CPU family:                      6
>Model:                           142
>Thread(s) per core:              2
>Core(s) per socket:              2
>Socket(s):                       1
>Stepping:                        9
>CPU(s) scaling MHz:              100%
>CPU max MHz:                     3900.0000
>CPU min MHz:                     400.0000
>BogoMIPS:                        5799.77
>Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d arch_capabilities
>Virtualization:                  VT-x
>L1d cache:                       64 KiB (2 instances)
>L1i cache:                       64 KiB (2 instances)
>L2 cache:                        512 KiB (2 instances)
>L3 cache:                        4 MiB (1 instance)
>NUMA node(s):                    1
>NUMA node0 CPU(s):               0-3
>Vulnerability Itlb multihit:     KVM: Mitigation: VMX disabled
>Vulnerability L1tf:              Mitigation; PTE Inversion; VMX conditional cache flushes, SMT vulnerable
>Vulnerability Mds:               Mitigation; Clear CPU buffers; SMT vulnerable
>Vulnerability Meltdown:          Mitigation; PTI
>Vulnerability Mmio stale data:   Mitigation; Clear CPU buffers; SMT vulnerable
>Vulnerability Retbleed:          Mitigation; IBRS
>Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
>Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user pointer sanitization
>Vulnerability Spectre v2:        Mitigation; IBRS, IBPB conditional, STIBP conditional, RSB filling, PBRSB-eIBRS Not affected
>Vulnerability Srbds:             Mitigation; Microcode
>Vulnerability Tsx async abort:   Mitigation; TSX disabled

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Attachments on bug 2217401: 1972563 | 1972564 | 1972565 | 1972566 | 1972567 | 1972568 | 1972569 | 1972570 | 1972571 | 1972572 | 1972573 | 1972574