Attachment 1982752 Details for Bug 2230855 – File: cpuinfo

File: cpuinfo

cpuinfo (text/plain), 2.76 KB, created by Michael Lerro on 2023-08-10 07:36:05 UTC

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Creator: Michael Lerro

Created: 2023-08-10 07:36:05 UTC

Size: 2.76 KB

patch

obsolete

>Architecture:                    x86_64
>CPU op-mode(s):                  32-bit, 64-bit
>Address sizes:                   39 bits physical, 48 bits virtual
>Byte Order:                      Little Endian
>CPU(s):                          8
>On-line CPU(s) list:             0-7
>Vendor ID:                       GenuineIntel
>BIOS Vendor ID:                  Intel(R) Corporation
>Model name:                      Intel(R) Core(TM) i5-8265U CPU @ 1.60GHz
>BIOS Model name:                 Intel(R) Core(TM) i5-8265U CPU @ 1.60GHz  CPU @ 3.7GHz
>BIOS CPU family:                 205
>CPU family:                      6
>Model:                           142
>Thread(s) per core:              2
>Core(s) per socket:              4
>Socket(s):                       1
>Stepping:                        12
>CPU(s) scaling MHz:              95%
>CPU max MHz:                     3900.0000
>CPU min MHz:                     400.0000
>BogoMIPS:                        3600.00
>Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp vnmi md_clear flush_l1d arch_capabilities
>Virtualization:                  VT-x
>L1d cache:                       128 KiB (4 instances)
>L1i cache:                       128 KiB (4 instances)
>L2 cache:                        1 MiB (4 instances)
>L3 cache:                        6 MiB (1 instance)
>NUMA node(s):                    1
>NUMA node0 CPU(s):               0-7
>Vulnerability Itlb multihit:     KVM: Mitigation: VMX disabled
>Vulnerability L1tf:              Not affected
>Vulnerability Mds:               Not affected
>Vulnerability Meltdown:          Not affected
>Vulnerability Mmio stale data:   Mitigation; Clear CPU buffers; SMT vulnerable
>Vulnerability Retbleed:          Mitigation; Enhanced IBRS
>Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
>Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user pointer sanitization
>Vulnerability Spectre v2:        Mitigation; Enhanced / Automatic IBRS, IBPB conditional, RSB filling, PBRSB-eIBRS SW sequence
>Vulnerability Srbds:             Mitigation; Microcode
>Vulnerability Tsx async abort:   Not affected

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