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Red Hat Bugzilla – Attachment 225821 Details for
Bug 329241
[PATCH] kernel >= 2.6.22 freezes without pci=nommconf on Intel G31/G33/Q35 chipsets
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[patch]
fix
linux-2.6-AI05_pci-fix-boot-time-hang-on-g31-g33-pc.patch (text/plain), 2.28 KB, created by
Kirill Kolyshkin
on 2007-10-12 16:57:38 UTC
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Description:
fix
Filename:
MIME Type:
Creator:
Kirill Kolyshkin
Created:
2007-10-12 16:57:38 UTC
Size:
2.28 KB
patch
obsolete
>From willy@parisc-linux.org Sat Aug 25 18:56:03 2007 >From: Matthew Wilcox <matthew@wil.cx> >Date: Sat, 25 Aug 2007 19:55:56 -0600 >Subject: PCI: Fix boot-time hang on G31/G33 PC >To: linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org >Cc: Robert Hancock <hancockr@shaw.ca>, Jesse Barnes <jesse.barnes@intel.com>, Greg KH <greg@kroah.com> >Message-ID: <20070826015556.GC14130@parisc-linux.org> >Content-Disposition: inline > > > >This patch, loosely based on a patch from Robert Hancock, which was in >turn based on a patch from Jesse Barnes, fixes a boot-time hang on my >shiny new PC. The 'conflict' mentioned in the patch in my case happens >to be between mmconfig and the graphics card, but it could easily be >between any pair of devices if they are left enabled by the BIOS and >mappen in the wrong place. > >Signed-off-by: Matthew Wilcox <matthew@wil.cx> >Acked-by: Robert Hancock <hancockr@shaw.ca> >Acked-by: Jesse Barnes <jesse.barnes@intel.com> >Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> > >--- > drivers/pci/probe.c | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > >--- linux-2.6.22.orig/drivers/pci/probe.c >+++ linux-2.6.22/drivers/pci/probe.c >@@ -170,11 +170,26 @@ static inline int is_64bit_memory(u32 ma > return 0; > } > >+/* >+ * Sizing PCI BARs requires us to disable decoding, otherwise we may run >+ * into conflicts with other devices while trying to size the BAR. Normally >+ * this isn't a problem, but it happens on some machines normally, and can >+ * happen on others during PCI device hotplug. Don't disable BARs for host >+ * bridges, though. Some of them do silly things like disable accesses to >+ * RAM from the CPU >+ */ > static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) > { > unsigned int pos, reg, next; > u32 l, sz; > struct resource *res; >+ u16 orig_cmd; >+ >+ if ((dev->class >> 8) != PCI_CLASS_BRIDGE_HOST) { >+ pci_read_config_word(dev, PCI_COMMAND, &orig_cmd); >+ pci_write_config_word(dev, PCI_COMMAND, >+ orig_cmd & ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); >+ } > > for(pos=0; pos<howmany; pos = next) { > u64 l64; >@@ -273,6 +288,9 @@ static void pci_read_bases(struct pci_de > } > } > } >+ >+ if ((dev->class >> 8) != PCI_CLASS_BRIDGE_HOST) >+ pci_write_config_word(dev, PCI_COMMAND, orig_cmd); > } > > void __devinit pci_read_bridge_bases(struct pci_bus *child)
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bug 329241
: 225821