Attachment 286211 Details for Bug 419171 – xen changes to support pstate changes

[patch] xen changes to support pstate changes

xen_pstate_driver_support.patch (text/plain), 2.11 KB, created by Bhavna Sarathy on 2007-12-12 21:23:00 UTC

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Creator: Bhavna Sarathy

Created: 2007-12-12 21:23:00 UTC

Size: 2.11 KB

patch

obsolete

>--- xen/include/asm-x86/msr.h.pstateorig	2007-12-12 15:21:05.000000000 -0500
>+++ xen/include/asm-x86/msr.h	2007-12-12 15:53:07.000000000 -0500
>@@ -349,6 +349,18 @@ static inline void write_efer(__u64 val)
> #define MSR_K7_CLK_CTL			0xC001001b
> #define MSR_K7_FID_VID_CTL		0xC0010041
> #define MSR_K7_FID_VID_STATUS		0xC0010042
>+#define MSR_K8_PSTATE_LIMIT		0xc0010061
>+#define MSR_K8_PSTATE_CTRL		0xc0010062
>+#define MSR_K8_PSTATE_STATUS		0xc0010063
>+#define MSR_K8_PSTATE0			0xc0010064
>+#define MSR_K8_PSTATE1			0xc0010065
>+#define MSR_K8_PSTATE2			0xc0010066
>+#define MSR_K8_PSTATE3			0xc0010067
>+#define MSR_K8_PSTATE4			0xc0010068
>+#define MSR_K8_PSTATE5			0xc0010069
>+#define MSR_K8_PSTATE6			0xc001006A
>+#define MSR_K8_PSTATE7			0xc001006B
>+#define MSR_K8_ENABLE_C1E		0xc0010055
> 
> #define MSR_K8_TOP_MEM1			0xC001001A
> #define MSR_K8_TOP_MEM2			0xC001001D
>--- xen/arch/x86/traps.c.pstateorig	2007-12-12 15:18:15.000000000 -0500
>+++ xen/arch/x86/traps.c	2007-12-12 15:50:47.000000000 -0500
>@@ -1722,6 +1722,30 @@ static int emulate_privileged_op(struct 
>                 goto fail;
>             v->arch.guest_context.gs_base_user = res;
>             break;
>+        case MSR_K7_FID_VID_STATUS:
>+        case MSR_K7_FID_VID_CTL:
>+        case MSR_K8_PSTATE_LIMIT:
>+        case MSR_K8_PSTATE_CTRL:
>+        case MSR_K8_PSTATE_STATUS:
>+        case MSR_K8_PSTATE0:
>+        case MSR_K8_PSTATE1:
>+        case MSR_K8_PSTATE2:
>+        case MSR_K8_PSTATE3:
>+        case MSR_K8_PSTATE4:
>+        case MSR_K8_PSTATE5:
>+        case MSR_K8_PSTATE6:
>+        case MSR_K8_PSTATE7:
>+            if ( (cpufreq_controller != FREQCTL_dom0_kernel) ||
>+                 (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) ||
>+                 wrmsr_safe(regs->ecx, eax, edx) )
>+                goto fail;
>+            break;
>+        case MSR_IA32_PERF_CTL:
>+            if ( (cpufreq_controller != FREQCTL_dom0_kernel) ||
>+                 (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) ||
>+                 wrmsr_safe(regs->ecx, eax, edx) )
>+                goto fail;
>+            break;
> #endif
>         default:
>             if ( wrmsr_hypervisor_regs(regs->ecx, eax, edx) )

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Attachments on bug 419171: 286201 | 286211