Attachment 294621 Details for Bug 432451 – Patch fixing smp irq affinity

[patch] Patch fixing smp irq affinity

rhel5-80.el5-fix-smp-irq_affinity.patch (text/plain), 4.80 KB, created by Flavio Leitner on 2008-02-12 03:29:23 UTC

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Creator: Flavio Leitner

Created: 2008-02-12 03:29:23 UTC

Size: 4.80 KB

patch

obsolete

>
>The MSI should be disabled when moving IRQs on chips without
>Mask-and-Pending bits. This patch based on upstream merge two
>IRQ chip drivers and also add msi_set_enable() to handle this case.
>
>Signed-off-by: Flavio Leitner <fleitner@redhat.com>
>
>
>Index: linux-2.6.18.i686/drivers/pci/msi.c
>===================================================================
>--- linux-2.6.18.i686.orig/drivers/pci/msi.c
>+++ linux-2.6.18.i686/drivers/pci/msi.c
>@@ -61,24 +61,44 @@ static int msi_cache_init(void)
> 	return 0;
> }
> 
>+
>+static void msi_set_enable(struct pci_dev *dev, int enable)
>+{
>+	int pos;
>+	u16 control;
>+
>+	pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
>+	if (pos) {
>+		pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
>+		control &= ~PCI_MSI_FLAGS_ENABLE;
>+		if (enable)
>+			control |= PCI_MSI_FLAGS_ENABLE;
>+		pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
>+	}
>+}
>+
> static void msi_set_mask_bit(unsigned int vector, int flag)
> {
> 	struct msi_desc *entry;
> 
> 	entry = (struct msi_desc *)msi_desc[vector];
>-	if (!entry || !entry->dev || !entry->mask_base)
>+	if (!entry || !entry->dev)
> 		return;
> 	switch (entry->msi_attrib.type) {
> 	case PCI_CAP_ID_MSI:
> 	{
>-		int		pos;
>-		u32		mask_bits;
>-
>-		pos = (long)entry->mask_base;
>-		pci_read_config_dword(entry->dev, pos, &mask_bits);
>-		mask_bits &= ~(1);
>-		mask_bits |= flag;
>-		pci_write_config_dword(entry->dev, pos, mask_bits);
>+		if (entry->msi_attrib.maskbit) {
>+			int		pos;
>+			u32		mask_bits;
>+
>+			pos = (long)entry->mask_base;
>+			pci_read_config_dword(entry->dev, pos, &mask_bits);
>+			mask_bits &= ~(1);
>+			mask_bits |= flag;
>+			pci_write_config_dword(entry->dev, pos, mask_bits);
>+		} else {
>+			msi_set_enable(entry->dev, !flag);
>+		}
> 		break;
> 	}
> 	case PCI_CAP_ID_MSIX:
>@@ -173,7 +193,7 @@ static void unmask_MSI_irq(unsigned int 
> 	msi_set_mask_bit(vector, 0);
> }
> 
>-static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector)
>+static unsigned int startup_msi_irq(unsigned int vector)
> {
> 	struct msi_desc *entry;
> 	unsigned long flags;
>@@ -186,14 +206,8 @@ static unsigned int startup_msi_irq_wo_m
> 	}
> 	entry->msi_attrib.state = 1;	/* Mark it active */
> 	spin_unlock_irqrestore(&msi_lock, flags);
>-
>-	return 0;	/* never anything pending */
>-}
>-
>-static unsigned int startup_msi_irq_w_maskbit(unsigned int vector)
>-{
>-	startup_msi_irq_wo_maskbit(vector);
> 	unmask_MSI_irq(vector);
>+
> 	return 0;	/* never anything pending */
> }
> 
>@@ -209,67 +223,40 @@ static void shutdown_msi_irq(unsigned in
> 	spin_unlock_irqrestore(&msi_lock, flags);
> }
> 
>-static void end_msi_irq_wo_maskbit(unsigned int vector)
>-{
>-	move_native_irq(vector);
>-	ack_APIC_irq();
>-}
>-
>-static void end_msi_irq_w_maskbit(unsigned int vector)
>+static void end_msi_irq(unsigned int vector)
> {
> 	move_native_irq(vector);
> 	unmask_MSI_irq(vector);
> 	ack_APIC_irq();
> }
> 
>-static void do_nothing(unsigned int vector)
>-{
>-}
>-
> /*
>  * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
>  * which implement the MSI-X Capability Structure.
>  */
> static struct hw_interrupt_type msix_irq_type = {
> 	.typename	= "PCI-MSI-X",
>-	.startup	= startup_msi_irq_w_maskbit,
>+	.startup	= startup_msi_irq,
> 	.shutdown	= shutdown_msi_irq,
> 	.enable		= unmask_MSI_irq,
> 	.disable	= mask_MSI_irq,
> 	.ack		= mask_MSI_irq,
>-	.end		= end_msi_irq_w_maskbit,
>+	.end		= end_msi_irq,
> 	.set_affinity	= set_msi_affinity
> };
> 
> /*
>- * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
>- * which implement the MSI Capability Structure with
>- * Mask-and-Pending Bits.
>+ * IRQ Chip for MSI PCI/PCI-X/PCI-Express Devices,
>+ * which implement the MSI or MSI-X Capability Structure.
>  */
>-static struct hw_interrupt_type msi_irq_w_maskbit_type = {
>+static struct hw_interrupt_type msi_irq_type = {
> 	.typename	= "PCI-MSI",
>-	.startup	= startup_msi_irq_w_maskbit,
>+	.startup	= startup_msi_irq,
> 	.shutdown	= shutdown_msi_irq,
> 	.enable		= unmask_MSI_irq,
> 	.disable	= mask_MSI_irq,
> 	.ack		= mask_MSI_irq,
>-	.end		= end_msi_irq_w_maskbit,
>-	.set_affinity	= set_msi_affinity
>-};
>-
>-/*
>- * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
>- * which implement the MSI Capability Structure without
>- * Mask-and-Pending Bits.
>- */
>-static struct hw_interrupt_type msi_irq_wo_maskbit_type = {
>-	.typename	= "PCI-MSI",
>-	.startup	= startup_msi_irq_wo_maskbit,
>-	.shutdown	= shutdown_msi_irq,
>-	.enable		= do_nothing,
>-	.disable	= do_nothing,
>-	.ack		= do_nothing,
>-	.end		= end_msi_irq_wo_maskbit,
>+	.end		= end_msi_irq,
> 	.set_affinity	= set_msi_affinity
> };
> 
>@@ -431,12 +418,8 @@ static void irq_handler_init(int cap_id,
> 	spin_lock_irqsave(&irq_desc[pos].lock, flags);
> 	if (cap_id == PCI_CAP_ID_MSIX)
> 		irq_desc[pos].chip = &msix_irq_type;
>-	else {
>-		if (!mask)
>-			irq_desc[pos].chip = &msi_irq_wo_maskbit_type;
>-		else
>-			irq_desc[pos].chip = &msi_irq_w_maskbit_type;
>-	}
>+	else
>+		irq_desc[pos].chip = &msi_irq_type;
> 	spin_unlock_irqrestore(&irq_desc[pos].lock, flags);
> }
>

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Attachments on bug 432451: 294621 | 301970