Login
[x]
Log in using an account from:
Fedora Account System
Red Hat Associate
Red Hat Customer
Or login using a Red Hat Bugzilla account
Forgot Password
Login:
Hide Forgot
Create an Account
Red Hat Bugzilla – Attachment 297765 Details for
Bug 428801
[Areca 4.7 feat] Update the arcmsr driver to 1.20.00.15.RH
[?]
New
Simple Search
Advanced Search
My Links
Browse
Requests
Reports
Current State
Search
Tabular reports
Graphical reports
Duplicates
Other Reports
User Changes
Plotly Reports
Bug Status
Bug Severity
Non-Defaults
|
Product Dashboard
Help
Page Help!
Bug Writing Guidelines
What's new
Browser Support Policy
5.0.4.rh83 Release notes
FAQ
Guides index
User guide
Web Services
Contact
Legal
This site requires JavaScript to be enabled to function correctly, please enable it.
[patch]
new version
bz.patch (text/plain), 155.05 KB, created by
Tomas Henzl
on 2008-03-12 14:01:38 UTC
(
hide
)
Description:
new version
Filename:
MIME Type:
Creator:
Tomas Henzl
Created:
2008-03-12 14:01:38 UTC
Size:
155.05 KB
patch
obsolete
>diff -Naurp linux-2.6.9/Documentation/scsi/arcmsr_spec.txt linux-2.6.9n/Documentation/scsi/arcmsr_spec.txt >--- linux-2.6.9/Documentation/scsi/arcmsr_spec.txt 1970-01-01 01:00:00.000000000 +0100 >+++ linux-2.6.9n/Documentation/scsi/arcmsr_spec.txt 2008-03-05 05:33:54.000000000 +0100 >@@ -0,0 +1,574 @@ >+******************************************************************************* >+** ARECA FIRMWARE SPEC >+******************************************************************************* >+** Usage of IOP331 adapter >+** (All In/Out is in IOP331's view) >+** 1. Message 0 --> InitThread message and return code >+** 2. Doorbell is used for RS-232 emulation >+** inDoorBell : bit0 -- data in ready >+** (DRIVER DATA WRITE OK) >+** bit1 -- data out has been read >+** (DRIVER DATA READ OK) >+** outDooeBell: bit0 -- data out ready >+** (IOP331 DATA WRITE OK) >+** bit1 -- data in has been read >+** (IOP331 DATA READ OK) >+** 3. Index Memory Usage >+** offset 0xf00 : for RS232 out (request buffer) >+** offset 0xe00 : for RS232 in (scratch buffer) >+** offset 0xa00 : for inbound message code message_rwbuffer >+** (driver send to IOP331) >+** offset 0xa00 : for outbound message code message_rwbuffer >+** (IOP331 send to driver) >+** 4. RS-232 emulation >+** Currently 128 byte buffer is used >+** 1st uint32_t : Data length (1--124) >+** Byte 4--127 : Max 124 bytes of data >+** 5. PostQ >+** All SCSI Command must be sent through postQ: >+** (inbound queue port) Request frame must be 32 bytes aligned >+** #bit27--bit31 => flag for post ccb >+** #bit0--bit26 => real address (bit27--bit31) of post arcmsr_cdb >+** bit31 : >+** 0 : 256 bytes frame >+** 1 : 512 bytes frame >+** bit30 : >+** 0 : normal request >+** 1 : BIOS request >+** bit29 : reserved >+** bit28 : reserved >+** bit27 : reserved >+** --------------------------------------------------------------------------- >+** (outbount queue port) Request reply >+** #bit27--bit31 >+** => flag for reply >+** #bit0--bit26 >+** => real address (bit27--bit31) of reply arcmsr_cdb >+** bit31 : must be 0 (for this type of reply) >+** bit30 : reserved for BIOS handshake >+** bit29 : reserved >+** bit28 : >+** 0 : no error, ignore AdapStatus/DevStatus/SenseData >+** 1 : Error, error code in AdapStatus/DevStatus/SenseData >+** bit27 : reserved >+** 6. BIOS request >+** All BIOS request is the same with request from PostQ >+** Except : >+** Request frame is sent from configuration space >+** offset: 0x78 : Request Frame (bit30 == 1) >+** offset: 0x18 : writeonly to generate >+** IRQ to IOP331 >+** Completion of request: >+** (bit30 == 0, bit28==err flag) >+** 7. Definition of SGL entry (structure) >+** 8. Message1 Out - Diag Status Code (????) >+** 9. Message0 message code : >+** 0x00 : NOP >+** 0x01 : Get Config >+** ->offset 0xa00 :for outbound message code message_rwbuffer >+** (IOP331 send to driver) >+** Signature 0x87974060(4) >+** Request len 0x00000200(4) >+** numbers of queue 0x00000100(4) >+** SDRAM Size 0x00000100(4)-->256 MB >+** IDE Channels 0x00000008(4) >+** vendor 40 bytes char >+** model 8 bytes char >+** FirmVer 16 bytes char >+** Device Map 16 bytes char >+** FirmwareVersion DWORD <== Added for checking of >+** new firmware capability >+** 0x02 : Set Config >+** ->offset 0xa00 :for inbound message code message_rwbuffer >+** (driver send to IOP331) >+** Signature 0x87974063(4) >+** UPPER32 of Request Frame (4)-->Driver Only >+** 0x03 : Reset (Abort all queued Command) >+** 0x04 : Stop Background Activity >+** 0x05 : Flush Cache >+** 0x06 : Start Background Activity >+** (re-start if background is halted) >+** 0x07 : Check If Host Command Pending >+** (Novell May Need This Function) >+** 0x08 : Set controller time >+** ->offset 0xa00 : for inbound message code message_rwbuffer >+** (driver to IOP331) >+** byte 0 : 0xaa <-- signature >+** byte 1 : 0x55 <-- signature >+** byte 2 : year (04) >+** byte 3 : month (1..12) >+** byte 4 : date (1..31) >+** byte 5 : hour (0..23) >+** byte 6 : minute (0..59) >+** byte 7 : second (0..59) >+******************************************************************************* >+******************************************************************************* >+** RS-232 Interface for Areca Raid Controller >+** The low level command interface is exclusive with VT100 terminal >+** -------------------------------------------------------------------- >+** 1. Sequence of command execution >+** -------------------------------------------------------------------- >+** (A) Header : 3 bytes sequence (0x5E, 0x01, 0x61) >+** (B) Command block : variable length of data including length, >+** command code, data and checksum byte >+** (C) Return data : variable length of data >+** -------------------------------------------------------------------- >+** 2. Command block >+** -------------------------------------------------------------------- >+** (A) 1st byte : command block length (low byte) >+** (B) 2nd byte : command block length (high byte) >+** note ..command block length shouldn't > 2040 bytes, >+** length excludes these two bytes >+** (C) 3rd byte : command code >+** (D) 4th and following bytes : variable length data bytes >+** depends on command code >+** (E) last byte : checksum byte (sum of 1st byte until last data byte) >+** -------------------------------------------------------------------- >+** 3. Command code and associated data >+** -------------------------------------------------------------------- >+** The following are command code defined in raid controller Command >+** code 0x10--0x1? are used for system level management, >+** no password checking is needed and should be implemented in separate >+** well controlled utility and not for end user access. >+** Command code 0x20--0x?? always check the password, >+** password must be entered to enable these command. >+** enum >+** { >+** GUI_SET_SERIAL=0x10, >+** GUI_SET_VENDOR, >+** GUI_SET_MODEL, >+** GUI_IDENTIFY, >+** GUI_CHECK_PASSWORD, >+** GUI_LOGOUT, >+** GUI_HTTP, >+** GUI_SET_ETHERNET_ADDR, >+** GUI_SET_LOGO, >+** GUI_POLL_EVENT, >+** GUI_GET_EVENT, >+** GUI_GET_HW_MONITOR, >+** // GUI_QUICK_CREATE=0x20, (function removed) >+** GUI_GET_INFO_R=0x20, >+** GUI_GET_INFO_V, >+** GUI_GET_INFO_P, >+** GUI_GET_INFO_S, >+** GUI_CLEAR_EVENT, >+** GUI_MUTE_BEEPER=0x30, >+** GUI_BEEPER_SETTING, >+** GUI_SET_PASSWORD, >+** GUI_HOST_INTERFACE_MODE, >+** GUI_REBUILD_PRIORITY, >+** GUI_MAX_ATA_MODE, >+** GUI_RESET_CONTROLLER, >+** GUI_COM_PORT_SETTING, >+** GUI_NO_OPERATION, >+** GUI_DHCP_IP, >+** GUI_CREATE_PASS_THROUGH=0x40, >+** GUI_MODIFY_PASS_THROUGH, >+** GUI_DELETE_PASS_THROUGH, >+** GUI_IDENTIFY_DEVICE, >+** GUI_CREATE_RAIDSET=0x50, >+** GUI_DELETE_RAIDSET, >+** GUI_EXPAND_RAIDSET, >+** GUI_ACTIVATE_RAIDSET, >+** GUI_CREATE_HOT_SPARE, >+** GUI_DELETE_HOT_SPARE, >+** GUI_CREATE_VOLUME=0x60, >+** GUI_MODIFY_VOLUME, >+** GUI_DELETE_VOLUME, >+** GUI_START_CHECK_VOLUME, >+** GUI_STOP_CHECK_VOLUME >+** }; >+** Command description : >+** GUI_SET_SERIAL : Set the controller serial# >+** byte 0,1 : length >+** byte 2 : command code 0x10 >+** byte 3 : password length (should be 0x0f) >+** byte 4-0x13 : should be "ArEcATecHnoLogY" >+** byte 0x14--0x23 : Serial number string (must be 16 bytes) >+** GUI_SET_VENDOR : Set vendor string for the controller >+** byte 0,1 : length >+** byte 2 : command code 0x11 >+** byte 3 : password length (should be 0x08) >+** byte 4-0x13 : should be "ArEcAvAr" >+** byte 0x14--0x3B : vendor string (must be 40 bytes) >+** GUI_SET_MODEL : Set the model name of the controller >+** byte 0,1 : length >+** byte 2 : command code 0x12 >+** byte 3 : password length (should be 0x08) >+** byte 4-0x13 : should be "ArEcAvAr" >+** byte 0x14--0x1B : model string (must be 8 bytes) >+** GUI_IDENTIFY : Identify device >+** byte 0,1 : length >+** byte 2 : command code 0x13 >+** return "Areca RAID Subsystem " >+** GUI_CHECK_PASSWORD : Verify password >+** byte 0,1 : length >+** byte 2 : command code 0x14 >+** byte 3 : password length >+** byte 4-0x?? : user password to be checked >+** GUI_LOGOUT : Logout GUI (force password checking on next command) >+** byte 0,1 : length >+** byte 2 : command code 0x15 >+** GUI_HTTP : HTTP interface (reserved for Http proxy service)(0x16) >+** >+** GUI_SET_ETHERNET_ADDR : Set the ethernet MAC address >+** byte 0,1 : length >+** byte 2 : command code 0x17 >+** byte 3 : password length (should be 0x08) >+** byte 4-0x13 : should be "ArEcAvAr" >+** byte 0x14--0x19 : Ethernet MAC address (must be 6 bytes) >+** GUI_SET_LOGO : Set logo in HTTP >+** byte 0,1 : length >+** byte 2 : command code 0x18 >+** byte 3 : Page# (0/1/2/3) (0xff --> clear OEM logo) >+** byte 4/5/6/7 : 0x55/0xaa/0xa5/0x5a >+** byte 8 : TITLE.JPG data (each page must be 2000 bytes) >+** note page0 1st 2 byte must be >+** actual length of the JPG file >+** GUI_POLL_EVENT : Poll If Event Log Changed >+** byte 0,1 : length >+** byte 2 : command code 0x19 >+** GUI_GET_EVENT : Read Event >+** byte 0,1 : length >+** byte 2 : command code 0x1a >+** byte 3 : Event Page (0:1st page/1/2/3:last page) >+** GUI_GET_HW_MONITOR : Get HW monitor data >+** byte 0,1 : length >+** byte 2 : command code 0x1b >+** byte 3 : # of FANs(example 2) >+** byte 4 : # of Voltage sensor(example 3) >+** byte 5 : # of temperature sensor(example 2) >+** byte 6 : # of power >+** byte 7/8 : Fan#0 (RPM) >+** byte 9/10 : Fan#1 >+** byte 11/12 : Voltage#0 original value in *1000 >+** byte 13/14 : Voltage#0 value >+** byte 15/16 : Voltage#1 org >+** byte 17/18 : Voltage#1 >+** byte 19/20 : Voltage#2 org >+** byte 21/22 : Voltage#2 >+** byte 23 : Temp#0 >+** byte 24 : Temp#1 >+** byte 25 : Power indicator (bit0 : power#0, >+** bit1 : power#1) >+** byte 26 : UPS indicator >+** GUI_QUICK_CREATE : Quick create raid/volume set >+** byte 0,1 : length >+** byte 2 : command code 0x20 >+** byte 3/4/5/6 : raw capacity >+** byte 7 : raid level >+** byte 8 : stripe size >+** byte 9 : spare >+** byte 10/11/12/13: device mask (the devices to create raid/volume) >+** This function is removed, application like >+** to implement quick create function >+** need to use GUI_CREATE_RAIDSET and GUI_CREATE_VOLUMESET function. >+** GUI_GET_INFO_R : Get Raid Set Information >+** byte 0,1 : length >+** byte 2 : command code 0x20 >+** byte 3 : raidset# >+** typedef struct sGUI_RAIDSET >+** { >+** BYTE grsRaidSetName[16]; >+** DWORD grsCapacity; >+** DWORD grsCapacityX; >+** DWORD grsFailMask; >+** BYTE grsDevArray[32]; >+** BYTE grsMemberDevices; >+** BYTE grsNewMemberDevices; >+** BYTE grsRaidState; >+** BYTE grsVolumes; >+** BYTE grsVolumeList[16]; >+** BYTE grsRes1; >+** BYTE grsRes2; >+** BYTE grsRes3; >+** BYTE grsFreeSegments; >+** DWORD grsRawStripes[8]; >+** DWORD grsRes4; >+** DWORD grsRes5; // Total to 128 bytes >+** DWORD grsRes6; // Total to 128 bytes >+** } sGUI_RAIDSET, *pGUI_RAIDSET; >+** GUI_GET_INFO_V : Get Volume Set Information >+** byte 0,1 : length >+** byte 2 : command code 0x21 >+** byte 3 : volumeset# >+** typedef struct sGUI_VOLUMESET >+** { >+** BYTE gvsVolumeName[16]; // 16 >+** DWORD gvsCapacity; >+** DWORD gvsCapacityX; >+** DWORD gvsFailMask; >+** DWORD gvsStripeSize; >+** DWORD gvsNewFailMask; >+** DWORD gvsNewStripeSize; >+** DWORD gvsVolumeStatus; >+** DWORD gvsProgress; // 32 >+** sSCSI_ATTR gvsScsi; >+** BYTE gvsMemberDisks; >+** BYTE gvsRaidLevel; // 8 >+** BYTE gvsNewMemberDisks; >+** BYTE gvsNewRaidLevel; >+** BYTE gvsRaidSetNumber; >+** BYTE gvsRes0; // 4 >+** BYTE gvsRes1[4]; // 64 bytes >+** } sGUI_VOLUMESET, *pGUI_VOLUMESET; >+** GUI_GET_INFO_P : Get Physical Drive Information >+** byte 0,1 : length >+** byte 2 : command code 0x22 >+** byte 3 : drive # (from 0 to max-channels - 1) >+** typedef struct sGUI_PHY_DRV >+** { >+** BYTE gpdModelName[40]; >+** BYTE gpdSerialNumber[20]; >+** BYTE gpdFirmRev[8]; >+** DWORD gpdCapacity; >+** DWORD gpdCapacityX; // Reserved for expansion >+** BYTE gpdDeviceState; >+** BYTE gpdPioMode; >+** BYTE gpdCurrentUdmaMode; >+** BYTE gpdUdmaMode; >+** BYTE gpdDriveSelect; >+** BYTE gpdRaidNumber; // 0xff if not belongs to a raid set >+** sSCSI_ATTR gpdScsi; >+** BYTE gpdReserved[40]; // Total to 128 bytes >+** } sGUI_PHY_DRV, *pGUI_PHY_DRV; >+** GUI_GET_INFO_S : Get System Information >+** byte 0,1 : length >+** byte 2 : command code 0x23 >+** typedef struct sCOM_ATTR >+** { >+** BYTE comBaudRate; >+** BYTE comDataBits; >+** BYTE comStopBits; >+** BYTE comParity; >+** BYTE comFlowControl; >+** } sCOM_ATTR, *pCOM_ATTR; >+** typedef struct sSYSTEM_INFO >+** { >+** BYTE gsiVendorName[40]; >+** BYTE gsiSerialNumber[16]; >+** BYTE gsiFirmVersion[16]; >+** BYTE gsiBootVersion[16]; >+** BYTE gsiMbVersion[16]; >+** BYTE gsiModelName[8]; >+** BYTE gsiLocalIp[4]; >+** BYTE gsiCurrentIp[4]; >+** DWORD gsiTimeTick; >+** DWORD gsiCpuSpeed; >+** DWORD gsiICache; >+** DWORD gsiDCache; >+** DWORD gsiScache; >+** DWORD gsiMemorySize; >+** DWORD gsiMemorySpeed; >+** DWORD gsiEvents; >+** BYTE gsiMacAddress[6]; >+** BYTE gsiDhcp; >+** BYTE gsiBeeper; >+** BYTE gsiChannelUsage; >+** BYTE gsiMaxAtaMode; >+** BYTE gsiSdramEcc; // 1:if ECC enabled >+** BYTE gsiRebuildPriority; >+** sCOM_ATTR gsiComA; // 5 bytes >+** sCOM_ATTR gsiComB; // 5 bytes >+** BYTE gsiIdeChannels; >+** BYTE gsiScsiHostChannels; >+** BYTE gsiIdeHostChannels; >+** BYTE gsiMaxVolumeSet; >+** BYTE gsiMaxRaidSet; >+** BYTE gsiEtherPort; // 1:if ether net port supported >+** BYTE gsiRaid6Engine; // 1:Raid6 engine supported >+** BYTE gsiRes[75]; >+** } sSYSTEM_INFO, *pSYSTEM_INFO; >+** GUI_CLEAR_EVENT : Clear System Event >+** byte 0,1 : length >+** byte 2 : command code 0x24 >+** GUI_MUTE_BEEPER : Mute current beeper >+** byte 0,1 : length >+** byte 2 : command code 0x30 >+** GUI_BEEPER_SETTING : Disable beeper >+** byte 0,1 : length >+** byte 2 : command code 0x31 >+** byte 3 : 0->disable, 1->enable >+** GUI_SET_PASSWORD : Change password >+** byte 0,1 : length >+** byte 2 : command code 0x32 >+** byte 3 : pass word length ( must <= 15 ) >+** byte 4 : password (must be alpha-numerical) >+** GUI_HOST_INTERFACE_MODE : Set host interface mode >+** byte 0,1 : length >+** byte 2 : command code 0x33 >+** byte 3 : 0->Independent, 1->cluster >+** GUI_REBUILD_PRIORITY : Set rebuild priority >+** byte 0,1 : length >+** byte 2 : command code 0x34 >+** byte 3 : 0/1/2/3 (low->high) >+** GUI_MAX_ATA_MODE : Set maximum ATA mode to be used >+** byte 0,1 : length >+** byte 2 : command code 0x35 >+** byte 3 : 0/1/2/3 (133/100/66/33) >+** GUI_RESET_CONTROLLER : Reset Controller >+** byte 0,1 : length >+** byte 2 : command code 0x36 >+** *Response with VT100 screen (discard it) >+** GUI_COM_PORT_SETTING : COM port setting >+** byte 0,1 : length >+** byte 2 : command code 0x37 >+** byte 3 : 0->COMA (term port), >+** 1->COMB (debug port) >+** byte 4 : 0/1/2/3/4/5/6/7 >+** (1200/2400/4800/9600/19200/38400/57600/115200) >+** byte 5 : data bit >+** (0:7 bit, 1:8 bit : must be 8 bit) >+** byte 6 : stop bit (0:1, 1:2 stop bits) >+** byte 7 : parity (0:none, 1:off, 2:even) >+** byte 8 : flow control >+** (0:none, 1:xon/xoff, 2:hardware => must use none) >+** GUI_NO_OPERATION : No operation >+** byte 0,1 : length >+** byte 2 : command code 0x38 >+** GUI_DHCP_IP : Set DHCP option and local IP address >+** byte 0,1 : length >+** byte 2 : command code 0x39 >+** byte 3 : 0:dhcp disabled, 1:dhcp enabled >+** byte 4/5/6/7 : IP address >+** GUI_CREATE_PASS_THROUGH : Create pass through disk >+** byte 0,1 : length >+** byte 2 : command code 0x40 >+** byte 3 : device # >+** byte 4 : scsi channel (0/1) >+** byte 5 : scsi id (0-->15) >+** byte 6 : scsi lun (0-->7) >+** byte 7 : tagged queue (1 : enabled) >+** byte 8 : cache mode (1 : enabled) >+** byte 9 : max speed (0/1/2/3/4, >+** async/20/40/80/160 for scsi) >+** (0/1/2/3/4, 33/66/100/133/150 for ide ) >+** GUI_MODIFY_PASS_THROUGH : Modify pass through disk >+** byte 0,1 : length >+** byte 2 : command code 0x41 >+** byte 3 : device # >+** byte 4 : scsi channel (0/1) >+** byte 5 : scsi id (0-->15) >+** byte 6 : scsi lun (0-->7) >+** byte 7 : tagged queue (1 : enabled) >+** byte 8 : cache mode (1 : enabled) >+** byte 9 : max speed (0/1/2/3/4, >+** async/20/40/80/160 for scsi) >+** (0/1/2/3/4, 33/66/100/133/150 for ide ) >+** GUI_DELETE_PASS_THROUGH : Delete pass through disk >+** byte 0,1 : length >+** byte 2 : command code 0x42 >+** byte 3 : device# to be deleted >+** GUI_IDENTIFY_DEVICE : Identify Device >+** byte 0,1 : length >+** byte 2 : command code 0x43 >+** byte 3 : Flash Method >+** (0:flash selected, 1:flash not selected) >+** byte 4/5/6/7 : IDE device mask to be flashed >+** note .... no response data available >+** GUI_CREATE_RAIDSET : Create Raid Set >+** byte 0,1 : length >+** byte 2 : command code 0x50 >+** byte 3/4/5/6 : device mask >+** byte 7-22 : raidset name (if byte 7 == 0:use default) >+** GUI_DELETE_RAIDSET : Delete Raid Set >+** byte 0,1 : length >+** byte 2 : command code 0x51 >+** byte 3 : raidset# >+** GUI_EXPAND_RAIDSET : Expand Raid Set >+** byte 0,1 : length >+** byte 2 : command code 0x52 >+** byte 3 : raidset# >+** byte 4/5/6/7 : device mask for expansion >+** byte 8/9/10 : (8:0 no change, 1 change, 0xff:terminate, >+** 9:new raid level, >+** 10:new stripe size >+** 0/1/2/3/4/5->4/8/16/32/64/128K ) >+** byte 11/12/13 : repeat for each volume in the raidset >+** GUI_ACTIVATE_RAIDSET : Activate incomplete raid set >+** byte 0,1 : length >+** byte 2 : command code 0x53 >+** byte 3 : raidset# >+** GUI_CREATE_HOT_SPARE : Create hot spare disk >+** byte 0,1 : length >+** byte 2 : command code 0x54 >+** byte 3/4/5/6 : device mask for hot spare creation >+** GUI_DELETE_HOT_SPARE : Delete hot spare disk >+** byte 0,1 : length >+** byte 2 : command code 0x55 >+** byte 3/4/5/6 : device mask for hot spare deletion >+** GUI_CREATE_VOLUME : Create volume set >+** byte 0,1 : length >+** byte 2 : command code 0x60 >+** byte 3 : raidset# >+** byte 4-19 : volume set name >+** (if byte4 == 0, use default) >+** byte 20-27 : volume capacity (blocks) >+** byte 28 : raid level >+** byte 29 : stripe size >+** (0/1/2/3/4/5->4/8/16/32/64/128K) >+** byte 30 : channel >+** byte 31 : ID >+** byte 32 : LUN >+** byte 33 : 1 enable tag >+** byte 34 : 1 enable cache >+** byte 35 : speed >+** (0/1/2/3/4->async/20/40/80/160 for scsi) >+** (0/1/2/3/4->33/66/100/133/150 for IDE ) >+** byte 36 : 1 to select quick init >+** >+** GUI_MODIFY_VOLUME : Modify volume Set >+** byte 0,1 : length >+** byte 2 : command code 0x61 >+** byte 3 : volumeset# >+** byte 4-19 : new volume set name >+** (if byte4 == 0, not change) >+** byte 20-27 : new volume capacity (reserved) >+** byte 28 : new raid level >+** byte 29 : new stripe size >+** (0/1/2/3/4/5->4/8/16/32/64/128K) >+** byte 30 : new channel >+** byte 31 : new ID >+** byte 32 : new LUN >+** byte 33 : 1 enable tag >+** byte 34 : 1 enable cache >+** byte 35 : speed >+** (0/1/2/3/4->async/20/40/80/160 for scsi) >+** (0/1/2/3/4->33/66/100/133/150 for IDE ) >+** GUI_DELETE_VOLUME : Delete volume set >+** byte 0,1 : length >+** byte 2 : command code 0x62 >+** byte 3 : volumeset# >+** GUI_START_CHECK_VOLUME : Start volume consistency check >+** byte 0,1 : length >+** byte 2 : command code 0x63 >+** byte 3 : volumeset# >+** GUI_STOP_CHECK_VOLUME : Stop volume consistency check >+** byte 0,1 : length >+** byte 2 : command code 0x64 >+** --------------------------------------------------------------------- >+** 4. Returned data >+** --------------------------------------------------------------------- >+** (A) Header : 3 bytes sequence (0x5E, 0x01, 0x61) >+** (B) Length : 2 bytes >+** (low byte 1st, excludes length and checksum byte) >+** (C) status or data : >+** <1> If length == 1 ==> 1 byte status code >+** #define GUI_OK 0x41 >+** #define GUI_RAIDSET_NOT_NORMAL 0x42 >+** #define GUI_VOLUMESET_NOT_NORMAL 0x43 >+** #define GUI_NO_RAIDSET 0x44 >+** #define GUI_NO_VOLUMESET 0x45 >+** #define GUI_NO_PHYSICAL_DRIVE 0x46 >+** #define GUI_PARAMETER_ERROR 0x47 >+** #define GUI_UNSUPPORTED_COMMAND 0x48 >+** #define GUI_DISK_CONFIG_CHANGED 0x49 >+** #define GUI_INVALID_PASSWORD 0x4a >+** #define GUI_NO_DISK_SPACE 0x4b >+** #define GUI_CHECKSUM_ERROR 0x4c >+** #define GUI_PASSWORD_REQUIRED 0x4d >+** <2> If length > 1 ==> >+** data block returned from controller >+** and the contents depends on the command code >+** (E) Checksum : checksum of length and status or data byte >+************************************************************************** >diff -Naurp linux-2.6.9/drivers/scsi/arcmsr/arcmsr_attr.c linux-2.6.9n/drivers/scsi/arcmsr/arcmsr_attr.c >--- linux-2.6.9/drivers/scsi/arcmsr/arcmsr_attr.c 2008-02-15 15:16:02.000000000 +0100 >+++ linux-2.6.9n/drivers/scsi/arcmsr/arcmsr_attr.c 2008-03-06 17:44:33.000000000 +0100 >@@ -8,7 +8,7 @@ > ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved > ** > ** Web site: www.areca.com.tw >-** E-mail: erich@areca.com.tw >+** E-mail: support@areca.com.tw > ** > ** This program is free software; you can redistribute it and/or modify > ** it under the terms of the GNU General Public License version 2 as >@@ -40,6 +40,8 @@ > ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF > ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. > ******************************************************************************* >+** For history of changes, see Documentation/scsi/ChangeLog.arcmsr >+** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt > ******************************************************************************* > */ > #include <linux/module.h> >@@ -57,14 +59,13 @@ > > struct class_device_attribute *arcmsr_host_attrs[]; > >-static ssize_t >-arcmsr_sysfs_iop_message_read(struct kobject *kobj, char *buf, loff_t off, >- size_t count) >+static ssize_t arcmsr_sysfs_iop_message_read(struct kobject *kobj, >+ char *buf, loff_t off, >+ size_t count) > { > struct class_device *cdev = container_of(kobj,struct class_device,kobj); > struct Scsi_Host *host = class_to_shost(cdev); > struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; >- struct MessageUnit __iomem *reg = acb->pmu; > uint8_t *pQbuffer,*ptmpQbuffer; > int32_t allxfer_len = 0; > >@@ -83,12 +84,13 @@ arcmsr_sysfs_iop_message_read(struct kob > allxfer_len++; > } > if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >- struct QBUFFER __iomem * prbuffer = (struct QBUFFER __iomem *) >- ®->message_rbuffer; >- uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data; >+ struct QBUFFER __iomem *prbuffer; >+ uint8_t __iomem *iop_data; > int32_t iop_len; > > acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >+ prbuffer = arcmsr_get_iop_rqbuffer(acb); >+ iop_data = prbuffer->data; > iop_len = readl(&prbuffer->data_len); > while (iop_len > 0) { > acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); >@@ -97,15 +99,14 @@ arcmsr_sysfs_iop_message_read(struct kob > iop_data++; > iop_len--; > } >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, >- ®->inbound_doorbell); >+ arcmsr_iop_message_read(acb); > } > return (allxfer_len); > } > >-static ssize_t >-arcmsr_sysfs_iop_message_write(struct kobject *kobj, char *buf, loff_t off, >- size_t count) >+static ssize_t arcmsr_sysfs_iop_message_write(struct kobject *kobj, >+ char *buf, loff_t off, >+ size_t count) > { > struct class_device *cdev = container_of(kobj,struct class_device,kobj); > struct Scsi_Host *host = class_to_shost(cdev); >@@ -123,7 +124,7 @@ arcmsr_sysfs_iop_message_write(struct ko > wqbuf_lastindex = acb->wqbuf_lastindex; > wqbuf_firstindex = acb->wqbuf_firstindex; > if (wqbuf_lastindex != wqbuf_firstindex) { >- arcmsr_post_Qbuffer(acb); >+ arcmsr_post_ioctldata2iop(acb); > return 0; /*need retry*/ > } else { > my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) >@@ -141,7 +142,7 @@ arcmsr_sysfs_iop_message_write(struct ko > if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { > acb->acb_flags &= > ~ACB_F_MESSAGE_WQBUFFER_CLEARED; >- arcmsr_post_Qbuffer(acb); >+ arcmsr_post_ioctldata2iop(acb); > } > return count; > } else { >@@ -150,14 +151,13 @@ arcmsr_sysfs_iop_message_write(struct ko > } > } > >-static ssize_t >-arcmsr_sysfs_iop_message_clear(struct kobject *kobj, char *buf, loff_t off, >- size_t count) >+static ssize_t arcmsr_sysfs_iop_message_clear(struct kobject *kobj, >+ char *buf, loff_t off, >+ size_t count) > { > struct class_device *cdev = container_of(kobj,struct class_device,kobj); > struct Scsi_Host *host = class_to_shost(cdev); > struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; >- struct MessageUnit __iomem *reg = acb->pmu; > uint8_t *pQbuffer; > > if (!capable(CAP_SYS_ADMIN)) >@@ -165,8 +165,7 @@ arcmsr_sysfs_iop_message_clear(struct ko > > if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { > acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK >- , ®->inbound_doorbell); >+ arcmsr_iop_message_read(acb); > } > acb->acb_flags |= > (ACB_F_MESSAGE_WQBUFFER_CLEARED >diff -Naurp linux-2.6.9/drivers/scsi/arcmsr/arcmsr.h linux-2.6.9n/drivers/scsi/arcmsr/arcmsr.h >--- linux-2.6.9/drivers/scsi/arcmsr/arcmsr.h 2008-02-15 15:16:02.000000000 +0100 >+++ linux-2.6.9n/drivers/scsi/arcmsr/arcmsr.h 2008-03-06 17:05:47.000000000 +0100 >@@ -9,7 +9,7 @@ > ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved. > ** > ** Web site: www.areca.com.tw >-** E-mail: erich@areca.com.tw >+** E-mail: support@areca.com.tw > ** > ** This program is free software; you can redistribute it and/or modify > ** it under the terms of the GNU General Public License version 2 as >@@ -40,596 +40,31 @@ > ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > **(INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF > ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. >-******************************************************************************** >-** ARECA FIRMWARE SPEC >-******************************************************************************** >-** Usage of IOP331 adapter >-** (All In/Out is in IOP331's view) >-** 1. Message 0 --> InitThread message and retrun code >-** 2. Doorbell is used for RS-232 emulation >-** inDoorBell : bit0 -- data in ready >-** (DRIVER DATA WRITE OK) >-** bit1 -- data out has been read >-** (DRIVER DATA READ OK) >-** outDooeBell: bit0 -- data out ready >-** (IOP331 DATA WRITE OK) >-** bit1 -- data in has been read >-** (IOP331 DATA READ OK) >-** 3. Index Memory Usage >-** offset 0xf00 : for RS232 out (request buffer) >-** offset 0xe00 : for RS232 in (scratch buffer) >-** offset 0xa00 : for inbound message code message_rwbuffer >-** (driver send to IOP331) >-** offset 0xa00 : for outbound message code message_rwbuffer >-** (IOP331 send to driver) >-** 4. RS-232 emulation >-** Currently 128 byte buffer is used >-** 1st uint32_t : Data length (1--124) >-** Byte 4--127 : Max 124 bytes of data >-** 5. PostQ >-** All SCSI Command must be sent through postQ: >-** (inbound queue port) Request frame must be 32 bytes aligned >-** #bit27--bit31 => flag for post ccb >-** #bit0--bit26 => real address (bit27--bit31) of post arcmsr_cdb >-** bit31 : >-** 0 : 256 bytes frame >-** 1 : 512 bytes frame >-** bit30 : >-** 0 : normal request >-** 1 : BIOS request >-** bit29 : reserved >-** bit28 : reserved >-** bit27 : reserved >-** --------------------------------------------------------------------------- >-** (outbount queue port) Request reply >-** #bit27--bit31 >-** => flag for reply >-** #bit0--bit26 >-** => real address (bit27--bit31) of reply arcmsr_cdb >-** bit31 : must be 0 (for this type of reply) >-** bit30 : reserved for BIOS handshake >-** bit29 : reserved >-** bit28 : >-** 0 : no error, ignore AdapStatus/DevStatus/SenseData >-** 1 : Error, error code in AdapStatus/DevStatus/SenseData >-** bit27 : reserved >-** 6. BIOS request >-** All BIOS request is the same with request from PostQ >-** Except : >-** Request frame is sent from configuration space >-** offset: 0x78 : Request Frame (bit30 == 1) >-** offset: 0x18 : writeonly to generate >-** IRQ to IOP331 >-** Completion of request: >-** (bit30 == 0, bit28==err flag) >-** 7. Definition of SGL entry (structure) >-** 8. Message1 Out - Diag Status Code (????) >-** 9. Message0 message code : >-** 0x00 : NOP >-** 0x01 : Get Config >-** ->offset 0xa00 :for outbound message code message_rwbuffer >-** (IOP331 send to driver) >-** Signature 0x87974060(4) >-** Request len 0x00000200(4) >-** numbers of queue 0x00000100(4) >-** SDRAM Size 0x00000100(4)-->256 MB >-** IDE Channels 0x00000008(4) >-** vendor 40 bytes char >-** model 8 bytes char >-** FirmVer 16 bytes char >-** Device Map 16 bytes char >-** FirmwareVersion DWORD <== Added for checking of >-** new firmware capability >-** 0x02 : Set Config >-** ->offset 0xa00 :for inbound message code message_rwbuffer >-** (driver send to IOP331) >-** Signature 0x87974063(4) >-** UPPER32 of Request Frame (4)-->Driver Only >-** 0x03 : Reset (Abort all queued Command) >-** 0x04 : Stop Background Activity >-** 0x05 : Flush Cache >-** 0x06 : Start Background Activity >-** (re-start if background is halted) >-** 0x07 : Check If Host Command Pending >-** (Novell May Need This Function) >-** 0x08 : Set controller time >-** ->offset 0xa00 : for inbound message code message_rwbuffer >-** (driver to IOP331) >-** byte 0 : 0xaa <-- signature >-** byte 1 : 0x55 <-- signature >-** byte 2 : year (04) >-** byte 3 : month (1..12) >-** byte 4 : date (1..31) >-** byte 5 : hour (0..23) >-** byte 6 : minute (0..59) >-** byte 7 : second (0..59) >-******************************************************************************* >-******************************************************************************* >-** RS-232 Interface for Areca Raid Controller >-** The low level command interface is exclusive with VT100 terminal >-** -------------------------------------------------------------------- >-** 1. Sequence of command execution >-** -------------------------------------------------------------------- >-** (A) Header : 3 bytes sequence (0x5E, 0x01, 0x61) >-** (B) Command block : variable length of data including length, >-** command code, data and checksum byte >-** (C) Return data : variable length of data >-** -------------------------------------------------------------------- >-** 2. Command block >-** -------------------------------------------------------------------- >-** (A) 1st byte : command block length (low byte) >-** (B) 2nd byte : command block length (high byte) >-** note ..command block length shouldn't > 2040 bytes, >-** length excludes these two bytes >-** (C) 3rd byte : command code >-** (D) 4th and following bytes : variable length data bytes >-** depends on command code >-** (E) last byte : checksum byte (sum of 1st byte until last data byte) >-** -------------------------------------------------------------------- >-** 3. Command code and associated data >-** -------------------------------------------------------------------- >-** The following are command code defined in raid controller Command >-** code 0x10--0x1? are used for system level management, >-** no password checking is needed and should be implemented in separate >-** well controlled utility and not for end user access. >-** Command code 0x20--0x?? always check the password, >-** password must be entered to enable these command. >-** enum >-** { >-** GUI_SET_SERIAL=0x10, >-** GUI_SET_VENDOR, >-** GUI_SET_MODEL, >-** GUI_IDENTIFY, >-** GUI_CHECK_PASSWORD, >-** GUI_LOGOUT, >-** GUI_HTTP, >-** GUI_SET_ETHERNET_ADDR, >-** GUI_SET_LOGO, >-** GUI_POLL_EVENT, >-** GUI_GET_EVENT, >-** GUI_GET_HW_MONITOR, >-** // GUI_QUICK_CREATE=0x20, (function removed) >-** GUI_GET_INFO_R=0x20, >-** GUI_GET_INFO_V, >-** GUI_GET_INFO_P, >-** GUI_GET_INFO_S, >-** GUI_CLEAR_EVENT, >-** GUI_MUTE_BEEPER=0x30, >-** GUI_BEEPER_SETTING, >-** GUI_SET_PASSWORD, >-** GUI_HOST_INTERFACE_MODE, >-** GUI_REBUILD_PRIORITY, >-** GUI_MAX_ATA_MODE, >-** GUI_RESET_CONTROLLER, >-** GUI_COM_PORT_SETTING, >-** GUI_NO_OPERATION, >-** GUI_DHCP_IP, >-** GUI_CREATE_PASS_THROUGH=0x40, >-** GUI_MODIFY_PASS_THROUGH, >-** GUI_DELETE_PASS_THROUGH, >-** GUI_IDENTIFY_DEVICE, >-** GUI_CREATE_RAIDSET=0x50, >-** GUI_DELETE_RAIDSET, >-** GUI_EXPAND_RAIDSET, >-** GUI_ACTIVATE_RAIDSET, >-** GUI_CREATE_HOT_SPARE, >-** GUI_DELETE_HOT_SPARE, >-** GUI_CREATE_VOLUME=0x60, >-** GUI_MODIFY_VOLUME, >-** GUI_DELETE_VOLUME, >-** GUI_START_CHECK_VOLUME, >-** GUI_STOP_CHECK_VOLUME >-** }; >-** Command description : >-** GUI_SET_SERIAL : Set the controller serial# >-** byte 0,1 : length >-** byte 2 : command code 0x10 >-** byte 3 : password length (should be 0x0f) >-** byte 4-0x13 : should be "ArEcATecHnoLogY" >-** byte 0x14--0x23 : Serial number string (must be 16 bytes) >-** GUI_SET_VENDOR : Set vendor string for the controller >-** byte 0,1 : length >-** byte 2 : command code 0x11 >-** byte 3 : password length (should be 0x08) >-** byte 4-0x13 : should be "ArEcAvAr" >-** byte 0x14--0x3B : vendor string (must be 40 bytes) >-** GUI_SET_MODEL : Set the model name of the controller >-** byte 0,1 : length >-** byte 2 : command code 0x12 >-** byte 3 : password length (should be 0x08) >-** byte 4-0x13 : should be "ArEcAvAr" >-** byte 0x14--0x1B : model string (must be 8 bytes) >-** GUI_IDENTIFY : Identify device >-** byte 0,1 : length >-** byte 2 : command code 0x13 >-** return "Areca RAID Subsystem " >-** GUI_CHECK_PASSWORD : Verify password >-** byte 0,1 : length >-** byte 2 : command code 0x14 >-** byte 3 : password length >-** byte 4-0x?? : user password to be checked >-** GUI_LOGOUT : Logout GUI (force password checking on next command) >-** byte 0,1 : length >-** byte 2 : command code 0x15 >-** GUI_HTTP : HTTP interface (reserved for Http proxy service)(0x16) >-** >-** GUI_SET_ETHERNET_ADDR : Set the ethernet MAC address >-** byte 0,1 : length >-** byte 2 : command code 0x17 >-** byte 3 : password length (should be 0x08) >-** byte 4-0x13 : should be "ArEcAvAr" >-** byte 0x14--0x19 : Ethernet MAC address (must be 6 bytes) >-** GUI_SET_LOGO : Set logo in HTTP >-** byte 0,1 : length >-** byte 2 : command code 0x18 >-** byte 3 : Page# (0/1/2/3) (0xff --> clear OEM logo) >-** byte 4/5/6/7 : 0x55/0xaa/0xa5/0x5a >-** byte 8 : TITLE.JPG data (each page must be 2000 bytes) >-** note page0 1st 2 byte must be >-** actual length of the JPG file >-** GUI_POLL_EVENT : Poll If Event Log Changed >-** byte 0,1 : length >-** byte 2 : command code 0x19 >-** GUI_GET_EVENT : Read Event >-** byte 0,1 : length >-** byte 2 : command code 0x1a >-** byte 3 : Event Page (0:1st page/1/2/3:last page) >-** GUI_GET_HW_MONITOR : Get HW monitor data >-** byte 0,1 : length >-** byte 2 : command code 0x1b >-** byte 3 : # of FANs(example 2) >-** byte 4 : # of Voltage sensor(example 3) >-** byte 5 : # of temperature sensor(example 2) >-** byte 6 : # of power >-** byte 7/8 : Fan#0 (RPM) >-** byte 9/10 : Fan#1 >-** byte 11/12 : Voltage#0 original value in *1000 >-** byte 13/14 : Voltage#0 value >-** byte 15/16 : Voltage#1 org >-** byte 17/18 : Voltage#1 >-** byte 19/20 : Voltage#2 org >-** byte 21/22 : Voltage#2 >-** byte 23 : Temp#0 >-** byte 24 : Temp#1 >-** byte 25 : Power indicator (bit0 : power#0, >-** bit1 : power#1) >-** byte 26 : UPS indicator >-** GUI_QUICK_CREATE : Quick create raid/volume set >-** byte 0,1 : length >-** byte 2 : command code 0x20 >-** byte 3/4/5/6 : raw capacity >-** byte 7 : raid level >-** byte 8 : stripe size >-** byte 9 : spare >-** byte 10/11/12/13: device mask (the devices to create raid/volume) >-** This function is removed, application like >-** to implement quick create function >-** need to use GUI_CREATE_RAIDSET and GUI_CREATE_VOLUMESET function. >-** GUI_GET_INFO_R : Get Raid Set Information >-** byte 0,1 : length >-** byte 2 : command code 0x20 >-** byte 3 : raidset# >-** typedef struct sGUI_RAIDSET >-** { >-** BYTE grsRaidSetName[16]; >-** DWORD grsCapacity; >-** DWORD grsCapacityX; >-** DWORD grsFailMask; >-** BYTE grsDevArray[32]; >-** BYTE grsMemberDevices; >-** BYTE grsNewMemberDevices; >-** BYTE grsRaidState; >-** BYTE grsVolumes; >-** BYTE grsVolumeList[16]; >-** BYTE grsRes1; >-** BYTE grsRes2; >-** BYTE grsRes3; >-** BYTE grsFreeSegments; >-** DWORD grsRawStripes[8]; >-** DWORD grsRes4; >-** DWORD grsRes5; // Total to 128 bytes >-** DWORD grsRes6; // Total to 128 bytes >-** } sGUI_RAIDSET, *pGUI_RAIDSET; >-** GUI_GET_INFO_V : Get Volume Set Information >-** byte 0,1 : length >-** byte 2 : command code 0x21 >-** byte 3 : volumeset# >-** typedef struct sGUI_VOLUMESET >-** { >-** BYTE gvsVolumeName[16]; // 16 >-** DWORD gvsCapacity; >-** DWORD gvsCapacityX; >-** DWORD gvsFailMask; >-** DWORD gvsStripeSize; >-** DWORD gvsNewFailMask; >-** DWORD gvsNewStripeSize; >-** DWORD gvsVolumeStatus; >-** DWORD gvsProgress; // 32 >-** sSCSI_ATTR gvsScsi; >-** BYTE gvsMemberDisks; >-** BYTE gvsRaidLevel; // 8 >-** BYTE gvsNewMemberDisks; >-** BYTE gvsNewRaidLevel; >-** BYTE gvsRaidSetNumber; >-** BYTE gvsRes0; // 4 >-** BYTE gvsRes1[4]; // 64 bytes >-** } sGUI_VOLUMESET, *pGUI_VOLUMESET; >-** GUI_GET_INFO_P : Get Physical Drive Information >-** byte 0,1 : length >-** byte 2 : command code 0x22 >-** byte 3 : drive # (from 0 to max-channels - 1) >-** typedef struct sGUI_PHY_DRV >-** { >-** BYTE gpdModelName[40]; >-** BYTE gpdSerialNumber[20]; >-** BYTE gpdFirmRev[8]; >-** DWORD gpdCapacity; >-** DWORD gpdCapacityX; // Reserved for expansion >-** BYTE gpdDeviceState; >-** BYTE gpdPioMode; >-** BYTE gpdCurrentUdmaMode; >-** BYTE gpdUdmaMode; >-** BYTE gpdDriveSelect; >-** BYTE gpdRaidNumber; // 0xff if not belongs to a raid set >-** sSCSI_ATTR gpdScsi; >-** BYTE gpdReserved[40]; // Total to 128 bytes >-** } sGUI_PHY_DRV, *pGUI_PHY_DRV; >-** GUI_GET_INFO_S : Get System Information >-** byte 0,1 : length >-** byte 2 : command code 0x23 >-** typedef struct sCOM_ATTR >-** { >-** BYTE comBaudRate; >-** BYTE comDataBits; >-** BYTE comStopBits; >-** BYTE comParity; >-** BYTE comFlowControl; >-** } sCOM_ATTR, *pCOM_ATTR; >-** typedef struct sSYSTEM_INFO >-** { >-** BYTE gsiVendorName[40]; >-** BYTE gsiSerialNumber[16]; >-** BYTE gsiFirmVersion[16]; >-** BYTE gsiBootVersion[16]; >-** BYTE gsiMbVersion[16]; >-** BYTE gsiModelName[8]; >-** BYTE gsiLocalIp[4]; >-** BYTE gsiCurrentIp[4]; >-** DWORD gsiTimeTick; >-** DWORD gsiCpuSpeed; >-** DWORD gsiICache; >-** DWORD gsiDCache; >-** DWORD gsiScache; >-** DWORD gsiMemorySize; >-** DWORD gsiMemorySpeed; >-** DWORD gsiEvents; >-** BYTE gsiMacAddress[6]; >-** BYTE gsiDhcp; >-** BYTE gsiBeeper; >-** BYTE gsiChannelUsage; >-** BYTE gsiMaxAtaMode; >-** BYTE gsiSdramEcc; // 1:if ECC enabled >-** BYTE gsiRebuildPriority; >-** sCOM_ATTR gsiComA; // 5 bytes >-** sCOM_ATTR gsiComB; // 5 bytes >-** BYTE gsiIdeChannels; >-** BYTE gsiScsiHostChannels; >-** BYTE gsiIdeHostChannels; >-** BYTE gsiMaxVolumeSet; >-** BYTE gsiMaxRaidSet; >-** BYTE gsiEtherPort; // 1:if ether net port supported >-** BYTE gsiRaid6Engine; // 1:Raid6 engine supported >-** BYTE gsiRes[75]; >-** } sSYSTEM_INFO, *pSYSTEM_INFO; >-** GUI_CLEAR_EVENT : Clear System Event >-** byte 0,1 : length >-** byte 2 : command code 0x24 >-** GUI_MUTE_BEEPER : Mute current beeper >-** byte 0,1 : length >-** byte 2 : command code 0x30 >-** GUI_BEEPER_SETTING : Disable beeper >-** byte 0,1 : length >-** byte 2 : command code 0x31 >-** byte 3 : 0->disable, 1->enable >-** GUI_SET_PASSWORD : Change password >-** byte 0,1 : length >-** byte 2 : command code 0x32 >-** byte 3 : pass word length ( must <= 15 ) >-** byte 4 : password (must be alpha-numerical) >-** GUI_HOST_INTERFACE_MODE : Set host interface mode >-** byte 0,1 : length >-** byte 2 : command code 0x33 >-** byte 3 : 0->Independent, 1->cluster >-** GUI_REBUILD_PRIORITY : Set rebuild priority >-** byte 0,1 : length >-** byte 2 : command code 0x34 >-** byte 3 : 0/1/2/3 (low->high) >-** GUI_MAX_ATA_MODE : Set maximum ATA mode to be used >-** byte 0,1 : length >-** byte 2 : command code 0x35 >-** byte 3 : 0/1/2/3 (133/100/66/33) >-** GUI_RESET_CONTROLLER : Reset Controller >-** byte 0,1 : length >-** byte 2 : command code 0x36 >-** *Response with VT100 screen (discard it) >-** GUI_COM_PORT_SETTING : COM port setting >-** byte 0,1 : length >-** byte 2 : command code 0x37 >-** byte 3 : 0->COMA (term port), >-** 1->COMB (debug port) >-** byte 4 : 0/1/2/3/4/5/6/7 >-** (1200/2400/4800/9600/19200/38400/57600/115200) >-** byte 5 : data bit >-** (0:7 bit, 1:8 bit : must be 8 bit) >-** byte 6 : stop bit (0:1, 1:2 stop bits) >-** byte 7 : parity (0:none, 1:off, 2:even) >-** byte 8 : flow control >-** (0:none, 1:xon/xoff, 2:hardware => must use none) >-** GUI_NO_OPERATION : No operation >-** byte 0,1 : length >-** byte 2 : command code 0x38 >-** GUI_DHCP_IP : Set DHCP option and local IP address >-** byte 0,1 : length >-** byte 2 : command code 0x39 >-** byte 3 : 0:dhcp disabled, 1:dhcp enabled >-** byte 4/5/6/7 : IP address >-** GUI_CREATE_PASS_THROUGH : Create pass through disk >-** byte 0,1 : length >-** byte 2 : command code 0x40 >-** byte 3 : device # >-** byte 4 : scsi channel (0/1) >-** byte 5 : scsi id (0-->15) >-** byte 6 : scsi lun (0-->7) >-** byte 7 : tagged queue (1 : enabled) >-** byte 8 : cache mode (1 : enabled) >-** byte 9 : max speed (0/1/2/3/4, >-** async/20/40/80/160 for scsi) >-** (0/1/2/3/4, 33/66/100/133/150 for ide ) >-** GUI_MODIFY_PASS_THROUGH : Modify pass through disk >-** byte 0,1 : length >-** byte 2 : command code 0x41 >-** byte 3 : device # >-** byte 4 : scsi channel (0/1) >-** byte 5 : scsi id (0-->15) >-** byte 6 : scsi lun (0-->7) >-** byte 7 : tagged queue (1 : enabled) >-** byte 8 : cache mode (1 : enabled) >-** byte 9 : max speed (0/1/2/3/4, >-** async/20/40/80/160 for scsi) >-** (0/1/2/3/4, 33/66/100/133/150 for ide ) >-** GUI_DELETE_PASS_THROUGH : Delete pass through disk >-** byte 0,1 : length >-** byte 2 : command code 0x42 >-** byte 3 : device# to be deleted >-** GUI_IDENTIFY_DEVICE : Identify Device >-** byte 0,1 : length >-** byte 2 : command code 0x43 >-** byte 3 : Flash Method >-** (0:flash selected, 1:flash not selected) >-** byte 4/5/6/7 : IDE device mask to be flashed >-** note .... no response data available >-** GUI_CREATE_RAIDSET : Create Raid Set >-** byte 0,1 : length >-** byte 2 : command code 0x50 >-** byte 3/4/5/6 : device mask >-** byte 7-22 : raidset name (if byte 7 == 0:use default) >-** GUI_DELETE_RAIDSET : Delete Raid Set >-** byte 0,1 : length >-** byte 2 : command code 0x51 >-** byte 3 : raidset# >-** GUI_EXPAND_RAIDSET : Expand Raid Set >-** byte 0,1 : length >-** byte 2 : command code 0x52 >-** byte 3 : raidset# >-** byte 4/5/6/7 : device mask for expansion >-** byte 8/9/10 : (8:0 no change, 1 change, 0xff:terminate, >-** 9:new raid level, >-** 10:new stripe size >-** 0/1/2/3/4/5->4/8/16/32/64/128K ) >-** byte 11/12/13 : repeat for each volume in the raidset >-** GUI_ACTIVATE_RAIDSET : Activate incomplete raid set >-** byte 0,1 : length >-** byte 2 : command code 0x53 >-** byte 3 : raidset# >-** GUI_CREATE_HOT_SPARE : Create hot spare disk >-** byte 0,1 : length >-** byte 2 : command code 0x54 >-** byte 3/4/5/6 : device mask for hot spare creation >-** GUI_DELETE_HOT_SPARE : Delete hot spare disk >-** byte 0,1 : length >-** byte 2 : command code 0x55 >-** byte 3/4/5/6 : device mask for hot spare deletion >-** GUI_CREATE_VOLUME : Create volume set >-** byte 0,1 : length >-** byte 2 : command code 0x60 >-** byte 3 : raidset# >-** byte 4-19 : volume set name >-** (if byte4 == 0, use default) >-** byte 20-27 : volume capacity (blocks) >-** byte 28 : raid level >-** byte 29 : stripe size >-** (0/1/2/3/4/5->4/8/16/32/64/128K) >-** byte 30 : channel >-** byte 31 : ID >-** byte 32 : LUN >-** byte 33 : 1 enable tag >-** byte 34 : 1 enable cache >-** byte 35 : speed >-** (0/1/2/3/4->async/20/40/80/160 for scsi) >-** (0/1/2/3/4->33/66/100/133/150 for IDE ) >-** byte 36 : 1 to select quick init >-** >-** GUI_MODIFY_VOLUME : Modify volume Set >-** byte 0,1 : length >-** byte 2 : command code 0x61 >-** byte 3 : volumeset# >-** byte 4-19 : new volume set name >-** (if byte4 == 0, not change) >-** byte 20-27 : new volume capacity (reserved) >-** byte 28 : new raid level >-** byte 29 : new stripe size >-** (0/1/2/3/4/5->4/8/16/32/64/128K) >-** byte 30 : new channel >-** byte 31 : new ID >-** byte 32 : new LUN >-** byte 33 : 1 enable tag >-** byte 34 : 1 enable cache >-** byte 35 : speed >-** (0/1/2/3/4->async/20/40/80/160 for scsi) >-** (0/1/2/3/4->33/66/100/133/150 for IDE ) >-** GUI_DELETE_VOLUME : Delete volume set >-** byte 0,1 : length >-** byte 2 : command code 0x62 >-** byte 3 : volumeset# >-** GUI_START_CHECK_VOLUME : Start volume consistency check >-** byte 0,1 : length >-** byte 2 : command code 0x63 >-** byte 3 : volumeset# >-** GUI_STOP_CHECK_VOLUME : Stop volume consistency check >-** byte 0,1 : length >-** byte 2 : command code 0x64 >-** --------------------------------------------------------------------- >-** 4. Returned data >-** --------------------------------------------------------------------- >-** (A) Header : 3 bytes sequence (0x5E, 0x01, 0x61) >-** (B) Length : 2 bytes >-** (low byte 1st, excludes length and checksum byte) >-** (C) status or data : >-** <1> If length == 1 ==> 1 byte status code >-** #define GUI_OK 0x41 >-** #define GUI_RAIDSET_NOT_NORMAL 0x42 >-** #define GUI_VOLUMESET_NOT_NORMAL 0x43 >-** #define GUI_NO_RAIDSET 0x44 >-** #define GUI_NO_VOLUMESET 0x45 >-** #define GUI_NO_PHYSICAL_DRIVE 0x46 >-** #define GUI_PARAMETER_ERROR 0x47 >-** #define GUI_UNSUPPORTED_COMMAND 0x48 >-** #define GUI_DISK_CONFIG_CHANGED 0x49 >-** #define GUI_INVALID_PASSWORD 0x4a >-** #define GUI_NO_DISK_SPACE 0x4b >-** #define GUI_CHECKSUM_ERROR 0x4c >-** #define GUI_PASSWORD_REQUIRED 0x4d >-** <2> If length > 1 ==> >-** data block returned from controller >-** and the contents depends on the command code >-** (E) Checksum : checksum of length and status or data byte > ******************************************************************************* > */ > #include <linux/interrupt.h> > > struct class_device_attribute; >- >-#define ARCMSR_MAX_OUTSTANDING_CMD 256 >-#define ARCMSR_MAX_FREECCB_NUM 288 >-#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.13" >+/*The limit of outstanding scsi command that firmware can handle*/ >+#define ARCMSR_MAX_OUTSTANDING_CMD 256 >+#define ARCMSR_MAX_FREECCB_NUM 320 >+#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15.RH4U7 2008/02/27" > #define ARCMSR_SCSI_INITIATOR_ID 255 > #define ARCMSR_MAX_XFER_SECTORS 512 >-#define ARCMSR_MAX_TARGETID 17 >-#define ARCMSR_MAX_TARGETLUN 8 >-#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD >-#define ARCMSR_MAX_QBUFFER 4096 >-#define ARCMSR_MAX_SG_ENTRIES 38 >- >+#define ARCMSR_MAX_XFER_SECTORS_B 4096 >+#define ARCMSR_MAX_TARGETID 17 >+#define ARCMSR_MAX_TARGETLUN 8 >+#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD >+#define ARCMSR_MAX_QBUFFER 4096 >+#define ARCMSR_MAX_SG_ENTRIES 38 >+#define ARCMSR_MAX_HBB_POSTQUEUE 264 >+/* >+********************************************************************************** >+** >+********************************************************************************** >+*/ >+#define ARC_SUCCESS 0 >+#define ARC_FAILURE 1 > /* > ******************************************************************************* > ** split 64bits dma addressing >@@ -662,7 +97,7 @@ struct CMD_MESSAGE_FIELD > uint8_t messagedatabuffer[1032]; > }; > /* IOP message transfer */ >-#define ARCMSR_MESSAGE_FAIL 0x0001 >+#define ARCMSR_MESSAGE_FAIL 0x0001 > /* DeviceType */ > #define ARECA_SATA_RAID 0x90000000 > /* FunctionCode */ >@@ -695,25 +130,25 @@ struct CMD_MESSAGE_FIELD > #define ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE \ > ARECA_SATA_RAID | FUNCTION_FLUSH_ADAPTER_CACHE > /* ARECA IOCTL ReturnCode */ >-#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 >-#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 >-#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F >+#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 >+#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 >+#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F > /* > ************************************************************* > ** structure for holding DMA address data > ************************************************************* > */ >-#define IS_SG64_ADDR 0x01000000 /* bit24 */ >+#define IS_SG64_ADDR 0x01000000 /* bit24 */ > struct SG32ENTRY > { >- uint32_t length; >- uint32_t address; >+ __le32 length; >+ __le32 address; > }; > struct SG64ENTRY > { >- uint32_t length; >- uint32_t address; >- uint32_t addresshigh; >+ __le32 length; >+ __le32 address; >+ __le32 addresshigh; > }; > struct SGENTRY_UNION > { >@@ -735,46 +170,102 @@ struct QBUFFER > }; > /* > ******************************************************************************* >-** FIRMWARE INFO >+** FIRMWARE INFO for Intel IOP R 80331 processor (Type A) > ******************************************************************************* > */ > struct FIRMWARE_INFO > { >- uint32_t signature; /*0, 00-03*/ >- uint32_t request_len; /*1, 04-07*/ >- uint32_t numbers_queue; /*2, 08-11*/ >- uint32_t sdram_size; /*3, 12-15*/ >- uint32_t ide_channels; /*4, 16-19*/ >- char vendor[40]; /*5, 20-59*/ >- char model[8]; /*15, 60-67*/ >- char firmware_ver[16]; /*17, 68-83*/ >- char device_map[16]; /*21, 84-99*/ >+ uint32_t signature; /*0, 00-03*/ >+ uint32_t request_len; /*1, 04-07*/ >+ uint32_t numbers_queue; /*2, 08-11*/ >+ uint32_t sdram_size; /*3, 12-15*/ >+ uint32_t ide_channels; /*4, 16-19*/ >+ char vendor[40]; /*5, 20-59*/ >+ char model[8]; /*15, 60-67*/ >+ char firmware_ver[16]; /*17, 68-83*/ >+ char device_map[16]; /*21, 84-99*/ > }; > /* signature of set and get firmware config */ >-#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 >-#define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 >+#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 >+#define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 > /* message code of inbound message register */ >-#define ARCMSR_INBOUND_MESG0_NOP 0x00000000 >-#define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 >-#define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 >-#define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 >-#define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 >-#define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 >-#define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 >-#define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 >-#define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 >+#define ARCMSR_INBOUND_MESG0_NOP 0x00000000 >+#define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 >+#define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 >+#define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 >+#define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 >+#define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 >+#define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 >+#define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 >+#define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 > /* doorbell interrupt generator */ >-#define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 >-#define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 >-#define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 >-#define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 >+#define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 >+#define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 >+#define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 >+#define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 > /* ccb areca cdb flag */ >-#define ARCMSR_CCBPOST_FLAG_SGL_BSIZE 0x80000000 >-#define ARCMSR_CCBPOST_FLAG_IAM_BIOS 0x40000000 >-#define ARCMSR_CCBREPLY_FLAG_IAM_BIOS 0x40000000 >-#define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000 >+#define ARCMSR_CCBPOST_FLAG_SGL_BSIZE 0x80000000 >+#define ARCMSR_CCBPOST_FLAG_IAM_BIOS 0x40000000 >+#define ARCMSR_CCBREPLY_FLAG_IAM_BIOS 0x40000000 >+#define ARCMSR_CCBREPLY_FLAG_ERROR 0x10000000 > /* outbound firmware ok */ >-#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 >+#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 >+ >+/* >+************************************************************************ >+** SPEC. for Areca Type B adapter >+************************************************************************ >+*/ >+/* ARECA HBB COMMAND for its FIRMWARE */ >+/* window of "instruction flags" from driver to iop */ >+#define ARCMSR_DRV2IOP_DOORBELL 0x00020400 >+#define ARCMSR_DRV2IOP_DOORBELL_MASK 0x00020404 >+/* window of "instruction flags" from iop to driver */ >+#define ARCMSR_IOP2DRV_DOORBELL 0x00020408 >+#define ARCMSR_IOP2DRV_DOORBELL_MASK 0x0002040C >+/* ARECA FLAG LANGUAGE */ >+/* ioctl transfer */ >+#define ARCMSR_IOP2DRV_DATA_WRITE_OK 0x00000001 >+/* ioctl transfer */ >+#define ARCMSR_IOP2DRV_DATA_READ_OK 0x00000002 >+#define ARCMSR_IOP2DRV_CDB_DONE 0x00000004 >+#define ARCMSR_IOP2DRV_MESSAGE_CMD_DONE 0x00000008 >+ >+#define ARCMSR_DOORBELL_HANDLE_INT 0x0000000F >+#define ARCMSR_DOORBELL_INT_CLEAR_PATTERN 0xFF00FFF0 >+#define ARCMSR_MESSAGE_INT_CLEAR_PATTERN 0xFF00FFF7 >+/* (ARCMSR_INBOUND_MESG0_GET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ >+#define ARCMSR_MESSAGE_GET_CONFIG 0x00010008 >+/* (ARCMSR_INBOUND_MESG0_SET_CONFIG<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ >+#define ARCMSR_MESSAGE_SET_CONFIG 0x00020008 >+/* (ARCMSR_INBOUND_MESG0_ABORT_CMD<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ >+#define ARCMSR_MESSAGE_ABORT_CMD 0x00030008 >+/* (ARCMSR_INBOUND_MESG0_STOP_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ >+#define ARCMSR_MESSAGE_STOP_BGRB 0x00040008 >+/* (ARCMSR_INBOUND_MESG0_FLUSH_CACHE<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ >+#define ARCMSR_MESSAGE_FLUSH_CACHE 0x00050008 >+/* (ARCMSR_INBOUND_MESG0_START_BGRB<<16)|ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED) */ >+#define ARCMSR_MESSAGE_START_BGRB 0x00060008 >+#define ARCMSR_MESSAGE_START_DRIVER_MODE 0x000E0008 >+#define ARCMSR_MESSAGE_SET_POST_WINDOW 0x000F0008 >+#define ARCMSR_MESSAGE_ACTIVE_EOI_MODE 0x00100008 >+/* ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK */ >+#define ARCMSR_MESSAGE_FIRMWARE_OK 0x80000000 >+/* ioctl transfer */ >+#define ARCMSR_DRV2IOP_DATA_WRITE_OK 0x00000001 >+/* ioctl transfer */ >+#define ARCMSR_DRV2IOP_DATA_READ_OK 0x00000002 >+#define ARCMSR_DRV2IOP_CDB_POSTED 0x00000004 >+#define ARCMSR_DRV2IOP_MESSAGE_CMD_POSTED 0x00000008 >+#define ARCMSR_DRV2IOP_END_OF_INTERRUPT 0x00000010 >+ >+/* data tunnel buffer between user space program and its firmware */ >+/* user space data to iop 128bytes */ >+#define ARCMSR_IOCTL_WBUFFER 0x0000fe00 >+/* iop data to user space 128bytes */ >+#define ARCMSR_IOCTL_RBUFFER 0x0000ff00 >+/* iop message_rwbuffer for message command */ >+#define ARCMSR_MSGCODE_RWBUFFER 0x0000fa00 > /* > ******************************************************************************* > ** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504) >@@ -782,46 +273,43 @@ struct FIRMWARE_INFO > */ > struct ARCMSR_CDB > { >- uint8_t Bus; >- uint8_t TargetID; >- uint8_t LUN; >- uint8_t Function; >- >- uint8_t CdbLength; >- uint8_t sgcount; >- uint8_t Flags; >-#define ARCMSR_CDB_FLAG_SGL_BSIZE 0x01 >-#define ARCMSR_CDB_FLAG_BIOS 0x02 >-#define ARCMSR_CDB_FLAG_WRITE 0x04 >-#define ARCMSR_CDB_FLAG_SIMPLEQ 0x00 >-#define ARCMSR_CDB_FLAG_HEADQ 0x08 >-#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 >- uint8_t Reserved1; >- >- uint32_t Context; >- uint32_t DataLength; >- >- uint8_t Cdb[16]; >- >- uint8_t DeviceStatus; >-#define ARCMSR_DEV_CHECK_CONDITION 0x02 >-#define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 >-#define ARCMSR_DEV_ABORTED 0xF1 >-#define ARCMSR_DEV_INIT_FAIL 0xF2 >- uint8_t SenseData[15]; >+ uint8_t Bus; >+ uint8_t TargetID; >+ uint8_t LUN; >+ uint8_t Function; >+ uint8_t CdbLength; >+ uint8_t sgcount; >+ uint8_t Flags; >+#define ARCMSR_CDB_FLAG_SGL_BSIZE 0x01 >+#define ARCMSR_CDB_FLAG_BIOS 0x02 >+#define ARCMSR_CDB_FLAG_WRITE 0x04 >+#define ARCMSR_CDB_FLAG_SIMPLEQ 0x00 >+#define ARCMSR_CDB_FLAG_HEADQ 0x08 >+#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 >+ >+ uint8_t Reserved1; >+ uint32_t Context; >+ uint32_t DataLength; >+ uint8_t Cdb[16]; >+ uint8_t DeviceStatus; >+#define ARCMSR_DEV_CHECK_CONDITION 0x02 >+#define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 >+#define ARCMSR_DEV_ABORTED 0xF1 >+#define ARCMSR_DEV_INIT_FAIL 0xF2 > >+ uint8_t SenseData[15]; > union > { >- struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; >- struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; >+ struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; >+ struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; > } u; > }; > /* > ******************************************************************************* >-** Messaging Unit (MU) of the Intel R 80331 I/O processor (80331) >+** Messaging Unit (MU) of the Intel R 80331 I/O processor(Type A) and Type B processor > ******************************************************************************* > */ >-struct MessageUnit >+struct MessageUnit_A > { > uint32_t resrved0[4]; /*0000 000F*/ > uint32_t inbound_msgaddr0; /*0010 0013*/ >@@ -846,6 +334,22 @@ struct MessageUnit > uint32_t message_rbuffer[32]; /*0F00 0F7F 32*/ > uint32_t reserved6[32]; /*0F80 0FFF 32*/ > }; >+ >+struct MessageUnit_B >+{ >+ uint32_t post_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; >+ uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE]; >+ uint32_t postq_index; >+ uint32_t doneq_index; >+ void __iomem *drv2iop_doorbell_reg; >+ void __iomem *drv2iop_doorbell_mask_reg; >+ void __iomem *iop2drv_doorbell_reg; >+ void __iomem *iop2drv_doorbell_mask_reg; >+ void __iomem *msgcode_rwbuffer_reg; >+ void __iomem *ioctl_wbuffer_reg; >+ void __iomem *ioctl_rbuffer_reg; >+}; >+ > /* > ******************************************************************************* > ** Adapter Control Block >@@ -853,37 +357,48 @@ struct MessageUnit > */ > struct AdapterControlBlock > { >+ uint32_t adapter_type; /* adapter A,B..... */ >+ #define ACB_ADAPTER_TYPE_A 0x00000001 /* hba I IOP */ >+ #define ACB_ADAPTER_TYPE_B 0x00000002 /* hbb M IOP */ >+ #define ACB_ADAPTER_TYPE_C 0x00000004 /* hbc P IOP */ >+ #define ACB_ADAPTER_TYPE_D 0x00000008 /* hbd A IOP */ > struct pci_dev * pdev; > struct Scsi_Host * host; > unsigned long vir2phy_offset; > /* Offset is used in making arc cdb physical to virtual calculations */ > uint32_t outbound_int_enable; > >- struct MessageUnit __iomem * pmu; >+ union { >+ struct MessageUnit_A __iomem * pmuA; >+ struct MessageUnit_B * pmuB; >+ }; > /* message unit ATU inbound base address0 */ > > uint32_t acb_flags; >-#define ACB_F_SCSISTOPADAPTER 0x0001 >-#define ACB_F_MSG_STOP_BGRB 0x0002 >+ #define ACB_F_SCSISTOPADAPTER 0x0001 >+ #define ACB_F_MSG_STOP_BGRB 0x0002 > /* stop RAID background rebuild */ >-#define ACB_F_MSG_START_BGRB 0x0004 >+ #define ACB_F_MSG_START_BGRB 0x0004 > /* stop RAID background rebuild */ >-#define ACB_F_IOPDATA_OVERFLOW 0x0008 >+ #define ACB_F_IOPDATA_OVERFLOW 0x0008 > /* iop message data rqbuffer overflow */ >-#define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010 >+ #define ACB_F_MESSAGE_WQBUFFER_CLEARED 0x0010 > /* message clear wqbuffer */ >-#define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020 >+ #define ACB_F_MESSAGE_RQBUFFER_CLEARED 0x0020 > /* message clear rqbuffer */ >-#define ACB_F_MESSAGE_WQBUFFER_READED 0x0040 >-#define ACB_F_BUS_RESET 0x0080 >-#define ACB_F_IOP_INITED 0x0100 >+ #define ACB_F_MESSAGE_WQBUFFER_READED 0x0040 >+ #define ACB_F_BUS_RESET 0x0080 >+ #define ACB_F_IOP_INITED 0x0100 > /* iop init */ > >- struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; >+ struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM]; > /* used for memory free */ > struct list_head ccb_free_list; > /* head of free ccb list */ >+ > atomic_t ccboutstandingcount; >+ /*The present outstanding command number that in the IOP that >+ waiting for being handled by FW*/ > > void * dma_coherent; > /* dma_coherent used for memory free */ >@@ -904,8 +419,8 @@ struct AdapterControlBlock > /* last of write buffer */ > uint8_t devstate[ARCMSR_MAX_TARGETID][ARCMSR_MAX_TARGETLUN]; > /* id0 ..... id15, lun0...lun7 */ >-#define ARECA_RAID_GONE 0x55 >-#define ARECA_RAID_GOOD 0xaa >+ #define ARECA_RAID_GONE 0x55 >+ #define ARECA_RAID_GOOD 0xaa > uint32_t num_resets; > uint32_t num_aborts; > uint32_t firm_request_len; >@@ -925,7 +440,7 @@ struct CommandControlBlock > { > struct ARCMSR_CDB arcmsr_cdb; > /* >- ** 0-503 (size of CDB=504): >+ ** 0-503 (size of CDB = 504): > ** arcmsr messenger scsi command descriptor size 504 bytes > */ > uint32_t cdb_shifted_phyaddr; >@@ -990,35 +505,35 @@ struct CommandControlBlock > */ > struct SENSE_DATA > { >- uint8_t ErrorCode:7; >-#define SCSI_SENSE_CURRENT_ERRORS 0x70 >-#define SCSI_SENSE_DEFERRED_ERRORS 0x71 >- uint8_t Valid:1; >- uint8_t SegmentNumber; >- uint8_t SenseKey:4; >- uint8_t Reserved:1; >- uint8_t IncorrectLength:1; >- uint8_t EndOfMedia:1; >- uint8_t FileMark:1; >- uint8_t Information[4]; >- uint8_t AdditionalSenseLength; >- uint8_t CommandSpecificInformation[4]; >- uint8_t AdditionalSenseCode; >- uint8_t AdditionalSenseCodeQualifier; >- uint8_t FieldReplaceableUnitCode; >- uint8_t SenseKeySpecific[3]; >+ uint8_t ErrorCode:7; >+ #define SCSI_SENSE_CURRENT_ERRORS 0x70 >+ #define SCSI_SENSE_DEFERRED_ERRORS 0x71 >+ uint8_t Valid:1; >+ uint8_t SegmentNumber; >+ uint8_t SenseKey:4; >+ uint8_t Reserved:1; >+ uint8_t IncorrectLength:1; >+ uint8_t EndOfMedia:1; >+ uint8_t FileMark:1; >+ uint8_t Information[4]; >+ uint8_t AdditionalSenseLength; >+ uint8_t CommandSpecificInformation[4]; >+ uint8_t AdditionalSenseCode; >+ uint8_t AdditionalSenseCodeQualifier; >+ uint8_t FieldReplaceableUnitCode; >+ uint8_t SenseKeySpecific[3]; > }; > /* > ******************************************************************************* > ** Outbound Interrupt Status Register - OISR > ******************************************************************************* > */ >-#define ARCMSR_MU_OUTBOUND_INTERRUPT_STATUS_REG 0x30 >-#define ARCMSR_MU_OUTBOUND_PCI_INT 0x10 >-#define ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 0x08 >-#define ARCMSR_MU_OUTBOUND_DOORBELL_INT 0x04 >-#define ARCMSR_MU_OUTBOUND_MESSAGE1_INT 0x02 >-#define ARCMSR_MU_OUTBOUND_MESSAGE0_INT 0x01 >+#define ARCMSR_MU_OUTBOUND_INTERRUPT_STATUS_REG 0x30 >+#define ARCMSR_MU_OUTBOUND_PCI_INT 0x10 >+#define ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 0x08 >+#define ARCMSR_MU_OUTBOUND_DOORBELL_INT 0x04 >+#define ARCMSR_MU_OUTBOUND_MESSAGE1_INT 0x02 >+#define ARCMSR_MU_OUTBOUND_MESSAGE0_INT 0x01 > #define ARCMSR_MU_OUTBOUND_HANDLE_INT \ > (ARCMSR_MU_OUTBOUND_MESSAGE0_INT \ > |ARCMSR_MU_OUTBOUND_MESSAGE1_INT \ >@@ -1030,16 +545,17 @@ struct SENSE_DATA > ** Outbound Interrupt Mask Register - OIMR > ******************************************************************************* > */ >-#define ARCMSR_MU_OUTBOUND_INTERRUPT_MASK_REG 0x34 >-#define ARCMSR_MU_OUTBOUND_PCI_INTMASKENABLE 0x10 >-#define ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE 0x08 >-#define ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE 0x04 >-#define ARCMSR_MU_OUTBOUND_MESSAGE1_INTMASKENABLE 0x02 >-#define ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE 0x01 >-#define ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE 0x1F >- >-extern void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb); >+#define ARCMSR_MU_OUTBOUND_INTERRUPT_MASK_REG 0x34 >+#define ARCMSR_MU_OUTBOUND_PCI_INTMASKENABLE 0x10 >+#define ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE 0x08 >+#define ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE 0x04 >+#define ARCMSR_MU_OUTBOUND_MESSAGE1_INTMASKENABLE 0x02 >+#define ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE 0x01 >+#define ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE 0x1F >+ >+extern void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *); >+extern void arcmsr_iop_message_read(struct AdapterControlBlock *); >+extern struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *); > extern struct class_device_attribute *arcmsr_host_attrs[]; >-extern int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *acb); >+extern int arcmsr_alloc_sysfs_attr(struct AdapterControlBlock *); > void arcmsr_free_sysfs_attr(struct AdapterControlBlock *acb); >- >diff -Naurp linux-2.6.9/drivers/scsi/arcmsr/arcmsr_hba.c linux-2.6.9n/drivers/scsi/arcmsr/arcmsr_hba.c >--- linux-2.6.9/drivers/scsi/arcmsr/arcmsr_hba.c 2008-02-15 15:16:02.000000000 +0100 >+++ linux-2.6.9n/drivers/scsi/arcmsr/arcmsr_hba.c 2008-03-11 11:05:56.000000000 +0100 >@@ -9,7 +9,7 @@ > ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved > ** > ** Web site: www.areca.com.tw >-** E-mail: erich@areca.com.tw >+** E-mail: support@areca.com.tw > ** > ** This program is free software; you can redistribute it and/or modify > ** it under the terms of the GNU General Public License version 2 as >@@ -40,62 +40,9 @@ > ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF > ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. >-****************************************************************************** >-****************************************************************************** >-** History >-** >-** REV# DATE NAME DESCRIPTION >-** 1.00.00.00 3/31/2004 Erich Chen First release >-** 1.10.00.04 7/28/2004 Erich Chen modify for ioctl >-** 1.10.00.06 8/28/2004 Erich Chen modify for 2.6.x >-** 1.10.00.08 9/28/2004 Erich Chen modify for x86_64 >-** 1.10.00.10 10/10/2004 Erich Chen bug fix for SMP & ioctl >-** 1.20.00.00 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error >-** 1.20.00.02 12/09/2004 Erich Chen bug fix with over 2T bytes RAID Volume >-** 1.20.00.04 1/09/2005 Erich Chen fits for Debian linux kernel version 2.2.xx >-** 1.20.00.05 2/20/2005 Erich Chen cleanly as look like a Linux driver at 2.6.x >-** thanks for peoples kindness comment >-** Kornel Wieliczek >-** Christoph Hellwig >-** Adrian Bunk >-** Andrew Morton >-** Christoph Hellwig >-** James Bottomley >-** Arjan van de Ven >-** 1.20.00.06 3/12/2005 Erich Chen fix with arcmsr_pci_unmap_dma "unsigned long" cast, >-** modify PCCB POOL allocated by "dma_alloc_coherent" >-** (Kornel Wieliczek's comment) >-** 1.20.00.07 3/23/2005 Erich Chen bug fix with arcmsr_scsi_host_template_init >-** occur segmentation fault, >-** if RAID adapter does not on PCI slot >-** and modprobe/rmmod this driver twice. >-** bug fix enormous stack usage (Adrian Bunk's comment) >-** 1.20.00.08 6/23/2005 Erich Chen bug fix with abort command, >-** in case of heavy loading when sata cable >-** working on low quality connection >-** 1.20.00.09 9/12/2005 Erich Chen bug fix with abort command handling, firmware version check >-** and firmware update notify for hardware bug fix >-** 1.20.00.10 9/23/2005 Erich Chen enhance sysfs function for change driver's max tag Q number. >-** add DMA_64BIT_MASK for backward compatible with all 2.6.x >-** add some useful message for abort command >-** add ioctl code 'ARCMSR_IOCTL_FLUSH_ADAPTER_CACHE' >-** customer can send this command for sync raid volume data >-** 1.20.00.11 9/29/2005 Erich Chen by comment of Arjan van de Ven fix incorrect msleep redefine >-** cast off sizeof(dma_addr_t) condition for 64bit pci_set_dma_mask >-** 1.20.00.12 9/30/2005 Erich Chen bug fix with 64bit platform's ccbs using if over 4G system memory >-** change 64bit pci_set_consistent_dma_mask into 32bit >-** increcct adapter count if adapter initialize fail. >-** miss edit at arcmsr_build_ccb.... >-** psge += sizeof(struct _SG64ENTRY *) => >-** psge += sizeof(struct _SG64ENTRY) >-** 64 bits sg entry would be incorrectly calculated >-** thanks Kornel Wieliczek give me kindly notify >-** and detail description >-** 1.20.00.13 11/15/2005 Erich Chen scheduling pending ccb with FIFO >-** change the architecture of arcmsr command queue list >-** for linux standard list >-** enable usage of pci message signal interrupt >-** follow Randy.Danlup kindness suggestion cleanup this code >+******************************************************************************* >+** For history of changes, see Documentation/scsi/ChangeLog.arcmsr >+** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt > ******************************************************************************* > */ > #include <linux/module.h> >@@ -123,34 +70,65 @@ > #include <scsi/scsicam.h> > #include "arcmsr.h" > >-MODULE_AUTHOR("Erich Chen <erich@areca.com.tw>"); >-MODULE_DESCRIPTION("ARECA (ARC11xx/12xx) SATA RAID HOST Adapter"); >+MODULE_AUTHOR("Erich Chen <support@areca.com.tw>"); >+MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter"); > MODULE_LICENSE("Dual BSD/GPL"); > MODULE_VERSION(ARCMSR_DRIVER_VERSION); > >-static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd); >+static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, >+ struct scsi_cmnd *cmd); >+static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); > static int arcmsr_abort(struct scsi_cmnd *); > static int arcmsr_bus_reset(struct scsi_cmnd *); > static int arcmsr_bios_param(struct scsi_device *sdev, >- struct block_device *bdev, sector_t capacity, int *info); >-static int arcmsr_queue_command(struct scsi_cmnd * cmd, >- void (*done) (struct scsi_cmnd *)); >+ struct block_device *bdev, sector_t capacity, int *info); >+static int arcmsr_queue_command(struct scsi_cmnd *cmd, >+ void (*done) (struct scsi_cmnd *)); > static int arcmsr_probe(struct pci_dev *pdev, > const struct pci_device_id *id); > static void arcmsr_remove(struct pci_dev *pdev); > static void arcmsr_iop_init(struct AdapterControlBlock *acb); > static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); >+static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); > static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); >-static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb); >-static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb); >+static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); >+static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); > static const char *arcmsr_info(struct Scsi_Host *); > static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); >+static ssize_t arcmsr_adjust_disk_queue_depth(struct device *dev, const char *buf, size_t count) >+{ >+ int queue_depth; >+ struct scsi_device *sdev = to_scsi_device(dev); >+ >+ queue_depth = simple_strtoul(buf, NULL, 0); >+ if(queue_depth > ARCMSR_MAX_CMD_PERLUN) >+ return -EINVAL; >+ scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); >+ return count; >+} >+ >+static struct device_attribute arcmsr_queue_depth_attr = >+{ >+ .attr = { >+ .name = "queue_depth", >+ .mode = S_IRUSR | S_IWUSR, >+ }, >+ .store = arcmsr_adjust_disk_queue_depth >+}; >+ >+static struct device_attribute *arcmsr_scsi_device_attr[] = >+{ >+ &arcmsr_queue_depth_attr, >+ NULL, >+}; > > static struct scsi_host_template arcmsr_scsi_host_template = { > .module = THIS_MODULE, >- .name = "ARCMSR ARECA SATA RAID HOST Adapter" ARCMSR_DRIVER_VERSION, >+ .name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter" >+ ARCMSR_DRIVER_VERSION, > .info = arcmsr_info, > .queuecommand = arcmsr_queue_command, >+ .sdev_attrs = arcmsr_scsi_device_attr, > .eh_abort_handler = arcmsr_abort, > .eh_bus_reset_handler = arcmsr_bus_reset, > .bios_param = arcmsr_bios_param, >@@ -162,13 +140,15 @@ static struct scsi_host_template arcmsr_ > .use_clustering = ENABLE_CLUSTERING, > .shost_attrs = arcmsr_host_attrs, > }; >- > static struct pci_device_id arcmsr_device_id_table[] = { > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, >+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, >+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, >+ {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, > {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, >@@ -192,14 +172,12 @@ static struct pci_driver arcmsr_pci_driv > static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id, struct pt_regs *regs) > { > irqreturn_t handle_state; >- struct AdapterControlBlock *acb; >- unsigned long flags; >- >- acb = (struct AdapterControlBlock *)dev_id; >+ struct AdapterControlBlock *acb = dev_id; > >- spin_lock_irqsave(acb->host->host_lock, flags); >+ spin_lock(acb->host->host_lock); > handle_state = arcmsr_interrupt(acb); >- spin_unlock_irqrestore(acb->host->host_lock, flags); >+ spin_unlock(acb->host->host_lock); >+ > return handle_state; > } > >@@ -231,69 +209,170 @@ static int arcmsr_bios_param(struct scsi > return 0; > } > >-static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) >+static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) > { > struct pci_dev *pdev = acb->pdev; >- struct MessageUnit __iomem *reg = acb->pmu; >- u32 ccb_phyaddr_hi32; >- void *dma_coherent; >- dma_addr_t dma_coherent_handle, dma_addr; >- struct CommandControlBlock *ccb_tmp; >- int i, j; >+ u16 dev_id; >+ pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); >+ switch (dev_id) { >+ case 0x1201 : { >+ acb->adapter_type = ACB_ADAPTER_TYPE_B; >+ } >+ break; >+ >+ default : acb->adapter_type = ACB_ADAPTER_TYPE_A; >+ } >+} >+ >+static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) >+{ >+ >+ switch (acb->adapter_type) { > >- dma_coherent = dma_alloc_coherent(&pdev->dev, >+ case ACB_ADAPTER_TYPE_A: { >+ struct pci_dev *pdev = acb->pdev; >+ void *dma_coherent; >+ dma_addr_t dma_coherent_handle, dma_addr; >+ struct CommandControlBlock *ccb_tmp; >+ uint32_t intmask_org; >+ int i, j; >+ >+ acb->pmuA = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); >+ if (!acb->pmuA) { >+ printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", >+ acb->host->host_no); >+ return -ENOMEM; >+ } >+ >+ dma_coherent = dma_alloc_coherent(&pdev->dev, > ARCMSR_MAX_FREECCB_NUM * > sizeof (struct CommandControlBlock) + 0x20, > &dma_coherent_handle, GFP_KERNEL); >- if (!dma_coherent) >- return -ENOMEM; > >- acb->dma_coherent = dma_coherent; >- acb->dma_coherent_handle = dma_coherent_handle; >+ if (!dma_coherent) { >+ iounmap(acb->pmuA); >+ return -ENOMEM; >+ } > >- if (((unsigned long)dma_coherent & 0x1F)) { >- dma_coherent = dma_coherent + >- (0x20 - ((unsigned long)dma_coherent & 0x1F)); >- dma_coherent_handle = dma_coherent_handle + >- (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); >- } >+ acb->dma_coherent = dma_coherent; >+ acb->dma_coherent_handle = dma_coherent_handle; > >- dma_addr = dma_coherent_handle; >- ccb_tmp = (struct CommandControlBlock *)dma_coherent; >- for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { >- ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; >- ccb_tmp->acb = acb; >- acb->pccb_pool[i] = ccb_tmp; >- list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); >- dma_addr = dma_addr + sizeof (struct CommandControlBlock); >- ccb_tmp++; >- } >+ if (((unsigned long)dma_coherent & 0x1F)) { >+ dma_coherent = dma_coherent + >+ (0x20 - ((unsigned long)dma_coherent & 0x1F)); >+ dma_coherent_handle = dma_coherent_handle + >+ (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); >+ } > >- acb->vir2phy_offset = (unsigned long)ccb_tmp - >- (unsigned long)dma_addr; >- for (i = 0; i < ARCMSR_MAX_TARGETID; i++) >- for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) >- acb->devstate[i][j] = ARECA_RAID_GOOD; >+ dma_addr = dma_coherent_handle; >+ ccb_tmp = (struct CommandControlBlock *)dma_coherent; >+ for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { >+ ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; >+ ccb_tmp->acb = acb; >+ acb->pccb_pool[i] = ccb_tmp; >+ list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); >+ dma_addr = dma_addr + sizeof(struct CommandControlBlock); >+ ccb_tmp++; >+ } > >- /* >- ** here we need to tell iop 331 our ccb_tmp.HighPart >- ** if ccb_tmp.HighPart is not zero >- */ >- ccb_phyaddr_hi32 = (uint32_t) ((dma_coherent_handle >> 16) >> 16); >- if (ccb_phyaddr_hi32 != 0) { >- writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->message_rwbuffer[0]); >- writel(ccb_phyaddr_hi32, ®->message_rwbuffer[1]); >- writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); >- if (arcmsr_wait_msgint_ready(acb)) >- printk(KERN_NOTICE "arcmsr%d: " >- "'set ccb high part physical address' timeout\n", >- acb->host->host_no); >- } >+ acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr; >+ for (i = 0; i < ARCMSR_MAX_TARGETID; i++) >+ for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) >+ acb->devstate[i][j] = ARECA_RAID_GONE; >+ >+ /* >+ ** here we need to tell iop 331 our ccb_tmp.HighPart >+ ** if ccb_tmp.HighPart is not zero >+ */ >+ intmask_org = arcmsr_disable_outbound_ints(acb); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ >+ struct pci_dev *pdev = acb->pdev; >+ struct MessageUnit_B *reg; >+ void __iomem *mem_base0, *mem_base1; >+ void *dma_coherent; >+ dma_addr_t dma_coherent_handle, dma_addr; >+ uint32_t intmask_org; >+ struct CommandControlBlock *ccb_tmp; >+ int i, j; >+ >+ dma_coherent = dma_alloc_coherent(&pdev->dev, >+ ((ARCMSR_MAX_FREECCB_NUM * >+ sizeof(struct CommandControlBlock) + 0x20) + >+ sizeof(struct MessageUnit_B)), >+ &dma_coherent_handle, GFP_KERNEL); >+ if (!dma_coherent) >+ return -ENOMEM; >+ >+ acb->dma_coherent = dma_coherent; >+ acb->dma_coherent_handle = dma_coherent_handle; >+ >+ if (((unsigned long)dma_coherent & 0x1F)) { >+ dma_coherent = dma_coherent + >+ (0x20 - ((unsigned long)dma_coherent & 0x1F)); >+ dma_coherent_handle = dma_coherent_handle + >+ (0x20 - ((unsigned long)dma_coherent_handle & 0x1F)); >+ } >+ >+ dma_addr = dma_coherent_handle; >+ ccb_tmp = (struct CommandControlBlock *)dma_coherent; >+ for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { >+ ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5; >+ ccb_tmp->acb = acb; >+ acb->pccb_pool[i] = ccb_tmp; >+ list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); >+ dma_addr = dma_addr + sizeof(struct CommandControlBlock); >+ ccb_tmp++; >+ } >+ >+ reg = (struct MessageUnit_B *)(dma_coherent + >+ ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock)); >+ acb->pmuB = reg; >+ mem_base0 = ioremap(pci_resource_start(pdev, 0), >+ pci_resource_len(pdev, 0)); >+ if (!mem_base0) >+ goto out; >+ >+ mem_base1 = ioremap(pci_resource_start(pdev, 2), >+ pci_resource_len(pdev, 2)); >+ if (!mem_base1) { >+ iounmap(mem_base0); >+ goto out; >+ } >+ >+ reg->drv2iop_doorbell_reg = mem_base0 + ARCMSR_DRV2IOP_DOORBELL; >+ reg->drv2iop_doorbell_mask_reg = mem_base0 + >+ ARCMSR_DRV2IOP_DOORBELL_MASK; >+ reg->iop2drv_doorbell_reg = mem_base0 + ARCMSR_IOP2DRV_DOORBELL; >+ reg->iop2drv_doorbell_mask_reg = mem_base0 + >+ ARCMSR_IOP2DRV_DOORBELL_MASK; >+ reg->ioctl_wbuffer_reg = mem_base1 + ARCMSR_IOCTL_WBUFFER; >+ reg->ioctl_rbuffer_reg = mem_base1 + ARCMSR_IOCTL_RBUFFER; >+ reg->msgcode_rwbuffer_reg = mem_base1 + ARCMSR_MSGCODE_RWBUFFER; >+ >+ acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr; >+ for (i = 0; i < ARCMSR_MAX_TARGETID; i++) >+ for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) >+ acb->devstate[i][j] = ARECA_RAID_GOOD; > >- writel(readl(®->outbound_intmask) | >- ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, >- ®->outbound_intmask); >+ /* >+ ** here we need to tell iop 331 our ccb_tmp.HighPart >+ ** if ccb_tmp.HighPart is not zero >+ */ >+ intmask_org = arcmsr_disable_outbound_ints(acb); >+ } >+ break; >+ } > return 0; >+ >+out: >+ dma_free_coherent(&acb->pdev->dev, >+ (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 + >+ sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle); >+ return -ENOMEM; > } > > static int arcmsr_probe(struct pci_dev *pdev, >@@ -343,16 +422,11 @@ static int arcmsr_probe(struct pci_dev * > host->unique_id = (bus << 8) | dev_fun; > host->irq = pdev->irq; > error = pci_request_regions(pdev, "arcmsr"); >- if (error) >+ if (error) { > goto out_host_put; >- >- acb->pmu = ioremap(pci_resource_start(pdev, 0), >- pci_resource_len(pdev, 0)); >- if (!acb->pmu) { >- printk(KERN_NOTICE "arcmsr%d: memory" >- " mapping region fail \n", acb->host->host_no); >- goto out_release_regions; > } >+ arcmsr_define_adapter_type(acb); >+ > acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | > ACB_F_MESSAGE_RQBUFFER_CLEARED | > ACB_F_MESSAGE_WQBUFFER_READED); >@@ -361,15 +435,17 @@ static int arcmsr_probe(struct pci_dev * > > error = arcmsr_alloc_ccb_pool(acb); > if (error) >- goto out_iounmap; >+ goto out_release_regions; > > error = request_irq(pdev->irq, arcmsr_do_interrupt, >- SA_INTERRUPT | SA_SHIRQ, "arcmsr", acb); >+ SA_INTERRUPT| SA_SHIRQ, "arcmsr", acb); > if (error) > goto out_free_ccb_pool; > > arcmsr_iop_init(acb); > pci_set_drvdata(pdev, host); >+ if (strncmp(acb->firm_version, "V1.42", 5) >= 0) >+ host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B; > > error = scsi_add_host(host, &pdev->dev); > if (error) >@@ -386,8 +462,6 @@ static int arcmsr_probe(struct pci_dev * > free_irq(pdev->irq, acb); > out_free_ccb_pool: > arcmsr_free_ccb_pool(acb); >- out_iounmap: >- iounmap(acb->pmu); > out_release_regions: > pci_release_regions(pdev); > out_host_put: >@@ -398,17 +472,85 @@ static int arcmsr_probe(struct pci_dev * > return error; > } > >-static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) >+static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ uint32_t Index; >+ uint8_t Retries = 0x00; >+ >+ do { >+ for (Index = 0; Index < 100; Index++) { >+ if (readl(®->outbound_intstatus) & >+ ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { >+ writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, >+ ®->outbound_intstatus); >+ return 0x00; >+ } >+ msleep(10); >+ }/*max 1 seconds*/ >+ >+ } while (Retries++ < 20);/*max 20 sec*/ >+ return 0xff; >+} >+ >+static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_B *reg = acb->pmuB; >+ uint32_t Index; >+ uint8_t Retries = 0x00; >+ >+ do { >+ for (Index = 0; Index < 100; Index++) { >+ if (readl(reg->iop2drv_doorbell_reg) >+ & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { >+ writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN >+ , reg->iop2drv_doorbell_reg); >+ writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); >+ return 0x00; >+ } >+ msleep(10); >+ }/*max 1 seconds*/ >+ >+ } while (Retries++ < 20);/*max 20 sec*/ >+ return 0xff; >+} >+ >+static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; > > writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); >- if (arcmsr_wait_msgint_ready(acb)) >+ if (arcmsr_hba_wait_msgint_ready(acb)) > printk(KERN_NOTICE > "arcmsr%d: wait 'abort all outstanding command' timeout \n" > , acb->host->host_no); > } > >+static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_B *reg = acb->pmuB; >+ >+ writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg); >+ if (arcmsr_hbb_wait_msgint_ready(acb)) >+ printk(KERN_NOTICE >+ "arcmsr%d: wait 'abort all outstanding command' timeout \n" >+ , acb->host->host_no); >+} >+ >+static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ arcmsr_abort_hba_allcmd(acb); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ arcmsr_abort_hbb_allcmd(acb); >+ } >+ } >+} >+ > static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) > { > struct AdapterControlBlock *acb = ccb->acb; >@@ -440,28 +582,239 @@ static void arcmsr_ccb_complete(struct C > pcmd->scsi_done(pcmd); > } > >+static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ int retry_count = 30; >+ >+ writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); >+ do { >+ if (!arcmsr_hba_wait_msgint_ready(acb)) >+ break; >+ else { >+ retry_count--; >+ printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ >+ timeout, retry count down = %d \n", acb->host->host_no, retry_count); >+ } >+ } while (retry_count != 0); >+} >+ >+static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_B *reg = acb->pmuB; >+ int retry_count = 30; >+ >+ writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg); >+ do { >+ if (!arcmsr_hbb_wait_msgint_ready(acb)) >+ break; >+ else { >+ retry_count--; >+ printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ >+ timeout,retry count down = %d \n", acb->host->host_no, retry_count); >+ } >+ } while (retry_count != 0); >+} >+ >+static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A: { >+ arcmsr_flush_hba_cache(acb); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ arcmsr_flush_hbb_cache(acb); >+ } >+ } >+} >+ >+static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) >+{ >+ >+ struct scsi_cmnd *pcmd = ccb->pcmd; >+ struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; >+ >+ pcmd->result = DID_OK << 16; >+ if (sensebuffer) { >+ int sense_data_length = >+ sizeof(struct SENSE_DATA) < sizeof(pcmd->sense_buffer) >+ ? sizeof(struct SENSE_DATA) : sizeof(pcmd->sense_buffer); >+ memset(sensebuffer, 0, sizeof(pcmd->sense_buffer)); >+ memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); >+ sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; >+ sensebuffer->Valid = 1; >+ } >+} >+ >+static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) >+{ >+ u32 orig_mask = 0; >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A : { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ orig_mask = readl(®->outbound_intmask)|\ >+ ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; >+ writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ >+ ®->outbound_intmask); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B : { >+ struct MessageUnit_B *reg = acb->pmuB; >+ orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \ >+ (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); >+ writel(0, reg->iop2drv_doorbell_mask_reg); >+ } >+ break; >+ } >+ return orig_mask; >+} >+ >+static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \ >+ struct CommandControlBlock *ccb, uint32_t flag_ccb) >+{ >+ >+ uint8_t id, lun; >+ id = ccb->pcmd->device->id; >+ lun = ccb->pcmd->device->lun; >+ if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) { >+ if (acb->devstate[id][lun] == ARECA_RAID_GONE) >+ acb->devstate[id][lun] = ARECA_RAID_GOOD; >+ ccb->pcmd->result = DID_OK << 16; >+ arcmsr_ccb_complete(ccb, 1); >+ } else { >+ switch (ccb->arcmsr_cdb.DeviceStatus) { >+ case ARCMSR_DEV_SELECT_TIMEOUT: { >+ acb->devstate[id][lun] = ARECA_RAID_GONE; >+ ccb->pcmd->result = DID_NO_CONNECT << 16; >+ arcmsr_ccb_complete(ccb, 1); >+ } >+ break; >+ >+ case ARCMSR_DEV_ABORTED: >+ >+ case ARCMSR_DEV_INIT_FAIL: { >+ acb->devstate[id][lun] = ARECA_RAID_GONE; >+ ccb->pcmd->result = DID_BAD_TARGET << 16; >+ arcmsr_ccb_complete(ccb, 1); >+ } >+ break; >+ >+ case ARCMSR_DEV_CHECK_CONDITION: { >+ acb->devstate[id][lun] = ARECA_RAID_GOOD; >+ arcmsr_report_sense_info(ccb); >+ arcmsr_ccb_complete(ccb, 1); >+ } >+ break; >+ >+ default: >+ printk(KERN_NOTICE >+ "arcmsr%d: scsi id = %d lun = %d" >+ " isr get command error done, " >+ "but got unknown DeviceStatus = 0x%x \n" >+ , acb->host->host_no >+ , id >+ , lun >+ , ccb->arcmsr_cdb.DeviceStatus); >+ acb->devstate[id][lun] = ARECA_RAID_GONE; >+ ccb->pcmd->result = DID_NO_CONNECT << 16; >+ arcmsr_ccb_complete(ccb, 1); >+ break; >+ } >+ } >+} >+ >+static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb) >+ >+{ >+ struct CommandControlBlock *ccb; >+ >+ ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); >+ if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { >+ if (ccb->startdone == ARCMSR_CCB_ABORTED) { >+ struct scsi_cmnd *abortcmd = ccb->pcmd; >+ if (abortcmd) { >+ abortcmd->result |= DID_ABORT << 16; >+ arcmsr_ccb_complete(ccb, 1); >+ printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \ >+ isr got aborted command \n", acb->host->host_no, ccb); >+ } >+ } >+ printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ >+ done acb = '0x%p'" >+ "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" >+ " ccboutstandingcount = %d \n" >+ , acb->host->host_no >+ , acb >+ , ccb >+ , ccb->acb >+ , ccb->startdone >+ , atomic_read(&acb->ccboutstandingcount)); >+ } >+ else >+ arcmsr_report_ccb_state(acb, ccb, flag_ccb); >+} >+ >+static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) >+{ >+ int i = 0; >+ uint32_t flag_ccb; >+ >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ uint32_t outbound_intstatus; >+ outbound_intstatus = readl(®->outbound_intstatus) & >+ acb->outbound_int_enable; >+ /*clear and abort all outbound posted Q*/ >+ writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ >+ while (((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) >+ && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { >+ arcmsr_drain_donequeue(acb, flag_ccb); >+ } >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ /*clear all outbound posted Q*/ >+ for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { >+ if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { >+ writel(0, ®->done_qbuffer[i]); >+ arcmsr_drain_donequeue(acb, flag_ccb); >+ } >+ writel(0, ®->post_qbuffer[i]); >+ } >+ reg->doneq_index = 0; >+ reg->postq_index = 0; >+ } >+ break; >+ } >+} > static void arcmsr_remove(struct pci_dev *pdev) > { > struct Scsi_Host *host = pci_get_drvdata(pdev); > struct AdapterControlBlock *acb = > (struct AdapterControlBlock *) host->hostdata; >- struct MessageUnit __iomem *reg = acb->pmu; > int poll_count = 0; > > arcmsr_free_sysfs_attr(acb); > scsi_remove_host(host); > arcmsr_stop_adapter_bgrb(acb); > arcmsr_flush_adapter_cache(acb); >- writel(readl(®->outbound_intmask) | >- ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, >- ®->outbound_intmask); >+ arcmsr_disable_outbound_ints(acb); > acb->acb_flags |= ACB_F_SCSISTOPADAPTER; > acb->acb_flags &= ~ACB_F_IOP_INITED; > >- for (poll_count = 0; poll_count < 256; poll_count++) { >+ for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) { > if (!atomic_read(&acb->ccboutstandingcount)) > break; >- arcmsr_interrupt(acb); >+ arcmsr_interrupt(acb);/* FIXME: need spinlock */ > msleep(25); > } > >@@ -469,8 +822,7 @@ static void arcmsr_remove(struct pci_dev > int i; > > arcmsr_abort_allcmd(acb); >- for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++) >- readl(®->outbound_queueport); >+ arcmsr_done4abort_postqueue(acb); > for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { > struct CommandControlBlock *ccb = acb->pccb_pool[i]; > if (ccb->startdone == ARCMSR_CCB_START) { >@@ -482,7 +834,6 @@ static void arcmsr_remove(struct pci_dev > } > > free_irq(pdev->irq, acb); >- iounmap(acb->pmu); > arcmsr_free_ccb_pool(acb); > pci_release_regions(pdev); > >@@ -507,85 +858,43 @@ static void arcmsr_module_exit(void) > module_init(arcmsr_module_init); > module_exit(arcmsr_module_exit); > >-static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) >+static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \ >+ u32 intmask_org) > { >- struct MessageUnit __iomem *reg = acb->pmu; >- u32 orig_mask = readl(®->outbound_intmask); >- >- writel(orig_mask | ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, >- ®->outbound_intmask); >- return orig_mask; >-} >- >-static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, >- u32 orig_mask) >-{ >- struct MessageUnit __iomem *reg = acb->pmu; > u32 mask; > >- mask = orig_mask & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | >- ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); >- writel(mask, ®->outbound_intmask); >-} >- >-static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) >-{ >- struct MessageUnit __iomem *reg=acb->pmu; >- >- writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); >- if (arcmsr_wait_msgint_ready(acb)) >- printk(KERN_NOTICE >- "arcmsr%d: wait 'flush adapter cache' timeout \n" >- , acb->host->host_no); >-} >+ switch (acb->adapter_type) { > >-static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) >-{ >- struct scsi_cmnd *pcmd = ccb->pcmd; >- struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; >+ case ACB_ADAPTER_TYPE_A : { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | >+ ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); >+ writel(mask, ®->outbound_intmask); >+ acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; >+ } >+ break; > >- pcmd->result = DID_OK << 16; >- if (sensebuffer) { >- int sense_data_length = >- sizeof (struct SENSE_DATA) < sizeof (pcmd->sense_buffer) >- ? sizeof (struct SENSE_DATA) : sizeof (pcmd->sense_buffer); >- memset(sensebuffer, 0, sizeof (pcmd->sense_buffer)); >- memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); >- sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; >- sensebuffer->Valid = 1; >+ case ACB_ADAPTER_TYPE_B : { >+ struct MessageUnit_B *reg = acb->pmuB; >+ mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \ >+ ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE); >+ writel(mask, reg->iop2drv_doorbell_mask_reg); >+ acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; >+ } > } > } > >-static uint8_t arcmsr_wait_msgint_ready(struct AdapterControlBlock *acb) >-{ >- struct MessageUnit __iomem *reg = acb->pmu; >- uint32_t Index; >- uint8_t Retries = 0x00; >- >- do { >- for (Index = 0; Index < 100; Index++) { >- if (readl(®->outbound_intstatus) >- & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { >- writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT >- , ®->outbound_intstatus); >- return 0x00; >- } >- msleep_interruptible(10); >- }/*max 1 seconds*/ >- } while (Retries++ < 20);/*max 20 sec*/ >- return 0xff; >-} >- >-static void arcmsr_build_ccb(struct AdapterControlBlock *acb, >+static int arcmsr_build_ccb(struct AdapterControlBlock *acb, > struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) > { > struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; > int8_t *psge = (int8_t *)&arcmsr_cdb->u; >- uint32_t address_lo, address_hi; >+ __le32 address_lo, address_hi; > int arccdbsize = 0x30; > >+ > ccb->pcmd = pcmd; >- memset(arcmsr_cdb, 0, sizeof (struct ARCMSR_CDB)); >+ memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); > arcmsr_cdb->Bus = 0; > arcmsr_cdb->TargetID = pcmd->device->id; > arcmsr_cdb->LUN = pcmd->device->lun; >@@ -593,6 +902,7 @@ static void arcmsr_build_ccb(struct Adap > arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len; > arcmsr_cdb->Context = (unsigned long)arcmsr_cdb; > memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); >+ > if (pcmd->use_sg) { > int length, sgcount, i, cdb_sgcount = 0; > struct scatterlist *sl; >@@ -601,6 +911,10 @@ static void arcmsr_build_ccb(struct Adap > sl = (struct scatterlist *) pcmd->request_buffer; > sgcount = pci_map_sg(acb->pdev, sl, pcmd->use_sg, > pcmd->sc_data_direction); >+ if(sgcount > ARCMSR_MAX_SG_ENTRIES) >+ { >+ return FAILED; >+ } > /* map stor port SG list to our iop SG List. */ > for (i = 0; i < sgcount; i++) { > /* Get the physical address of the current data pointer */ >@@ -619,7 +933,7 @@ static void arcmsr_build_ccb(struct Adap > > pdma_sg->addresshigh = address_hi; > pdma_sg->address = address_lo; >- pdma_sg->length = length|IS_SG64_ADDR; >+ pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); > psge += sizeof (struct SG64ENTRY); > arccdbsize += sizeof (struct SG64ENTRY); > } >@@ -630,7 +944,8 @@ static void arcmsr_build_ccb(struct Adap > arcmsr_cdb->DataLength = pcmd->request_bufflen; > if ( arccdbsize > 256) > arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; >- } else if (pcmd->request_bufflen) { >+ } >+ else if (pcmd->request_bufflen) { > dma_addr_t dma_addr; > dma_addr = pci_map_single(acb->pdev, pcmd->request_buffer, > pcmd->request_bufflen, pcmd->sc_data_direction); >@@ -654,211 +969,370 @@ static void arcmsr_build_ccb(struct Adap > arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; > ccb->ccb_flags |= CCB_FLAG_WRITE; > } >+ return SUCCESS; > } > > static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) > { >- struct MessageUnit __iomem *reg = acb->pmu; > uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr; > struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; >- > atomic_inc(&acb->ccboutstandingcount); > ccb->startdone = ARCMSR_CCB_START; >- if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) >- writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, >+ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ >+ if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) >+ writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, > ®->inbound_queueport); >- else >- writel(cdb_shifted_phyaddr, ®->inbound_queueport); >+ else { >+ writel(cdb_shifted_phyaddr, ®->inbound_queueport); >+ } >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ uint32_t ending_index, index = reg->postq_index; >+ >+ ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); >+ writel(0, ®->post_qbuffer[ending_index]); >+ if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { >+ writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ >+ ®->post_qbuffer[index]); >+ } >+ else { >+ writel(cdb_shifted_phyaddr, ®->post_qbuffer[index]); >+ } >+ index++; >+ index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ >+ reg->postq_index = index; >+ writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg); >+ } >+ break; >+ } > } > >-void arcmsr_post_Qbuffer(struct AdapterControlBlock *acb) >+static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >- struct QBUFFER __iomem *pwbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; >- uint8_t __iomem *iop_data = (uint8_t __iomem *) pwbuffer->data; >- int32_t allxfer_len = 0; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ acb->acb_flags &= ~ACB_F_MSG_START_BGRB; >+ writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); > >- if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { >- acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); >- while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) >- && (allxfer_len < 124)) { >- writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data); >- acb->wqbuf_firstindex++; >- acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; >- iop_data++; >- allxfer_len++; >- } >- writel(allxfer_len, &pwbuffer->data_len); >- writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK >- , ®->inbound_doorbell); >+ if (arcmsr_hba_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE >+ "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" >+ , acb->host->host_no); > } > } > >-static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) >+static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >- >+ struct MessageUnit_B *reg = acb->pmuB; > acb->acb_flags &= ~ACB_F_MSG_START_BGRB; >- writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); >- if (arcmsr_wait_msgint_ready(acb)) >+ writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg); >+ >+ if (arcmsr_hbb_wait_msgint_ready(acb)) { > printk(KERN_NOTICE > "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" > , acb->host->host_no); >+ } >+} >+ >+static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ arcmsr_stop_hba_bgrb(acb); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ arcmsr_stop_hbb_bgrb(acb); >+ } >+ break; >+ } > } > > static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) > { >- dma_free_coherent(&acb->pdev->dev, >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ iounmap(acb->pmuA); >+ dma_free_coherent(&acb->pdev->dev, > ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20, > acb->dma_coherent, > acb->dma_coherent_handle); >+ break; >+ } >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ iounmap(reg->drv2iop_doorbell_reg - ARCMSR_DRV2IOP_DOORBELL); >+ iounmap(reg->ioctl_wbuffer_reg - ARCMSR_IOCTL_WBUFFER); >+ dma_free_coherent(&acb->pdev->dev, >+ (ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock) + 0x20 + >+ sizeof(struct MessageUnit_B)), acb->dma_coherent, acb->dma_coherent_handle); >+ } >+ } >+} >+ >+void arcmsr_iop_message_read(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); >+ } >+ break; >+ } > } > >-static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) >+static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >- struct CommandControlBlock *ccb; >- uint32_t flag_ccb, outbound_intstatus, outbound_doorbell; >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ /* >+ ** push inbound doorbell tell iop, driver data write ok >+ ** and wait reply on next hwinterrupt for next Qbuffer post >+ */ >+ writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ /* >+ ** push inbound doorbell tell iop, driver data write ok >+ ** and wait reply on next hwinterrupt for next Qbuffer post >+ */ >+ writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg); >+ } >+ break; >+ } >+} >+ >+struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) >+{ >+ struct QBUFFER __iomem *qbuffer = NULL; >+ >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ qbuffer = (struct QBUFFER __iomem *) ®->message_rbuffer; >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ qbuffer = (struct QBUFFER __iomem *) reg->ioctl_rbuffer_reg; >+ } >+ break; >+ } >+ return qbuffer; >+} >+ >+static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) >+{ >+ struct QBUFFER __iomem *pqbuffer = NULL; >+ >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg; >+ } >+ break; >+ } >+ return pqbuffer; >+} >+ >+static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) >+{ >+ struct QBUFFER __iomem *prbuffer; >+ struct QBUFFER *pQbuffer; >+ uint8_t __iomem *iop_data; >+ int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; >+ >+ rqbuf_lastindex = acb->rqbuf_lastindex; >+ rqbuf_firstindex = acb->rqbuf_firstindex; >+ prbuffer = arcmsr_get_iop_rqbuffer(acb); >+ iop_data = (uint8_t __iomem *)prbuffer->data; >+ iop_len = prbuffer->data_len; >+ my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1); >+ >+ if (my_empty_len >= iop_len) >+ { >+ while (iop_len > 0) { >+ pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; >+ memcpy(pQbuffer, iop_data,1); >+ rqbuf_lastindex++; >+ rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; >+ iop_data++; >+ iop_len--; >+ } >+ acb->rqbuf_lastindex = rqbuf_lastindex; >+ arcmsr_iop_message_read(acb); >+ } > >- outbound_intstatus = readl(®->outbound_intstatus) >- & acb->outbound_int_enable; >+ else { >+ acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; >+ } >+} >+ >+static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) >+{ >+ acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; >+ if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { >+ uint8_t *pQbuffer; >+ struct QBUFFER __iomem *pwbuffer; >+ uint8_t __iomem *iop_data; >+ int32_t allxfer_len = 0; >+ >+ acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); >+ pwbuffer = arcmsr_get_iop_wqbuffer(acb); >+ iop_data = (uint8_t __iomem *)pwbuffer->data; >+ >+ while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ >+ (allxfer_len < 124)) { >+ pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; >+ memcpy(iop_data, pQbuffer, 1); >+ acb->wqbuf_firstindex++; >+ acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; >+ iop_data++; >+ allxfer_len++; >+ } >+ pwbuffer->data_len = allxfer_len; >+ >+ arcmsr_iop_message_wrote(acb); >+ } >+ >+ if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { >+ acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; >+ } >+} >+ >+static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) >+{ >+ uint32_t outbound_doorbell; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ >+ outbound_doorbell = readl(®->outbound_doorbell); >+ writel(outbound_doorbell, ®->outbound_doorbell); >+ if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { >+ arcmsr_iop2drv_data_wrote_handle(acb); >+ } >+ >+ if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { >+ arcmsr_iop2drv_data_read_handle(acb); >+ } >+} >+ >+static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) >+{ >+ uint32_t flag_ccb; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ >+ while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { >+ arcmsr_drain_donequeue(acb, flag_ccb); >+ } >+} >+ >+static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) >+{ >+ uint32_t index; >+ uint32_t flag_ccb; >+ struct MessageUnit_B *reg = acb->pmuB; >+ >+ index = reg->doneq_index; >+ >+ while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { >+ writel(0, ®->done_qbuffer[index]); >+ arcmsr_drain_donequeue(acb, flag_ccb); >+ index++; >+ index %= ARCMSR_MAX_HBB_POSTQUEUE; >+ reg->doneq_index = index; >+ } >+} >+ >+static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) >+{ >+ uint32_t outbound_intstatus; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ >+ outbound_intstatus = readl(®->outbound_intstatus) & \ >+ acb->outbound_int_enable; >+ if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { >+ return 1; >+ } > writel(outbound_intstatus, ®->outbound_intstatus); >- if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { >- outbound_doorbell = readl(®->outbound_doorbell); >- writel(outbound_doorbell, ®->outbound_doorbell); >- if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { >- struct QBUFFER __iomem * prbuffer = >- (struct QBUFFER __iomem *) ®->message_rbuffer; >- uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data; >- int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; >+ if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { >+ arcmsr_hba_doorbell_isr(acb); >+ } >+ if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { >+ arcmsr_hba_postqueue_isr(acb); >+ } >+ return 0; >+} >+ >+static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) >+{ >+ uint32_t outbound_doorbell; >+ struct MessageUnit_B *reg = acb->pmuB; >+ >+ outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \ >+ acb->outbound_int_enable; >+ if (!outbound_doorbell) >+ return 1; >+ >+ writel(~outbound_doorbell, reg->iop2drv_doorbell_reg); >+ /*in case the last action of doorbell interrupt clearance is cached, this action can push HW to write down the clear bit*/ >+ readl(reg->iop2drv_doorbell_reg); >+ writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); >+ if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { >+ arcmsr_iop2drv_data_wrote_handle(acb); >+ } >+ if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { >+ arcmsr_iop2drv_data_read_handle(acb); >+ } >+ if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { >+ arcmsr_hbb_postqueue_isr(acb); >+ } >+ >+ return 0; >+} > >- rqbuf_lastindex = acb->rqbuf_lastindex; >- rqbuf_firstindex = acb->rqbuf_firstindex; >- iop_len = readl(&prbuffer->data_len); >- my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) >- &(ARCMSR_MAX_QBUFFER - 1); >- if (my_empty_len >= iop_len) { >- while (iop_len > 0) { >- acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); >- acb->rqbuf_lastindex++; >- acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; >- iop_data++; >- iop_len--; >- } >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, >- ®->inbound_doorbell); >- } else >- acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; >- } >- if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { >- acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; >- if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { >- struct QBUFFER __iomem * pwbuffer = >- (struct QBUFFER __iomem *) ®->message_wbuffer; >- uint8_t __iomem * iop_data = (uint8_t __iomem *) pwbuffer->data; >- int32_t allxfer_len = 0; >- >- acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); >- while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) >- && (allxfer_len < 124)) { >- writeb(acb->wqbuffer[acb->wqbuf_firstindex], iop_data); >- acb->wqbuf_firstindex++; >- acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; >- iop_data++; >- allxfer_len++; >- } >- writel(allxfer_len, &pwbuffer->data_len); >- writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, >- ®->inbound_doorbell); >- } >- if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) >- acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; >+static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ if (arcmsr_handle_hba_isr(acb)) { >+ return IRQ_NONE; > } >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ if (arcmsr_handle_hbb_isr(acb)) { >+ return IRQ_NONE; >+ } >+ } >+ break; > } >- if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { >- int id, lun; >- /* >- **************************************************************** >- ** areca cdb command done >- **************************************************************** >- */ >- while (1) { >- if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) >- break;/*chip FIFO no ccb for completion already*/ >- /* check if command done with no error*/ >- ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + >- (flag_ccb << 5)); >- if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { >- if (ccb->startdone == ARCMSR_CCB_ABORTED) { >- struct scsi_cmnd *abortcmd=ccb->pcmd; >- if (abortcmd) { >- abortcmd->result |= DID_ABORT >> 16; >- arcmsr_ccb_complete(ccb, 1); >- printk(KERN_NOTICE >- "arcmsr%d: ccb='0x%p' isr got aborted command \n" >- , acb->host->host_no, ccb); >- } >- continue; >- } >- printk(KERN_NOTICE >- "arcmsr%d: isr get an illegal ccb command done acb='0x%p'" >- "ccb='0x%p' ccbacb='0x%p' startdone = 0x%x" >- " ccboutstandingcount=%d \n" >- , acb->host->host_no >- , acb >- , ccb >- , ccb->acb >- , ccb->startdone >- , atomic_read(&acb->ccboutstandingcount)); >- continue; >- } >- id = ccb->pcmd->device->id; >- lun = ccb->pcmd->device->lun; >- if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) { >- if (acb->devstate[id][lun] == ARECA_RAID_GONE) >- acb->devstate[id][lun] = ARECA_RAID_GOOD; >- ccb->pcmd->result = DID_OK << 16; >- arcmsr_ccb_complete(ccb, 1); >- } else { >- switch(ccb->arcmsr_cdb.DeviceStatus) { >- case ARCMSR_DEV_SELECT_TIMEOUT: { >- acb->devstate[id][lun] = ARECA_RAID_GONE; >- ccb->pcmd->result = DID_TIME_OUT << 16; >- arcmsr_ccb_complete(ccb, 1); >- } >- break; >- case ARCMSR_DEV_ABORTED: >- case ARCMSR_DEV_INIT_FAIL: { >- acb->devstate[id][lun] = ARECA_RAID_GONE; >- ccb->pcmd->result = DID_BAD_TARGET << 16; >- arcmsr_ccb_complete(ccb, 1); >- } >- break; >- case ARCMSR_DEV_CHECK_CONDITION: { >- acb->devstate[id][lun] = ARECA_RAID_GOOD; >- arcmsr_report_sense_info(ccb); >- arcmsr_ccb_complete(ccb, 1); >- } >- break; >- default: >- printk(KERN_NOTICE >- "arcmsr%d: scsi id=%d lun=%d" >- " isr get command error done," >- "but got unknown DeviceStatus = 0x%x \n" >- , acb->host->host_no >- , id >- , lun >- , ccb->arcmsr_cdb.DeviceStatus); >- acb->devstate[id][lun] = ARECA_RAID_GONE; >- ccb->pcmd->result = DID_NO_CONNECT << 16; >- arcmsr_ccb_complete(ccb, 1); >- break; >- } >- } >- }/*drain reply FIFO*/ >- } >- if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) >- return IRQ_NONE; > return IRQ_HANDLED; > } > >@@ -867,16 +1341,47 @@ static void arcmsr_iop_parking(struct Ad > if (acb) { > /* stop adapter background rebuild */ > if (acb->acb_flags & ACB_F_MSG_START_BGRB) { >+ uint32_t intmask_org; > acb->acb_flags &= ~ACB_F_MSG_START_BGRB; >+ intmask_org = arcmsr_disable_outbound_ints(acb); > arcmsr_stop_adapter_bgrb(acb); > arcmsr_flush_adapter_cache(acb); >+ arcmsr_enable_outbound_ints(acb, intmask_org); >+ } >+ } >+} >+ >+void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) >+{ >+ int32_t wqbuf_firstindex, wqbuf_lastindex; >+ uint8_t *pQbuffer; >+ struct QBUFFER __iomem *pwbuffer; >+ uint8_t __iomem *iop_data; >+ int32_t allxfer_len = 0; >+ >+ pwbuffer = arcmsr_get_iop_wqbuffer(acb); >+ iop_data = (uint8_t __iomem *)pwbuffer->data; >+ if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { >+ acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); >+ wqbuf_firstindex = acb->wqbuf_firstindex; >+ wqbuf_lastindex = acb->wqbuf_lastindex; >+ while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { >+ pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; >+ memcpy(iop_data, pQbuffer, 1); >+ wqbuf_firstindex++; >+ wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; >+ iop_data++; >+ allxfer_len++; > } >+ acb->wqbuf_firstindex = wqbuf_firstindex; >+ pwbuffer->data_len = allxfer_len; >+ arcmsr_iop_message_wrote(acb); > } > } > >-static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, struct scsi_cmnd *cmd) >+static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \ >+ struct scsi_cmnd *cmd) > { >- struct MessageUnit __iomem *reg = acb->pmu; > struct CMD_MESSAGE_FIELD *pcmdmessagefld; > int retvalue = 0, transfer_len = 0; > char *buffer; >@@ -884,7 +1389,8 @@ static int arcmsr_iop_message_xfer(struc > (uint32_t ) cmd->cmnd[6] << 16 | > (uint32_t ) cmd->cmnd[7] << 8 | > (uint32_t ) cmd->cmnd[8]; >- /* 4 bytes: Areca io control code */ >+ /* 4 bytes: Areca io control code */ >+ > if (cmd->use_sg) { > struct scatterlist *sg = (struct scatterlist *)cmd->request_buffer; > >@@ -898,197 +1404,203 @@ static int arcmsr_iop_message_xfer(struc > buffer = cmd->request_buffer; > transfer_len = cmd->request_bufflen; > } >+ > if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { > retvalue = ARCMSR_MESSAGE_FAIL; > goto message_out; > } > pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; > switch(controlcode) { >+ > case ARCMSR_MESSAGE_READ_RQBUFFER: { >- unsigned long *ver_addr; >- dma_addr_t buf_handle; >- uint8_t *pQbuffer, *ptmpQbuffer; >- int32_t allxfer_len = 0; >+ unsigned char *ver_addr; >+ uint8_t *pQbuffer, *ptmpQbuffer; >+ int32_t allxfer_len = 0; > >- ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle); >- if (!ver_addr) { >- retvalue = ARCMSR_MESSAGE_FAIL; >- goto message_out; >- } >- ptmpQbuffer = (uint8_t *) ver_addr; >- while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) >- && (allxfer_len < 1031)) { >- pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; >- memcpy(ptmpQbuffer, pQbuffer, 1); >- acb->rqbuf_firstindex++; >- acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; >- ptmpQbuffer++; >- allxfer_len++; >- } >- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >- struct QBUFFER __iomem * prbuffer = (struct QBUFFER __iomem *) >- ®->message_rbuffer; >- uint8_t __iomem * iop_data = (uint8_t __iomem *)prbuffer->data; >- int32_t iop_len; >- >- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >- iop_len = readl(&prbuffer->data_len); >- while (iop_len > 0) { >- acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); >- acb->rqbuf_lastindex++; >- acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; >- iop_data++; >- iop_len--; >- } >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, >- ®->inbound_doorbell); >+ >+ ver_addr = kmalloc(1032, GFP_ATOMIC); >+ if (!ver_addr) { >+ retvalue = ARCMSR_MESSAGE_FAIL; >+ goto message_out; >+ } >+ ptmpQbuffer = ver_addr; >+ while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) >+ && (allxfer_len < 1031)) { >+ pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; >+ memcpy(ptmpQbuffer, pQbuffer, 1); >+ acb->rqbuf_firstindex++; >+ acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; >+ ptmpQbuffer++; >+ allxfer_len++; >+ } >+ if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >+ >+ struct QBUFFER __iomem *prbuffer; >+ uint8_t __iomem *iop_data; >+ int32_t iop_len; >+ >+ acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >+ prbuffer = arcmsr_get_iop_rqbuffer(acb); >+ iop_data = prbuffer->data; >+ iop_len = readl(&prbuffer->data_len); >+ while (iop_len > 0) { >+ acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); >+ acb->rqbuf_lastindex++; >+ acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; >+ iop_data++; >+ iop_len--; > } >- memcpy(pcmdmessagefld->messagedatabuffer, >- (uint8_t *)ver_addr, allxfer_len); >- pcmdmessagefld->cmdmessage.Length = allxfer_len; >- pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; >- pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle); >+ arcmsr_iop_message_read(acb); >+ } >+ memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); >+ pcmdmessagefld->cmdmessage.Length = allxfer_len; >+ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; >+ kfree(ver_addr); > } > break; >+ > case ARCMSR_MESSAGE_WRITE_WQBUFFER: { >- unsigned long *ver_addr; >- dma_addr_t buf_handle; >- int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; >- uint8_t *pQbuffer, *ptmpuserbuffer; >+ unsigned char *ver_addr; >+ int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; >+ uint8_t *pQbuffer, *ptmpuserbuffer; > >- ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle); >- if (!ver_addr) { >- retvalue = ARCMSR_MESSAGE_FAIL; >- goto message_out; >- } >- ptmpuserbuffer = (uint8_t *)ver_addr; >- user_len = pcmdmessagefld->cmdmessage.Length; >- memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); >- wqbuf_lastindex = acb->wqbuf_lastindex; >- wqbuf_firstindex = acb->wqbuf_firstindex; >- if (wqbuf_lastindex != wqbuf_firstindex) { >+ ver_addr = kmalloc(1032, GFP_ATOMIC); >+ if (!ver_addr) { >+ retvalue = ARCMSR_MESSAGE_FAIL; >+ goto message_out; >+ } >+ ptmpuserbuffer = ver_addr; >+ user_len = pcmdmessagefld->cmdmessage.Length; >+ memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); >+ wqbuf_lastindex = acb->wqbuf_lastindex; >+ wqbuf_firstindex = acb->wqbuf_firstindex; >+ if (wqbuf_lastindex != wqbuf_firstindex) { >+ struct SENSE_DATA *sensebuffer = >+ (struct SENSE_DATA *)cmd->sense_buffer; >+ arcmsr_post_ioctldata2iop(acb); >+ /* has error report sensedata */ >+ sensebuffer->ErrorCode = 0x70; >+ sensebuffer->SenseKey = ILLEGAL_REQUEST; >+ sensebuffer->AdditionalSenseLength = 0x0A; >+ sensebuffer->AdditionalSenseCode = 0x20; >+ sensebuffer->Valid = 1; >+ retvalue = ARCMSR_MESSAGE_FAIL; >+ } else { >+ my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) >+ &(ARCMSR_MAX_QBUFFER - 1); >+ if (my_empty_len >= user_len) { >+ while (user_len > 0) { >+ pQbuffer = >+ &acb->wqbuffer[acb->wqbuf_lastindex]; >+ memcpy(pQbuffer, ptmpuserbuffer, 1); >+ acb->wqbuf_lastindex++; >+ acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; >+ ptmpuserbuffer++; >+ user_len--; >+ } >+ if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { >+ acb->acb_flags &= >+ ~ACB_F_MESSAGE_WQBUFFER_CLEARED; >+ arcmsr_post_ioctldata2iop(acb); >+ } >+ } else { >+ /* has error report sensedata */ > struct SENSE_DATA *sensebuffer = > (struct SENSE_DATA *)cmd->sense_buffer; >- arcmsr_post_Qbuffer(acb); >- /* has error report sensedata */ > sensebuffer->ErrorCode = 0x70; > sensebuffer->SenseKey = ILLEGAL_REQUEST; > sensebuffer->AdditionalSenseLength = 0x0A; > sensebuffer->AdditionalSenseCode = 0x20; > sensebuffer->Valid = 1; > retvalue = ARCMSR_MESSAGE_FAIL; >- } else { >- my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) >- &(ARCMSR_MAX_QBUFFER - 1); >- if (my_empty_len >= user_len) { >- while (user_len > 0) { >- pQbuffer = >- &acb->wqbuffer[acb->wqbuf_lastindex]; >- memcpy(pQbuffer, ptmpuserbuffer, 1); >- acb->wqbuf_lastindex++; >- acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; >- ptmpuserbuffer++; >- user_len--; >- } >- if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { >- acb->acb_flags &= >- ~ACB_F_MESSAGE_WQBUFFER_CLEARED; >- arcmsr_post_Qbuffer(acb); >- } >- } else { >- /* has error report sensedata */ >- struct SENSE_DATA *sensebuffer = >- (struct SENSE_DATA *)cmd->sense_buffer; >- sensebuffer->ErrorCode = 0x70; >- sensebuffer->SenseKey = ILLEGAL_REQUEST; >- sensebuffer->AdditionalSenseLength = 0x0A; >- sensebuffer->AdditionalSenseCode = 0x20; >- sensebuffer->Valid = 1; >- retvalue = ARCMSR_MESSAGE_FAIL; >- } > } >- pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle); >+ } >+ kfree(ver_addr); > } > break; >+ > case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { >- uint8_t *pQbuffer = acb->rqbuffer; >+ uint8_t *pQbuffer = acb->rqbuffer; > >- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, >- ®->inbound_doorbell); >- } >- acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; >- acb->rqbuf_firstindex = 0; >- acb->rqbuf_lastindex = 0; >- memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); >- pcmdmessagefld->cmdmessage.ReturnCode = >- ARCMSR_MESSAGE_RETURNCODE_OK; >+ if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >+ acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >+ arcmsr_iop_message_read(acb); >+ } >+ acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; >+ acb->rqbuf_firstindex = 0; >+ acb->rqbuf_lastindex = 0; >+ memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); >+ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; > } > break; >+ > case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { >- uint8_t *pQbuffer = acb->wqbuffer; >+ uint8_t *pQbuffer = acb->wqbuffer; > >- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK >- , ®->inbound_doorbell); >- } >- acb->acb_flags |= >- (ACB_F_MESSAGE_WQBUFFER_CLEARED | >- ACB_F_MESSAGE_WQBUFFER_READED); >- acb->wqbuf_firstindex = 0; >- acb->wqbuf_lastindex = 0; >- memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); >- pcmdmessagefld->cmdmessage.ReturnCode = >- ARCMSR_MESSAGE_RETURNCODE_OK; >+ if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >+ acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >+ arcmsr_iop_message_read(acb); >+ } >+ acb->acb_flags |= >+ (ACB_F_MESSAGE_WQBUFFER_CLEARED | >+ ACB_F_MESSAGE_WQBUFFER_READED); >+ acb->wqbuf_firstindex = 0; >+ acb->wqbuf_lastindex = 0; >+ memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); >+ pcmdmessagefld->cmdmessage.ReturnCode = >+ ARCMSR_MESSAGE_RETURNCODE_OK; > } > break; >+ > case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { >- uint8_t *pQbuffer; >+ uint8_t *pQbuffer; > >- if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >- acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK >- , ®->inbound_doorbell); >- } >- acb->acb_flags |= >- (ACB_F_MESSAGE_WQBUFFER_CLEARED >- | ACB_F_MESSAGE_RQBUFFER_CLEARED >- | ACB_F_MESSAGE_WQBUFFER_READED); >- acb->rqbuf_firstindex = 0; >- acb->rqbuf_lastindex = 0; >- acb->wqbuf_firstindex = 0; >- acb->wqbuf_lastindex = 0; >- pQbuffer = acb->rqbuffer; >- memset(pQbuffer, 0, sizeof (struct QBUFFER)); >- pQbuffer = acb->wqbuffer; >- memset(pQbuffer, 0, sizeof (struct QBUFFER)); >- pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; >+ if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { >+ acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; >+ arcmsr_iop_message_read(acb); >+ } >+ acb->acb_flags |= >+ (ACB_F_MESSAGE_WQBUFFER_CLEARED >+ | ACB_F_MESSAGE_RQBUFFER_CLEARED >+ | ACB_F_MESSAGE_WQBUFFER_READED); >+ acb->rqbuf_firstindex = 0; >+ acb->rqbuf_lastindex = 0; >+ acb->wqbuf_firstindex = 0; >+ acb->wqbuf_lastindex = 0; >+ pQbuffer = acb->rqbuffer; >+ memset(pQbuffer, 0, sizeof(struct QBUFFER)); >+ pQbuffer = acb->wqbuffer; >+ memset(pQbuffer, 0, sizeof(struct QBUFFER)); >+ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; > } > break; >+ > case ARCMSR_MESSAGE_RETURN_CODE_3F: { >- pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; >+ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F; > } > break; >+ > case ARCMSR_MESSAGE_SAY_HELLO: { >- int8_t * hello_string = "Hello! I am ARCMSR"; >+ int8_t *hello_string = "Hello! I am ARCMSR"; > >- memcpy(pcmdmessagefld->messagedatabuffer, hello_string >- , (int16_t)strlen(hello_string)); >- pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; >+ memcpy(pcmdmessagefld->messagedatabuffer, hello_string >+ , (int16_t)strlen(hello_string)); >+ pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; > } > break; >+ > case ARCMSR_MESSAGE_SAY_GOODBYE: > arcmsr_iop_parking(acb); > break; >+ > case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: > arcmsr_flush_adapter_cache(acb); > break; >+ > default: > retvalue = ARCMSR_MESSAGE_FAIL; > } >- message_out: >+ message_out: > if (cmd->use_sg) { > struct scatterlist *sg; > >@@ -1128,7 +1640,7 @@ static void arcmsr_handle_virtual_comman > inqdata[1] = 0; > /* rem media bit & Dev Type Modifier */ > inqdata[2] = 0; >- /* ISO,ECMA,& ANSI versions */ >+ /* ISO, ECMA, & ANSI versions */ > inqdata[4] = 31; > /* length of additional data */ > strncpy(&inqdata[8], "Areca ", 8); >@@ -1166,12 +1678,10 @@ static void arcmsr_handle_virtual_comman > } > } > >-static int arcmsr_queue_command(struct scsi_cmnd *cmd, >- void (* done)(struct scsi_cmnd *)) >+static int arcmsr_queue_command(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) > { > struct Scsi_Host *host = cmd->device->host; >- struct AdapterControlBlock *acb = >- (struct AdapterControlBlock *) host->hostdata; >+ struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; > struct CommandControlBlock *ccb; > int target = cmd->device->id; > int lun = cmd->device->lun; >@@ -1185,7 +1695,7 @@ static int arcmsr_queue_command(struct s > , acb->host->host_no); > return SCSI_MLQUEUE_HOST_BUSY; > } >- if(target == 16) { >+ if (target == 16) { > /* virtual device for iop message transfer */ > arcmsr_handle_virtual_command(acb, cmd); > return 0; >@@ -1198,7 +1708,7 @@ static int arcmsr_queue_command(struct s > printk(KERN_NOTICE > "arcmsr%d: block 'read/write'" > "command with gone raid volume" >- " Cmd=%2x, TargetId=%d, Lun=%d \n" >+ " Cmd = %2x, TargetId = %d, Lun = %d \n" > , acb->host->host_no > , cmd->cmnd[0] > , target, lun); >@@ -1214,26 +1724,31 @@ static int arcmsr_queue_command(struct s > ccb = arcmsr_get_freeccb(acb); > if (!ccb) > return SCSI_MLQUEUE_HOST_BUSY; >- arcmsr_build_ccb(acb, ccb, cmd); >+ if ( arcmsr_build_ccb(acb, ccb, cmd) == FAILED ) >+ { >+ cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); >+ cmd->scsi_done(cmd); >+ return 0; >+ } > arcmsr_post_ccb(acb, ccb); > return 0; > } > >-static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) >+static void arcmsr_get_hba_config(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; > char *acb_firm_model = acb->firm_model; > char *acb_firm_version = acb->firm_version; >- char __iomem *iop_firm_model = (char __iomem *) ®->message_rwbuffer[15]; >- char __iomem *iop_firm_version = (char __iomem *) ®->message_rwbuffer[17]; >+ char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); >+ char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); > int count; > > writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); >- if (arcmsr_wait_msgint_ready(acb)) >- printk(KERN_NOTICE >- "arcmsr%d: wait " >- "'get adapter firmware miscellaneous data' timeout \n" >- , acb->host->host_no); >+ if (arcmsr_hba_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ >+ miscellaneous data' timeout \n", acb->host->host_no); >+ } >+ > count = 8; > while (count) { > *acb_firm_model = readb(iop_firm_model); >@@ -1241,6 +1756,7 @@ static void arcmsr_get_firmware_spec(str > iop_firm_model++; > count--; > } >+ > count = 16; > while (count) { > *acb_firm_version = readb(iop_firm_version); >@@ -1248,28 +1764,93 @@ static void arcmsr_get_firmware_spec(str > iop_firm_version++; > count--; > } >- printk(KERN_INFO >- "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n" >+ >+ printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n" > , acb->host->host_no > , acb->firm_version); >+ > acb->firm_request_len = readl(®->message_rwbuffer[1]); > acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); > acb->firm_sdram_size = readl(®->message_rwbuffer[3]); > acb->firm_hd_channels = readl(®->message_rwbuffer[4]); > } > >-static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, >+static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_B *reg = acb->pmuB; >+ uint32_t __iomem *lrwbuffer = reg->msgcode_rwbuffer_reg; >+ char *acb_firm_model = acb->firm_model; >+ char *acb_firm_version = acb->firm_version; >+ char __iomem *iop_firm_model = (char __iomem *)(&lrwbuffer[15]); >+ /*firm_model,15,60-67*/ >+ char __iomem *iop_firm_version = (char __iomem *)(&lrwbuffer[17]); >+ /*firm_version,17,68-83*/ >+ int count; >+ >+ writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg); >+ if (arcmsr_hbb_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ >+ miscellaneous data' timeout \n", acb->host->host_no); >+ } >+ >+ count = 8; >+ while (count) >+ { >+ *acb_firm_model = readb(iop_firm_model); >+ acb_firm_model++; >+ iop_firm_model++; >+ count--; >+ } >+ >+ count = 16; >+ while (count) >+ { >+ *acb_firm_version = readb(iop_firm_version); >+ acb_firm_version++; >+ iop_firm_version++; >+ count--; >+ } >+ >+ printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n", >+ acb->host->host_no, >+ acb->firm_version); >+ >+ lrwbuffer++; >+ acb->firm_request_len = readl(lrwbuffer++); >+ /*firm_request_len,1,04-07*/ >+ acb->firm_numbers_queue = readl(lrwbuffer++); >+ /*firm_numbers_queue,2,08-11*/ >+ acb->firm_sdram_size = readl(lrwbuffer++); >+ /*firm_sdram_size,3,12-15*/ >+ acb->firm_hd_channels = readl(lrwbuffer); >+ /*firm_ide_channels,4,16-19*/ >+} >+ >+static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ arcmsr_get_hba_config(acb); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ arcmsr_get_hbb_config(acb); >+ } >+ break; >+ } >+} >+ >+static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, > struct CommandControlBlock *poll_ccb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >+ struct MessageUnit_A __iomem *reg = acb->pmuA; > struct CommandControlBlock *ccb; > uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; >- int id, lun; > >- polling_ccb_retry: >+ polling_hba_ccb_retry: > poll_count++; >- outbound_intstatus = readl(®->outbound_intstatus) >- & acb->outbound_int_enable; >+ outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; > writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ > while (1) { > if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { >@@ -1279,17 +1860,14 @@ static void arcmsr_polling_ccbdone(struc > msleep(25); > if (poll_count > 100) > break; >- goto polling_ccb_retry; >+ goto polling_hba_ccb_retry; > } > } >- ccb = (struct CommandControlBlock *) >- (acb->vir2phy_offset + (flag_ccb << 5)); >- if ((ccb->acb != acb) || >- (ccb->startdone != ARCMSR_CCB_START)) { >- if ((ccb->startdone == ARCMSR_CCB_ABORTED) || >- (ccb == poll_ccb)) { >- printk(KERN_NOTICE >- "arcmsr%d: scsi id=%d lun=%d ccb='0x%p'" >+ ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5)); >+ poll_ccb_done = (ccb == poll_ccb) ? 1:0; >+ if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { >+ if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { >+ printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" > " poll command abort successfully \n" > , acb->host->host_no > , ccb->pcmd->device->id >@@ -1300,94 +1878,307 @@ static void arcmsr_polling_ccbdone(struc > poll_ccb_done = 1; > continue; > } >- printk(KERN_NOTICE >- "arcmsr%d: polling get an illegal ccb" >- " command done ccb='0x%p'" >- "ccboutstandingcount=%d \n" >+ printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" >+ " command done ccb = '0x%p'" >+ "ccboutstandingcount = %d \n" > , acb->host->host_no > , ccb > , atomic_read(&acb->ccboutstandingcount)); > continue; > } >- id = ccb->pcmd->device->id; >- lun = ccb->pcmd->device->lun; >- if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) { >- if (acb->devstate[id][lun] == ARECA_RAID_GONE) >- acb->devstate[id][lun] = ARECA_RAID_GOOD; >- ccb->pcmd->result = DID_OK << 16; >- arcmsr_ccb_complete(ccb, 1); >- } else { >- switch(ccb->arcmsr_cdb.DeviceStatus) { >- case ARCMSR_DEV_SELECT_TIMEOUT: { >- acb->devstate[id][lun] = ARECA_RAID_GONE; >- ccb->pcmd->result = DID_TIME_OUT << 16; >- arcmsr_ccb_complete(ccb, 1); >- } >- break; >- case ARCMSR_DEV_ABORTED: >- case ARCMSR_DEV_INIT_FAIL: { >- acb->devstate[id][lun] = ARECA_RAID_GONE; >- ccb->pcmd->result = DID_BAD_TARGET << 16; >- arcmsr_ccb_complete(ccb, 1); >+ arcmsr_report_ccb_state(acb, ccb, flag_ccb); >+ } >+} >+ >+static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, >+ struct CommandControlBlock *poll_ccb) >+{ >+ struct MessageUnit_B *reg = acb->pmuB; >+ struct CommandControlBlock *ccb; >+ uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; >+ int index; >+ >+ polling_hbb_ccb_retry: >+ poll_count++; >+ /* clear doorbell interrupt */ >+ writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); >+ while (1) { >+ index = reg->doneq_index; >+ if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { >+ if (poll_ccb_done) >+ break; >+ else { >+ msleep(25); >+ if (poll_count > 100) >+ break; >+ goto polling_hbb_ccb_retry; > } >- break; >- case ARCMSR_DEV_CHECK_CONDITION: { >- acb->devstate[id][lun] = ARECA_RAID_GOOD; >- arcmsr_report_sense_info(ccb); >+ } >+ writel(0, ®->done_qbuffer[index]); >+ index++; >+ /*if last index number set it to 0 */ >+ index %= ARCMSR_MAX_HBB_POSTQUEUE; >+ reg->doneq_index = index; >+ /* check ifcommand done with no error*/ >+ ccb = (struct CommandControlBlock *)\ >+ (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ >+ poll_ccb_done = (ccb == poll_ccb) ? 1:0; >+ if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { >+ if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { >+ printk(KERN_NOTICE "arcmsr%d: \ >+ scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n" >+ ,acb->host->host_no >+ ,ccb->pcmd->device->id >+ ,ccb->pcmd->device->lun >+ ,ccb); >+ ccb->pcmd->result = DID_ABORT << 16; > arcmsr_ccb_complete(ccb, 1); >+ continue; > } >- break; >- default: >- printk(KERN_NOTICE >- "arcmsr%d: scsi id=%d lun=%d" >- " polling and getting command error done" >- "but got unknown DeviceStatus = 0x%x \n" >+ printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" >+ " command done ccb = '0x%p'" >+ "ccboutstandingcount = %d \n" > , acb->host->host_no >- , id >- , lun >- , ccb->arcmsr_cdb.DeviceStatus); >- acb->devstate[id][lun] = ARECA_RAID_GONE; >- ccb->pcmd->result = DID_BAD_TARGET << 16; >- arcmsr_ccb_complete(ccb, 1); >- break; >+ , ccb >+ , atomic_read(&acb->ccboutstandingcount)); >+ continue; > } >+ arcmsr_report_ccb_state(acb, ccb, flag_ccb); >+ } /*drain reply FIFO*/ >+} >+ >+static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, >+ struct CommandControlBlock *poll_ccb) >+{ >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A: { >+ arcmsr_polling_hba_ccbdone(acb,poll_ccb); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ arcmsr_polling_hbb_ccbdone(acb,poll_ccb); > } > } > } > >-static void arcmsr_iop_init(struct AdapterControlBlock *acb) >+static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; >- uint32_t intmask_org, mask, outbound_doorbell, firmware_state = 0; >+ uint32_t cdb_phyaddr, ccb_phyaddr_hi32; >+ dma_addr_t dma_coherent_handle; >+ /* >+ ******************************************************************** >+ ** here we need to tell iop 331 our freeccb.HighPart >+ ** if freeccb.HighPart is not zero >+ ******************************************************************** >+ */ >+ dma_coherent_handle = acb->dma_coherent_handle; >+ cdb_phyaddr = (uint32_t)(dma_coherent_handle); >+ ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); >+ /* >+ *********************************************************************** >+ ** if adapter type B, set window of "post command Q" >+ *********************************************************************** >+ */ >+ switch (acb->adapter_type) { > >- do { >- firmware_state = readl(®->outbound_msgaddr1); >- } while (!(firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK)); >- intmask_org = readl(®->outbound_intmask) >- | ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE; >- arcmsr_get_firmware_spec(acb); >+ case ACB_ADAPTER_TYPE_A: { >+ if (ccb_phyaddr_hi32 != 0) { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ uint32_t intmask_org; >+ intmask_org = arcmsr_disable_outbound_ints(acb); >+ writel(ARCMSR_SIGNATURE_SET_CONFIG, \ >+ ®->message_rwbuffer[0]); >+ writel(ccb_phyaddr_hi32, ®->message_rwbuffer[1]); >+ writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ >+ ®->inbound_msgaddr0); >+ if (arcmsr_hba_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ >+ part physical address timeout\n", >+ acb->host->host_no); >+ return 1; >+ } >+ arcmsr_enable_outbound_ints(acb, intmask_org); >+ } >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ unsigned long post_queue_phyaddr; >+ uint32_t __iomem *rwbuffer; >+ >+ struct MessageUnit_B *reg = acb->pmuB; >+ uint32_t intmask_org; >+ intmask_org = arcmsr_disable_outbound_ints(acb); >+ reg->postq_index = 0; >+ reg->doneq_index = 0; >+ writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg); >+ if (arcmsr_hbb_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ >+ acb->host->host_no); >+ return 1; >+ } >+ post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \ >+ sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ; >+ rwbuffer = reg->msgcode_rwbuffer_reg; >+ /* driver "set config" signature */ >+ writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); >+ /* normal should be zero */ >+ writel(ccb_phyaddr_hi32, rwbuffer++); >+ /* postQ size (256 + 8)*4 */ >+ writel(post_queue_phyaddr, rwbuffer++); >+ /* doneQ size (256 + 8)*4 */ >+ writel(post_queue_phyaddr + 1056, rwbuffer++); >+ /* ccb maxQ size must be --> [(256 + 8)*4]*/ >+ writel(1056, rwbuffer); >+ >+ writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg); >+ if (arcmsr_hbb_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ >+ timeout \n",acb->host->host_no); >+ return 1; >+ } >+ >+ writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg); >+ if (arcmsr_hbb_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\ >+ ,acb->host->host_no); >+ return 1; >+ } >+ arcmsr_enable_outbound_ints(acb, intmask_org); >+ } >+ break; >+ } >+ return 0; >+} >+ >+static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) >+{ >+ uint32_t firmware_state = 0; >+ >+ switch (acb->adapter_type) { >+ >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ do { >+ firmware_state = readl(®->outbound_msgaddr1); >+ } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ do { >+ firmware_state = readl(reg->iop2drv_doorbell_reg); >+ } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); >+ writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell_reg); >+ } >+ break; >+ } >+} > >+static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_A __iomem *reg = acb->pmuA; > acb->acb_flags |= ACB_F_MSG_START_BGRB; > writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); >- if (arcmsr_wait_msgint_ready(acb)) { >- printk(KERN_NOTICE "arcmsr%d: " >- "wait 'start adapter background rebulid' timeout\n", >- acb->host->host_no); >+ if (arcmsr_hba_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ >+ rebulid' timeout \n", acb->host->host_no); > } >+} > >- outbound_doorbell = readl(®->outbound_doorbell); >- writel(outbound_doorbell, ®->outbound_doorbell); >- writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); >- mask = ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE >- | ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE); >- writel(intmask_org & mask, ®->outbound_intmask); >- acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; >+static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) >+{ >+ struct MessageUnit_B *reg = acb->pmuB; >+ acb->acb_flags |= ACB_F_MSG_START_BGRB; >+ writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg); >+ if (arcmsr_hbb_wait_msgint_ready(acb)) { >+ printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ >+ rebulid' timeout \n",acb->host->host_no); >+ } >+} >+ >+static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: >+ arcmsr_start_hba_bgrb(acb); >+ break; >+ case ACB_ADAPTER_TYPE_B: >+ arcmsr_start_hbb_bgrb(acb); >+ break; >+ } >+} >+ >+static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) { >+ case ACB_ADAPTER_TYPE_A: { >+ struct MessageUnit_A __iomem *reg = acb->pmuA; >+ uint32_t outbound_doorbell; >+ /* empty doorbell Qbuffer if door bell ringed */ >+ outbound_doorbell = readl(®->outbound_doorbell); >+ /*clear doorbell interrupt */ >+ writel(outbound_doorbell, ®->outbound_doorbell); >+ writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); >+ } >+ break; >+ >+ case ACB_ADAPTER_TYPE_B: { >+ struct MessageUnit_B *reg = acb->pmuB; >+ /*clear interrupt and message state*/ >+ writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg); >+ writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg); >+ /* let IOP know data has been read */ >+ } >+ break; >+ } >+} >+ >+static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) >+{ >+ switch (acb->adapter_type) >+ { >+ case ACB_ADAPTER_TYPE_A: >+ return; >+ case ACB_ADAPTER_TYPE_B: >+ { >+ struct MessageUnit_B *reg = acb->pmuB; >+ writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell_reg); >+ if(arcmsr_hbb_wait_msgint_ready(acb)) >+ { >+ printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); >+ return; >+ } >+ } >+ break; >+ } >+ return; >+} >+ >+static void arcmsr_iop_init(struct AdapterControlBlock *acb) >+{ >+ uint32_t intmask_org; >+ >+ /* disable all outbound interrupt */ >+ intmask_org = arcmsr_disable_outbound_ints(acb); >+ arcmsr_wait_firmware_ready(acb); >+ arcmsr_iop_confirm(acb); >+ arcmsr_get_firmware_spec(acb); >+ /*start background rebuild*/ >+ arcmsr_start_adapter_bgrb(acb); >+ /* empty doorbell Qbuffer if door bell ringed */ >+ arcmsr_clear_doorbell_queue_buffer(acb); >+ arcmsr_enable_eoi_mode(acb); >+ /* enable outbound Post Queue,outbound doorbell Interrupt */ >+ arcmsr_enable_outbound_ints(acb, intmask_org); > acb->acb_flags |= ACB_F_IOP_INITED; > } > > static void arcmsr_iop_reset(struct AdapterControlBlock *acb) > { >- struct MessageUnit __iomem *reg = acb->pmu; > struct CommandControlBlock *ccb; > uint32_t intmask_org; > int i = 0; >@@ -1396,30 +2187,27 @@ static void arcmsr_iop_reset(struct Adap > /* talk to iop 331 outstanding command aborted */ > arcmsr_abort_allcmd(acb); > /* wait for 3 sec for all command aborted*/ >- msleep_interruptible(3000); >+ ssleep(3); > /* disable all outbound interrupt */ > intmask_org = arcmsr_disable_outbound_ints(acb); > /* clear all outbound posted Q */ >- for (i = 0; i < ARCMSR_MAX_OUTSTANDING_CMD; i++) >- readl(®->outbound_queueport); >+ arcmsr_done4abort_postqueue(acb); > for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { > ccb = acb->pccb_pool[i]; >- if ((ccb->startdone == ARCMSR_CCB_START) || >- (ccb->startdone == ARCMSR_CCB_ABORTED)) { >+ if (ccb->startdone == ARCMSR_CCB_START) { > ccb->startdone = ARCMSR_CCB_ABORTED; >- ccb->pcmd->result = DID_ABORT << 16; > arcmsr_ccb_complete(ccb, 1); > } > } > /* enable all outbound interrupt */ > arcmsr_enable_outbound_ints(acb, intmask_org); > } >- atomic_set(&acb->ccboutstandingcount, 0); > } > > static int arcmsr_bus_reset(struct scsi_cmnd *cmd) > { >- struct AdapterControlBlock *acb =(struct AdapterControlBlock *)cmd->device->host->hostdata; >+ struct AdapterControlBlock *acb = >+ (struct AdapterControlBlock *)cmd->device->host->hostdata; > int i; > > acb->num_resets++; >@@ -1427,7 +2215,7 @@ static int arcmsr_bus_reset(struct scsi_ > for (i = 0; i < 400; i++) { > if (!atomic_read(&acb->ccboutstandingcount)) > break; >- arcmsr_interrupt(acb); >+ arcmsr_interrupt(acb);/* FIXME: need spinlock */ > msleep(25); > } > arcmsr_iop_reset(acb); >@@ -1445,7 +2233,7 @@ static void arcmsr_abort_one_cmd(struct > /* > ** Wait for 3 sec for all command done. > */ >- msleep_interruptible(3000); >+ ssleep(3); > > intmask = arcmsr_disable_outbound_ints(acb); > arcmsr_polling_ccbdone(acb, ccb); >@@ -1459,10 +2247,9 @@ static int arcmsr_abort(struct scsi_cmnd > int i = 0; > > printk(KERN_NOTICE >- "arcmsr%d: abort device command of scsi id=%d lun=%d \n", >+ "arcmsr%d: abort device command of scsi id = %d lun = %d \n", > acb->host->host_no, cmd->device->id, cmd->device->lun); > acb->num_aborts++; >- > /* > ************************************************ > ** the all interrupt service routine is locked >@@ -1493,6 +2280,8 @@ static const char *arcmsr_info(struct Sc > > switch (acb->pdev->device) { > case PCI_DEVICE_ID_ARECA_1110: >+ case PCI_DEVICE_ID_ARECA_1200: >+ case PCI_DEVICE_ID_ARECA_1202: > case PCI_DEVICE_ID_ARECA_1210: > raid6 = 0; > /*FALLTHRU*/ >@@ -1500,6 +2289,7 @@ static const char *arcmsr_info(struct Sc > case PCI_DEVICE_ID_ARECA_1130: > case PCI_DEVICE_ID_ARECA_1160: > case PCI_DEVICE_ID_ARECA_1170: >+ case PCI_DEVICE_ID_ARECA_1201: > case PCI_DEVICE_ID_ARECA_1220: > case PCI_DEVICE_ID_ARECA_1230: > case PCI_DEVICE_ID_ARECA_1260: >@@ -1517,10 +2307,8 @@ static const char *arcmsr_info(struct Sc > type = "X-TYPE"; > break; > } >- sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", >+ sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", > type, raid6 ? "( RAID6 capable)" : "", > ARCMSR_DRIVER_VERSION); > return buf; > } >- >- >diff -Naurp linux-2.6.9/drivers/scsi/Kconfig linux-2.6.9n/drivers/scsi/Kconfig >--- linux-2.6.9/drivers/scsi/Kconfig 2008-02-15 15:16:06.000000000 +0100 >+++ linux-2.6.9n/drivers/scsi/Kconfig 2008-03-06 17:18:52.000000000 +0100 >@@ -398,20 +398,18 @@ config SCSI_ADVANSYS > To compile this driver as a module, choose M here: the > module will be called advansys. > >- > config SCSI_ARCMSR >- tristate "ARECA ARC11X0[PCI-X]/ARC12X0[PCI-EXPRESS] SATA-RAID support" >- depends on PCI && SCSI >- help >- This driver supports all of ARECA's SATA RAID controller cards. >- This is an ARECA-maintained driver by Erich Chen. >- If you have any problems, please mail to: < erich@areca.com.tw > >- Areca supports Linux RAID config tools. >- >- < http://www.areca.com.tw > >- >- To compile this driver as a module, choose M here: the >- module will be called arcmsr (modprobe arcmsr). >+ tristate "ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID Host Adapter" >+ depends on PCI && SCSI >+ help >+ This driver supports all of ARECA's SATA/SAS RAID controllers cards. >+ This is an ARECA maintained driver by Erich Chen. If you have any >+ problems, please mail to <erich@areca.com.tw>. >+ Areca suports its Linux RAID Management Tools >+ Please contact < http://www.areca.com.tw > >+ < ftp://ftp.areca.com.tw > >+ To compile this driver as a module, choose M here: the >+ module will be called arcmsr. > > config SCSI_IN2000 > tristate "Always IN2000 SCSI support" >diff -Naurp linux-2.6.9/include/linux/pci_ids.h linux-2.6.9n/include/linux/pci_ids.h >--- linux-2.6.9/include/linux/pci_ids.h 2008-02-15 15:16:06.000000000 +0100 >+++ linux-2.6.9n/include/linux/pci_ids.h 2008-03-06 17:07:05.000000000 +0100 >@@ -2095,6 +2095,9 @@ > #define PCI_DEVICE_ID_ARECA_1130 0x1130 > #define PCI_DEVICE_ID_ARECA_1160 0x1160 > #define PCI_DEVICE_ID_ARECA_1170 0x1170 >+#define PCI_DEVICE_ID_ARECA_1200 0x1200 >+#define PCI_DEVICE_ID_ARECA_1201 0x1201 >+#define PCI_DEVICE_ID_ARECA_1202 0x1202 > #define PCI_DEVICE_ID_ARECA_1210 0x1210 > #define PCI_DEVICE_ID_ARECA_1220 0x1220 > #define PCI_DEVICE_ID_ARECA_1230 0x1230
<b>You cannot view the attachment while viewing its details because your browser does not support IFRAMEs. <a href="attachment.cgi?id=297765">View the attachment on a separate page</a>.</b>
View Attachment As Diff
View Attachment As Raw
Actions:
View
|
Diff
Attachments on
bug 428801
:
291703
|
294727
|
294728
|
295784
|
296175
|
296695
|
296981
| 297765 |
308180