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Red Hat Bugzilla – Attachment 299607 Details for
Bug 243081
dvgrab does not work with new firewire stack
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dvgrab -noavc, plus kernel logging
noavc.txt (text/plain), 19.37 KB, created by
Mike Pope
on 2008-03-30 04:02:44 UTC
(
hide
)
Description:
dvgrab -noavc, plus kernel logging
Filename:
MIME Type:
Creator:
Mike Pope
Created:
2008-03-30 04:02:44 UTC
Size:
19.37 KB
patch
obsolete
>+ date >Sun Mar 30 14:02:02 CST 2008 >+ echo -1 >+ mark=24136 >+ logger '== begin test 24136 ==' >+ read -p 'Plug in camcorder ' >Plug in camcorder + sleep 5 >+ dvgrab -noavc >send oops >send oops >send oops >Error: invalid source specified > >+ logger '== end test 24136 ==' >+ sed -n -e '/== begin test 24136 ==/,/== end test 24136 ==/p' >Mar 30 14:02:02 malbec logger: == begin test 24136 == >Mar 30 14:02:07 malbec kernel: AR evt_bus_reset, link internal >Mar 30 14:02:07 malbec kernel: AR evt_bus_reset, link internal >Mar 30 14:02:07 malbec kernel: firewire_ohci: 2 selfIDs, generation 84 >Mar 30 14:02:07 malbec kernel: selfID 0: 807f4896, phy 0 [p--] S200 gc=63 +0W Lci >Mar 30 14:02:07 malbec kernel: selfID 0: 817f89d0, phy 1 [c-.] S400 gc=63 +15W Lc >Mar 30 14:02:07 malbec kernel: firewire_core: phy config: card 0, new root=ffc1, gap_count=5 >Mar 30 14:02:07 malbec kernel: firewire_core: phy config: card 0, new root=ffc1, gap_count=5 >Mar 30 14:02:07 malbec kernel: AT ack_complete, phy config packet, 01c50000 >Mar 30 14:02:07 malbec kernel: AR evt_bus_reset, link internal >Mar 30 14:02:07 malbec kernel: AR evt_bus_reset, link internal >Mar 30 14:02:07 malbec kernel: firewire_ohci: 2 selfIDs, generation 86 >Mar 30 14:02:07 malbec kernel: selfID 0: 80454894, phy 0 [p--] S200 gc=5 +0W Lc >Mar 30 14:02:07 malbec kernel: selfID 0: 814589d2, phy 1 [c-.] S400 gc=5 +15W Lci >Mar 30 14:02:07 malbec kernel: AT spd 0 tl 0d, ffc1 -> ffc0, ack_pending , QR req, fffff0000400 >Mar 30 14:02:07 malbec kernel: AR spd 0 tl 0d, ffc0 -> ffc1, ack_complete, QR resp = 04241be8 >Mar 30 14:02:07 malbec kernel: AT spd 0 tl 0e, ffc1 -> ffc0, ack_pending , QR req, fffff0000404 >Mar 30 14:02:07 malbec kernel: AR spd 0 tl 0e, ffc0 -> ffc1, ack_complete, QR resp = 31333934 >Mar 30 14:02:07 malbec kernel: AT spd 0 tl 0f, ffc1 -> ffc0, ack_pending , QR req, fffff0000408 >Mar 30 14:02:07 malbec kernel: AR spd 0 tl 0f, ffc0 -> ffc1, ack_complete, QR resp = e0644000 >Mar 30 14:02:07 malbec kernel: AT spd 0 tl 10, ffc1 -> ffc0, ack_pending , QR req, fffff000040c >Mar 30 14:02:07 malbec kernel: AR spd 0 tl 10, ffc0 -> ffc1, ack_complete, QR resp = 00808801 >Mar 30 14:02:07 malbec kernel: AT spd 0 tl 11, ffc1 -> ffc0, ack_pending , QR req, fffff0000410 >Mar 30 14:02:07 malbec kernel: AR spd 0 tl 11, ffc0 -> ffc1, ack_complete, QR resp = 00a05168 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 12, ffc1 -> ffc0, ack_pending , QR req, fffff0000400 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 12, ffc0 -> ffc1, ack_complete, QR resp = 04241be8 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 13, ffc1 -> ffc0, ack_pending , QR req, fffff0000414 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 13, ffc0 -> ffc1, ack_complete, QR resp = 0008eea6 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 14, ffc1 -> ffc0, ack_pending , QR req, fffff0000418 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 14, ffc0 -> ffc1, ack_complete, QR resp = 03008088 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 15, ffc1 -> ffc0, ack_pending , QR req, fffff000041c >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 15, ffc0 -> ffc1, ack_complete, QR resp = 8100000d >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 16, ffc1 -> ffc0, ack_pending , QR req, fffff0000420 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 16, ffc0 -> ffc1, ack_complete, QR resp = 0c0083c0 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 17, ffc1 -> ffc0, ack_pending , QR req, fffff0000424 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 17, ffc0 -> ffc1, ack_complete, QR resp = d1000005 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 18, ffc1 -> ffc0, ack_pending , QR req, fffff0000428 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 18, ffc0 -> ffc1, ack_complete, QR resp = 8d000011 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 19, ffc1 -> ffc0, ack_pending , QR req, fffff000042c >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 19, ffc0 -> ffc1, ack_complete, QR resp = c3000006 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 1a, ffc1 -> ffc0, ack_pending , QR req, fffff0000430 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 1a, ffc0 -> ffc1, ack_complete, QR resp = 17010014 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 1b, ffc1 -> ffc0, ack_pending , QR req, fffff0000434 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 1b, ffc0 -> ffc1, ack_complete, QR resp = 81000011 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 1c, ffc1 -> ffc0, ack_pending , QR req, fffff0000478 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 1c, ffc0 -> ffc1, ack_complete, QR resp = 000695d5 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 1d, ffc1 -> ffc0, ack_pending , QR req, fffff000047c >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 1d, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 1e, ffc1 -> ffc0, ack_pending , QR req, fffff0000480 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 1e, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 1f, ffc1 -> ffc0, ack_pending , QR req, fffff0000484 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 1f, ffc0 -> ffc1, ack_complete, QR resp = 47522d44 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 00, ffc1 -> ffc0, ack_pending , QR req, fffff0000488 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 00, ffc0 -> ffc1, ack_complete, QR resp = 564c3231 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 01, ffc1 -> ffc0, ack_pending , QR req, fffff000048c >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 01, ffc0 -> ffc1, ack_complete, QR resp = 30454100 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 02, ffc1 -> ffc0, ack_pending , QR req, fffff0000490 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 02, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:07 malbec kernel: AT spd 1 tl 03, ffc1 -> ffc0, ack_pending , QR req, fffff0000444 >Mar 30 14:02:07 malbec kernel: AR spd 1 tl 03, ffc0 -> ffc1, ack_complete, QR resp = 0002d576 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 04, ffc1 -> ffc0, ack_pending , QR req, fffff0000448 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 04, ffc0 -> ffc1, ack_complete, QR resp = 17010014 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 05, ffc1 -> ffc0, ack_pending , QR req, fffff000044c >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 05, ffc0 -> ffc1, ack_complete, QR resp = 8100000b >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 06, ffc1 -> ffc0, ack_pending , QR req, fffff0000478 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 06, ffc0 -> ffc1, ack_complete, QR resp = 000695d5 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 07, ffc1 -> ffc0, ack_pending , QR req, fffff000047c >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 07, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 08, ffc1 -> ffc0, ack_pending , QR req, fffff0000480 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 08, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 09, ffc1 -> ffc0, ack_pending , QR req, fffff0000484 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 09, ffc0 -> ffc1, ack_complete, QR resp = 47522d44 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 0a, ffc1 -> ffc0, ack_pending , QR req, fffff0000488 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 0a, ffc0 -> ffc1, ack_complete, QR resp = 564c3231 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 0b, ffc1 -> ffc0, ack_pending , QR req, fffff000048c >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 0b, ffc0 -> ffc1, ack_complete, QR resp = 30454100 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 0c, ffc1 -> ffc0, ack_pending , QR req, fffff0000490 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 0c, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 0d, ffc1 -> ffc0, ack_pending , QR req, fffff000046c >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 0d, ffc0 -> ffc1, ack_complete, QR resp = 0002b576 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 0e, ffc1 -> ffc0, ack_pending , QR req, fffff0000470 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 0e, ffc0 -> ffc1, ack_complete, QR resp = 00808801 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 0f, ffc1 -> ffc0, ack_pending , QR req, fffff0000474 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 0f, ffc0 -> ffc1, ack_complete, QR resp = 00a05168 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 10, ffc1 -> ffc0, ack_pending , QR req, fffff0000438 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 10, ffc0 -> ffc1, ack_complete, QR resp = 0002dd9e >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 11, ffc1 -> ffc0, ack_pending , QR req, fffff000043c >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 11, ffc0 -> ffc1, ack_complete, QR resp = 1200a02d >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 12, ffc1 -> ffc0, ack_pending , QR req, fffff0000440 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 12, ffc0 -> ffc1, ack_complete, QR resp = 13010001 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 13, ffc1 -> ffc0, ack_pending , QR req, fffff0000450 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 13, ffc0 -> ffc1, ack_complete, QR resp = 0006c930 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 14, ffc1 -> ffc0, ack_pending , QR req, fffff0000454 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 14, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 15, ffc1 -> ffc0, ack_pending , QR req, fffff0000458 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 15, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 16, ffc1 -> ffc0, ack_pending , QR req, fffff000045c >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 16, ffc0 -> ffc1, ack_complete, QR resp = 4a564300 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 17, ffc1 -> ffc0, ack_pending , QR req, fffff0000460 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 17, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 18, ffc1 -> ffc0, ack_pending , QR req, fffff0000464 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 18, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 19, ffc1 -> ffc0, ack_pending , QR req, fffff0000468 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 19, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:08 malbec kernel: firewire_core: created device fw1: GUID 0080880100a05168, S200 >Mar 30 14:02:08 malbec kernel: firewire_core: created device fw1: GUID 0080880100a05168, S200 >Mar 30 14:02:08 malbec kernel: AT spd 1 tl 1a, ffc1 -> ffc0, ack_pending , BW req, fffff0000b00 8,0 >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 1a, ffc0 -> ffc1, ack_complete, W resp >Mar 30 14:02:08 malbec kernel: AR spd 1 tl 1a, ffc0 -> ffc1, ack_pending , BW req, fffff0000d00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 01, ffc1 -> ffc0, ack_pending , QR req, fffff0000414 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 01, ffc0 -> ffc1, ack_complete, QR resp = 0008eea6 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 02, ffc1 -> ffc0, ack_pending , QR req, fffff0000414 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 02, ffc0 -> ffc1, ack_complete, QR resp = 0008eea6 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 03, ffc1 -> ffc0, ack_pending , QR req, fffff0000418 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 03, ffc0 -> ffc1, ack_complete, QR resp = 03008088 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 04, ffc1 -> ffc0, ack_pending , QR req, fffff000041c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 04, ffc0 -> ffc1, ack_complete, QR resp = 8100000d >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 05, ffc1 -> ffc0, ack_pending , QR req, fffff0000450 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 05, ffc0 -> ffc1, ack_complete, QR resp = 0006c930 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 06, ffc1 -> ffc0, ack_pending , QR req, fffff0000454 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 06, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 07, ffc1 -> ffc0, ack_pending , QR req, fffff0000458 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 07, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 08, ffc1 -> ffc0, ack_pending , QR req, fffff000045c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 08, ffc0 -> ffc1, ack_complete, QR resp = 4a564300 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 09, ffc1 -> ffc0, ack_pending , QR req, fffff0000460 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 09, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0a, ffc1 -> ffc0, ack_pending , QR req, fffff0000464 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 0a, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0b, ffc1 -> ffc0, ack_pending , QR req, fffff0000468 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 0b, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0c, ffc1 -> ffc0, ack_pending , QR req, fffff0000420 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 0c, ffc0 -> ffc1, ack_complete, QR resp = 0c0083c0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0d, ffc1 -> ffc0, ack_pending , QR req, fffff0000424 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 0d, ffc0 -> ffc1, ack_complete, QR resp = d1000005 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0e, ffc1 -> ffc0, ack_pending , QR req, fffff0000438 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 0e, ffc0 -> ffc1, ack_complete, QR resp = 0002dd9e >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0f, ffc1 -> ffc0, ack_pending , QR req, fffff0000438 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 0f, ffc0 -> ffc1, ack_complete, QR resp = 0002dd9e >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 10, ffc1 -> ffc0, ack_pending , QR req, fffff000043c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 10, ffc0 -> ffc1, ack_complete, QR resp = 1200a02d >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 11, ffc1 -> ffc0, ack_pending , QR req, fffff0000440 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 11, ffc0 -> ffc1, ack_complete, QR resp = 13010001 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 12, ffc1 -> ffc0, ack_pending , QR req, fffff0000428 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 12, ffc0 -> ffc1, ack_complete, QR resp = 8d000011 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 13, ffc1 -> ffc0, ack_pending , QR req, fffff000042c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 13, ffc0 -> ffc1, ack_complete, QR resp = c3000006 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 14, ffc1 -> ffc0, ack_pending , QR req, fffff0000444 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 14, ffc0 -> ffc1, ack_complete, QR resp = 0002d576 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 15, ffc1 -> ffc0, ack_pending , QR req, fffff0000444 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 15, ffc0 -> ffc1, ack_complete, QR resp = 0002d576 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 16, ffc1 -> ffc0, ack_pending , QR req, fffff0000448 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 16, ffc0 -> ffc1, ack_complete, QR resp = 17010014 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 17, ffc1 -> ffc0, ack_pending , QR req, fffff000044c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 17, ffc0 -> ffc1, ack_complete, QR resp = 8100000b >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 18, ffc1 -> ffc0, ack_pending , QR req, fffff0000478 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 18, ffc0 -> ffc1, ack_complete, QR resp = 000695d5 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 19, ffc1 -> ffc0, ack_pending , QR req, fffff000047c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 19, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1a, ffc1 -> ffc0, ack_pending , QR req, fffff0000480 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 1a, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1b, ffc1 -> ffc0, ack_pending , QR req, fffff0000484 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 1b, ffc0 -> ffc1, ack_complete, QR resp = 47522d44 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1c, ffc1 -> ffc0, ack_pending , QR req, fffff0000488 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 1c, ffc0 -> ffc1, ack_complete, QR resp = 564c3231 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1d, ffc1 -> ffc0, ack_pending , QR req, fffff000048c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 1d, ffc0 -> ffc1, ack_complete, QR resp = 30454100 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1e, ffc1 -> ffc0, ack_pending , QR req, fffff0000490 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 1e, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1f, ffc1 -> ffc0, ack_pending , QR req, fffff0000430 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 1f, ffc0 -> ffc1, ack_complete, QR resp = 17010014 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 00, ffc1 -> ffc0, ack_pending , QR req, fffff0000434 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 00, ffc0 -> ffc1, ack_complete, QR resp = 81000011 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 01, ffc1 -> ffc0, ack_pending , QR req, fffff0000478 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 01, ffc0 -> ffc1, ack_complete, QR resp = 000695d5 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 02, ffc1 -> ffc0, ack_pending , QR req, fffff000047c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 02, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 03, ffc1 -> ffc0, ack_pending , QR req, fffff0000480 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 03, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 04, ffc1 -> ffc0, ack_pending , QR req, fffff0000484 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 04, ffc0 -> ffc1, ack_complete, QR resp = 47522d44 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 05, ffc1 -> ffc0, ack_pending , QR req, fffff0000488 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 05, ffc0 -> ffc1, ack_complete, QR resp = 564c3231 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 06, ffc1 -> ffc0, ack_pending , QR req, fffff000048c >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 06, ffc0 -> ffc1, ack_complete, QR resp = 30454100 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 07, ffc1 -> ffc0, ack_pending , QR req, fffff0000490 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 07, ffc0 -> ffc1, ack_complete, QR resp = 00000000 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 08, ffc1 -> ffc0, ack_pending , BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 08, ffc0 -> ffc1, ack_complete, W resp >Mar 30 14:02:14 malbec kernel: AR spd 1 tl 08, ffc0 -> ffc1, ack_pending , BW req, fffff0000d00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 09, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0a, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0b, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0c, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0d, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0e, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 0f, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 10, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 11, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 12, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 13, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 14, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 15, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 16, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 17, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 18, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 19, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0 >Mar 30 14:02:14 malbec kernel: AT spd 1 tl 1a, ffc1 -> ffc0, ack_busy_X, BW req, fffff0000b00 8,0
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