Attachment 301745 Details for Bug 441445 – ISP84xx IOCTL support

[patch] ISP84xx IOCTL support

qla2xxx_rhel4.7_isp84xx_ioctls_patch8.txt (text/plain), 33.21 KB, created by Marcus Barrow on 2008-04-09 03:21:23 UTC

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Creator: Marcus Barrow

Created: 2008-04-09 03:21:23 UTC

Size: 33.21 KB

patch

obsolete

>
>
>BZ 441445 [rhel 4.7 feat] [2/2] Update qla2xxx - ISP84xx variant IOCTL support.
>
>This patch provides management support, thru IOCTLs for the ISP84xxa varient of the
>4 Gb/S Fibre Channel HBA's.
> 
>This card uses the standard qla24xx hardware but contains an ethernet router downstream
>from the Fibre Channel part. 
>
>This patch is drawn from the standard driver.
>
>Also some cleanups and fixes for the ISP84XX for rhel4 codebase.
> - Version now 8.01.07-d4-rhel4.7-02.
> - Some spelling fixes which caused undefined symbols.
>
>---
> drivers/scsi/qla2xxx/exioctln.h    |    5 +-
> drivers/scsi/qla2xxx/inioct.h      |  170 ++++++++++-
> drivers/scsi/qla2xxx/qim_inioct.c  |  591 ++++++++++++++++++++++++++++++++++++
> drivers/scsi/qla2xxx/qim_ioctl.h   |   10 +
> drivers/scsi/qla2xxx/qim_mbx.c     |   64 +++--
> drivers/scsi/qla2xxx/qim_xioct.c   |    5 +
> drivers/scsi/qla2xxx/qla_dbg.h     |    3 +-
> drivers/scsi/qla2xxx/qla_fw.h      |    2 +-
> drivers/scsi/qla2xxx/qla_gbl.h     |    2 +
> drivers/scsi/qla2xxx/qla_mbx.c     |   30 ++
> drivers/scsi/qla2xxx/qla_version.h |    2 +-
> 11 files changed, 857 insertions(+), 27 deletions(-)
>
>diff --git a/drivers/scsi/qla2xxx/exioctln.h b/drivers/scsi/qla2xxx/exioctln.h
>index 7c2264e..a5b9122 100644
>--- a/drivers/scsi/qla2xxx/exioctln.h
>+++ b/drivers/scsi/qla2xxx/exioctln.h
>@@ -280,7 +280,10 @@
> 
> #define EXT_CC_RESERVED0N_OS						\
>     QL_IOCTL_CMD(0x15)
>-
>+#define EXT_CC_RESERVED0O_OS						\
>+    QL_IOCTL_CMD(0x16)
>+#define EXT_CC_RESERVED0P_OS						\
>+    QL_IOCTL_CMD(0x17)
> #define EXT_CC_RESERVED0Z_OS						\
>     QL_IOCTL_CMD(0x21)
> 
>diff --git a/drivers/scsi/qla2xxx/inioct.h b/drivers/scsi/qla2xxx/inioct.h
>index c333ee9..a3e8aaa 100644
>--- a/drivers/scsi/qla2xxx/inioct.h
>+++ b/drivers/scsi/qla2xxx/inioct.h
>@@ -95,6 +95,7 @@
> #define	INT_CC_GET_VPD			EXT_CC_RESERVED0J_OS
> #define	INT_CC_UPDATE_VPD		EXT_CC_RESERVED0K_OS
> #define	INT_CC_PORT_PARAM		EXT_CC_RESERVED0N_OS
>+#define INT_CC_A84_MGMT_COMMAND		EXT_CC_RESERVED0P_OS
> #define	INT_CC_LEGACY_LOOPBACK		EXT_CC_RESERVED0Z_OS
> 
> 
>@@ -305,8 +306,175 @@ typedef struct _INT_PORT_PARAM {
> 	UINT16 Speed;
> } INT_PORT_PARAM, *PINT_PORT_PARAM;
> 
>+#define INT_SC_A84_RESET            1  /* Reset */
>+#define INT_SC_A84_GET_FW_VERSION   2  /* Chip FW versions */
>+#define INT_SC_A84_UPDATE_FW        3  /* Update (Diagnostic or * Operation) Firmware */
>+#define INT_SC_A84_MANAGE_INFO      4  /* Manage Chip */
>+
>+typedef UINT16      USHORT;
>+typedef UINT32      ULONG;
>+
>+typedef struct _A84_RESET {
>+	USHORT Flags;
>+	USHORT Reserved;
>+#define A84_RESET_FLAG_ENABLE_DIAG_FW   1
>+} A84_RESET, *PA84_RESET;
>+
>+typedef struct _A84_GET_FW_VERSION {
>+	ULONG FwVersion;
>+} A84_GET_FW_VERSION, *PA84_GET_FW_VERSION;
>+
>+typedef struct _A84_UPDATE_FW {
>+        USHORT Flags;
>+#define A84_UPDATE_FW_FLAG_DIAG_FW  0x0008  /* if flag is cleared then it
>+					       * must be an operation fw */
>+	USHORT Reserved;
>+	ULONG  TotalByteCount;
>+	unsigned char *pFwDataBytes;
>+} A84_UPDATE_FW, *PA84_UPDATE_FW;
>+
>+typedef struct _A84_ACCESS_PARAMETERS {
>+	union {
>+		struct {
>+			ULONG StartingAddr;
>+			ULONG Reserved2;
>+			ULONG Reserved3;
>+		} Memory;   /* For Read & Write Memory */
>+
>+		struct {
>+			ULONG ConfigParamID;
>+#define CONFIG_PARAM_ID_RESERVED    1
>+#define CONFIG_PARAM_ID_UIF         2
>+#define CONFIG_PARAM_ID_FCOE_COS    3
>+#define CONFIG_PARAM_ID_PAUSE_TYPE  4
>+#define CONFIG_PARAM_ID_TIMEOUTS    5
>+			ULONG ConfigParamData0;
>+			ULONG ConfigParamData1;
>+		} Config;  /* For change Configuration */
>+
>+		struct {
>+			ULONG InfoDataType;
>+#define INFO_DATA_TYPE_CONFIG_LOG_DATA    1  /* Fetch Configuration Log Data */
>+#define INFO_DATA_TYPE_LOG_DATA           2  /* Fetch Log Data */
>+#define INFO_DATA_TYPE_PORT_STATISTICS    3  /* Fetch Port Statistics */
>+#define INFO_DATA_TYPE_LIF_STATISTICS     4  /* Fetch LIF Statistics */
>+#define INFO_DATA_TYPE_ASIC_STATISTICS    5  /* Fetch ASIC Statistics */
>+#define INFO_DATA_TYPE_CONFIG_PARAMETERS  6  /* Fetch Config Parameters */
>+#define INFO_DATA_TYPE_PANIC_LOG          7  /* Fetch Panic Log */
>+			ULONG InfoContext;
>+			/* InfoContext defines for INFO_DATA_TYPE_LOG_DATA */
>+#define IC_LOG_DATA_LOG_ID_DEBUG_LOG                    0
>+#define IC_LOG_DATA_LOG_ID_LEARN_LOG                    1
>+#define IC_LOG_DATA_LOG_ID_FC_ACL_INGRESS_LOG           2
>+#define IC_LOG_DATA_LOG_ID_FC_ACL_EGRESS_LOG            3
>+#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_INGRESS_LOG     4
>+#define IC_LOG_DATA_LOG_ID_ETHERNET_ACL_EGRESS_LOG      5
>+#define IC_LOG_DATA_LOG_ID_MESSAGE_TRANSMIT_LOG         6
>+#define IC_LOG_DATA_LOG_ID_MESSAGE_RECEIVE_LOG          7
>+#define IC_LOG_DATA_LOG_ID_LINK_EVENT_LOG               8
>+#define IC_LOG_DATA_LOG_ID_DCX_LOG                      9
>+
>+			/* InfoContext defines for
>+			 * INFO_DATA_TYPE_PORT_STATISTICS */
>+#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT0   0
>+#define IC_PORT_STATISTICS_PORT_NUMBER_ETHERNET_PORT1   1
>+#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT0        2
>+#define IC_PORT_STATISTICS_PORT_NUMBER_NSL_PORT1        3
>+#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT0         4
>+#define IC_PORT_STATISTICS_PORT_NUMBER_FC_PORT1         5
>+
>+			/* InfoContext defines for
>+			 * INFO_DATA_TYPE_LIF_STATISTICS */
>+#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT0     0
>+#define IC_LIF_STATISTICS_LIF_NUMBER_ETHERNET_PORT1     1
>+#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT0           2
>+#define IC_LIF_STATISTICS_LIF_NUMBER_FC_PORT1           3
>+#define IC_LIF_STATISTICS_LIF_NUMBER_CPU                6
>+			ULONG Reserved;
>+		} Info; /* For fetch Info */
>+	} ap;
>+} A84_ACCESS_PARAMETERS, *PA84_ACCESS_PARAMETERS;
>+
>+typedef struct _A84_MANAGE_INFO {
>+        USHORT Operation;
>+#define A84_OP_READ_MEM         0  /* Read Menlo Memory */
>+#define A84_OP_WRITE_MEM        1  /* Write Menlo Memory */
>+#define A84_OP_CHANGE_CONFIG    2  /* Change Configuration */
>+#define A84_OP_GET_INFO         3  /* Fetch Menlo Info (Logs,
>+				      & Statistics, Configuration) */
>+	USHORT Reserved;
>+	A84_ACCESS_PARAMETERS Parameters;
>+	ULONG TotalByteCount;
>+#define INFO_DATA_TYPE_LOG_CONFIG_TBC      ((10*7)+1)*4
>+#define INFO_DATA_TYPE_PORT_STAT_ETH_TBC   0x194
>+#define INFO_DATA_TYPE_PORT_STAT_FC_TBC    0xC0
>+#define INFO_DATA_TYPE_LIF_STAT_TBC        0x40
>+#define INFO_DATA_TYPE_ASIC_STAT_TBC       0x5F8
>+#define INFO_DATA_TYPE_CONFIG_TBC          0x140
>+
>+	unsigned char *pDataBytes;
>+} A84_MANAGE_INFO, *PA84_MANAGE_INFO;
>+
>+#define A84_FC_CHECKSUM_FAILURE          0x01
>+#define A84_FC_INVALID_LENGTH            0x02
>+#define A84_FC_INVALID_ADDRESS           0x04
>+#define A84_FC_INVALID_CONFIG_ID_TYPE    0x05
>+#define A84_FC_INVALID_CONFIG_DATA       0x06
>+#define A84_FC_INVALID_INFO_CONTEXT      0x07
>+
>+typedef struct _SD_A84_MGT{
>+	union {
>+		A84_RESET          Reset;
>+		A84_GET_FW_VERSION GetFwVer;
>+		A84_UPDATE_FW      UpdateFw;
>+		A84_MANAGE_INFO    ManageInfo;
>+	} sp;
>+} SD_A84_MGT, *PSD_A84_MGT;
>+
>+struct a84_mgmt_request {
>+	union {
>+		struct verify_chip_entry_84xx request;
>+		struct verify_chip_rsp_84xx response;
>+		struct access_chip_84xx mgmt_request;
>+		struct access_chip_rsp_84xx mgmt_response;
>+	} p;
>+};
>+
>+/* Management commands and data structures */
>+
>+#define A84_ISSUE_WRITE_TYPE_CMD        0
>+#define A84_ISSUE_READ_TYPE_CMD         1
>+#define A84_CLEANUP_CMD                 2
>+#define A84_ISSUE_RESET_OP_FW           3
>+#define A84_ISSUE_RESET_DIAG_FW         4
>+#define A84_ISSUE_UPDATE_OPFW_CMD       5
>+#define A84_ISSUE_UPDATE_DIAGFW_CMD     6
>+
>+struct qla_cs84xx_mgmt {
>+	uint16_t options;
>+#define	DUMP_A84_MEMORY		0
>+#define	LOAD_A84_MEMORY		1
>+#define	CHANGE_A84_CONFIG_PARAM	2
>+#define	REQUEST_A84_INFO		3
>+
>+	uint32_t parameter1;
>+	uint32_t parameter2;
>+	uint32_t parameter3;
>+
>+	char     *data;
>+	uint32_t data_size;
>+	dma_addr_t dseg_dma;
>+	uint8_t  current_state;
>+#define A84_CMD_STATE_NONE              0
>+#define A84_CMD_STATE_PROCESSING        1
>+#define A84_CMD_STATE_DONE              2
>+
>+	uint8_t  cmd_valid;
>+	uint8_t  flags;
>+#define	A84_FLAGS_PAGE_ALLOC		1
>+};
>+
> #ifdef _MSC_VER
> #pragma pack()
> #endif
>-
> #endif /* _INIOCT_H */
>diff --git a/drivers/scsi/qla2xxx/qim_inioct.c b/drivers/scsi/qla2xxx/qim_inioct.c
>index b748a1e..fa10f53 100644
>--- a/drivers/scsi/qla2xxx/qim_inioct.c
>+++ b/drivers/scsi/qla2xxx/qim_inioct.c
>@@ -2,6 +2,7 @@
> #include <linux/vmalloc.h>
> 
> 
>+
> /* Option ROM definitions. */
> INT_OPT_ROM_REGION OptionRomTable2312[] = 
> {
>@@ -1308,3 +1309,593 @@ qim2x00_update_port_param(struct qla_hos
> 
> 	return (ret);
> }
>+
>+/*
>+ * qim84xx_execute_access_data_cmd
>+ *      Performs the actual IOCB execution for data accesses.
>+ *
>+ * Input:
>+ *
>+ * Returns:
>+ *
>+ * Context:
>+ *      Kernel context.
>+ */
>+static int
>+qim84xx_execute_access_data_cmd(scsi_qla_host_t *ha,
>+    struct qla_cs84xx_mgmt *cmd)
>+{
>+	int rval = QLA_FUNCTION_FAILED;
>+	dma_addr_t mn_dma;
>+	struct a84_mgmt_request  *mn;
>+
>+	DEBUG9(printk("%s(%ld): entered.\n", __func__, ha->host_no));
>+
>+	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
>+	if (mn == NULL) {
>+		qla_printk(KERN_ERR, ha,
>+		    "%s(%ld): failed to allocate Access "
>+		    "CS84 IOCB.\n", __func__, ha->host_no);
>+		return QLA_MEMORY_ALLOC_FAILED;
>+	}
>+	memset(mn, 0, sizeof(struct a84_mgmt_request));
>+	mn->p.mgmt_request.entry_type     = ACCESS_CHIP_IOCB_TYPE;
>+	mn->p.mgmt_request.entry_count    = 1;
>+
>+	mn->p.mgmt_request.options        = cpu_to_le16(cmd->options);
>+	mn->p.mgmt_request.parameter1     = cpu_to_le32(cmd->parameter1);
>+	mn->p.mgmt_request.parameter2     = cpu_to_le32(cmd->parameter2);
>+	mn->p.mgmt_request.parameter3     = cpu_to_le32(cmd->parameter3);
>+	mn->p.mgmt_request.total_byte_cnt = cpu_to_le32(cmd->data_size);
>+
>+	DEBUG16(printk("%s(%ld) Input cmd option=%x, data_size=%x "
>+	    "parameter1=%x parameter2=%x parameter3=%x\n",
>+	    __func__, ha->host_no, cmd->options,
>+	    cmd->data_size, cmd->parameter1,
>+	    cmd->parameter2, cmd->parameter3));
>+
>+	DEBUG16(printk("%s(%ld): Request for data_size: %d\n", __func__,
>+	    ha->host_no, cmd->data_size));
>+
>+	/* if DMA required */
>+	if (cmd->options != ACO_CHANGE_CONFIG_PARAM) {
>+		mn->p.mgmt_request.dseg_count     = cpu_to_le16(0x1);
>+		mn->p.mgmt_request.dseg_address[0] = cpu_to_le32(LSD(cmd->dseg_dma));
>+		mn->p.mgmt_request.dseg_address[1] = cpu_to_le32(MSD(cmd->dseg_dma));
>+		mn->p.mgmt_request.dseg_length    = cpu_to_le32(cmd->data_size);
>+	}
>+
>+	DEBUG16(printk("%s(%ld): Dump of Access CS84XX IOCB request \n",
>+	    __func__, ha->host_no));
>+	DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
>+	    sizeof(struct a84_mgmt_request)));
>+
>+	rval = qim_issue_iocb(ha, mn, mn_dma, 0);
>+	if (rval != QLA_SUCCESS) {
>+		DEBUG2_16(printk("%s(%ld): failed to issue Access"
>+		    "CS84XX IOCB (%x).\n", __func__, ha->host_no, rval));
>+	} else {
>+		DEBUG16(printk("%s(%ld): Dump of Access CS84XX IOCB response\n",
>+		    __func__, ha->host_no));
>+		DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
>+		    sizeof(struct a84_mgmt_request)));
>+
>+		DEBUG16(printk("scsi(%ld): ql24xx_verify_cs84xx: "
>+		    "comp_status: %x failure code: %x\n", ha->host_no,
>+		    le16_to_cpu(mn->p.mgmt_response.comp_status),
>+		    le16_to_cpu(mn->p.mgmt_response.failure_code)));
>+		if (mn->p.mgmt_response.comp_status !=
>+		    __constant_cpu_to_le16(CS_COMPLETE))
>+			rval = QLA_FUNCTION_FAILED;
>+	}
>+	dma_pool_free(ha->s_dma_pool, mn, mn_dma);
>+
>+	DEBUG9(printk("%s(%ld): rval: %x\n", __func__, ha->host_no, rval));
>+
>+	return rval;
>+}
>+
>+/*
>+ * qim84xx_access_data
>+ *      Handles the requests related to data.
>+ *      Processes following operation
>+ *		- Read memory
>+ *		- Write memory
>+ *		- Change configuration parameters
>+ *		- Request information
>+ *
>+ * Input:
>+ *
>+ * Returns:
>+ *
>+ * Context:
>+ *      Kernel context.
>+ */
>+
>+static int
>+qim84xx_access_data(scsi_qla_host_t *ha, SD_A84_MGT *p_mgmt)
>+{
>+	int rval = QLA_SUCCESS;
>+	int is_read_type_cmd;
>+	A84_MANAGE_INFO *pMgmtInfo = &p_mgmt->sp.ManageInfo;
>+	struct qla_cs84xx_mgmt  cs84xx_mgmt;
>+
>+	/* Set up the command parameters */
>+	cs84xx_mgmt.options = pMgmtInfo->Operation;
>+
>+	is_read_type_cmd = pMgmtInfo->Operation == A84_OP_READ_MEM ||
>+	    pMgmtInfo->Operation == A84_OP_GET_INFO;
>+
>+	if (pMgmtInfo->Operation == A84_OP_CHANGE_CONFIG) {
>+		cs84xx_mgmt.data_size = pMgmtInfo->TotalByteCount;
>+		cs84xx_mgmt.parameter1 =
>+		    pMgmtInfo->Parameters.ap.Config.ConfigParamID;
>+		cs84xx_mgmt.parameter2 =
>+		    pMgmtInfo->Parameters.ap.Config.ConfigParamData0;
>+		cs84xx_mgmt.parameter3 =
>+		    pMgmtInfo->Parameters.ap.Config.ConfigParamData1;
>+	}
>+	if (pMgmtInfo->Operation == A84_OP_READ_MEM ||
>+	    pMgmtInfo->Operation ==  A84_OP_WRITE_MEM) {
>+		cs84xx_mgmt.data_size =
>+		    pMgmtInfo->TotalByteCount,
>+		cs84xx_mgmt.parameter1 =
>+		    pMgmtInfo->Parameters.ap.Memory.StartingAddr;
>+		cs84xx_mgmt.parameter2 = 0;
>+		cs84xx_mgmt.parameter3 = 0;
>+	}
>+	if (pMgmtInfo->Operation == A84_OP_GET_INFO) {
>+		cs84xx_mgmt.data_size =
>+		    pMgmtInfo->TotalByteCount;
>+		cs84xx_mgmt.parameter1 =
>+		    pMgmtInfo->Parameters.ap.Info.InfoDataType;
>+		cs84xx_mgmt.parameter2 =
>+		    pMgmtInfo->Parameters.ap.Info.InfoContext;
>+		cs84xx_mgmt.parameter3 = 0;
>+	}
>+
>+	cs84xx_mgmt.data = NULL;
>+	if (!is_read_type_cmd) {
>+		/* Allocate memory */
>+		cs84xx_mgmt.data = dma_alloc_coherent(&ha->pdev->dev,
>+		    cs84xx_mgmt.data_size, &cs84xx_mgmt.dseg_dma, GFP_KERNEL);
>+		if (cs84xx_mgmt.data == NULL) {
>+			qla_printk(KERN_WARNING, ha,
>+			   "Unable to allocate memory for CS84XX Mgmt data\n");
>+			return QLA_FUNCTION_FAILED;
>+		}
>+		memcpy(cs84xx_mgmt.data, pMgmtInfo->pDataBytes,
>+		   cs84xx_mgmt.data_size);
>+	}
>+
>+	rval = qim84xx_execute_access_data_cmd(ha, &cs84xx_mgmt);
>+	if (rval == QLA_SUCCESS && is_read_type_cmd)
>+		memcpy(pMgmtInfo->pDataBytes, cs84xx_mgmt.data,
>+		   cs84xx_mgmt.data_size);
>+
>+	dma_free_coherent(&ha->pdev->dev, cs84xx_mgmt.data_size,
>+	    cs84xx_mgmt.data, cs84xx_mgmt.dseg_dma);
>+
>+	return rval;
>+}
>+
>+/*
>+ * get f/w version of 84XX
>+ */
>+static int
>+qim84xx_fwversion(struct qla_host_ioctl *ha, EXT_IOCTL *pext, int mode)
>+{
>+	int		ret = 0;
>+	SD_A84_MGT	*pcs84xx_mgmt;
>+	uint8_t		*usr_cs84xx_mgmt;
>+	uint32_t	transfer_size;
>+	struct scsi_qla_host    *dr_ha = ha->dr_data;
>+
>+	DEBUG9(printk("%s(%ld): entered.\n", __func__, dr_ha->host_no));
>+	transfer_size = pext->RequestLen;
>+	if (qim_get_ioctl_scrap_mem(ha, (void **)&pcs84xx_mgmt,
>+	    transfer_size)) {
>+		/* not enough memory */
>+		pext->Status = EXT_STATUS_NO_MEMORY;
>+		DEBUG9_10(printk("%s(%ld): inst=%ld scrap not big enough. "
>+		    "size requested=%d.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance,
>+		    transfer_size));
>+		return (ret);
>+	}
>+	usr_cs84xx_mgmt = Q64BIT_TO_PTR(pext->RequestAdr, pext->AddrMode);
>+
>+	/* Get the paramters from user space */
>+	ret = copy_from_user(pcs84xx_mgmt, usr_cs84xx_mgmt, transfer_size);
>+	if (ret) {
>+		pext->Status = EXT_STATUS_COPY_ERR;
>+		DEBUG9_10(printk(
>+		    "qim8xxx_cs84xx_mgmt_command: ERROR in buffer copy READ. "
>+		    "RequestAdr=%p\n", Q64BIT_TO_PTR(pext->RequestAdr,
>+		    pext->AddrMode)));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return ret;
>+	}
>+
>+	transfer_size = sizeof(dr_ha->cs84xx->op_fw_version);	/* byte count */
>+	if (pext->ResponseLen < transfer_size) {
>+		pext->ResponseLen = transfer_size;
>+		pext->Status = EXT_STATUS_BUFFER_TOO_SMALL;
>+		DEBUG9_10(printk(
>+		    "%s(%ld): inst=%ld Response buffer too small.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+	pcs84xx_mgmt->sp.GetFwVer.FwVersion =  (ULONG) dr_ha->cs84xx->op_fw_version;
>+	/* Copy back the struct to user */
>+	usr_cs84xx_mgmt = Q64BIT_TO_PTR(pext->ResponseAdr, pext->AddrMode);
>+	transfer_size = pext->ResponseLen;
>+	ret = copy_to_user(usr_cs84xx_mgmt, pcs84xx_mgmt, transfer_size);
>+	if (ret) {
>+		pext->Status = EXT_STATUS_COPY_ERR;
>+		DEBUG9_10(printk("%s(%ld): inst=%ld ERROR copy rsp buffer.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	pext->Status       = EXT_STATUS_OK;
>+	pext->DetailStatus = EXT_STATUS_OK;
>+
>+	qim_free_ioctl_scrap_mem(ha);
>+
>+	DEBUG9(printk("%s(%ld): exiting.\n", __func__, dr_ha->host_no));
>+
>+	return (ret);
>+}
>+
>+static int
>+qim84xx_reset(struct qla_host_ioctl *ha, EXT_IOCTL *pext, int mode)
>+{
>+	int		ret = 0;
>+	SD_A84_MGT	*pcs84xx_mgmt;
>+	uint8_t		*usr_cs84xx_mgmt;
>+	uint32_t	transfer_size;
>+	A84_RESET 	*pResetInfo;
>+	int 		cmd;
>+	uint16_t 	cmd_status;
>+	struct scsi_qla_host    *dr_ha = ha->dr_data;
>+
>+	DEBUG9(printk("%s(%ld): entered.\n", __func__, dr_ha->host_no));
>+
>+	transfer_size = pext->RequestLen;
>+	if (qim_get_ioctl_scrap_mem(ha, (void **)&pcs84xx_mgmt,
>+	    transfer_size)) {
>+		/* not enough memory */
>+		pext->Status = EXT_STATUS_NO_MEMORY;
>+		DEBUG9_10(printk("%s(%ld): inst=%ld scrap not big enough. "
>+		    "size requested=%d.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance,
>+		    transfer_size));
>+		return (-EFAULT);
>+	}
>+
>+	/* Get the paramters from user space */
>+	usr_cs84xx_mgmt = Q64BIT_TO_PTR(pext->RequestAdr, pext->AddrMode);
>+	ret = copy_from_user(pcs84xx_mgmt, usr_cs84xx_mgmt, transfer_size);
>+	if (ret) {
>+		pext->Status = EXT_STATUS_COPY_ERR;
>+		DEBUG9_10(printk(
>+		    "qim84xx_reset: ERROR in buffer copy READ. "
>+		    "RequestAdr=%p\n", Q64BIT_TO_PTR(pext->RequestAdr,
>+		    pext->AddrMode)));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	/* Take action based on the sub command */
>+	pResetInfo = &pcs84xx_mgmt->sp.Reset;
>+	cmd = pResetInfo->Flags == A84_RESET_FLAG_ENABLE_DIAG_FW ?
>+	    A84_ISSUE_RESET_DIAG_FW: A84_ISSUE_RESET_OP_FW;
>+	ret = qim84xx_reset_chip(dr_ha, cmd == A84_ISSUE_RESET_DIAG_FW,
>+	    &cmd_status);
>+	if (ret != QLA_SUCCESS ||
>+	    cmd_status != MBS_COMMAND_COMPLETE) {
>+		DEBUG9_10(printk("%s(%ld): ISP8XXX Reset"
>+		    " command failed ret=%xh cmd_status=%xh\n",
>+		    __func__, dr_ha->host_no, ret, cmd_status));
>+		pext->Status = EXT_STATUS_ERR;
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+	pext->Status       = EXT_STATUS_OK;
>+	pext->DetailStatus = EXT_STATUS_OK;
>+
>+	qim_free_ioctl_scrap_mem(ha);
>+	return (ret);
>+}
>+
>+static int
>+qim84xx_mgmt_control(struct qla_host_ioctl *ha, EXT_IOCTL *pext, int mode)
>+{
>+	int		ret = 0;
>+	SD_A84_MGT	*pcs84xx_mgmt;
>+	uint8_t		*usr_cs84xx_mgmt;
>+	uint32_t	transfer_size;
>+	struct scsi_qla_host    *dr_ha = ha->dr_data;
>+
>+	DEBUG9(printk("%s(%ld): entered.\n", __func__, dr_ha->host_no));
>+
>+	transfer_size = pext->RequestLen;
>+
>+	if (qim_get_ioctl_scrap_mem(ha, (void **)&pcs84xx_mgmt,
>+	    transfer_size)) {
>+		/* not enough memory */
>+		pext->Status = EXT_STATUS_NO_MEMORY;
>+		DEBUG9_10(printk("%s(%ld): inst=%ld scrap not big enough. "
>+		    "size requested=%d.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance,
>+		    transfer_size));
>+		return (-EFAULT);
>+	}
>+
>+	usr_cs84xx_mgmt = Q64BIT_TO_PTR(pext->RequestAdr, pext->AddrMode);
>+
>+	/* Get the paramters from user space */
>+	ret = copy_from_user(pcs84xx_mgmt, usr_cs84xx_mgmt, transfer_size);
>+	if (ret) {
>+		pext->Status = EXT_STATUS_COPY_ERR;
>+		DEBUG9_10(printk(
>+		    "qim84xx_mgmt_control: ERROR in buffer copy READ. "
>+		    "RequestAdr=%p\n", Q64BIT_TO_PTR(pext->RequestAdr,
>+		    pext->AddrMode)));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	/* Take action based on the sub command */
>+	ret = qim84xx_access_data(dr_ha, pcs84xx_mgmt);
>+	if (ret != QLA_SUCCESS) {
>+		pext->Status = EXT_STATUS_ERR;
>+		pext->DetailStatus = EXT_STATUS_UNKNOWN;
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	/* Copy back the struct to user */
>+	usr_cs84xx_mgmt = Q64BIT_TO_PTR(pext->ResponseAdr, pext->AddrMode);
>+	transfer_size = pext->ResponseLen;
>+	ret = copy_to_user(usr_cs84xx_mgmt, pcs84xx_mgmt, transfer_size);
>+	if (ret) {
>+		pext->Status = EXT_STATUS_COPY_ERR;
>+		DEBUG9_10(printk("%s(%ld): inst=%ld ERROR copy rsp buffer.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	pext->Status       = EXT_STATUS_OK;
>+	pext->DetailStatus = EXT_STATUS_OK;
>+
>+	qim_free_ioctl_scrap_mem(ha);
>+	return (ret);
>+}
>+
>+int
>+qim84xx_update_chip_fw(scsi_qla_host_t *ha,
>+    struct qla_cs84xx_mgmt *cs84xx_mgmt, uint8_t is_op_fw,
>+    uint16_t *comp_status, uint16_t *fail_status)
>+{
>+	struct a84_mgmt_request  *mn;
>+	dma_addr_t mn_dma;
>+	uint32_t *fw_code;
>+	uint32_t fw_ver;
>+	uint16_t options = 0;
>+	int rval;
>+
>+	fw_code = (uint32_t *)cs84xx_mgmt->data;
>+	fw_ver  = le32_to_cpu(fw_code[2]);
>+	if (fw_ver == 0) {
>+		DEBUG16(printk("scsi(%ld): Not a valid Cs84XX FW image to flash\n",
>+		    ha->host_no));
>+		return QLA_FUNCTION_FAILED;
>+	}
>+
>+	mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
>+	if (mn == NULL) {
>+		qla_printk(KERN_ERR, ha,
>+		    "%s(%ld): failed to allocate Verify "
>+		    "Cs84 IOCB.\n", __func__, ha->host_no);
>+		return QLA_MEMORY_ALLOC_FAILED;
>+	}
>+
>+	memset(mn, 0, sizeof(struct a84_mgmt_request));
>+	options |= VCO_FORCE_UPDATE | VCO_END_OF_DATA;
>+	if (!is_op_fw)
>+		options |= VCO_DIAG_FW;
>+
>+	/* Fill in the IOCB headers */
>+	mn->p.request.entry_type  = VERIFY_CHIP_IOCB_TYPE;
>+	mn->p.request.entry_count = 1;
>+	mn->p.request.options     = cpu_to_le16(options);
>+
>+	/* Fill in the FW details of the IOCB */
>+	mn->p.request.fw_ver = cpu_to_le32(fw_ver);
>+	mn->p.request.fw_size = cpu_to_le32(cs84xx_mgmt->data_size);
>+	mn->p.request.fw_seq_size = cpu_to_le32(cs84xx_mgmt->data_size);
>+
>+	mn->p.mgmt_request.dseg_address[0] = cpu_to_le32(LSD(cs84xx_mgmt->dseg_dma));
>+	mn->p.mgmt_request.dseg_address[1] = cpu_to_le32(MSD(cs84xx_mgmt->dseg_dma));
>+	mn->p.mgmt_request.dseg_length     = cpu_to_le32(cs84xx_mgmt->data_size);
>+	mn->p.request.data_seg_cnt = cpu_to_le16(1);
>+
>+	DEBUG16(printk("%s(%ld): Dump of Verify CS84XX (FW update) IOCB "
>+	    "request \n", __func__, ha->host_no));
>+	DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
>+	    sizeof(struct cs84xx_mgmt_cmd)));
>+
>+	down(&ha->cs84xx->fw_update_mutex);
>+	rval = qim_issue_iocb_timeout(ha, mn, mn_dma, 0, 120);
>+	if (rval != QLA_SUCCESS) {
>+		DEBUG2_16(printk("%s(%ld): failed to issue Verify "
>+		    "CS84XX IOCB (FW update) (%x).\n", __func__,
>+		    ha->host_no, rval));
>+		goto fw_update_done;
>+	}
>+
>+	DEBUG9_10(printk("%s(%ld): Dump of CS84XX Management "
>+	    "response\n", __func__, ha->host_no);
>+		qla2x00_dump_buffer((uint8_t *)mn,
>+			sizeof(struct cs84xx_mgmt_cmd)););
>+
>+	DEBUG16(printk("scsi(%ld): ql24xx_verify_CS84XX: "
>+	    "comp_status: %x failure code: %x\n", ha->host_no,
>+	    le16_to_cpu(mn->p.response.comp_status),
>+	    le16_to_cpu(mn->p.response.failure_code)));
>+
>+	if (comp_status)
>+		*comp_status = le16_to_cpu(mn->p.response.comp_status);
>+	if (fail_status)
>+		*fail_status = le16_to_cpu(mn->p.response.comp_status) ==
>+		    CS_TRANSPORT ? le16_to_cpu(mn->p.response.failure_code): 0;
>+
>+fw_update_done:
>+	up(&ha->cs84xx->fw_update_mutex);
>+	dma_pool_free(ha->s_dma_pool, mn, mn_dma);
>+
>+	DEBUG11(printk("%s(%ld): rval: %x\n", __func__, ha->host_no, rval));
>+
>+	return (rval);
>+}
>+
>+static int
>+qim84xx_updatefw(struct qla_host_ioctl *ha, EXT_IOCTL *pext, int mode)
>+{
>+	int		ret = 0;
>+	SD_A84_MGT	*pcs84xx_mgmt;
>+	A84_UPDATE_FW      *pupdate_fw;
>+	int cmd;
>+	uint16_t cmd_status;
>+	uint16_t fail_code;
>+	uint8_t *usr_cs84xx_mgmt;
>+	uint32_t transfer_size;
>+	struct qla_cs84xx_mgmt cs84xx_mgmt;
>+	struct scsi_qla_host    *dr_ha = ha->dr_data;
>+
>+
>+	DEBUG9(printk("%s(%ld): entered.\n", __func__, dr_ha->host_no));
>+
>+	transfer_size = pext->RequestLen;
>+	if (qim_get_ioctl_scrap_mem(ha, (void **)&pcs84xx_mgmt,
>+	    transfer_size)) {
>+		/* not enough memory */
>+		pext->Status = EXT_STATUS_NO_MEMORY;
>+		DEBUG9_10(printk("%s(%ld): inst=%ld scrap not big enough. "
>+		    "size requested=%d.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance,
>+		    transfer_size));
>+		return (ret);
>+	}
>+
>+	/* Get the parameters from user space */
>+	usr_cs84xx_mgmt = Q64BIT_TO_PTR(pext->RequestAdr, pext->AddrMode);
>+	ret = copy_from_user(pcs84xx_mgmt, usr_cs84xx_mgmt, transfer_size);
>+	if (ret) {
>+		pext->Status = EXT_STATUS_COPY_ERR;
>+		DEBUG9_10(printk(
>+		    "qim84xx_updatefw: ERROR in buffer copy READ. "
>+		    "RequestAdr=%p\n", Q64BIT_TO_PTR(pext->RequestAdr,
>+			    pext->AddrMode)));
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	pupdate_fw = &pcs84xx_mgmt->sp.UpdateFw;
>+	cs84xx_mgmt.data_size = pupdate_fw->TotalByteCount;
>+
>+	/* Allocate memory */
>+	cs84xx_mgmt.data = dma_alloc_coherent(&dr_ha->pdev->dev,
>+	    cs84xx_mgmt.data_size, &cs84xx_mgmt.dseg_dma, GFP_KERNEL);
>+	if (cs84xx_mgmt.data == NULL) {
>+		pext->Status = EXT_STATUS_NO_MEMORY;
>+		qla_printk(KERN_WARNING, dr_ha,
>+		    "Unable to allocate memory for Cs84 Mgmt data\n");
>+		qim_free_ioctl_scrap_mem(ha);
>+		return (ret);
>+	}
>+
>+	memcpy(cs84xx_mgmt.data, pupdate_fw->pFwDataBytes,
>+	    cs84xx_mgmt.data_size);
>+
>+	cmd = pupdate_fw->Flags == A84_UPDATE_FW_FLAG_DIAG_FW ?
>+	    A84_ISSUE_UPDATE_DIAGFW_CMD: A84_ISSUE_UPDATE_OPFW_CMD;
>+
>+	ret = qim84xx_update_chip_fw(dr_ha, &cs84xx_mgmt, cmd ==
>+	    A84_ISSUE_UPDATE_OPFW_CMD, &cmd_status, &fail_code);
>+	if (ret != QLA_SUCCESS || cmd_status != 0) {
>+		DEBUG16(printk("%s(%ld): Cs84 update FW failed "
>+		    " ret=%xh cmd_satus=%xh failure_code=%xh\n",
>+		    __func__, dr_ha->hostt_no, ret,
>+		    cmd_status, fail_code));
>+		pext->Status = EXT_STATUS_ERR;
>+		pext->DetailStatus = EXT_STATUS_UNKNOWN;
>+	}
>+
>+	if (!ret) {
>+		pext->Status       = EXT_STATUS_OK;
>+		pext->DetailStatus = EXT_STATUS_OK;
>+	}
>+
>+	/* Free up the memory */
>+	dma_free_coherent(&dr_ha->pdev->dev, cs84xx_mgmt.data_size,
>+	    cs84xx_mgmt.data, cs84xx_mgmt.dseg_dma);
>+	qim_free_ioctl_scrap_mem(ha);
>+
>+	return (ret);
>+}
>+
>+/*
>+ * qim8xxx_mgmt_command
>+ *      This is the main entry point for the ISP 8XXX IOCTL path.
>+ *
>+ * Input:
>+ *
>+ * Returns:
>+ *
>+ * Context:
>+ *      Kernel context.
>+ */
>+int
>+qim84xx_mgmt_command(struct qla_host_ioctl *ha, EXT_IOCTL *pext, int mode)
>+{
>+	int ret = 0;
>+	struct scsi_qla_host    *dr_ha = ha->dr_data;
>+
>+	if (!IS_QLA84XX(dr_ha)) {
>+		pext->Status = EXT_STATUS_INVALID_REQUEST;
>+		DEBUG9_10(printk(
>+		    "%s(%ld): inst=%ld not 8xxx exiting.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance));
>+		return (ret);
>+	}
>+
>+	DEBUG9(printk("%s(%ld): entered.\n", __func__, dr_ha->host_no));
>+
>+	/* Take action based on the sub command */
>+	switch (pext->SubCode) {
>+	case INT_SC_A84_RESET:
>+		ret = qim84xx_reset(ha, pext, mode);
>+		break;
>+	case INT_SC_A84_GET_FW_VERSION:
>+		ret = qim84xx_fwversion(ha, pext, mode);
>+		break;
>+	case INT_SC_A84_MANAGE_INFO:
>+		ret = qim84xx_mgmt_control(ha, pext, mode);
>+		break;
>+	case INT_SC_A84_UPDATE_FW:
>+		ret = qim84xx_updatefw(ha, pext, mode);
>+		break;
>+	default:
>+		DEBUG9_10(printk("%s(%ld): inst=%ld Invalid sub command.\n",
>+		    __func__, dr_ha->host_no, dr_ha->instance));
>+		pext->Status = EXT_STATUS_INVALID_REQUEST;
>+		break;
>+	}
>+	return (ret);
>+}
>diff --git a/drivers/scsi/qla2xxx/qim_ioctl.h b/drivers/scsi/qla2xxx/qim_ioctl.h
>index b606445..c2be099 100644
>--- a/drivers/scsi/qla2xxx/qim_ioctl.h
>+++ b/drivers/scsi/qla2xxx/qim_ioctl.h
>@@ -16,6 +16,16 @@ qim_get_ioctl_scrap_mem(struct qla_host_
> extern void
> qim_free_ioctl_scrap_mem(struct qla_host_ioctl *);
> 
>+extern int
>+qim_issue_iocb(scsi_qla_host_t *, void *, dma_addr_t, size_t);
>+
>+extern int
>+qim_issue_iocb_timeout(scsi_qla_host_t *, void *, dma_addr_t, size_t,
>+    uint32_t);
>+
>+extern int
>+qim84xx_reset_chip(scsi_qla_host_t *, uint16_t, uint16_t *);
>+
> extern void *
> Q64BIT_TO_PTR(uint64_t, uint16_t);
> 
>diff --git a/drivers/scsi/qla2xxx/qim_mbx.c b/drivers/scsi/qla2xxx/qim_mbx.c
>index fc8288b..dadf2ac 100644
>--- a/drivers/scsi/qla2xxx/qim_mbx.c
>+++ b/drivers/scsi/qla2xxx/qim_mbx.c
>@@ -478,27 +478,9 @@ qim_get_isp_stats(struct qla_host_ioctl
> 	return rval;
> }
> 
>-/*
>- * qim_issue_iocb
>- *	Issue IOCB using mailbox command
>- *
>- * Input:
>- *	ha = adapter state pointer.
>- *	buffer = buffer pointer.
>- *	phys_addr = physical address of buffer.
>- *	size = size of buffer.
>- *	TARGET_QUEUE_LOCK must be released.
>- *	ADAPTER_STATE_LOCK must be released.
>- *
>- * Returns:
>- *	qla2x00 local function return status code.
>- *
>- * Context:
>- *	Kernel context.
>- */
> int
>-qim_issue_iocb(scsi_qla_host_t *ha, void*  buffer, dma_addr_t phys_addr,
>-    size_t size)
>+qim_issue_iocb_timeout(scsi_qla_host_t *ha, void*  buffer, dma_addr_t phys_addr,
>+    size_t size, uint32_t tov)
> {
> 	int		rval;
> 	mbx_cmd_t	mc;
>@@ -512,7 +494,7 @@ qim_issue_iocb(scsi_qla_host_t *ha, void
> 	mcp->mb[7] = LSW(MSD(phys_addr));
> 	mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
> 	mcp->in_mb = MBX_2|MBX_0;
>-	mcp->tov = 30;
>+	mcp->tov = tov;
> 	mcp->flags = 0;
> 	rval = qim_mailbox_command(ha, mcp);
> 
>@@ -524,7 +506,7 @@ qim_issue_iocb(scsi_qla_host_t *ha, void
> 		sts_entry_t *sts_entry = (sts_entry_t *) buffer;
> 
> 		/* Mask reserved bits. */
>-		if (IS_QLA24XX(ha) || IS_QLA54XX(ha))
>+		if (IS_FWI2_CAPABLE(ha))
> 			sts_entry->entry_status &= RF_MASK_24XX;
> 		else
> 			sts_entry->entry_status &= RF_MASK;
>@@ -534,6 +516,14 @@ qim_issue_iocb(scsi_qla_host_t *ha, void
> }
> 
> int
>+qim_issue_iocb(scsi_qla_host_t *ha, void *buffer, dma_addr_t phys_addr,
>+    size_t size)
>+{
>+	return qim_issue_iocb_timeout(ha, buffer, phys_addr, size,
>+	    MBX_TOV_SECONDS);
>+}
>+
>+int
> qim24xx_login_fabric(scsi_qla_host_t *ha, uint16_t loop_id, uint8_t domain,
>     uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
> {
>@@ -918,3 +908,33 @@ qim_get_rnid_params_mbx(scsi_qla_host_t
> 	return (rval);
> }
> 
>+
>+int
>+qim84xx_reset_chip(struct scsi_qla_host *ha, uint16_t enable_diagnostic,
>+    uint16_t *cmd_status)
>+{
>+	int rval;
>+	mbx_cmd_t mc;
>+	mbx_cmd_t *mcp = &mc;
>+
>+	DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
>+	    ha->host_no, enable_diagnostic));
>+
>+	mcp->mb[0] = MBC_ISP84XX_RESET;
>+	mcp->mb[1] = enable_diagnostic;
>+	mcp->out_mb = MBX_1|MBX_0;
>+	mcp->in_mb = MBX_1|MBX_0;
>+	mcp->tov = 30;
>+	mcp->flags = 0;
>+	rval = qim_mailbox_command(ha, mcp);
>+
>+	/* Return mailbox statuses. */
>+	*cmd_status = mcp->mb[0];
>+	if (rval != QLA_SUCCESS)
>+		DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
>+		    rval));
>+	else
>+		DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
>+
>+	return rval;
>+}
>diff --git a/drivers/scsi/qla2xxx/qim_xioct.c b/drivers/scsi/qla2xxx/qim_xioct.c
>index f4b8355..df3a623 100644
>--- a/drivers/scsi/qla2xxx/qim_xioct.c
>+++ b/drivers/scsi/qla2xxx/qim_xioct.c
>@@ -71,6 +71,7 @@ extern int qim_get_option_rom_layout(str
> extern int qim_get_vpd(struct qla_host_ioctl *, EXT_IOCTL *, int);
> extern int qim_update_vpd(struct qla_host_ioctl *, EXT_IOCTL *, int);
> extern int qim2x00_update_port_param(struct qla_host_ioctl *, EXT_IOCTL *, int);
>+extern int qim84xx_mgmt_command(struct qla_host_ioctl *, EXT_IOCTL *, int);
> 
> /*
>  * Local prototypes
>@@ -798,6 +799,10 @@ qim_send_ioctl(struct scsi_device *dev,
> 		ret = qim_update_vpd(ha, pext, mode);
> 		break; 
> 
>+	case INT_CC_A84_MGMT_COMMAND:
>+		ret = qim84xx_mgmt_command(ha, pext, mode);
>+		break;
>+
> 	case INT_CC_PORT_PARAM:
> 		ret = qim2x00_update_port_param(ha, pext, mode);
> 		break;
>diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
>index fa66637..cd76919 100644
>--- a/drivers/scsi/qla2xxx/qla_dbg.h
>+++ b/drivers/scsi/qla2xxx/qla_dbg.h
>@@ -44,7 +44,8 @@
>     defined(QL_DEBUG_LEVEL_7)  || defined(QL_DEBUG_LEVEL_8) || \
>     defined(QL_DEBUG_LEVEL_9)  || defined(QL_DEBUG_LEVEL_10) || \
>     defined(QL_DEBUG_LEVEL_11) || defined(QL_DEBUG_LEVEL_12) || \
>-    defined(QL_DEBUG_LEVEL_13) || defined(QL_DEBUG_LEVEL_14)
>+    defined(QL_DEBUG_LEVEL_13) || defined(QL_DEBUG_LEVEL_14) || \
>+    defined(QL_DEBUG_LEVEL_15) || defined(QL_DEBUG_LEVEL_16)
>     #define QL_DEBUG_ROUTINES
> #endif
> 
>diff --git a/drivers/scsi/qla2xxx/qla_fw.h b/drivers/scsi/qla2xxx/qla_fw.h
>index fd65b94..bad2578 100644
>--- a/drivers/scsi/qla2xxx/qla_fw.h
>+++ b/drivers/scsi/qla2xxx/qla_fw.h
>@@ -1161,7 +1161,7 @@ struct verify_chip_rsp_84xx {
> 	uint16_t comp_status;
> #define CS_VCS_CHIP_FAILURE	0x3
> #define CS_VCS_BAD_EXCHANGE	0x8
>-#define CS_VCS_SEQ_COMPLETEi	0x40
>+#define CS_VCS_SEQ_COMPLETE	0x40
> 
> 	uint16_t failure_code;
> #define VFC_CHECKSUM_ERROR	0x1
>diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
>index 133bcbe..f56987e 100644
>--- a/drivers/scsi/qla2xxx/qla_gbl.h
>+++ b/drivers/scsi/qla2xxx/qla_gbl.h
>@@ -250,6 +250,8 @@ qla2x00_set_idma_speed(scsi_qla_host_t *
> extern int
> qla84xx_verify_chip(struct scsi_qla_host *, uint16_t *);
> 
>+extern int
>+qla84xx_reset_chip(scsi_qla_host_t *, uint16_t, uint16_t *);
> 
> /*
>  * Global Function Prototypes in qla_isr.c source file.
>diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
>index 00ed792..49d0d84 100644
>--- a/drivers/scsi/qla2xxx/qla_mbx.c
>+++ b/drivers/scsi/qla2xxx/qla_mbx.c
>@@ -2858,4 +2858,34 @@ verify_done:
> 
> 	return rval;
> }
>+
>+int
>+qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic,
>+    uint16_t *cmd_status)
>+{
>+	int rval;
>+	mbx_cmd_t mc;
>+	mbx_cmd_t *mcp = &mc;
>+
>+	DEBUG16(printk("%s(%ld): enable_diag=%d entered.\n", __func__,
>+	    ha->host_no, enable_diagnostic));
>+
>+	mcp->mb[0] = MBC_ISP84XX_RESET;
>+	mcp->mb[1] = enable_diagnostic;
>+	mcp->out_mb = MBX_1|MBX_0;
>+	mcp->in_mb = MBX_1|MBX_0;
>+	mcp->tov = 30;
>+	mcp->flags = 0;
>+	rval = qla2x00_mailbox_command(ha, mcp);
>+
>+	/* Return mailbox statuses. */
>+	*cmd_status = mcp->mb[0];
>+	if (rval != QLA_SUCCESS)
>+		DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no,
>+		    rval));
>+	else
>+		DEBUG16(printk("%s(%ld): done.\n", __func__, ha->host_no));
>+
>+	return rval;
>+}
> EXPORT_SYMBOL_GPL(qla2x00_set_idma_speed);
>diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
>index 92df35a..43dc969 100644
>--- a/drivers/scsi/qla2xxx/qla_version.h
>+++ b/drivers/scsi/qla2xxx/qla_version.h
>@@ -19,7 +19,7 @@
> /*
>  * Driver version
>  */
>-#define QLA2XXX_VERSION      "8.01.07-d4-rhel4.7-01"
>+#define QLA2XXX_VERSION      "8.01.07-d4-rhel4.7-02"
> 
> #define QLA_DRIVER_MAJOR_VER	8
> #define QLA_DRIVER_MINOR_VER	1
>-- 
>1.4.4.1
>

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Attachments on bug 441445: 301744 | 301745