Attachment 312383 Details for Bug 441615 – Preamble to the patch set

[patch] Preamble to the patch set

mcfg3.0.patch (text/plain), 4.21 KB, created by Tony Camuso on 2008-07-22 19:00:27 UTC

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Creator: Tony Camuso

Created: 2008-07-22 19:00:27 UTC

Size: 4.21 KB

patch

obsolete

>
>BugZillas
>=========
>441615
>251493
>
>Description
>===========
>
>This problem occurs during PCI bus sizing on some x86 platforms.
>
>Brief history
>-------------
>
>In the PCI 2.0 specification, a Port IO access method was 
>defined to access a device's PCI config space, and this method 
>sufficed for PCI and PCI-X. The Port IO method was capable
>only of accessing offsets of upto 256 bytes into the device's 
>PCI config space. 
>
>With the Advent of PCI-express, a requirement emerged for PCI
>config space having offsets greater than 256 bytes.
>
>Because PortIO is only capable of providing access to the first
>256 bytes of PCI config space, MMCONFIG space, the mapping of
>PCI config space into MMIO space, was devised to access offsets
>greater than 256 bytes. 
>
>In Linux, only one PCI Config Access mechanism is employed for
>the entire platform. Platforms that had mixed PCI and PCI-express 
>would use MMCONFIG as the PCI config access method, in order to
>comply with the PCI-express spec. 
>
>Details of the problem
>-----------------------
>
>During bus sizing, 32-bit PCI device Base Address Registers are 
>written with 0xFFFFFFFF. These registers are then read, and the
>bits that return zero indicate to the bus sizing code the amount 
>of MMIO displacement required by the device. After determining
>the displacement, the bus sizing code will write the BAR again
>with the lowest, naturally-aligned base address available for 
>the given displacement. 
>
>For example, a read of the BAR for a graphics device requiring 
>512 MB of MMIO displacement will return 0xE0000000 after the bus 
>sizing code writes 0xFFFFFFFF to its BAR. The bus sizing code will 
>probably map such a device to have a base address of 0x20000000, 
>which is the lowest, naturally-aligned base address for a 512 MB
>displacement. To do this, the bus sizing code will then write 
>the 0x20000000 value into the device's BAR. 
>
>Meanwhile, however, the graphics device has been programmed to 
>claim all MMIO cycles from 0xE0000000 to 0xFFFFFFFF. In some 
>platforms, MMCONFIG space is mapped into this region. 
>
>If the bus sizing code is using MMCONFIG to read and write PCI
>config space, then all further PCI config accesses will be 
>claimed by the graphics device and no further boot progress can
>be made. 
>
>Upstream Solution
>=================
>
>The solution employed upstream was to use only Port IO methods
>for PCI config accesses with less than 256 bytes of offset into
>the config space of each device. This is the PCI config space 
>and contains all the BARs. 
>
>This solution also fixes the problem where certain PCI-X and 
>legacy PCI northbridges do not respond to MMCONFIG cycles. 
>
>Only PCI-express provides config space above 256 bytes, and all
>PCI-express bridges are required by the specificaton to respond
>to MMIO-mapped config space (MMCONFIG). 
>
>This solution, therefore, makes unnecessary the MMCONFIG patch 
>I submitted for RHEL5.2. 
>
>This solution was what I submitted for RHEL 4.7, since the freeze
>date for 4.7 occured after the upstream patch was available. 
>
>
>Upstream Status
>===============
>
>commit a0ca9909609470ad779b9b9cc68ce96e975afff7
>Author: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
>Date:   Mon Jan 14 17:31:09 2008 -0500
>
>
>RHEL 5 Implementaton
>====================
>
>The RHEL5.3 adaptation of the upstream patch is done with three
>separate patches. The first two patches remove the code added by
>the MMCONFIG patch implemented for RHEL5.2, and the third patch
>implements the upstream solution in the RHEL5.3 2.6.18 kernel. 
>
>Here is the cumulative "git diff --stat" across all three patches.
>
> arch/i386/pci/common.c     |   69 -------------------------------
> arch/i386/pci/direct.c     |   51 +++--------------------
> arch/i386/pci/init.c       |   17 +-------
> arch/i386/pci/mmconfig.c   |   98 ++++----------------------------------------
> arch/i386/pci/pci.h        |    8 ----
> arch/x86_64/pci/mmconfig.c |   76 ++++-----------------------------
> drivers/pci/pci.c          |    9 ----
> drivers/pci/pci.h          |    1 -
> drivers/pci/probe.c        |    5 --
> 9 files changed, 27 insertions(+), 307 deletions(-)
>
>Testing
>=======
>
>Brew scratch build is available for test. 
>
> http://brewweb.devel.redhat.com/brew/taskinfo?taskID=1344671
> 
>I have tested both x86_64 and i686 builds for regressions and for 
>functionality. 
>
>
>

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Attachments on bug 441615: 312383