Attachment 314875 Details for Bug 459903 – /var/log/Xorg.0.log

/var/log/Xorg.0.log

Xorg.0.log (text/plain), 120.26 KB, created by Matěj Cepl on 2008-08-24 08:22:37 UTC

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Creator: Matěj Cepl

Created: 2008-08-24 08:22:37 UTC

Size: 120.26 KB

patch

obsolete

>
>X.Org X Server 1.4.99.905 (1.5.0 RC 5)
>Release Date: 5 September 2007
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.18-92.1.6.el5xen i686 
>Current Operating System: Linux viklef 2.6.25.14-108.fc9.i686 #1 SMP Mon Aug 4 14:08:11 EDT 2008 i686
>Build Date: 02 July 2008  01:36:37PM
>Build ID: xorg-x11-server 1.4.99.905-2.20080702.fc9 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Sat Aug 23 19:47:17 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "single head configuration"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "<default monitor>"
>(**) |   |-->Device "Videocard0"
>(==) No monitor specified for screen "Screen0".
>	Using a default monitor configuration.
>(**) |-->Input Device "Keyboard0"
>(**) |-->Input Device "EdevMagic"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(==) No FontPath specified.  Using compiled-in default.
>(==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory)
>(II) No APM support in BIOS or kernel
>(II) Loader magic: 0x81ed400
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 4.1
>	X.Org XInput driver : 2.1
>	X.Org Server Extension : 1.1
>	X.Org Font Renderer : 0.6
>(II) Loader running on linux
>(--) using VT number 7
>
>(--) PCI:*(0@0:2:0) Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller rev 12, Mem @ 0xe4300000/0, 0xd0000000/0, I/O @ 0x00004000/0
>(--) PCI: (0@0:2:1) Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller rev 12, Mem @ 0xe4400000/0
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) LoadModule: "extmod"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension SELinux
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(==) AIGLX enabled
>(==) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>
>(II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.99.905, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.6
>(II) Loading font FreeType
>(II) LoadModule: "dri"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dri2"
>
>(II) Loading /usr/lib/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.99.902, module version = 2.2.1
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 4.0
>(II) Loading sub module "intel_master"
>(II) LoadModule: "intel_master"
>
>(II) Loading /usr/lib/xorg/modules/drivers//intel_master_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.99.902, module version = 2.3.2
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 4.0
>(II) LoadModule: "kbd"
>
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.4.99.901, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "evdev"
>
>(II) Loading /usr/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 2.0.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33, Intel Integrated Graphics Device
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 4.1
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "yes"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 965GM
>(--) intel(0): Chipset: "965GM"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xE4300000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0xac000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x031f0800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00000246 (status: VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031106 (n = 3, m1 = 17, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026a00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x05b704ff (1280 active, 1464 total)
>(II) intel(0):             HBLANK_B: 0x05b704ff (1280 start, 1464 end)
>(II) intel(0):              HSYNC_B: 0x0547051f (1312 start, 1352 end)
>(II) intel(0):             VTOTAL_B: 0x0344031f (800 active, 837 total)
>(II) intel(0):             VBLANK_B: 0x0344031f (800 start, 837 end)
>(II) intel(0):              VSYNC_B: 0x03270323 (804 start, 808 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x100000c0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x04
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x20
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x07
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 73571 n 3 m1 17 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA has no monitor section
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): Output LVDS has no monitor section
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): Attempting to determine panel fixed mode.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>
>(II) Reloading /usr/lib/xorg/modules//libint10.so
>(II) intel(0): initializing int10
>(WW) intel(0): Bad V_BIOS checksum
>(II) intel(0): Primary V_BIOS segment is: 0xc000
>(II) intel(0): VESA BIOS detected
>(II) intel(0): VESA VBE Version 3.0
>(II) intel(0): VESA VBE Total Mem: 7616 kB
>(II) intel(0): VESA VBE OEM: Intel(r)GM965/PM965/GL960 Graphics Chip Accelerated VGA BIOS
>(II) intel(0): VESA VBE OEM Software Rev: 1.0
>(II) intel(0): VESA VBE OEM Vendor: Intel Corporation
>(II) intel(0): VESA VBE OEM Product: Intel(r)GM965/PM965/GL960 Graphics Controller
>(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0
>(II) intel(0): Found panel mode in BIOS VBT tables:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 (50.2 kHz)
>(WW) intel(0): BIOS panel mode data doesn't match probed data, continuing with probed.
>(II) intel(0): BIOS mode:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 (50.2 kHz)
>(II) intel(0): probed mode:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): found backlight control method /sys/class/backlight/acpi_video0
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): No SDVO device found on SDVOB
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): Output TV has no monitor section
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LPL  Model: bd00  Serial#: 0
>(II) intel(0): Year: 2006  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 33  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified(II) intel(0): 
>Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.600 redY: 0.351   greenX: 0.324 greenY: 0.554
>(II) intel(0): blueX: 0.153 blueY: 0.140   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 73.5 MHz   Image Size:  331 x 207 mm
>(II) intel(0): h_active: 1280  h_sync: 1312  h_sync_end 1352 h_blank_end 1464 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 804  v_sync_end 808 v_blanking: 837 v_border: 0
>(WW) intel(0): Unknown vendor-specific block 0
>(II) intel(0):  LGPhilipsLCD
>(II) intel(0):  LP154W01-TLE1
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff00320c00bd00000000
>(II) intel(0): 	00100103802115780ab3709959538d27
>(II) intel(0): 	23505400000001010101010101010101
>(II) intel(0): 	010101010101b61c00b8502025302028
>(II) intel(0): 	44004bcf100000190000000000000000
>(II) intel(0): 	00000000000000000000000000fe004c
>(II) intel(0): 	475068696c6970734c43440a000000fe
>(II) intel(0): 	004c503135345730312d544c45310038
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS connected
>(II) intel(0): Output TV disconnected
>(II) intel(0): Using exact sizes for initial modes
>(II) intel(0): Output LVDS using initial mode 1280x800
>(II) intel(0): Monitoring connected displays enabled
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 7676 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Intel XvMC decoder disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.4.99.905, module version = 2.4.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000400
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000203 to 0x00000237
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: VSYNC_INT_STATUS OFIELD_INT_STATUS EFIELD_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000246 to 0x80000246
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000c0 to 0x000c0000
>(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
>(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104
>(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d
>(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200
>(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c
>(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200
>(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00606000
>(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1
>(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359
>(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022
>(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344
>(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415
>(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607
>(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001
>(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710088
>(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x4e2d1dc8
>(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
>(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198
>(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x8000085e
>(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x00028283
>(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00014141
>(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 238848 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 955388 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenByBusid: drmOpenMinor returns 11
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xe4300000
>(II) intel(0): [drm] ring buffer = 0xd0000000
>(II) intel(0): [drm] mapped front buffer at 0xd0100000, handle = 0xd0100000
>(II) intel(0): [drm] mapped back buffer at 0xd1a00000, handle = 0xd1a00000
>(II) intel(0): [drm] mapped depth buffer at 0xd2040000, handle = 0xd2040000
>(II) intel(0): [drm] mapped classic textures at 0xd2680000, handle = 0xd2680000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 19660800 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01a00000 (pgoffset 6656)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x02040000 (pgoffset 8256)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x02680000 (pgoffset 9856)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
>(II) intel(0): 0x00042000-0x00042fff: overlay registers (4 kB)
>(II) intel(0): 0x00043000-0x00043fff: power context (4 kB)
>(II) intel(0): 0x00100000-0x0073ffff: front buffer (6400 kB) X tiled
>(II) intel(0): 0x00740000-0x019fffff: exa offscreen (19200 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01a00000-0x0203ffff: back buffer (6400 kB) X tiled
>(II) intel(0): 0x02040000-0x0267ffff: depth buffer (6400 kB) Y tiled
>(II) intel(0): 0x02680000-0x0467ffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): chosen: dotclock 73371 vco 2054400 ((m 107, m1 18, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x031f0800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00100000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000237 (status: VSYNC_INT_STATUS OFIELD_INT_STATUS EFIELD_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x80000246 (status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031205 (n = 3, m1 = 18, m2 = 5)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x05b704ff (1280 active, 1464 total)
>(II) intel(0):             HBLANK_B: 0x05b704ff (1280 start, 1464 end)
>(II) intel(0):              HSYNC_B: 0x0547051f (1312 start, 1352 end)
>(II) intel(0):             VTOTAL_B: 0x0344031f (800 active, 837 total)
>(II) intel(0):             VBLANK_B: 0x0344031f (800 start, 837 end)
>(II) intel(0):              VSYNC_B: 0x03270323 (804 start, 808 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x000c0000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00606000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710088
>(II) intel(0):          TV_SC_CTL_2: 0x4e2d1dc8
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00012d2d
>(II) intel(0):      TV_FILTER_CTL_3: 0x00009696
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x04
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x07
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0xab
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 73371 n 3 m1 18 m2 5 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): chosen: dotclock 73371 vco 2054400 ((m 107, m1 18, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Enabled
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>(II) AIGLX: Screen 0 is not DRI2 capable
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: drmOpenMinor returns 12
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 331 x 207
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) Keyboard0: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(**) Option "CorePointer"
>(**) EdevMagic: always reports core events
>(EE) EdevMagic: No device specified.
>(II) UnloadModule: "evdev"
>(EE) PreInit returned NULL for "EdevMagic"
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) config/hal: Adding input device Macintosh mouse button emulation
>(**) Macintosh mouse button emulation: always reports core events
>(**) Macintosh mouse button emulation: Device: "/dev/input/event0"
>(II) Macintosh mouse button emulation: Found x and y relative axes
>(II) Macintosh mouse button emulation: Found mouse buttons
>(II) Macintosh mouse button emulation: Configuring as mouse
>(II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE)
>(II) config/hal: Adding input device SynPS/2 Synaptics TouchPad
>(II) LoadModule: "synaptics"
>
>(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so
>(II) Module synaptics: vendor="X.Org Foundation"
>	compiled for 4.3.99.902, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) Synaptics touchpad driver version 0.14.6 (1406)
>(--) SynPS/2 Synaptics TouchPad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(**) Option "LockedDrags" "yes"
>(**) Option "TapButton1" "1"
>(**) Option "PalmDetect" "yes"
>(--) SynPS/2 Synaptics TouchPad touchpad found
>(**) SynPS/2 Synaptics TouchPad: always reports core events
>(II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: MOUSE)
>(--) SynPS/2 Synaptics TouchPad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(--) SynPS/2 Synaptics TouchPad touchpad found
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LPL  Model: bd00  Serial#: 0
>(II) intel(0): Year: 2006  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 33  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified(II) intel(0): 
>Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.600 redY: 0.351   greenX: 0.324 greenY: 0.554
>(II) intel(0): blueX: 0.153 blueY: 0.140   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 73.5 MHz   Image Size:  331 x 207 mm
>(II) intel(0): h_active: 1280  h_sync: 1312  h_sync_end 1352 h_blank_end 1464 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 804  v_sync_end 808 v_blanking: 837 v_border: 0
>(WW) intel(0): Unknown vendor-specific block 0
>(II) intel(0):  LGPhilipsLCD
>(II) intel(0):  LP154W01-TLE1
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff00320c00bd00000000
>(II) intel(0): 	00100103802115780ab3709959538d27
>(II) intel(0): 	23505400000001010101010101010101
>(II) intel(0): 	010101010101b61c00b8502025302028
>(II) intel(0): 	44004bcf100000190000000000000000
>(II) intel(0): 	00000000000000000000000000fe004c
>(II) intel(0): 	475068696c6970734c43440a000000fe
>(II) intel(0): 	004c503135345730312d544c45310038
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LPL  Model: bd00  Serial#: 0
>(II) intel(0): Year: 2006  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 33  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified(II) intel(0): 
>Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.600 redY: 0.351   greenX: 0.324 greenY: 0.554
>(II) intel(0): blueX: 0.153 blueY: 0.140   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 73.5 MHz   Image Size:  331 x 207 mm
>(II) intel(0): h_active: 1280  h_sync: 1312  h_sync_end 1352 h_blank_end 1464 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 804  v_sync_end 808 v_blanking: 837 v_border: 0
>(WW) intel(0): Unknown vendor-specific block 0
>(II) intel(0):  LGPhilipsLCD
>(II) intel(0):  LP154W01-TLE1
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff00320c00bd00000000
>(II) intel(0): 	00100103802115780ab3709959538d27
>(II) intel(0): 	23505400000001010101010101010101
>(II) intel(0): 	010101010101b61c00b8502025302028
>(II) intel(0): 	44004bcf100000190000000000000000
>(II) intel(0): 	00000000000000000000000000fe004c
>(II) intel(0): 	475068696c6970734c43440a000000fe
>(II) intel(0): 	004c503135345730312d544c45310038
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LPL  Model: bd00  Serial#: 0
>(II) intel(0): Year: 2006  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 33  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified(II) intel(0): 
>Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.600 redY: 0.351   greenX: 0.324 greenY: 0.554
>(II) intel(0): blueX: 0.153 blueY: 0.140   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 73.5 MHz   Image Size:  331 x 207 mm
>(II) intel(0): h_active: 1280  h_sync: 1312  h_sync_end 1352 h_blank_end 1464 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 804  v_sync_end 808 v_blanking: 837 v_border: 0
>(WW) intel(0): Unknown vendor-specific block 0
>(II) intel(0):  LGPhilipsLCD
>(II) intel(0):  LP154W01-TLE1
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff00320c00bd00000000
>(II) intel(0): 	00100103802115780ab3709959538d27
>(II) intel(0): 	23505400000001010101010101010101
>(II) intel(0): 	010101010101b61c00b8502025302028
>(II) intel(0): 	44004bcf100000190000000000000000
>(II) intel(0): 	00000000000000000000000000fe004c
>(II) intel(0): 	475068696c6970734c43440a000000fe
>(II) intel(0): 	004c503135345730312d544c45310038
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LPL  Model: bd00  Serial#: 0
>(II) intel(0): Year: 2006  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 33  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified(II) intel(0): 
>Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.600 redY: 0.351   greenX: 0.324 greenY: 0.554
>(II) intel(0): blueX: 0.153 blueY: 0.140   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 73.5 MHz   Image Size:  331 x 207 mm
>(II) intel(0): h_active: 1280  h_sync: 1312  h_sync_end 1352 h_blank_end 1464 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 804  v_sync_end 808 v_blanking: 837 v_border: 0
>(WW) intel(0): Unknown vendor-specific block 0
>(II) intel(0):  LGPhilipsLCD
>(II) intel(0):  LP154W01-TLE1
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff00320c00bd00000000
>(II) intel(0): 	00100103802115780ab3709959538d27
>(II) intel(0): 	23505400000001010101010101010101
>(II) intel(0): 	010101010101b61c00b8502025302028
>(II) intel(0): 	44004bcf100000190000000000000000
>(II) intel(0): 	00000000000000000000000000fe004c
>(II) intel(0): 	475068696c6970734c43440a000000fe
>(II) intel(0): 	004c503135345730312d544c45310038
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): EDID vendor "LPL", prod id 48384
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (width too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): EDID for output TV
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000400
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000203 to 0x00000237
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: VSYNC_INT_STATUS OFIELD_INT_STATUS EFIELD_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000246 to 0x80000246
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000c0 to 0x000c0000
>(WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d
>(WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104
>(WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d
>(WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200
>(WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c
>(WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200
>(WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00606000
>(WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1
>(WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359
>(WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022
>(WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344
>(WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415
>(WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607
>(WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001
>(WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0
>(WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0
>(WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710088
>(WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x4e2d1dc8
>(WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024
>(WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198
>(WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to 0x8000085e
>(WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to 0x00028283
>(WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to 0x00014141
>(WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060
>(WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000
>(WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to 0x0000b060
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd000000a (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0xac000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x031f0800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000237 (status: VSYNC_INT_STATUS OFIELD_INT_STATUS EFIELD_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x80000246 (status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031106 (n = 3, m1 = 17, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026a00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x05b704ff (1280 active, 1464 total)
>(II) intel(0):             HBLANK_B: 0x05b704ff (1280 start, 1464 end)
>(II) intel(0):              HSYNC_B: 0x0547051f (1312 start, 1352 end)
>(II) intel(0):             VTOTAL_B: 0x0344031f (800 active, 837 total)
>(II) intel(0):             VBLANK_B: 0x0344031f (800 start, 837 end)
>(II) intel(0):              VSYNC_B: 0x03270323 (804 start, 808 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x000c0000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00606000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710088
>(II) intel(0):          TV_SC_CTL_2: 0x4e2d1dc8
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x8000085e
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x04
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x07
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0xab
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 73571 n 3 m1 17 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory)
>(II) No APM support in BIOS or kernel
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01a00000 (pgoffset 6656)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x02040000 (pgoffset 8256)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x02680000 (pgoffset 9856)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
>(II) intel(0): 0x00042000-0x00042fff: overlay registers (4 kB)
>(II) intel(0): 0x00043000-0x00043fff: power context (4 kB)
>(II) intel(0): 0x00100000-0x0073ffff: front buffer (6400 kB) X tiled
>(II) intel(0): 0x00740000-0x019fffff: exa offscreen (19200 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01a00000-0x0203ffff: back buffer (6400 kB) X tiled
>(II) intel(0): 0x02040000-0x0267ffff: depth buffer (6400 kB) Y tiled
>(II) intel(0): 0x02680000-0x0467ffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "640x480"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): chosen: dotclock 73371 vco 2054400 ((m 107, m1 18, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x031f0800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x80000246 (status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031205 (n = 3, m1 = 18, m2 = 5)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x05b704ff (1280 active, 1464 total)
>(II) intel(0):             HBLANK_B: 0x05b704ff (1280 start, 1464 end)
>(II) intel(0):              HSYNC_B: 0x0547051f (1312 start, 1352 end)
>(II) intel(0):             VTOTAL_B: 0x0344031f (800 active, 837 total)
>(II) intel(0):             VBLANK_B: 0x0344031f (800 start, 837 end)
>(II) intel(0):              VSYNC_B: 0x03270323 (804 start, 808 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x100000c0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x20
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 73371 n 3 m1 18 m2 5 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] mapped front buffer at 0xd0100000, handle = 0x2a020000
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(--) SynPS/2 Synaptics TouchPad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(--) SynPS/2 Synaptics TouchPad touchpad found
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000246 to 0x80000246
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd000000a (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0xac000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x031f0800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x80000246 (status: FIFO_UNDERRUN VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031106 (n = 3, m1 = 17, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026a00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x05b704ff (1280 active, 1464 total)
>(II) intel(0):             HBLANK_B: 0x05b704ff (1280 start, 1464 end)
>(II) intel(0):              HSYNC_B: 0x0547051f (1312 start, 1352 end)
>(II) intel(0):             VTOTAL_B: 0x0344031f (800 active, 837 total)
>(II) intel(0):             VBLANK_B: 0x0344031f (800 start, 837 end)
>(II) intel(0):              VSYNC_B: 0x03270323 (804 start, 808 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x100000c0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 73571 n 3 m1 17 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory)
>(II) No APM support in BIOS or kernel
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x01a00000 (pgoffset 6656)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x02040000 (pgoffset 8256)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x02680000 (pgoffset 9856)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00041fff: exa G965 state buffer (64 kB)
>(II) intel(0): 0x00042000-0x00042fff: overlay registers (4 kB)
>(II) intel(0): 0x00043000-0x00043fff: power context (4 kB)
>(II) intel(0): 0x00100000-0x0073ffff: front buffer (6400 kB) X tiled
>(II) intel(0): 0x00740000-0x019fffff: exa offscreen (19200 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x01a00000-0x0203ffff: back buffer (6400 kB) X tiled
>(II) intel(0): 0x02040000-0x0267ffff: depth buffer (6400 kB) Y tiled
>(II) intel(0): 0x02680000-0x0467ffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "640x480"x60.0   73.50  1280 1312 1352 1464  800 804 808 837 -hsync -vsync (50.2 kHz)
>(II) intel(0): chosen: dotclock 73371 vco 2054400 ((m 107, m1 18, m2 5), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x031f0800
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000303
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00000246 (status: VSYNC_INT_STATUS LBLC_EVENT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031205 (n = 3, m1 = 18, m2 = 5)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x05b704ff (1280 active, 1464 total)
>(II) intel(0):             HBLANK_B: 0x05b704ff (1280 start, 1464 end)
>(II) intel(0):              HSYNC_B: 0x0547051f (1312 start, 1352 end)
>(II) intel(0):             VTOTAL_B: 0x0344031f (800 active, 837 total)
>(II) intel(0):             VBLANK_B: 0x0344031f (800 start, 837 end)
>(II) intel(0):              VSYNC_B: 0x03270323 (804 start, 808 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x100000c0
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x20
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 73371 n 3 m1 18 m2 5 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(--) SynPS/2 Synaptics TouchPad auto-dev sets device to /dev/input/event2
>(**) Option "Device" "/dev/input/event2"
>(--) SynPS/2 Synaptics TouchPad touchpad found

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Attachments on bug 459903: 314874 | 314875 | 314876 | 314877