Attachment 488813 Details for Bug 692177 – Variation of the patch posted upstream to use cpuid 4 rather than cpuid 2 when possible

[patch] Variation of the patch posted upstream to use cpuid 4 rather than cpuid 2 when possible

glibc-orabug11872171.patch (text/plain), 1.87 KB, created by john.haxby@oracle.com on 2011-03-30 15:57:52 UTC

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Creator: john.haxby@oracle.com

Created: 2011-03-30 15:57:52 UTC

Size: 1.87 KB

patch

obsolete

>diff -up glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c~ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c
>--- glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c~	2011-03-25 10:27:55.928658708 +0000
>+++ glibc-2.12-2-gc4ccff1/sysdeps/x86_64/cacheinfo.c	2011-03-25 10:30:14.440595193 +0000
>@@ -264,6 +264,58 @@ handle_intel (int name, unsigned int max
>   bool no_level_2_or_3 = false;
>   bool has_level_2 = false;
> 
>+  if (maxidx >= 4)
>+    {
>+      /* CPUID leaf 0x4 contains all the information.  We need to
>+	 iterate over it.  */
>+      unsigned int eax;
>+      unsigned int ebx;
>+      unsigned int ecx;
>+      unsigned int edx;
>+      /* Fold the name.  The _SC_ constants are always in the order SIZE,
>+ 	  ASSOC, LINESIZE.  */
>+      int folded_rel_name = (M(name) / 3) * 3;
>+ 
>+      unsigned int round = 0;
>+      while (1)
>+	{
>+	  __cpuid_count(4, round, eax, ebx, ecx, edx);
>+
>+	  enum { null = 0, data = 1, inst = 2, uni = 3 } type = eax & 0x1f;
>+	  if (type == null)
>+	    /* That was the end.  */
>+	    break;
>+
>+	  unsigned int level = (eax >> 5) & 0x7;
>+
>+	  if ((level == 1 && type == data
>+	       && folded_rel_name == M(_SC_LEVEL1_DCACHE_SIZE))
>+	      || (level == 1 && type == inst
>+		  && folded_rel_name == M(_SC_LEVEL1_ICACHE_SIZE))
>+	      || (level == 2 && folded_rel_name == M(_SC_LEVEL2_CACHE_SIZE))
>+	      || (level == 3 && folded_rel_name == M(_SC_LEVEL3_CACHE_SIZE))
>+	      || (level == 4 && folded_rel_name == M(_SC_LEVEL4_CACHE_SIZE)))
>+	    {
>+	      unsigned int offset = M(name) - folded_rel_name;
>+
>+	      if (offset == 0)
>+		/* Cache size.  */
>+		return (((ebx >> 22) + 1)
>+			* (((ebx >> 12) & 0x3ff) + 1)
>+			* ((ebx & 0xfff) + 1)
>+			* (ecx + 1));
>+	      if (offset == 1)
>+		return (ebx >> 22) + 1;
>+
>+	      assert (offset == 2);
>+	      return (ebx & 0xfff) + 1;
>+	    }
>+
>+	  ++round;
>+	}
>+      return 0;
>+    }
>+
>   while (cnt++ < max)
>     {
>       unsigned int eax;

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