Attachment 597440 Details for Bug 838823 – xorg.0 log

xorg.0 log

Xorg.0.log (text/plain), 158.48 KB, created by biodark on 2012-07-11 01:35:54 UTC

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Creator: biodark

Created: 2012-07-11 01:35:54 UTC

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obsolete

>[    26.862] 
>X.Org X Server 1.12.2
>Release Date: 2012-05-29
>[    26.862] X Protocol Version 11, Revision 0
>[    26.862] Build Operating System: x86-06 2.6.32-220.17.1.el6.x86_64 
>[    26.862] Current Operating System: Linux localhost.localdomain 3.4.4-5.fc17.x86_64 #1 SMP Thu Jul 5 20:20:59 UTC 2012 x86_64
>[    26.862] Kernel command line: BOOT_IMAGE=/vmlinuz-3.4.4-5.fc17.x86_64 root=/dev/mapper/vg-lv_root ro rd.md=0 rd.dm=0 SYSFONT=True KEYTABLE=pt-latin1 rd.lvm.lv=vg/lv_root rd.luks=0 LANG=pt_PT.UTF-8 rd.lvm.lv=vg/lv_swap rhgb quiet
>[    26.862] Build Date: 26 June 2012  04:32:54AM
>[    26.862] Build ID: xorg-x11-server 1.12.2-4.fc17 
>[    26.862] Current version of pixman: 0.24.4
>[    26.862] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    26.862] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    26.867] (==) Log file: "/var/log/Xorg.0.log", Time: Wed Jul 11 02:24:32 2012
>[    26.885] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    26.885] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    26.886] (==) No Layout section.  Using the first Screen section.
>[    26.886] (==) No screen section available. Using defaults.
>[    26.886] (**) |-->Screen "Default Screen Section" (0)
>[    26.886] (**) |   |-->Monitor "<default monitor>"
>[    26.886] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    26.886] (==) Automatically adding devices
>[    26.886] (==) Automatically enabling devices
>[    26.886] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    26.886] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    26.886] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    26.886] (II) Loader magic: 0x7c6ac0
>[    26.886] (II) Module ABI versions:
>[    26.886] 	X.Org ANSI C Emulation: 0.4
>[    26.886] 	X.Org Video Driver: 12.0
>[    26.886] 	X.Org XInput driver : 16.0
>[    26.886] 	X.Org Server Extension : 6.0
>[    26.889] (--) PCI:*(0:0:1:0) 1002:9802:105b:0e29 rev 0, Mem @ 0xc0000000/268435456, 0xfeb00000/262144, I/O @ 0x0000f000/256, BIOS @ 0x????????/131072
>[    26.889] (II) LoadModule: "extmod"
>[    26.890] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    26.893] (II) Module extmod: vendor="X.Org Foundation"
>[    26.893] 	compiled for 1.12.2, module version = 1.0.0
>[    26.893] 	Module class: X.Org Server Extension
>[    26.893] 	ABI class: X.Org Server Extension, version 6.0
>[    26.893] (II) Loading extension SELinux
>[    26.893] (II) Loading extension MIT-SCREEN-SAVER
>[    26.893] (II) Loading extension XFree86-VidModeExtension
>[    26.893] (II) Loading extension XFree86-DGA
>[    26.893] (II) Loading extension DPMS
>[    26.893] (II) Loading extension XVideo
>[    26.893] (II) Loading extension XVideo-MotionCompensation
>[    26.893] (II) Loading extension X-Resource
>[    26.893] (II) LoadModule: "dbe"
>[    26.896] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    26.897] (II) Module dbe: vendor="X.Org Foundation"
>[    26.897] 	compiled for 1.12.2, module version = 1.0.0
>[    26.897] 	Module class: X.Org Server Extension
>[    26.897] 	ABI class: X.Org Server Extension, version 6.0
>[    26.897] (II) Loading extension DOUBLE-BUFFER
>[    26.897] (II) LoadModule: "glx"
>[    26.900] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    26.900] (II) Module glx: vendor="X.Org Foundation"
>[    26.900] 	compiled for 1.12.2, module version = 1.0.0
>[    26.900] 	ABI class: X.Org Server Extension, version 6.0
>[    26.900] (==) AIGLX enabled
>[    26.900] (II) Loading extension GLX
>[    26.900] (II) LoadModule: "record"
>[    26.901] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    26.901] (II) Module record: vendor="X.Org Foundation"
>[    26.901] 	compiled for 1.12.2, module version = 1.13.0
>[    26.901] 	Module class: X.Org Server Extension
>[    26.901] 	ABI class: X.Org Server Extension, version 6.0
>[    26.903] (II) Loading extension RECORD
>[    26.903] (II) LoadModule: "dri"
>[    26.904] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    26.905] (II) Module dri: vendor="X.Org Foundation"
>[    26.905] 	compiled for 1.12.2, module version = 1.0.0
>[    26.905] 	ABI class: X.Org Server Extension, version 6.0
>[    26.905] (II) Loading extension XFree86-DRI
>[    26.905] (II) LoadModule: "dri2"
>[    26.905] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    26.906] (II) Module dri2: vendor="X.Org Foundation"
>[    26.906] 	compiled for 1.12.2, module version = 1.2.0
>[    26.906] 	ABI class: X.Org Server Extension, version 6.0
>[    26.906] (II) Loading extension DRI2
>[    26.906] (==) Matched ati as autoconfigured driver 0
>[    26.906] (==) Matched vesa as autoconfigured driver 1
>[    26.906] (==) Matched modesetting as autoconfigured driver 2
>[    26.906] (==) Matched fbdev as autoconfigured driver 3
>[    26.906] (==) Assigned the driver to the xf86ConfigLayout
>[    26.906] (II) LoadModule: "ati"
>[    26.932] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    26.932] (II) Module ati: vendor="X.Org Foundation"
>[    26.932] 	compiled for 1.12.0, module version = 6.14.99
>[    26.932] 	Module class: X.Org Video Driver
>[    26.933] 	ABI class: X.Org Video Driver, version 12.0
>[    26.933] (II) LoadModule: "radeon"
>[    26.933] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    26.934] (II) Module radeon: vendor="X.Org Foundation"
>[    26.934] 	compiled for 1.12.0, module version = 6.14.99
>[    26.934] 	Module class: X.Org Video Driver
>[    26.934] 	ABI class: X.Org Video Driver, version 12.0
>[    26.934] (II) LoadModule: "vesa"
>[    26.938] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    26.938] (II) Module vesa: vendor="X.Org Foundation"
>[    26.938] 	compiled for 1.12.0, module version = 2.3.1
>[    26.938] 	Module class: X.Org Video Driver
>[    26.938] 	ABI class: X.Org Video Driver, version 12.0
>[    26.938] (II) LoadModule: "modesetting"
>[    26.939] (WW) Warning, couldn't open module modesetting
>[    26.939] (II) UnloadModule: "modesetting"
>[    26.939] (II) Unloading modesetting
>[    26.939] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    26.939] (II) LoadModule: "fbdev"
>[    26.939] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    26.940] (II) Module fbdev: vendor="X.Org Foundation"
>[    26.940] 	compiled for 1.11.99.901, module version = 0.4.2
>[    26.940] 	ABI class: X.Org Video Driver, version 12.0
>[    26.940] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    26.952] (II) VESA: driver for VESA chipsets: vesa
>[    26.952] (II) FBDEV: driver for framebuffer: fbdev
>[    26.952] (++) using VT number 1
>
>[    26.955] (II) [KMS] Kernel modesetting enabled.
>[    26.955] (WW) Falling back to old probe method for vesa
>[    26.955] (WW) Falling back to old probe method for fbdev
>[    26.955] (II) Loading sub module "fbdevhw"
>[    26.955] (II) LoadModule: "fbdevhw"
>[    26.955] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    26.956] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    26.956] 	compiled for 1.12.2, module version = 0.0.2
>[    26.956] 	ABI class: X.Org Video Driver, version 12.0
>[    26.956] (II) RADEON(0): RADEONPreInit_KMS
>[    26.956] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    26.956] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    26.956] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    26.956] (==) RADEON(0): Default visual is TrueColor
>[    26.956] (==) RADEON(0): RGB weight 888
>[    26.956] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    26.956] (--) RADEON(0): Chipset: "AMD Radeon HD 6310 Graphics" (ChipID = 0x9802)
>[    26.957] (II) RADEON(0): PCIE card detected
>[    26.957] drmOpenDevice: node name is /dev/dri/card0
>[    26.957] drmOpenDevice: open result is 8, (OK)
>[    26.957] drmOpenByBusid: Searching for BusID pci:0000:00:01.0
>[    26.957] drmOpenDevice: node name is /dev/dri/card0
>[    26.957] drmOpenDevice: open result is 8, (OK)
>[    26.957] drmOpenByBusid: drmOpenMinor returns 8
>[    26.957] drmOpenByBusid: drmGetBusid reports pci:0000:00:01.0
>[    26.957] (II) Loading sub module "exa"
>[    26.957] (II) LoadModule: "exa"
>[    26.958] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    26.958] (II) Module exa: vendor="X.Org Foundation"
>[    26.958] 	compiled for 1.12.2, module version = 2.5.0
>[    26.958] 	ABI class: X.Org Video Driver, version 12.0
>[    26.958] (II) RADEON(0): KMS Color Tiling: enabled
>[    26.958] (II) RADEON(0): KMS Pageflipping: enabled
>[    26.958] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    26.991] (II) RADEON(0): Output DVI-0 has no monitor section
>[    27.003] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    27.013] (II) RADEON(0): Output VGA-0 has no monitor section
>[    27.057] (II) RADEON(0): EDID for output DVI-0
>[    27.057] (II) RADEON(0): Manufacturer: GSM  Model: 430b  Serial#: 95515
>[    27.057] (II) RADEON(0): Year: 2003  Week: 29
>[    27.057] (II) RADEON(0): EDID Version: 1.3
>[    27.057] (II) RADEON(0): Analog Display Input,  Input Voltage Level: 0.700/0.300 V
>[    27.057] (II) RADEON(0): Signal levels configurable
>[    27.057] (II) RADEON(0): Sync:  Separate
>[    27.057] (II) RADEON(0): Max Image Size [cm]: horiz.: 33  vert.: 25
>[    27.057] (II) RADEON(0): Gamma: 2.83
>[    27.057] (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>[    27.057] (II) RADEON(0): First detailed timing not preferred mode in violation of standard!
>[    27.057] (II) RADEON(0): redX: 0.632 redY: 0.330   greenX: 0.273 greenY: 0.605
>[    27.057] (II) RADEON(0): blueX: 0.142 blueY: 0.063   whiteX: 0.283 whiteY: 0.298
>[    27.057] (II) RADEON(0): Supported established timings:
>[    27.057] (II) RADEON(0): 720x400@70Hz
>[    27.057] (II) RADEON(0): 720x400@88Hz
>[    27.057] (II) RADEON(0): 640x480@60Hz
>[    27.057] (II) RADEON(0): 640x480@67Hz
>[    27.057] (II) RADEON(0): 640x480@72Hz
>[    27.057] (II) RADEON(0): 640x480@75Hz
>[    27.057] (II) RADEON(0): 800x600@56Hz
>[    27.057] (II) RADEON(0): 800x600@60Hz
>[    27.057] (II) RADEON(0): 800x600@72Hz
>[    27.057] (II) RADEON(0): 800x600@75Hz
>[    27.057] (II) RADEON(0): 832x624@75Hz
>[    27.057] (II) RADEON(0): 1024x768@87Hz (interlaced)
>[    27.057] (II) RADEON(0): 1024x768@60Hz
>[    27.057] (II) RADEON(0): 1024x768@70Hz
>[    27.057] (II) RADEON(0): 1024x768@75Hz
>[    27.057] (II) RADEON(0): 1152x864@75Hz
>[    27.057] (II) RADEON(0): Manufacturer's mask: 0
>[    27.057] (II) RADEON(0): Supported standard timings:
>[    27.058] (II) RADEON(0): #0: hsize: 640  vsize 480  refresh: 75  vid: 20273
>[    27.058] (II) RADEON(0): #1: hsize: 640  vsize 480  refresh: 85  vid: 22833
>[    27.058] (II) RADEON(0): #2: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>[    27.058] (II) RADEON(0): #3: hsize: 800  vsize 600  refresh: 85  vid: 22853
>[    27.058] (II) RADEON(0): #4: hsize: 1024  vsize 768  refresh: 75  vid: 20321
>[    27.058] (II) RADEON(0): #5: hsize: 1024  vsize 768  refresh: 85  vid: 22881
>[    27.058] (II) RADEON(0): #6: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>[    27.058] (II) RADEON(0): #7: hsize: 832  vsize 624  refresh: 75  vid: 20297
>[    27.058] (II) RADEON(0): Supported detailed timing:
>[    27.058] (II) RADEON(0): clock: 94.5 MHz   Image Size:  310 x 230 mm
>[    27.058] (II) RADEON(0): h_active: 1024  h_sync: 1072  h_sync_end 1168 h_blank_end 1376 h_border: 0
>[    27.058] (II) RADEON(0): v_active: 768  v_sync: 769  v_sync_end 772 v_blanking: 808 v_border: 0
>[    27.058] (II) RADEON(0): Ranges: V min: 50 V max: 160 Hz, H min: 30 H max: 71 kHz, PixClock max 115 MHz
>[    27.058] (II) RADEON(0): Monitor name: 700S
>[    27.058] (II) RADEON(0): Monitor name: 
>[    27.058] (II) RADEON(0): EDID (in hex):
>[    27.058] (II) RADEON(0): 	00ffffffffffff001e6d0b431b750100
>[    27.058] (II) RADEON(0): 	1d0d0103182119b7e8e059a154469b24
>[    27.058] (II) RADEON(0): 	10484cfffe80314f3159714f4559614f
>[    27.058] (II) RADEON(0): 	61598180494fea240060410028303060
>[    27.058] (II) RADEON(0): 	130036e61000001e000000fd0032a01e
>[    27.058] (II) RADEON(0): 	470b000a202020202020000000fc0037
>[    27.058] (II) RADEON(0): 	3030530a2020202020202020000000fc
>[    27.058] (II) RADEON(0): 	000a202020202020202020202020004b
>[    27.058] (II) RADEON(0): EDID vendor "GSM", prod id 17163
>[    27.058] (II) RADEON(0): Using EDID range info for horizontal sync
>[    27.058] (II) RADEON(0): Using EDID range info for vertical refresh
>[    27.058] (II) RADEON(0): Printing DDC gathered Modelines:
>[    27.058] (II) RADEON(0): Modeline "1024x768"x0.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz e)
>[    27.058] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    27.058] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    27.058] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    27.058] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    27.058] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    27.058] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    27.058] (II) RADEON(0): Modeline "720x400"x0.0   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz e)
>[    27.058] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    27.058] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    27.058] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    27.058] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    27.058] (II) RADEON(0): Modeline "1024x768i"x0.0   44.90  1024 1032 1208 1264  768 768 772 817 interlace +hsync +vsync (35.5 kHz e)
>[    27.058] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    27.058] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    27.059] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    27.059] (II) RADEON(0): Modeline "640x480"x0.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz e)
>[    27.059] (II) RADEON(0): Modeline "800x600"x0.0   56.25  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    27.059] (II) RADEON(0): Modeline "832x624"x75.0   53.20  832 872 960 1088  624 625 628 652 -hsync +vsync (48.9 kHz e)
>[    27.059] (II) RADEON(0): Printing probed modes for output DVI-0
>[    27.059] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    27.059] (II) RADEON(0): Modeline "1024x768"x87.0   44.90  1024 1032 1208 1264  768 768 776 817 interlace +hsync +vsync (35.5 kHz e)
>[    27.059] (II) RADEON(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    27.059] (II) RADEON(0): Modeline "832x624"x75.0   53.21  832 872 960 1088  624 625 628 652 -hsync +vsync (48.9 kHz)
>[    27.059] (II) RADEON(0): Modeline "800x600"x85.1   56.25  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz e)
>[    27.059] (II) RADEON(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    27.059] (II) RADEON(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    27.059] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    27.059] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    27.059] (II) RADEON(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz e)
>[    27.059] (II) RADEON(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz e)
>[    27.059] (II) RADEON(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    27.059] (II) RADEON(0): Modeline "640x480"x66.7   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    27.059] (II) RADEON(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    27.059] (II) RADEON(0): Modeline "720x400"x87.8   35.50  720 738 846 900  400 421 423 449 -hsync -vsync (39.4 kHz e)
>[    27.059] (II) RADEON(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    27.061] (II) RADEON(0): EDID for output HDMI-0
>[    27.074] (II) RADEON(0): EDID for output VGA-0
>[    27.074] (II) RADEON(0): Printing probed modes for output VGA-0
>[    27.074] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    27.074] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    27.074] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    27.074] (II) RADEON(0): Modeline "848x480"x60.0   33.75  848 864 976 1088  480 486 494 517 +hsync +vsync (31.0 kHz e)
>[    27.074] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 489 492 525 -hsync -vsync (31.5 kHz e)
>[    27.074] (II) RADEON(0): Output DVI-0 connected
>[    27.074] (II) RADEON(0): Output HDMI-0 disconnected
>[    27.074] (II) RADEON(0): Output VGA-0 connected
>[    27.074] (II) RADEON(0): Using fuzzy aspect match for initial modes
>[    27.074] (II) RADEON(0): Output DVI-0 using initial mode 1024x768 +0+0
>[    27.074] (II) RADEON(0): Output VGA-0 using initial mode 1024x768 +0+0
>[    27.074] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    27.075] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:18000000 visible:fac0000
>[    27.075] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    27.075] (**) RADEON(0): Display dimensions: (330, 250) mm
>[    27.075] (**) RADEON(0): DPI set to (78, 78)
>[    27.075] (II) Loading sub module "fb"
>[    27.075] (II) LoadModule: "fb"
>[    27.077] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    27.078] (II) Module fb: vendor="X.Org Foundation"
>[    27.078] 	compiled for 1.12.2, module version = 1.0.0
>[    27.078] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    27.078] (II) Loading sub module "ramdac"
>[    27.078] (II) LoadModule: "ramdac"
>[    27.078] (II) Module "ramdac" already built-in
>[    27.078] (II) UnloadModule: "vesa"
>[    27.078] (II) Unloading vesa
>[    27.078] (II) UnloadModule: "fbdev"
>[    27.078] (II) Unloading fbdev
>[    27.078] (II) UnloadSubModule: "fbdevhw"
>[    27.078] (II) Unloading fbdevhw
>[    27.078] (--) Depth 24 pixmap format is 32 bpp
>[    27.079] (II) RADEON(0): [DRI2] Setup complete
>[    27.079] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    27.079] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    27.079] (II) RADEON(0): Front buffer size: 3072K
>[    27.079] (II) RADEON(0): VRAM usage limit set to 228326K
>[    27.080] (II) RADEON(0): Initializing backing store
>[    27.080] (==) RADEON(0): Backing store disabled
>[    27.080] (II) RADEON(0): Direct rendering enabled
>[    27.080] (II) RADEON(0): Initializing Acceleration
>[    27.080] (II) RADEON(0): Setting EXA maxPitchBytes
>[    27.080] (II) EXA(0): Driver allocated offscreen pixmaps
>[    27.080] (II) EXA(0): Driver registered support for the following operations:
>[    27.080] (II)         Solid
>[    27.080] (II)         Copy
>[    27.080] (II)         Composite (RENDER acceleration)
>[    27.080] (II)         UploadToScreen
>[    27.080] (II)         DownloadFromScreen
>[    27.080] (II) RADEON(0): Acceleration enabled
>[    27.080] (II) RADEON(0): Initializing DPMS
>[    27.080] (==) RADEON(0): DPMS enabled
>[    27.080] (II) RADEON(0): Initializing Cursor
>[    27.080] (==) RADEON(0): Silken mouse enabled
>[    27.080] (II) RADEON(0): Initializing Xv
>[    27.081] (II) RADEON(0): Set up textured video
>[    27.081] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    27.081] (II) RADEON(0): [XvMC] Extension initialized.
>[    27.081] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    27.081] (II) RADEON(0): Initializing kms color map
>[    27.081] (II) RADEON(0): RADEONScreenInit finished
>[    27.081] (--) RandR disabled
>[    27.081] (II) Initializing built-in extension Generic Event Extension
>[    27.081] (II) Initializing built-in extension SHAPE
>[    27.081] (II) Initializing built-in extension MIT-SHM
>[    27.081] (II) Initializing built-in extension XInputExtension
>[    27.081] (II) Initializing built-in extension XTEST
>[    27.081] (II) Initializing built-in extension BIG-REQUESTS
>[    27.081] (II) Initializing built-in extension SYNC
>[    27.081] (II) Initializing built-in extension XKEYBOARD
>[    27.081] (II) Initializing built-in extension XC-MISC
>[    27.081] (II) Initializing built-in extension XINERAMA
>[    27.082] (II) Initializing built-in extension XFIXES
>[    27.082] (II) Initializing built-in extension RENDER
>[    27.082] (II) Initializing built-in extension RANDR
>[    27.082] (II) Initializing built-in extension COMPOSITE
>[    27.082] (II) Initializing built-in extension DAMAGE
>[    27.086] (II) SELinux: Disabled by boolean
>[    27.649] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    27.649] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    27.649] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    27.649] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    27.652] (II) AIGLX: Loaded and initialized r600
>[    27.652] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    27.693] (II) RADEON(0): Setting screen physical size to 270 x 203
>[    27.809] (II) XKB: Reusing cached keymap
>[    27.820] (II) config/udev: Adding input device Power Button (/dev/input/event2)
>[    27.821] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    27.821] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    27.821] (II) LoadModule: "evdev"
>[    27.821] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    27.822] (II) Module evdev: vendor="X.Org Foundation"
>[    27.822] 	compiled for 1.12.0, module version = 2.7.0
>[    27.822] 	Module class: X.Org XInput Driver
>[    27.822] 	ABI class: X.Org XInput driver, version 16.0
>[    27.823] (II) Using input driver 'evdev' for 'Power Button'
>[    27.823] 	Option "XkbRules" "evdev"
>[    27.823] 	Option "XkbModel" "pc105"
>[    27.823] 	Option "XkbLayout" "pt"
>[    27.823] 	Option "_source" "server/udev"
>[    27.823] 	Option "name" "Power Button"
>[    27.823] 	Option "path" "/dev/input/event2"
>[    27.823] 	Option "device" "/dev/input/event2"
>[    27.823] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2/event2"
>[    27.823] 	Option "driver" "evdev"
>[    27.823] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.823] (**) Power Button: always reports core events
>[    27.823] (**) evdev: Power Button: Device: "/dev/input/event2"
>[    27.823] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    27.823] (--) evdev: Power Button: Found keys
>[    27.824] (II) evdev: Power Button: Configuring as keyboard
>[    27.824] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2/event2"
>[    27.824] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    27.824] (**) Option "xkb_rules" "evdev"
>[    27.824] (**) Option "xkb_model" "pc105"
>[    27.824] (**) Option "xkb_layout" "pt"
>[    27.824] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.882] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    27.882] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    27.882] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    27.882] (II) Using input driver 'evdev' for 'Power Button'
>[    27.882] 	Option "XkbRules" "evdev"
>[    27.882] 	Option "XkbModel" "pc105"
>[    27.882] 	Option "XkbLayout" "pt"
>[    27.882] 	Option "_source" "server/udev"
>[    27.882] 	Option "name" "Power Button"
>[    27.882] 	Option "path" "/dev/input/event0"
>[    27.882] 	Option "device" "/dev/input/event0"
>[    27.882] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    27.882] 	Option "driver" "evdev"
>[    27.882] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.883] (**) Power Button: always reports core events
>[    27.883] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    27.883] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    27.883] (--) evdev: Power Button: Found keys
>[    27.883] (II) evdev: Power Button: Configuring as keyboard
>[    27.883] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    27.883] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 7)
>[    27.883] (**) Option "xkb_rules" "evdev"
>[    27.883] (**) Option "xkb_model" "pc105"
>[    27.883] (**) Option "xkb_layout" "pt"
>[    27.883] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.883] (II) XKB: Reusing cached keymap
>[    27.884] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    27.884] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    27.884] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    27.884] (II) Using input driver 'evdev' for 'Sleep Button'
>[    27.884] 	Option "XkbRules" "evdev"
>[    27.884] 	Option "XkbModel" "pc105"
>[    27.884] 	Option "XkbLayout" "pt"
>[    27.884] 	Option "_source" "server/udev"
>[    27.884] 	Option "name" "Sleep Button"
>[    27.884] 	Option "path" "/dev/input/event1"
>[    27.884] 	Option "device" "/dev/input/event1"
>[    27.884] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    27.884] 	Option "driver" "evdev"
>[    27.884] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.885] (**) Sleep Button: always reports core events
>[    27.885] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    27.885] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    27.885] (--) evdev: Sleep Button: Found keys
>[    27.885] (II) evdev: Sleep Button: Configuring as keyboard
>[    27.885] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    27.885] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 8)
>[    27.885] (**) Option "xkb_rules" "evdev"
>[    27.885] (**) Option "xkb_model" "pc105"
>[    27.885] (**) Option "xkb_layout" "pt"
>[    27.885] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.885] (II) XKB: Reusing cached keymap
>[    27.886] (II) config/udev: Adding input device HD-Audio Generic HDMI/DP,pcm=3 (/dev/input/event7)
>[    27.886] (II) No input driver specified, ignoring this device.
>[    27.886] (II) This device may have been added with another device file.
>[    27.887] (II) config/udev: Adding input device   USB Keyboard (/dev/input/event3)
>[    27.887] (**)   USB Keyboard: Applying InputClass "evdev keyboard catchall"
>[    27.887] (**)   USB Keyboard: Applying InputClass "system-setup-keyboard"
>[    27.887] (II) Using input driver 'evdev' for '  USB Keyboard'
>[    27.887] 	Option "XkbRules" "evdev"
>[    27.887] 	Option "XkbModel" "pc105"
>[    27.887] 	Option "XkbLayout" "pt"
>[    27.887] 	Option "_source" "server/udev"
>[    27.887] 	Option "name" "  USB Keyboard"
>[    27.887] 	Option "path" "/dev/input/event3"
>[    27.887] 	Option "device" "/dev/input/event3"
>[    27.887] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:12.0/usb4/4-5/4-5:1.0/input/input4/event3"
>[    27.887] 	Option "driver" "evdev"
>[    27.887] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.887] (**)   USB Keyboard: always reports core events
>[    27.887] (**) evdev:   USB Keyboard: Device: "/dev/input/event3"
>[    27.887] (--) evdev:   USB Keyboard: Vendor 0x1241 Product 0x1503
>[    27.887] (--) evdev:   USB Keyboard: Found keys
>[    27.887] (II) evdev:   USB Keyboard: Configuring as keyboard
>[    27.887] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:12.0/usb4/4-5/4-5:1.0/input/input4/event3"
>[    27.887] (II) XINPUT: Adding extended input device "  USB Keyboard" (type: KEYBOARD, id 9)
>[    27.887] (**) Option "xkb_rules" "evdev"
>[    27.887] (**) Option "xkb_model" "pc105"
>[    27.887] (**) Option "xkb_layout" "pt"
>[    27.888] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.888] (II) XKB: Reusing cached keymap
>[    27.889] (II) config/udev: Adding input device   USB Keyboard (/dev/input/event4)
>[    27.889] (**)   USB Keyboard: Applying InputClass "evdev keyboard catchall"
>[    27.889] (**)   USB Keyboard: Applying InputClass "system-setup-keyboard"
>[    27.889] (II) Using input driver 'evdev' for '  USB Keyboard'
>[    27.889] 	Option "XkbRules" "evdev"
>[    27.889] 	Option "XkbModel" "pc105"
>[    27.889] 	Option "XkbLayout" "pt"
>[    27.889] 	Option "_source" "server/udev"
>[    27.889] 	Option "name" "  USB Keyboard"
>[    27.889] 	Option "path" "/dev/input/event4"
>[    27.889] 	Option "device" "/dev/input/event4"
>[    27.889] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:12.0/usb4/4-5/4-5:1.1/input/input5/event4"
>[    27.889] 	Option "driver" "evdev"
>[    27.889] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.889] (**)   USB Keyboard: always reports core events
>[    27.889] (**) evdev:   USB Keyboard: Device: "/dev/input/event4"
>[    27.889] (--) evdev:   USB Keyboard: Vendor 0x1241 Product 0x1503
>[    27.889] (--) evdev:   USB Keyboard: Found keys
>[    27.889] (II) evdev:   USB Keyboard: Configuring as keyboard
>[    27.889] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:12.0/usb4/4-5/4-5:1.1/input/input5/event4"
>[    27.889] (II) XINPUT: Adding extended input device "  USB Keyboard" (type: KEYBOARD, id 10)
>[    27.889] (**) Option "xkb_rules" "evdev"
>[    27.890] (**) Option "xkb_model" "pc105"
>[    27.890] (**) Option "xkb_layout" "pt"
>[    27.890] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.890] (II) XKB: Reusing cached keymap
>[    27.891] (II) config/udev: Adding input device HDA ATI SB Front Headphone (/dev/input/event9)
>[    27.891] (II) No input driver specified, ignoring this device.
>[    27.891] (II) This device may have been added with another device file.
>[    27.891] (II) config/udev: Adding input device HDA ATI SB Line Out (/dev/input/event10)
>[    27.892] (II) No input driver specified, ignoring this device.
>[    27.892] (II) This device may have been added with another device file.
>[    27.892] (II) config/udev: Adding input device HDA ATI SB Mic (/dev/input/event8)
>[    27.892] (II) No input driver specified, ignoring this device.
>[    27.892] (II) This device may have been added with another device file.
>[    27.893] (II) config/udev: Adding input device Microsoft Microsoft 5-Button Mouse with IntelliEye(TM) (/dev/input/event5)
>[    27.893] (**) Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Applying InputClass "evdev pointer catchall"
>[    27.893] (II) Using input driver 'evdev' for 'Microsoft Microsoft 5-Button Mouse with IntelliEye(TM)'
>[    27.893] 	Option "XkbRules" "evdev"
>[    27.893] 	Option "XkbModel" "evdev"
>[    27.893] 	Option "XkbLayout" "us"
>[    27.893] 	Option "_source" "server/udev"
>[    27.893] 	Option "name" "Microsoft Microsoft 5-Button Mouse with IntelliEye(TM)"
>[    27.893] 	Option "path" "/dev/input/event5"
>[    27.893] 	Option "device" "/dev/input/event5"
>[    27.893] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:15.2/0000:04:00.0/usb8/8-1/8-1:1.0/input/input6/event5"
>[    27.893] 	Option "driver" "evdev"
>[    27.893] (**) Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): always reports core events
>[    27.893] (**) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Device: "/dev/input/event5"
>[    27.893] (--) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Vendor 0x45e Product 0x47
>[    27.893] (--) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Found 9 mouse buttons
>[    27.893] (--) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Found scroll wheel(s)
>[    27.893] (--) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Found relative axes
>[    27.893] (--) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Found x and y relative axes
>[    27.893] (II) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Configuring as mouse
>[    27.893] (II) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): Adding scrollwheel support
>[    27.893] (**) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): YAxisMapping: buttons 4 and 5
>[    27.893] (**) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    27.893] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:15.2/0000:04:00.0/usb8/8-1/8-1:1.0/input/input6/event5"
>[    27.893] (II) XINPUT: Adding extended input device "Microsoft Microsoft 5-Button Mouse with IntelliEye(TM)" (type: MOUSE, id 11)
>[    27.894] (II) evdev: Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): initialized for relative axes.
>[    27.894] (**) Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): (accel) keeping acceleration scheme 1
>[    27.894] (**) Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): (accel) acceleration profile 0
>[    27.894] (**) Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): (accel) acceleration factor: 2.000
>[    27.894] (**) Microsoft Microsoft 5-Button Mouse with IntelliEye(TM): (accel) acceleration threshold: 4
>[    27.895] (II) config/udev: Adding input device Microsoft Microsoft 5-Button Mouse with IntelliEye(TM) (/dev/input/mouse0)
>[    27.895] (II) No input driver specified, ignoring this device.
>[    27.895] (II) This device may have been added with another device file.
>[    27.895] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event6)
>[    27.896] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    27.896] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    27.896] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    27.896] 	Option "XkbRules" "evdev"
>[    27.896] 	Option "XkbModel" "pc105"
>[    27.896] 	Option "XkbLayout" "pt"
>[    27.896] 	Option "_source" "server/udev"
>[    27.896] 	Option "name" "AT Translated Set 2 keyboard"
>[    27.896] 	Option "path" "/dev/input/event6"
>[    27.896] 	Option "device" "/dev/input/event6"
>[    27.896] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input7/event6"
>[    27.896] 	Option "driver" "evdev"
>[    27.896] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    27.896] (**) AT Translated Set 2 keyboard: always reports core events
>[    27.896] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event6"
>[    27.896] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    27.896] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    27.896] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    27.896] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input7/event6"
>[    27.896] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 12)
>[    27.896] (**) Option "xkb_rules" "evdev"
>[    27.896] (**) Option "xkb_model" "pc105"
>[    27.896] (**) Option "xkb_layout" "pt"
>[    27.896] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    27.896] (II) XKB: Reusing cached keymap
>[    27.909] (II) RADEON(0): RADEONSaveScreen(2)
>[    34.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28066b0]
>[    34.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28066b0] width 1024 pitch 4096 (/4 1024)
>[    34.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7af0]
>[    34.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7af0] width 1024 pitch 4096 (/4 1024)
>[    34.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28066b0]
>[    34.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28066b0] width 1024 pitch 4096 (/4 1024)
>[    34.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7af0]
>[    34.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7af0] width 1024 pitch 4096 (/4 1024)
>[    34.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28066b0]
>[    34.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28066b0] width 1024 pitch 4096 (/4 1024)
>[    34.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7af0]
>[    34.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7af0] width 1024 pitch 4096 (/4 1024)
>[    34.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28066b0]
>[    34.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28066b0] width 1024 pitch 4096 (/4 1024)
>[    34.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7af0]
>[    34.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7af0] width 1024 pitch 4096 (/4 1024)
>[    34.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28066b0]
>[    34.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28066b0] width 1024 pitch 4096 (/4 1024)
>[    34.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e7af0]
>[    34.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e7af0] width 1024 pitch 4096 (/4 1024)
>[    34.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    34.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    34.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    34.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    34.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    34.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    34.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    34.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    34.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    34.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    34.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    34.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    34.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    34.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    34.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    34.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    34.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    34.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    34.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    34.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    34.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    35.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    35.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    35.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    35.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    35.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    35.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    35.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    35.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    35.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    35.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    35.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    35.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    35.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    35.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    35.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    35.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    35.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    35.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    35.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    35.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809290]
>[    35.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809290] width 1024 pitch 4096 (/4 1024)
>[    35.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2809230]
>[    35.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2809230] width 1024 pitch 4096 (/4 1024)
>[    35.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2808a60]
>[    36.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2808a60] width 1024 pitch 4096 (/4 1024)
>[    36.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d310]
>[    36.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d310] width 1024 pitch 4096 (/4 1024)
>[    36.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    36.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    36.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    36.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    36.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    36.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    36.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    36.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    36.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    36.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    36.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    36.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    37.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    37.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    37.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    37.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    39.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    39.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    39.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    39.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    39.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    39.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    39.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    40.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    40.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    40.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    40.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    41.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    41.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    41.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    41.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    42.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    42.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    42.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    42.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    42.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d430]
>[    42.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d430] width 1024 pitch 4096 (/4 1024)
>[    42.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280d0a0]
>[    42.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280d0a0] width 1024 pitch 4096 (/4 1024)
>[    61.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    61.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    61.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e504e0]
>[    61.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e504e0] width 1024 pitch 4096 (/4 1024)
>[    61.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    61.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    61.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e504e0]
>[    61.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e504e0] width 1024 pitch 4096 (/4 1024)
>[    62.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    62.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    62.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c120]
>[    62.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c120] width 1024 pitch 4096 (/4 1024)
>[    76.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    76.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    84.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c120]
>[    84.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c120] width 1024 pitch 4096 (/4 1024)
>[    84.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    84.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    84.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c120]
>[    84.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c120] width 1024 pitch 4096 (/4 1024)
>[    84.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    84.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    84.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c120]
>[    84.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c120] width 1024 pitch 4096 (/4 1024)
>[    85.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb60]
>[    85.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb60] width 1024 pitch 4096 (/4 1024)
>[    85.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c110]
>[    85.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c110] width 1024 pitch 4096 (/4 1024)
>[    85.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[    85.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[    86.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c110]
>[    87.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c110] width 1024 pitch 4096 (/4 1024)
>[    87.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73b50]
>[    87.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73b50] width 1024 pitch 4096 (/4 1024)
>[    87.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[    88.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[    88.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e750f0]
>[    88.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e750f0] width 1024 pitch 4096 (/4 1024)
>[    88.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e753a0]
>[    88.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e753a0] width 1024 pitch 4096 (/4 1024)
>[    88.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e750f0]
>[    88.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e750f0] width 1024 pitch 4096 (/4 1024)
>[    88.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e753a0]
>[    88.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e753a0] width 1024 pitch 4096 (/4 1024)
>[    88.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    88.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    88.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7eda0]
>[    88.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7eda0] width 1024 pitch 4096 (/4 1024)
>[    90.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    90.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    90.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e743d0]
>[    90.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e743d0] width 1024 pitch 4096 (/4 1024)
>[    90.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    90.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    90.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e743d0]
>[    90.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e743d0] width 1024 pitch 4096 (/4 1024)
>[    90.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    90.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    90.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e743d0]
>[    90.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e743d0] width 1024 pitch 4096 (/4 1024)
>[    90.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    90.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    91.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e743d0]
>[    91.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e743d0] width 1024 pitch 4096 (/4 1024)
>[    91.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5ef10]
>[    91.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5ef10] width 1024 pitch 4096 (/4 1024)
>[    91.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4acc0]
>[    91.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4acc0] width 1024 pitch 4096 (/4 1024)
>[    91.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    91.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    91.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[    91.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[    92.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5efb0]
>[    92.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5efb0] width 1024 pitch 4096 (/4 1024)
>[    93.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b540]
>[    93.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b540] width 1024 pitch 4096 (/4 1024)
>[    93.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[    93.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[    93.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b540]
>[    93.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b540] width 1024 pitch 4096 (/4 1024)
>[    93.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[    93.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[    93.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b540]
>[    93.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b540] width 1024 pitch 4096 (/4 1024)
>[    93.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[    93.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[    94.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b540]
>[    94.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b540] width 1024 pitch 4096 (/4 1024)
>[    94.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[    94.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[    94.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b540]
>[    94.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b540] width 1024 pitch 4096 (/4 1024)
>[    94.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5ef10]
>[    94.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5ef10] width 1024 pitch 4096 (/4 1024)
>[    94.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5ef10]
>[    94.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5ef10] width 1024 pitch 4096 (/4 1024)
>[    95.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    95.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    95.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[    95.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[    95.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75520]
>[    95.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75520] width 1024 pitch 4096 (/4 1024)
>[    95.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[    95.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[    95.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    95.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    98.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e370]
>[    98.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e370] width 1024 pitch 4096 (/4 1024)
>[    98.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32a00]
>[    98.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32a00] width 1024 pitch 4096 (/4 1024)
>[    98.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e370]
>[    98.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e370] width 1024 pitch 4096 (/4 1024)
>[    98.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32a00]
>[    98.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32a00] width 1024 pitch 4096 (/4 1024)
>[    98.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e370]
>[    98.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e370] width 1024 pitch 4096 (/4 1024)
>[    98.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3ea60]
>[    99.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3ea60] width 1024 pitch 4096 (/4 1024)
>[    99.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e370]
>[    99.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e370] width 1024 pitch 4096 (/4 1024)
>[   101.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb07a0]
>[   101.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb07a0] width 1024 pitch 4096 (/4 1024)
>[   102.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32450]
>[   103.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32450] width 1024 pitch 4096 (/4 1024)
>[   103.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cd70]
>[   103.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cd70] width 1024 pitch 4096 (/4 1024)
>[   103.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f39ee0]
>[   103.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f39ee0] width 1024 pitch 4096 (/4 1024)
>[   103.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cd70]
>[   103.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cd70] width 1024 pitch 4096 (/4 1024)
>[   103.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f39ee0]
>[   103.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f39ee0] width 1024 pitch 4096 (/4 1024)
>[   103.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   103.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   103.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[   103.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[   103.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cb70]
>[   103.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cb70] width 1024 pitch 4096 (/4 1024)
>[   103.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[   103.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[   103.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cb70]
>[   103.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cb70] width 1024 pitch 4096 (/4 1024)
>[   103.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   103.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   103.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   103.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   103.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   103.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   103.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82d70]
>[   103.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82d70] width 1024 pitch 4096 (/4 1024)
>[   103.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75520]
>[   103.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75520] width 1024 pitch 4096 (/4 1024)
>[   103.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cb70]
>[   103.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cb70] width 1024 pitch 4096 (/4 1024)
>[   103.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82d70]
>[   103.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82d70] width 1024 pitch 4096 (/4 1024)
>[   103.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   103.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   103.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   103.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   103.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   103.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   104.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   104.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   104.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   104.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   104.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   104.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   104.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   104.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   104.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32950]
>[   104.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32950] width 1024 pitch 4096 (/4 1024)
>[   104.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   104.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   104.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32950]
>[   104.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32950] width 1024 pitch 4096 (/4 1024)
>[   113.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   113.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   113.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   113.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   113.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32950]
>[   113.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32950] width 1024 pitch 4096 (/4 1024)
>[   113.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eae920]
>[   113.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eae920] width 1024 pitch 4096 (/4 1024)
>[   113.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   113.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   113.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eae920]
>[   113.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eae920] width 1024 pitch 4096 (/4 1024)
>[   113.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   113.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   113.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f31c60]
>[   113.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f31c60] width 1024 pitch 4096 (/4 1024)
>[   113.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   113.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   113.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f31c60]
>[   113.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f31c60] width 1024 pitch 4096 (/4 1024)
>[   113.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   113.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   114.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   114.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   114.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   114.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   114.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   114.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   114.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   114.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   114.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eae920]
>[   114.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eae920] width 1024 pitch 4096 (/4 1024)
>[   114.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   114.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   114.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   114.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   114.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   114.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   114.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   114.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   115.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   115.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   115.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   115.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   115.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   115.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   116.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d020]
>[   116.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d020] width 1024 pitch 4096 (/4 1024)
>[   116.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32ac0]
>[   116.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32ac0] width 1024 pitch 4096 (/4 1024)
>[   116.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2cf60]
>[   116.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2cf60] width 1024 pitch 4096 (/4 1024)
>[   116.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d020]
>[   116.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d020] width 1024 pitch 4096 (/4 1024)
>[   116.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2cf60]
>[   116.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2cf60] width 1024 pitch 4096 (/4 1024)
>[   116.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f335d0]
>[   116.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f335d0] width 1024 pitch 4096 (/4 1024)
>[   116.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40eb0]
>[   116.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40eb0] width 1024 pitch 4096 (/4 1024)
>[   116.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2cf60]
>[   116.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2cf60] width 1024 pitch 4096 (/4 1024)
>[   116.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7090]
>[   116.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7090] width 1024 pitch 4096 (/4 1024)
>[   116.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6f10]
>[   116.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6f10] width 1024 pitch 4096 (/4 1024)
>[   116.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e880]
>[   116.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e880] width 1024 pitch 4096 (/4 1024)
>[   116.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f170]
>[   117.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f170] width 1024 pitch 4096 (/4 1024)
>[   117.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f170]
>[   117.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f170] width 1024 pitch 4096 (/4 1024)
>[   117.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17a30]
>[   117.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17a30] width 1024 pitch 4096 (/4 1024)
>[   117.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0fef0]
>[   117.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0fef0] width 1024 pitch 4096 (/4 1024)
>[   120.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cd00]
>[   120.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cd00] width 1024 pitch 4096 (/4 1024)
>[   120.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f168b0]
>[   120.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f168b0] width 1024 pitch 4096 (/4 1024)
>[   120.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[   120.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[   120.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d440]
>[   120.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d440] width 1024 pitch 4096 (/4 1024)
>[   120.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[   120.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[   120.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d440]
>[   120.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d440] width 1024 pitch 4096 (/4 1024)
>[   120.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[   120.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[   121.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f168b0]
>[   121.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f168b0] width 1024 pitch 4096 (/4 1024)
>[   121.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d2a0]
>[   121.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d2a0] width 1024 pitch 4096 (/4 1024)
>[   121.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16ae0]
>[   121.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16ae0] width 1024 pitch 4096 (/4 1024)
>[   121.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d2a0]
>[   121.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d2a0] width 1024 pitch 4096 (/4 1024)
>[   121.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f2d300]
>[   121.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f2d300] width 1024 pitch 4096 (/4 1024)
>[   121.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f168b0]
>[   121.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f168b0] width 1024 pitch 4096 (/4 1024)
>[   121.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cd00]
>[   121.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cd00] width 1024 pitch 4096 (/4 1024)
>[   121.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16390]
>[   121.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16390] width 1024 pitch 4096 (/4 1024)
>[   121.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[   121.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[   121.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e95a50]
>[   121.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e95a50] width 1024 pitch 4096 (/4 1024)
>[   125.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   125.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   125.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   125.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   125.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   125.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   125.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   125.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   125.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e93280]
>[   125.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e93280] width 1024 pitch 4096 (/4 1024)
>[   125.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   125.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   125.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   125.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   125.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[   125.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[   125.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e93e80]
>[   125.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e93e80] width 1024 pitch 4096 (/4 1024)
>[   125.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   125.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   125.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   125.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   125.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   125.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   125.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   125.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   125.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   125.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   125.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e93e80]
>[   125.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e93e80] width 1024 pitch 4096 (/4 1024)
>[   125.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   125.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   125.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   125.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   125.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   125.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   125.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   125.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   126.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   126.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   126.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   126.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   126.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   126.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   126.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   126.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   126.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   126.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   126.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   126.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   126.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   126.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   126.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[   126.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[   126.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   126.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   126.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f32350]
>[   126.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f32350] width 1024 pitch 4096 (/4 1024)
>[   127.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   127.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   127.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   127.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   127.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   127.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   127.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   127.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   127.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   127.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   127.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   127.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   127.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   127.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   128.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   128.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   128.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   128.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   131.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   131.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   131.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   131.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   131.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   131.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   132.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   132.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   132.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e94780]
>[   132.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e94780] width 1024 pitch 4096 (/4 1024)
>[   132.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   132.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   132.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   132.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   132.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   132.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   132.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   132.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   132.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   132.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   132.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   132.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   144.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   144.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   144.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   144.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   144.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   144.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   144.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   144.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   144.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   144.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   144.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   144.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   144.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   144.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   146.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   146.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   146.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   146.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   146.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   146.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   147.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   147.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   147.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   147.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   147.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   147.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   147.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   147.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   147.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   147.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   147.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   147.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   147.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   147.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   147.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   147.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   147.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   147.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   148.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   148.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   148.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   148.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   148.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   148.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   148.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   148.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   148.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   148.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   148.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   148.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   148.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   148.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   148.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   148.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   148.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   148.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   148.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   148.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   149.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   149.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   149.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e12c60]
>[   149.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e12c60] width 1024 pitch 4096 (/4 1024)
>[   149.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   149.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   149.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   149.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   149.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   149.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   149.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   149.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   149.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   149.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   149.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   149.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   150.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   150.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   150.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   150.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   151.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   151.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   151.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   151.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   151.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[   151.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[   151.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   151.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   151.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   151.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   151.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   151.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   151.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   151.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   151.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   151.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   151.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   151.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   151.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   151.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   152.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   152.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   152.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   152.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   152.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   152.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   152.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   152.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   152.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6cb90]
>[   152.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6cb90] width 1024 pitch 4096 (/4 1024)
>[   152.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   152.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   152.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   152.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   152.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   152.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   172.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e16150]
>[   172.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e16150] width 1024 pitch 4096 (/4 1024)
>[   172.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   172.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   174.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   174.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   174.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   174.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   174.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   174.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   174.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   174.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   174.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   174.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   174.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   174.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   174.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   174.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   174.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   174.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   174.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   174.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   174.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   174.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   175.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   175.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   175.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   175.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   175.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   175.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   175.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   175.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   175.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   175.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   175.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   175.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   175.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   175.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   175.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   175.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   175.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   175.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   176.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   176.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   176.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   176.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   176.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   176.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   176.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f40f20]
>[   176.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f40f20] width 1024 pitch 4096 (/4 1024)
>[   177.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10320]
>[   177.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10320] width 1024 pitch 4096 (/4 1024)
>[   177.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f102c0]
>[   177.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f102c0] width 1024 pitch 4096 (/4 1024)
>[   177.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6dae0]
>[   177.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6dae0] width 1024 pitch 4096 (/4 1024)
>[   177.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f102c0]
>[   177.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f102c0] width 1024 pitch 4096 (/4 1024)
>[   177.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f103e0]
>[   177.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f103e0] width 1024 pitch 4096 (/4 1024)
>[   177.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17920]
>[   177.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17920] width 1024 pitch 4096 (/4 1024)
>[   182.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e97630]
>[   182.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e97630] width 1024 pitch 4096 (/4 1024)
>[   183.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   183.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   183.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   183.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   183.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   184.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   184.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   184.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   184.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   184.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   184.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   184.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   184.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   184.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   184.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   184.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   184.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   184.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   184.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   184.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   184.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   185.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   185.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   185.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   185.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   185.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f33790]
>[   185.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f33790] width 1024 pitch 4096 (/4 1024)
>[   186.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f26310]
>[   186.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f26310] width 1024 pitch 4096 (/4 1024)
>[   186.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   186.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   186.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   186.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   186.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   186.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   186.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   186.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   186.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   186.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   189.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   189.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   189.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   189.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   189.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   189.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   189.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   189.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   189.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f106a0]
>[   189.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f106a0] width 1024 pitch 4096 (/4 1024)
>[   189.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   189.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   189.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f106a0]
>[   189.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f106a0] width 1024 pitch 4096 (/4 1024)
>[   195.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   195.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   195.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   195.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   195.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   195.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   195.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f106a0]
>[   195.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f106a0] width 1024 pitch 4096 (/4 1024)
>[   195.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   195.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   195.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   195.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   195.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   195.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   195.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f106a0]
>[   195.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f106a0] width 1024 pitch 4096 (/4 1024)
>[   195.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0d700]
>[   195.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0d700] width 1024 pitch 4096 (/4 1024)
>[   196.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   196.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   196.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   196.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   196.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   196.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   196.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   196.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   196.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e13e50]
>[   196.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e13e50] width 1024 pitch 4096 (/4 1024)
>[   196.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   196.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   196.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   196.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   197.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   197.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   197.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0980]
>[   197.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0980] width 1024 pitch 4096 (/4 1024)
>[   197.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74e00]
>[   197.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74e00] width 1024 pitch 4096 (/4 1024)
>[   197.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f103f0]
>[   197.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f103f0] width 1024 pitch 4096 (/4 1024)
>[   197.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10390]
>[   197.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10390] width 1024 pitch 4096 (/4 1024)
>[   198.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10360]
>[   198.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10360] width 1024 pitch 4096 (/4 1024)
>[   199.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14140]
>[   199.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14140] width 1024 pitch 4096 (/4 1024)
>[   199.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb4e0]
>[   199.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb4e0] width 1024 pitch 4096 (/4 1024)
>[   199.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebbf70]
>[   199.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebbf70] width 1024 pitch 4096 (/4 1024)
>[   209.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f3de20]
>[   209.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f3de20] width 1024 pitch 4096 (/4 1024)
>[   216.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a640]
>[   216.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a640] width 1024 pitch 4096 (/4 1024)
>[   219.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebcb20]
>[   219.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebcb20] width 1024 pitch 4096 (/4 1024)
>[   219.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f61330]
>[   219.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f61330] width 1024 pitch 4096 (/4 1024)
>[   219.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f61330]
>[   219.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f61330] width 1024 pitch 4096 (/4 1024)
>[   220.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18e00]
>[   220.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18e00] width 1024 pitch 4096 (/4 1024)
>[   233.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c7c0]
>[   233.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c7c0] width 1024 pitch 4096 (/4 1024)
>[   233.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7dec0]
>[   233.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7dec0] width 1024 pitch 4096 (/4 1024)
>[   233.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07df0]
>[   233.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07df0] width 1024 pitch 4096 (/4 1024)
>[   236.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8bae0]
>[   236.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8bae0] width 1024 pitch 4096 (/4 1024)
>[   237.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4e620]
>[   237.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4e620] width 1024 pitch 4096 (/4 1024)
>[   237.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f78ff0]
>[   237.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f78ff0] width 1024 pitch 4096 (/4 1024)
>[   237.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[   237.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1024 pitch 4096 (/4 1024)
>[   242.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f660e0]
>[   242.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f660e0] width 1024 pitch 4096 (/4 1024)
>[   242.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74c00]
>[   242.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74c00] width 1024 pitch 4096 (/4 1024)
>[   242.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61a0]
>[   242.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61a0] width 1024 pitch 4096 (/4 1024)
>[   242.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a3c0]
>[   242.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a3c0] width 1024 pitch 4096 (/4 1024)
>[   242.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a3c0]
>[   242.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a3c0] width 1024 pitch 4096 (/4 1024)
>[   242.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a3c0]
>[   242.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a3c0] width 1024 pitch 4096 (/4 1024)
>[   242.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61a0]
>[   242.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61a0] width 1024 pitch 4096 (/4 1024)
>[   242.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a3c0]
>[   242.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a3c0] width 1024 pitch 4096 (/4 1024)
>[   242.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61a0]
>[   242.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61a0] width 1024 pitch 4096 (/4 1024)
>[   242.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a3c0]
>[   242.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a3c0] width 1024 pitch 4096 (/4 1024)
>[   243.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61a0]
>[   243.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61a0] width 1024 pitch 4096 (/4 1024)
>[   254.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a490]
>[   254.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a490] width 1024 pitch 4096 (/4 1024)
>[   255.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8faf0]
>[   255.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8faf0] width 1024 pitch 4096 (/4 1024)
>[   255.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d120]
>[   255.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d120] width 1024 pitch 4096 (/4 1024)
>[   255.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c4a0]
>[   255.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c4a0] width 1024 pitch 4096 (/4 1024)
>[   268.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f7ce20]
>[   268.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f7ce20] width 1024 pitch 4096 (/4 1024)
>[   269.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebe280]
>[   269.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebe280] width 1024 pitch 4096 (/4 1024)
>[   269.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b000]
>[   269.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b000] width 1024 pitch 4096 (/4 1024)
>[   269.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebe280]
>[   269.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebe280] width 1024 pitch 4096 (/4 1024)
>[   270.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e17d00]
>[   270.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e17d00] width 1024 pitch 4096 (/4 1024)
>[   271.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26413e0]
>[   271.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26413e0] width 1024 pitch 4096 (/4 1024)
>[   271.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d8a0]
>[   271.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d8a0] width 1024 pitch 4096 (/4 1024)
>[   271.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a770]
>[   271.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a770] width 1024 pitch 4096 (/4 1024)
>[   273.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7dec0]
>[   273.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7dec0] width 1024 pitch 4096 (/4 1024)
>[   278.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a350]
>[   278.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a350] width 1024 pitch 4096 (/4 1024)
>[   278.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacd40]
>[   279.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacd40] width 1024 pitch 4096 (/4 1024)
>[   279.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f76ea0]
>[   279.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f76ea0] width 1024 pitch 4096 (/4 1024)
>[   279.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaf930]
>[   279.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaf930] width 1024 pitch 4096 (/4 1024)
>[   281.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74620]
>[   281.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74620] width 1024 pitch 4096 (/4 1024)
>[   281.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f866f0]
>[   281.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f866f0] width 1024 pitch 4096 (/4 1024)
>[   281.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb5e10]
>[   281.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb5e10] width 1024 pitch 4096 (/4 1024)
>[   281.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb5e10]
>[   281.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb5e10] width 1024 pitch 4096 (/4 1024)
>[   281.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85670]
>[   281.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85670] width 1024 pitch 4096 (/4 1024)
>[   281.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb5e10]
>[   281.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb5e10] width 1024 pitch 4096 (/4 1024)
>[   281.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85670]
>[   281.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85670] width 1024 pitch 4096 (/4 1024)
>[   281.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb5e10]
>[   281.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb5e10] width 1024 pitch 4096 (/4 1024)
>[   281.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85670]
>[   281.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85670] width 1024 pitch 4096 (/4 1024)
>[   281.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb5e10]
>[   281.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb5e10] width 1024 pitch 4096 (/4 1024)
>[   288.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f65560]
>[   288.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f65560] width 1024 pitch 4096 (/4 1024)
>[   289.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f36590]
>[   289.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f36590] width 1024 pitch 4096 (/4 1024)
>[   289.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaf200]
>[   289.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaf200] width 1024 pitch 4096 (/4 1024)
>[   289.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea5da0]
>[   289.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea5da0] width 1024 pitch 4096 (/4 1024)
>[   298.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4d7d0]
>[   298.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4d7d0] width 1024 pitch 4096 (/4 1024)
>[   298.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4d7d0]
>[   298.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4d7d0] width 1024 pitch 4096 (/4 1024)
>[   298.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cef0]
>[   298.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cef0] width 1024 pitch 4096 (/4 1024)
>[   298.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead470]
>[   298.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead470] width 1024 pitch 4096 (/4 1024)
>[   298.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead4d0]
>[   298.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead4d0] width 1024 pitch 4096 (/4 1024)
>[   302.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacf90]
>[   302.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacf90] width 1024 pitch 4096 (/4 1024)
>[   302.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7baa0]
>[   302.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7baa0] width 1024 pitch 4096 (/4 1024)
>[   302.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cef0]
>[   302.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cef0] width 1024 pitch 4096 (/4 1024)
>[   302.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7baa0]
>[   302.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7baa0] width 1024 pitch 4096 (/4 1024)
>[   302.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cef0]
>[   302.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cef0] width 1024 pitch 4096 (/4 1024)
>[   302.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7baa0]
>[   302.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7baa0] width 1024 pitch 4096 (/4 1024)
>[   302.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cef0]
>[   302.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cef0] width 1024 pitch 4096 (/4 1024)
>[   302.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacf90]
>[   302.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacf90] width 1024 pitch 4096 (/4 1024)
>[   302.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4cef0]
>[   302.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4cef0] width 1024 pitch 4096 (/4 1024)
>[   302.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacf90]
>[   302.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacf90] width 1024 pitch 4096 (/4 1024)
>[   304.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eae880]
>[   304.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eae880] width 1024 pitch 4096 (/4 1024)
>[   304.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eac870]
>[   304.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eac870] width 1024 pitch 4096 (/4 1024)
>[   304.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f36710]
>[   304.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f36710] width 1024 pitch 4096 (/4 1024)
>[   304.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacab0]
>[   304.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacab0] width 1024 pitch 4096 (/4 1024)
>[   304.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacab0]
>[   304.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacab0] width 1024 pitch 4096 (/4 1024)
>[   304.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f36710]
>[   304.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f36710] width 1024 pitch 4096 (/4 1024)
>[   304.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f663b0]
>[   304.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f663b0] width 1024 pitch 4096 (/4 1024)
>[   304.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f36710]
>[   304.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f36710] width 1024 pitch 4096 (/4 1024)
>[   304.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f663b0]
>[   304.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f663b0] width 1024 pitch 4096 (/4 1024)
>[   304.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacab0]
>[   304.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacab0] width 1024 pitch 4096 (/4 1024)
>[   304.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e953a0]
>[   304.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e953a0] width 1024 pitch 4096 (/4 1024)

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Attachments on bug 838823: 597249 | 597439 | 597440