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Red Hat Bugzilla – Attachment 607368 Details for
Bug 852239
[abrt] xorg-x11-server-Xorg-1.12.2-4.fc17: Xorg server crashed
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File: Xorg.0.log
Xorg.0.log (text/plain), 659.66 KB, created by
s.tousignant
on 2012-08-28 00:55:46 UTC
(
hide
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Description:
File: Xorg.0.log
Filename:
MIME Type:
Creator:
s.tousignant
Created:
2012-08-28 00:55:46 UTC
Size:
659.66 KB
patch
obsolete
>[ 20.588] >X.Org X Server 1.12.2 >Release Date: 2012-05-29 >[ 20.588] X Protocol Version 11, Revision 0 >[ 20.588] Build Operating System: x86-06 2.6.32-220.17.1.el6.x86_64 >[ 20.588] Current Operating System: Linux planes-computer.ossnoizse.homelinux.org 3.5.1-1.fc17.x86_64 #1 SMP Thu Aug 9 17:50:43 UTC 2012 x86_64 >[ 20.589] Kernel command line: BOOT_IMAGE=/vmlinuz-3.5.1-1.fc17.x86_64 root=UUID=5e320151-70ed-4709-b280-2361de11461b ro rd.lvm=0 rd.dm=0 SYSFONT=latarcyrheb-sun16 rd.md.uuid=880f9f21:ccf05ef1:26e5e4c5:bb4bc02b LANG=fr_FR.UTF-8 rd.luks=0 rd.md.uuid=6acea23b:4e72bb95:6e3fbef6:95ab8b01 KEYTABLE=cf rhgb quiet >[ 20.589] Build Date: 26 June 2012 04:32:54AM >[ 20.589] Build ID: xorg-x11-server 1.12.2-4.fc17 >[ 20.589] Current version of pixman: 0.24.4 >[ 20.589] Before reporting problems, check http://wiki.x.org > to make sure that you have the latest version. >[ 20.589] Markers: (--) probed, (**) from config file, (==) default setting, > (++) from command line, (!!) notice, (II) informational, > (WW) warning, (EE) error, (NI) not implemented, (??) unknown. >[ 20.589] (==) Log file: "/var/log/Xorg.0.log", Time: Sun Aug 12 19:16:46 2012 >[ 20.589] (==) Using config directory: "/etc/X11/xorg.conf.d" >[ 20.589] (==) Using system config directory "/usr/share/X11/xorg.conf.d" >[ 20.590] (==) No Layout section. Using the first Screen section. >[ 20.590] (==) No screen section available. Using defaults. >[ 20.590] (**) |-->Screen "Default Screen Section" (0) >[ 20.590] (**) | |-->Monitor "<default monitor>" >[ 20.590] (==) No monitor specified for screen "Default Screen Section". > Using a default monitor configuration. >[ 20.590] (==) Automatically adding devices >[ 20.590] (==) Automatically enabling devices >[ 20.590] (==) FontPath set to: > catalogue:/etc/X11/fontpath.d, > built-ins >[ 20.590] (==) ModulePath set to "/usr/lib64/xorg/modules" >[ 20.590] (II) The server relies on udev to provide the list of input devices. > If no devices become available, reconfigure udev or disable AutoAddDevices. >[ 20.590] (II) Loader magic: 0x7c6ac0 >[ 20.590] (II) Module ABI versions: >[ 20.590] X.Org ANSI C Emulation: 0.4 >[ 20.590] X.Org Video Driver: 12.0 >[ 20.590] X.Org XInput driver : 16.0 >[ 20.590] X.Org Server Extension : 6.0 >[ 20.592] (--) PCI: (0:1:0:0) 14f1:8800:7063:5500 rev 5, Mem @ 0xeb000000/16777216, BIOS @ 0x????????/65536 >[ 20.592] (--) PCI:*(0:5:0:0) 1002:71c2:1002:2342 rev 0, Mem @ 0xd0000000/268435456, 0xeffe0000/65536, I/O @ 0x0000e800/256, BIOS @ 0x????????/131072 >[ 20.592] (--) PCI: (0:5:0:1) 1002:71e2:1002:2343 rev 0, Mem @ 0xefff0000/65536, BIOS @ 0x????????/65536 >[ 20.592] (II) LoadModule: "extmod" >[ 20.593] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so >[ 20.593] (II) Module extmod: vendor="X.Org Foundation" >[ 20.593] compiled for 1.12.2, module version = 1.0.0 >[ 20.593] Module class: X.Org Server Extension >[ 20.593] ABI class: X.Org Server Extension, version 6.0 >[ 20.593] (II) Loading extension SELinux >[ 20.593] (II) Loading extension MIT-SCREEN-SAVER >[ 20.593] (II) Loading extension XFree86-VidModeExtension >[ 20.593] (II) Loading extension XFree86-DGA >[ 20.593] (II) Loading extension DPMS >[ 20.593] (II) Loading extension XVideo >[ 20.593] (II) Loading extension XVideo-MotionCompensation >[ 20.593] (II) Loading extension X-Resource >[ 20.594] (II) LoadModule: "dbe" >[ 20.594] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so >[ 20.594] (II) Module dbe: vendor="X.Org Foundation" >[ 20.594] compiled for 1.12.2, module version = 1.0.0 >[ 20.594] Module class: X.Org Server Extension >[ 20.594] ABI class: X.Org Server Extension, version 6.0 >[ 20.594] (II) Loading extension DOUBLE-BUFFER >[ 20.594] (II) LoadModule: "glx" >[ 20.594] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so >[ 20.594] (II) Module glx: vendor="X.Org Foundation" >[ 20.594] compiled for 1.12.2, module version = 1.0.0 >[ 20.594] ABI class: X.Org Server Extension, version 6.0 >[ 20.594] (==) AIGLX enabled >[ 20.594] (II) Loading extension GLX >[ 20.594] (II) LoadModule: "record" >[ 20.595] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so >[ 20.595] (II) Module record: vendor="X.Org Foundation" >[ 20.595] compiled for 1.12.2, module version = 1.13.0 >[ 20.595] Module class: X.Org Server Extension >[ 20.595] ABI class: X.Org Server Extension, version 6.0 >[ 20.595] (II) Loading extension RECORD >[ 20.595] (II) LoadModule: "dri" >[ 20.595] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so >[ 20.595] (II) Module dri: vendor="X.Org Foundation" >[ 20.595] compiled for 1.12.2, module version = 1.0.0 >[ 20.595] ABI class: X.Org Server Extension, version 6.0 >[ 20.595] (II) Loading extension XFree86-DRI >[ 20.595] (II) LoadModule: "dri2" >[ 20.596] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so >[ 20.596] (II) Module dri2: vendor="X.Org Foundation" >[ 20.596] compiled for 1.12.2, module version = 1.2.0 >[ 20.596] ABI class: X.Org Server Extension, version 6.0 >[ 20.596] (II) Loading extension DRI2 >[ 20.596] (==) Matched ati as autoconfigured driver 0 >[ 20.596] (==) Matched vesa as autoconfigured driver 1 >[ 20.596] (==) Matched modesetting as autoconfigured driver 2 >[ 20.596] (==) Matched fbdev as autoconfigured driver 3 >[ 20.596] (==) Assigned the driver to the xf86ConfigLayout >[ 20.596] (II) LoadModule: "ati" >[ 20.596] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so >[ 20.596] (II) Module ati: vendor="X.Org Foundation" >[ 20.596] compiled for 1.12.0, module version = 6.14.99 >[ 20.596] Module class: X.Org Video Driver >[ 20.596] ABI class: X.Org Video Driver, version 12.0 >[ 20.596] (II) LoadModule: "radeon" >[ 20.596] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so >[ 20.597] (II) Module radeon: vendor="X.Org Foundation" >[ 20.597] compiled for 1.12.0, module version = 6.14.99 >[ 20.597] Module class: X.Org Video Driver >[ 20.597] ABI class: X.Org Video Driver, version 12.0 >[ 20.597] (II) LoadModule: "vesa" >[ 20.597] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so >[ 20.597] (II) Module vesa: vendor="X.Org Foundation" >[ 20.597] compiled for 1.12.0, module version = 2.3.1 >[ 20.597] Module class: X.Org Video Driver >[ 20.597] ABI class: X.Org Video Driver, version 12.0 >[ 20.597] (II) LoadModule: "modesetting" >[ 20.597] (II) Loading /usr/lib64/xorg/modules/drivers/modesetting_drv.so >[ 20.597] (II) Module modesetting: vendor="X.Org Foundation" >[ 20.597] compiled for 1.12.2, module version = 0.4.0 >[ 20.597] Module class: X.Org Video Driver >[ 20.597] ABI class: X.Org Video Driver, version 12.0 >[ 20.597] (II) LoadModule: "fbdev" >[ 20.598] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so >[ 20.598] (II) Module fbdev: vendor="X.Org Foundation" >[ 20.598] compiled for 1.11.99.901, module version = 0.4.2 >[ 20.598] ABI class: X.Org Video Driver, version 12.0 >[ 20.598] (II) RADEON: Driver for ATI Radeon chipsets: > ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI), > ATI Radeon Mobility X300 (M24) 3152 (PCIE), > ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI), > ATI Radeon X600 (RV380) 3E50 (PCIE), > ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136, > ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP), > ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP), > ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP), > ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP), > ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP), > ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP), > ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650, > ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237, > ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336, > ATI Radeon IGP330M/340M/350M (U2) 4337, > ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI), > ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP), > ATI Radeon X800PRO (R420) JI (AGP), > ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP), > ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP), > ATI Radeon Mobility 9800 (M18) JN (AGP), > ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP), > ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP), > ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP), > ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP), > ATI Radeon Mobility M7 LW (AGP), > ATI Mobility FireGL 7800 M7 LX (AGP), > ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP), > ATI FireGL Mobility 9000 (M9) Ld (AGP), > ATI Radeon Mobility 9000 (M9) Lf (AGP), > ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI, > ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP), > ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP), > ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP), > ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP), > ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP), > ATI Radeon Mobility 9600 (M10) NQ (AGP), > ATI Radeon Mobility 9600 (M11) NR (AGP), > ATI Radeon Mobility 9600 (M10) NS (AGP), > ATI FireGL Mobility T2 (M10) NT (AGP), > ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP), > ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), > ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP), > ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI), > ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI), > ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI), > ATI Radeon Mobility X300 (M22) 5460 (PCIE), > ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE), > ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE), > ATI Radeon X800PRO (R423) UI (PCIE), > ATI Radeon X800LE (R423) UJ (PCIE), > ATI Radeon X800SE (R423) UK (PCIE), > ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE), > ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE), > ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE), > ATI FireGL unknown (R423) UR (PCIE), > ATI FireGL unknown (R423) UT (PCIE), > ATI Mobility FireGL V5000 (M26) (PCIE), > ATI Mobility FireGL V5000 (M26) (PCIE), > ATI Mobility Radeon X700 XL (M26) (PCIE), > ATI Mobility Radeon X700 (M26) (PCIE), > ATI Mobility Radeon X700 (M26) (PCIE), > ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834, > ATI Radeon Mobility 9100 IGP (U3) 5835, > ATI Radeon XPRESS 200 5954 (PCIE), > ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP), > ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP), > ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI), > ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE), > ATI Radeon XPRESS 200M 5975 (PCIE), > ATI Radeon XPRESS 200 5A41 (PCIE), > ATI Radeon XPRESS 200M 5A42 (PCIE), > ATI Radeon XPRESS 200 5A61 (PCIE), > ATI Radeon XPRESS 200M 5A62 (PCIE), > ATI Radeon X300 (RV370) 5B60 (PCIE), > ATI Radeon X600 (RV370) 5B62 (PCIE), > ATI Radeon X550 (RV370) 5B63 (PCIE), > ATI FireGL V3100 (RV370) 5B64 (PCIE), > ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE), > ATI Radeon Mobility 9200 (M9+) 5C61 (AGP), > ATI Radeon Mobility 9200 (M9+) 5C63 (AGP), > ATI Mobility Radeon X800 XT (M28) (PCIE), > ATI Mobility FireGL V5100 (M28) (PCIE), > ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE), > ATI Radeon X850 XT PE (R480) (PCIE), > ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE), > ATI unknown Radeon / FireGL (R480) 5D50 (PCIE), > ATI Radeon X850 XT (R480) (PCIE), > ATI Radeon X800XT (R423) 5D57 (PCIE), > ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE), > ATI Radeon X700 PRO (RV410) (PCIE), > ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE), > ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800, > ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800, > ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300, > ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800, > ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800, > ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505, > ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL, > ATI Mobility Radeon X1400, ATI Radeon X1300/X1550, > ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300, > ATI Mobility Radeon X1300, ATI Mobility Radeon X1300, > ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300, > ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350, > ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550, > ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450, > ATI Radeon X1300/X1550, ATI Mobility Radeon X2300, > ATI Mobility Radeon X2300, ATI Mobility Radeon X1350, > ATI Mobility Radeon X1350, ATI Mobility Radeon X1450, > ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350, > ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600, > ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600, > ATI Mobility FireGL V5200, ATI Mobility Radeon X1600, > ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600, > ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400, > ATI Mobility FireGL V5250, ATI Mobility Radeon X1700, > ATI Mobility Radeon X1700 XT, ATI FireGL V5200, > ATI Mobility Radeon X1700, ATI Radeon X2300HD, > ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300, > ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950, > ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, > ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, > ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900, > ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950, > ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560, > ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400, > ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560, > ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835, > ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200, > ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740, > ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT, > ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT, > ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600, > ATI Radeon 4800 Series, ATI Radeon HD 4870 x2, > ATI Radeon 4800 Series, ATI Radeon HD 4850 x2, > ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL), > ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2, > ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270, > AMD FireStream 9250, ATI FirePro V8700 (FireGL), > ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98, > ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series, > ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98, > ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP), > ATI Mobility Radeon HD 4670, ATI FirePro M5750, > ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP), > ATI RV730XT [Radeon HD 4670], ATI RADEON E4600, > ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650], > ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL), > ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830, > ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740, > ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770, > ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT, > ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000, > ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT, > ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610, > ATI FireMV 2260, ATI RV670, ATI Radeon HD3870, > ATI Mobility Radeon HD 3850, ATI Radeon HD3850, > ATI Mobility Radeon HD 3850 X2, ATI RV670, > ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2, > ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850, > ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550, > ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710, > ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series, > ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series, > ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630, > ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT, > ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP, > ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630, > ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600, > ATI FireGL V3600, ATI Radeon HD 2600 LE, > ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470, > ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series, > ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430, > ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450, > ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series, > ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO, > ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO, > ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670, > ATI Mobility FireGL V5700, ATI Mobility FireGL V5725, > ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, > ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics, > ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics, > ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2, > SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200, > ATI Radeon 4100, ATI Mobility Radeon HD 4200, > ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250, > AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics, > AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics, > AMD Radeon HD 6300 Series Graphics, > AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS, > ATI FirePro (FireGL) Graphics Adapter, > ATI FirePro (FireGL) Graphics Adapter, > ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370, > AMD Firestream 9350, ATI Radeon HD 5800 Series, > ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series, > ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series, > ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series, > ATI Mobility Radeon HD 5800 Series, > ATI FirePro (FireGL) Graphics Adapter, > ATI FirePro (FireGL) Graphics Adapter, > ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series, > ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series, > ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series, > ATI Mobility Radeon HD 5000 Series, > ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570, > ATI FirePro (FireGL) Graphics Adapter, > ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670, > ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD, > ATI Mobility Radeon HD 5000 Series, > ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics, > ATI Mobility Radeon Graphics, CEDAR, > ATI FirePro (FireGL) Graphics Adapter, > ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR, > ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN, > CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, > AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN, > CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series, > BARTS, BARTS, Mobility Radeon HD 6000 Series, > Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS, > AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series, > AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, > TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, > TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, > CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, > CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA, > ARUBA, ARUBA, ARUBA, ARUBA >[ 20.603] (II) VESA: driver for VESA chipsets: vesa >[ 20.603] (II) modesetting: Driver for Modesetting Kernel Drivers: kms >[ 20.603] (II) FBDEV: driver for framebuffer: fbdev >[ 20.603] (++) using VT number 1 > >[ 20.605] (II) [KMS] Kernel modesetting enabled. >[ 20.605] (WW) Falling back to old probe method for vesa >[ 20.605] (WW) Falling back to old probe method for modesetting >[ 20.605] (WW) Falling back to old probe method for fbdev >[ 20.605] (II) Loading sub module "fbdevhw" >[ 20.605] (II) LoadModule: "fbdevhw" >[ 20.605] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so >[ 20.605] (II) Module fbdevhw: vendor="X.Org Foundation" >[ 20.605] compiled for 1.12.2, module version = 0.0.2 >[ 20.605] ABI class: X.Org Video Driver, version 12.0 >[ 20.605] (II) RADEON(0): RADEONPreInit_KMS >[ 20.605] (II) RADEON(0): Creating default Display subsection in Screen section > "Default Screen Section" for depth/fbbpp 24/32 >[ 20.605] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32 >[ 20.605] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps) >[ 20.605] (==) RADEON(0): Default visual is TrueColor >[ 20.605] (==) RADEON(0): RGB weight 888 >[ 20.605] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC) >[ 20.605] (--) RADEON(0): Chipset: "ATI Radeon X1600" (ChipID = 0x71c2) >[ 20.605] (II) RADEON(0): PCIE card detected >[ 20.605] drmOpenDevice: node name is /dev/dri/card0 >[ 20.605] drmOpenDevice: open result is 8, (OK) >[ 20.605] drmOpenByBusid: Searching for BusID pci:0000:05:00.0 >[ 20.605] drmOpenDevice: node name is /dev/dri/card0 >[ 20.605] drmOpenDevice: open result is 8, (OK) >[ 20.605] drmOpenByBusid: drmOpenMinor returns 8 >[ 20.605] drmOpenByBusid: drmGetBusid reports pci:0000:05:00.0 >[ 20.605] (II) Loading sub module "exa" >[ 20.605] (II) LoadModule: "exa" >[ 20.606] (II) Loading /usr/lib64/xorg/modules/libexa.so >[ 20.606] (II) Module exa: vendor="X.Org Foundation" >[ 20.606] compiled for 1.12.2, module version = 2.5.0 >[ 20.606] ABI class: X.Org Video Driver, version 12.0 >[ 20.606] (II) RADEON(0): KMS Color Tiling: enabled >[ 20.606] (II) RADEON(0): KMS Pageflipping: enabled >[ 20.606] (II) RADEON(0): SwapBuffers wait for vsync: enabled >[ 20.637] (II) RADEON(0): Output DVI-0 has no monitor section >[ 20.653] (II) RADEON(0): Output S-video has no monitor section >[ 20.671] (II) RADEON(0): Output VGA-0 has no monitor section >[ 20.702] (II) RADEON(0): EDID for output DVI-0 >[ 20.702] (II) RADEON(0): Manufacturer: SAM Model: 27d Serial#: 1296380464 >[ 20.702] (II) RADEON(0): Year: 2007 Week: 38 >[ 20.702] (II) RADEON(0): EDID Version: 1.3 >[ 20.702] (II) RADEON(0): Digital Display Input >[ 20.702] (II) RADEON(0): Max Image Size [cm]: horiz.: 43 vert.: 27 >[ 20.702] (II) RADEON(0): Gamma: 2.20 >[ 20.702] (II) RADEON(0): DPMS capabilities: Off >[ 20.702] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 >[ 20.702] (II) RADEON(0): First detailed timing is preferred mode >[ 20.702] (II) RADEON(0): redX: 0.640 redY: 0.330 greenX: 0.300 greenY: 0.600 >[ 20.702] (II) RADEON(0): blueX: 0.150 blueY: 0.060 whiteX: 0.313 whiteY: 0.329 >[ 20.702] (II) RADEON(0): Supported established timings: >[ 20.702] (II) RADEON(0): 720x400@70Hz >[ 20.702] (II) RADEON(0): 640x480@60Hz >[ 20.702] (II) RADEON(0): 640x480@67Hz >[ 20.702] (II) RADEON(0): 640x480@72Hz >[ 20.702] (II) RADEON(0): 640x480@75Hz >[ 20.702] (II) RADEON(0): 800x600@56Hz >[ 20.702] (II) RADEON(0): 800x600@60Hz >[ 20.702] (II) RADEON(0): 800x600@72Hz >[ 20.702] (II) RADEON(0): 800x600@75Hz >[ 20.702] (II) RADEON(0): 832x624@75Hz >[ 20.702] (II) RADEON(0): 1024x768@60Hz >[ 20.702] (II) RADEON(0): 1024x768@70Hz >[ 20.702] (II) RADEON(0): 1024x768@75Hz >[ 20.702] (II) RADEON(0): 1280x1024@75Hz >[ 20.702] (II) RADEON(0): 1152x864@75Hz >[ 20.702] (II) RADEON(0): Manufacturer's mask: 0 >[ 20.702] (II) RADEON(0): Supported standard timings: >[ 20.702] (II) RADEON(0): #0: hsize: 1680 vsize 1050 refresh: 60 vid: 179 >[ 20.702] (II) RADEON(0): #1: hsize: 1280 vsize 1024 refresh: 60 vid: 32897 >[ 20.702] (II) RADEON(0): #2: hsize: 1280 vsize 960 refresh: 60 vid: 16513 >[ 20.702] (II) RADEON(0): #3: hsize: 1152 vsize 864 refresh: 75 vid: 20337 >[ 20.702] (II) RADEON(0): Supported detailed timing: >[ 20.702] (II) RADEON(0): clock: 119.0 MHz Image Size: 433 x 271 mm >[ 20.702] (II) RADEON(0): h_active: 1680 h_sync: 1728 h_sync_end 1760 h_blank_end 1840 h_border: 0 >[ 20.702] (II) RADEON(0): v_active: 1050 v_sync: 1053 v_sync_end 1059 v_blanking: 1080 v_border: 0 >[ 20.702] (II) RADEON(0): Ranges: V min: 56 V max: 75 Hz, H min: 30 H max: 81 kHz, PixClock max 145 MHz >[ 20.702] (II) RADEON(0): Monitor name: SyncMaster >[ 20.702] (II) RADEON(0): Serial No: H9LP902628 >[ 20.702] (II) RADEON(0): EDID (in hex): >[ 20.702] (II) RADEON(0): 00ffffffffffff004c2d7d023032454d >[ 20.702] (II) RADEON(0): 26110103802b1b782aee95a3544c9926 >[ 20.702] (II) RADEON(0): 0f5054bfef80b30081808140714f0101 >[ 20.702] (II) RADEON(0): 0101010101017c2e90a0601a1e403020 >[ 20.702] (II) RADEON(0): 3600b10f1100001a000000fd00384b1e >[ 20.702] (II) RADEON(0): 510e000a202020202020000000fc0053 >[ 20.702] (II) RADEON(0): 796e634d61737465720a2020000000ff >[ 20.702] (II) RADEON(0): 0048394c503930323632380a202000fa >[ 20.702] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 20.702] (II) RADEON(0): Using EDID range info for horizontal sync >[ 20.702] (II) RADEON(0): Using EDID range info for vertical refresh >[ 20.702] (II) RADEON(0): Printing DDC gathered Modelines: >[ 20.702] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 20.702] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 20.702] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 20.702] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 20.702] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 20.702] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 20.702] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 20.702] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 20.702] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 20.702] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 20.702] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 20.702] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 20.702] (II) RADEON(0): Printing probed modes for output DVI-0 >[ 20.702] (II) RADEON(0): Modeline "1680x1050"x59.9 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 20.702] (II) RADEON(0): Modeline "1680x945"x60.0 131.48 1680 1784 1960 2240 945 946 949 978 -hsync +vsync (58.7 kHz) >[ 20.703] (II) RADEON(0): Modeline "1400x1050"x59.9 101.00 1400 1448 1480 1560 1050 1053 1057 1080 +hsync -vsync (64.7 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1600x900"x60.0 118.96 1600 1696 1864 2128 900 901 904 932 -hsync +vsync (55.9 kHz) >[ 20.703] (II) RADEON(0): Modeline "1280x1024"x75.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1440x900"x75.0 136.75 1440 1536 1688 1936 900 903 909 942 -hsync +vsync (70.6 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1440x900"x59.9 88.75 1440 1488 1520 1600 900 903 909 926 +hsync -vsync (55.5 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1280x960"x60.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1366x768"x60.0 85.89 1366 1439 1583 1800 768 769 772 795 -hsync +vsync (47.7 kHz) >[ 20.703] (II) RADEON(0): Modeline "1360x768"x60.0 85.50 1360 1424 1536 1792 768 771 777 795 +hsync +vsync (47.7 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1280x800"x74.9 106.50 1280 1360 1488 1696 800 803 809 838 -hsync +vsync (62.8 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1280x800"x59.9 71.00 1280 1328 1360 1440 800 803 809 823 +hsync -vsync (49.3 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1152x864"x75.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1280x768"x74.9 102.25 1280 1360 1488 1696 768 771 778 805 +hsync -vsync (60.3 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1280x768"x60.0 68.25 1280 1328 1360 1440 768 771 778 790 +hsync -vsync (47.4 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1024x768"x75.1 78.80 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.1 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 20.703] (II) RADEON(0): Modeline "1024x576"x60.0 46.97 1024 1064 1168 1312 576 577 580 597 -hsync +vsync (35.8 kHz) >[ 20.703] (II) RADEON(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 20.703] (II) RADEON(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 20.703] (II) RADEON(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 20.703] (II) RADEON(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 20.703] (II) RADEON(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 20.703] (II) RADEON(0): Modeline "848x480"x60.0 33.75 848 864 976 1088 480 486 494 517 +hsync +vsync (31.0 kHz e) >[ 20.703] (II) RADEON(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 491 520 -hsync -vsync (37.9 kHz e) >[ 20.703] (II) RADEON(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 20.703] (II) RADEON(0): Modeline "640x480"x66.7 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 20.703] (II) RADEON(0): Modeline "640x480"x60.0 25.20 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 20.703] (II) RADEON(0): Modeline "720x400"x70.1 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 20.719] (II) RADEON(0): EDID for output S-video >[ 20.737] (II) RADEON(0): EDID for output VGA-0 >[ 20.737] (II) RADEON(0): Output DVI-0 connected >[ 20.737] (II) RADEON(0): Output S-video disconnected >[ 20.737] (II) RADEON(0): Output VGA-0 disconnected >[ 20.737] (II) RADEON(0): Using exact sizes for initial modes >[ 20.737] (II) RADEON(0): Output DVI-0 using initial mode 1680x1050 +0+0 >[ 20.737] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated. >[ 20.737] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:20000000 visible:1f8d4000 >[ 20.737] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM >[ 20.737] (**) RADEON(0): Display dimensions: (430, 270) mm >[ 20.737] (**) RADEON(0): DPI set to (99, 98) >[ 20.737] (II) Loading sub module "fb" >[ 20.737] (II) LoadModule: "fb" >[ 20.737] (II) Loading /usr/lib64/xorg/modules/libfb.so >[ 20.737] (II) Module fb: vendor="X.Org Foundation" >[ 20.737] compiled for 1.12.2, module version = 1.0.0 >[ 20.737] ABI class: X.Org ANSI C Emulation, version 0.4 >[ 20.737] (II) Loading sub module "ramdac" >[ 20.737] (II) LoadModule: "ramdac" >[ 20.737] (II) Module "ramdac" already built-in >[ 20.737] (II) UnloadModule: "vesa" >[ 20.737] (II) Unloading vesa >[ 20.737] (II) UnloadModule: "modesetting" >[ 20.737] (II) Unloading modesetting >[ 20.737] (II) UnloadModule: "fbdev" >[ 20.737] (II) Unloading fbdev >[ 20.737] (II) UnloadSubModule: "fbdevhw" >[ 20.737] (II) Unloading fbdevhw >[ 20.737] (--) Depth 24 pixmap format is 32 bpp >[ 20.737] (II) RADEON(0): [DRI2] Setup complete >[ 20.738] (II) RADEON(0): [DRI2] DRI driver: r300 >[ 20.738] (II) RADEON(0): [DRI2] VDPAU driver: r300 >[ 20.738] (II) RADEON(0): Front buffer size: 7128K >[ 20.738] (II) RADEON(0): VRAM usage limit set to 458834K >[ 20.738] (II) RADEON(0): Initializing backing store >[ 20.738] (==) RADEON(0): Backing store disabled >[ 20.738] (II) RADEON(0): Direct rendering enabled >[ 20.738] (II) RADEON(0): Initializing Acceleration >[ 20.738] (II) RADEON(0): Render acceleration enabled for R300/R400/R500 type cards. >[ 20.738] (II) RADEON(0): Setting EXA maxPitchBytes >[ 20.738] (II) RADEON(0): EngineInit (32/32) >[ 20.738] (II) EXA(0): Driver allocated offscreen pixmaps >[ 20.738] (II) EXA(0): Driver registered support for the following operations: >[ 20.738] (II) Solid >[ 20.738] (II) Copy >[ 20.738] (II) Composite (RENDER acceleration) >[ 20.738] (II) UploadToScreen >[ 20.738] (II) DownloadFromScreen >[ 20.738] (II) RADEON(0): Acceleration enabled >[ 20.738] (II) RADEON(0): Initializing DPMS >[ 20.738] (==) RADEON(0): DPMS enabled >[ 20.738] (II) RADEON(0): Initializing Cursor >[ 20.738] (==) RADEON(0): Silken mouse enabled >[ 20.738] (II) RADEON(0): Initializing Xv >[ 20.738] (II) RADEON(0): Set up textured video >[ 20.738] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video. >[ 20.738] (II) RADEON(0): [XvMC] Extension initialized. >[ 20.738] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message. >[ 20.738] (II) RADEON(0): Initializing kms color map >[ 20.738] (II) RADEON(0): RADEONScreenInit finished >[ 20.738] (--) RandR disabled >[ 20.738] (II) Initializing built-in extension Generic Event Extension >[ 20.738] (II) Initializing built-in extension SHAPE >[ 20.738] (II) Initializing built-in extension MIT-SHM >[ 20.738] (II) Initializing built-in extension XInputExtension >[ 20.738] (II) Initializing built-in extension XTEST >[ 20.738] (II) Initializing built-in extension BIG-REQUESTS >[ 20.738] (II) Initializing built-in extension SYNC >[ 20.738] (II) Initializing built-in extension XKEYBOARD >[ 20.738] (II) Initializing built-in extension XC-MISC >[ 20.738] (II) Initializing built-in extension XINERAMA >[ 20.738] (II) Initializing built-in extension XFIXES >[ 20.738] (II) Initializing built-in extension RENDER >[ 20.738] (II) Initializing built-in extension RANDR >[ 20.738] (II) Initializing built-in extension COMPOSITE >[ 20.738] (II) Initializing built-in extension DAMAGE >[ 20.740] (II) SELinux: Disabled by boolean >[ 21.852] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer >[ 21.852] (II) AIGLX: enabled GLX_INTEL_swap_event >[ 21.852] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control >[ 21.852] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects >[ 21.852] (II) AIGLX: Loaded and initialized r300 >[ 21.852] (II) GLX: Initialized DRI2 GL provider for screen 0 >[ 21.853] (II) RADEON(0): Setting screen physical size to 444 x 277 >[ 22.280] (II) XKB: Reusing cached keymap >[ 22.282] (II) config/udev: Adding input device Power Button (/dev/input/event1) >[ 22.282] (**) Power Button: Applying InputClass "evdev keyboard catchall" >[ 22.282] (**) Power Button: Applying InputClass "system-setup-keyboard" >[ 22.282] (II) LoadModule: "evdev" >[ 22.282] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so >[ 22.283] (II) Module evdev: vendor="X.Org Foundation" >[ 22.283] compiled for 1.12.0, module version = 2.7.0 >[ 22.283] Module class: X.Org XInput Driver >[ 22.283] ABI class: X.Org XInput driver, version 16.0 >[ 22.283] (II) Using input driver 'evdev' for 'Power Button' >[ 22.283] Option "XkbRules" "evdev" >[ 22.283] Option "XkbModel" "pc105" >[ 22.283] Option "XkbLayout" "ca(fr)" >[ 22.283] Option "_source" "server/udev" >[ 22.283] Option "name" "Power Button" >[ 22.283] Option "path" "/dev/input/event1" >[ 22.283] Option "device" "/dev/input/event1" >[ 22.283] Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input1/event1" >[ 22.283] Option "driver" "evdev" >[ 22.283] Option "XkbVariant" "latin9" >[ 22.283] Option "XkbOptions" "terminate:ctrl_alt_bksp," >[ 22.283] (**) Power Button: always reports core events >[ 22.283] (**) evdev: Power Button: Device: "/dev/input/event1" >[ 22.283] (--) evdev: Power Button: Vendor 0 Product 0x1 >[ 22.283] (--) evdev: Power Button: Found keys >[ 22.283] (II) evdev: Power Button: Configuring as keyboard >[ 22.283] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input1/event1" >[ 22.283] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6) >[ 22.283] (**) Option "xkb_rules" "evdev" >[ 22.283] (**) Option "xkb_model" "pc105" >[ 22.283] (**) Option "xkb_layout" "ca(fr)" >[ 22.283] (**) Option "xkb_variant" "latin9" >[ 22.283] (**) Option "xkb_options" "terminate:ctrl_alt_bksp," >[ 22.295] (EE) Error loading keymap /var/lib/xkb/server-0.xkm >[ 22.295] (EE) XKB: Failed to load keymap. Loading default keymap instead. >[ 22.317] (II) config/udev: Adding input device Power Button (/dev/input/event0) >[ 22.317] (**) Power Button: Applying InputClass "evdev keyboard catchall" >[ 22.317] (**) Power Button: Applying InputClass "system-setup-keyboard" >[ 22.317] (II) Using input driver 'evdev' for 'Power Button' >[ 22.317] Option "XkbRules" "evdev" >[ 22.317] Option "XkbModel" "pc105" >[ 22.317] Option "XkbLayout" "ca(fr)" >[ 22.317] Option "_source" "server/udev" >[ 22.317] Option "name" "Power Button" >[ 22.317] Option "path" "/dev/input/event0" >[ 22.317] Option "device" "/dev/input/event0" >[ 22.317] Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0" >[ 22.317] Option "driver" "evdev" >[ 22.317] Option "XkbVariant" "latin9" >[ 22.317] Option "XkbOptions" "terminate:ctrl_alt_bksp," >[ 22.318] (**) Power Button: always reports core events >[ 22.318] (**) evdev: Power Button: Device: "/dev/input/event0" >[ 22.318] (--) evdev: Power Button: Vendor 0 Product 0x1 >[ 22.318] (--) evdev: Power Button: Found keys >[ 22.318] (II) evdev: Power Button: Configuring as keyboard >[ 22.318] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0" >[ 22.318] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 7) >[ 22.318] (**) Option "xkb_rules" "evdev" >[ 22.318] (**) Option "xkb_model" "pc105" >[ 22.318] (**) Option "xkb_layout" "ca(fr)" >[ 22.318] (**) Option "xkb_variant" "latin9" >[ 22.318] (**) Option "xkb_options" "terminate:ctrl_alt_bksp," >[ 22.318] (II) XKB: Reusing cached keymap >[ 22.318] (II) config/udev: Adding input device Logitech USB-PS/2 Optical Mouse (/dev/input/event3) >[ 22.318] (**) Logitech USB-PS/2 Optical Mouse: Applying InputClass "evdev pointer catchall" >[ 22.318] (II) Using input driver 'evdev' for 'Logitech USB-PS/2 Optical Mouse' >[ 22.318] Option "XkbRules" "evdev" >[ 22.318] Option "XkbModel" "evdev" >[ 22.318] Option "XkbLayout" "us" >[ 22.318] Option "_source" "server/udev" >[ 22.318] Option "name" "Logitech USB-PS/2 Optical Mouse" >[ 22.318] Option "path" "/dev/input/event3" >[ 22.318] Option "device" "/dev/input/event3" >[ 22.318] Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.1/usb3/3-1/3-1:1.0/input/input3/event3" >[ 22.318] Option "driver" "evdev" >[ 22.318] (**) Logitech USB-PS/2 Optical Mouse: always reports core events >[ 22.318] (**) evdev: Logitech USB-PS/2 Optical Mouse: Device: "/dev/input/event3" >[ 22.318] (--) evdev: Logitech USB-PS/2 Optical Mouse: Vendor 0x46d Product 0xc03e >[ 22.318] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found 3 mouse buttons >[ 22.318] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found scroll wheel(s) >[ 22.318] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found relative axes >[ 22.318] (--) evdev: Logitech USB-PS/2 Optical Mouse: Found x and y relative axes >[ 22.318] (II) evdev: Logitech USB-PS/2 Optical Mouse: Configuring as mouse >[ 22.318] (II) evdev: Logitech USB-PS/2 Optical Mouse: Adding scrollwheel support >[ 22.318] (**) evdev: Logitech USB-PS/2 Optical Mouse: YAxisMapping: buttons 4 and 5 >[ 22.318] (**) evdev: Logitech USB-PS/2 Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 >[ 22.318] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.1/usb3/3-1/3-1:1.0/input/input3/event3" >[ 22.319] (II) XINPUT: Adding extended input device "Logitech USB-PS/2 Optical Mouse" (type: MOUSE, id 8) >[ 22.319] (II) evdev: Logitech USB-PS/2 Optical Mouse: initialized for relative axes. >[ 22.319] (**) Logitech USB-PS/2 Optical Mouse: (accel) keeping acceleration scheme 1 >[ 22.319] (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration profile 0 >[ 22.319] (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration factor: 2.000 >[ 22.319] (**) Logitech USB-PS/2 Optical Mouse: (accel) acceleration threshold: 4 >[ 22.319] (II) config/udev: Adding input device Logitech USB-PS/2 Optical Mouse (/dev/input/mouse0) >[ 22.319] (II) No input driver specified, ignoring this device. >[ 22.319] (II) This device may have been added with another device file. >[ 22.319] (II) config/udev: Adding input device UVC Camera (046d:0808) (/dev/input/event6) >[ 22.319] (**) UVC Camera (046d:0808): Applying InputClass "evdev keyboard catchall" >[ 22.319] (**) UVC Camera (046d:0808): Applying InputClass "system-setup-keyboard" >[ 22.319] (II) Using input driver 'evdev' for 'UVC Camera (046d:0808)' >[ 22.319] Option "XkbRules" "evdev" >[ 22.319] Option "XkbModel" "pc105" >[ 22.319] Option "XkbLayout" "ca(fr)" >[ 22.319] Option "_source" "server/udev" >[ 22.319] Option "name" "UVC Camera (046d:0808)" >[ 22.319] Option "path" "/dev/input/event6" >[ 22.319] Option "device" "/dev/input/event6" >[ 22.319] Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb1/1-4/1-4:1.0/input/input6/event6" >[ 22.319] Option "driver" "evdev" >[ 22.319] Option "XkbVariant" "latin9" >[ 22.319] Option "XkbOptions" "terminate:ctrl_alt_bksp," >[ 22.319] (**) UVC Camera (046d:0808): always reports core events >[ 22.319] (**) evdev: UVC Camera (046d:0808): Device: "/dev/input/event6" >[ 22.320] (--) evdev: UVC Camera (046d:0808): Vendor 0x46d Product 0x808 >[ 22.320] (--) evdev: UVC Camera (046d:0808): Found keys >[ 22.320] (II) evdev: UVC Camera (046d:0808): Configuring as keyboard >[ 22.320] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb1/1-4/1-4:1.0/input/input6/event6" >[ 22.320] (II) XINPUT: Adding extended input device "UVC Camera (046d:0808)" (type: KEYBOARD, id 9) >[ 22.320] (**) Option "xkb_rules" "evdev" >[ 22.320] (**) Option "xkb_model" "pc105" >[ 22.320] (**) Option "xkb_layout" "ca(fr)" >[ 22.320] (**) Option "xkb_variant" "latin9" >[ 22.320] (**) Option "xkb_options" "terminate:ctrl_alt_bksp," >[ 22.320] (II) XKB: Reusing cached keymap >[ 22.320] (II) config/udev: Adding input device cx88 IR (pcHDTV HD5500 HDTV) (/dev/input/event4) >[ 22.320] (**) cx88 IR (pcHDTV HD5500 HDTV): Applying InputClass "evdev keyboard catchall" >[ 22.320] (**) cx88 IR (pcHDTV HD5500 HDTV): Applying InputClass "system-setup-keyboard" >[ 22.320] (II) Using input driver 'evdev' for 'cx88 IR (pcHDTV HD5500 HDTV)' >[ 22.320] Option "XkbRules" "evdev" >[ 22.320] Option "XkbModel" "pc105" >[ 22.320] Option "XkbLayout" "ca(fr)" >[ 22.320] Option "_source" "server/udev" >[ 22.320] Option "name" "cx88 IR (pcHDTV HD5500 HDTV)" >[ 22.320] Option "path" "/dev/input/event4" >[ 22.320] Option "device" "/dev/input/event4" >[ 22.320] Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1e.0/0000:01:00.1/rc/rc0/input4/event4" >[ 22.320] Option "driver" "evdev" >[ 22.320] Option "XkbVariant" "latin9" >[ 22.320] Option "XkbOptions" "terminate:ctrl_alt_bksp," >[ 22.320] (**) cx88 IR (pcHDTV HD5500 HDTV): always reports core events >[ 22.320] (**) evdev: cx88 IR (pcHDTV HD5500 HDTV): Device: "/dev/input/event4" >[ 22.320] (--) evdev: cx88 IR (pcHDTV HD5500 HDTV): Vendor 0x7063 Product 0x5500 >[ 22.320] (--) evdev: cx88 IR (pcHDTV HD5500 HDTV): Found keys >[ 22.320] (II) evdev: cx88 IR (pcHDTV HD5500 HDTV): Configuring as keyboard >[ 22.320] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1e.0/0000:01:00.1/rc/rc0/input4/event4" >[ 22.320] (II) XINPUT: Adding extended input device "cx88 IR (pcHDTV HD5500 HDTV)" (type: KEYBOARD, id 10) >[ 22.320] (**) Option "xkb_rules" "evdev" >[ 22.320] (**) Option "xkb_model" "pc105" >[ 22.320] (**) Option "xkb_layout" "ca(fr)" >[ 22.320] (**) Option "xkb_variant" "latin9" >[ 22.320] (**) Option "xkb_options" "terminate:ctrl_alt_bksp," >[ 22.320] (II) XKB: Reusing cached keymap >[ 22.321] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event2) >[ 22.321] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall" >[ 22.321] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard" >[ 22.321] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard' >[ 22.321] Option "XkbRules" "evdev" >[ 22.321] Option "XkbModel" "pc105" >[ 22.321] Option "XkbLayout" "ca(fr)" >[ 22.321] Option "_source" "server/udev" >[ 22.321] Option "name" "AT Translated Set 2 keyboard" >[ 22.321] Option "path" "/dev/input/event2" >[ 22.321] Option "device" "/dev/input/event2" >[ 22.321] Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input2/event2" >[ 22.321] Option "driver" "evdev" >[ 22.321] Option "XkbVariant" "latin9" >[ 22.321] Option "XkbOptions" "terminate:ctrl_alt_bksp," >[ 22.321] (**) AT Translated Set 2 keyboard: always reports core events >[ 22.321] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event2" >[ 22.321] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1 >[ 22.321] (--) evdev: AT Translated Set 2 keyboard: Found keys >[ 22.321] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard >[ 22.321] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input2/event2" >[ 22.321] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 11) >[ 22.321] (**) Option "xkb_rules" "evdev" >[ 22.321] (**) Option "xkb_model" "pc105" >[ 22.321] (**) Option "xkb_layout" "ca(fr)" >[ 22.321] (**) Option "xkb_variant" "latin9" >[ 22.321] (**) Option "xkb_options" "terminate:ctrl_alt_bksp," >[ 22.321] (II) XKB: Reusing cached keymap >[ 22.322] (II) config/udev: Adding input device MCE IR Keyboard/Mouse (cx88xx) (/dev/input/event5) >[ 22.322] (**) MCE IR Keyboard/Mouse (cx88xx): Applying InputClass "evdev pointer catchall" >[ 22.322] (**) MCE IR Keyboard/Mouse (cx88xx): Applying InputClass "evdev keyboard catchall" >[ 22.322] (**) MCE IR Keyboard/Mouse (cx88xx): Applying InputClass "system-setup-keyboard" >[ 22.322] (II) Using input driver 'evdev' for 'MCE IR Keyboard/Mouse (cx88xx)' >[ 22.322] Option "XkbRules" "evdev" >[ 22.322] Option "XkbModel" "pc105" >[ 22.322] Option "XkbLayout" "ca(fr)" >[ 22.322] Option "_source" "server/udev" >[ 22.322] Option "name" "MCE IR Keyboard/Mouse (cx88xx)" >[ 22.322] Option "path" "/dev/input/event5" >[ 22.322] Option "device" "/dev/input/event5" >[ 22.322] Option "config_info" "udev:/sys/devices/virtual/input/input5/event5" >[ 22.322] Option "driver" "evdev" >[ 22.322] Option "XkbVariant" "latin9" >[ 22.322] Option "XkbOptions" "terminate:ctrl_alt_bksp," >[ 22.322] (**) MCE IR Keyboard/Mouse (cx88xx): always reports core events >[ 22.322] (**) evdev: MCE IR Keyboard/Mouse (cx88xx): Device: "/dev/input/event5" >[ 22.322] (--) evdev: MCE IR Keyboard/Mouse (cx88xx): Vendor 0 Product 0 >[ 22.322] (--) evdev: MCE IR Keyboard/Mouse (cx88xx): Found 3 mouse buttons >[ 22.322] (--) evdev: MCE IR Keyboard/Mouse (cx88xx): Found relative axes >[ 22.322] (--) evdev: MCE IR Keyboard/Mouse (cx88xx): Found x and y relative axes >[ 22.322] (--) evdev: MCE IR Keyboard/Mouse (cx88xx): Found keys >[ 22.322] (II) evdev: MCE IR Keyboard/Mouse (cx88xx): Configuring as mouse >[ 22.322] (II) evdev: MCE IR Keyboard/Mouse (cx88xx): Configuring as keyboard >[ 22.322] (**) evdev: MCE IR Keyboard/Mouse (cx88xx): YAxisMapping: buttons 4 and 5 >[ 22.322] (**) evdev: MCE IR Keyboard/Mouse (cx88xx): EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200 >[ 22.322] (**) Option "config_info" "udev:/sys/devices/virtual/input/input5/event5" >[ 22.322] (II) XINPUT: Adding extended input device "MCE IR Keyboard/Mouse (cx88xx)" (type: KEYBOARD, id 12) >[ 22.322] (**) Option "xkb_rules" "evdev" >[ 22.322] (**) Option "xkb_model" "pc105" >[ 22.322] (**) Option "xkb_layout" "ca(fr)" >[ 22.322] (**) Option "xkb_variant" "latin9" >[ 22.322] (**) Option "xkb_options" "terminate:ctrl_alt_bksp," >[ 22.322] (II) XKB: Reusing cached keymap >[ 22.322] (II) evdev: MCE IR Keyboard/Mouse (cx88xx): initialized for relative axes. >[ 22.323] (**) MCE IR Keyboard/Mouse (cx88xx): (accel) keeping acceleration scheme 1 >[ 22.323] (**) MCE IR Keyboard/Mouse (cx88xx): (accel) acceleration profile 0 >[ 22.323] (**) MCE IR Keyboard/Mouse (cx88xx): (accel) acceleration factor: 2.000 >[ 22.323] (**) MCE IR Keyboard/Mouse (cx88xx): (accel) acceleration threshold: 4 >[ 22.323] (II) config/udev: Adding input device MCE IR Keyboard/Mouse (cx88xx) (/dev/input/mouse1) >[ 22.323] (**) MCE IR Keyboard/Mouse (cx88xx): Applying InputClass "system-setup-keyboard" >[ 22.323] (II) No input driver specified, ignoring this device. >[ 22.323] (II) This device may have been added with another device file. >[ 22.327] (II) RADEON(0): RADEONSaveScreen(2) >[ 22.360] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 22.360] (II) RADEON(0): Using hsync ranges from config file >[ 22.360] (II) RADEON(0): Using vrefresh ranges from config file >[ 22.360] (II) RADEON(0): Printing DDC gathered Modelines: >[ 22.360] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 22.360] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 22.360] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 22.360] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 22.360] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 22.360] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 22.360] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 22.360] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 22.360] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 22.360] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 22.360] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 22.360] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 24.502] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 24.502] (II) RADEON(0): Using hsync ranges from config file >[ 24.502] (II) RADEON(0): Using vrefresh ranges from config file >[ 24.502] (II) RADEON(0): Printing DDC gathered Modelines: >[ 24.502] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 24.502] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 24.502] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 24.502] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 24.502] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 24.502] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 24.502] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 24.502] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 24.502] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 24.502] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 24.502] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 24.502] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 27.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b0a20] >[ 27.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b0a20] width 1680 pitch 6912 (/4 1728) >[ 27.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b09c0] >[ 27.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b09c0] width 1680 pitch 6912 (/4 1728) >[ 27.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b0a20] >[ 27.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b0a20] width 1680 pitch 6912 (/4 1728) >[ 27.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b09c0] >[ 27.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b09c0] width 1680 pitch 6912 (/4 1728) >[ 27.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b0a20] >[ 27.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b0a20] width 1680 pitch 6912 (/4 1728) >[ 27.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b09c0] >[ 27.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b09c0] width 1680 pitch 6912 (/4 1728) >[ 27.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b0a20] >[ 28.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b0a20] width 1680 pitch 6912 (/4 1728) >[ 28.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b09c0] >[ 28.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b09c0] width 1680 pitch 6912 (/4 1728) >[ 28.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b0a20] >[ 28.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b0a20] width 1680 pitch 6912 (/4 1728) >[ 28.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b09c0] >[ 28.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b09c0] width 1680 pitch 6912 (/4 1728) >[ 28.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b0a20] >[ 28.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b0a20] width 1680 pitch 6912 (/4 1728) >[ 28.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b09c0] >[ 28.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b09c0] width 1680 pitch 6912 (/4 1728) >[ 28.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35a0] >[ 28.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35a0] width 1680 pitch 6912 (/4 1728) >[ 28.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 28.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b3640] >[ 28.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b3640] width 1680 pitch 6912 (/4 1728) >[ 28.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 28.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 34.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 34.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 34.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 34.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 35.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 35.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 35.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 35.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 36.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 36.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 36.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 36.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 37.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 37.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 37.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 37.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 37.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 37.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 37.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 37.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 37.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 37.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 37.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 37.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 38.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 38.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 38.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 38.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 38.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1500070] >[ 38.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1500070] width 1680 pitch 6912 (/4 1728) >[ 38.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17b35e0] >[ 38.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17b35e0] width 1680 pitch 6912 (/4 1728) >[ 41.863] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 41.863] (II) RADEON(0): Using hsync ranges from config file >[ 41.863] (II) RADEON(0): Using vrefresh ranges from config file >[ 41.863] (II) RADEON(0): Printing DDC gathered Modelines: >[ 41.863] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 41.863] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 41.863] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 41.863] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 41.863] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 41.863] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 41.863] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 41.863] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 41.863] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 41.863] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 41.863] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 41.863] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 43.549] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 43.549] (II) RADEON(0): Using hsync ranges from config file >[ 43.549] (II) RADEON(0): Using vrefresh ranges from config file >[ 43.549] (II) RADEON(0): Printing DDC gathered Modelines: >[ 43.549] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 43.549] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 43.549] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 43.549] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 43.549] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 43.549] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 43.549] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 43.549] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 43.549] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 43.549] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 43.549] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 43.549] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 44.205] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 44.206] (II) RADEON(0): Using hsync ranges from config file >[ 44.206] (II) RADEON(0): Using vrefresh ranges from config file >[ 44.206] (II) RADEON(0): Printing DDC gathered Modelines: >[ 44.206] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 44.206] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 44.206] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 44.206] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 44.206] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 44.206] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 44.206] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 44.206] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 44.206] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 44.206] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 44.206] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 44.206] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 51.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e88210] >[ 51.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e88210] width 1680 pitch 6912 (/4 1728) >[ 51.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562b30] >[ 51.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562b30] width 1680 pitch 6912 (/4 1728) >[ 51.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e88210] >[ 51.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e88210] width 1680 pitch 6912 (/4 1728) >[ 51.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562b30] >[ 51.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562b30] width 1680 pitch 6912 (/4 1728) >[ 51.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e88210] >[ 51.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e88210] width 1680 pitch 6912 (/4 1728) >[ 52.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b13d0] >[ 52.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b13d0] width 1680 pitch 6912 (/4 1728) >[ 55.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x178f5e0] >[ 55.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x178f5e0] width 1680 pitch 6912 (/4 1728) >[ 55.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bca60] >[ 55.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bca60] width 1680 pitch 6912 (/4 1728) >[ 56.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 56.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 56.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 56.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 56.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 57.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 57.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 57.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 57.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 58.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 58.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 58.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 58.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 59.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 59.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 59.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 59.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 60.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 60.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 60.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 60.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 61.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 61.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 61.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 61.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 62.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 62.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 64.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 64.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 64.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 64.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 64.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 65.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 68.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 68.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 68.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 68.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 68.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 68.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 68.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 68.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 68.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 68.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 68.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 68.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 69.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 69.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 69.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 69.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 69.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 69.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 70.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 70.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 70.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 70.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 70.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 70.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 70.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 70.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 70.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 70.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 70.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 70.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 70.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 70.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 70.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 70.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 70.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 70.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 70.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 71.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 71.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 71.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 71.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 71.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 71.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14fc700] >[ 71.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14fc700] width 1680 pitch 6912 (/4 1728) >[ 71.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 71.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 71.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 71.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 71.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 71.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 71.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x14fc700] >[ 71.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x14fc700] width 1680 pitch 6912 (/4 1728) >[ 71.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 71.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 71.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 71.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 72.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 72.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 72.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 72.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 72.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 72.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 72.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 72.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 72.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25868c0] >[ 72.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25868c0] width 1680 pitch 6912 (/4 1728) >[ 72.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17c0700] >[ 72.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17c0700] width 1680 pitch 6912 (/4 1728) >[ 72.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562e50] >[ 72.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562e50] width 1680 pitch 6912 (/4 1728) >[ 77.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1959090] >[ 77.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1959090] width 1680 pitch 6912 (/4 1728) >[ 77.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19909d0] >[ 77.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19909d0] width 1680 pitch 6912 (/4 1728) >[ 77.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1990df0] >[ 77.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1990df0] width 1680 pitch 6912 (/4 1728) >[ 77.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19909d0] >[ 77.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19909d0] width 1680 pitch 6912 (/4 1728) >[ 212.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bd2ea0] >[ 212.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bd2ea0] width 1680 pitch 6912 (/4 1728) >[ 215.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 215.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af6370] >[ 215.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af6370] width 1680 pitch 6912 (/4 1728) >[ 215.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18feca0] >[ 215.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18feca0] width 1680 pitch 6912 (/4 1728) >[ 216.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be3e70] >[ 216.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be3e70] width 1680 pitch 6912 (/4 1728) >[ 216.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b387c0] >[ 216.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b387c0] width 1680 pitch 6912 (/4 1728) >[ 221.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1adb800] >[ 221.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1adb800] width 1680 pitch 6912 (/4 1728) >[ 562.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 562.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 562.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a63430] >[ 562.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a63430] width 1680 pitch 6912 (/4 1728) >[ 562.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 562.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 562.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8b6b0] >[ 562.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8b6b0] width 1680 pitch 6912 (/4 1728) >[ 563.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 563.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 563.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8b6b0] >[ 563.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8b6b0] width 1680 pitch 6912 (/4 1728) >[ 563.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 563.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 563.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8b6b0] >[ 563.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8b6b0] width 1680 pitch 6912 (/4 1728) >[ 563.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 563.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 563.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8b6b0] >[ 563.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8b6b0] width 1680 pitch 6912 (/4 1728) >[ 563.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 563.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 563.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8b6b0] >[ 563.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8b6b0] width 1680 pitch 6912 (/4 1728) >[ 564.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 564.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 564.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a63430] >[ 564.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a63430] width 1680 pitch 6912 (/4 1728) >[ 564.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6f8a0] >[ 564.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6f8a0] width 1680 pitch 6912 (/4 1728) >[ 564.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a63430] >[ 564.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a63430] width 1680 pitch 6912 (/4 1728) >[ 564.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6f8a0] >[ 564.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6f8a0] width 1680 pitch 6912 (/4 1728) >[ 564.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b964f0] >[ 564.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b964f0] width 1680 pitch 6912 (/4 1728) >[ 564.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6f8a0] >[ 564.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6f8a0] width 1680 pitch 6912 (/4 1728) >[ 564.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 564.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 564.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b964f0] >[ 564.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b964f0] width 1680 pitch 6912 (/4 1728) >[ 564.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a881d0] >[ 564.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a881d0] width 1680 pitch 6912 (/4 1728) >[ 564.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6ea90] >[ 564.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6ea90] width 1680 pitch 6912 (/4 1728) >[ 565.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3e8e0] >[ 565.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3e8e0] width 1680 pitch 6912 (/4 1728) >[ 565.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6ea90] >[ 565.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6ea90] width 1680 pitch 6912 (/4 1728) >[ 568.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 568.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 568.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a86df0] >[ 568.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a86df0] width 1680 pitch 6912 (/4 1728) >[ 568.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 568.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 569.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a021e0] >[ 569.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a021e0] width 1680 pitch 6912 (/4 1728) >[ 569.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b9a0d0] >[ 569.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b9a0d0] width 1680 pitch 6912 (/4 1728) >[ 569.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a021e0] >[ 569.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a021e0] width 1680 pitch 6912 (/4 1728) >[ 569.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b9a0d0] >[ 569.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b9a0d0] width 1680 pitch 6912 (/4 1728) >[ 569.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a021e0] >[ 569.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a021e0] width 1680 pitch 6912 (/4 1728) >[ 569.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b9a0d0] >[ 569.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b9a0d0] width 1680 pitch 6912 (/4 1728) >[ 569.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a021e0] >[ 569.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a021e0] width 1680 pitch 6912 (/4 1728) >[ 569.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b9a0d0] >[ 569.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b9a0d0] width 1680 pitch 6912 (/4 1728) >[ 570.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a021e0] >[ 570.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a021e0] width 1680 pitch 6912 (/4 1728) >[ 570.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 570.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 570.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f4c0] >[ 570.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f4c0] width 1680 pitch 6912 (/4 1728) >[ 570.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0d2c0] >[ 570.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0d2c0] width 1680 pitch 6912 (/4 1728) >[ 570.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f4c0] >[ 570.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f4c0] width 1680 pitch 6912 (/4 1728) >[ 570.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0d2c0] >[ 570.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0d2c0] width 1680 pitch 6912 (/4 1728) >[ 570.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f4c0] >[ 570.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f4c0] width 1680 pitch 6912 (/4 1728) >[ 570.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f180] >[ 570.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f180] width 1680 pitch 6912 (/4 1728) >[ 570.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f4c0] >[ 570.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f4c0] width 1680 pitch 6912 (/4 1728) >[ 570.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f180] >[ 570.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f180] width 1680 pitch 6912 (/4 1728) >[ 570.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f4c0] >[ 570.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f4c0] width 1680 pitch 6912 (/4 1728) >[ 570.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0f180] >[ 570.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0f180] width 1680 pitch 6912 (/4 1728) >[ 573.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8cc60] >[ 574.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8cc60] width 1680 pitch 6912 (/4 1728) >[ 574.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19fdf40] >[ 574.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19fdf40] width 1680 pitch 6912 (/4 1728) >[ 574.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8cc60] >[ 574.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8cc60] width 1680 pitch 6912 (/4 1728) >[ 577.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 577.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a07070] >[ 577.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a07070] width 1680 pitch 6912 (/4 1728) >[ 577.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 577.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a07070] >[ 577.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a07070] width 1680 pitch 6912 (/4 1728) >[ 577.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 577.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a07070] >[ 577.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a07070] width 1680 pitch 6912 (/4 1728) >[ 577.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 577.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a07070] >[ 577.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a07070] width 1680 pitch 6912 (/4 1728) >[ 577.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 577.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08860] >[ 577.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08860] width 1680 pitch 6912 (/4 1728) >[ 577.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 577.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08860] >[ 577.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08860] width 1680 pitch 6912 (/4 1728) >[ 577.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60540] >[ 577.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60540] width 1680 pitch 6912 (/4 1728) >[ 578.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cad6e0] >[ 578.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cad6e0] width 1680 pitch 6912 (/4 1728) >[ 578.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 578.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 578.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 578.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 578.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 578.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 578.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 578.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 578.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 578.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 578.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 578.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 578.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 578.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 578.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 578.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 578.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 578.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 578.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a08bb0] >[ 578.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a08bb0] width 1680 pitch 6912 (/4 1728) >[ 596.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09ce0] >[ 596.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09ce0] width 1680 pitch 6912 (/4 1728) >[ 596.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cae730] >[ 596.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cae730] width 1680 pitch 6912 (/4 1728) >[ 597.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a05310] >[ 597.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a05310] width 1680 pitch 6912 (/4 1728) >[ 597.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b64360] >[ 597.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b64360] width 1680 pitch 6912 (/4 1728) >[ 598.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0ca00] >[ 598.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0ca00] width 1680 pitch 6912 (/4 1728) >[ 598.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0ca00] >[ 598.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0ca00] width 1680 pitch 6912 (/4 1728) >[ 602.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bcf250] >[ 602.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bcf250] width 1680 pitch 6912 (/4 1728) >[ 607.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99270] >[ 607.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99270] width 1680 pitch 6912 (/4 1728) >[ 607.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a05300] >[ 607.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a05300] width 1680 pitch 6912 (/4 1728) >[ 614.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19ad6f0] >[ 614.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19ad6f0] width 1680 pitch 6912 (/4 1728) >[ 614.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bd520] >[ 614.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bd520] width 1680 pitch 6912 (/4 1728) >[ 614.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bd520] >[ 614.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bd520] width 1680 pitch 6912 (/4 1728) >[ 614.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce79e0] >[ 614.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce79e0] width 1680 pitch 6912 (/4 1728) >[ 615.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19bd520] >[ 615.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19bd520] width 1680 pitch 6912 (/4 1728) >[ 615.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6d260] >[ 615.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6d260] width 1680 pitch 6912 (/4 1728) >[ 615.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 615.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 622.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd53a0] >[ 622.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd53a0] width 1680 pitch 6912 (/4 1728) >[ 638.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6d940] >[ 638.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6d940] width 1680 pitch 6912 (/4 1728) >[ 638.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 638.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 638.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd4410] >[ 638.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd4410] width 1680 pitch 6912 (/4 1728) >[ 638.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 638.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 641.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c78230] >[ 641.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c78230] width 1680 pitch 6912 (/4 1728) >[ 643.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 643.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 643.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 643.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 643.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 644.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09710] >[ 644.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09710] width 1680 pitch 6912 (/4 1728) >[ 644.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 644.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 646.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 646.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 646.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13df0] >[ 646.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13df0] width 1680 pitch 6912 (/4 1728) >[ 646.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 646.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 646.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 646.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 646.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 646.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 646.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 646.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 646.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 646.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 647.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 647.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 647.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 647.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 647.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 647.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 647.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 647.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 647.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 647.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 647.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 647.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 647.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 647.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 647.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 647.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 647.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9a430] >[ 647.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9a430] width 1680 pitch 6912 (/4 1728) >[ 647.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 647.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 648.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 648.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 648.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 648.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 648.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 648.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 648.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 648.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 649.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 649.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 649.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 649.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 650.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c351e0] >[ 650.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c351e0] width 1680 pitch 6912 (/4 1728) >[ 650.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cae7a0] >[ 650.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cae7a0] width 1680 pitch 6912 (/4 1728) >[ 650.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 650.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 651.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd04f0] >[ 651.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd04f0] width 1680 pitch 6912 (/4 1728) >[ 651.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0c9a0] >[ 651.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0c9a0] width 1680 pitch 6912 (/4 1728) >[ 668.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c64fa0] >[ 668.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c64fa0] width 1680 pitch 6912 (/4 1728) >[ 675.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x191fd50] >[ 675.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x191fd50] width 1680 pitch 6912 (/4 1728) >[ 675.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c46f0] >[ 675.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c46f0] width 1680 pitch 6912 (/4 1728) >[ 675.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x191fd50] >[ 675.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x191fd50] width 1680 pitch 6912 (/4 1728) >[ 675.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c46f0] >[ 675.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c46f0] width 1680 pitch 6912 (/4 1728) >[ 676.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3151840] >[ 676.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3151840] width 1680 pitch 6912 (/4 1728) >[ 676.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b52840] >[ 676.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b52840] width 1680 pitch 6912 (/4 1728) >[ 676.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3151840] >[ 676.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3151840] width 1680 pitch 6912 (/4 1728) >[ 676.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd07e0] >[ 676.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd07e0] width 1680 pitch 6912 (/4 1728) >[ 677.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca8560] >[ 677.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca8560] width 1680 pitch 6912 (/4 1728) >[ 677.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09b70] >[ 677.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09b70] width 1680 pitch 6912 (/4 1728) >[ 677.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09b70] >[ 677.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09b70] width 1680 pitch 6912 (/4 1728) >[ 678.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca8560] >[ 678.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca8560] width 1680 pitch 6912 (/4 1728) >[ 678.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a09b70] >[ 678.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a09b70] width 1680 pitch 6912 (/4 1728) >[ 679.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a050a0] >[ 679.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a050a0] width 1680 pitch 6912 (/4 1728) >[ 679.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3150c10] >[ 679.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3150c10] width 1680 pitch 6912 (/4 1728) >[ 680.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ceaf60] >[ 680.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ceaf60] width 1680 pitch 6912 (/4 1728) >[ 680.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3150cd0] >[ 680.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3150cd0] width 1680 pitch 6912 (/4 1728) >[ 680.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a050a0] >[ 680.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a050a0] width 1680 pitch 6912 (/4 1728) >[ 680.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa2dc0] >[ 680.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa2dc0] width 1680 pitch 6912 (/4 1728) >[ 680.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ceaf60] >[ 680.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ceaf60] width 1680 pitch 6912 (/4 1728) >[ 681.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca8560] >[ 681.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca8560] width 1680 pitch 6912 (/4 1728) >[ 686.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6e810] >[ 686.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6e810] width 1680 pitch 6912 (/4 1728) >[ 686.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6eb80] >[ 686.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6eb80] width 1680 pitch 6912 (/4 1728) >[ 686.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31e08c0] >[ 686.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31e08c0] width 1680 pitch 6912 (/4 1728) >[ 686.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6e810] >[ 686.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6e810] width 1680 pitch 6912 (/4 1728) >[ 686.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31e08c0] >[ 686.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31e08c0] width 1680 pitch 6912 (/4 1728) >[ 686.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6e810] >[ 686.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6e810] width 1680 pitch 6912 (/4 1728) >[ 686.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31e08c0] >[ 686.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31e08c0] width 1680 pitch 6912 (/4 1728) >[ 686.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6f610] >[ 686.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6f610] width 1680 pitch 6912 (/4 1728) >[ 686.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6e810] >[ 686.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6e810] width 1680 pitch 6912 (/4 1728) >[ 686.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6f610] >[ 686.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6f610] width 1680 pitch 6912 (/4 1728) >[ 686.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6e810] >[ 686.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6e810] width 1680 pitch 6912 (/4 1728) >[ 686.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6c4e0] >[ 686.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6c4e0] width 1680 pitch 6912 (/4 1728) >[ 691.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0d1d0] >[ 691.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0d1d0] width 1680 pitch 6912 (/4 1728) >[ 691.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6850] >[ 691.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6850] width 1680 pitch 6912 (/4 1728) >[ 691.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 691.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 691.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6850] >[ 691.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6850] width 1680 pitch 6912 (/4 1728) >[ 691.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 691.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 691.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6850] >[ 691.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6850] width 1680 pitch 6912 (/4 1728) >[ 691.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 691.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 691.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6850] >[ 691.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6850] width 1680 pitch 6912 (/4 1728) >[ 691.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd0870] >[ 691.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd0870] width 1680 pitch 6912 (/4 1728) >[ 691.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 691.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 691.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd0870] >[ 691.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd0870] width 1680 pitch 6912 (/4 1728) >[ 691.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be80a0] >[ 691.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be80a0] width 1680 pitch 6912 (/4 1728) >[ 692.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccd3a0] >[ 692.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccd3a0] width 1680 pitch 6912 (/4 1728) >[ 692.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccd3a0] >[ 692.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccd3a0] width 1680 pitch 6912 (/4 1728) >[ 692.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccd3a0] >[ 692.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccd3a0] width 1680 pitch 6912 (/4 1728) >[ 692.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c68970] >[ 692.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c68970] width 1680 pitch 6912 (/4 1728) >[ 692.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2dc0] >[ 692.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2dc0] width 1680 pitch 6912 (/4 1728) >[ 692.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6b1d0] >[ 692.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6b1d0] width 1680 pitch 6912 (/4 1728) >[ 692.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6b230] >[ 692.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6b230] width 1680 pitch 6912 (/4 1728) >[ 692.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2880] >[ 692.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2880] width 1680 pitch 6912 (/4 1728) >[ 692.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccd3a0] >[ 692.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccd3a0] width 1680 pitch 6912 (/4 1728) >[ 692.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2880] >[ 692.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2880] width 1680 pitch 6912 (/4 1728) >[ 692.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccd3a0] >[ 692.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccd3a0] width 1680 pitch 6912 (/4 1728) >[ 734.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 734.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 734.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd0870] >[ 734.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd0870] width 1680 pitch 6912 (/4 1728) >[ 734.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3f7b0] >[ 734.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3f7b0] width 1680 pitch 6912 (/4 1728) >[ 734.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd0870] >[ 734.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd0870] width 1680 pitch 6912 (/4 1728) >[ 735.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 735.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 735.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6c1f0] >[ 735.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6c1f0] width 1680 pitch 6912 (/4 1728) >[ 737.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6c1f0] >[ 737.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6c1f0] width 1680 pitch 6912 (/4 1728) >[ 737.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be0070] >[ 737.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be0070] width 1680 pitch 6912 (/4 1728) >[ 738.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be0070] >[ 738.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be0070] width 1680 pitch 6912 (/4 1728) >[ 872.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 872.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 872.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 872.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 872.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c67630] >[ 872.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c67630] width 1680 pitch 6912 (/4 1728) >[ 872.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 872.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 873.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba7b50] >[ 873.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba7b50] width 1680 pitch 6912 (/4 1728) >[ 873.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2880] >[ 873.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2880] width 1680 pitch 6912 (/4 1728) >[ 886.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7c950] >[ 886.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7c950] width 1680 pitch 6912 (/4 1728) >[ 886.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4e340] >[ 886.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4e340] width 1680 pitch 6912 (/4 1728) >[ 887.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4e340] >[ 887.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4e340] width 1680 pitch 6912 (/4 1728) >[ 887.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 887.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 887.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 887.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 887.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 887.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 887.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6e790] >[ 887.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6e790] width 1680 pitch 6912 (/4 1728) >[ 906.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6e040] >[ 906.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6e040] width 1680 pitch 6912 (/4 1728) >[ 906.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 906.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 906.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4e340] >[ 906.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4e340] width 1680 pitch 6912 (/4 1728) >[ 906.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 906.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 907.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 907.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 907.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 907.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 907.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 907.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 907.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 907.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 907.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 907.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 907.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 907.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 909.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 909.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 909.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 909.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 910.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cccaf0] >[ 910.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cccaf0] width 1680 pitch 6912 (/4 1728) >[ 910.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 910.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 910.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 910.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 935.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cadd60] >[ 935.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cadd60] width 1680 pitch 6912 (/4 1728) >[ 935.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 935.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 935.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 935.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 944.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfd70] >[ 944.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfd70] width 1680 pitch 6912 (/4 1728) >[ 950.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c69320] >[ 950.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c69320] width 1680 pitch 6912 (/4 1728) >[ 950.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85f20] >[ 950.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85f20] width 1680 pitch 6912 (/4 1728) >[ 950.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3f520] >[ 950.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3f520] width 1680 pitch 6912 (/4 1728) >[ 950.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85f20] >[ 950.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85f20] width 1680 pitch 6912 (/4 1728) >[ 950.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3f520] >[ 950.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3f520] width 1680 pitch 6912 (/4 1728) >[ 951.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e05a10] >[ 951.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e05a10] width 1680 pitch 6912 (/4 1728) >[ 951.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a050a0] >[ 951.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a050a0] width 1680 pitch 6912 (/4 1728) >[ 954.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c99c10] >[ 954.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c99c10] width 1680 pitch 6912 (/4 1728) >[ 955.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7b130] >[ 955.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7b130] width 1680 pitch 6912 (/4 1728) >[ 955.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7b280] >[ 955.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7b280] width 1680 pitch 6912 (/4 1728) >[ 965.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9d900] >[ 965.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9d900] width 1680 pitch 6912 (/4 1728) >[ 965.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfbe0] >[ 965.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfbe0] width 1680 pitch 6912 (/4 1728) >[ 965.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9d900] >[ 965.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9d900] width 1680 pitch 6912 (/4 1728) >[ 965.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfbe0] >[ 965.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfbe0] width 1680 pitch 6912 (/4 1728) >[ 966.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfbe0] >[ 966.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfbe0] width 1680 pitch 6912 (/4 1728) >[ 966.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 966.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 966.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9d900] >[ 966.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9d900] width 1680 pitch 6912 (/4 1728) >[ 966.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 966.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 966.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfbe0] >[ 966.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfbe0] width 1680 pitch 6912 (/4 1728) >[ 967.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccbe00] >[ 967.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccbe00] width 1680 pitch 6912 (/4 1728) >[ 968.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfbe0] >[ 968.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfbe0] width 1680 pitch 6912 (/4 1728) >[ 968.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfbe0] >[ 968.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfbe0] width 1680 pitch 6912 (/4 1728) >[ 985.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 985.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 985.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 985.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 985.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 985.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 985.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 986.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 986.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 986.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 986.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 986.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 986.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 986.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 986.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e049a0] >[ 986.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e049a0] width 1680 pitch 6912 (/4 1728) >[ 986.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c60040] >[ 986.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c60040] width 1680 pitch 6912 (/4 1728) >[ 986.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5d7d0] >[ 986.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5d7d0] width 1680 pitch 6912 (/4 1728) >[ 986.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5d7d0] >[ 986.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5d7d0] width 1680 pitch 6912 (/4 1728) >[ 986.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5d7d0] >[ 986.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5d7d0] width 1680 pitch 6912 (/4 1728) >[ 986.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 986.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 986.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5d7d0] >[ 986.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5d7d0] width 1680 pitch 6912 (/4 1728) >[ 1002.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb2a0] >[ 1002.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb2a0] width 1680 pitch 6912 (/4 1728) >[ 1003.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb2a0] >[ 1003.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb2a0] width 1680 pitch 6912 (/4 1728) >[ 1003.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfdb80] >[ 1003.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfdb80] width 1680 pitch 6912 (/4 1728) >[ 1003.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfc60] >[ 1003.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfc60] width 1680 pitch 6912 (/4 1728) >[ 1003.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1003.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1013.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5d7d0] >[ 1013.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5d7d0] width 1680 pitch 6912 (/4 1728) >[ 1014.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31dfc60] >[ 1014.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31dfc60] width 1680 pitch 6912 (/4 1728) >[ 1014.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c567f0] >[ 1014.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c567f0] width 1680 pitch 6912 (/4 1728) >[ 1025.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1def7f0] >[ 1025.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1def7f0] width 1680 pitch 6912 (/4 1728) >[ 1026.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7af60] >[ 1026.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7af60] width 1680 pitch 6912 (/4 1728) >[ 1026.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7af60] >[ 1026.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7af60] width 1680 pitch 6912 (/4 1728) >[ 1026.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1026.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1026.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7af60] >[ 1026.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7af60] width 1680 pitch 6912 (/4 1728) >[ 1026.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1026.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1027.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfd550] >[ 1027.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfd550] width 1680 pitch 6912 (/4 1728) >[ 1027.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7af60] >[ 1027.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7af60] width 1680 pitch 6912 (/4 1728) >[ 1027.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1027.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1027.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7af60] >[ 1027.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7af60] width 1680 pitch 6912 (/4 1728) >[ 1027.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1027.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1027.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1027.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1029.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c47050] >[ 1029.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c47050] width 1680 pitch 6912 (/4 1728) >[ 1030.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c47050] >[ 1030.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c47050] width 1680 pitch 6912 (/4 1728) >[ 1030.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c47050] >[ 1030.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c47050] width 1680 pitch 6912 (/4 1728) >[ 1032.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dec3f0] >[ 1032.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dec3f0] width 1680 pitch 6912 (/4 1728) >[ 1032.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfb3b0] >[ 1032.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfb3b0] width 1680 pitch 6912 (/4 1728) >[ 1048.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11850] >[ 1048.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11850] width 1680 pitch 6912 (/4 1728) >[ 1048.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccc970] >[ 1048.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccc970] width 1680 pitch 6912 (/4 1728) >[ 1048.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11850] >[ 1048.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11850] width 1680 pitch 6912 (/4 1728) >[ 1048.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccc970] >[ 1048.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccc970] width 1680 pitch 6912 (/4 1728) >[ 1048.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11850] >[ 1048.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11850] width 1680 pitch 6912 (/4 1728) >[ 1048.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccc970] >[ 1048.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccc970] width 1680 pitch 6912 (/4 1728) >[ 1048.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11850] >[ 1048.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11850] width 1680 pitch 6912 (/4 1728) >[ 1048.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccc970] >[ 1048.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccc970] width 1680 pitch 6912 (/4 1728) >[ 1048.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11850] >[ 1048.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11850] width 1680 pitch 6912 (/4 1728) >[ 1048.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a40180] >[ 1048.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a40180] width 1680 pitch 6912 (/4 1728) >[ 1048.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a40180] >[ 1048.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a40180] width 1680 pitch 6912 (/4 1728) >[ 1048.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccc970] >[ 1048.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccc970] width 1680 pitch 6912 (/4 1728) >[ 1048.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a40180] >[ 1048.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a40180] width 1680 pitch 6912 (/4 1728) >[ 1048.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1049.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1049.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a40180] >[ 1049.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a40180] width 1680 pitch 6912 (/4 1728) >[ 1049.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1049.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1049.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c53660] >[ 1049.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c53660] width 1680 pitch 6912 (/4 1728) >[ 1049.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1049.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1049.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c53660] >[ 1049.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c53660] width 1680 pitch 6912 (/4 1728) >[ 1049.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1049.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1049.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c53660] >[ 1049.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c53660] width 1680 pitch 6912 (/4 1728) >[ 1049.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf5720] >[ 1049.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf5720] width 1680 pitch 6912 (/4 1728) >[ 1049.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b292e0] >[ 1049.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b292e0] width 1680 pitch 6912 (/4 1728) >[ 1049.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1049.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1049.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b292e0] >[ 1049.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b292e0] width 1680 pitch 6912 (/4 1728) >[ 1054.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded620] >[ 1054.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded620] width 1680 pitch 6912 (/4 1728) >[ 1054.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded770] >[ 1054.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded770] width 1680 pitch 6912 (/4 1728) >[ 1054.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded620] >[ 1054.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded620] width 1680 pitch 6912 (/4 1728) >[ 1054.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded770] >[ 1054.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded770] width 1680 pitch 6912 (/4 1728) >[ 1054.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded620] >[ 1054.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded620] width 1680 pitch 6912 (/4 1728) >[ 1054.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded770] >[ 1054.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded770] width 1680 pitch 6912 (/4 1728) >[ 1054.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded620] >[ 1054.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded620] width 1680 pitch 6912 (/4 1728) >[ 1054.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded770] >[ 1054.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded770] width 1680 pitch 6912 (/4 1728) >[ 1054.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded620] >[ 1054.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded620] width 1680 pitch 6912 (/4 1728) >[ 1054.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dee400] >[ 1054.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dee400] width 1680 pitch 6912 (/4 1728) >[ 1054.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df83f0] >[ 1054.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df83f0] width 1680 pitch 6912 (/4 1728) >[ 1054.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7860] >[ 1054.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7860] width 1680 pitch 6912 (/4 1728) >[ 1054.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1054.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1054.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccf080] >[ 1054.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccf080] width 1680 pitch 6912 (/4 1728) >[ 1055.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6aa30] >[ 1055.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6aa30] width 1680 pitch 6912 (/4 1728) >[ 1055.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6aa30] >[ 1055.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6aa30] width 1680 pitch 6912 (/4 1728) >[ 1055.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e68370] >[ 1055.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e68370] width 1680 pitch 6912 (/4 1728) >[ 1055.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6aa30] >[ 1055.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6aa30] width 1680 pitch 6912 (/4 1728) >[ 1055.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1055.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1055.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1055.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1055.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6aa30] >[ 1055.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6aa30] width 1680 pitch 6912 (/4 1728) >[ 1055.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6aa30] >[ 1055.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6aa30] width 1680 pitch 6912 (/4 1728) >[ 1055.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1055.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e683f0] >[ 1055.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e683f0] width 1680 pitch 6912 (/4 1728) >[ 1055.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca7930] >[ 1055.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca7930] width 1680 pitch 6912 (/4 1728) >[ 1069.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccb990] >[ 1069.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccb990] width 1680 pitch 6912 (/4 1728) >[ 1069.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11a60] >[ 1069.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11a60] width 1680 pitch 6912 (/4 1728) >[ 1069.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13520] >[ 1069.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13520] width 1680 pitch 6912 (/4 1728) >[ 1069.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11a60] >[ 1069.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11a60] width 1680 pitch 6912 (/4 1728) >[ 1069.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59520] >[ 1069.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59520] width 1680 pitch 6912 (/4 1728) >[ 1069.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e11a60] >[ 1069.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e11a60] width 1680 pitch 6912 (/4 1728) >[ 1069.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1069.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1069.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8390] >[ 1069.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8390] width 1680 pitch 6912 (/4 1728) >[ 1069.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1069.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1069.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8390] >[ 1069.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8390] width 1680 pitch 6912 (/4 1728) >[ 1069.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1069.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1069.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59520] >[ 1069.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59520] width 1680 pitch 6912 (/4 1728) >[ 1069.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c49710] >[ 1069.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c49710] width 1680 pitch 6912 (/4 1728) >[ 1069.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59520] >[ 1069.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59520] width 1680 pitch 6912 (/4 1728) >[ 1077.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c563f0] >[ 1077.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c563f0] width 1680 pitch 6912 (/4 1728) >[ 1077.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6aa00] >[ 1077.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6aa00] width 1680 pitch 6912 (/4 1728) >[ 1077.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c56910] >[ 1077.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c56910] width 1680 pitch 6912 (/4 1728) >[ 1077.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c56910] >[ 1077.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c56910] width 1680 pitch 6912 (/4 1728) >[ 1077.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d2a0] >[ 1077.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d2a0] width 1680 pitch 6912 (/4 1728) >[ 1077.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dec370] >[ 1078.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dec370] width 1680 pitch 6912 (/4 1728) >[ 1078.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c66480] >[ 1078.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c66480] width 1680 pitch 6912 (/4 1728) >[ 1084.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d2d0] >[ 1084.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d2d0] width 1680 pitch 6912 (/4 1728) >[ 1084.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f3ff0] >[ 1084.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f3ff0] width 1680 pitch 6912 (/4 1728) >[ 1084.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f3ff0] >[ 1084.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f3ff0] width 1680 pitch 6912 (/4 1728) >[ 1098.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5fe70] >[ 1098.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5fe70] width 1680 pitch 6912 (/4 1728) >[ 1098.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04e60] >[ 1098.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04e60] width 1680 pitch 6912 (/4 1728) >[ 1098.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5fe70] >[ 1098.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5fe70] width 1680 pitch 6912 (/4 1728) >[ 1098.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04e60] >[ 1098.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04e60] width 1680 pitch 6912 (/4 1728) >[ 1098.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5fe70] >[ 1098.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5fe70] width 1680 pitch 6912 (/4 1728) >[ 1098.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04e60] >[ 1098.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04e60] width 1680 pitch 6912 (/4 1728) >[ 1098.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5fe70] >[ 1098.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5fe70] width 1680 pitch 6912 (/4 1728) >[ 1098.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04e60] >[ 1098.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04e60] width 1680 pitch 6912 (/4 1728) >[ 1098.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e06390] >[ 1098.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e06390] width 1680 pitch 6912 (/4 1728) >[ 1098.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8bb0] >[ 1098.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8bb0] width 1680 pitch 6912 (/4 1728) >[ 1098.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04e60] >[ 1098.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04e60] width 1680 pitch 6912 (/4 1728) >[ 1098.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8bb0] >[ 1098.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8bb0] width 1680 pitch 6912 (/4 1728) >[ 1098.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04e60] >[ 1098.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04e60] width 1680 pitch 6912 (/4 1728) >[ 1098.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04d30] >[ 1098.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04d30] width 1680 pitch 6912 (/4 1728) >[ 1098.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cebb60] >[ 1098.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cebb60] width 1680 pitch 6912 (/4 1728) >[ 1098.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a04d30] >[ 1098.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a04d30] width 1680 pitch 6912 (/4 1728) >[ 1098.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cebb60] >[ 1098.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cebb60] width 1680 pitch 6912 (/4 1728) >[ 1098.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a049b0] >[ 1098.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a049b0] width 1680 pitch 6912 (/4 1728) >[ 1098.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b25280] >[ 1098.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b25280] width 1680 pitch 6912 (/4 1728) >[ 1098.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a049b0] >[ 1098.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a049b0] width 1680 pitch 6912 (/4 1728) >[ 1098.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b25280] >[ 1099.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b25280] width 1680 pitch 6912 (/4 1728) >[ 1099.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a049b0] >[ 1099.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a049b0] width 1680 pitch 6912 (/4 1728) >[ 1099.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b25280] >[ 1099.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b25280] width 1680 pitch 6912 (/4 1728) >[ 1099.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cebb60] >[ 1099.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cebb60] width 1680 pitch 6912 (/4 1728) >[ 1099.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b25280] >[ 1099.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b25280] width 1680 pitch 6912 (/4 1728) >[ 1099.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cebb60] >[ 1099.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cebb60] width 1680 pitch 6912 (/4 1728) >[ 1099.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a049b0] >[ 1099.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a049b0] width 1680 pitch 6912 (/4 1728) >[ 1099.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cebb60] >[ 1099.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cebb60] width 1680 pitch 6912 (/4 1728) >[ 1099.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a049b0] >[ 1099.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a049b0] width 1680 pitch 6912 (/4 1728) >[ 1150.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9280] >[ 1150.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9280] width 1680 pitch 6912 (/4 1728) >[ 1150.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd93f0] >[ 1150.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd93f0] width 1680 pitch 6912 (/4 1728) >[ 1150.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9280] >[ 1150.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9280] width 1680 pitch 6912 (/4 1728) >[ 1150.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd93f0] >[ 1150.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd93f0] width 1680 pitch 6912 (/4 1728) >[ 1150.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9280] >[ 1150.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9280] width 1680 pitch 6912 (/4 1728) >[ 1150.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd93f0] >[ 1150.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd93f0] width 1680 pitch 6912 (/4 1728) >[ 1150.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9280] >[ 1150.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9280] width 1680 pitch 6912 (/4 1728) >[ 1150.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd93f0] >[ 1150.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd93f0] width 1680 pitch 6912 (/4 1728) >[ 1150.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9280] >[ 1150.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9280] width 1680 pitch 6912 (/4 1728) >[ 1150.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3d580] >[ 1150.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3d580] width 1680 pitch 6912 (/4 1728) >[ 1150.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3d580] >[ 1150.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3d580] width 1680 pitch 6912 (/4 1728) >[ 1150.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a3d580] >[ 1150.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a3d580] width 1680 pitch 6912 (/4 1728) >[ 1150.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ae20] >[ 1150.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ae20] width 1680 pitch 6912 (/4 1728) >[ 1150.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ae20] >[ 1150.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ae20] width 1680 pitch 6912 (/4 1728) >[ 1150.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ae20] >[ 1150.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ae20] width 1680 pitch 6912 (/4 1728) >[ 1150.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a89f70] >[ 1150.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a89f70] width 1680 pitch 6912 (/4 1728) >[ 1150.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ae20] >[ 1150.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ae20] width 1680 pitch 6912 (/4 1728) >[ 1150.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a89f70] >[ 1150.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a89f70] width 1680 pitch 6912 (/4 1728) >[ 1150.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1150.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1150.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a89f70] >[ 1150.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a89f70] width 1680 pitch 6912 (/4 1728) >[ 1150.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1151.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1151.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d0a0] >[ 1151.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d0a0] width 1680 pitch 6912 (/4 1728) >[ 1151.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ae20] >[ 1151.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ae20] width 1680 pitch 6912 (/4 1728) >[ 1214.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c02640] >[ 1214.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c02640] width 1680 pitch 6912 (/4 1728) >[ 1214.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca77e0] >[ 1214.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca77e0] width 1680 pitch 6912 (/4 1728) >[ 1214.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c02640] >[ 1214.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c02640] width 1680 pitch 6912 (/4 1728) >[ 1214.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca77e0] >[ 1214.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca77e0] width 1680 pitch 6912 (/4 1728) >[ 1214.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c02640] >[ 1214.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c02640] width 1680 pitch 6912 (/4 1728) >[ 1214.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca77e0] >[ 1214.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca77e0] width 1680 pitch 6912 (/4 1728) >[ 1214.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c02640] >[ 1214.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c02640] width 1680 pitch 6912 (/4 1728) >[ 1214.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca77e0] >[ 1214.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca77e0] width 1680 pitch 6912 (/4 1728) >[ 1214.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c02640] >[ 1214.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c02640] width 1680 pitch 6912 (/4 1728) >[ 1214.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca77e0] >[ 1214.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca77e0] width 1680 pitch 6912 (/4 1728) >[ 1214.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf5db0] >[ 1214.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf5db0] width 1680 pitch 6912 (/4 1728) >[ 1214.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de30a0] >[ 1214.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de30a0] width 1680 pitch 6912 (/4 1728) >[ 1214.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf5db0] >[ 1214.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf5db0] width 1680 pitch 6912 (/4 1728) >[ 1214.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de30a0] >[ 1214.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de30a0] width 1680 pitch 6912 (/4 1728) >[ 1214.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd56a0] >[ 1214.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd56a0] width 1680 pitch 6912 (/4 1728) >[ 1214.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de30a0] >[ 1214.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de30a0] width 1680 pitch 6912 (/4 1728) >[ 1214.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd56a0] >[ 1214.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd56a0] width 1680 pitch 6912 (/4 1728) >[ 1214.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8240] >[ 1214.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8240] width 1680 pitch 6912 (/4 1728) >[ 1214.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd56a0] >[ 1214.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd56a0] width 1680 pitch 6912 (/4 1728) >[ 1214.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8240] >[ 1214.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8240] width 1680 pitch 6912 (/4 1728) >[ 1214.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de30a0] >[ 1214.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de30a0] width 1680 pitch 6912 (/4 1728) >[ 1214.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded760] >[ 1214.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded760] width 1680 pitch 6912 (/4 1728) >[ 1214.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de30a0] >[ 1214.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de30a0] width 1680 pitch 6912 (/4 1728) >[ 1214.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded760] >[ 1214.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded760] width 1680 pitch 6912 (/4 1728) >[ 1214.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df8240] >[ 1214.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df8240] width 1680 pitch 6912 (/4 1728) >[ 1214.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ded760] >[ 1214.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ded760] width 1680 pitch 6912 (/4 1728) >[ 1214.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3020] >[ 1214.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3020] width 1680 pitch 6912 (/4 1728) >[ 1214.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de30a0] >[ 1214.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de30a0] width 1680 pitch 6912 (/4 1728) >[ 1231.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb370] >[ 1231.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb370] width 1680 pitch 6912 (/4 1728) >[ 1231.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb6f0] >[ 1231.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb6f0] width 1680 pitch 6912 (/4 1728) >[ 1231.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb370] >[ 1231.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb370] width 1680 pitch 6912 (/4 1728) >[ 1231.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb6f0] >[ 1231.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb6f0] width 1680 pitch 6912 (/4 1728) >[ 1231.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb370] >[ 1231.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb370] width 1680 pitch 6912 (/4 1728) >[ 1231.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb6f0] >[ 1231.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb6f0] width 1680 pitch 6912 (/4 1728) >[ 1231.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb370] >[ 1231.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb370] width 1680 pitch 6912 (/4 1728) >[ 1231.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb6f0] >[ 1231.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb6f0] width 1680 pitch 6912 (/4 1728) >[ 1231.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb370] >[ 1231.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb370] width 1680 pitch 6912 (/4 1728) >[ 1231.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e01370] >[ 1231.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e01370] width 1680 pitch 6912 (/4 1728) >[ 1231.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b95de0] >[ 1231.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b95de0] width 1680 pitch 6912 (/4 1728) >[ 1231.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb660] >[ 1231.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb660] width 1680 pitch 6912 (/4 1728) >[ 1231.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2910] >[ 1231.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2910] width 1680 pitch 6912 (/4 1728) >[ 1231.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b95de0] >[ 1231.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b95de0] width 1680 pitch 6912 (/4 1728) >[ 1231.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e013c0] >[ 1231.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e013c0] width 1680 pitch 6912 (/4 1728) >[ 1231.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b95de0] >[ 1231.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b95de0] width 1680 pitch 6912 (/4 1728) >[ 1231.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e013c0] >[ 1231.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e013c0] width 1680 pitch 6912 (/4 1728) >[ 1231.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e065a0] >[ 1231.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e065a0] width 1680 pitch 6912 (/4 1728) >[ 1231.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e013c0] >[ 1231.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e013c0] width 1680 pitch 6912 (/4 1728) >[ 1231.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e065a0] >[ 1231.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e065a0] width 1680 pitch 6912 (/4 1728) >[ 1231.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e013c0] >[ 1231.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e013c0] width 1680 pitch 6912 (/4 1728) >[ 1231.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e065a0] >[ 1231.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e065a0] width 1680 pitch 6912 (/4 1728) >[ 1232.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a26c20] >[ 1232.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a26c20] width 1680 pitch 6912 (/4 1728) >[ 1232.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e013c0] >[ 1232.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e013c0] width 1680 pitch 6912 (/4 1728) >[ 1232.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e065a0] >[ 1232.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e065a0] width 1680 pitch 6912 (/4 1728) >[ 1232.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2910] >[ 1232.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2910] width 1680 pitch 6912 (/4 1728) >[ 1232.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e065a0] >[ 1232.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e065a0] width 1680 pitch 6912 (/4 1728) >[ 1236.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2fb0] >[ 1236.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2fb0] width 1680 pitch 6912 (/4 1728) >[ 1236.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb640] >[ 1236.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb640] width 1680 pitch 6912 (/4 1728) >[ 1236.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6700] >[ 1236.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6700] width 1680 pitch 6912 (/4 1728) >[ 1237.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dec300] >[ 1237.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dec300] width 1680 pitch 6912 (/4 1728) >[ 1237.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a24b50] >[ 1237.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a24b50] width 1680 pitch 6912 (/4 1728) >[ 1298.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6cf50] >[ 1298.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6cf50] width 1680 pitch 6912 (/4 1728) >[ 1298.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb640] >[ 1298.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb640] width 1680 pitch 6912 (/4 1728) >[ 1298.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6cf50] >[ 1298.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6cf50] width 1680 pitch 6912 (/4 1728) >[ 1344.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2fb0] >[ 1344.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2fb0] width 1680 pitch 6912 (/4 1728) >[ 1345.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccbad0] >[ 1345.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccbad0] width 1680 pitch 6912 (/4 1728) >[ 1345.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccbad0] >[ 1345.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccbad0] width 1680 pitch 6912 (/4 1728) >[ 1411.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd5c60] >[ 1411.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd5c60] width 1680 pitch 6912 (/4 1728) >[ 1412.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c72360] >[ 1412.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c72360] width 1680 pitch 6912 (/4 1728) >[ 1414.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c56250] >[ 1414.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c56250] width 1680 pitch 6912 (/4 1728) >[ 1414.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd5c60] >[ 1414.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd5c60] width 1680 pitch 6912 (/4 1728) >[ 1414.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c56250] >[ 1414.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c56250] width 1680 pitch 6912 (/4 1728) >[ 1436.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c06770] >[ 1436.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c06770] width 1680 pitch 6912 (/4 1728) >[ 1436.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c068e0] >[ 1436.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c068e0] width 1680 pitch 6912 (/4 1728) >[ 1436.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c06770] >[ 1436.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c06770] width 1680 pitch 6912 (/4 1728) >[ 1436.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c068e0] >[ 1436.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c068e0] width 1680 pitch 6912 (/4 1728) >[ 1436.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c06770] >[ 1436.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c06770] width 1680 pitch 6912 (/4 1728) >[ 1436.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c068e0] >[ 1436.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c068e0] width 1680 pitch 6912 (/4 1728) >[ 1436.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c06770] >[ 1436.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c06770] width 1680 pitch 6912 (/4 1728) >[ 1436.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c068e0] >[ 1436.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c068e0] width 1680 pitch 6912 (/4 1728) >[ 1436.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c06770] >[ 1436.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c06770] width 1680 pitch 6912 (/4 1728) >[ 1436.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7bbd0] >[ 1436.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7bbd0] width 1680 pitch 6912 (/4 1728) >[ 1436.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c06770] >[ 1436.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c06770] width 1680 pitch 6912 (/4 1728) >[ 1436.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7bbd0] >[ 1436.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7bbd0] width 1680 pitch 6912 (/4 1728) >[ 1436.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6ad0] >[ 1436.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6ad0] width 1680 pitch 6912 (/4 1728) >[ 1436.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dff020] >[ 1436.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dff020] width 1680 pitch 6912 (/4 1728) >[ 1436.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6ad0] >[ 1436.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6ad0] width 1680 pitch 6912 (/4 1728) >[ 1436.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dff020] >[ 1436.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dff020] width 1680 pitch 6912 (/4 1728) >[ 1436.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c57790] >[ 1436.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c57790] width 1680 pitch 6912 (/4 1728) >[ 1436.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dff020] >[ 1436.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dff020] width 1680 pitch 6912 (/4 1728) >[ 1436.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c57790] >[ 1436.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c57790] width 1680 pitch 6912 (/4 1728) >[ 1436.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dff020] >[ 1436.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dff020] width 1680 pitch 6912 (/4 1728) >[ 1436.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c57790] >[ 1436.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c57790] width 1680 pitch 6912 (/4 1728) >[ 1436.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de63e0] >[ 1436.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de63e0] width 1680 pitch 6912 (/4 1728) >[ 1436.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c57790] >[ 1436.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c57790] width 1680 pitch 6912 (/4 1728) >[ 1436.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de63e0] >[ 1436.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de63e0] width 1680 pitch 6912 (/4 1728) >[ 1436.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c57790] >[ 1436.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c57790] width 1680 pitch 6912 (/4 1728) >[ 1436.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dff020] >[ 1436.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dff020] width 1680 pitch 6912 (/4 1728) >[ 1526.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a730] >[ 1526.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a730] width 1680 pitch 6912 (/4 1728) >[ 1526.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1526.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1526.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1526.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1526.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1526.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c05540] >[ 1526.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c05540] width 1680 pitch 6912 (/4 1728) >[ 1526.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c064f0] >[ 1526.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c064f0] width 1680 pitch 6912 (/4 1728) >[ 1526.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1526.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c10c40] >[ 1526.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c10c40] width 1680 pitch 6912 (/4 1728) >[ 1526.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1526.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1530.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b410] >[ 1530.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b410] width 1680 pitch 6912 (/4 1728) >[ 1530.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b410] >[ 1530.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b410] width 1680 pitch 6912 (/4 1728) >[ 1530.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b410] >[ 1530.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b410] width 1680 pitch 6912 (/4 1728) >[ 1530.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b410] >[ 1530.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b410] width 1680 pitch 6912 (/4 1728) >[ 1530.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b410] >[ 1530.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b410] width 1680 pitch 6912 (/4 1728) >[ 1530.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b410] >[ 1530.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b410] width 1680 pitch 6912 (/4 1728) >[ 1530.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c72360] >[ 1530.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c72360] width 1680 pitch 6912 (/4 1728) >[ 1530.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c72360] >[ 1530.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c72360] width 1680 pitch 6912 (/4 1728) >[ 1530.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e07330] >[ 1530.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e07330] width 1680 pitch 6912 (/4 1728) >[ 1530.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e07330] >[ 1530.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e07330] width 1680 pitch 6912 (/4 1728) >[ 1530.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1530.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1530.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e07330] >[ 1530.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e07330] width 1680 pitch 6912 (/4 1728) >[ 1530.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1530.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1530.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e07330] >[ 1530.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e07330] width 1680 pitch 6912 (/4 1728) >[ 1530.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1530.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1530.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08d10] >[ 1530.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08d10] width 1680 pitch 6912 (/4 1728) >[ 1530.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1530.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1530.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1530.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1530.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1532.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f9b0] >[ 1532.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f9b0] width 1680 pitch 6912 (/4 1728) >[ 1532.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f9b0] >[ 1532.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f9b0] width 1680 pitch 6912 (/4 1728) >[ 1532.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f9b0] >[ 1532.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f9b0] width 1680 pitch 6912 (/4 1728) >[ 1532.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f9b0] >[ 1532.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f9b0] width 1680 pitch 6912 (/4 1728) >[ 1532.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f9b0] >[ 1532.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f9b0] width 1680 pitch 6912 (/4 1728) >[ 1532.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f900] >[ 1532.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f900] width 1680 pitch 6912 (/4 1728) >[ 1532.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f900] >[ 1532.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f900] width 1680 pitch 6912 (/4 1728) >[ 1532.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1532.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1532.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1532.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1532.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08c70] >[ 1532.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08c70] width 1680 pitch 6912 (/4 1728) >[ 1532.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1532.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1532.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c560c0] >[ 1532.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c560c0] width 1680 pitch 6912 (/4 1728) >[ 1532.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1532.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1532.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c560c0] >[ 1532.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c560c0] width 1680 pitch 6912 (/4 1728) >[ 1532.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1532.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1532.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1533.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1533.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1533.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1533.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1533.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1533.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6b60] >[ 1533.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6b60] width 1680 pitch 6912 (/4 1728) >[ 1533.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c560c0] >[ 1533.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c560c0] width 1680 pitch 6912 (/4 1728) >[ 1535.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 1535.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 1535.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1535.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1535.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c560f0] >[ 1535.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c560f0] width 1680 pitch 6912 (/4 1728) >[ 1535.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3550] >[ 1535.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3550] width 1680 pitch 6912 (/4 1728) >[ 1535.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de71c0] >[ 1535.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de71c0] width 1680 pitch 6912 (/4 1728) >[ 1535.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3550] >[ 1535.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3550] width 1680 pitch 6912 (/4 1728) >[ 1535.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de71c0] >[ 1535.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de71c0] width 1680 pitch 6912 (/4 1728) >[ 1535.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3550] >[ 1535.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3550] width 1680 pitch 6912 (/4 1728) >[ 1535.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de71c0] >[ 1535.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de71c0] width 1680 pitch 6912 (/4 1728) >[ 1535.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3550] >[ 1535.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3550] width 1680 pitch 6912 (/4 1728) >[ 1535.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de71c0] >[ 1535.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de71c0] width 1680 pitch 6912 (/4 1728) >[ 1535.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3550] >[ 1535.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3550] width 1680 pitch 6912 (/4 1728) >[ 1535.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de35b0] >[ 1535.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de35b0] width 1680 pitch 6912 (/4 1728) >[ 1535.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c07cc0] >[ 1535.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c07cc0] width 1680 pitch 6912 (/4 1728) >[ 1535.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08ec0] >[ 1535.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08ec0] width 1680 pitch 6912 (/4 1728) >[ 1535.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08d10] >[ 1535.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08d10] width 1680 pitch 6912 (/4 1728) >[ 1546.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08d10] >[ 1546.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08d10] width 1680 pitch 6912 (/4 1728) >[ 1546.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a350] >[ 1546.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a350] width 1680 pitch 6912 (/4 1728) >[ 1546.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08d10] >[ 1546.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08d10] width 1680 pitch 6912 (/4 1728) >[ 1546.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7d960] >[ 1546.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7d960] width 1680 pitch 6912 (/4 1728) >[ 1546.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ccd4c0] >[ 1546.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ccd4c0] width 1680 pitch 6912 (/4 1728) >[ 1551.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7cae0] >[ 1551.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7cae0] width 1680 pitch 6912 (/4 1728) >[ 1551.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c08d10] >[ 1551.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c08d10] width 1680 pitch 6912 (/4 1728) >[ 1551.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7cf70] >[ 1551.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7cf70] width 1680 pitch 6912 (/4 1728) >[ 1569.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a25c60] >[ 1569.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a25c60] width 1680 pitch 6912 (/4 1728) >[ 1569.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a25c60] >[ 1569.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a25c60] width 1680 pitch 6912 (/4 1728) >[ 1587.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dff170] >[ 1587.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dff170] width 1680 pitch 6912 (/4 1728) >[ 1587.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0f990] >[ 1587.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0f990] width 1680 pitch 6912 (/4 1728) >[ 1588.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc8b0] >[ 1588.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc8b0] width 1680 pitch 6912 (/4 1728) >[ 1596.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1596.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1596.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1596.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1597.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1597.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1603.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1603.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1604.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb7a0] >[ 1604.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb7a0] width 1680 pitch 6912 (/4 1728) >[ 1604.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb7a0] >[ 1605.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb7a0] width 1680 pitch 6912 (/4 1728) >[ 1613.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b840] >[ 1613.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b840] width 1680 pitch 6912 (/4 1728) >[ 1613.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1613.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1614.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1614.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1614.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1614.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1614.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1614.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1614.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1614.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1614.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1614.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1614.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1614.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1615.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1615.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1618.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1618.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1618.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c039c0] >[ 1618.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c039c0] width 1680 pitch 6912 (/4 1728) >[ 1618.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de55c0] >[ 1618.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de55c0] width 1680 pitch 6912 (/4 1728) >[ 1631.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de2540] >[ 1631.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de2540] width 1680 pitch 6912 (/4 1728) >[ 1631.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31df260] >[ 1631.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31df260] width 1680 pitch 6912 (/4 1728) >[ 1631.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bb70] >[ 1631.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bb70] width 1680 pitch 6912 (/4 1728) >[ 1632.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b960] >[ 1632.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b960] width 1680 pitch 6912 (/4 1728) >[ 1632.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31df4c0] >[ 1632.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31df4c0] width 1680 pitch 6912 (/4 1728) >[ 1632.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de8620] >[ 1632.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de8620] width 1680 pitch 6912 (/4 1728) >[ 1632.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb730] >[ 1632.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb730] width 1680 pitch 6912 (/4 1728) >[ 1637.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2bb0] >[ 1637.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2bb0] width 1680 pitch 6912 (/4 1728) >[ 1637.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfe950] >[ 1637.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfe950] width 1680 pitch 6912 (/4 1728) >[ 1637.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bb70] >[ 1637.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bb70] width 1680 pitch 6912 (/4 1728) >[ 1652.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3b50] >[ 1652.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3b50] width 1680 pitch 6912 (/4 1728) >[ 1652.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de29c0] >[ 1652.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de29c0] width 1680 pitch 6912 (/4 1728) >[ 1652.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2bb0] >[ 1652.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2bb0] width 1680 pitch 6912 (/4 1728) >[ 1652.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3b50] >[ 1652.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3b50] width 1680 pitch 6912 (/4 1728) >[ 1652.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2bb0] >[ 1652.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2bb0] width 1680 pitch 6912 (/4 1728) >[ 1656.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c552e0] >[ 1656.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c552e0] width 1680 pitch 6912 (/4 1728) >[ 1656.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c552e0] >[ 1656.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c552e0] width 1680 pitch 6912 (/4 1728) >[ 1671.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2bb0] >[ 1671.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2bb0] width 1680 pitch 6912 (/4 1728) >[ 1671.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e06580] >[ 1671.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e06580] width 1680 pitch 6912 (/4 1728) >[ 1671.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a530] >[ 1671.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a530] width 1680 pitch 6912 (/4 1728) >[ 1671.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb780] >[ 1671.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb780] width 1680 pitch 6912 (/4 1728) >[ 1672.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6b1d0] >[ 1672.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6b1d0] width 1680 pitch 6912 (/4 1728) >[ 1672.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15da0] >[ 1672.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15da0] width 1680 pitch 6912 (/4 1728) >[ 1672.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3151840] >[ 1672.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3151840] width 1680 pitch 6912 (/4 1728) >[ 1672.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf5d00] >[ 1672.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf5d00] width 1680 pitch 6912 (/4 1728) >[ 1672.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7cf90] >[ 1672.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7cf90] width 1680 pitch 6912 (/4 1728) >[ 1672.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e06580] >[ 1672.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e06580] width 1680 pitch 6912 (/4 1728) >[ 1672.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c7cf90] >[ 1672.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c7cf90] width 1680 pitch 6912 (/4 1728) >[ 1673.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e06580] >[ 1673.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e06580] width 1680 pitch 6912 (/4 1728) >[ 1673.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59b10] >[ 1673.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59b10] width 1680 pitch 6912 (/4 1728) >[ 1673.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59b10] >[ 1673.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59b10] width 1680 pitch 6912 (/4 1728) >[ 1709.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19f2bb0] >[ 1709.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19f2bb0] width 1680 pitch 6912 (/4 1728) >[ 1709.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59b10] >[ 1709.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59b10] width 1680 pitch 6912 (/4 1728) >[ 1712.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c56180] >[ 1712.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c56180] width 1680 pitch 6912 (/4 1728) >[ 1713.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb4b0] >[ 1713.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb4b0] width 1680 pitch 6912 (/4 1728) >[ 1713.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c097a0] >[ 1713.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c097a0] width 1680 pitch 6912 (/4 1728) >[ 1743.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c11040] >[ 1743.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c11040] width 1680 pitch 6912 (/4 1728) >[ 1743.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c090f0] >[ 1743.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c090f0] width 1680 pitch 6912 (/4 1728) >[ 1743.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c11040] >[ 1743.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c11040] width 1680 pitch 6912 (/4 1728) >[ 1743.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c090f0] >[ 1743.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c090f0] width 1680 pitch 6912 (/4 1728) >[ 1743.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c11040] >[ 1743.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c11040] width 1680 pitch 6912 (/4 1728) >[ 1744.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e06580] >[ 1744.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e06580] width 1680 pitch 6912 (/4 1728) >[ 1744.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c561a0] >[ 1744.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c561a0] width 1680 pitch 6912 (/4 1728) >[ 1752.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c561a0] >[ 1752.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c561a0] width 1680 pitch 6912 (/4 1728) >[ 1752.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c11040] >[ 1752.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c11040] width 1680 pitch 6912 (/4 1728) >[ 1753.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c11040] >[ 1753.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c11040] width 1680 pitch 6912 (/4 1728) >[ 1754.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9ca0] >[ 1754.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9ca0] width 1680 pitch 6912 (/4 1728) >[ 1755.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9ca0] >[ 1755.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9ca0] width 1680 pitch 6912 (/4 1728) >[ 1755.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bbd0] >[ 1755.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bbd0] width 1680 pitch 6912 (/4 1728) >[ 1755.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0b900] >[ 1755.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0b900] width 1680 pitch 6912 (/4 1728) >[ 1755.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd9ca0] >[ 1755.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd9ca0] width 1680 pitch 6912 (/4 1728) >[ 1756.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e06580] >[ 1756.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e06580] width 1680 pitch 6912 (/4 1728) >[ 1756.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ceb4b0] >[ 1756.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ceb4b0] width 1680 pitch 6912 (/4 1728) >[ 1777.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de4d90] >[ 1777.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de4d90] width 1680 pitch 6912 (/4 1728) >[ 1777.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0e560] >[ 1777.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0e560] width 1680 pitch 6912 (/4 1728) >[ 1778.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c51470] >[ 1778.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c51470] width 1680 pitch 6912 (/4 1728) >[ 1778.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0e560] >[ 1778.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0e560] width 1680 pitch 6912 (/4 1728) >[ 1778.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb520] >[ 1778.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb520] width 1680 pitch 6912 (/4 1728) >[ 1778.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c51470] >[ 1778.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c51470] width 1680 pitch 6912 (/4 1728) >[ 1778.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1deb520] >[ 1778.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1deb520] width 1680 pitch 6912 (/4 1728) >[ 1778.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bbd0] >[ 1778.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bbd0] width 1680 pitch 6912 (/4 1728) >[ 1780.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c51470] >[ 1780.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c51470] width 1680 pitch 6912 (/4 1728) >[ 1780.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bbd0] >[ 1780.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bbd0] width 1680 pitch 6912 (/4 1728) >[ 1780.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c51470] >[ 1780.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c51470] width 1680 pitch 6912 (/4 1728) >[ 1780.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bbd0] >[ 1780.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bbd0] width 1680 pitch 6912 (/4 1728) >[ 1782.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c51470] >[ 1782.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c51470] width 1680 pitch 6912 (/4 1728) >[ 1782.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd7150] >[ 1782.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd7150] width 1680 pitch 6912 (/4 1728) >[ 1797.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15340] >[ 1797.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15340] width 1680 pitch 6912 (/4 1728) >[ 1797.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc8e0] >[ 1797.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc8e0] width 1680 pitch 6912 (/4 1728) >[ 1797.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc8e0] >[ 1797.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc8e0] width 1680 pitch 6912 (/4 1728) >[ 1800.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bbd0] >[ 1800.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bbd0] width 1680 pitch 6912 (/4 1728) >[ 1801.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3890] >[ 1801.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3890] width 1680 pitch 6912 (/4 1728) >[ 1801.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3890] >[ 1801.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3890] width 1680 pitch 6912 (/4 1728) >[ 1813.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bb30] >[ 1813.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bb30] width 1680 pitch 6912 (/4 1728) >[ 1813.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c460e0] >[ 1813.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c460e0] width 1680 pitch 6912 (/4 1728) >[ 1813.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6bb30] >[ 1813.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6bb30] width 1680 pitch 6912 (/4 1728) >[ 1813.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59800] >[ 1813.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59800] width 1680 pitch 6912 (/4 1728) >[ 1813.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c093f0] >[ 1813.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c093f0] width 1680 pitch 6912 (/4 1728) >[ 1829.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65a80] >[ 1829.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65a80] width 1680 pitch 6912 (/4 1728) >[ 1829.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c09770] >[ 1829.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c09770] width 1680 pitch 6912 (/4 1728) >[ 1830.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c09770] >[ 1830.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c09770] width 1680 pitch 6912 (/4 1728) >[ 1855.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a23b50] >[ 1855.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a23b50] width 1680 pitch 6912 (/4 1728) >[ 1855.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65a80] >[ 1855.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65a80] width 1680 pitch 6912 (/4 1728) >[ 1856.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de8540] >[ 1856.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de8540] width 1680 pitch 6912 (/4 1728) >[ 1858.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a050a0] >[ 1858.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a050a0] width 1680 pitch 6912 (/4 1728) >[ 1858.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de8540] >[ 1858.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de8540] width 1680 pitch 6912 (/4 1728) >[ 1859.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb930] >[ 1859.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb930] width 1680 pitch 6912 (/4 1728) >[ 1889.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c72310] >[ 1889.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c72310] width 1680 pitch 6912 (/4 1728) >[ 1889.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c16c20] >[ 1889.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c16c20] width 1680 pitch 6912 (/4 1728) >[ 1889.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5d2d0] >[ 1889.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5d2d0] width 1680 pitch 6912 (/4 1728) >[ 1902.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c72310] >[ 1902.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c72310] width 1680 pitch 6912 (/4 1728) >[ 1902.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0e470] >[ 1902.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0e470] width 1680 pitch 6912 (/4 1728) >[ 1902.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0e470] >[ 1902.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0e470] width 1680 pitch 6912 (/4 1728) >[ 1925.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9400] >[ 1925.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9400] width 1680 pitch 6912 (/4 1728) >[ 1925.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9400] >[ 1925.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9400] width 1680 pitch 6912 (/4 1728) >[ 1925.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9400] >[ 1925.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9400] width 1680 pitch 6912 (/4 1728) >[ 1925.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9400] >[ 1925.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9400] width 1680 pitch 6912 (/4 1728) >[ 1925.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9400] >[ 1925.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9400] width 1680 pitch 6912 (/4 1728) >[ 1925.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9400] >[ 1925.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9400] width 1680 pitch 6912 (/4 1728) >[ 1925.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6050] >[ 1925.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6050] width 1680 pitch 6912 (/4 1728) >[ 1925.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1925.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1925.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de6210] >[ 1925.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de6210] width 1680 pitch 6912 (/4 1728) >[ 1926.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e09890] >[ 1926.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e09890] width 1680 pitch 6912 (/4 1728) >[ 1926.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8bb0] >[ 1926.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8bb0] width 1680 pitch 6912 (/4 1728) >[ 1926.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e09890] >[ 1926.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e09890] width 1680 pitch 6912 (/4 1728) >[ 1926.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8bb0] >[ 1926.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8bb0] width 1680 pitch 6912 (/4 1728) >[ 1926.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8c10] >[ 1926.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8c10] width 1680 pitch 6912 (/4 1728) >[ 1926.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de5bb0] >[ 1926.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de5bb0] width 1680 pitch 6912 (/4 1728) >[ 1926.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8bb0] >[ 1926.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8bb0] width 1680 pitch 6912 (/4 1728) >[ 1926.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de5bb0] >[ 1926.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de5bb0] width 1680 pitch 6912 (/4 1728) >[ 1926.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c52ce0] >[ 1926.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c52ce0] width 1680 pitch 6912 (/4 1728) >[ 1926.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ceb590] >[ 1926.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ceb590] width 1680 pitch 6912 (/4 1728) >[ 1926.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e03f10] >[ 1926.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e03f10] width 1680 pitch 6912 (/4 1728) >[ 1926.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ceb590] >[ 1926.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ceb590] width 1680 pitch 6912 (/4 1728) >[ 1926.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e03f10] >[ 1926.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e03f10] width 1680 pitch 6912 (/4 1728) >[ 1926.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ceb590] >[ 1926.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ceb590] width 1680 pitch 6912 (/4 1728) >[ 1926.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e03f10] >[ 1926.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e03f10] width 1680 pitch 6912 (/4 1728) >[ 1927.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1927.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1927.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1927.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1927.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1929.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1929.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1929.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1929.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1929.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1929.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1929.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1929.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1929.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1929.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1929.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1929.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1929.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1929.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1929.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167e40] >[ 1930.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167e40] width 1680 pitch 6912 (/4 1728) >[ 1930.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1930.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1930.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167e40] >[ 1930.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167e40] width 1680 pitch 6912 (/4 1728) >[ 1930.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1930.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1930.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167e40] >[ 1930.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167e40] width 1680 pitch 6912 (/4 1728) >[ 1930.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1930.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1930.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167e40] >[ 1930.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167e40] width 1680 pitch 6912 (/4 1728) >[ 1930.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1930.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1930.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1930.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1930.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd8f30] >[ 1930.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd8f30] width 1680 pitch 6912 (/4 1728) >[ 1930.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31612d0] >[ 1930.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31612d0] width 1680 pitch 6912 (/4 1728) >[ 1933.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190] >[ 1933.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1680 pitch 6912 (/4 1728) >[ 1933.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c16810] >[ 1933.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c16810] width 1680 pitch 6912 (/4 1728) >[ 1933.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e09890] >[ 1933.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e09890] width 1680 pitch 6912 (/4 1728) >[ 1952.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1952.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1952.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1d9e0] >[ 1952.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1d9e0] width 1680 pitch 6912 (/4 1728) >[ 1952.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1953.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1953.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1953.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1961.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1961.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1961.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9380] >[ 1961.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9380] width 1680 pitch 6912 (/4 1728) >[ 1961.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1961.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1961.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9380] >[ 1961.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9380] width 1680 pitch 6912 (/4 1728) >[ 1962.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1962.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1963.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 1963.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 1963.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198fb0] >[ 1963.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198fb0] width 1680 pitch 6912 (/4 1728) >[ 1980.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198fb0] >[ 1980.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198fb0] width 1680 pitch 6912 (/4 1728) >[ 1980.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c59b90] >[ 1980.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c59b90] width 1680 pitch 6912 (/4 1728) >[ 1981.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198fb0] >[ 1981.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198fb0] width 1680 pitch 6912 (/4 1728) >[ 2079.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a800] >[ 2079.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a800] width 1680 pitch 6912 (/4 1728) >[ 2079.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a800] >[ 2079.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a800] width 1680 pitch 6912 (/4 1728) >[ 2079.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a800] >[ 2079.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a800] width 1680 pitch 6912 (/4 1728) >[ 2079.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a800] >[ 2079.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a800] width 1680 pitch 6912 (/4 1728) >[ 2079.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a800] >[ 2079.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a800] width 1680 pitch 6912 (/4 1728) >[ 2079.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a800] >[ 2079.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a800] width 1680 pitch 6912 (/4 1728) >[ 2079.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6740] >[ 2079.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6740] width 1680 pitch 6912 (/4 1728) >[ 2079.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2079.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2079.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca6740] >[ 2079.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca6740] width 1680 pitch 6912 (/4 1728) >[ 2079.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2080.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2080.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2080.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2080.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2080.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c23490] >[ 2080.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c23490] width 1680 pitch 6912 (/4 1728) >[ 2080.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2080.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d270] >[ 2080.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d270] width 1680 pitch 6912 (/4 1728) >[ 2080.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c15500] >[ 2080.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c15500] width 1680 pitch 6912 (/4 1728) >[ 2088.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c07cc0] >[ 2088.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c07cc0] width 1680 pitch 6912 (/4 1728) >[ 2088.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c16300] >[ 2088.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c16300] width 1680 pitch 6912 (/4 1728) >[ 2088.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c07cc0] >[ 2088.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c07cc0] width 1680 pitch 6912 (/4 1728) >[ 2088.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c18990] >[ 2088.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c18990] width 1680 pitch 6912 (/4 1728) >[ 2088.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c24b70] >[ 2088.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c24b70] width 1680 pitch 6912 (/4 1728) >[ 2088.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddb790] >[ 2088.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddb790] width 1680 pitch 6912 (/4 1728) >[ 2089.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c56040] >[ 2089.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c56040] width 1680 pitch 6912 (/4 1728) >[ 2089.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c10c20] >[ 2089.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c10c20] width 1680 pitch 6912 (/4 1728) >[ 2089.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c10c20] >[ 2089.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c10c20] width 1680 pitch 6912 (/4 1728) >[ 2118.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1b310] >[ 2119.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1b310] width 1680 pitch 6912 (/4 1728) >[ 2119.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 2119.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 2119.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de7070] >[ 2119.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de7070] width 1680 pitch 6912 (/4 1728) >[ 2119.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1b310] >[ 2119.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1b310] width 1680 pitch 6912 (/4 1728) >[ 2119.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1ccb0] >[ 2119.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1ccb0] width 1680 pitch 6912 (/4 1728) >[ 2120.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de7070] >[ 2120.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de7070] width 1680 pitch 6912 (/4 1728) >[ 2120.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1ccb0] >[ 2120.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1ccb0] width 1680 pitch 6912 (/4 1728) >[ 2120.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1ccb0] >[ 2120.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1ccb0] width 1680 pitch 6912 (/4 1728) >[ 2120.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ddadf0] >[ 2120.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ddadf0] width 1680 pitch 6912 (/4 1728) >[ 2131.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 2131.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 2131.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de7070] >[ 2131.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de7070] width 1680 pitch 6912 (/4 1728) >[ 2132.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 2132.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 2132.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31981b0] >[ 2132.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31981b0] width 1680 pitch 6912 (/4 1728) >[ 2132.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c0a580] >[ 2132.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c0a580] width 1680 pitch 6912 (/4 1728) >[ 2132.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31981b0] >[ 2132.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31981b0] width 1680 pitch 6912 (/4 1728) >[ 2132.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9b950] >[ 2132.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9b950] width 1680 pitch 6912 (/4 1728) >[ 2133.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 2133.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 2133.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de80e0] >[ 2133.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de80e0] width 1680 pitch 6912 (/4 1728) >[ 2133.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c07d10] >[ 2133.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c07d10] width 1680 pitch 6912 (/4 1728) >[ 2198.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c2cc30] >[ 2198.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c2cc30] width 1680 pitch 6912 (/4 1728) >[ 2198.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c674b0] >[ 2198.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c674b0] width 1680 pitch 6912 (/4 1728) >[ 2198.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c674b0] >[ 2198.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c674b0] width 1680 pitch 6912 (/4 1728) >[ 2221.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c30af0] >[ 2221.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c30af0] width 1680 pitch 6912 (/4 1728) >[ 2221.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c16390] >[ 2221.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c16390] width 1680 pitch 6912 (/4 1728) >[ 2221.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3153820] >[ 2221.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3153820] width 1680 pitch 6912 (/4 1728) >[ 2241.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bfba00] >[ 2241.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bfba00] width 1680 pitch 6912 (/4 1728) >[ 2241.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2241.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2241.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bfba00] >[ 2241.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bfba00] width 1680 pitch 6912 (/4 1728) >[ 2243.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c2cc30] >[ 2243.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c2cc30] width 1680 pitch 6912 (/4 1728) >[ 2243.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c2cc30] >[ 2243.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c2cc30] width 1680 pitch 6912 (/4 1728) >[ 2258.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3153660] >[ 2258.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3153660] width 1680 pitch 6912 (/4 1728) >[ 2258.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2258.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2259.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c25650] >[ 2259.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c25650] width 1680 pitch 6912 (/4 1728) >[ 2259.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c2b6c0] >[ 2259.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c2b6c0] width 1680 pitch 6912 (/4 1728) >[ 2259.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1f7d0] >[ 2259.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1f7d0] width 1680 pitch 6912 (/4 1728) >[ 2259.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2259.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2261.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3153660] >[ 2261.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3153660] width 1680 pitch 6912 (/4 1728) >[ 2261.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3153660] >[ 2261.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3153660] width 1680 pitch 6912 (/4 1728) >[ 2267.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31b00] >[ 2267.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31b00] width 1680 pitch 6912 (/4 1728) >[ 2268.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31b00] >[ 2268.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31b00] width 1680 pitch 6912 (/4 1728) >[ 2268.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2268.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2268.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31b00] >[ 2268.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31b00] width 1680 pitch 6912 (/4 1728) >[ 2268.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2268.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2269.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c331d0] >[ 2269.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c331d0] width 1680 pitch 6912 (/4 1728) >[ 2269.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c32e80] >[ 2269.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c32e80] width 1680 pitch 6912 (/4 1728) >[ 2277.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c331d0] >[ 2277.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c331d0] width 1680 pitch 6912 (/4 1728) >[ 2277.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2277.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2278.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2278.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2278.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c311f0] >[ 2278.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c311f0] width 1680 pitch 6912 (/4 1728) >[ 2278.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31b00] >[ 2278.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31b00] width 1680 pitch 6912 (/4 1728) >[ 2278.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c311f0] >[ 2278.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c311f0] width 1680 pitch 6912 (/4 1728) >[ 2279.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3153660] >[ 2279.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3153660] width 1680 pitch 6912 (/4 1728) >[ 2279.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c319f0] >[ 2279.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c319f0] width 1680 pitch 6912 (/4 1728) >[ 2296.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3153660] >[ 2296.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3153660] width 1680 pitch 6912 (/4 1728) >[ 2296.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4f320] >[ 2296.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4f320] width 1680 pitch 6912 (/4 1728) >[ 2297.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31537c0] >[ 2297.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31537c0] width 1680 pitch 6912 (/4 1728) >[ 2297.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31b00] >[ 2297.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31b00] width 1680 pitch 6912 (/4 1728) >[ 2298.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31537c0] >[ 2298.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31537c0] width 1680 pitch 6912 (/4 1728) >[ 2298.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31b00] >[ 2298.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31b00] width 1680 pitch 6912 (/4 1728) >[ 2298.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161c60] >[ 2298.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161c60] width 1680 pitch 6912 (/4 1728) >[ 2299.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c331d0] >[ 2299.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c331d0] width 1680 pitch 6912 (/4 1728) >[ 2532.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8c180] >[ 2532.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8c180] width 1680 pitch 6912 (/4 1728) >[ 2532.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de76a0] >[ 2532.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de76a0] width 1680 pitch 6912 (/4 1728) >[ 2532.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6b740] >[ 2532.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6b740] width 1680 pitch 6912 (/4 1728) >[ 2565.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3175f50] >[ 2565.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3175f50] width 1680 pitch 6912 (/4 1728) >[ 2569.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171fe0] >[ 2569.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171fe0] width 1680 pitch 6912 (/4 1728) >[ 2569.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bf9260] >[ 2569.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bf9260] width 1680 pitch 6912 (/4 1728) >[ 2569.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31704f0] >[ 2569.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31704f0] width 1680 pitch 6912 (/4 1728) >[ 2570.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c30dc0] >[ 2570.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c30dc0] width 1680 pitch 6912 (/4 1728) >[ 2570.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31704f0] >[ 2570.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31704f0] width 1680 pitch 6912 (/4 1728) >[ 2570.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f100] >[ 2570.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f100] width 1680 pitch 6912 (/4 1728) >[ 2612.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1caf8f0] >[ 2612.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1caf8f0] width 1680 pitch 6912 (/4 1728) >[ 2612.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3176410] >[ 2612.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3176410] width 1680 pitch 6912 (/4 1728) >[ 2612.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1caf8f0] >[ 2612.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1caf8f0] width 1680 pitch 6912 (/4 1728) >[ 2612.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3176410] >[ 2612.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3176410] width 1680 pitch 6912 (/4 1728) >[ 2612.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1caf8f0] >[ 2612.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1caf8f0] width 1680 pitch 6912 (/4 1728) >[ 2613.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de5330] >[ 2613.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de5330] width 1680 pitch 6912 (/4 1728) >[ 2639.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3181390] >[ 2639.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3181390] width 1680 pitch 6912 (/4 1728) >[ 2649.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81260] >[ 2649.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81260] width 1680 pitch 6912 (/4 1728) >[ 2649.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81260] >[ 2649.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81260] width 1680 pitch 6912 (/4 1728) >[ 2649.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81260] >[ 2649.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81260] width 1680 pitch 6912 (/4 1728) >[ 2649.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81260] >[ 2649.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81260] width 1680 pitch 6912 (/4 1728) >[ 2649.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81260] >[ 2649.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81260] width 1680 pitch 6912 (/4 1728) >[ 2649.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81260] >[ 2649.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81260] width 1680 pitch 6912 (/4 1728) >[ 2649.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2649.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81d00] >[ 2649.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81d00] width 1680 pitch 6912 (/4 1728) >[ 2649.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84b10] >[ 2649.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84b10] width 1680 pitch 6912 (/4 1728) >[ 2651.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2651.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d817b0] >[ 2651.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d817b0] width 1680 pitch 6912 (/4 1728) >[ 2651.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2651.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d817b0] >[ 2651.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d817b0] width 1680 pitch 6912 (/4 1728) >[ 2651.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2651.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d817b0] >[ 2651.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d817b0] width 1680 pitch 6912 (/4 1728) >[ 2651.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2651.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d817b0] >[ 2651.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d817b0] width 1680 pitch 6912 (/4 1728) >[ 2651.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2651.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d817b0] >[ 2651.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d817b0] width 1680 pitch 6912 (/4 1728) >[ 2651.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2651.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d817b0] >[ 2651.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d817b0] width 1680 pitch 6912 (/4 1728) >[ 2651.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1e910] >[ 2651.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1e910] width 1680 pitch 6912 (/4 1728) >[ 2657.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c30890] >[ 2657.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c30890] width 1680 pitch 6912 (/4 1728) >[ 2658.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d83510] >[ 2658.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d83510] width 1680 pitch 6912 (/4 1728) >[ 2658.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c30890] >[ 2658.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c30890] width 1680 pitch 6912 (/4 1728) >[ 2658.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387f460] >[ 2658.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387f460] width 1680 pitch 6912 (/4 1728) >[ 2658.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387f460] >[ 2658.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387f460] width 1680 pitch 6912 (/4 1728) >[ 2714.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a15ba0] >[ 2714.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a15ba0] width 1680 pitch 6912 (/4 1728) >[ 2720.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387ac70] >[ 2720.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387ac70] width 1680 pitch 6912 (/4 1728) >[ 2723.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c13780] >[ 2723.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c13780] width 1680 pitch 6912 (/4 1728) >[ 2723.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a0d240] >[ 2723.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a0d240] width 1680 pitch 6912 (/4 1728) >[ 2723.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3199720] >[ 2723.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3199720] width 1680 pitch 6912 (/4 1728) >[ 2723.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31850a0] >[ 2723.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31850a0] width 1680 pitch 6912 (/4 1728) >[ 2737.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386f6e0] >[ 2737.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386f6e0] width 1680 pitch 6912 (/4 1728) >[ 2746.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c211e0] >[ 2746.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c211e0] width 1680 pitch 6912 (/4 1728) >[ 2747.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9d410] >[ 2747.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9d410] width 1680 pitch 6912 (/4 1728) >[ 2806.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3175cb0] >[ 2806.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3175cb0] width 1680 pitch 6912 (/4 1728) >[ 2825.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3190580] >[ 2825.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3190580] width 1680 pitch 6912 (/4 1728) >[ 2825.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386f5d0] >[ 2825.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386f5d0] width 1680 pitch 6912 (/4 1728) >[ 2825.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386f420] >[ 2825.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386f420] width 1680 pitch 6912 (/4 1728) >[ 2831.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3175460] >[ 2831.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3175460] width 1680 pitch 6912 (/4 1728) >[ 2842.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3863580] >[ 2842.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3863580] width 1680 pitch 6912 (/4 1728) >[ 2859.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318ede0] >[ 2859.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318ede0] width 1680 pitch 6912 (/4 1728) >[ 2859.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387ac00] >[ 2859.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387ac00] width 1680 pitch 6912 (/4 1728) >[ 2860.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8b410] >[ 2860.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8b410] width 1680 pitch 6912 (/4 1728) >[ 2860.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa3c40] >[ 2860.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa3c40] width 1680 pitch 6912 (/4 1728) >[ 2860.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318ecc0] >[ 2860.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318ecc0] width 1680 pitch 6912 (/4 1728) >[ 2864.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388bbf0] >[ 2864.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388bbf0] width 1680 pitch 6912 (/4 1728) >[ 2891.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316aec0] >[ 2891.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316aec0] width 1680 pitch 6912 (/4 1728) >[ 2891.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3863510] >[ 2891.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3863510] width 1680 pitch 6912 (/4 1728) >[ 2891.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163d00] >[ 2891.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163d00] width 1680 pitch 6912 (/4 1728) >[ 2891.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3887130] >[ 2891.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3887130] width 1680 pitch 6912 (/4 1728) >[ 2895.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387df20] >[ 2895.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387df20] width 1680 pitch 6912 (/4 1728) >[ 2895.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3876620] >[ 2895.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3876620] width 1680 pitch 6912 (/4 1728) >[ 2895.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3889230] >[ 2895.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3889230] width 1680 pitch 6912 (/4 1728) >[ 2895.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3876620] >[ 2895.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3876620] width 1680 pitch 6912 (/4 1728) >[ 2899.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3876620] >[ 2899.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3876620] width 1680 pitch 6912 (/4 1728) >[ 2900.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e03850] >[ 2900.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e03850] width 1680 pitch 6912 (/4 1728) >[ 2900.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d82af0] >[ 2900.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d82af0] width 1680 pitch 6912 (/4 1728) >[ 2904.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3869680] >[ 2904.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3869680] width 1680 pitch 6912 (/4 1728) >[ 2919.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868be0] >[ 2919.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868be0] width 1680 pitch 6912 (/4 1728) >[ 2919.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163ff0] >[ 2919.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163ff0] width 1680 pitch 6912 (/4 1728) >[ 2919.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868be0] >[ 2919.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868be0] width 1680 pitch 6912 (/4 1728) >[ 2920.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163ff0] >[ 2920.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163ff0] width 1680 pitch 6912 (/4 1728) >[ 2920.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c213e0] >[ 2920.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c213e0] width 1680 pitch 6912 (/4 1728) >[ 2920.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3868be0] >[ 2920.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3868be0] width 1680 pitch 6912 (/4 1728) >[ 2920.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163ff0] >[ 2920.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163ff0] width 1680 pitch 6912 (/4 1728) >[ 2920.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3190ce0] >[ 2920.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3190ce0] width 1680 pitch 6912 (/4 1728) >[ 2920.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8a710] >[ 2920.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8a710] width 1680 pitch 6912 (/4 1728) >[ 2924.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3872600] >[ 2924.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3872600] width 1680 pitch 6912 (/4 1728) >[ 2924.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38726d0] >[ 2924.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38726d0] width 1680 pitch 6912 (/4 1728) >[ 2924.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7a960] >[ 2924.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7a960] width 1680 pitch 6912 (/4 1728) >[ 2925.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318ec10] >[ 2925.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318ec10] width 1680 pitch 6912 (/4 1728) >[ 2937.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3197db0] >[ 2937.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3197db0] width 1680 pitch 6912 (/4 1728) >[ 2957.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163ff0] >[ 2957.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163ff0] width 1680 pitch 6912 (/4 1728) >[ 2957.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca2e30] >[ 2957.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca2e30] width 1680 pitch 6912 (/4 1728) >[ 2957.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cab600] >[ 2957.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cab600] width 1680 pitch 6912 (/4 1728) >[ 2957.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163ff0] >[ 2957.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163ff0] width 1680 pitch 6912 (/4 1728) >[ 2961.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c63eb0] >[ 2961.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c63eb0] width 1680 pitch 6912 (/4 1728) >[ 2961.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df9e60] >[ 2961.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df9e60] width 1680 pitch 6912 (/4 1728) >[ 2962.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df9e60] >[ 2962.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df9e60] width 1680 pitch 6912 (/4 1728) >[ 2993.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1df9e60] >[ 2993.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1df9e60] width 1680 pitch 6912 (/4 1728) >[ 2995.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3889300] >[ 2995.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3889300] width 1680 pitch 6912 (/4 1728) >[ 2995.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3889300] >[ 2995.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3889300] width 1680 pitch 6912 (/4 1728) >[ 3000.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3867980] >[ 3000.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3867980] width 1680 pitch 6912 (/4 1728) >[ 3024.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3889020] >[ 3024.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3889020] width 1680 pitch 6912 (/4 1728) >[ 3025.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e5d8d0] >[ 3025.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e5d8d0] width 1680 pitch 6912 (/4 1728) >[ 3025.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e5d8d0] >[ 3025.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e5d8d0] width 1680 pitch 6912 (/4 1728) >[ 3039.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce3af0] >[ 3039.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce3af0] width 1680 pitch 6912 (/4 1728) >[ 3039.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cdf5c0] >[ 3040.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cdf5c0] width 1680 pitch 6912 (/4 1728) >[ 3041.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce3af0] >[ 3041.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce3af0] width 1680 pitch 6912 (/4 1728) >[ 3041.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce3af0] >[ 3041.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce3af0] width 1680 pitch 6912 (/4 1728) >[ 3041.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce3af0] >[ 3041.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce3af0] width 1680 pitch 6912 (/4 1728) >[ 3046.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31882f0] >[ 3046.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31882f0] width 1680 pitch 6912 (/4 1728) >[ 3058.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce48b0] >[ 3058.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce48b0] width 1680 pitch 6912 (/4 1728) >[ 3060.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca2d90] >[ 3060.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca2d90] width 1680 pitch 6912 (/4 1728) >[ 3060.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3193ed0] >[ 3060.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3193ed0] width 1680 pitch 6912 (/4 1728) >[ 3061.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3660] >[ 3061.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3660] width 1680 pitch 6912 (/4 1728) >[ 3061.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3159be0] >[ 3062.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3159be0] width 1680 pitch 6912 (/4 1728) >[ 3069.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38653c0] >[ 3069.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38653c0] width 1680 pitch 6912 (/4 1728) >[ 3069.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce4950] >[ 3069.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce4950] width 1680 pitch 6912 (/4 1728) >[ 3070.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3193b70] >[ 3070.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3193b70] width 1680 pitch 6912 (/4 1728) >[ 3070.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31878b0] >[ 3070.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31878b0] width 1680 pitch 6912 (/4 1728) >[ 3072.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce5010] >[ 3072.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce5010] width 1680 pitch 6912 (/4 1728) >[ 3072.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce5010] >[ 3072.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce5010] width 1680 pitch 6912 (/4 1728) >[ 3082.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31878b0] >[ 3082.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31878b0] width 1680 pitch 6912 (/4 1728) >[ 3082.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318dc40] >[ 3082.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318dc40] width 1680 pitch 6912 (/4 1728) >[ 3083.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce5840] >[ 3083.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce5840] width 1680 pitch 6912 (/4 1728) >[ 3083.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3193410] >[ 3083.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3193410] width 1680 pitch 6912 (/4 1728) >[ 3085.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8a3a0] >[ 3085.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8a3a0] width 1680 pitch 6912 (/4 1728) >[ 3086.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862b60] >[ 3086.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862b60] width 1680 pitch 6912 (/4 1728) >[ 3094.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168af0] >[ 3094.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168af0] width 1680 pitch 6912 (/4 1728) >[ 3094.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce3af0] >[ 3094.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce3af0] width 1680 pitch 6912 (/4 1728) >[ 3094.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168af0] >[ 3094.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168af0] width 1680 pitch 6912 (/4 1728) >[ 3094.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce3af0] >[ 3094.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce3af0] width 1680 pitch 6912 (/4 1728) >[ 3099.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3888230] >[ 3099.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3888230] width 1680 pitch 6912 (/4 1728) >[ 3099.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c13570] >[ 3099.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c13570] width 1680 pitch 6912 (/4 1728) >[ 3099.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31879c0] >[ 3099.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31879c0] width 1680 pitch 6912 (/4 1728) >[ 3099.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38653c0] >[ 3099.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38653c0] width 1680 pitch 6912 (/4 1728) >[ 3099.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c13570] >[ 3099.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c13570] width 1680 pitch 6912 (/4 1728) >[ 3100.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31879c0] >[ 3100.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31879c0] width 1680 pitch 6912 (/4 1728) >[ 3100.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c13570] >[ 3100.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c13570] width 1680 pitch 6912 (/4 1728) >[ 3100.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3888230] >[ 3100.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3888230] width 1680 pitch 6912 (/4 1728) >[ 3100.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c13570] >[ 3100.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c13570] width 1680 pitch 6912 (/4 1728) >[ 3101.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3060] >[ 3101.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3060] width 1680 pitch 6912 (/4 1728) >[ 3101.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3060] >[ 3101.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3060] width 1680 pitch 6912 (/4 1728) >[ 3137.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce5010] >[ 3137.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce5010] width 1680 pitch 6912 (/4 1728) >[ 3137.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3871a40] >[ 3137.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3871a40] width 1680 pitch 6912 (/4 1728) >[ 3138.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3871a40] >[ 3138.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3871a40] width 1680 pitch 6912 (/4 1728) >[ 3138.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3890840] >[ 3138.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3890840] width 1680 pitch 6912 (/4 1728) >[ 3138.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3e60] >[ 3138.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3e60] width 1680 pitch 6912 (/4 1728) >[ 3138.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c2ca10] >[ 3138.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c2ca10] width 1680 pitch 6912 (/4 1728) >[ 3143.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38942e0] >[ 3143.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38942e0] width 1680 pitch 6912 (/4 1728) >[ 3161.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d83990] >[ 3161.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d83990] width 1680 pitch 6912 (/4 1728) >[ 3161.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38658c0] >[ 3161.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38658c0] width 1680 pitch 6912 (/4 1728) >[ 3161.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3182ce0] >[ 3161.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3182ce0] width 1680 pitch 6912 (/4 1728) >[ 3163.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d839f0] >[ 3163.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d839f0] width 1680 pitch 6912 (/4 1728) >[ 3163.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d87680] >[ 3163.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d87680] width 1680 pitch 6912 (/4 1728) >[ 3163.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e5e860] >[ 3163.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e5e860] width 1680 pitch 6912 (/4 1728) >[ 3164.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38658c0] >[ 3164.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38658c0] width 1680 pitch 6912 (/4 1728) >[ 3205.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3560] >[ 3205.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3560] width 1680 pitch 6912 (/4 1728) >[ 3217.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cab040] >[ 3217.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cab040] width 1680 pitch 6912 (/4 1728) >[ 3218.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cab040] >[ 3218.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cab040] width 1680 pitch 6912 (/4 1728) >[ 3218.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3560] >[ 3218.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3560] width 1680 pitch 6912 (/4 1728) >[ 3219.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3560] >[ 3219.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3560] width 1680 pitch 6912 (/4 1728) >[ 3219.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cab040] >[ 3219.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cab040] width 1680 pitch 6912 (/4 1728) >[ 3219.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd3560] >[ 3219.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd3560] width 1680 pitch 6912 (/4 1728) >[ 3219.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cab040] >[ 3219.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cab040] width 1680 pitch 6912 (/4 1728) >[ 3219.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388aea0] >[ 3219.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388aea0] width 1680 pitch 6912 (/4 1728) >[ 3220.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38658c0] >[ 3220.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38658c0] width 1680 pitch 6912 (/4 1728) >[ 3222.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cab040] >[ 3222.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cab040] width 1680 pitch 6912 (/4 1728) >[ 3231.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c17690] >[ 3231.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c17690] width 1680 pitch 6912 (/4 1728) >[ 3231.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x317e160] >[ 3231.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x317e160] width 1680 pitch 6912 (/4 1728) >[ 3232.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x317e270] >[ 3232.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x317e270] width 1680 pitch 6912 (/4 1728) >[ 3232.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x317e160] >[ 3232.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x317e160] width 1680 pitch 6912 (/4 1728) >[ 3233.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c670] >[ 3233.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c670] width 1680 pitch 6912 (/4 1728) >[ 3233.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x317e270] >[ 3233.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x317e270] width 1680 pitch 6912 (/4 1728) >[ 3233.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c670] >[ 3233.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c670] width 1680 pitch 6912 (/4 1728) >[ 3236.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x317e270] >[ 3236.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x317e270] width 1680 pitch 6912 (/4 1728) >[ 3299.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cdf5c0] >[ 3299.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cdf5c0] width 1680 pitch 6912 (/4 1728) >[ 3300.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3871a40] >[ 3300.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3871a40] width 1680 pitch 6912 (/4 1728) >[ 3302.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cdf5c0] >[ 3302.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cdf5c0] width 1680 pitch 6912 (/4 1728) >[ 3303.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31956c0] >[ 3303.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31956c0] width 1680 pitch 6912 (/4 1728) >[ 3304.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3871a40] >[ 3304.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3871a40] width 1680 pitch 6912 (/4 1728) >[ 3304.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3863450] >[ 3304.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3863450] width 1680 pitch 6912 (/4 1728) >[ 3305.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3863450] >[ 3305.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3863450] width 1680 pitch 6912 (/4 1728) >[ 3306.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e5d9d0] >[ 3306.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e5d9d0] width 1680 pitch 6912 (/4 1728) >[ 3306.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3871a40] >[ 3306.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3871a40] width 1680 pitch 6912 (/4 1728) >[ 3306.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c670] >[ 3306.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c670] width 1680 pitch 6912 (/4 1728) >[ 3306.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31956c0] >[ 3306.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31956c0] width 1680 pitch 6912 (/4 1728) >[ 3391.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ca5040] >[ 3391.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ca5040] width 1680 pitch 6912 (/4 1728) >[ 3410.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1de3260] >[ 3410.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1de3260] width 1680 pitch 6912 (/4 1728) >[ 3411.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31df420] >[ 3411.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31df420] width 1680 pitch 6912 (/4 1728) >[ 3416.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31935f0] >[ 3416.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31935f0] width 1680 pitch 6912 (/4 1728) >[ 4042.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bcb90] >[ 4042.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bcb90] width 1680 pitch 6912 (/4 1728) >[ 4049.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bcb90] >[ 4049.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bcb90] width 1680 pitch 6912 (/4 1728) >[ 4049.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388a480] >[ 4049.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388a480] width 1680 pitch 6912 (/4 1728) >[ 4049.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x388a480] >[ 4049.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x388a480] width 1680 pitch 6912 (/4 1728) >[ 4049.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3869310] >[ 4049.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3869310] width 1680 pitch 6912 (/4 1728) >[ 4056.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3865560] >[ 4056.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3865560] width 1680 pitch 6912 (/4 1728) >[ 4056.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862070] >[ 4056.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862070] width 1680 pitch 6912 (/4 1728) >[ 4057.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3865560] >[ 4057.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3865560] width 1680 pitch 6912 (/4 1728) >[ 4196.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389c720] >[ 4196.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389c720] width 1680 pitch 6912 (/4 1728) >[ 4211.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3882370] >[ 4212.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3882370] width 1680 pitch 6912 (/4 1728) >[ 4212.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319a000] >[ 4212.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319a000] width 1680 pitch 6912 (/4 1728) >[ 4212.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319a000] >[ 4212.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319a000] width 1680 pitch 6912 (/4 1728) >[ 4215.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386dbd0] >[ 4215.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386dbd0] width 1680 pitch 6912 (/4 1728) >[ 4219.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8f6d0] >[ 4219.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8f6d0] width 1680 pitch 6912 (/4 1728) >[ 4236.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc56d0] >[ 4236.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc56d0] width 1680 pitch 6912 (/4 1728) >[ 4236.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc1f00] >[ 4236.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc1f00] width 1680 pitch 6912 (/4 1728) >[ 4236.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc56d0] >[ 4236.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc56d0] width 1680 pitch 6912 (/4 1728) >[ 4236.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc1f00] >[ 4236.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc1f00] width 1680 pitch 6912 (/4 1728) >[ 4236.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc56d0] >[ 4236.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc56d0] width 1680 pitch 6912 (/4 1728) >[ 4236.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3196380] >[ 4236.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3196380] width 1680 pitch 6912 (/4 1728) >[ 4236.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc56d0] >[ 4236.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc56d0] width 1680 pitch 6912 (/4 1728) >[ 4236.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3196380] >[ 4237.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3196380] width 1680 pitch 6912 (/4 1728) >[ 4237.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc56d0] >[ 4237.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc56d0] width 1680 pitch 6912 (/4 1728) >[ 4237.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3196380] >[ 4237.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3196380] width 1680 pitch 6912 (/4 1728) >[ 4237.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc56d0] >[ 4237.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc56d0] width 1680 pitch 6912 (/4 1728) >[ 4238.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ca40] >[ 4238.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ca40] width 1680 pitch 6912 (/4 1728) >[ 4238.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc27a0] >[ 4238.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc27a0] width 1680 pitch 6912 (/4 1728) >[ 4238.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ca40] >[ 4238.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ca40] width 1680 pitch 6912 (/4 1728) >[ 4238.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc27a0] >[ 4238.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc27a0] width 1680 pitch 6912 (/4 1728) >[ 4238.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ca40] >[ 4238.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ca40] width 1680 pitch 6912 (/4 1728) >[ 4238.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc27a0] >[ 4238.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc27a0] width 1680 pitch 6912 (/4 1728) >[ 4238.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ca40] >[ 4238.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ca40] width 1680 pitch 6912 (/4 1728) >[ 4238.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc27a0] >[ 4238.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc27a0] width 1680 pitch 6912 (/4 1728) >[ 4238.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e0ca40] >[ 4238.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e0ca40] width 1680 pitch 6912 (/4 1728) >[ 4238.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc27a0] >[ 4238.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc27a0] width 1680 pitch 6912 (/4 1728) >[ 4238.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318aed0] >[ 4238.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318aed0] width 1680 pitch 6912 (/4 1728) >[ 4238.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b45b0] >[ 4238.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b45b0] width 1680 pitch 6912 (/4 1728) >[ 4247.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc29a0] >[ 4247.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc29a0] width 1680 pitch 6912 (/4 1728) >[ 4247.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x386daf0] >[ 4247.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x386daf0] width 1680 pitch 6912 (/4 1728) >[ 4247.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc29a0] >[ 4247.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc29a0] width 1680 pitch 6912 (/4 1728) >[ 4247.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e580] >[ 4247.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e580] width 1680 pitch 6912 (/4 1728) >[ 4257.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db5220] >[ 4257.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db5220] width 1680 pitch 6912 (/4 1728) >[ 4271.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389bc30] >[ 4271.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389bc30] width 1680 pitch 6912 (/4 1728) >[ 4271.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319a000] >[ 4271.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319a000] width 1680 pitch 6912 (/4 1728) >[ 4271.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3882370] >[ 4271.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3882370] width 1680 pitch 6912 (/4 1728) >[ 4271.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3865560] >[ 4271.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3865560] width 1680 pitch 6912 (/4 1728) >[ 4272.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a5dde0] >[ 4272.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a5dde0] width 1680 pitch 6912 (/4 1728) >[ 4284.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6e530] >[ 4284.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6e530] width 1680 pitch 6912 (/4 1728) >[ 4305.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387baf0] >[ 4305.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387baf0] width 1680 pitch 6912 (/4 1728) >[ 4305.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc710] >[ 4305.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc710] width 1680 pitch 6912 (/4 1728) >[ 4305.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e2a0] >[ 4305.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e2a0] width 1680 pitch 6912 (/4 1728) >[ 4305.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387b9f0] >[ 4305.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387b9f0] width 1680 pitch 6912 (/4 1728) >[ 4325.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b9690] >[ 4325.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b9690] width 1680 pitch 6912 (/4 1728) >[ 4325.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b9690] >[ 4325.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b9690] width 1680 pitch 6912 (/4 1728) >[ 4360.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dceda0] >[ 4360.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dceda0] width 1680 pitch 6912 (/4 1728) >[ 4362.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd2b30] >[ 4363.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd2b30] width 1680 pitch 6912 (/4 1728) >[ 4363.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c24710] >[ 4363.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c24710] width 1680 pitch 6912 (/4 1728) >[ 4363.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3883980] >[ 4363.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3883980] width 1680 pitch 6912 (/4 1728) >[ 4363.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6c170] >[ 4363.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6c170] width 1680 pitch 6912 (/4 1728) >[ 4427.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d80f20] >[ 4427.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d80f20] width 1680 pitch 6912 (/4 1728) >[ 4427.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6e730] >[ 4427.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6e730] width 1680 pitch 6912 (/4 1728) >[ 4427.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3865560] >[ 4427.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3865560] width 1680 pitch 6912 (/4 1728) >[ 4429.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d86490] >[ 4429.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d86490] width 1680 pitch 6912 (/4 1728) >[ 4451.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b48700] >[ 4451.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b48700] width 1680 pitch 6912 (/4 1728) >[ 4451.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfa940] >[ 4451.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfa940] width 1680 pitch 6912 (/4 1728) >[ 4451.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3894820] >[ 4451.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3894820] width 1680 pitch 6912 (/4 1728) >[ 4451.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318bdd0] >[ 4451.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318bdd0] width 1680 pitch 6912 (/4 1728) >[ 4452.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x318bdd0] >[ 4452.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x318bdd0] width 1680 pitch 6912 (/4 1728) >[ 4473.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3886e50] >[ 4473.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3886e50] width 1680 pitch 6912 (/4 1728) >[ 4531.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d96bd0] >[ 4531.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d96bd0] width 1680 pitch 6912 (/4 1728) >[ 4538.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d96ae0] >[ 4538.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d96ae0] width 1680 pitch 6912 (/4 1728) >[ 4538.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc6730] >[ 4539.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc6730] width 1680 pitch 6912 (/4 1728) >[ 4539.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8ad10] >[ 4539.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8ad10] width 1680 pitch 6912 (/4 1728) >[ 4539.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3878080] >[ 4539.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3878080] width 1680 pitch 6912 (/4 1728) >[ 4547.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba8f0] >[ 4547.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba8f0] width 1680 pitch 6912 (/4 1728) >[ 4547.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38628a0] >[ 4547.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38628a0] width 1680 pitch 6912 (/4 1728) >[ 4548.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc240] >[ 4548.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc240] width 1680 pitch 6912 (/4 1728) >[ 4558.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f10d0] >[ 4558.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f10d0] width 1680 pitch 6912 (/4 1728) >[ 4558.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fabe0] >[ 4558.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fabe0] width 1680 pitch 6912 (/4 1728) >[ 4560.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dae990] >[ 4560.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dae990] width 1680 pitch 6912 (/4 1728) >[ 4560.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc240] >[ 4560.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc240] width 1680 pitch 6912 (/4 1728) >[ 4560.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dae990] >[ 4560.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dae990] width 1680 pitch 6912 (/4 1728) >[ 4560.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dfc240] >[ 4560.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dfc240] width 1680 pitch 6912 (/4 1728) >[ 4560.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd4410] >[ 4560.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd4410] width 1680 pitch 6912 (/4 1728) >[ 4560.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4780] >[ 4560.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4780] width 1680 pitch 6912 (/4 1728) >[ 4560.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dae990] >[ 4560.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dae990] width 1680 pitch 6912 (/4 1728) >[ 4560.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4780] >[ 4560.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4780] width 1680 pitch 6912 (/4 1728) >[ 4560.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f8e00] >[ 4560.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f8e00] width 1680 pitch 6912 (/4 1728) >[ 4560.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3189fa0] >[ 4560.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3189fa0] width 1680 pitch 6912 (/4 1728) >[ 4560.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4780] >[ 4560.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4780] width 1680 pitch 6912 (/4 1728) >[ 4560.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6c170] >[ 4561.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6c170] width 1680 pitch 6912 (/4 1728) >[ 4561.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3189fa0] >[ 4561.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3189fa0] width 1680 pitch 6912 (/4 1728) >[ 4561.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dca530] >[ 4561.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dca530] width 1680 pitch 6912 (/4 1728) >[ 4561.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385efc0] >[ 4561.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385efc0] width 1680 pitch 6912 (/4 1728) >[ 4561.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4561.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4561.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4561.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4561.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4561.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4561.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4561.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4561.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4561.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4561.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4561.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4561.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4561.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4561.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4561.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4561.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4562.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4562.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4562.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4562.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4562.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4562.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4562.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4562.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4562.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4562.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3862820] >[ 4562.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3862820] width 1680 pitch 6912 (/4 1728) >[ 4562.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee660] >[ 4562.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee660] width 1680 pitch 6912 (/4 1728) >[ 4562.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x385efc0] >[ 4562.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x385efc0] width 1680 pitch 6912 (/4 1728) >[ 4565.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3878080] >[ 4565.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3878080] width 1680 pitch 6912 (/4 1728) >[ 4605.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d91f60] >[ 4605.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d91f60] width 1680 pitch 6912 (/4 1728) >[ 4605.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dca530] >[ 4605.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dca530] width 1680 pitch 6912 (/4 1728) >[ 4610.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5280] >[ 4610.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5280] width 1680 pitch 6912 (/4 1728) >[ 4610.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e1670] >[ 4610.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e1670] width 1680 pitch 6912 (/4 1728) >[ 4623.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3189fb0] >[ 4623.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3189fb0] width 1680 pitch 6912 (/4 1728) >[ 4623.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebc30] >[ 4623.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebc30] width 1680 pitch 6912 (/4 1728) >[ 4623.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4623.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4623.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebc30] >[ 4623.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebc30] width 1680 pitch 6912 (/4 1728) >[ 4623.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0a20] >[ 4623.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0a20] width 1680 pitch 6912 (/4 1728) >[ 4623.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4623.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4623.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0a20] >[ 4623.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0a20] width 1680 pitch 6912 (/4 1728) >[ 4623.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4623.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4623.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4623.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4623.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4623.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4623.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4623.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4623.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4623.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4623.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4623.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4623.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4623.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4623.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4623.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4624.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4624.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4624.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4624.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4624.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4624.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4624.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4625.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4625.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4625.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4625.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4625.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4625.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319fdd0] >[ 4625.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319fdd0] width 1680 pitch 6912 (/4 1728) >[ 4625.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319eca0] >[ 4625.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319eca0] width 1680 pitch 6912 (/4 1728) >[ 4626.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1a80] >[ 4626.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1a80] width 1680 pitch 6912 (/4 1728) >[ 4659.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x172c180] >[ 4659.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x172c180] width 1680 pitch 6912 (/4 1728) >[ 4659.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc4a70] >[ 4659.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc4a70] width 1680 pitch 6912 (/4 1728) >[ 4659.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84ef0] >[ 4659.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84ef0] width 1680 pitch 6912 (/4 1728) >[ 4659.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84ef0] >[ 4659.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84ef0] width 1680 pitch 6912 (/4 1728) >[ 4659.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d95bf0] >[ 4659.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d95bf0] width 1680 pitch 6912 (/4 1728) >[ 4659.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d95bf0] >[ 4659.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d95bf0] width 1680 pitch 6912 (/4 1728) >[ 4659.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d95bf0] >[ 4659.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d95bf0] width 1680 pitch 6912 (/4 1728) >[ 4659.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d95bf0] >[ 4659.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d95bf0] width 1680 pitch 6912 (/4 1728) >[ 4659.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4659.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4659.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a8afd0] >[ 4659.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a8afd0] width 1680 pitch 6912 (/4 1728) >[ 4659.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc49b0] >[ 4659.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc49b0] width 1680 pitch 6912 (/4 1728) >[ 4676.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4470] >[ 4676.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4470] width 1680 pitch 6912 (/4 1728) >[ 4676.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4676.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4676.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4676.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4676.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4676.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4677.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4677.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4677.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4677.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4677.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4677.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4677.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4677.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4677.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4677.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4677.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4677.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4677.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4677.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4677.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4677.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4677.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4677.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4677.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1b0] >[ 4677.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1b0] width 1680 pitch 6912 (/4 1728) >[ 4677.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db9890] >[ 4677.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db9890] width 1680 pitch 6912 (/4 1728) >[ 4677.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4470] >[ 4677.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4470] width 1680 pitch 6912 (/4 1728) >[ 4677.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4677.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4677.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4677.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4677.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4677.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4677.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4677.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4677.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4677.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4677.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4677.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4677.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc49b0] >[ 4677.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc49b0] width 1680 pitch 6912 (/4 1728) >[ 4677.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4677.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4677.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc49b0] >[ 4677.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc49b0] width 1680 pitch 6912 (/4 1728) >[ 4677.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4677.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4677.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc49b0] >[ 4677.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc49b0] width 1680 pitch 6912 (/4 1728) >[ 4677.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e32c0] >[ 4677.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e32c0] width 1680 pitch 6912 (/4 1728) >[ 4677.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4677.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4677.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4677.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4677.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4677.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e02d0] >[ 4680.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e02d0] width 1680 pitch 6912 (/4 1728) >[ 4680.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e0460] >[ 4680.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e0460] width 1680 pitch 6912 (/4 1728) >[ 4680.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc7d00] >[ 4680.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc7d00] width 1680 pitch 6912 (/4 1728) >[ 4680.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc7d00] >[ 4680.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc7d00] width 1680 pitch 6912 (/4 1728) >[ 4680.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc7d00] >[ 4680.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc7d00] width 1680 pitch 6912 (/4 1728) >[ 4680.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc7d00] >[ 4680.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc7d00] width 1680 pitch 6912 (/4 1728) >[ 4680.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc7d00] >[ 4680.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc7d00] width 1680 pitch 6912 (/4 1728) >[ 4680.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4680.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4680.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4680.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2be0] >[ 4680.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2be0] width 1680 pitch 6912 (/4 1728) >[ 4680.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba7f0] >[ 4680.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba7f0] width 1680 pitch 6912 (/4 1728) >[ 4686.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4686.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adfa0] >[ 4686.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adfa0] width 1680 pitch 6912 (/4 1728) >[ 4686.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6b80] >[ 4686.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6b80] width 1680 pitch 6912 (/4 1728) >[ 4687.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4687.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4687.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4687.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4687.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4687.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4687.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3380] >[ 4687.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3380] width 1680 pitch 6912 (/4 1728) >[ 4687.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31adf90] >[ 4687.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31adf90] width 1680 pitch 6912 (/4 1728) >[ 4687.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4687.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4687.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ae030] >[ 4687.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ae030] width 1680 pitch 6912 (/4 1728) >[ 4689.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b70b0] >[ 4689.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b70b0] width 1680 pitch 6912 (/4 1728) >[ 4689.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e7a0] >[ 4689.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e7a0] width 1680 pitch 6912 (/4 1728) >[ 4689.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e7a0] >[ 4689.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e7a0] width 1680 pitch 6912 (/4 1728) >[ 4689.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e7a0] >[ 4689.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e7a0] width 1680 pitch 6912 (/4 1728) >[ 4689.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e7a0] >[ 4689.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e7a0] width 1680 pitch 6912 (/4 1728) >[ 4689.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e7a0] >[ 4689.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e7a0] width 1680 pitch 6912 (/4 1728) >[ 4689.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e7a0] >[ 4689.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e7a0] width 1680 pitch 6912 (/4 1728) >[ 4689.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d8e5d0] >[ 4689.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d8e5d0] width 1680 pitch 6912 (/4 1728) >[ 4689.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e1e10] >[ 4689.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e1e10] width 1680 pitch 6912 (/4 1728) >[ 4689.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4689.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4689.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4689.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4689.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 4689.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 4689.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4689.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4689.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e1e10] >[ 4689.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e1e10] width 1680 pitch 6912 (/4 1728) >[ 4689.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319c130] >[ 4689.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319c130] width 1680 pitch 6912 (/4 1728) >[ 4689.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4689.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4689.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319c130] >[ 4689.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319c130] width 1680 pitch 6912 (/4 1728) >[ 4689.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4689.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4689.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x319c130] >[ 4689.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x319c130] width 1680 pitch 6912 (/4 1728) >[ 4689.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa160] >[ 4689.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa160] width 1680 pitch 6912 (/4 1728) >[ 4689.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b77c0] >[ 4689.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b77c0] width 1680 pitch 6912 (/4 1728) >[ 4689.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3380] >[ 4689.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3380] width 1680 pitch 6912 (/4 1728) >[ 4689.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b77c0] >[ 4689.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b77c0] width 1680 pitch 6912 (/4 1728) >[ 4689.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b94850] >[ 4689.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b94850] width 1680 pitch 6912 (/4 1728) >[ 4727.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f9cd0] >[ 4727.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f9cd0] width 1680 pitch 6912 (/4 1728) >[ 4727.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4727.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4728.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4728.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4728.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31b2010] >[ 4728.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31b2010] width 1680 pitch 6912 (/4 1728) >[ 4728.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dc49b0] >[ 4728.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dc49b0] width 1680 pitch 6912 (/4 1728) >[ 4731.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fdc70] >[ 4731.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fdc70] width 1680 pitch 6912 (/4 1728) >[ 4731.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb120] >[ 4731.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb120] width 1680 pitch 6912 (/4 1728) >[ 4735.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bb070] >[ 4735.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bb070] width 1680 pitch 6912 (/4 1728) >[ 4747.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6760] >[ 4747.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6760] width 1680 pitch 6912 (/4 1728) >[ 4747.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f97a0] >[ 4747.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f97a0] width 1680 pitch 6912 (/4 1728) >[ 4752.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aa6d0] >[ 4752.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aa6d0] width 1680 pitch 6912 (/4 1728) >[ 4777.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6cf0] >[ 4777.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6cf0] width 1680 pitch 6912 (/4 1728) >[ 4777.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38a19f0] >[ 4777.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38a19f0] width 1680 pitch 6912 (/4 1728) >[ 4778.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31db450] >[ 4778.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31db450] width 1680 pitch 6912 (/4 1728) >[ 4900.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38852c0] >[ 4900.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38852c0] width 1680 pitch 6912 (/4 1728) >[ 4901.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2ae0] >[ 4901.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2ae0] width 1680 pitch 6912 (/4 1728) >[ 4901.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38852c0] >[ 4901.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38852c0] width 1680 pitch 6912 (/4 1728) >[ 4901.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e0f0] >[ 4901.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e0f0] width 1680 pitch 6912 (/4 1728) >[ 4901.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a7ce0] >[ 4901.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a7ce0] width 1680 pitch 6912 (/4 1728) >[ 4901.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2ae0] >[ 4901.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2ae0] width 1680 pitch 6912 (/4 1728) >[ 4901.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38852c0] >[ 4901.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38852c0] width 1680 pitch 6912 (/4 1728) >[ 4901.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e0f0] >[ 4901.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e0f0] width 1680 pitch 6912 (/4 1728) >[ 4902.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31537c0] >[ 4902.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31537c0] width 1680 pitch 6912 (/4 1728) >[ 4978.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ddad0] >[ 4978.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ddad0] width 1680 pitch 6912 (/4 1728) >[ 4978.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e0f0] >[ 4978.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e0f0] width 1680 pitch 6912 (/4 1728) >[ 4978.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31ddad0] >[ 4978.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31ddad0] width 1680 pitch 6912 (/4 1728) >[ 4978.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38852c0] >[ 4978.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38852c0] width 1680 pitch 6912 (/4 1728) >[ 4978.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e0f0] >[ 4978.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e0f0] width 1680 pitch 6912 (/4 1728) >[ 4978.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38852c0] >[ 4978.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38852c0] width 1680 pitch 6912 (/4 1728) >[ 4979.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e0f0] >[ 4979.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e0f0] width 1680 pitch 6912 (/4 1728) >[ 4979.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x389e0f0] >[ 4979.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x389e0f0] width 1680 pitch 6912 (/4 1728) >[ 5210.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea9f0] >[ 5211.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea9f0] width 1680 pitch 6912 (/4 1728) >[ 5907.243] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 5907.243] (II) RADEON(0): Using hsync ranges from config file >[ 5907.243] (II) RADEON(0): Using vrefresh ranges from config file >[ 5907.243] (II) RADEON(0): Printing DDC gathered Modelines: >[ 5907.243] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 5907.243] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 5907.243] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 5907.244] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 5997.483] (II) RADEON(0): RADEONSaveScreen(2) >[ 5997.483] (II) RADEON(0): RADEONSaveScreen(0) >[ 9000.574] (II) AIGLX: Suspending AIGLX clients for VT switch >[ 9000.574] (II) RADEON(0): RADEONLeaveVT_KMS >[ 9000.574] (II) RADEON(0): Ok, leaving now... >[ 9009.347] (II) AIGLX: Resuming AIGLX clients after VT switch >[ 9009.426] (II) RADEON(0): RADEONEnterVT_KMS >[ 9009.459] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 9009.499] (II) RADEON(0): Using hsync ranges from config file >[ 9009.499] (II) RADEON(0): Using vrefresh ranges from config file >[ 9009.499] (II) RADEON(0): Printing DDC gathered Modelines: >[ 9009.499] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 9009.499] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 9009.499] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 9009.536] (II) RADEON(0): RADEONSaveScreen(2) >[ 9009.536] (II) RADEON(0): RADEONSaveScreen(1) >[ 9018.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0] >[ 9018.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1680 pitch 6912 (/4 1728) >[ 9019.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e741b0] >[ 9019.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e741b0] width 1680 pitch 6912 (/4 1728) >[ 9020.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0] >[ 9020.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1680 pitch 6912 (/4 1728) >[ 9020.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e741b0] >[ 9020.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e741b0] width 1680 pitch 6912 (/4 1728) >[ 9020.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0] >[ 9020.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1680 pitch 6912 (/4 1728) >[ 9020.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e741b0] >[ 9020.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e741b0] width 1680 pitch 6912 (/4 1728) >[ 9020.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f9730] >[ 9020.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f9730] width 1680 pitch 6912 (/4 1728) >[ 9021.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e71ef0] >[ 9021.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e71ef0] width 1680 pitch 6912 (/4 1728) >[ 9059.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e600] >[ 9059.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e600] width 1680 pitch 6912 (/4 1728) >[ 10989.547] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 10989.586] (II) RADEON(0): Using hsync ranges from config file >[ 10989.586] (II) RADEON(0): Using vrefresh ranges from config file >[ 10989.586] (II) RADEON(0): Printing DDC gathered Modelines: >[ 10989.586] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 10989.586] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 10989.586] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 11079.492] (II) RADEON(0): RADEONSaveScreen(2) >[ 11079.492] (II) RADEON(0): RADEONSaveScreen(0) >[ 14083.359] (II) AIGLX: Suspending AIGLX clients for VT switch >[ 14083.418] (II) RADEON(0): RADEONLeaveVT_KMS >[ 14083.418] (II) RADEON(0): Ok, leaving now... >[ 14091.572] (II) AIGLX: Resuming AIGLX clients after VT switch >[ 14091.705] (II) RADEON(0): RADEONEnterVT_KMS >[ 14091.738] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 14091.738] (II) RADEON(0): Using hsync ranges from config file >[ 14091.738] (II) RADEON(0): Using vrefresh ranges from config file >[ 14091.738] (II) RADEON(0): Printing DDC gathered Modelines: >[ 14091.738] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 14091.738] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 14091.738] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 14091.776] (II) RADEON(0): RADEONSaveScreen(2) >[ 14091.776] (II) RADEON(0): RADEONSaveScreen(1) >[ 14102.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c33680] >[ 14102.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c33680] width 1680 pitch 6912 (/4 1728) >[ 14955.604] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 14955.684] (II) RADEON(0): Using hsync ranges from config file >[ 14955.684] (II) RADEON(0): Using vrefresh ranges from config file >[ 14955.684] (II) RADEON(0): Printing DDC gathered Modelines: >[ 14955.684] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 14955.684] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 14955.684] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 15044.492] (II) RADEON(0): RADEONSaveScreen(2) >[ 15044.492] (II) RADEON(0): RADEONSaveScreen(0) >[ 17142.805] (II) RADEON(0): RADEONSaveScreen(1) >[ 17148.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3151be0] >[ 17148.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3151be0] width 1680 pitch 6912 (/4 1728) >[ 17294.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c801a0] >[ 17294.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c801a0] width 1680 pitch 6912 (/4 1728) >[ 17294.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af54f0] >[ 17294.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af54f0] width 1680 pitch 6912 (/4 1728) >[ 17294.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3151be0] >[ 17294.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3151be0] width 1680 pitch 6912 (/4 1728) >[ 17294.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c3bb0] >[ 17294.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c3bb0] width 1680 pitch 6912 (/4 1728) >[ 17295.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b69f30] >[ 17295.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b69f30] width 1680 pitch 6912 (/4 1728) >[ 17296.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b2d7a0] >[ 17296.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b2d7a0] width 1680 pitch 6912 (/4 1728) >[ 17296.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38db0c0] >[ 17296.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38db0c0] width 1680 pitch 6912 (/4 1728) >[ 17297.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c3bb0] >[ 17297.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c3bb0] width 1680 pitch 6912 (/4 1728) >[ 18282.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bc1ce0] >[ 18282.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bc1ce0] width 1680 pitch 6912 (/4 1728) >[ 18284.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af46a0] >[ 18285.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af46a0] width 1680 pitch 6912 (/4 1728) >[ 18285.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b440c0] >[ 18285.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b440c0] width 1680 pitch 6912 (/4 1728) >[ 18285.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af46a0] >[ 18285.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af46a0] width 1680 pitch 6912 (/4 1728) >[ 18285.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b43ad0] >[ 18285.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b43ad0] width 1680 pitch 6912 (/4 1728) >[ 18299.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abf90] >[ 18299.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abf90] width 1680 pitch 6912 (/4 1728) >[ 18299.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967410] >[ 18299.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967410] width 1680 pitch 6912 (/4 1728) >[ 18299.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abf90] >[ 18299.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abf90] width 1680 pitch 6912 (/4 1728) >[ 18301.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ab5290] >[ 18301.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ab5290] width 1680 pitch 6912 (/4 1728) >[ 18302.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19e8550] >[ 18302.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19e8550] width 1680 pitch 6912 (/4 1728) >[ 18302.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3d840] >[ 18302.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3d840] width 1680 pitch 6912 (/4 1728) >[ 18302.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19e8550] >[ 18302.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19e8550] width 1680 pitch 6912 (/4 1728) >[ 18302.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ab5290] >[ 18302.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ab5290] width 1680 pitch 6912 (/4 1728) >[ 18302.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d0ce0] >[ 18302.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d0ce0] width 1680 pitch 6912 (/4 1728) >[ 18302.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b82eb0] >[ 18302.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b82eb0] width 1680 pitch 6912 (/4 1728) >[ 18303.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e741b0] >[ 18303.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e741b0] width 1680 pitch 6912 (/4 1728) >[ 18303.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e741b0] >[ 18303.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e741b0] width 1680 pitch 6912 (/4 1728) >[ 18404.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ad4f30] >[ 18404.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ad4f30] width 1680 pitch 6912 (/4 1728) >[ 18404.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b82eb0] >[ 18404.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b82eb0] width 1680 pitch 6912 (/4 1728) >[ 18404.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0] >[ 18404.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1680 pitch 6912 (/4 1728) >[ 18407.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19d0ce0] >[ 18407.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19d0ce0] width 1680 pitch 6912 (/4 1728) >[ 18407.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c1f820] >[ 18407.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c1f820] width 1680 pitch 6912 (/4 1728) >[ 18407.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1912460] >[ 18407.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1912460] width 1680 pitch 6912 (/4 1728) >[ 18559.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08f90] >[ 18559.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08f90] width 1680 pitch 6912 (/4 1728) >[ 18561.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b41e50] >[ 18561.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b41e50] width 1680 pitch 6912 (/4 1728) >[ 18561.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a604f0] >[ 18561.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a604f0] width 1680 pitch 6912 (/4 1728) >[ 18561.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8c890] >[ 18561.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8c890] width 1680 pitch 6912 (/4 1728) >[ 18561.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8c8e0] >[ 18561.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8c8e0] width 1680 pitch 6912 (/4 1728) >[ 18561.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a604f0] >[ 18561.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a604f0] width 1680 pitch 6912 (/4 1728) >[ 18561.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cd5400] >[ 18561.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cd5400] width 1680 pitch 6912 (/4 1728) >[ 18561.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e759a0] >[ 18561.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e759a0] width 1680 pitch 6912 (/4 1728) >[ 18561.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8cb10] >[ 18561.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8cb10] width 1680 pitch 6912 (/4 1728) >[ 18561.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8c710] >[ 18561.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8c710] width 1680 pitch 6912 (/4 1728) >[ 18561.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8cb10] >[ 18561.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8cb10] width 1680 pitch 6912 (/4 1728) >[ 18561.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8c710] >[ 18561.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8c710] width 1680 pitch 6912 (/4 1728) >[ 18561.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c8cb10] >[ 18561.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c8cb10] width 1680 pitch 6912 (/4 1728) >[ 18562.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18562.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18562.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18562.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18562.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18562.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18562.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18562.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18562.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18562.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18562.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18562.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18562.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18562.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18562.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18562.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18562.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18562.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18562.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18563.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18563.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18563.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18563.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18563.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18563.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18563.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18563.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18563.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18563.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18563.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18563.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3d00] >[ 18563.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3d00] width 1680 pitch 6912 (/4 1728) >[ 18563.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75a40] >[ 18563.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75a40] width 1680 pitch 6912 (/4 1728) >[ 18575.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1978020] >[ 18575.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1978020] width 1680 pitch 6912 (/4 1728) >[ 18575.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38faf50] >[ 18575.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38faf50] width 1680 pitch 6912 (/4 1728) >[ 18575.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a29810] >[ 18575.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a29810] width 1680 pitch 6912 (/4 1728) >[ 18575.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f62c0] >[ 18575.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f62c0] width 1680 pitch 6912 (/4 1728) >[ 18719.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3d840] >[ 18719.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3d840] width 1680 pitch 6912 (/4 1728) >[ 18719.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abf10] >[ 18719.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abf10] width 1680 pitch 6912 (/4 1728) >[ 18719.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abf10] >[ 18719.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abf10] width 1680 pitch 6912 (/4 1728) >[ 18721.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abf10] >[ 18721.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abf10] width 1680 pitch 6912 (/4 1728) >[ 18721.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6d540] >[ 18721.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6d540] width 1680 pitch 6912 (/4 1728) >[ 18721.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1914b30] >[ 18721.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1914b30] width 1680 pitch 6912 (/4 1728) >[ 18923.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31985f0] >[ 18923.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31985f0] width 1680 pitch 6912 (/4 1728) >[ 18923.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31985f0] >[ 18923.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31985f0] width 1680 pitch 6912 (/4 1728) >[ 18923.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba3990] >[ 18923.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba3990] width 1680 pitch 6912 (/4 1728) >[ 18923.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba3990] >[ 18923.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba3990] width 1680 pitch 6912 (/4 1728) >[ 18923.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba3990] >[ 18923.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba3990] width 1680 pitch 6912 (/4 1728) >[ 18923.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba3990] >[ 18923.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba3990] width 1680 pitch 6912 (/4 1728) >[ 18923.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba3990] >[ 18923.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba3990] width 1680 pitch 6912 (/4 1728) >[ 18923.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba3990] >[ 18923.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba3990] width 1680 pitch 6912 (/4 1728) >[ 18923.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3198590] >[ 18923.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3198590] width 1680 pitch 6912 (/4 1728) >[ 18923.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18923.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18923.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18923.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18923.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18923.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18923.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18923.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18923.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18924.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18924.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18924.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18924.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18924.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18924.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18924.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18924.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18924.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18924.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18924.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18924.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18924.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18924.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18924.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18924.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3c30] >[ 18924.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3c30] width 1680 pitch 6912 (/4 1728) >[ 18924.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c94b0] >[ 18924.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c94b0] width 1680 pitch 6912 (/4 1728) >[ 18924.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18924.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18924.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c31250] >[ 18924.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c31250] width 1680 pitch 6912 (/4 1728) >[ 18924.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bd3140] >[ 18924.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bd3140] width 1680 pitch 6912 (/4 1728) >[ 18935.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18935.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73360] >[ 18935.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73360] width 1680 pitch 6912 (/4 1728) >[ 18935.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c83300] >[ 18935.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c83300] width 1680 pitch 6912 (/4 1728) >[ 18940.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3fe40] >[ 18940.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3fe40] width 1680 pitch 6912 (/4 1728) >[ 18940.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3fe40] >[ 18940.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3fe40] width 1680 pitch 6912 (/4 1728) >[ 18940.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3fe40] >[ 18940.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3fe40] width 1680 pitch 6912 (/4 1728) >[ 18940.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18940.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18940.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18940.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18940.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18940.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18940.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18940.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18940.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18940.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18940.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18940.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18940.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e6c010] >[ 18941.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e6c010] width 1680 pitch 6912 (/4 1728) >[ 18941.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0] >[ 18941.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1680 pitch 6912 (/4 1728) >[ 18941.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbbe60] >[ 18941.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbbe60] width 1680 pitch 6912 (/4 1728) >[ 18941.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1980360] >[ 18941.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1980360] width 1680 pitch 6912 (/4 1728) >[ 18941.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c3fc0] >[ 18941.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c3fc0] width 1680 pitch 6912 (/4 1728) >[ 18941.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c3ed0] >[ 18941.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c3ed0] width 1680 pitch 6912 (/4 1728) >[ 18941.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c3ed0] >[ 18941.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c3ed0] width 1680 pitch 6912 (/4 1728) >[ 18941.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a6800] >[ 18941.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a6800] width 1680 pitch 6912 (/4 1728) >[ 18941.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8d340] >[ 18941.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8d340] width 1680 pitch 6912 (/4 1728) >[ 18941.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c40b0] >[ 18941.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c40b0] width 1680 pitch 6912 (/4 1728) >[ 18941.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbbe60] >[ 18941.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbbe60] width 1680 pitch 6912 (/4 1728) >[ 18941.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19c40b0] >[ 18941.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19c40b0] width 1680 pitch 6912 (/4 1728) >[ 18947.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4210] >[ 18947.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4210] width 1680 pitch 6912 (/4 1728) >[ 18947.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18947.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 18947.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6f80] >[ 18947.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6f80] width 1680 pitch 6912 (/4 1728) >[ 18947.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18947.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 18947.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6f80] >[ 18947.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6f80] width 1680 pitch 6912 (/4 1728) >[ 18947.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18947.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 18947.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6f80] >[ 18947.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6f80] width 1680 pitch 6912 (/4 1728) >[ 18947.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18947.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 18947.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6f80] >[ 18948.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6f80] width 1680 pitch 6912 (/4 1728) >[ 18948.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18948.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 18948.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6f80] >[ 18948.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6f80] width 1680 pitch 6912 (/4 1728) >[ 18948.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18948.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 18948.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6f80] >[ 18948.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6f80] width 1680 pitch 6912 (/4 1728) >[ 18948.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165ba0] >[ 18948.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165ba0] width 1680 pitch 6912 (/4 1728) >[ 19220.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7cc0] >[ 19220.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7cc0] width 1680 pitch 6912 (/4 1728) >[ 19220.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c450c0] >[ 19220.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c450c0] width 1680 pitch 6912 (/4 1728) >[ 19220.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7bc0] >[ 19220.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7bc0] width 1680 pitch 6912 (/4 1728) >[ 19220.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7bc0] >[ 19220.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7bc0] width 1680 pitch 6912 (/4 1728) >[ 19220.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7bc0] >[ 19220.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7bc0] width 1680 pitch 6912 (/4 1728) >[ 19220.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7bc0] >[ 19220.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7bc0] width 1680 pitch 6912 (/4 1728) >[ 19220.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7bc0] >[ 19220.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7bc0] width 1680 pitch 6912 (/4 1728) >[ 19220.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1be7bc0] >[ 19220.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1be7bc0] width 1680 pitch 6912 (/4 1728) >[ 19220.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a4520] >[ 19220.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a4520] width 1680 pitch 6912 (/4 1728) >[ 19220.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bd2dd0] >[ 19220.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bd2dd0] width 1680 pitch 6912 (/4 1728) >[ 19220.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a38e30] >[ 19220.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a38e30] width 1680 pitch 6912 (/4 1728) >[ 19220.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3994d40] >[ 19221.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3994d40] width 1680 pitch 6912 (/4 1728) >[ 19273.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c45280] >[ 19273.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c45280] width 1680 pitch 6912 (/4 1728) >[ 19273.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1998200] >[ 19273.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1998200] width 1680 pitch 6912 (/4 1728) >[ 19273.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38abf10] >[ 19273.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38abf10] width 1680 pitch 6912 (/4 1728) >[ 19274.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16930] >[ 19274.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16930] width 1680 pitch 6912 (/4 1728) >[ 19274.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3d840] >[ 19274.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3d840] width 1680 pitch 6912 (/4 1728) >[ 19318.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b48780] >[ 19318.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b48780] width 1680 pitch 6912 (/4 1728) >[ 19318.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b5d120] >[ 19318.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b5d120] width 1680 pitch 6912 (/4 1728) >[ 19319.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b99c0] >[ 19319.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b99c0] width 1680 pitch 6912 (/4 1728) >[ 19332.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aba20] >[ 19332.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aba20] width 1680 pitch 6912 (/4 1728) >[ 19332.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73170] >[ 19332.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73170] width 1680 pitch 6912 (/4 1728) >[ 19332.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b9870] >[ 19332.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b9870] width 1680 pitch 6912 (/4 1728) >[ 19332.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a73690] >[ 19333.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a73690] width 1680 pitch 6912 (/4 1728) >[ 19333.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953550] >[ 19333.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953550] width 1680 pitch 6912 (/4 1728) >[ 19333.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bc90d0] >[ 19333.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bc90d0] width 1680 pitch 6912 (/4 1728) >[ 19333.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b79650] >[ 19333.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b79650] width 1680 pitch 6912 (/4 1728) >[ 19338.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b73170] >[ 19338.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b73170] width 1680 pitch 6912 (/4 1728) >[ 19338.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398f970] >[ 19338.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398f970] width 1680 pitch 6912 (/4 1728) >[ 19420.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9530] >[ 19420.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9530] width 1680 pitch 6912 (/4 1728) >[ 19420.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a050a0] >[ 19420.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a050a0] width 1680 pitch 6912 (/4 1728) >[ 19420.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dbb40] >[ 19420.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dbb40] width 1680 pitch 6912 (/4 1728) >[ 19420.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3952360] >[ 19420.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3952360] width 1680 pitch 6912 (/4 1728) >[ 19420.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38aae60] >[ 19420.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38aae60] width 1680 pitch 6912 (/4 1728) >[ 19420.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bcf400] >[ 19420.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bcf400] width 1680 pitch 6912 (/4 1728) >[ 19421.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bbcae0] >[ 19421.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bbcae0] width 1680 pitch 6912 (/4 1728) >[ 19505.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9dc20] >[ 19505.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9dc20] width 1680 pitch 6912 (/4 1728) >[ 19505.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bd95c0] >[ 19506.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bd95c0] width 1680 pitch 6912 (/4 1728) >[ 19506.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9dc20] >[ 19506.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9dc20] width 1680 pitch 6912 (/4 1728) >[ 19506.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01d00] >[ 19506.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01d00] width 1680 pitch 6912 (/4 1728) >[ 19506.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c9dc20] >[ 19506.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c9dc20] width 1680 pitch 6912 (/4 1728) >[ 19506.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bd95c0] >[ 19506.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bd95c0] width 1680 pitch 6912 (/4 1728) >[ 19506.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01d00] >[ 19506.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01d00] width 1680 pitch 6912 (/4 1728) >[ 19506.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bd95c0] >[ 19506.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bd95c0] width 1680 pitch 6912 (/4 1728) >[ 19534.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aed370] >[ 19534.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aed370] width 1680 pitch 6912 (/4 1728) >[ 19534.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19249a0] >[ 19534.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19249a0] width 1680 pitch 6912 (/4 1728) >[ 19534.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19249a0] >[ 19534.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19249a0] width 1680 pitch 6912 (/4 1728) >[ 19681.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa85c0] >[ 19681.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa85c0] width 1680 pitch 6912 (/4 1728) >[ 19681.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b237b0] >[ 19681.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b237b0] width 1680 pitch 6912 (/4 1728) >[ 19681.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ae6b0] >[ 19681.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ae6b0] width 1680 pitch 6912 (/4 1728) >[ 19723.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b687f0] >[ 19723.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b687f0] width 1680 pitch 6912 (/4 1728) >[ 19724.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1981270] >[ 19724.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1981270] width 1680 pitch 6912 (/4 1728) >[ 19745.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b07d20] >[ 19745.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b07d20] width 1680 pitch 6912 (/4 1728) >[ 20089.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7e80] >[ 20089.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7e80] width 1680 pitch 6912 (/4 1728) >[ 20089.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d0540] >[ 20089.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d0540] width 1680 pitch 6912 (/4 1728) >[ 20089.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7e80] >[ 20089.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7e80] width 1680 pitch 6912 (/4 1728) >[ 20089.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d0540] >[ 20089.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d0540] width 1680 pitch 6912 (/4 1728) >[ 20089.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7e80] >[ 20089.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7e80] width 1680 pitch 6912 (/4 1728) >[ 20089.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08ab0] >[ 20089.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08ab0] width 1680 pitch 6912 (/4 1728) >[ 20089.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7e80] >[ 20089.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7e80] width 1680 pitch 6912 (/4 1728) >[ 20089.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08ab0] >[ 20089.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08ab0] width 1680 pitch 6912 (/4 1728) >[ 20089.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7e80] >[ 20089.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7e80] width 1680 pitch 6912 (/4 1728) >[ 20089.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08ab0] >[ 20089.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08ab0] width 1680 pitch 6912 (/4 1728) >[ 20089.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a28870] >[ 20089.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a28870] width 1680 pitch 6912 (/4 1728) >[ 20089.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08ab0] >[ 20089.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08ab0] width 1680 pitch 6912 (/4 1728) >[ 20089.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a28870] >[ 20089.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a28870] width 1680 pitch 6912 (/4 1728) >[ 20089.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08ab0] >[ 20089.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08ab0] width 1680 pitch 6912 (/4 1728) >[ 20089.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a28870] >[ 20089.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a28870] width 1680 pitch 6912 (/4 1728) >[ 20089.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b08ab0] >[ 20089.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b08ab0] width 1680 pitch 6912 (/4 1728) >[ 20090.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20090.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20090.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20090.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20090.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20090.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20090.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20090.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20090.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20090.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20090.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20090.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20090.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20090.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20090.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20090.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20090.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20090.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20090.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20091.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20091.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20091.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20091.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20091.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20091.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19812e0] >[ 20091.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19812e0] width 1680 pitch 6912 (/4 1728) >[ 20091.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20091.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20091.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19812e0] >[ 20091.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19812e0] width 1680 pitch 6912 (/4 1728) >[ 20091.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20091.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20091.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19812e0] >[ 20091.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19812e0] width 1680 pitch 6912 (/4 1728) >[ 20337.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19812e0] >[ 20337.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19812e0] width 1680 pitch 6912 (/4 1728) >[ 20337.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a9b450] >[ 20337.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a9b450] width 1680 pitch 6912 (/4 1728) >[ 20339.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c5c00] >[ 20339.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c5c00] width 1680 pitch 6912 (/4 1728) >[ 20339.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a9b450] >[ 20339.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a9b450] width 1680 pitch 6912 (/4 1728) >[ 20340.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20340.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20340.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20340.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20341.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a9b450] >[ 20341.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a9b450] width 1680 pitch 6912 (/4 1728) >[ 20341.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20341.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20341.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20341.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20341.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20341.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20341.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20341.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20341.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20341.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20341.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20341.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20341.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b58a70] >[ 20341.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b58a70] width 1680 pitch 6912 (/4 1728) >[ 20341.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20341.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20341.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19a7c30] >[ 20341.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19a7c30] width 1680 pitch 6912 (/4 1728) >[ 20344.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1915380] >[ 20344.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1915380] width 1680 pitch 6912 (/4 1728) >[ 20356.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8d30] >[ 20356.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8d30] width 1680 pitch 6912 (/4 1728) >[ 20386.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa640] >[ 20386.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa640] width 1680 pitch 6912 (/4 1728) >[ 20386.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67810] >[ 20386.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67810] width 1680 pitch 6912 (/4 1728) >[ 20386.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b49a20] >[ 20386.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b49a20] width 1680 pitch 6912 (/4 1728) >[ 20386.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa640] >[ 20386.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa640] width 1680 pitch 6912 (/4 1728) >[ 20386.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa640] >[ 20386.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa640] width 1680 pitch 6912 (/4 1728) >[ 20387.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a59980] >[ 20387.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a59980] width 1680 pitch 6912 (/4 1728) >[ 20387.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e8030] >[ 20387.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e8030] width 1680 pitch 6912 (/4 1728) >[ 20387.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e8030] >[ 20387.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e8030] width 1680 pitch 6912 (/4 1728) >[ 20387.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x13d5b00] >[ 20387.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x13d5b00] width 1680 pitch 6912 (/4 1728) >[ 20988.201] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 20988.201] (II) RADEON(0): Using hsync ranges from config file >[ 20988.201] (II) RADEON(0): Using vrefresh ranges from config file >[ 20988.201] (II) RADEON(0): Printing DDC gathered Modelines: >[ 20988.201] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 20988.201] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 20988.201] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 21078.512] (II) RADEON(0): RADEONSaveScreen(2) >[ 21078.512] (II) RADEON(0): RADEONSaveScreen(0) >[ 24086.245] (II) AIGLX: Suspending AIGLX clients for VT switch >[ 24086.347] (II) RADEON(0): RADEONLeaveVT_KMS >[ 24086.347] (II) RADEON(0): Ok, leaving now... >[ 24095.119] (II) AIGLX: Resuming AIGLX clients after VT switch >[ 24095.162] (II) RADEON(0): RADEONEnterVT_KMS >[ 24095.195] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 24095.195] (II) RADEON(0): Using hsync ranges from config file >[ 24095.195] (II) RADEON(0): Using vrefresh ranges from config file >[ 24095.195] (II) RADEON(0): Printing DDC gathered Modelines: >[ 24095.195] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 24095.195] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 24095.195] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 24095.196] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 24095.309] (II) RADEON(0): RADEONSaveScreen(2) >[ 24095.309] (II) RADEON(0): RADEONSaveScreen(1) >[ 24110.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bc7bf0] >[ 24110.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bc7bf0] width 1680 pitch 6912 (/4 1728) >[ 24121.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x198c460] >[ 24121.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x198c460] width 1680 pitch 6912 (/4 1728) >[ 24121.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a5b20] >[ 24121.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a5b20] width 1680 pitch 6912 (/4 1728) >[ 24121.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ce70] >[ 24121.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ce70] width 1680 pitch 6912 (/4 1728) >[ 24121.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aed370] >[ 24121.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aed370] width 1680 pitch 6912 (/4 1728) >[ 24121.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3951520] >[ 24121.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3951520] width 1680 pitch 6912 (/4 1728) >[ 24128.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db93c0] >[ 24128.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db93c0] width 1680 pitch 6912 (/4 1728) >[ 24128.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c38a60] >[ 24128.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c38a60] width 1680 pitch 6912 (/4 1728) >[ 24129.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1536d60] >[ 24129.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1536d60] width 1680 pitch 6912 (/4 1728) >[ 24129.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3864d10] >[ 24129.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3864d10] width 1680 pitch 6912 (/4 1728) >[ 24129.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1536d60] >[ 24129.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1536d60] width 1680 pitch 6912 (/4 1728) >[ 24129.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3864d10] >[ 24129.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3864d10] width 1680 pitch 6912 (/4 1728) >[ 24130.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c2e0] >[ 24130.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c2e0] width 1680 pitch 6912 (/4 1728) >[ 24130.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db93c0] >[ 24130.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db93c0] width 1680 pitch 6912 (/4 1728) >[ 24137.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1adb6d0] >[ 24137.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1adb6d0] width 1680 pitch 6912 (/4 1728) >[ 24138.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3951520] >[ 24138.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3951520] width 1680 pitch 6912 (/4 1728) >[ 24139.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395bde0] >[ 24139.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395bde0] width 1680 pitch 6912 (/4 1728) >[ 24139.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24139.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24139.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31563e0] >[ 24139.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31563e0] width 1680 pitch 6912 (/4 1728) >[ 24139.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x190c2e0] >[ 24139.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x190c2e0] width 1680 pitch 6912 (/4 1728) >[ 24139.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91c40] >[ 24139.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91c40] width 1680 pitch 6912 (/4 1728) >[ 24139.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3970d00] >[ 24139.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3970d00] width 1680 pitch 6912 (/4 1728) >[ 24140.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3960fa0] >[ 24140.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3960fa0] width 1680 pitch 6912 (/4 1728) >[ 24140.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b76a10] >[ 24140.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b76a10] width 1680 pitch 6912 (/4 1728) >[ 24311.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aba6a0] >[ 24311.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aba6a0] width 1680 pitch 6912 (/4 1728) >[ 24311.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4130] >[ 24311.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4130] width 1680 pitch 6912 (/4 1728) >[ 24311.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cca350] >[ 24311.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cca350] width 1680 pitch 6912 (/4 1728) >[ 24311.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395bde0] >[ 24311.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395bde0] width 1680 pitch 6912 (/4 1728) >[ 24312.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1db93c0] >[ 24312.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1db93c0] width 1680 pitch 6912 (/4 1728) >[ 24377.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24377.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b68560] >[ 24377.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b68560] width 1680 pitch 6912 (/4 1728) >[ 24377.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24377.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a66f0] >[ 24378.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a66f0] width 1680 pitch 6912 (/4 1728) >[ 24378.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24378.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dbfee0] >[ 24378.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dbfee0] width 1680 pitch 6912 (/4 1728) >[ 24378.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b75c90] >[ 24378.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b75c90] width 1680 pitch 6912 (/4 1728) >[ 24394.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b1bc0] >[ 24394.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b1bc0] width 1680 pitch 6912 (/4 1728) >[ 24394.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b1bc0] >[ 24394.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b1bc0] width 1680 pitch 6912 (/4 1728) >[ 24394.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bacad0] >[ 24394.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bacad0] width 1680 pitch 6912 (/4 1728) >[ 24394.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b1bc0] >[ 24394.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b1bc0] width 1680 pitch 6912 (/4 1728) >[ 24394.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bacad0] >[ 24394.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bacad0] width 1680 pitch 6912 (/4 1728) >[ 24394.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2549940] >[ 24394.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2549940] width 1680 pitch 6912 (/4 1728) >[ 24394.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c02180] >[ 24394.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c02180] width 1680 pitch 6912 (/4 1728) >[ 24394.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b12e0] >[ 24394.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b12e0] width 1680 pitch 6912 (/4 1728) >[ 24394.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bacad0] >[ 24394.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bacad0] width 1680 pitch 6912 (/4 1728) >[ 24394.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b12e0] >[ 24394.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b12e0] width 1680 pitch 6912 (/4 1728) >[ 24394.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bacad0] >[ 24394.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bacad0] width 1680 pitch 6912 (/4 1728) >[ 24394.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b2290] >[ 24394.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b2290] width 1680 pitch 6912 (/4 1728) >[ 24394.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a607e0] >[ 24394.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a607e0] width 1680 pitch 6912 (/4 1728) >[ 24394.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bacad0] >[ 24394.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bacad0] width 1680 pitch 6912 (/4 1728) >[ 24394.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a607e0] >[ 24394.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a607e0] width 1680 pitch 6912 (/4 1728) >[ 24394.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397c440] >[ 24394.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397c440] width 1680 pitch 6912 (/4 1728) >[ 24394.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945810] >[ 24395.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945810] width 1680 pitch 6912 (/4 1728) >[ 24395.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a2e6e0] >[ 24395.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a2e6e0] width 1680 pitch 6912 (/4 1728) >[ 24395.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24395.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24395.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a101a0] >[ 24395.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a101a0] width 1680 pitch 6912 (/4 1728) >[ 24395.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24395.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24395.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a101a0] >[ 24395.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a101a0] width 1680 pitch 6912 (/4 1728) >[ 24395.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24395.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24395.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a101a0] >[ 24395.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a101a0] width 1680 pitch 6912 (/4 1728) >[ 24395.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24395.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24395.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a101a0] >[ 24395.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a101a0] width 1680 pitch 6912 (/4 1728) >[ 24395.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24395.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24395.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a101a0] >[ 24395.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a101a0] width 1680 pitch 6912 (/4 1728) >[ 24395.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24395.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24396.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24396.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24396.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24396.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 24397.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x397af50] >[ 24397.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x397af50] width 1680 pitch 6912 (/4 1728) >[ 24397.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947000] >[ 24397.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947000] width 1680 pitch 6912 (/4 1728) >[ 25048.879] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 25048.879] (II) RADEON(0): Using hsync ranges from config file >[ 25048.879] (II) RADEON(0): Using vrefresh ranges from config file >[ 25048.879] (II) RADEON(0): Printing DDC gathered Modelines: >[ 25048.879] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 25048.879] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 25048.879] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 25048.880] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 25048.880] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 25048.880] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 25048.880] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 25048.880] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 25139.485] (II) RADEON(0): RADEONSaveScreen(2) >[ 25139.485] (II) RADEON(0): RADEONSaveScreen(0) >[ 27150.134] (II) RADEON(0): RADEONSaveScreen(1) >[ 27157.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c6acc0] >[ 27157.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c6acc0] width 1680 pitch 6912 (/4 1728) >[ 27159.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18fab10] >[ 27159.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18fab10] width 1680 pitch 6912 (/4 1728) >[ 27159.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bbe0a0] >[ 27159.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bbe0a0] width 1680 pitch 6912 (/4 1728) >[ 27160.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4130] >[ 27160.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4130] width 1680 pitch 6912 (/4 1728) >[ 28163.334] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 28163.334] (II) RADEON(0): Using hsync ranges from config file >[ 28163.334] (II) RADEON(0): Using vrefresh ranges from config file >[ 28163.334] (II) RADEON(0): Printing DDC gathered Modelines: >[ 28163.334] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 28163.334] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 28163.334] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 28163.335] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 28253.484] (II) RADEON(0): RADEONSaveScreen(2) >[ 28253.484] (II) RADEON(0): RADEONSaveScreen(0) >[ 31255.772] (II) AIGLX: Suspending AIGLX clients for VT switch >[ 31255.772] (II) RADEON(0): RADEONLeaveVT_KMS >[ 31255.772] (II) RADEON(0): Ok, leaving now... >[ 31264.704] (II) AIGLX: Resuming AIGLX clients after VT switch >[ 31264.704] (II) RADEON(0): RADEONEnterVT_KMS >[ 31264.737] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 31264.737] (II) RADEON(0): Using hsync ranges from config file >[ 31264.737] (II) RADEON(0): Using vrefresh ranges from config file >[ 31264.737] (II) RADEON(0): Printing DDC gathered Modelines: >[ 31264.737] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 31264.738] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 31264.738] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 31264.779] (II) RADEON(0): RADEONSaveScreen(2) >[ 31264.779] (II) RADEON(0): RADEONSaveScreen(1) >[ 31275.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a53920] >[ 31275.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a53920] width 1680 pitch 6912 (/4 1728) >[ 31322.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c3f1c0] >[ 31322.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c3f1c0] width 1680 pitch 6912 (/4 1728) >[ 31323.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b97e0] >[ 31323.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b97e0] width 1680 pitch 6912 (/4 1728) >[ 31323.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c3f1c0] >[ 31323.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c3f1c0] width 1680 pitch 6912 (/4 1728) >[ 31323.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b97e0] >[ 31323.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b97e0] width 1680 pitch 6912 (/4 1728) >[ 31323.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c3f1c0] >[ 31323.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c3f1c0] width 1680 pitch 6912 (/4 1728) >[ 31323.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19b97e0] >[ 31323.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19b97e0] width 1680 pitch 6912 (/4 1728) >[ 31323.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c3f1c0] >[ 31323.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c3f1c0] width 1680 pitch 6912 (/4 1728) >[ 31327.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8650] >[ 31327.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8650] width 1680 pitch 6912 (/4 1728) >[ 31327.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8650] >[ 31327.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8650] width 1680 pitch 6912 (/4 1728) >[ 31327.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8650] >[ 31327.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8650] width 1680 pitch 6912 (/4 1728) >[ 31327.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8650] >[ 31327.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8650] width 1680 pitch 6912 (/4 1728) >[ 31327.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31acc20] >[ 31327.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31acc20] width 1680 pitch 6912 (/4 1728) >[ 31327.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01a70] >[ 31327.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01a70] width 1680 pitch 6912 (/4 1728) >[ 31327.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01a70] >[ 31327.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01a70] width 1680 pitch 6912 (/4 1728) >[ 31327.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01a70] >[ 31327.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01a70] width 1680 pitch 6912 (/4 1728) >[ 31327.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01a70] >[ 31327.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01a70] width 1680 pitch 6912 (/4 1728) >[ 31327.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31327.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b01a70] >[ 31327.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b01a70] width 1680 pitch 6912 (/4 1728) >[ 31327.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x192cd20] >[ 31327.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x192cd20] width 1680 pitch 6912 (/4 1728) >[ 31331.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31331.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31331.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31331.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 31331.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31331.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31331.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31331.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 31331.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31331.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31331.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31331.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 31331.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31331.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31331.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31331.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 31331.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31331.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31331.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31331.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 31331.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31332.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31332.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31332.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 31332.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad8ab0] >[ 31332.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad8ab0] width 1680 pitch 6912 (/4 1728) >[ 31332.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b91be0] >[ 31332.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b91be0] width 1680 pitch 6912 (/4 1728) >[ 32480.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ddb0] >[ 32480.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ddb0] width 1680 pitch 6912 (/4 1728) >[ 32480.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3a680] >[ 32480.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3a680] width 1680 pitch 6912 (/4 1728) >[ 32501.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aff800] >[ 32501.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aff800] width 1680 pitch 6912 (/4 1728) >[ 32515.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b3a680] >[ 32515.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b3a680] width 1680 pitch 6912 (/4 1728) >[ 32745.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3d5a0] >[ 32745.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3d5a0] width 1680 pitch 6912 (/4 1728) >[ 32745.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c34c80] >[ 32745.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c34c80] width 1680 pitch 6912 (/4 1728) >[ 32765.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1660] >[ 32765.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1660] width 1680 pitch 6912 (/4 1728) >[ 32844.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb6e90] >[ 32844.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb6e90] width 1680 pitch 6912 (/4 1728) >[ 34254.274] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 34254.274] (II) RADEON(0): Using hsync ranges from config file >[ 34254.274] (II) RADEON(0): Using vrefresh ranges from config file >[ 34254.274] (II) RADEON(0): Printing DDC gathered Modelines: >[ 34254.274] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 34254.274] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 34254.274] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 34254.275] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 34254.275] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 34280.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c88ae0] >[ 34280.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c88ae0] width 1680 pitch 6912 (/4 1728) >[ 34996.796] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 34996.796] (II) RADEON(0): Using hsync ranges from config file >[ 34996.796] (II) RADEON(0): Using vrefresh ranges from config file >[ 34996.796] (II) RADEON(0): Printing DDC gathered Modelines: >[ 34996.796] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 34996.796] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 34996.796] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 35087.511] (II) RADEON(0): RADEONSaveScreen(2) >[ 35087.511] (II) RADEON(0): RADEONSaveScreen(0) >[ 38091.693] (II) AIGLX: Suspending AIGLX clients for VT switch >[ 38091.816] (II) RADEON(0): RADEONLeaveVT_KMS >[ 38091.816] (II) RADEON(0): Ok, leaving now... >[ 38100.296] (II) AIGLX: Resuming AIGLX clients after VT switch >[ 38100.381] (II) RADEON(0): RADEONEnterVT_KMS >[ 38100.414] (II) RADEON(0): EDID vendor "SAM", prod id 637 >[ 38100.414] (II) RADEON(0): Using hsync ranges from config file >[ 38100.414] (II) RADEON(0): Using vrefresh ranges from config file >[ 38100.414] (II) RADEON(0): Printing DDC gathered Modelines: >[ 38100.414] (II) RADEON(0): Modeline "1680x1050"x0.0 119.00 1680 1728 1760 1840 1050 1053 1059 1080 +hsync -vsync (64.7 kHz eP) >[ 38100.414] (II) RADEON(0): Modeline "800x600"x0.0 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "800x600"x0.0 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "640x480"x0.0 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "640x480"x0.0 30.24 640 704 768 864 480 483 486 525 -hsync -vsync (35.0 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "640x480"x0.0 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "720x400"x0.0 28.32 720 738 846 900 400 412 414 449 -hsync +vsync (31.5 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1280x1024"x0.0 135.00 1280 1296 1440 1688 1024 1025 1028 1066 +hsync +vsync (80.0 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1024x768"x0.0 78.75 1024 1040 1136 1312 768 769 772 800 +hsync +vsync (60.0 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1024x768"x0.0 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1024x768"x0.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "832x624"x0.0 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "800x600"x0.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "800x600"x0.0 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1152x864"x0.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1280x1024"x0.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz e) >[ 38100.414] (II) RADEON(0): Modeline "1280x960"x0.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz e) >[ 38100.456] (II) RADEON(0): RADEONSaveScreen(2) >[ 38100.456] (II) RADEON(0): RADEONSaveScreen(1) >[ 38112.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a101f0] >[ 38112.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a101f0] width 1680 pitch 6912 (/4 1728) >[ 39852.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bbcae0] >[ 39852.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bbcae0] width 1680 pitch 6912 (/4 1728) >[ 39852.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b00820] >[ 39852.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b00820] width 1680 pitch 6912 (/4 1728) >[ 40147.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40147.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f8060] >[ 40147.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f8060] width 1680 pitch 6912 (/4 1728) >[ 40147.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a4c0] >[ 40147.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a4c0] width 1680 pitch 6912 (/4 1728) >[ 40152.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c357b0] >[ 40152.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c357b0] width 1680 pitch 6912 (/4 1728) >[ 40152.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3210] >[ 40153.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3210] width 1680 pitch 6912 (/4 1728) >[ 40153.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31da7f0] >[ 40153.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31da7f0] width 1680 pitch 6912 (/4 1728) >[ 40153.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3210] >[ 40153.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3210] width 1680 pitch 6912 (/4 1728) >[ 40153.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31da7f0] >[ 40153.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31da7f0] width 1680 pitch 6912 (/4 1728) >[ 40153.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3210] >[ 40153.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3210] width 1680 pitch 6912 (/4 1728) >[ 40153.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31da7f0] >[ 40153.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31da7f0] width 1680 pitch 6912 (/4 1728) >[ 40153.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3210] >[ 40153.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3210] width 1680 pitch 6912 (/4 1728) >[ 40153.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31da7f0] >[ 40153.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31da7f0] width 1680 pitch 6912 (/4 1728) >[ 40153.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3154000] >[ 40153.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3154000] width 1680 pitch 6912 (/4 1728) >[ 40153.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be1ff0] >[ 40153.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be1ff0] width 1680 pitch 6912 (/4 1728) >[ 40153.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3154000] >[ 40153.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3154000] width 1680 pitch 6912 (/4 1728) >[ 40153.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be1ff0] >[ 40153.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be1ff0] width 1680 pitch 6912 (/4 1728) >[ 40153.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3154000] >[ 40153.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3154000] width 1680 pitch 6912 (/4 1728) >[ 40153.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be1ff0] >[ 40153.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be1ff0] width 1680 pitch 6912 (/4 1728) >[ 40153.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3154000] >[ 40153.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3154000] width 1680 pitch 6912 (/4 1728) >[ 40153.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be1ff0] >[ 40153.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be1ff0] width 1680 pitch 6912 (/4 1728) >[ 40174.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1abd600] >[ 40174.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1abd600] width 1680 pitch 6912 (/4 1728) >[ 40174.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc30b0] >[ 40174.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc30b0] width 1680 pitch 6912 (/4 1728) >[ 40174.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbe10] >[ 40174.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbe10] width 1680 pitch 6912 (/4 1728) >[ 40174.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbcc0] >[ 40174.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbcc0] width 1680 pitch 6912 (/4 1728) >[ 40174.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcb050] >[ 40175.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcb050] width 1680 pitch 6912 (/4 1728) >[ 40175.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3beffa0] >[ 40175.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3beffa0] width 1680 pitch 6912 (/4 1728) >[ 40175.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a609a0] >[ 40175.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a609a0] width 1680 pitch 6912 (/4 1728) >[ 40175.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb27d0] >[ 40175.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb27d0] width 1680 pitch 6912 (/4 1728) >[ 40175.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a609a0] >[ 40175.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a609a0] width 1680 pitch 6912 (/4 1728) >[ 40175.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb27d0] >[ 40175.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb27d0] width 1680 pitch 6912 (/4 1728) >[ 40175.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a609a0] >[ 40175.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a609a0] width 1680 pitch 6912 (/4 1728) >[ 40175.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb27d0] >[ 40175.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb27d0] width 1680 pitch 6912 (/4 1728) >[ 40175.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a609a0] >[ 40175.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a609a0] width 1680 pitch 6912 (/4 1728) >[ 40175.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb27d0] >[ 40175.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb27d0] width 1680 pitch 6912 (/4 1728) >[ 40176.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40176.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40176.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cb91a0] >[ 40176.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cb91a0] width 1680 pitch 6912 (/4 1728) >[ 40176.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f900] >[ 40177.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f900] width 1680 pitch 6912 (/4 1728) >[ 40560.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40560.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40560.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40560.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b87f50] >[ 40560.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b87f50] width 1680 pitch 6912 (/4 1728) >[ 40561.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3e480] >[ 40561.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3e480] width 1680 pitch 6912 (/4 1728) >[ 40561.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40561.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40561.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3e480] >[ 40561.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3e480] width 1680 pitch 6912 (/4 1728) >[ 40561.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40561.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40561.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3e480] >[ 40561.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3e480] width 1680 pitch 6912 (/4 1728) >[ 40561.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40561.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40561.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0500] >[ 40561.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0500] width 1680 pitch 6912 (/4 1728) >[ 40561.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40561.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40561.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0500] >[ 40561.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0500] width 1680 pitch 6912 (/4 1728) >[ 40561.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b59ba0] >[ 40561.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b59ba0] width 1680 pitch 6912 (/4 1728) >[ 40561.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0500] >[ 40561.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0500] width 1680 pitch 6912 (/4 1728) >[ 40561.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1c730] >[ 40561.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1c730] width 1680 pitch 6912 (/4 1728) >[ 40561.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0500] >[ 40561.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0500] width 1680 pitch 6912 (/4 1728) >[ 40561.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1c730] >[ 40561.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1c730] width 1680 pitch 6912 (/4 1728) >[ 40561.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0500] >[ 40561.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0500] width 1680 pitch 6912 (/4 1728) >[ 40561.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1c730] >[ 40561.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1c730] width 1680 pitch 6912 (/4 1728) >[ 40561.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0500] >[ 40561.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0500] width 1680 pitch 6912 (/4 1728) >[ 40739.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ba6040] >[ 40739.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ba6040] width 1680 pitch 6912 (/4 1728) >[ 40739.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b39820] >[ 40739.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b39820] width 1680 pitch 6912 (/4 1728) >[ 40739.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ad7e80] >[ 40739.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ad7e80] width 1680 pitch 6912 (/4 1728) >[ 40739.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31e4140] >[ 40739.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31e4140] width 1680 pitch 6912 (/4 1728) >[ 40739.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31e4140] >[ 40739.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31e4140] width 1680 pitch 6912 (/4 1728) >[ 40744.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc4a60] >[ 40744.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc4a60] width 1680 pitch 6912 (/4 1728) >[ 40786.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5da0] >[ 40786.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5da0] width 1680 pitch 6912 (/4 1728) >[ 40787.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c19d00] >[ 40787.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c19d00] width 1680 pitch 6912 (/4 1728) >[ 40787.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5da0] >[ 40787.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5da0] width 1680 pitch 6912 (/4 1728) >[ 40787.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5da0] >[ 40787.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5da0] width 1680 pitch 6912 (/4 1728) >[ 40787.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c19d00] >[ 40787.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c19d00] width 1680 pitch 6912 (/4 1728) >[ 40793.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b54370] >[ 40793.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b54370] width 1680 pitch 6912 (/4 1728) >[ 40793.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc4740] >[ 40793.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc4740] width 1680 pitch 6912 (/4 1728) >[ 40793.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b1a590] >[ 40793.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b1a590] width 1680 pitch 6912 (/4 1728) >[ 40817.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0dce0] >[ 40817.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0dce0] width 1680 pitch 6912 (/4 1728) >[ 40817.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b41110] >[ 40817.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b41110] width 1680 pitch 6912 (/4 1728) >[ 40820.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6a670] >[ 40820.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6a670] width 1680 pitch 6912 (/4 1728) >[ 40820.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5da0] >[ 40820.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5da0] width 1680 pitch 6912 (/4 1728) >[ 40820.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b41110] >[ 40820.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b41110] width 1680 pitch 6912 (/4 1728) >[ 40873.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40873.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40873.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40873.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40873.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40873.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40873.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40874.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40874.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40874.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40874.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40874.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40874.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40874.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40874.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40874.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40874.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbc710] >[ 40874.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbc710] width 1680 pitch 6912 (/4 1728) >[ 40874.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f6a90] >[ 40874.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f6a90] width 1680 pitch 6912 (/4 1728) >[ 40874.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f6a90] >[ 40874.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f6a90] width 1680 pitch 6912 (/4 1728) >[ 40874.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f6a90] >[ 40874.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f6a90] width 1680 pitch 6912 (/4 1728) >[ 40874.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b5e6e0] >[ 40874.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b5e6e0] width 1680 pitch 6912 (/4 1728) >[ 40874.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b5e6e0] >[ 40874.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b5e6e0] width 1680 pitch 6912 (/4 1728) >[ 40874.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a3f0] >[ 40874.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a3f0] width 1680 pitch 6912 (/4 1728) >[ 40874.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40874.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x19defb0] >[ 40874.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x19defb0] width 1680 pitch 6912 (/4 1728) >[ 40874.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b5e6e0] >[ 40874.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b5e6e0] width 1680 pitch 6912 (/4 1728) >[ 40874.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a3f0] >[ 40874.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a3f0] width 1680 pitch 6912 (/4 1728) >[ 40874.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a9db0] >[ 40874.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a9db0] width 1680 pitch 6912 (/4 1728) >[ 40921.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d120a0] >[ 40921.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d120a0] width 1680 pitch 6912 (/4 1728) >[ 41027.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e61d0] >[ 41027.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e61d0] width 1680 pitch 6912 (/4 1728) >[ 41027.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d112d0] >[ 41027.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d112d0] width 1680 pitch 6912 (/4 1728) >[ 41027.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cba530] >[ 41027.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cba530] width 1680 pitch 6912 (/4 1728) >[ 41027.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18f3f60] >[ 41027.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18f3f60] width 1680 pitch 6912 (/4 1728) >[ 41067.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41068.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41068.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41068.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbbd40] >[ 41068.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbbd40] width 1680 pitch 6912 (/4 1728) >[ 41069.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afb900] >[ 41069.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afb900] width 1680 pitch 6912 (/4 1728) >[ 41069.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41069.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41069.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afb900] >[ 41069.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afb900] width 1680 pitch 6912 (/4 1728) >[ 41069.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41069.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41069.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afb900] >[ 41069.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afb900] width 1680 pitch 6912 (/4 1728) >[ 41069.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41069.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41069.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afb900] >[ 41069.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afb900] width 1680 pitch 6912 (/4 1728) >[ 41069.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afb900] >[ 41069.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afb900] width 1680 pitch 6912 (/4 1728) >[ 41069.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c820] >[ 41069.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c820] width 1680 pitch 6912 (/4 1728) >[ 41069.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41069.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41069.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c820] >[ 41069.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c820] width 1680 pitch 6912 (/4 1728) >[ 41069.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41069.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41069.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c820] >[ 41069.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c820] width 1680 pitch 6912 (/4 1728) >[ 41069.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12e20] >[ 41069.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12e20] width 1680 pitch 6912 (/4 1728) >[ 41069.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12ec0] >[ 41069.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12ec0] width 1680 pitch 6912 (/4 1728) >[ 41286.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41286.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35300] >[ 41286.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35300] width 1680 pitch 6912 (/4 1728) >[ 41286.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cfc0] >[ 41286.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cfc0] width 1680 pitch 6912 (/4 1728) >[ 41287.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7f8e0] >[ 41287.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7f8e0] width 1680 pitch 6912 (/4 1728) >[ 41287.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a7d30] >[ 41287.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a7d30] width 1680 pitch 6912 (/4 1728) >[ 41287.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0830] >[ 41287.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0830] width 1680 pitch 6912 (/4 1728) >[ 41287.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31f90e0] >[ 41287.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31f90e0] width 1680 pitch 6912 (/4 1728) >[ 41287.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0960] >[ 41287.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0960] width 1680 pitch 6912 (/4 1728) >[ 41287.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31f90e0] >[ 41287.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31f90e0] width 1680 pitch 6912 (/4 1728) >[ 41287.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0960] >[ 41287.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0960] width 1680 pitch 6912 (/4 1728) >[ 41287.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31f90e0] >[ 41287.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31f90e0] width 1680 pitch 6912 (/4 1728) >[ 41287.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0960] >[ 41287.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0960] width 1680 pitch 6912 (/4 1728) >[ 41287.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31f90e0] >[ 41287.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31f90e0] width 1680 pitch 6912 (/4 1728) >[ 41287.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0960] >[ 41287.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0960] width 1680 pitch 6912 (/4 1728) >[ 41287.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0830] >[ 41287.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0830] width 1680 pitch 6912 (/4 1728) >[ 41287.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7f8e0] >[ 41287.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7f8e0] width 1680 pitch 6912 (/4 1728) >[ 41287.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d126c0] >[ 41287.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d126c0] width 1680 pitch 6912 (/4 1728) >[ 41287.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0960] >[ 41287.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0960] width 1680 pitch 6912 (/4 1728) >[ 41287.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d126c0] >[ 41287.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d126c0] width 1680 pitch 6912 (/4 1728) >[ 41287.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bb0960] >[ 41287.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bb0960] width 1680 pitch 6912 (/4 1728) >[ 41292.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41292.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41292.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41292.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41292.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41292.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41292.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41293.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41293.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41293.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41293.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41293.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41293.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e326a0] >[ 41293.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e326a0] width 1680 pitch 6912 (/4 1728) >[ 41293.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8700] >[ 41293.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8700] width 1680 pitch 6912 (/4 1728) >[ 41295.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87020] >[ 41295.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87020] width 1680 pitch 6912 (/4 1728) >[ 41295.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a7d30] >[ 41295.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a7d30] width 1680 pitch 6912 (/4 1728) >[ 41295.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7190] >[ 41295.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7190] width 1680 pitch 6912 (/4 1728) >[ 41295.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f5cc0] >[ 41295.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f5cc0] width 1680 pitch 6912 (/4 1728) >[ 41295.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85b10] >[ 41295.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85b10] width 1680 pitch 6912 (/4 1728) >[ 41295.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e32680] >[ 41295.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e32680] width 1680 pitch 6912 (/4 1728) >[ 41295.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb2fa0] >[ 41295.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb2fa0] width 1680 pitch 6912 (/4 1728) >[ 41295.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85b10] >[ 41295.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85b10] width 1680 pitch 6912 (/4 1728) >[ 41295.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f5cc0] >[ 41295.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f5cc0] width 1680 pitch 6912 (/4 1728) >[ 41295.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a7d30] >[ 41295.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a7d30] width 1680 pitch 6912 (/4 1728) >[ 41295.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39a7d30] >[ 41295.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39a7d30] width 1680 pitch 6912 (/4 1728) >[ 41295.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f5cc0] >[ 41295.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f5cc0] width 1680 pitch 6912 (/4 1728) >[ 41295.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85b10] >[ 41295.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85b10] width 1680 pitch 6912 (/4 1728) >[ 41295.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b6cd30] >[ 41295.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b6cd30] width 1680 pitch 6912 (/4 1728) >[ 41295.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbb850] >[ 41295.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbb850] width 1680 pitch 6912 (/4 1728) >[ 41295.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b6cd30] >[ 41295.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b6cd30] width 1680 pitch 6912 (/4 1728) >[ 41295.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbb850] >[ 41295.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbb850] width 1680 pitch 6912 (/4 1728) >[ 41314.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41314.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41314.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41314.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41314.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41314.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41314.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41314.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41314.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41314.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41314.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41314.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41314.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41315.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41315.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41315.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41315.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41315.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41315.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41315.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41315.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41315.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41315.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41315.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41315.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41315.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41315.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41315.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41315.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41315.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41315.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c828e0] >[ 41315.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c828e0] width 1680 pitch 6912 (/4 1728) >[ 41315.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7090] >[ 41315.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7090] width 1680 pitch 6912 (/4 1728) >[ 41315.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82940] >[ 41315.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82940] width 1680 pitch 6912 (/4 1728) >[ 41315.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb47e0] >[ 41315.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb47e0] width 1680 pitch 6912 (/4 1728) >[ 41315.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84420] >[ 41315.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84420] width 1680 pitch 6912 (/4 1728) >[ 41315.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb47e0] >[ 41315.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb47e0] width 1680 pitch 6912 (/4 1728) >[ 41315.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84420] >[ 41315.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84420] width 1680 pitch 6912 (/4 1728) >[ 41315.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb47e0] >[ 41315.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb47e0] width 1680 pitch 6912 (/4 1728) >[ 41315.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82940] >[ 41315.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82940] width 1680 pitch 6912 (/4 1728) >[ 41315.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88ba0] >[ 41315.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88ba0] width 1680 pitch 6912 (/4 1728) >[ 41315.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb3ce0] >[ 41315.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb3ce0] width 1680 pitch 6912 (/4 1728) >[ 41315.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb47e0] >[ 41316.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb47e0] width 1680 pitch 6912 (/4 1728) >[ 41316.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84420] >[ 41316.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84420] width 1680 pitch 6912 (/4 1728) >[ 41316.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88ba0] >[ 41316.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88ba0] width 1680 pitch 6912 (/4 1728) >[ 41316.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85b10] >[ 41316.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85b10] width 1680 pitch 6912 (/4 1728) >[ 41316.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e930] >[ 41316.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e930] width 1680 pitch 6912 (/4 1728) >[ 41316.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d126c0] >[ 41316.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d126c0] width 1680 pitch 6912 (/4 1728) >[ 41316.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e930] >[ 41316.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e930] width 1680 pitch 6912 (/4 1728) >[ 41316.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d126c0] >[ 41316.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d126c0] width 1680 pitch 6912 (/4 1728) >[ 41436.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 41436.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 41436.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 41436.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 41436.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 41436.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 41477.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f290] >[ 41477.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f290] width 1680 pitch 6912 (/4 1728) >[ 41477.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 41477.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 41480.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 41480.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 41480.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x198c460] >[ 41480.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x198c460] width 1680 pitch 6912 (/4 1728) >[ 41480.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a5b20] >[ 41480.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a5b20] width 1680 pitch 6912 (/4 1728) >[ 41588.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x387db70] >[ 41588.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x387db70] width 1680 pitch 6912 (/4 1728) >[ 41588.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c83820] >[ 41588.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c83820] width 1680 pitch 6912 (/4 1728) >[ 41589.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb5e50] >[ 41589.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb5e50] width 1680 pitch 6912 (/4 1728) >[ 41696.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07930] >[ 41696.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07930] width 1680 pitch 6912 (/4 1728) >[ 41696.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a47d10] >[ 41696.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a47d10] width 1680 pitch 6912 (/4 1728) >[ 41696.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a47d10] >[ 41696.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a47d10] width 1680 pitch 6912 (/4 1728) >[ 41699.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740] >[ 41699.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1680 pitch 6912 (/4 1728) >[ 41720.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41720.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41720.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41720.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41720.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41721.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41721.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41721.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41721.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41721.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41721.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41721.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41721.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41721.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41721.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41721.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41721.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41721.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41721.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41721.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41721.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41721.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41721.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad47e0] >[ 41721.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad47e0] width 1680 pitch 6912 (/4 1728) >[ 41722.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e20] >[ 41722.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e20] width 1680 pitch 6912 (/4 1728) >[ 41722.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e20] >[ 41722.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e20] width 1680 pitch 6912 (/4 1728) >[ 41722.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e20] >[ 41722.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e20] width 1680 pitch 6912 (/4 1728) >[ 41722.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e20] >[ 41722.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e20] width 1680 pitch 6912 (/4 1728) >[ 41722.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e20] >[ 41722.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e20] width 1680 pitch 6912 (/4 1728) >[ 41722.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4d30] >[ 41722.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4d30] width 1680 pitch 6912 (/4 1728) >[ 41722.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4d30] >[ 41722.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4d30] width 1680 pitch 6912 (/4 1728) >[ 41722.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d550] >[ 41722.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d550] width 1680 pitch 6912 (/4 1728) >[ 41722.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4d30] >[ 41722.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4d30] width 1680 pitch 6912 (/4 1728) >[ 41726.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41726.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accc40] >[ 41726.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accc40] width 1680 pitch 6912 (/4 1728) >[ 41726.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c10c90] >[ 41726.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c10c90] width 1680 pitch 6912 (/4 1728) >[ 41727.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a480b0] >[ 41727.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a480b0] width 1680 pitch 6912 (/4 1728) >[ 41727.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7330] >[ 41727.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7330] width 1680 pitch 6912 (/4 1728) >[ 41727.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7ff20] >[ 41727.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7ff20] width 1680 pitch 6912 (/4 1728) >[ 41727.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a480b0] >[ 41727.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a480b0] width 1680 pitch 6912 (/4 1728) >[ 41727.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7330] >[ 41727.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7330] width 1680 pitch 6912 (/4 1728) >[ 41727.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a480b0] >[ 41727.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a480b0] width 1680 pitch 6912 (/4 1728) >[ 41727.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7330] >[ 41727.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7330] width 1680 pitch 6912 (/4 1728) >[ 41727.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49120] >[ 41727.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49120] width 1680 pitch 6912 (/4 1728) >[ 41727.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7330] >[ 41727.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7330] width 1680 pitch 6912 (/4 1728) >[ 41727.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171950] >[ 41727.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171950] width 1680 pitch 6912 (/4 1728) >[ 41727.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171120] >[ 41727.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171120] width 1680 pitch 6912 (/4 1728) >[ 41727.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171950] >[ 41727.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171950] width 1680 pitch 6912 (/4 1728) >[ 41727.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171120] >[ 41727.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171120] width 1680 pitch 6912 (/4 1728) >[ 41727.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171950] >[ 41727.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171950] width 1680 pitch 6912 (/4 1728) >[ 41727.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171120] >[ 41727.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171120] width 1680 pitch 6912 (/4 1728) >[ 41727.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171950] >[ 41727.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171950] width 1680 pitch 6912 (/4 1728) >[ 41737.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4dc0] >[ 41737.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4dc0] width 1680 pitch 6912 (/4 1728) >[ 41737.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41737.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d70] >[ 41737.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d70] width 1680 pitch 6912 (/4 1728) >[ 41737.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad4e00] >[ 41737.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad4e00] width 1680 pitch 6912 (/4 1728) >[ 41741.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81de0] >[ 41741.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81de0] width 1680 pitch 6912 (/4 1728) >[ 41741.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1dd30] >[ 41741.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1dd30] width 1680 pitch 6912 (/4 1728) >[ 41741.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81de0] >[ 41741.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81de0] width 1680 pitch 6912 (/4 1728) >[ 41741.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1dd30] >[ 41741.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1dd30] width 1680 pitch 6912 (/4 1728) >[ 41741.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d81de0] >[ 41741.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d81de0] width 1680 pitch 6912 (/4 1728) >[ 41741.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1dd30] >[ 41741.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1dd30] width 1680 pitch 6912 (/4 1728) >[ 41741.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41741.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41741.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1dd30] >[ 41741.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1dd30] width 1680 pitch 6912 (/4 1728) >[ 41741.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41741.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41741.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c1dd30] >[ 41741.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c1dd30] width 1680 pitch 6912 (/4 1728) >[ 41741.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41741.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41741.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a47c0] >[ 41741.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a47c0] width 1680 pitch 6912 (/4 1728) >[ 41741.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41741.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41741.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171950] >[ 41741.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171950] width 1680 pitch 6912 (/4 1728) >[ 41741.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a47c0] >[ 41741.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a47c0] width 1680 pitch 6912 (/4 1728) >[ 41741.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3171950] >[ 41741.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3171950] width 1680 pitch 6912 (/4 1728) >[ 41741.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31a47c0] >[ 41741.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31a47c0] width 1680 pitch 6912 (/4 1728) >[ 41745.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41745.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9e50] >[ 41745.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9e50] width 1680 pitch 6912 (/4 1728) >[ 41745.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41745.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41746.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fda0] >[ 41746.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fda0] width 1680 pitch 6912 (/4 1728) >[ 41746.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acac40] >[ 41746.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acac40] width 1680 pitch 6912 (/4 1728) >[ 41750.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41750.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41750.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41750.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4f70] >[ 41750.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4f70] width 1680 pitch 6912 (/4 1728) >[ 41752.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acc7f0] >[ 41752.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acc7f0] width 1680 pitch 6912 (/4 1728) >[ 41752.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d126c0] >[ 41752.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d126c0] width 1680 pitch 6912 (/4 1728) >[ 41752.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41752.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d126c0] >[ 41752.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d126c0] width 1680 pitch 6912 (/4 1728) >[ 41752.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eb790] >[ 41752.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eb790] width 1680 pitch 6912 (/4 1728) >[ 41872.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41872.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41872.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41872.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0af0] >[ 41872.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0af0] width 1680 pitch 6912 (/4 1728) >[ 41875.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9940] >[ 41875.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9940] width 1680 pitch 6912 (/4 1728) >[ 41875.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9940] >[ 41875.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9940] width 1680 pitch 6912 (/4 1728) >[ 41875.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9940] >[ 41875.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9940] width 1680 pitch 6912 (/4 1728) >[ 41875.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41875.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41875.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ad1200] >[ 41875.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ad1200] width 1680 pitch 6912 (/4 1728) >[ 41875.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aaa970] >[ 41875.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aaa970] width 1680 pitch 6912 (/4 1728) >[ 41875.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acd410] >[ 41875.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acd410] width 1680 pitch 6912 (/4 1728) >[ 41875.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a480b0] >[ 41875.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a480b0] width 1680 pitch 6912 (/4 1728) >[ 41875.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aaa970] >[ 41875.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aaa970] width 1680 pitch 6912 (/4 1728) >[ 41875.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a480b0] >[ 41875.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a480b0] width 1680 pitch 6912 (/4 1728) >[ 41875.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aaa970] >[ 41875.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aaa970] width 1680 pitch 6912 (/4 1728) >[ 42088.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9a970] >[ 42088.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9a970] width 1680 pitch 6912 (/4 1728) >[ 42088.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 42088.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 42088.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 42088.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 42090.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 42090.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 42090.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ee890] >[ 42091.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ee890] width 1680 pitch 6912 (/4 1728) >[ 42091.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd3a0] >[ 42091.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd3a0] width 1680 pitch 6912 (/4 1728) >[ 42203.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d4f0] >[ 42203.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d4f0] width 1680 pitch 6912 (/4 1728) >[ 42203.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07930] >[ 42203.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07930] width 1680 pitch 6912 (/4 1728) >[ 42203.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c14300] >[ 42203.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c14300] width 1680 pitch 6912 (/4 1728) >[ 42204.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07930] >[ 42204.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07930] width 1680 pitch 6912 (/4 1728) >[ 42204.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c14300] >[ 42204.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c14300] width 1680 pitch 6912 (/4 1728) >[ 42204.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07930] >[ 42204.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07930] width 1680 pitch 6912 (/4 1728) >[ 42204.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c14300] >[ 42204.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c14300] width 1680 pitch 6912 (/4 1728) >[ 42204.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07930] >[ 42205.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07930] width 1680 pitch 6912 (/4 1728) >[ 42622.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41e10] >[ 42622.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41e10] width 1680 pitch 6912 (/4 1728) >[ 42622.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42df0] >[ 42622.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42df0] width 1680 pitch 6912 (/4 1728) >[ 42622.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41e10] >[ 42622.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41e10] width 1680 pitch 6912 (/4 1728) >[ 42622.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42df0] >[ 42622.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42df0] width 1680 pitch 6912 (/4 1728) >[ 42622.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41e10] >[ 42622.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41e10] width 1680 pitch 6912 (/4 1728) >[ 42622.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42df0] >[ 42622.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42df0] width 1680 pitch 6912 (/4 1728) >[ 42622.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41e10] >[ 42622.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41e10] width 1680 pitch 6912 (/4 1728) >[ 42622.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42df0] >[ 42622.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42df0] width 1680 pitch 6912 (/4 1728) >[ 42622.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41e10] >[ 42622.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41e10] width 1680 pitch 6912 (/4 1728) >[ 42622.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42df0] >[ 42622.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42df0] width 1680 pitch 6912 (/4 1728) >[ 42622.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e41e10] >[ 42622.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e41e10] width 1680 pitch 6912 (/4 1728) >[ 42622.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e42df0] >[ 42622.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e42df0] width 1680 pitch 6912 (/4 1728) >[ 42622.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d190] >[ 42622.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d190] width 1680 pitch 6912 (/4 1728) >[ 42622.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f910] >[ 42622.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f910] width 1680 pitch 6912 (/4 1728) >[ 42622.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2ec0] >[ 42622.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2ec0] width 1680 pitch 6912 (/4 1728) >[ 42622.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f910] >[ 42622.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f910] width 1680 pitch 6912 (/4 1728) >[ 42622.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2ec0] >[ 42622.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2ec0] width 1680 pitch 6912 (/4 1728) >[ 42622.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f910] >[ 42622.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f910] width 1680 pitch 6912 (/4 1728) >[ 42622.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2ec0] >[ 42622.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2ec0] width 1680 pitch 6912 (/4 1728) >[ 42622.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f910] >[ 42622.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f910] width 1680 pitch 6912 (/4 1728) >[ 42622.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2ec0] >[ 42622.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2ec0] width 1680 pitch 6912 (/4 1728) >[ 42622.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f910] >[ 42622.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f910] width 1680 pitch 6912 (/4 1728) >[ 42622.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f5d0] >[ 42622.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f5d0] width 1680 pitch 6912 (/4 1728) >[ 42622.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3bb00] >[ 42622.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3bb00] width 1680 pitch 6912 (/4 1728) >[ 42622.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3bb00] >[ 42622.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3bb00] width 1680 pitch 6912 (/4 1728) >[ 42916.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2260] >[ 42916.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2260] width 1680 pitch 6912 (/4 1728) >[ 42951.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e34f20] >[ 42951.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e34f20] width 1680 pitch 6912 (/4 1728) >[ 42951.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4050] >[ 42951.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4050] width 1680 pitch 6912 (/4 1728) >[ 42952.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b840] >[ 42952.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b840] width 1680 pitch 6912 (/4 1728) >[ 42952.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4050] >[ 42952.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4050] width 1680 pitch 6912 (/4 1728) >[ 42952.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e34f20] >[ 42952.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e34f20] width 1680 pitch 6912 (/4 1728) >[ 42953.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca61a0] >[ 42953.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca61a0] width 1680 pitch 6912 (/4 1728) >[ 42953.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 42953.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 42954.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca61a0] >[ 42954.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca61a0] width 1680 pitch 6912 (/4 1728) >[ 42954.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca61a0] >[ 42954.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca61a0] width 1680 pitch 6912 (/4 1728) >[ 42954.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 42954.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 42954.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aaa9d0] >[ 42954.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aaa9d0] width 1680 pitch 6912 (/4 1728) >[ 42974.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af11c0] >[ 42974.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af11c0] width 1680 pitch 6912 (/4 1728) >[ 42974.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0d5e0] >[ 42974.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0d5e0] width 1680 pitch 6912 (/4 1728) >[ 42974.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5e3b0] >[ 42974.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5e3b0] width 1680 pitch 6912 (/4 1728) >[ 42978.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eae60] >[ 42978.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eae60] width 1680 pitch 6912 (/4 1728) >[ 42978.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6e390] >[ 42978.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6e390] width 1680 pitch 6912 (/4 1728) >[ 42978.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eae60] >[ 42978.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eae60] width 1680 pitch 6912 (/4 1728) >[ 42979.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e70ea0] >[ 42979.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e70ea0] width 1680 pitch 6912 (/4 1728) >[ 42980.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c380] >[ 42980.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c380] width 1680 pitch 6912 (/4 1728) >[ 42982.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4ca20] >[ 42982.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4ca20] width 1680 pitch 6912 (/4 1728) >[ 42982.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c380] >[ 42982.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c380] width 1680 pitch 6912 (/4 1728) >[ 42982.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c940] >[ 42982.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c940] width 1680 pitch 6912 (/4 1728) >[ 43000.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b46170] >[ 43000.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b46170] width 1680 pitch 6912 (/4 1728) >[ 43041.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c380] >[ 43041.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c380] width 1680 pitch 6912 (/4 1728) >[ 43042.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebba70] >[ 43042.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebba70] width 1680 pitch 6912 (/4 1728) >[ 43043.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e939c0] >[ 43043.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e939c0] width 1680 pitch 6912 (/4 1728) >[ 43112.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecef10] >[ 43112.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecef10] width 1680 pitch 6912 (/4 1728) >[ 43112.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8b2e0] >[ 43112.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8b2e0] width 1680 pitch 6912 (/4 1728) >[ 43112.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecef10] >[ 43112.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecef10] width 1680 pitch 6912 (/4 1728) >[ 43115.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c780] >[ 43115.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c780] width 1680 pitch 6912 (/4 1728) >[ 43115.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c380] >[ 43115.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c380] width 1680 pitch 6912 (/4 1728) >[ 43115.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8b2e0] >[ 43115.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8b2e0] width 1680 pitch 6912 (/4 1728) >[ 43116.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e85ce0] >[ 43116.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e85ce0] width 1680 pitch 6912 (/4 1728) >[ 43116.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e91120] >[ 43116.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e91120] width 1680 pitch 6912 (/4 1728) >[ 43166.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9a4b0] >[ 43166.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9a4b0] width 1680 pitch 6912 (/4 1728) >[ 43208.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dbc0] >[ 43208.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dbc0] width 1680 pitch 6912 (/4 1728) >[ 43208.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d99290] >[ 43208.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d99290] width 1680 pitch 6912 (/4 1728) >[ 43209.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c0dbc0] >[ 43209.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c0dbc0] width 1680 pitch 6912 (/4 1728) >[ 43298.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7b610] >[ 43298.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7b610] width 1680 pitch 6912 (/4 1728) >[ 43298.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e49980] >[ 43298.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e49980] width 1680 pitch 6912 (/4 1728) >[ 43298.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e49980] >[ 43298.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e49980] width 1680 pitch 6912 (/4 1728) >[ 43435.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7b610] >[ 43435.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7b610] width 1680 pitch 6912 (/4 1728) >[ 43435.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80fd0] >[ 43435.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80fd0] width 1680 pitch 6912 (/4 1728) >[ 43435.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e81310] >[ 43435.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e81310] width 1680 pitch 6912 (/4 1728) >[ 43528.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a960] >[ 43528.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a960] width 1680 pitch 6912 (/4 1728) >[ 43528.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7e7a0] >[ 43528.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7e7a0] width 1680 pitch 6912 (/4 1728) >[ 43528.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e93810] >[ 43528.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e93810] width 1680 pitch 6912 (/4 1728) >[ 43528.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7e7a0] >[ 43528.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7e7a0] width 1680 pitch 6912 (/4 1728) >[ 43528.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a960] >[ 43528.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a960] width 1680 pitch 6912 (/4 1728) >[ 43528.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e93810] >[ 43528.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e93810] width 1680 pitch 6912 (/4 1728) >[ 43528.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7ebc0] >[ 43528.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7ebc0] width 1680 pitch 6912 (/4 1728) >[ 43529.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e93810] >[ 43529.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e93810] width 1680 pitch 6912 (/4 1728) >[ 43529.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e93810] >[ 43529.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e93810] width 1680 pitch 6912 (/4 1728) >[ 43556.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81f70] >[ 43556.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81f70] width 1680 pitch 6912 (/4 1728) >[ 43557.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81f70] >[ 43557.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81f70] width 1680 pitch 6912 (/4 1728) >[ 43559.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6c350] >[ 43559.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6c350] width 1680 pitch 6912 (/4 1728) >[ 43559.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d78b90] >[ 43559.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d78b90] width 1680 pitch 6912 (/4 1728) >[ 43559.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6c350] >[ 43559.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6c350] width 1680 pitch 6912 (/4 1728) >[ 43664.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7cf10] >[ 43664.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7cf10] width 1680 pitch 6912 (/4 1728) >[ 43664.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d88e60] >[ 43664.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d88e60] width 1680 pitch 6912 (/4 1728) >[ 43664.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4aa00] >[ 43664.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4aa00] width 1680 pitch 6912 (/4 1728) >[ 43814.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3530] >[ 43814.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3530] width 1680 pitch 6912 (/4 1728) >[ 44015.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 44015.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 44015.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6a100] >[ 44015.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6a100] width 1680 pitch 6912 (/4 1728) >[ 44026.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6a100] >[ 44026.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6a100] width 1680 pitch 6912 (/4 1728) >[ 44028.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb55b0] >[ 44028.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb55b0] width 1680 pitch 6912 (/4 1728) >[ 44045.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6a100] >[ 44045.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6a100] width 1680 pitch 6912 (/4 1728) >[ 44045.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6a100] >[ 44045.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6a100] width 1680 pitch 6912 (/4 1728) >[ 44052.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0550] >[ 44052.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0550] width 1680 pitch 6912 (/4 1728) >[ 44052.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5ce30] >[ 44052.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5ce30] width 1680 pitch 6912 (/4 1728) >[ 44053.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44053.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44053.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44053.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44053.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44053.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44053.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44053.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44054.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44054.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44054.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44054.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44054.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44054.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44054.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44054.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44055.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44055.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44055.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44055.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44055.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44055.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44057.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44057.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44057.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5ce30] >[ 44057.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5ce30] width 1680 pitch 6912 (/4 1728) >[ 44059.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44059.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44060.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44060.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44060.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44060.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44060.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a48110] >[ 44060.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a48110] width 1680 pitch 6912 (/4 1728) >[ 44066.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97cf0] >[ 44066.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97cf0] width 1680 pitch 6912 (/4 1728) >[ 44066.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a980] >[ 44066.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a980] width 1680 pitch 6912 (/4 1728) >[ 44066.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a980] >[ 44066.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a980] width 1680 pitch 6912 (/4 1728) >[ 44070.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4a060] >[ 44070.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4a060] width 1680 pitch 6912 (/4 1728) >[ 44070.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d13040] >[ 44070.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d13040] width 1680 pitch 6912 (/4 1728) >[ 44070.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d9a3a0] >[ 44070.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d9a3a0] width 1680 pitch 6912 (/4 1728) >[ 44070.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d722c0] >[ 44070.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d722c0] width 1680 pitch 6912 (/4 1728) >[ 44070.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93de0] >[ 44070.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93de0] width 1680 pitch 6912 (/4 1728) >[ 44071.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dabe70] >[ 44071.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dabe70] width 1680 pitch 6912 (/4 1728) >[ 44071.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93de0] >[ 44071.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93de0] width 1680 pitch 6912 (/4 1728) >[ 44071.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dabe70] >[ 44071.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dabe70] width 1680 pitch 6912 (/4 1728) >[ 44071.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93de0] >[ 44071.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93de0] width 1680 pitch 6912 (/4 1728) >[ 44071.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2da50] >[ 44071.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2da50] width 1680 pitch 6912 (/4 1728) >[ 44072.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c780] >[ 44072.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c780] width 1680 pitch 6912 (/4 1728) >[ 44084.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dabe70] >[ 44084.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dabe70] width 1680 pitch 6912 (/4 1728) >[ 44087.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c380] >[ 44087.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c380] width 1680 pitch 6912 (/4 1728) >[ 44095.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2da50] >[ 44095.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2da50] width 1680 pitch 6912 (/4 1728) >[ 44103.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4c380] >[ 44103.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4c380] width 1680 pitch 6912 (/4 1728) >[ 44107.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e86190] >[ 44107.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e86190] width 1680 pitch 6912 (/4 1728) >[ 44114.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e8a980] >[ 44114.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e8a980] width 1680 pitch 6912 (/4 1728) >[ 44132.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51990] >[ 44132.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51990] width 1680 pitch 6912 (/4 1728) >[ 44132.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56d10] >[ 44132.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56d10] width 1680 pitch 6912 (/4 1728) >[ 44132.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e55650] >[ 44132.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e55650] width 1680 pitch 6912 (/4 1728) >[ 44132.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56d10] >[ 44132.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56d10] width 1680 pitch 6912 (/4 1728) >[ 44132.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e55650] >[ 44132.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e55650] width 1680 pitch 6912 (/4 1728) >[ 44132.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56d10] >[ 44132.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56d10] width 1680 pitch 6912 (/4 1728) >[ 44132.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e55650] >[ 44132.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e55650] width 1680 pitch 6912 (/4 1728) >[ 44132.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56d10] >[ 44132.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56d10] width 1680 pitch 6912 (/4 1728) >[ 44132.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e55650] >[ 44132.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e55650] width 1680 pitch 6912 (/4 1728) >[ 44132.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56d10] >[ 44132.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56d10] width 1680 pitch 6912 (/4 1728) >[ 44136.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d544e0] >[ 44136.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d544e0] width 1680 pitch 6912 (/4 1728) >[ 44136.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d54430] >[ 44136.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d54430] width 1680 pitch 6912 (/4 1728) >[ 44137.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5be60] >[ 44137.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5be60] width 1680 pitch 6912 (/4 1728) >[ 44137.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5dca0] >[ 44137.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5dca0] width 1680 pitch 6912 (/4 1728) >[ 44137.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5dbd0] >[ 44137.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5dbd0] width 1680 pitch 6912 (/4 1728) >[ 44137.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5de40] >[ 44137.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5de40] width 1680 pitch 6912 (/4 1728) >[ 44137.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5f710] >[ 44137.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5f710] width 1680 pitch 6912 (/4 1728) >[ 44137.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5dbd0] >[ 44137.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5dbd0] width 1680 pitch 6912 (/4 1728) >[ 44137.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5f710] >[ 44137.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5f710] width 1680 pitch 6912 (/4 1728) >[ 44137.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d60720] >[ 44137.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d60720] width 1680 pitch 6912 (/4 1728) >[ 44137.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d61950] >[ 44137.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d61950] width 1680 pitch 6912 (/4 1728) >[ 44137.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d619b0] >[ 44137.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d619b0] width 1680 pitch 6912 (/4 1728) >[ 44137.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d61c10] >[ 44137.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d61c10] width 1680 pitch 6912 (/4 1728) >[ 44137.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d61710] >[ 44137.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d61710] width 1680 pitch 6912 (/4 1728) >[ 44140.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f164c0] >[ 44140.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f164c0] width 1680 pitch 6912 (/4 1728) >[ 44152.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da6880] >[ 44152.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da6880] width 1680 pitch 6912 (/4 1728) >[ 44167.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d58030] >[ 44167.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d58030] width 1680 pitch 6912 (/4 1728) >[ 44257.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bf2af0] >[ 44257.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bf2af0] width 1680 pitch 6912 (/4 1728) >[ 44286.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f2f0] >[ 44286.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f2f0] width 1680 pitch 6912 (/4 1728) >[ 44289.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f420] >[ 44289.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f420] width 1680 pitch 6912 (/4 1728) >[ 44496.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e400] >[ 44496.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e400] width 1680 pitch 6912 (/4 1728) >[ 44497.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecb6b0] >[ 44497.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecb6b0] width 1680 pitch 6912 (/4 1728) >[ 44514.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4e570] >[ 44514.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4e570] width 1680 pitch 6912 (/4 1728) >[ 44525.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6ea40] >[ 44525.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6ea40] width 1680 pitch 6912 (/4 1728) >[ 44525.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e6ea40] >[ 44525.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e6ea40] width 1680 pitch 6912 (/4 1728) >[ 44527.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e60800] >[ 44527.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e60800] width 1680 pitch 6912 (/4 1728) >[ 44529.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5f920] >[ 44529.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5f920] width 1680 pitch 6912 (/4 1728) >[ 44530.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a720] >[ 44530.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a720] width 1680 pitch 6912 (/4 1728) >[ 44530.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 44530.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 44530.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a720] >[ 44530.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a720] width 1680 pitch 6912 (/4 1728) >[ 44530.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 44530.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 44530.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a720] >[ 44530.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a720] width 1680 pitch 6912 (/4 1728) >[ 44530.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 44530.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 44530.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a720] >[ 44530.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a720] width 1680 pitch 6912 (/4 1728) >[ 44530.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 44530.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 44530.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a720] >[ 44530.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a720] width 1680 pitch 6912 (/4 1728) >[ 44530.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1b50790] >[ 44530.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1b50790] width 1680 pitch 6912 (/4 1728) >[ 44530.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a720] >[ 44530.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a720] width 1680 pitch 6912 (/4 1728) >[ 44532.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e85eb0] >[ 44532.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e85eb0] width 1680 pitch 6912 (/4 1728) >[ 44532.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 44532.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 44532.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e85eb0] >[ 44532.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e85eb0] width 1680 pitch 6912 (/4 1728) >[ 44532.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e77270] >[ 44532.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e77270] width 1680 pitch 6912 (/4 1728) >[ 44533.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d722c0] >[ 44533.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d722c0] width 1680 pitch 6912 (/4 1728) >[ 44538.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1dd55a0] >[ 44538.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1dd55a0] width 1680 pitch 6912 (/4 1728) >[ 44546.069] [mi] EQ overflowing. Additional events will be discarded until existing events are processed. >[ 44546.100] >[ 44546.208] Backtrace: >[ 44547.780] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4650a6] >[ 44547.780] 1: /usr/bin/Xorg (mieqEnqueue+0x26b) [0x55111b] >[ 44547.780] 2: /usr/bin/Xorg (0x400000+0x48062) [0x448062] >[ 44547.855] 3: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7f3a298ff000+0x60e4) [0x7f3a299050e4] >[ 44547.855] 4: /usr/bin/Xorg (0x400000+0x80557) [0x480557] >[ 44547.855] 5: /usr/bin/Xorg (0x400000+0xa4730) [0x4a4730] >[ 44547.855] 6: /lib64/libpthread.so.0 (0x3bfc200000+0xefe0) [0x3bfc20efe0] >[ 44547.855] 7: /usr/bin/Xorg (0x400000+0x6a950) [0x46a950] >[ 44547.855] 8: /lib64/libpthread.so.0 (0x3bfc200000+0xefe0) [0x3bfc20efe0] >[ 44547.855] 9: /lib64/libc.so.6 (0x3bfbe00000+0x13c1c3) [0x3bfbf3c1c3] >[ 44547.855] 10: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f3a2cfe2000+0xa553b) [0x7f3a2d08753b] >[ 44547.855] 11: /usr/lib64/xorg/modules/libexa.so (0x7f3a2c37f000+0x5a7b) [0x7f3a2c384a7b] >[ 44547.855] 12: /usr/lib64/xorg/modules/libexa.so (0x7f3a2c37f000+0x806a) [0x7f3a2c38706a] >[ 44547.855] 13: /usr/lib64/xorg/modules/libexa.so (0x7f3a2c37f000+0x11f68) [0x7f3a2c390f68] >[ 44547.855] 14: /usr/lib64/xorg/modules/libexa.so (0x7f3a2c37f000+0xe898) [0x7f3a2c38d898] >[ 44547.855] 15: /usr/bin/Xorg (0x400000+0x101da9) [0x501da9] >[ 44547.855] 16: /usr/lib64/xorg/modules/libexa.so (0x7f3a2c37f000+0xf95f) [0x7f3a2c38e95f] >[ 44547.855] 17: /usr/bin/Xorg (0x400000+0xfb8eb) [0x4fb8eb] >[ 44547.855] 18: /usr/bin/Xorg (0x400000+0x3444a) [0x43444a] >[ 44547.855] 19: /usr/bin/Xorg (0x400000+0x23485) [0x423485] >[ 44547.855] 20: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3bfbe21735] >[ 44547.855] 21: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d] >[ 44547.855] >[ 44547.855] [mi] These backtraces from mieqEnqueue may point to a culprit higher up the stack. >[ 44547.855] [mi] mieq is *NOT* the cause. It is a victim. >[ 44550.543] [mi] Increasing EQ size to 512 to prevent dropped events. >[ 44550.825] [mi] EQ processing has resumed after 51 dropped events. >[ 44550.825] [mi] This may be caused my a misbehaving driver monopolizing the server's resources.
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