Attachment 608040 Details for Bug 852936 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 6.69 MB, created by Jeff Raber on 2012-08-30 03:51:53 UTC

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Creator: Jeff Raber

Created: 2012-08-30 03:51:53 UTC

Size: 6.69 MB

patch

obsolete

>[    13.757] 
>X.Org X Server 1.12.2
>Release Date: 2012-05-29
>[    13.757] X Protocol Version 11, Revision 0
>[    13.757] Build Operating System: x86-06 2.6.32-220.17.1.el6.x86_64 
>[    13.757] Current Operating System: Linux trinity2 3.5.1-1.fc17.x86_64 #1 SMP Thu Aug 9 17:50:43 UTC 2012 x86_64
>[    13.757] Kernel command line: BOOT_IMAGE=/vmlinuz-3.5.1-1.fc17.x86_64 root=UUID=d3a3a538-fdd7-4ee9-aa83-b6ef4df53f07 ro rd.md=0 rd.lvm=0 rd.dm=0 KEYTABLE=us quiet SYSFONT=latarcyrheb-sun16 rhgb rd.luks=0 LANG=en_US.UTF-8
>[    13.757] Build Date: 26 June 2012  04:32:54AM
>[    13.757] Build ID: xorg-x11-server 1.12.2-4.fc17 
>[    13.757] Current version of pixman: 0.24.4
>[    13.757] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    13.757] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    13.757] (==) Log file: "/var/log/Xorg.0.log", Time: Fri Aug 17 19:35:17 2012
>[    13.757] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    13.757] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    13.757] (==) No Layout section.  Using the first Screen section.
>[    13.757] (==) No screen section available. Using defaults.
>[    13.757] (**) |-->Screen "Default Screen Section" (0)
>[    13.757] (**) |   |-->Monitor "<default monitor>"
>[    13.757] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    13.757] (==) Automatically adding devices
>[    13.757] (==) Automatically enabling devices
>[    13.757] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    13.757] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    13.757] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    13.757] (II) Loader magic: 0x7c6ac0
>[    13.757] (II) Module ABI versions:
>[    13.757] 	X.Org ANSI C Emulation: 0.4
>[    13.757] 	X.Org Video Driver: 12.0
>[    13.758] 	X.Org XInput driver : 16.0
>[    13.758] 	X.Org Server Extension : 6.0
>[    13.758] (--) PCI:*(0:1:0:0) 1002:6739:174b:174b rev 0, Mem @ 0xe0000000/268435456, 0xf7e20000/131072, I/O @ 0x0000e000/256, BIOS @ 0x????????/131072
>[    13.758] (II) LoadModule: "extmod"
>[    13.758] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    13.759] (II) Module extmod: vendor="X.Org Foundation"
>[    13.759] 	compiled for 1.12.2, module version = 1.0.0
>[    13.759] 	Module class: X.Org Server Extension
>[    13.759] 	ABI class: X.Org Server Extension, version 6.0
>[    13.759] (II) Loading extension SELinux
>[    13.759] (II) Loading extension MIT-SCREEN-SAVER
>[    13.759] (II) Loading extension XFree86-VidModeExtension
>[    13.759] (II) Loading extension XFree86-DGA
>[    13.759] (II) Loading extension DPMS
>[    13.759] (II) Loading extension XVideo
>[    13.759] (II) Loading extension XVideo-MotionCompensation
>[    13.759] (II) Loading extension X-Resource
>[    13.759] (II) LoadModule: "dbe"
>[    13.759] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    13.759] (II) Module dbe: vendor="X.Org Foundation"
>[    13.759] 	compiled for 1.12.2, module version = 1.0.0
>[    13.759] 	Module class: X.Org Server Extension
>[    13.759] 	ABI class: X.Org Server Extension, version 6.0
>[    13.759] (II) Loading extension DOUBLE-BUFFER
>[    13.759] (II) LoadModule: "glx"
>[    13.759] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    13.759] (II) Module glx: vendor="X.Org Foundation"
>[    13.759] 	compiled for 1.12.2, module version = 1.0.0
>[    13.759] 	ABI class: X.Org Server Extension, version 6.0
>[    13.759] (==) AIGLX enabled
>[    13.759] (II) Loading extension GLX
>[    13.759] (II) LoadModule: "record"
>[    13.759] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    13.759] (II) Module record: vendor="X.Org Foundation"
>[    13.759] 	compiled for 1.12.2, module version = 1.13.0
>[    13.759] 	Module class: X.Org Server Extension
>[    13.759] 	ABI class: X.Org Server Extension, version 6.0
>[    13.759] (II) Loading extension RECORD
>[    13.759] (II) LoadModule: "dri"
>[    13.759] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    13.759] (II) Module dri: vendor="X.Org Foundation"
>[    13.759] 	compiled for 1.12.2, module version = 1.0.0
>[    13.759] 	ABI class: X.Org Server Extension, version 6.0
>[    13.759] (II) Loading extension XFree86-DRI
>[    13.759] (II) LoadModule: "dri2"
>[    13.759] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    13.759] (II) Module dri2: vendor="X.Org Foundation"
>[    13.759] 	compiled for 1.12.2, module version = 1.2.0
>[    13.759] 	ABI class: X.Org Server Extension, version 6.0
>[    13.759] (II) Loading extension DRI2
>[    13.759] (==) Matched ati as autoconfigured driver 0
>[    13.759] (==) Matched vesa as autoconfigured driver 1
>[    13.759] (==) Matched modesetting as autoconfigured driver 2
>[    13.759] (==) Matched fbdev as autoconfigured driver 3
>[    13.759] (==) Assigned the driver to the xf86ConfigLayout
>[    13.759] (II) LoadModule: "ati"
>[    13.759] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    13.759] (II) Module ati: vendor="X.Org Foundation"
>[    13.760] 	compiled for 1.12.0, module version = 6.14.99
>[    13.760] 	Module class: X.Org Video Driver
>[    13.760] 	ABI class: X.Org Video Driver, version 12.0
>[    13.760] (II) LoadModule: "radeon"
>[    13.760] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    13.760] (II) Module radeon: vendor="X.Org Foundation"
>[    13.760] 	compiled for 1.12.0, module version = 6.14.99
>[    13.760] 	Module class: X.Org Video Driver
>[    13.760] 	ABI class: X.Org Video Driver, version 12.0
>[    13.760] (II) LoadModule: "vesa"
>[    13.760] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    13.760] (II) Module vesa: vendor="X.Org Foundation"
>[    13.760] 	compiled for 1.12.0, module version = 2.3.1
>[    13.760] 	Module class: X.Org Video Driver
>[    13.760] 	ABI class: X.Org Video Driver, version 12.0
>[    13.760] (II) LoadModule: "modesetting"
>[    13.760] (II) Loading /usr/lib64/xorg/modules/drivers/modesetting_drv.so
>[    13.760] (II) Module modesetting: vendor="X.Org Foundation"
>[    13.760] 	compiled for 1.12.2, module version = 0.4.0
>[    13.760] 	Module class: X.Org Video Driver
>[    13.760] 	ABI class: X.Org Video Driver, version 12.0
>[    13.760] (II) LoadModule: "fbdev"
>[    13.760] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    13.760] (II) Module fbdev: vendor="X.Org Foundation"
>[    13.760] 	compiled for 1.11.99.901, module version = 0.4.2
>[    13.760] 	ABI class: X.Org Video Driver, version 12.0
>[    13.760] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    13.762] (II) VESA: driver for VESA chipsets: vesa
>[    13.762] (II) modesetting: Driver for Modesetting Kernel Drivers: kms
>[    13.762] (II) FBDEV: driver for framebuffer: fbdev
>[    13.762] (++) using VT number 1
>
>[    13.762] (II) [KMS] Kernel modesetting enabled.
>[    13.762] (WW) Falling back to old probe method for vesa
>[    13.762] (WW) Falling back to old probe method for modesetting
>[    13.762] (WW) Falling back to old probe method for fbdev
>[    13.762] (II) Loading sub module "fbdevhw"
>[    13.762] (II) LoadModule: "fbdevhw"
>[    13.762] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    13.762] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    13.762] 	compiled for 1.12.2, module version = 0.0.2
>[    13.762] 	ABI class: X.Org Video Driver, version 12.0
>[    13.762] (II) RADEON(0): RADEONPreInit_KMS
>[    13.762] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    13.762] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    13.762] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    13.762] (==) RADEON(0): Default visual is TrueColor
>[    13.762] (==) RADEON(0): RGB weight 888
>[    13.762] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    13.762] (--) RADEON(0): Chipset: "AMD Radeon HD 6800 Series" (ChipID = 0x6739)
>[    13.762] (II) RADEON(0): PCIE card detected
>[    13.762] drmOpenDevice: node name is /dev/dri/card0
>[    13.762] drmOpenDevice: open result is 8, (OK)
>[    13.762] drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>[    13.762] drmOpenDevice: node name is /dev/dri/card0
>[    13.762] drmOpenDevice: open result is 8, (OK)
>[    13.762] drmOpenByBusid: drmOpenMinor returns 8
>[    13.762] drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>[    13.762] (II) Loading sub module "exa"
>[    13.762] (II) LoadModule: "exa"
>[    13.763] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    13.763] (II) Module exa: vendor="X.Org Foundation"
>[    13.763] 	compiled for 1.12.2, module version = 2.5.0
>[    13.763] 	ABI class: X.Org Video Driver, version 12.0
>[    13.763] (II) RADEON(0): KMS Color Tiling: enabled
>[    13.763] (II) RADEON(0): KMS Pageflipping: enabled
>[    13.763] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    13.769] (II) RADEON(0): Output DisplayPort-0 has no monitor section
>[    13.771] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    13.801] (II) RADEON(0): Output DVI-0 has no monitor section
>[    13.803] (II) RADEON(0): Output DVI-1 has no monitor section
>[    13.811] (II) RADEON(0): EDID for output DisplayPort-0
>[    13.813] (II) RADEON(0): EDID for output HDMI-0
>[    13.843] (II) RADEON(0): EDID for output DVI-0
>[    13.843] (II) RADEON(0): Manufacturer: ACI  Model: 2498  Serial#: 16843009
>[    13.843] (II) RADEON(0): Year: 2012  Week: 9
>[    13.843] (II) RADEON(0): EDID Version: 1.3
>[    13.843] (II) RADEON(0): Analog Display Input,  Input Voltage Level: 0.700/0.300 V
>[    13.843] (II) RADEON(0): Signal levels configurable
>[    13.843] (II) RADEON(0): Sync:  Separate  Composite  SyncOnGreen
>[    13.843] (II) RADEON(0): Max Image Size [cm]: horiz.: 53  vert.: 30
>[    13.843] (II) RADEON(0): Gamma: 2.20
>[    13.843] (II) RADEON(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>[    13.843] (II) RADEON(0): First detailed timing is preferred mode
>[    13.843] (II) RADEON(0): redX: 0.650 redY: 0.333   greenX: 0.332 greenY: 0.623
>[    13.843] (II) RADEON(0): blueX: 0.157 blueY: 0.053   whiteX: 0.313 whiteY: 0.329
>[    13.843] (II) RADEON(0): Supported established timings:
>[    13.843] (II) RADEON(0): 720x400@70Hz
>[    13.843] (II) RADEON(0): 640x480@60Hz
>[    13.843] (II) RADEON(0): 640x480@67Hz
>[    13.843] (II) RADEON(0): 640x480@72Hz
>[    13.843] (II) RADEON(0): 640x480@75Hz
>[    13.843] (II) RADEON(0): 800x600@56Hz
>[    13.843] (II) RADEON(0): 800x600@60Hz
>[    13.843] (II) RADEON(0): 800x600@72Hz
>[    13.843] (II) RADEON(0): 800x600@75Hz
>[    13.843] (II) RADEON(0): 832x624@75Hz
>[    13.843] (II) RADEON(0): 1024x768@60Hz
>[    13.843] (II) RADEON(0): 1024x768@70Hz
>[    13.843] (II) RADEON(0): 1024x768@75Hz
>[    13.843] (II) RADEON(0): 1280x1024@75Hz
>[    13.843] (II) RADEON(0): Manufacturer's mask: 0
>[    13.843] (II) RADEON(0): Supported standard timings:
>[    13.843] (II) RADEON(0): #0: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>[    13.843] (II) RADEON(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>[    13.843] (II) RADEON(0): #2: hsize: 1280  vsize 960  refresh: 60  vid: 16513
>[    13.843] (II) RADEON(0): #3: hsize: 1440  vsize 900  refresh: 60  vid: 149
>[    13.843] (II) RADEON(0): #4: hsize: 1600  vsize 1200  refresh: 60  vid: 16553
>[    13.843] (II) RADEON(0): #5: hsize: 1680  vsize 1050  refresh: 60  vid: 179
>[    13.843] (II) RADEON(0): #6: hsize: 1920  vsize 1080  refresh: 60  vid: 49361
>[    13.843] (II) RADEON(0): Supported detailed timing:
>[    13.843] (II) RADEON(0): clock: 148.5 MHz   Image Size:  531 x 299 mm
>[    13.843] (II) RADEON(0): h_active: 1920  h_sync: 2008  h_sync_end 2052 h_blank_end 2200 h_border: 0
>[    13.843] (II) RADEON(0): v_active: 1080  v_sync: 1084  v_sync_end 1089 v_blanking: 1125 v_border: 0
>[    13.843] (II) RADEON(0): Ranges: V min: 50 V max: 76 Hz, H min: 30 H max: 83 kHz, PixClock max 175 MHz
>[    13.843] (II) RADEON(0): Monitor name: VS248
>[    13.843] (II) RADEON(0): Serial No: C2LMQS123460
>[    13.843] (II) RADEON(0): EDID (in hex):
>[    13.843] (II) RADEON(0): 	00ffffffffffff000469982401010101
>[    13.843] (II) RADEON(0): 	091601031e351e78ea9265a655559f28
>[    13.843] (II) RADEON(0): 	0d5054bfef00714f818081409500a940
>[    13.843] (II) RADEON(0): 	b300d1c00101023a801871382d40582c
>[    13.843] (II) RADEON(0): 	4500132b2100001e000000fd00324c1e
>[    13.843] (II) RADEON(0): 	5311000a202020202020000000fc0056
>[    13.843] (II) RADEON(0): 	533234380a20202020202020000000ff
>[    13.843] (II) RADEON(0): 	0043324c4d51533132333436300a0021
>[    13.843] (II) RADEON(0): Printing probed modes for output DVI-0
>[    13.843] (II) RADEON(0): Modeline "1920x1080"x60.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    13.843] (II) RADEON(0): Modeline "1600x1200"x60.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1680x945"x60.0  131.48  1680 1784 1960 2240  945 946 949 978 -hsync +vsync (58.7 kHz)
>[    13.843] (II) RADEON(0): Modeline "1400x1050"x74.9  156.00  1400 1504 1648 1896  1050 1053 1057 1099 -hsync +vsync (82.3 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1600x900"x60.0  118.96  1600 1696 1864 2128  900 901 904 932 -hsync +vsync (55.9 kHz)
>[    13.843] (II) RADEON(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1440x900"x75.0  136.75  1440 1536 1688 1936  900 903 909 942 -hsync +vsync (70.6 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1366x768"x60.0   85.89  1366 1439 1583 1800  768 769 772 795 -hsync +vsync (47.7 kHz)
>[    13.843] (II) RADEON(0): Modeline "1360x768"x60.0   85.50  1360 1424 1536 1792  768 771 777 795 +hsync +vsync (47.7 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1280x800"x74.9  106.50  1280 1360 1488 1696  800 803 809 838 -hsync +vsync (62.8 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 +hsync -vsync (49.7 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1280x768"x74.9  102.25  1280 1360 1488 1696  768 771 778 805 +hsync -vsync (60.3 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1280x768"x59.9   79.50  1280 1344 1472 1664  768 771 778 798 -hsync +vsync (47.8 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    13.843] (II) RADEON(0): Modeline "1024x576"x60.0   46.97  1024 1064 1168 1312  576 577 580 597 -hsync +vsync (35.8 kHz)
>[    13.843] (II) RADEON(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    13.843] (II) RADEON(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    13.843] (II) RADEON(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    13.843] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    13.843] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    13.843] (II) RADEON(0): Modeline "848x480"x60.0   33.75  848 864 976 1088  480 486 494 517 +hsync +vsync (31.0 kHz e)
>[    13.843] (II) RADEON(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz e)
>[    13.843] (II) RADEON(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    13.843] (II) RADEON(0): Modeline "640x480"x66.7   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    13.843] (II) RADEON(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    13.843] (II) RADEON(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    13.846] (II) RADEON(0): EDID for output DVI-1
>[    13.846] (II) RADEON(0): Output DisplayPort-0 disconnected
>[    13.846] (II) RADEON(0): Output HDMI-0 disconnected
>[    13.846] (II) RADEON(0): Output DVI-0 connected
>[    13.846] (II) RADEON(0): Output DVI-1 disconnected
>[    13.846] (II) RADEON(0): Using exact sizes for initial modes
>[    13.846] (II) RADEON(0): Output DVI-0 using initial mode 1920x1080 +0+0
>[    13.846] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    13.846] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:40000000 visible:f7d7000
>[    13.846] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    13.846] (==) RADEON(0): DPI set to (96, 96)
>[    13.846] (II) Loading sub module "fb"
>[    13.846] (II) LoadModule: "fb"
>[    13.846] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    13.846] (II) Module fb: vendor="X.Org Foundation"
>[    13.846] 	compiled for 1.12.2, module version = 1.0.0
>[    13.846] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    13.846] (II) Loading sub module "ramdac"
>[    13.846] (II) LoadModule: "ramdac"
>[    13.846] (II) Module "ramdac" already built-in
>[    13.846] (II) UnloadModule: "vesa"
>[    13.846] (II) Unloading vesa
>[    13.846] (II) UnloadModule: "modesetting"
>[    13.846] (II) Unloading modesetting
>[    13.846] (II) UnloadModule: "fbdev"
>[    13.846] (II) Unloading fbdev
>[    13.846] (II) UnloadSubModule: "fbdevhw"
>[    13.846] (II) Unloading fbdevhw
>[    13.846] (--) Depth 24 pixmap format is 32 bpp
>[    13.846] (II) RADEON(0): [DRI2] Setup complete
>[    13.846] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    13.846] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    13.846] (II) RADEON(0): Front buffer size: 8100K
>[    13.846] (II) RADEON(0): VRAM usage limit set to 221119K
>[    13.846] (II) RADEON(0): Initializing backing store
>[    13.846] (==) RADEON(0): Backing store disabled
>[    13.846] (II) RADEON(0): Direct rendering enabled
>[    13.846] (II) RADEON(0): Initializing Acceleration
>[    13.846] (II) RADEON(0): Setting EXA maxPitchBytes
>[    13.846] (II) EXA(0): Driver allocated offscreen pixmaps
>[    13.846] (II) EXA(0): Driver registered support for the following operations:
>[    13.846] (II)         Solid
>[    13.846] (II)         Copy
>[    13.846] (II)         Composite (RENDER acceleration)
>[    13.846] (II)         UploadToScreen
>[    13.846] (II)         DownloadFromScreen
>[    13.846] (II) RADEON(0): Acceleration enabled
>[    13.846] (II) RADEON(0): Initializing DPMS
>[    13.846] (==) RADEON(0): DPMS enabled
>[    13.846] (II) RADEON(0): Initializing Cursor
>[    13.846] (==) RADEON(0): Silken mouse enabled
>[    13.846] (II) RADEON(0): Initializing Xv
>[    13.846] (II) RADEON(0): Set up textured video
>[    13.846] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    13.846] (II) RADEON(0): [XvMC] Extension initialized.
>[    13.846] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    13.846] (II) RADEON(0): Initializing kms color map
>[    13.846] (II) RADEON(0): RADEONScreenInit finished
>[    13.846] (--) RandR disabled
>[    13.846] (II) Initializing built-in extension Generic Event Extension
>[    13.846] (II) Initializing built-in extension SHAPE
>[    13.846] (II) Initializing built-in extension MIT-SHM
>[    13.846] (II) Initializing built-in extension XInputExtension
>[    13.846] (II) Initializing built-in extension XTEST
>[    13.846] (II) Initializing built-in extension BIG-REQUESTS
>[    13.846] (II) Initializing built-in extension SYNC
>[    13.846] (II) Initializing built-in extension XKEYBOARD
>[    13.846] (II) Initializing built-in extension XC-MISC
>[    13.846] (II) Initializing built-in extension XINERAMA
>[    13.846] (II) Initializing built-in extension XFIXES
>[    13.846] (II) Initializing built-in extension RENDER
>[    13.846] (II) Initializing built-in extension RANDR
>[    13.846] (II) Initializing built-in extension COMPOSITE
>[    13.846] (II) Initializing built-in extension DAMAGE
>[    13.847] (II) SELinux: Disabled by boolean
>[    13.899] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    13.899] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    13.899] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    13.899] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    13.899] (II) AIGLX: Loaded and initialized r600
>[    13.899] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    13.900] (II) RADEON(0): Setting screen physical size to 508 x 285
>[    13.917] (II) XKB: Reusing cached keymap
>[    13.918] (II) config/udev: Adding input device Power Button (/dev/input/event1)
>[    13.918] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    13.918] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    13.918] (II) LoadModule: "evdev"
>[    13.918] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    13.918] (II) Module evdev: vendor="X.Org Foundation"
>[    13.918] 	compiled for 1.12.0, module version = 2.7.0
>[    13.918] 	Module class: X.Org XInput Driver
>[    13.918] 	ABI class: X.Org XInput driver, version 16.0
>[    13.918] (II) Using input driver 'evdev' for 'Power Button'
>[    13.918] 	Option "XkbRules" "evdev"
>[    13.918] 	Option "XkbModel" "pc105+inet"
>[    13.918] 	Option "XkbLayout" "us"
>[    13.918] 	Option "_source" "server/udev"
>[    13.918] 	Option "name" "Power Button"
>[    13.919] 	Option "path" "/dev/input/event1"
>[    13.919] 	Option "device" "/dev/input/event1"
>[    13.919] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input1/event1"
>[    13.919] 	Option "driver" "evdev"
>[    13.919] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    13.919] (**) Power Button: always reports core events
>[    13.919] (**) evdev: Power Button: Device: "/dev/input/event1"
>[    13.919] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    13.919] (--) evdev: Power Button: Found keys
>[    13.919] (II) evdev: Power Button: Configuring as keyboard
>[    13.919] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input1/event1"
>[    13.919] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    13.919] (**) Option "xkb_rules" "evdev"
>[    13.919] (**) Option "xkb_model" "pc105+inet"
>[    13.919] (**) Option "xkb_layout" "us"
>[    13.919] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    13.929] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    13.929] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    13.929] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    13.929] (II) Using input driver 'evdev' for 'Power Button'
>[    13.929] 	Option "XkbRules" "evdev"
>[    13.929] 	Option "XkbModel" "pc105+inet"
>[    13.929] 	Option "XkbLayout" "us"
>[    13.929] 	Option "_source" "server/udev"
>[    13.929] 	Option "name" "Power Button"
>[    13.929] 	Option "path" "/dev/input/event0"
>[    13.929] 	Option "device" "/dev/input/event0"
>[    13.929] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    13.929] 	Option "driver" "evdev"
>[    13.929] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    13.929] (**) Power Button: always reports core events
>[    13.929] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    13.929] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    13.929] (--) evdev: Power Button: Found keys
>[    13.929] (II) evdev: Power Button: Configuring as keyboard
>[    13.929] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    13.929] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 7)
>[    13.929] (**) Option "xkb_rules" "evdev"
>[    13.929] (**) Option "xkb_model" "pc105+inet"
>[    13.929] (**) Option "xkb_layout" "us"
>[    13.930] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    13.930] (II) XKB: Reusing cached keymap
>[    13.930] (II) config/udev: Adding input device HD-Audio Generic HDMI/DP,pcm=3 (/dev/input/event11)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.930] (II) config/udev: Adding input device HDA Intel PCH Line Out Front (/dev/input/event10)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.930] (II) config/udev: Adding input device HDA Intel PCH Line (/dev/input/event3)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.930] (II) config/udev: Adding input device HDA Intel PCH Front Mic (/dev/input/event4)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.930] (II) config/udev: Adding input device HDA Intel PCH Rear Mic (/dev/input/event5)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.930] (II) config/udev: Adding input device HDA Intel PCH Front Headphone (/dev/input/event6)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.930] (II) config/udev: Adding input device HDA Intel PCH Line Out Side (/dev/input/event7)
>[    13.930] (II) No input driver specified, ignoring this device.
>[    13.930] (II) This device may have been added with another device file.
>[    13.931] (II) config/udev: Adding input device HDA Intel PCH Line Out CLFE (/dev/input/event8)
>[    13.931] (II) No input driver specified, ignoring this device.
>[    13.931] (II) This device may have been added with another device file.
>[    13.931] (II) config/udev: Adding input device HDA Intel PCH Line Out Surround (/dev/input/event9)
>[    13.931] (II) No input driver specified, ignoring this device.
>[    13.931] (II) This device may have been added with another device file.
>[    13.931] (II) config/udev: Adding input device ATEN Advance Tech Inc. CS62USV1.0.071 (/dev/input/event12)
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: Applying InputClass "evdev keyboard catchall"
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: Applying InputClass "system-setup-keyboard"
>[    13.931] (II) Using input driver 'evdev' for 'ATEN Advance Tech Inc. CS62USV1.0.071'
>[    13.931] 	Option "XkbRules" "evdev"
>[    13.931] 	Option "XkbModel" "pc105+inet"
>[    13.931] 	Option "XkbLayout" "us"
>[    13.931] 	Option "_source" "server/udev"
>[    13.931] 	Option "name" "ATEN Advance Tech Inc. CS62USV1.0.071"
>[    13.931] 	Option "path" "/dev/input/event12"
>[    13.931] 	Option "device" "/dev/input/event12"
>[    13.931] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.1/2-1.1.1:1.0/input/input12/event12"
>[    13.931] 	Option "driver" "evdev"
>[    13.931] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: always reports core events
>[    13.931] (**) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Device: "/dev/input/event12"
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Vendor 0x557 Product 0x2213
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Found keys
>[    13.931] (II) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Configuring as keyboard
>[    13.931] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.1/2-1.1.1:1.0/input/input12/event12"
>[    13.931] (II) XINPUT: Adding extended input device "ATEN Advance Tech Inc. CS62USV1.0.071" (type: KEYBOARD, id 8)
>[    13.931] (**) Option "xkb_rules" "evdev"
>[    13.931] (**) Option "xkb_model" "pc105+inet"
>[    13.931] (**) Option "xkb_layout" "us"
>[    13.931] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    13.931] (II) XKB: Reusing cached keymap
>[    13.931] (II) config/udev: Adding input device ATEN Advance Tech Inc. CS62USV1.0.071 (/dev/input/event13)
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: Applying InputClass "evdev pointer catchall"
>[    13.931] (II) Using input driver 'evdev' for 'ATEN Advance Tech Inc. CS62USV1.0.071'
>[    13.931] 	Option "XkbRules" "evdev"
>[    13.931] 	Option "XkbModel" "evdev"
>[    13.931] 	Option "XkbLayout" "us"
>[    13.931] 	Option "_source" "server/udev"
>[    13.931] 	Option "name" "ATEN Advance Tech Inc. CS62USV1.0.071"
>[    13.931] 	Option "path" "/dev/input/event13"
>[    13.931] 	Option "device" "/dev/input/event13"
>[    13.931] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.1/2-1.1.1:1.1/input/input13/event13"
>[    13.931] 	Option "driver" "evdev"
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: always reports core events
>[    13.931] (**) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Device: "/dev/input/event13"
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Vendor 0x557 Product 0x2213
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Found 9 mouse buttons
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Found scroll wheel(s)
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Found relative axes
>[    13.931] (--) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Found x and y relative axes
>[    13.931] (II) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Configuring as mouse
>[    13.931] (II) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: Adding scrollwheel support
>[    13.931] (**) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: YAxisMapping: buttons 4 and 5
>[    13.931] (**) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    13.931] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.1/2-1.1.1:1.1/input/input13/event13"
>[    13.931] (II) XINPUT: Adding extended input device "ATEN Advance Tech Inc. CS62USV1.0.071" (type: MOUSE, id 9)
>[    13.931] (II) evdev: ATEN Advance Tech Inc. CS62USV1.0.071: initialized for relative axes.
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: (accel) keeping acceleration scheme 1
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: (accel) acceleration profile 0
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: (accel) acceleration factor: 2.000
>[    13.931] (**) ATEN Advance Tech Inc. CS62USV1.0.071: (accel) acceleration threshold: 4
>[    13.932] (II) config/udev: Adding input device ATEN Advance Tech Inc. CS62USV1.0.071 (/dev/input/mouse0)
>[    13.932] (II) No input driver specified, ignoring this device.
>[    13.932] (II) This device may have been added with another device file.
>[    13.932] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[    13.932] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[    13.932] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[    13.932] 	Option "XkbRules" "evdev"
>[    13.932] 	Option "XkbModel" "evdev"
>[    13.932] 	Option "XkbLayout" "us"
>[    13.932] 	Option "_source" "server/udev"
>[    13.932] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[    13.932] 	Option "path" "/dev/input/event14"
>[    13.932] 	Option "device" "/dev/input/event14"
>[    13.932] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input14/event14"
>[    13.932] 	Option "driver" "evdev"
>[    13.932] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[    13.932] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[    13.932] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[    13.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[    13.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[    13.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[    13.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[    13.932] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[    13.932] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[    13.932] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[    13.932] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    13.932] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input14/event14"
>[    13.932] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[    13.932] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[    13.932] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[    13.932] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[    13.932] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[    13.932] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[    13.932] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[    13.932] (II) No input driver specified, ignoring this device.
>[    13.932] (II) This device may have been added with another device file.
>[    13.932] (II) config/udev: Adding input device Eee PC WMI hotkeys (/dev/input/event2)
>[    13.932] (**) Eee PC WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    13.932] (**) Eee PC WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    13.932] (II) Using input driver 'evdev' for 'Eee PC WMI hotkeys'
>[    13.932] 	Option "XkbRules" "evdev"
>[    13.932] 	Option "XkbModel" "pc105+inet"
>[    13.932] 	Option "XkbLayout" "us"
>[    13.932] 	Option "_source" "server/udev"
>[    13.932] 	Option "name" "Eee PC WMI hotkeys"
>[    13.932] 	Option "path" "/dev/input/event2"
>[    13.932] 	Option "device" "/dev/input/event2"
>[    13.932] 	Option "config_info" "udev:/sys/devices/platform/eeepc-wmi/input/input2/event2"
>[    13.932] 	Option "driver" "evdev"
>[    13.932] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    13.932] (**) Eee PC WMI hotkeys: always reports core events
>[    13.932] (**) evdev: Eee PC WMI hotkeys: Device: "/dev/input/event2"
>[    13.932] (--) evdev: Eee PC WMI hotkeys: Vendor 0 Product 0
>[    13.932] (--) evdev: Eee PC WMI hotkeys: Found keys
>[    13.932] (II) evdev: Eee PC WMI hotkeys: Configuring as keyboard
>[    13.932] (**) Option "config_info" "udev:/sys/devices/platform/eeepc-wmi/input/input2/event2"
>[    13.932] (II) XINPUT: Adding extended input device "Eee PC WMI hotkeys" (type: KEYBOARD, id 11)
>[    13.932] (**) Option "xkb_rules" "evdev"
>[    13.932] (**) Option "xkb_model" "pc105+inet"
>[    13.932] (**) Option "xkb_layout" "us"
>[    13.932] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    13.932] (II) XKB: Reusing cached keymap
>[    13.934] (II) RADEON(0): RADEONSaveScreen(2)
>[    13.974] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    13.974] (II) RADEON(0): Using EDID range info for horizontal sync
>[    13.974] (II) RADEON(0): Using EDID range info for vertical refresh
>[    13.974] (II) RADEON(0): Printing DDC gathered Modelines:
>[    13.974] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    13.974] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    13.974] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    13.974] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    13.974] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    13.974] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    13.974] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    13.974] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    13.974] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    13.974] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    13.974] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    13.974] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    14.563] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    14.563] (II) RADEON(0): Using hsync ranges from config file
>[    14.563] (II) RADEON(0): Using vrefresh ranges from config file
>[    14.563] (II) RADEON(0): Printing DDC gathered Modelines:
>[    14.563] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    14.563] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    14.563] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    14.563] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    14.563] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    14.563] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    14.563] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    14.563] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    14.563] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    14.563] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    14.563] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    14.563] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    14.835] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    14.835] (II) RADEON(0): Using hsync ranges from config file
>[    14.835] (II) RADEON(0): Using vrefresh ranges from config file
>[    14.835] (II) RADEON(0): Printing DDC gathered Modelines:
>[    14.835] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    14.835] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    14.835] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    14.835] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    14.835] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    14.835] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    14.835] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    14.835] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    14.835] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    14.835] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    14.835] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    14.835] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    15.027] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    15.027] (II) RADEON(0): Using hsync ranges from config file
>[    15.027] (II) RADEON(0): Using vrefresh ranges from config file
>[    15.027] (II) RADEON(0): Printing DDC gathered Modelines:
>[    15.027] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    15.027] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    15.027] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    15.027] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    15.027] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    15.027] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    15.027] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    15.027] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    15.027] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    15.027] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    15.027] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    15.027] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    16.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    16.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    16.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    16.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    16.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    16.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    16.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    16.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    16.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    16.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    16.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    16.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    16.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    16.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    16.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2c40]
>[    16.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2c40] width 1920 pitch 7680 (/4 1920)
>[    16.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    16.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    16.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4dd0]
>[    16.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4dd0] width 1920 pitch 7680 (/4 1920)
>[    16.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    16.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    16.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4dd0]
>[    16.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4dd0] width 1920 pitch 7680 (/4 1920)
>[    17.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    17.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    17.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    17.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    17.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ef0]
>[    17.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ef0] width 1920 pitch 7680 (/4 1920)
>[    17.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ef0]
>[    17.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ef0] width 1920 pitch 7680 (/4 1920)
>[    17.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ef0]
>[    17.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ef0] width 1920 pitch 7680 (/4 1920)
>[    17.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    17.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    17.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ca0]
>[    17.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ca0] width 1920 pitch 7680 (/4 1920)
>[    17.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2de0]
>[    17.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2de0] width 1920 pitch 7680 (/4 1920)
>[    17.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21dbb50]
>[    17.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21dbb50] width 1920 pitch 7680 (/4 1920)
>[    18.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c2ef0]
>[    18.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c2ef0] width 1920 pitch 7680 (/4 1920)
>[    18.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21dbb50]
>[    18.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21dbb50] width 1920 pitch 7680 (/4 1920)
>[    18.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c84b0]
>[    18.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c84b0] width 1920 pitch 7680 (/4 1920)
>[    18.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c8450]
>[    18.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c8450] width 1920 pitch 7680 (/4 1920)
>[    18.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c84b0]
>[    18.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c84b0] width 1920 pitch 7680 (/4 1920)
>[    18.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c8450]
>[    18.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c8450] width 1920 pitch 7680 (/4 1920)
>[    18.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c84b0]
>[    18.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c84b0] width 1920 pitch 7680 (/4 1920)
>[    18.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c8450]
>[    18.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c8450] width 1920 pitch 7680 (/4 1920)
>[    18.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c84b0]
>[    18.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c84b0] width 1920 pitch 7680 (/4 1920)
>[    18.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c8450]
>[    18.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c8450] width 1920 pitch 7680 (/4 1920)
>[    18.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c84b0]
>[    18.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c84b0] width 1920 pitch 7680 (/4 1920)
>[    18.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c84b0]
>[    18.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c84b0] width 1920 pitch 7680 (/4 1920)
>[    18.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd230]
>[    18.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd230] width 1920 pitch 7680 (/4 1920)
>[    18.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2513400]
>[    18.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2513400] width 1920 pitch 7680 (/4 1920)
>[    18.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd230]
>[    18.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd230] width 1920 pitch 7680 (/4 1920)
>[    18.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2513400]
>[    18.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2513400] width 1920 pitch 7680 (/4 1920)
>[    19.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2516470]
>[    19.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2516470] width 1920 pitch 7680 (/4 1920)
>[    19.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519130]
>[    19.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519130] width 1920 pitch 7680 (/4 1920)
>[    23.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25223a0]
>[    23.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25223a0] width 1920 pitch 7680 (/4 1920)
>[    33.751] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    33.751] (II) RADEON(0): Using hsync ranges from config file
>[    33.751] (II) RADEON(0): Using vrefresh ranges from config file
>[    33.751] (II) RADEON(0): Printing DDC gathered Modelines:
>[    33.751] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    33.751] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    33.751] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    33.751] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    33.751] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    33.751] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    33.751] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    33.751] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    33.751] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    33.751] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    33.751] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    33.751] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    33.800] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    33.800] (II) RADEON(0): Using hsync ranges from config file
>[    33.800] (II) RADEON(0): Using vrefresh ranges from config file
>[    33.800] (II) RADEON(0): Printing DDC gathered Modelines:
>[    33.800] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    33.800] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    33.800] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    33.800] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    33.800] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    33.800] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    33.800] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    33.800] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    33.800] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    33.800] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    33.800] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    33.800] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    33.848] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[    33.849] (II) RADEON(0): Using hsync ranges from config file
>[    33.849] (II) RADEON(0): Using vrefresh ranges from config file
>[    33.849] (II) RADEON(0): Printing DDC gathered Modelines:
>[    33.849] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[    33.849] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[    33.849] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[    33.849] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[    33.849] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[    33.849] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[    33.849] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[    33.849] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[    33.849] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[    33.849] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[    33.849] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[    33.849] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[    35.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575630]
>[    35.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575630] width 1920 pitch 7680 (/4 1920)
>[    37.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    37.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    37.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    37.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    37.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    37.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    37.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    37.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    37.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    37.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    37.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575b70]
>[    37.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575b70] width 1920 pitch 7680 (/4 1920)
>[    37.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    37.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    37.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575b70]
>[    37.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575b70] width 1920 pitch 7680 (/4 1920)
>[    37.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    37.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    37.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    37.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    37.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575b70]
>[    37.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575b70] width 1920 pitch 7680 (/4 1920)
>[    37.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    37.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    37.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    37.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    37.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    37.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    37.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    38.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    38.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    38.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    38.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    38.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    38.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    38.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    38.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    38.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[    38.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575bd0]
>[    38.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575bd0] width 1920 pitch 7680 (/4 1920)
>[    38.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575c30]
>[    38.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575c30] width 1920 pitch 7680 (/4 1920)
>[   196.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255f5d0]
>[   196.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255f5d0] width 1920 pitch 7680 (/4 1920)
>[   211.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255f700]
>[   211.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255f700] width 1920 pitch 7680 (/4 1920)
>[   241.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575960]
>[   241.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575960] width 1920 pitch 7680 (/4 1920)
>[   256.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575960]
>[   256.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575960] width 1920 pitch 7680 (/4 1920)
>[   298.709] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[   298.709] (II) RADEON(0): Using hsync ranges from config file
>[   298.709] (II) RADEON(0): Using vrefresh ranges from config file
>[   298.709] (II) RADEON(0): Printing DDC gathered Modelines:
>[   298.709] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[   298.709] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   298.709] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   298.709] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   298.709] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[   298.709] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[   298.709] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   298.709] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   298.709] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   298.709] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   298.709] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[   298.709] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[   299.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3109590]
>[   299.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3109590] width 1920 pitch 7680 (/4 1920)
>[   305.300] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[   305.300] (II) RADEON(0): Using hsync ranges from config file
>[   305.300] (II) RADEON(0): Using vrefresh ranges from config file
>[   305.300] (II) RADEON(0): Printing DDC gathered Modelines:
>[   305.300] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[   305.300] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   305.300] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   305.300] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   305.300] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[   305.300] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[   305.300] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   305.300] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   305.300] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   305.300] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   305.300] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[   305.300] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[   305.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ce190]
>[   305.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ce190] width 1920 pitch 7680 (/4 1920)
>[   305.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3109fb0]
>[   305.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3109fb0] width 1920 pitch 7680 (/4 1920)
>[   305.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ce190]
>[   305.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ce190] width 1920 pitch 7680 (/4 1920)
>[   305.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3109fb0]
>[   305.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3109fb0] width 1920 pitch 7680 (/4 1920)
>[   305.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ce190]
>[   305.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ce190] width 1920 pitch 7680 (/4 1920)
>[   305.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3109fb0]
>[   305.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3109fb0] width 1920 pitch 7680 (/4 1920)
>[   305.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ce190]
>[   305.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ce190] width 1920 pitch 7680 (/4 1920)
>[   305.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3109fb0]
>[   305.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3109fb0] width 1920 pitch 7680 (/4 1920)
>[   309.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255ca00]
>[   309.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255ca00] width 1920 pitch 7680 (/4 1920)
>[   309.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310eb90]
>[   309.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310eb90] width 1920 pitch 7680 (/4 1920)
>[   309.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255ca00]
>[   309.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255ca00] width 1920 pitch 7680 (/4 1920)
>[   309.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310eb90]
>[   309.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310eb90] width 1920 pitch 7680 (/4 1920)
>[   309.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255ca00]
>[   309.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255ca00] width 1920 pitch 7680 (/4 1920)
>[   309.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310eb90]
>[   309.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310eb90] width 1920 pitch 7680 (/4 1920)
>[   316.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[   316.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[   322.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c9e50]
>[   322.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c9e50] width 1920 pitch 7680 (/4 1920)
>[   324.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c9e50]
>[   324.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c9e50] width 1920 pitch 7680 (/4 1920)
>[   331.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4ae0]
>[   331.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4ae0] width 1920 pitch 7680 (/4 1920)
>[   334.294] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[   334.294] (II) RADEON(0): Using hsync ranges from config file
>[   334.294] (II) RADEON(0): Using vrefresh ranges from config file
>[   334.294] (II) RADEON(0): Printing DDC gathered Modelines:
>[   334.294] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[   334.294] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   334.294] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   334.294] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   334.294] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[   334.294] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[   334.294] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   334.294] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   334.294] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   334.294] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   334.294] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[   334.294] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[   334.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c9e50]
>[   334.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c9e50] width 1920 pitch 7680 (/4 1920)
>[   336.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c190]
>[   336.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c190] width 1920 pitch 7680 (/4 1920)
>[   338.800] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[   338.800] (II) RADEON(0): Using hsync ranges from config file
>[   338.801] (II) RADEON(0): Using vrefresh ranges from config file
>[   338.801] (II) RADEON(0): Printing DDC gathered Modelines:
>[   338.801] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[   338.801] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   338.801] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   338.801] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   338.801] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[   338.801] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[   338.801] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   338.801] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   338.801] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   338.801] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   338.801] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[   338.801] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[   338.848] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[   338.848] (II) RADEON(0): Using hsync ranges from config file
>[   338.848] (II) RADEON(0): Using vrefresh ranges from config file
>[   338.848] (II) RADEON(0): Printing DDC gathered Modelines:
>[   338.848] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[   338.848] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   338.848] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   338.848] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   338.848] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[   338.848] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[   338.848] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   338.848] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   338.848] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   338.848] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   338.848] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[   338.848] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[   338.892] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[   338.892] (II) RADEON(0): Using hsync ranges from config file
>[   338.893] (II) RADEON(0): Using vrefresh ranges from config file
>[   338.893] (II) RADEON(0): Printing DDC gathered Modelines:
>[   338.893] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[   338.893] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[   338.893] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[   338.893] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[   338.893] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[   338.893] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[   338.893] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[   338.893] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[   338.893] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[   338.893] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[   338.893] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[   338.893] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[   346.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254c4a0]
>[   346.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254c4a0] width 1920 pitch 7680 (/4 1920)
>[   354.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[   354.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[   361.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c680]
>[   361.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c680] width 1920 pitch 7680 (/4 1920)
>[   376.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc30]
>[   376.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc30] width 1920 pitch 7680 (/4 1920)
>[   481.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc30]
>[   481.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc30] width 1920 pitch 7680 (/4 1920)
>[   511.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f180]
>[   511.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f180] width 1920 pitch 7680 (/4 1920)
>[   526.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f180]
>[   526.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f180] width 1920 pitch 7680 (/4 1920)
>[   541.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f180]
>[   541.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f180] width 1920 pitch 7680 (/4 1920)
>[   706.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[   706.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[   751.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c680]
>[   751.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c680] width 1920 pitch 7680 (/4 1920)
>[   841.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c680]
>[   841.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c680] width 1920 pitch 7680 (/4 1920)
>[   871.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc50]
>[   871.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc50] width 1920 pitch 7680 (/4 1920)
>[   886.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc50]
>[   886.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc50] width 1920 pitch 7680 (/4 1920)
>[   901.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc50]
>[   901.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc50] width 1920 pitch 7680 (/4 1920)
>[   976.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[   976.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[   991.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc50]
>[   991.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc50] width 1920 pitch 7680 (/4 1920)
>[  1006.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1006.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1021.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1021.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1051.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1051.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1066.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1066.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1126.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c680]
>[  1126.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c680] width 1920 pitch 7680 (/4 1920)
>[  1171.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252fc50]
>[  1171.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252fc50] width 1920 pitch 7680 (/4 1920)
>[  1261.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c680]
>[  1261.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c680] width 1920 pitch 7680 (/4 1920)
>[  1276.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1276.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1366.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  1366.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  1381.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1381.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1396.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1396.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1411.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1411.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1441.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1441.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1456.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  1456.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  1546.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ca90]
>[  1546.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ca90] width 1920 pitch 7680 (/4 1920)
>[  1561.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ca90]
>[  1561.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ca90] width 1920 pitch 7680 (/4 1920)
>[  1666.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c680]
>[  1666.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c680] width 1920 pitch 7680 (/4 1920)
>[  1681.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1681.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1891.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1891.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1906.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c130]
>[  1906.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c130] width 1920 pitch 7680 (/4 1920)
>[  1936.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1936.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1951.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1951.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1966.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1966.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  1981.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fcc0]
>[  1981.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fcc0] width 1920 pitch 7680 (/4 1920)
>[  2071.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ca70]
>[  2071.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ca70] width 1920 pitch 7680 (/4 1920)
>[  2086.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  2086.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  2223.754] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  2223.754] (II) RADEON(0): Using hsync ranges from config file
>[  2223.754] (II) RADEON(0): Using vrefresh ranges from config file
>[  2223.754] (II) RADEON(0): Printing DDC gathered Modelines:
>[  2223.754] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  2223.754] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  2223.754] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  2223.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254c440]
>[  2223.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254c440] width 1920 pitch 7680 (/4 1920)
>[  2311.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255cce0]
>[  2311.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255cce0] width 1920 pitch 7680 (/4 1920)
>[  2326.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310f7d0]
>[  2326.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310f7d0] width 1920 pitch 7680 (/4 1920)
>[  2581.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255cce0]
>[  2581.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255cce0] width 1920 pitch 7680 (/4 1920)
>[  2611.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310f7d0]
>[  2611.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310f7d0] width 1920 pitch 7680 (/4 1920)
>[  2626.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255cce0]
>[  2626.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255cce0] width 1920 pitch 7680 (/4 1920)
>[  2656.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310f7d0]
>[  2656.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310f7d0] width 1920 pitch 7680 (/4 1920)
>[  2686.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255cce0]
>[  2686.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255cce0] width 1920 pitch 7680 (/4 1920)
>[  2701.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310f7d0]
>[  2701.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310f7d0] width 1920 pitch 7680 (/4 1920)
>[  2761.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255cce0]
>[  2761.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255cce0] width 1920 pitch 7680 (/4 1920)
>[  2776.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310f7d0]
>[  2776.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310f7d0] width 1920 pitch 7680 (/4 1920)
>[  2824.521] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  2824.521] (II) RADEON(0): Using hsync ranges from config file
>[  2824.521] (II) RADEON(0): Using vrefresh ranges from config file
>[  2824.521] (II) RADEON(0): Printing DDC gathered Modelines:
>[  2824.521] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  2824.521] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  2824.521] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  2914.653] (II) RADEON(0): RADEONSaveScreen(2)
>[  2914.653] (II) RADEON(0): RADEONSaveScreen(0)
>[  4842.225] (II) RADEON(0): RADEONSaveScreen(1)
>[  4842.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530f50]
>[  4842.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530f50] width 1920 pitch 7680 (/4 1920)
>[  4849.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526930]
>[  4849.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526930] width 1920 pitch 7680 (/4 1920)
>[  4851.976] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  4851.976] (II) RADEON(0): Using hsync ranges from config file
>[  4851.976] (II) RADEON(0): Using vrefresh ranges from config file
>[  4851.976] (II) RADEON(0): Printing DDC gathered Modelines:
>[  4851.976] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  4851.976] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  4851.976] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  4851.977] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  4851.977] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  4851.977] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  4851.977] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  4852.022] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  4852.022] (II) RADEON(0): Using hsync ranges from config file
>[  4852.023] (II) RADEON(0): Using vrefresh ranges from config file
>[  4852.023] (II) RADEON(0): Printing DDC gathered Modelines:
>[  4852.023] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  4852.023] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  4852.023] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  4852.067] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  4852.067] (II) RADEON(0): Using hsync ranges from config file
>[  4852.067] (II) RADEON(0): Using vrefresh ranges from config file
>[  4852.067] (II) RADEON(0): Printing DDC gathered Modelines:
>[  4852.067] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  4852.067] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  4852.067] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  4869.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  4869.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  4887.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  4887.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  4902.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  4902.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  4917.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111360]
>[  4917.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111360] width 1920 pitch 7680 (/4 1920)
>[  4962.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  4962.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  4977.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  4977.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  4992.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506250]
>[  4992.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506250] width 1920 pitch 7680 (/4 1920)
>[  5007.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  5007.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  5022.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  5022.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  5037.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506250]
>[  5037.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506250] width 1920 pitch 7680 (/4 1920)
>[  5052.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  5052.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  5067.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  5067.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  5082.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506250]
>[  5082.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506250] width 1920 pitch 7680 (/4 1920)
>[  5097.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  5097.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  5112.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  5112.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  5367.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  5367.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  5382.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  5382.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  5397.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  5397.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  5412.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  5412.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  5457.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5457.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5472.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25062c0]
>[  5472.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25062c0] width 1920 pitch 7680 (/4 1920)
>[  5487.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5487.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5517.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5517.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5532.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5532.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5547.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5547.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5562.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506720]
>[  5562.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506720] width 1920 pitch 7680 (/4 1920)
>[  5577.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506720]
>[  5577.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506720] width 1920 pitch 7680 (/4 1920)
>[  5622.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506720]
>[  5622.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506720] width 1920 pitch 7680 (/4 1920)
>[  5637.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5637.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5817.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25251f0]
>[  5817.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25251f0] width 1920 pitch 7680 (/4 1920)
>[  5832.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506720]
>[  5832.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506720] width 1920 pitch 7680 (/4 1920)
>[  5937.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  5937.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  5952.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  5952.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  5982.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506250]
>[  5982.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506250] width 1920 pitch 7680 (/4 1920)
>[  5997.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111360]
>[  5997.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111360] width 1920 pitch 7680 (/4 1920)
>[  6087.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  6087.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  6102.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506190]
>[  6102.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506190] width 1920 pitch 7680 (/4 1920)
>[  6177.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111380]
>[  6177.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111380] width 1920 pitch 7680 (/4 1920)
>[  6207.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111380]
>[  6207.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111380] width 1920 pitch 7680 (/4 1920)
>[  6297.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6297.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6312.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527900]
>[  6312.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527900] width 1920 pitch 7680 (/4 1920)
>[  6327.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527900]
>[  6327.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527900] width 1920 pitch 7680 (/4 1920)
>[  6342.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6342.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6387.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7110]
>[  6387.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7110] width 1920 pitch 7680 (/4 1920)
>[  6417.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7110]
>[  6417.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7110] width 1920 pitch 7680 (/4 1920)
>[  6432.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6432.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6447.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6447.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6522.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7110]
>[  6522.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7110] width 1920 pitch 7680 (/4 1920)
>[  6537.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6537.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6582.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6582.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6597.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31113e0]
>[  6597.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31113e0] width 1920 pitch 7680 (/4 1920)
>[  6612.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527490]
>[  6612.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527490] width 1920 pitch 7680 (/4 1920)
>[  6627.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  6627.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  6657.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527d20]
>[  6657.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527d20] width 1920 pitch 7680 (/4 1920)
>[  6672.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25703a0]
>[  6672.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25703a0] width 1920 pitch 7680 (/4 1920)
>[  6687.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  6687.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  6702.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25703a0]
>[  6702.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25703a0] width 1920 pitch 7680 (/4 1920)
>[  6717.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25703a0]
>[  6717.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25703a0] width 1920 pitch 7680 (/4 1920)
>[  6762.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25061d0]
>[  6762.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25061d0] width 1920 pitch 7680 (/4 1920)
>[  6777.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25703a0]
>[  6777.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25703a0] width 1920 pitch 7680 (/4 1920)
>[  6792.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  6792.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  6807.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25485e0]
>[  6807.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25485e0] width 1920 pitch 7680 (/4 1920)
>[  6822.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2506190]
>[  6822.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2506190] width 1920 pitch 7680 (/4 1920)
>[  6837.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25066e0]
>[  6837.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25066e0] width 1920 pitch 7680 (/4 1920)
>[  6852.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  6852.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  6867.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  6867.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  6882.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25703e0]
>[  6882.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25703e0] width 1920 pitch 7680 (/4 1920)
>[  6912.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25703e0]
>[  6912.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25703e0] width 1920 pitch 7680 (/4 1920)
>[  6927.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  6927.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  6942.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25062c0]
>[  6942.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25062c0] width 1920 pitch 7680 (/4 1920)
>[  7002.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7002.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7017.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  7017.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  7032.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7032.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7047.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7047.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7077.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7077.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7092.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7092.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7122.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7122.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7137.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7137.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7167.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7167.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7182.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7182.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7227.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7227.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7242.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  7242.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  7257.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  7257.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  7272.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  7272.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  7302.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7302.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7317.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7317.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7347.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7347.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7377.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  7377.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  7392.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  7392.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  7407.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7407.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7437.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7437.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7452.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7452.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7497.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7497.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7512.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda30]
>[  7512.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda30] width 1920 pitch 7680 (/4 1920)
>[  7527.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e00]
>[  7527.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e00] width 1920 pitch 7680 (/4 1920)
>[  7542.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7542.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7572.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7572.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7587.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7587.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7602.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7602.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7617.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7617.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7632.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7632.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7647.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7647.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7662.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7662.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7707.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7707.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7722.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7722.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7737.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7737.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7752.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7752.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7767.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30eda50]
>[  7767.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30eda50] width 1920 pitch 7680 (/4 1920)
>[  7782.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7782.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7797.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7797.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7812.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7812.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7827.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  7827.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  7887.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527d20]
>[  7887.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527d20] width 1920 pitch 7680 (/4 1920)
>[  7902.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7902.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7917.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7917.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7947.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7947.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7962.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  7962.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  7992.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25485e0]
>[  7992.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25485e0] width 1920 pitch 7680 (/4 1920)
>[  8007.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539420]
>[  8007.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539420] width 1920 pitch 7680 (/4 1920)
>[  8022.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  8022.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  8055.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2460e70]
>[  8055.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2460e70] width 1920 pitch 7680 (/4 1920)
>[  8061.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8061.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8061.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  8061.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  8061.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  8061.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  8061.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8061.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8061.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  8061.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  8061.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8061.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8061.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  8061.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  8061.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8061.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8061.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3111720]
>[  8061.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3111720] width 1920 pitch 7680 (/4 1920)
>[  8061.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8061.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8062.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8062.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8062.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8062.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8062.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2460eb0]
>[  8062.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2460eb0] width 1920 pitch 7680 (/4 1920)
>[  8062.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2460eb0]
>[  8062.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2460eb0] width 1920 pitch 7680 (/4 1920)
>[  8062.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254a620]
>[  8062.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254a620] width 1920 pitch 7680 (/4 1920)
>[  8062.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b240]
>[  8062.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b240] width 1920 pitch 7680 (/4 1920)
>[  8062.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8062.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8063.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b240]
>[  8063.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b240] width 1920 pitch 7680 (/4 1920)
>[  8063.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8063.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8063.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25718e0]
>[  8063.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25718e0] width 1920 pitch 7680 (/4 1920)
>[  8063.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539400]
>[  8063.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539400] width 1920 pitch 7680 (/4 1920)
>[  8064.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315ac90]
>[  8064.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315ac90] width 1920 pitch 7680 (/4 1920)
>[  8064.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cef20]
>[  8064.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cef20] width 1920 pitch 7680 (/4 1920)
>[  8064.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ceec0]
>[  8064.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ceec0] width 1920 pitch 7680 (/4 1920)
>[  8068.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920660]
>[  8068.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920660] width 1920 pitch 7680 (/4 1920)
>[  8071.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8071.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8071.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8071.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8071.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8071.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8071.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8071.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8071.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8071.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8071.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8071.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8071.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8071.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8071.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8071.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8071.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8071.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8072.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8072.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8073.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8073.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8074.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e28a0]
>[  8074.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e28a0] width 1920 pitch 7680 (/4 1920)
>[  8074.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530dd0]
>[  8074.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530dd0] width 1920 pitch 7680 (/4 1920)
>[  8074.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8074.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8074.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530dd0]
>[  8074.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530dd0] width 1920 pitch 7680 (/4 1920)
>[  8074.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8074.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8074.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530dd0]
>[  8074.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530dd0] width 1920 pitch 7680 (/4 1920)
>[  8074.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8074.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8074.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530dd0]
>[  8074.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530dd0] width 1920 pitch 7680 (/4 1920)
>[  8074.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8074.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8074.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505930]
>[  8074.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505930] width 1920 pitch 7680 (/4 1920)
>[  8074.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8074.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8074.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530dd0]
>[  8074.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530dd0] width 1920 pitch 7680 (/4 1920)
>[  8076.579] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[  8076.579] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[  8076.579] (II) UnloadModule: "evdev"
>[  8083.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325cd0]
>[  8083.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325cd0] width 1920 pitch 7680 (/4 1920)
>[  8098.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325cd0]
>[  8098.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325cd0] width 1920 pitch 7680 (/4 1920)
>[  8110.869] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[  8110.869] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[  8110.869] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[  8110.869] 	Option "XkbRules" "evdev"
>[  8110.869] 	Option "XkbModel" "evdev"
>[  8110.869] 	Option "XkbLayout" "us"
>[  8110.869] 	Option "_source" "server/udev"
>[  8110.869] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[  8110.869] 	Option "path" "/dev/input/event14"
>[  8110.869] 	Option "device" "/dev/input/event14"
>[  8110.869] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input15/event14"
>[  8110.869] 	Option "driver" "evdev"
>[  8110.869] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[  8110.869] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[  8110.873] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[  8110.873] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[  8110.873] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[  8110.873] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[  8110.873] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[  8110.873] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[  8110.873] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[  8110.873] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[  8110.873] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[  8110.873] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input15/event14"
>[  8110.873] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[  8110.873] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[  8110.873] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[  8110.873] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[  8110.873] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[  8110.873] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[  8110.873] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[  8110.873] (II) No input driver specified, ignoring this device.
>[  8110.873] (II) This device may have been added with another device file.
>[  8113.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315baf0]
>[  8113.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315baf0] width 1920 pitch 7680 (/4 1920)
>[  8118.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8118.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8118.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8118.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8118.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8118.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8118.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8118.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8118.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8118.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8118.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8118.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8118.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8118.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8119.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8119.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8119.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8119.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8119.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8119.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8119.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8119.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8119.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2333590]
>[  8119.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2333590] width 1920 pitch 7680 (/4 1920)
>[  8119.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8119.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8120.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8120.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8120.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8120.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8120.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8120.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8121.502] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[  8121.502] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[  8121.502] (II) UnloadModule: "evdev"
>[  8128.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8128.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8143.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530dd0]
>[  8143.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530dd0] width 1920 pitch 7680 (/4 1920)
>[  8153.243] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[  8153.243] (II) No input driver specified, ignoring this device.
>[  8153.243] (II) This device may have been added with another device file.
>[  8153.245] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[  8153.245] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[  8153.245] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[  8153.245] 	Option "XkbRules" "evdev"
>[  8153.245] 	Option "XkbModel" "evdev"
>[  8153.245] 	Option "XkbLayout" "us"
>[  8153.245] 	Option "_source" "server/udev"
>[  8153.245] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[  8153.245] 	Option "path" "/dev/input/event14"
>[  8153.245] 	Option "device" "/dev/input/event14"
>[  8153.245] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input16/event14"
>[  8153.245] 	Option "driver" "evdev"
>[  8153.245] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[  8153.245] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[  8153.249] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[  8153.249] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[  8153.249] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[  8153.249] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[  8153.249] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[  8153.249] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[  8153.249] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[  8153.249] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[  8153.249] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[  8153.249] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input16/event14"
>[  8153.249] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[  8153.249] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[  8153.249] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[  8153.249] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[  8153.249] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[  8153.249] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[  8153.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23257a0]
>[  8153.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23257a0] width 1920 pitch 7680 (/4 1920)
>[  8154.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8154.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8158.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8158.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8188.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8188.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8203.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8203.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8263.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c62c0]
>[  8263.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c62c0] width 1920 pitch 7680 (/4 1920)
>[  8293.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c86a0]
>[  8293.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c86a0] width 1920 pitch 7680 (/4 1920)
>[  8308.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2326ee0]
>[  8308.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2326ee0] width 1920 pitch 7680 (/4 1920)
>[  8338.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8338.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8368.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8368.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8383.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c62c0]
>[  8383.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c62c0] width 1920 pitch 7680 (/4 1920)
>[  8398.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8398.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8413.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8413.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8428.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8428.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8443.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c6e0]
>[  8443.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c6e0] width 1920 pitch 7680 (/4 1920)
>[  8458.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8458.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8473.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8473.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8488.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8488.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8503.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c62c0]
>[  8503.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c62c0] width 1920 pitch 7680 (/4 1920)
>[  8548.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2326ee0]
>[  8548.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2326ee0] width 1920 pitch 7680 (/4 1920)
>[  8563.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30de100]
>[  8563.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30de100] width 1920 pitch 7680 (/4 1920)
>[  8578.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c62c0]
>[  8578.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c62c0] width 1920 pitch 7680 (/4 1920)
>[  8608.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c62c0]
>[  8608.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c62c0] width 1920 pitch 7680 (/4 1920)
>[  8638.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2326ee0]
>[  8638.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2326ee0] width 1920 pitch 7680 (/4 1920)
>[  8743.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8743.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8758.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8758.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8818.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23257a0]
>[  8818.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23257a0] width 1920 pitch 7680 (/4 1920)
>[  8833.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23257a0]
>[  8833.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23257a0] width 1920 pitch 7680 (/4 1920)
>[  8878.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8878.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8893.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  8893.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  8938.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25392d0]
>[  8938.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25392d0] width 1920 pitch 7680 (/4 1920)
>[  8953.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c86a0]
>[  8953.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c86a0] width 1920 pitch 7680 (/4 1920)
>[  8983.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22f29e0]
>[  8983.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22f29e0] width 1920 pitch 7680 (/4 1920)
>[  8998.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c62c0]
>[  8998.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c62c0] width 1920 pitch 7680 (/4 1920)
>[  9028.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  9028.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  9043.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515820]
>[  9043.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515820] width 1920 pitch 7680 (/4 1920)
>[  9136.317] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  9136.317] (II) RADEON(0): Using hsync ranges from config file
>[  9136.317] (II) RADEON(0): Using vrefresh ranges from config file
>[  9136.317] (II) RADEON(0): Printing DDC gathered Modelines:
>[  9136.317] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  9136.317] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  9136.317] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  9136.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[  9136.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[  9156.119] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[  9156.119] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[  9156.119] (II) UnloadModule: "evdev"
>[  9178.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9178.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9193.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9193.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9283.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9283.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9298.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9298.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9313.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9313.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9328.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9328.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9343.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9343.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9358.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9358.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9403.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9403.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9433.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9433.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9538.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9538.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9553.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9553.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9568.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9568.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9583.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9583.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9643.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9f60]
>[  9643.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9f60] width 1920 pitch 7680 (/4 1920)
>[  9688.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505980]
>[  9688.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505980] width 1920 pitch 7680 (/4 1920)
>[  9755.660] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[  9755.660] (II) RADEON(0): Using hsync ranges from config file
>[  9755.660] (II) RADEON(0): Using vrefresh ranges from config file
>[  9755.660] (II) RADEON(0): Printing DDC gathered Modelines:
>[  9755.660] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[  9755.660] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[  9755.660] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[  9845.656] (II) RADEON(0): RADEONSaveScreen(2)
>[  9845.656] (II) RADEON(0): RADEONSaveScreen(0)
>[ 10161.178] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 10161.178] (II) No input driver specified, ignoring this device.
>[ 10161.178] (II) This device may have been added with another device file.
>[ 10161.179] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 10161.179] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 10161.179] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 10161.179] 	Option "XkbRules" "evdev"
>[ 10161.179] 	Option "XkbModel" "evdev"
>[ 10161.179] 	Option "XkbLayout" "us"
>[ 10161.179] 	Option "_source" "server/udev"
>[ 10161.179] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 10161.179] 	Option "path" "/dev/input/event14"
>[ 10161.179] 	Option "device" "/dev/input/event14"
>[ 10161.179] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input17/event14"
>[ 10161.179] 	Option "driver" "evdev"
>[ 10161.179] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 10161.179] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 10161.184] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 10161.184] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 10161.184] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 10161.184] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 10161.184] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 10161.184] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 10161.184] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 10161.184] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 10161.184] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 10161.184] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input17/event14"
>[ 10161.184] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 10161.184] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 10161.184] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 10161.184] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 10161.184] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 10161.184] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 10161.190] (II) RADEON(0): RADEONSaveScreen(1)
>[ 10161.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560710]
>[ 10161.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560710] width 1920 pitch 7680 (/4 1920)
>[ 10206.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90b90]
>[ 10206.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90b90] width 1920 pitch 7680 (/4 1920)
>[ 10266.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90b90]
>[ 10266.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90b90] width 1920 pitch 7680 (/4 1920)
>[ 10431.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd6b0]
>[ 10431.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd6b0] width 1920 pitch 7680 (/4 1920)
>[ 10446.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd81d0]
>[ 10446.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd81d0] width 1920 pitch 7680 (/4 1920)
>[ 10476.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f6230]
>[ 10476.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f6230] width 1920 pitch 7680 (/4 1920)
>[ 10491.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[ 10491.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[ 10581.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[ 10581.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[ 10596.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1700]
>[ 10596.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1700] width 1920 pitch 7680 (/4 1920)
>[ 10611.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[ 10611.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[ 10626.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d99d00]
>[ 10626.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d99d00] width 1920 pitch 7680 (/4 1920)
>[ 10656.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d99d00]
>[ 10656.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d99d00] width 1920 pitch 7680 (/4 1920)
>[ 10671.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db7090]
>[ 10671.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db7090] width 1920 pitch 7680 (/4 1920)
>[ 10731.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7960]
>[ 10731.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7960] width 1920 pitch 7680 (/4 1920)
>[ 10746.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7960]
>[ 10746.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7960] width 1920 pitch 7680 (/4 1920)
>[ 10767.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9bd30]
>[ 10767.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9bd30] width 1920 pitch 7680 (/4 1920)
>[ 10767.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[ 10767.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[ 10767.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b5560]
>[ 10767.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b5560] width 1920 pitch 7680 (/4 1920)
>[ 10767.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9bd30]
>[ 10767.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9bd30] width 1920 pitch 7680 (/4 1920)
>[ 10836.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25630a0]
>[ 10836.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25630a0] width 1920 pitch 7680 (/4 1920)
>[ 10851.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920600]
>[ 10851.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920600] width 1920 pitch 7680 (/4 1920)
>[ 10926.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920600]
>[ 10926.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920600] width 1920 pitch 7680 (/4 1920)
>[ 10941.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25630a0]
>[ 10941.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25630a0] width 1920 pitch 7680 (/4 1920)
>[ 10971.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920600]
>[ 10971.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920600] width 1920 pitch 7680 (/4 1920)
>[ 11001.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ef60]
>[ 11001.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ef60] width 1920 pitch 7680 (/4 1920)
>[ 11031.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e07820]
>[ 11031.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e07820] width 1920 pitch 7680 (/4 1920)
>[ 11036.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11036.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11036.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11036.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11036.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11037.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11037.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd08b0]
>[ 11037.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd08b0] width 1920 pitch 7680 (/4 1920)
>[ 11037.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946730]
>[ 11037.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946730] width 1920 pitch 7680 (/4 1920)
>[ 11037.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e243e0]
>[ 11037.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e243e0] width 1920 pitch 7680 (/4 1920)
>[ 11039.110] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 11039.110] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 11039.110] (II) UnloadModule: "evdev"
>[ 11046.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d708f0]
>[ 11046.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d708f0] width 1920 pitch 7680 (/4 1920)
>[ 11151.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 11151.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 11166.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11166.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11211.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 11211.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 11226.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11226.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11241.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 11241.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 11256.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11256.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11376.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 11376.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 11391.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11391.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11424.921] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 11424.921] (II) No input driver specified, ignoring this device.
>[ 11424.921] (II) This device may have been added with another device file.
>[ 11424.922] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 11424.922] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 11424.922] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 11424.922] 	Option "XkbRules" "evdev"
>[ 11424.922] 	Option "XkbModel" "evdev"
>[ 11424.922] 	Option "XkbLayout" "us"
>[ 11424.922] 	Option "_source" "server/udev"
>[ 11424.922] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 11424.922] 	Option "path" "/dev/input/event14"
>[ 11424.922] 	Option "device" "/dev/input/event14"
>[ 11424.922] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input18/event14"
>[ 11424.922] 	Option "driver" "evdev"
>[ 11424.922] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 11424.922] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 11424.924] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 11424.924] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 11424.924] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 11424.924] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 11424.924] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 11424.924] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 11424.924] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 11424.924] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 11424.924] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 11424.924] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input18/event14"
>[ 11424.924] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 11424.924] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 11424.924] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 11424.924] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 11424.924] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 11424.924] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 11429.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11429.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11429.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11429.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11429.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 11429.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 11429.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 11429.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 11431.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8ad0]
>[ 11431.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8ad0] width 1920 pitch 7680 (/4 1920)
>[ 11436.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff32a0]
>[ 11436.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff32a0] width 1920 pitch 7680 (/4 1920)
>[ 11441.911] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 11441.912] (II) RADEON(0): Using hsync ranges from config file
>[ 11441.912] (II) RADEON(0): Using vrefresh ranges from config file
>[ 11441.912] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 11441.912] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 11441.912] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 11441.912] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 11441.956] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 11441.957] (II) RADEON(0): Using hsync ranges from config file
>[ 11441.957] (II) RADEON(0): Using vrefresh ranges from config file
>[ 11441.957] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 11441.957] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 11441.957] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 11441.957] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 11442.002] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 11442.003] (II) RADEON(0): Using hsync ranges from config file
>[ 11442.003] (II) RADEON(0): Using vrefresh ranges from config file
>[ 11442.003] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 11442.003] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 11442.003] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 11442.003] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 11451.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2f1e0]
>[ 11451.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2f1e0] width 1920 pitch 7680 (/4 1920)
>[ 11466.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff31b0]
>[ 11466.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff31b0] width 1920 pitch 7680 (/4 1920)
>[ 11481.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff50b0]
>[ 11481.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff50b0] width 1920 pitch 7680 (/4 1920)
>[ 11496.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff50b0]
>[ 11496.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff50b0] width 1920 pitch 7680 (/4 1920)
>[ 11511.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2efb0]
>[ 11511.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2efb0] width 1920 pitch 7680 (/4 1920)
>[ 11526.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2efb0]
>[ 11526.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2efb0] width 1920 pitch 7680 (/4 1920)
>[ 11541.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff30c0]
>[ 11541.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff30c0] width 1920 pitch 7680 (/4 1920)
>[ 11586.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2f240]
>[ 11586.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2f240] width 1920 pitch 7680 (/4 1920)
>[ 11616.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2f240]
>[ 11616.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2f240] width 1920 pitch 7680 (/4 1920)
>[ 11646.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3100]
>[ 11646.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3100] width 1920 pitch 7680 (/4 1920)
>[ 11661.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2f220]
>[ 11661.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2f220] width 1920 pitch 7680 (/4 1920)
>[ 11676.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4d50]
>[ 11676.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4d50] width 1920 pitch 7680 (/4 1920)
>[ 11687.461] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 11687.461] (II) RADEON(0): Using hsync ranges from config file
>[ 11687.461] (II) RADEON(0): Using vrefresh ranges from config file
>[ 11687.461] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 11687.461] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 11687.461] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 11687.461] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 11687.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 11687.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 11689.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c2f0]
>[ 11689.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c2f0] width 1920 pitch 7680 (/4 1920)
>[ 11689.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11689.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11689.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9ae0]
>[ 11689.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9ae0] width 1920 pitch 7680 (/4 1920)
>[ 11689.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bb80]
>[ 11689.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bb80] width 1920 pitch 7680 (/4 1920)
>[ 11691.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60e60]
>[ 11691.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60e60] width 1920 pitch 7680 (/4 1920)
>[ 11691.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11691.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11691.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11691.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11691.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11692.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11692.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11692.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11692.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11693.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11693.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11693.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11693.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11693.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11693.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11693.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11693.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11693.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11693.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11693.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11693.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11693.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11693.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11693.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11693.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11693.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11693.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11693.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11693.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11693.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11693.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc910]
>[ 11694.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc910] width 1920 pitch 7680 (/4 1920)
>[ 11694.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff33a0]
>[ 11694.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff33a0] width 1920 pitch 7680 (/4 1920)
>[ 11694.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39304b0]
>[ 11694.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39304b0] width 1920 pitch 7680 (/4 1920)
>[ 11695.129] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 11695.130] (II) RADEON(0): Using hsync ranges from config file
>[ 11695.130] (II) RADEON(0): Using vrefresh ranges from config file
>[ 11695.130] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 11695.130] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 11695.130] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 11695.130] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 11695.741] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 11695.741] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 11695.741] (II) UnloadModule: "evdev"
>[ 11696.858] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 11696.858] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 11696.858] (II) RADEON(0): Ok, leaving now...
>[ 11709.896] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 11709.896] (II) RADEON(0): RADEONEnterVT_KMS
>[ 11709.941] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 11709.941] (II) RADEON(0): Using hsync ranges from config file
>[ 11709.941] (II) RADEON(0): Using vrefresh ranges from config file
>[ 11709.941] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 11709.941] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 11709.941] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 11709.941] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 11709.947] (II) RADEON(0): RADEONSaveScreen(2)
>[ 12319.822] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 12319.822] (II) No input driver specified, ignoring this device.
>[ 12319.822] (II) This device may have been added with another device file.
>[ 12319.823] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 12319.823] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 12319.823] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 12319.823] 	Option "XkbRules" "evdev"
>[ 12319.823] 	Option "XkbModel" "evdev"
>[ 12319.823] 	Option "XkbLayout" "us"
>[ 12319.823] 	Option "_source" "server/udev"
>[ 12319.823] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 12319.823] 	Option "path" "/dev/input/event14"
>[ 12319.823] 	Option "device" "/dev/input/event14"
>[ 12319.823] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input19/event14"
>[ 12319.823] 	Option "driver" "evdev"
>[ 12319.823] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 12319.823] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 12319.827] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 12319.827] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 12319.827] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 12319.827] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 12319.827] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 12319.827] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 12319.827] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 12319.827] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 12319.827] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 12319.827] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input19/event14"
>[ 12319.827] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 12319.827] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 12319.827] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 12319.827] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 12319.827] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 12319.827] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 12348.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df99c0]
>[ 12348.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df99c0] width 1920 pitch 7680 (/4 1920)
>[ 12349.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12349.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12349.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12350.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12350.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12350.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12350.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12350.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12350.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12350.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12350.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12350.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12351.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12351.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12351.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12351.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12351.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12351.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12458.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12458.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12459.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 12459.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 12459.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12459.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12530.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df99c0]
>[ 12530.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df99c0] width 1920 pitch 7680 (/4 1920)
>[ 12531.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed140]
>[ 12531.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed140] width 1920 pitch 7680 (/4 1920)
>[ 12531.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 12531.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 12531.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dad270]
>[ 12531.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dad270] width 1920 pitch 7680 (/4 1920)
>[ 12533.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc1250]
>[ 12533.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc1250] width 1920 pitch 7680 (/4 1920)
>[ 12545.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12545.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9d240]
>[ 12545.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9d240] width 1920 pitch 7680 (/4 1920)
>[ 12545.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12545.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42c10]
>[ 12552.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42c10] width 1920 pitch 7680 (/4 1920)
>[ 12552.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12552.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca30]
>[ 12552.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca30] width 1920 pitch 7680 (/4 1920)
>[ 12552.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12552.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12553.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12553.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12553.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12553.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12553.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12553.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12553.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12553.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12553.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12553.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12553.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12553.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12553.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12553.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12553.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12553.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12553.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12553.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12553.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12554.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12554.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12554.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12554.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12554.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12554.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12554.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12554.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12554.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12554.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c520]
>[ 12554.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c520] width 1920 pitch 7680 (/4 1920)
>[ 12554.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcbab0]
>[ 12554.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcbab0] width 1920 pitch 7680 (/4 1920)
>[ 12565.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfec0]
>[ 12565.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfec0] width 1920 pitch 7680 (/4 1920)
>[ 12580.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eba170]
>[ 12580.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eba170] width 1920 pitch 7680 (/4 1920)
>[ 12595.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3cf0]
>[ 12595.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3cf0] width 1920 pitch 7680 (/4 1920)
>[ 12610.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2f4b0]
>[ 12610.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2f4b0] width 1920 pitch 7680 (/4 1920)
>[ 12613.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecbbc0]
>[ 12613.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecbbc0] width 1920 pitch 7680 (/4 1920)
>[ 12613.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12613.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12613.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12613.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc210]
>[ 12613.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc210] width 1920 pitch 7680 (/4 1920)
>[ 12625.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead580]
>[ 12625.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead580] width 1920 pitch 7680 (/4 1920)
>[ 12640.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12640.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12715.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12715.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12730.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12730.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12745.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12745.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12760.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12760.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12805.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12805.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12820.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12820.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12835.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44600]
>[ 12835.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44600] width 1920 pitch 7680 (/4 1920)
>[ 12850.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12850.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 12865.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2eb50]
>[ 12865.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2eb50] width 1920 pitch 7680 (/4 1920)
>[ 12880.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2eb50]
>[ 12880.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2eb50] width 1920 pitch 7680 (/4 1920)
>[ 12955.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd6b0]
>[ 12955.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd6b0] width 1920 pitch 7680 (/4 1920)
>[ 12970.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 12970.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 13000.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd6b0]
>[ 13000.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd6b0] width 1920 pitch 7680 (/4 1920)
>[ 13015.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44600]
>[ 13015.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44600] width 1920 pitch 7680 (/4 1920)
>[ 13075.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44600]
>[ 13075.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44600] width 1920 pitch 7680 (/4 1920)
>[ 13090.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e44600]
>[ 13090.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e44600] width 1920 pitch 7680 (/4 1920)
>[ 13208.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4d80]
>[ 13208.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4d80] width 1920 pitch 7680 (/4 1920)
>[ 13209.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc27f0]
>[ 13209.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc27f0] width 1920 pitch 7680 (/4 1920)
>[ 13209.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13209.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13209.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13209.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4a160]
>[ 13209.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4a160] width 1920 pitch 7680 (/4 1920)
>[ 13210.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcca90]
>[ 13210.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcca90] width 1920 pitch 7680 (/4 1920)
>[ 13225.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eccf30]
>[ 13225.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eccf30] width 1920 pitch 7680 (/4 1920)
>[ 13226.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc27f0]
>[ 13226.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc27f0] width 1920 pitch 7680 (/4 1920)
>[ 13227.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd4d0]
>[ 13227.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd4d0] width 1920 pitch 7680 (/4 1920)
>[ 13227.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394f540]
>[ 13227.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394f540] width 1920 pitch 7680 (/4 1920)
>[ 13227.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9af0]
>[ 13227.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9af0] width 1920 pitch 7680 (/4 1920)
>[ 13240.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 13240.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 13255.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f8de0]
>[ 13255.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f8de0] width 1920 pitch 7680 (/4 1920)
>[ 13257.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc670]
>[ 13257.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc670] width 1920 pitch 7680 (/4 1920)
>[ 13257.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84e60]
>[ 13257.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84e60] width 1920 pitch 7680 (/4 1920)
>[ 13257.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946330]
>[ 13257.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946330] width 1920 pitch 7680 (/4 1920)
>[ 13257.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84e60]
>[ 13257.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84e60] width 1920 pitch 7680 (/4 1920)
>[ 13257.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946330]
>[ 13257.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946330] width 1920 pitch 7680 (/4 1920)
>[ 13257.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84e60]
>[ 13257.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84e60] width 1920 pitch 7680 (/4 1920)
>[ 13257.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946330]
>[ 13257.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946330] width 1920 pitch 7680 (/4 1920)
>[ 13257.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84e60]
>[ 13257.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84e60] width 1920 pitch 7680 (/4 1920)
>[ 13257.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946330]
>[ 13257.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946330] width 1920 pitch 7680 (/4 1920)
>[ 13257.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84e60]
>[ 13257.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84e60] width 1920 pitch 7680 (/4 1920)
>[ 13257.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946330]
>[ 13257.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946330] width 1920 pitch 7680 (/4 1920)
>[ 13257.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942eb0]
>[ 13257.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942eb0] width 1920 pitch 7680 (/4 1920)
>[ 13258.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7be60]
>[ 13258.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7be60] width 1920 pitch 7680 (/4 1920)
>[ 13258.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb9830]
>[ 13258.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb9830] width 1920 pitch 7680 (/4 1920)
>[ 13258.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13258.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13259.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6eb70]
>[ 13259.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6eb70] width 1920 pitch 7680 (/4 1920)
>[ 13259.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7be60]
>[ 13259.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7be60] width 1920 pitch 7680 (/4 1920)
>[ 13259.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb6c00]
>[ 13259.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb6c00] width 1920 pitch 7680 (/4 1920)
>[ 13259.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecac80]
>[ 13259.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecac80] width 1920 pitch 7680 (/4 1920)
>[ 13260.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8de10]
>[ 13260.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8de10] width 1920 pitch 7680 (/4 1920)
>[ 13260.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8f6a0]
>[ 13260.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8f6a0] width 1920 pitch 7680 (/4 1920)
>[ 13260.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90700]
>[ 13260.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90700] width 1920 pitch 7680 (/4 1920)
>[ 13260.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8f6a0]
>[ 13260.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8f6a0] width 1920 pitch 7680 (/4 1920)
>[ 13260.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90700]
>[ 13260.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90700] width 1920 pitch 7680 (/4 1920)
>[ 13260.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8f6a0]
>[ 13260.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8f6a0] width 1920 pitch 7680 (/4 1920)
>[ 13260.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8f7c0]
>[ 13260.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8f7c0] width 1920 pitch 7680 (/4 1920)
>[ 13260.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8f6a0]
>[ 13260.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8f6a0] width 1920 pitch 7680 (/4 1920)
>[ 13260.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8f7c0]
>[ 13260.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8f7c0] width 1920 pitch 7680 (/4 1920)
>[ 13260.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73350]
>[ 13260.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73350] width 1920 pitch 7680 (/4 1920)
>[ 13260.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfd00]
>[ 13260.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfd00] width 1920 pitch 7680 (/4 1920)
>[ 13266.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79680]
>[ 13266.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79680] width 1920 pitch 7680 (/4 1920)
>[ 13266.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f500]
>[ 13266.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f500] width 1920 pitch 7680 (/4 1920)
>[ 13266.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79680]
>[ 13266.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79680] width 1920 pitch 7680 (/4 1920)
>[ 13266.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f500]
>[ 13266.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f500] width 1920 pitch 7680 (/4 1920)
>[ 13266.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79680]
>[ 13266.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79680] width 1920 pitch 7680 (/4 1920)
>[ 13266.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77e70]
>[ 13266.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77e70] width 1920 pitch 7680 (/4 1920)
>[ 13266.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79680]
>[ 13266.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79680] width 1920 pitch 7680 (/4 1920)
>[ 13266.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77e70]
>[ 13266.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77e70] width 1920 pitch 7680 (/4 1920)
>[ 13266.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6a40]
>[ 13266.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6a40] width 1920 pitch 7680 (/4 1920)
>[ 13266.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02140]
>[ 13266.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02140] width 1920 pitch 7680 (/4 1920)
>[ 13266.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06490]
>[ 13266.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06490] width 1920 pitch 7680 (/4 1920)
>[ 13266.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09b40]
>[ 13266.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09b40] width 1920 pitch 7680 (/4 1920)
>[ 13266.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02140]
>[ 13266.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02140] width 1920 pitch 7680 (/4 1920)
>[ 13266.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09b40]
>[ 13266.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09b40] width 1920 pitch 7680 (/4 1920)
>[ 13266.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02140]
>[ 13266.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02140] width 1920 pitch 7680 (/4 1920)
>[ 13269.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c589d0]
>[ 13269.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c589d0] width 1920 pitch 7680 (/4 1920)
>[ 13269.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58570]
>[ 13269.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58570] width 1920 pitch 7680 (/4 1920)
>[ 13269.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13269.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13270.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01770]
>[ 13270.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01770] width 1920 pitch 7680 (/4 1920)
>[ 13270.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d200]
>[ 13270.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d200] width 1920 pitch 7680 (/4 1920)
>[ 13271.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b871d0]
>[ 13271.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b871d0] width 1920 pitch 7680 (/4 1920)
>[ 13271.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13271.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b871d0]
>[ 13271.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b871d0] width 1920 pitch 7680 (/4 1920)
>[ 13271.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13271.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b871d0]
>[ 13271.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b871d0] width 1920 pitch 7680 (/4 1920)
>[ 13271.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13271.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b871d0]
>[ 13271.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b871d0] width 1920 pitch 7680 (/4 1920)
>[ 13271.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13271.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06490]
>[ 13271.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06490] width 1920 pitch 7680 (/4 1920)
>[ 13271.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13271.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06490]
>[ 13271.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06490] width 1920 pitch 7680 (/4 1920)
>[ 13271.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13271.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06490]
>[ 13271.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06490] width 1920 pitch 7680 (/4 1920)
>[ 13271.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a890]
>[ 13271.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a890] width 1920 pitch 7680 (/4 1920)
>[ 13280.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57cf0]
>[ 13280.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57cf0] width 1920 pitch 7680 (/4 1920)
>[ 13290.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79a10]
>[ 13290.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79a10] width 1920 pitch 7680 (/4 1920)
>[ 13292.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25309b0]
>[ 13292.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25309b0] width 1920 pitch 7680 (/4 1920)
>[ 13292.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07f40]
>[ 13292.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07f40] width 1920 pitch 7680 (/4 1920)
>[ 13292.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25309b0]
>[ 13292.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25309b0] width 1920 pitch 7680 (/4 1920)
>[ 13299.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c710]
>[ 13299.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c710] width 1920 pitch 7680 (/4 1920)
>[ 13299.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81f30]
>[ 13299.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81f30] width 1920 pitch 7680 (/4 1920)
>[ 13299.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c710]
>[ 13299.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c710] width 1920 pitch 7680 (/4 1920)
>[ 13299.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c710]
>[ 13299.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c710] width 1920 pitch 7680 (/4 1920)
>[ 13300.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c3d0]
>[ 13300.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c3d0] width 1920 pitch 7680 (/4 1920)
>[ 13300.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[ 13300.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[ 13300.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87400]
>[ 13300.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87400] width 1920 pitch 7680 (/4 1920)
>[ 13300.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87400]
>[ 13300.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87400] width 1920 pitch 7680 (/4 1920)
>[ 13300.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c3d0]
>[ 13300.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c3d0] width 1920 pitch 7680 (/4 1920)
>[ 13311.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd0e90]
>[ 13311.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd0e90] width 1920 pitch 7680 (/4 1920)
>[ 13312.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39361b0]
>[ 13312.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39361b0] width 1920 pitch 7680 (/4 1920)
>[ 13312.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39364e0]
>[ 13312.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39364e0] width 1920 pitch 7680 (/4 1920)
>[ 13313.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c519a0]
>[ 13313.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c519a0] width 1920 pitch 7680 (/4 1920)
>[ 13315.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca00d0]
>[ 13315.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca00d0] width 1920 pitch 7680 (/4 1920)
>[ 13316.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07360]
>[ 13316.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07360] width 1920 pitch 7680 (/4 1920)
>[ 13316.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c519a0]
>[ 13316.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c519a0] width 1920 pitch 7680 (/4 1920)
>[ 13316.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23130]
>[ 13316.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23130] width 1920 pitch 7680 (/4 1920)
>[ 13316.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23000]
>[ 13316.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23000] width 1920 pitch 7680 (/4 1920)
>[ 13319.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f9b0]
>[ 13319.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f9b0] width 1920 pitch 7680 (/4 1920)
>[ 13320.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee3200]
>[ 13320.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee3200] width 1920 pitch 7680 (/4 1920)
>[ 13320.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c3d0]
>[ 13320.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c3d0] width 1920 pitch 7680 (/4 1920)
>[ 13320.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e80550]
>[ 13320.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e80550] width 1920 pitch 7680 (/4 1920)
>[ 13320.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c54e20]
>[ 13320.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c54e20] width 1920 pitch 7680 (/4 1920)
>[ 13320.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13320.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13325.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c3d0]
>[ 13325.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c3d0] width 1920 pitch 7680 (/4 1920)
>[ 13328.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77f10]
>[ 13328.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77f10] width 1920 pitch 7680 (/4 1920)
>[ 13328.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee3200]
>[ 13328.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee3200] width 1920 pitch 7680 (/4 1920)
>[ 13328.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02960]
>[ 13328.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02960] width 1920 pitch 7680 (/4 1920)
>[ 13328.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c41300]
>[ 13328.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c41300] width 1920 pitch 7680 (/4 1920)
>[ 13330.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c40ce0]
>[ 13330.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c40ce0] width 1920 pitch 7680 (/4 1920)
>[ 13345.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfe80]
>[ 13345.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfe80] width 1920 pitch 7680 (/4 1920)
>[ 13354.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8edc0]
>[ 13354.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8edc0] width 1920 pitch 7680 (/4 1920)
>[ 13354.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71250]
>[ 13354.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71250] width 1920 pitch 7680 (/4 1920)
>[ 13354.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8edc0]
>[ 13354.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8edc0] width 1920 pitch 7680 (/4 1920)
>[ 13354.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8edc0]
>[ 13354.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8edc0] width 1920 pitch 7680 (/4 1920)
>[ 13360.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8edc0]
>[ 13360.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8edc0] width 1920 pitch 7680 (/4 1920)
>[ 13363.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb10]
>[ 13363.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb10] width 1920 pitch 7680 (/4 1920)
>[ 13363.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77f10]
>[ 13363.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77f10] width 1920 pitch 7680 (/4 1920)
>[ 13364.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77f10]
>[ 13364.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77f10] width 1920 pitch 7680 (/4 1920)
>[ 13364.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71250]
>[ 13364.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71250] width 1920 pitch 7680 (/4 1920)
>[ 13364.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391c0a0]
>[ 13364.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391c0a0] width 1920 pitch 7680 (/4 1920)
>[ 13375.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37b90]
>[ 13375.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37b90] width 1920 pitch 7680 (/4 1920)
>[ 13381.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12090]
>[ 13381.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12090] width 1920 pitch 7680 (/4 1920)
>[ 13381.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[ 13381.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[ 13381.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77f10]
>[ 13381.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77f10] width 1920 pitch 7680 (/4 1920)
>[ 13381.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[ 13381.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[ 13382.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25309b0]
>[ 13382.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25309b0] width 1920 pitch 7680 (/4 1920)
>[ 13382.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77f10]
>[ 13382.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77f10] width 1920 pitch 7680 (/4 1920)
>[ 13382.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566520]
>[ 13382.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566520] width 1920 pitch 7680 (/4 1920)
>[ 13382.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13382.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13382.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71250]
>[ 13382.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71250] width 1920 pitch 7680 (/4 1920)
>[ 13382.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13382.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13382.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71250]
>[ 13382.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71250] width 1920 pitch 7680 (/4 1920)
>[ 13382.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13382.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13382.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71250]
>[ 13382.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71250] width 1920 pitch 7680 (/4 1920)
>[ 13382.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13382.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13382.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391c0a0]
>[ 13382.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391c0a0] width 1920 pitch 7680 (/4 1920)
>[ 13390.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13390.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13403.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13403.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13404.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391c0a0]
>[ 13404.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391c0a0] width 1920 pitch 7680 (/4 1920)
>[ 13404.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13404.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13404.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566520]
>[ 13404.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566520] width 1920 pitch 7680 (/4 1920)
>[ 13404.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71250]
>[ 13404.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71250] width 1920 pitch 7680 (/4 1920)
>[ 13404.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f120a0]
>[ 13404.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f120a0] width 1920 pitch 7680 (/4 1920)
>[ 13407.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87270]
>[ 13407.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87270] width 1920 pitch 7680 (/4 1920)
>[ 13412.544] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 13412.544] (II) RADEON(0): Using hsync ranges from config file
>[ 13412.544] (II) RADEON(0): Using vrefresh ranges from config file
>[ 13412.544] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13412.544] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 13412.544] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 13412.544] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 13412.587] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 13412.587] (II) RADEON(0): Using hsync ranges from config file
>[ 13412.587] (II) RADEON(0): Using vrefresh ranges from config file
>[ 13412.587] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13412.587] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 13412.587] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 13412.587] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 13412.588] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 13412.588] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 13412.588] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 13412.588] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 13412.588] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 13412.588] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 13412.631] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 13412.631] (II) RADEON(0): Using hsync ranges from config file
>[ 13412.631] (II) RADEON(0): Using vrefresh ranges from config file
>[ 13412.631] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13412.631] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 13412.631] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 13412.631] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 13415.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13415.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13416.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[ 13416.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[ 13417.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391c0a0]
>[ 13417.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391c0a0] width 1920 pitch 7680 (/4 1920)
>[ 13417.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6eb70]
>[ 13417.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6eb70] width 1920 pitch 7680 (/4 1920)
>[ 13417.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb6c00]
>[ 13417.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb6c00] width 1920 pitch 7680 (/4 1920)
>[ 13420.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[ 13420.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[ 13423.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d7fb0]
>[ 13423.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d7fb0] width 1920 pitch 7680 (/4 1920)
>[ 13423.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a7a00]
>[ 13423.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a7a00] width 1920 pitch 7680 (/4 1920)
>[ 13423.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80960]
>[ 13423.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80960] width 1920 pitch 7680 (/4 1920)
>[ 13423.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13423.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13424.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca50e0]
>[ 13424.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca50e0] width 1920 pitch 7680 (/4 1920)
>[ 13425.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13425.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13425.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13425.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13425.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c40fa0]
>[ 13425.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c40fa0] width 1920 pitch 7680 (/4 1920)
>[ 13427.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13427.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13450.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13450.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13467.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13467.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13467.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13467.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13467.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13467.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13467.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3938880]
>[ 13467.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3938880] width 1920 pitch 7680 (/4 1920)
>[ 13467.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13467.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13467.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13467.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13467.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13467.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13467.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13467.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13467.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13467.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13468.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3938880]
>[ 13468.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3938880] width 1920 pitch 7680 (/4 1920)
>[ 13468.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3938880]
>[ 13468.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3938880] width 1920 pitch 7680 (/4 1920)
>[ 13468.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e440]
>[ 13468.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e440] width 1920 pitch 7680 (/4 1920)
>[ 13468.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d24d0]
>[ 13468.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d24d0] width 1920 pitch 7680 (/4 1920)
>[ 13468.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13468.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13468.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391c0a0]
>[ 13468.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391c0a0] width 1920 pitch 7680 (/4 1920)
>[ 13468.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13468.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13468.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d24d0]
>[ 13469.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d24d0] width 1920 pitch 7680 (/4 1920)
>[ 13469.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d24d0]
>[ 13469.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d24d0] width 1920 pitch 7680 (/4 1920)
>[ 13469.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 13469.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 13480.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccae0]
>[ 13480.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccae0] width 1920 pitch 7680 (/4 1920)
>[ 13493.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13493.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13494.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13494.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13494.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13494.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13495.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13495.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13498.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13498.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13498.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13498.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13498.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13498.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13498.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13498.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13498.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13499.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13499.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13499.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13499.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13499.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13499.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13499.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13499.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13499.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13499.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13499.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13499.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13499.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13499.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13499.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13499.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13499.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13499.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13499.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13499.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13499.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41db0]
>[ 13499.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41db0] width 1920 pitch 7680 (/4 1920)
>[ 13499.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13499.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13499.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13499.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13499.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13499.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13499.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85c30]
>[ 13499.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85c30] width 1920 pitch 7680 (/4 1920)
>[ 13525.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13525.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13540.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13540.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13555.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13555.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13570.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13570.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13690.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13690.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13720.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13720.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13870.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13870.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13885.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13885.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13893.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13893.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13893.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13893.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13894.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13894.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13894.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13894.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13894.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13894.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13894.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13894.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13894.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13894.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13894.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13894.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13894.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13894.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13894.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13895.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13895.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13895.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13895.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13895.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13895.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13895.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13895.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13895.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13895.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13895.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13895.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 13895.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 13895.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 13895.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 13895.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13895.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13897.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13897.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13897.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13897.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13897.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13897.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 13897.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 13897.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315d0b0]
>[ 13897.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315d0b0] width 1920 pitch 7680 (/4 1920)
>[ 13930.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13930.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 13960.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 13960.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14005.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14005.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14020.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14020.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14026.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14026.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14026.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14026.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14027.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14027.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14027.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14027.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14027.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14027.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14027.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14027.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14027.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14027.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14027.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14027.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14027.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14027.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14028.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14028.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14028.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14028.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14049.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14049.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14050.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14050.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14050.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14050.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14050.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14050.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14050.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14050.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14050.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14050.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14050.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14050.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14050.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14050.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14065.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14065.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14095.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14095.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14125.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14125.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14140.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14140.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14141.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14141.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14141.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14141.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14141.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14141.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14141.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14141.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14141.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14141.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14141.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14141.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14141.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14141.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14141.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14142.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14142.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14142.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14142.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14142.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14142.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14142.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14142.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14142.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14143.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14143.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14144.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14144.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14144.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14144.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14144.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14144.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14144.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14145.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14145.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14145.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14145.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14145.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14145.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[ 14145.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[ 14146.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14146.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14216.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14216.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14216.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14216.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14216.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14216.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14216.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14216.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14216.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14217.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14217.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14217.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14217.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14217.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14217.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14217.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14217.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14217.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14217.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14217.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14218.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14218.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14219.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14219.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14219.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14219.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14219.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85610]
>[ 14219.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85610] width 1920 pitch 7680 (/4 1920)
>[ 14219.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14219.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14219.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14220.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14220.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14220.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14220.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14220.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14220.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14220.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14221.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14221.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14221.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14221.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14221.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14221.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14222.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c455b0]
>[ 14222.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c455b0] width 1920 pitch 7680 (/4 1920)
>[ 14222.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14222.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14222.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84980]
>[ 14222.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84980] width 1920 pitch 7680 (/4 1920)
>[ 14222.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14222.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14222.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffab0]
>[ 14222.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffab0] width 1920 pitch 7680 (/4 1920)
>[ 14222.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3938b60]
>[ 14222.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3938b60] width 1920 pitch 7680 (/4 1920)
>[ 14222.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02140]
>[ 14222.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02140] width 1920 pitch 7680 (/4 1920)
>[ 14256.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdd00]
>[ 14256.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdd00] width 1920 pitch 7680 (/4 1920)
>[ 14260.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3938880]
>[ 14260.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3938880] width 1920 pitch 7680 (/4 1920)
>[ 14275.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2120]
>[ 14275.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2120] width 1920 pitch 7680 (/4 1920)
>[ 14278.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 14278.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 14290.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 14290.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 14305.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 14305.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 14330.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006100]
>[ 14330.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006100] width 1920 pitch 7680 (/4 1920)
>[ 14330.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76c90]
>[ 14330.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76c90] width 1920 pitch 7680 (/4 1920)
>[ 14330.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14330.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14330.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d24d0]
>[ 14330.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d24d0] width 1920 pitch 7680 (/4 1920)
>[ 14330.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c711f0]
>[ 14330.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c711f0] width 1920 pitch 7680 (/4 1920)
>[ 14330.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14330.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14330.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 14330.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 14330.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14330.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14330.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 14330.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 14330.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f0f0]
>[ 14330.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f0f0] width 1920 pitch 7680 (/4 1920)
>[ 14331.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4b50]
>[ 14331.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4b50] width 1920 pitch 7680 (/4 1920)
>[ 14331.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 14331.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 14331.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4b50]
>[ 14331.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4b50] width 1920 pitch 7680 (/4 1920)
>[ 14331.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 14331.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 14331.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4b50]
>[ 14331.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4b50] width 1920 pitch 7680 (/4 1920)
>[ 14331.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 14331.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 14332.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebbad0]
>[ 14332.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebbad0] width 1920 pitch 7680 (/4 1920)
>[ 14332.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebbad0]
>[ 14332.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebbad0] width 1920 pitch 7680 (/4 1920)
>[ 14332.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 14332.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 14332.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 14333.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 14333.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 14333.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 14333.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[ 14333.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[ 14333.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 14333.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 14333.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[ 14333.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[ 14333.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 14333.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 14333.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[ 14333.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[ 14341.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c519a0]
>[ 14341.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c519a0] width 1920 pitch 7680 (/4 1920)
>[ 14342.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76c90]
>[ 14342.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76c90] width 1920 pitch 7680 (/4 1920)
>[ 14342.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c519a0]
>[ 14342.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c519a0] width 1920 pitch 7680 (/4 1920)
>[ 14342.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76c90]
>[ 14342.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76c90] width 1920 pitch 7680 (/4 1920)
>[ 14342.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c519a0]
>[ 14342.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c519a0] width 1920 pitch 7680 (/4 1920)
>[ 14342.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76c90]
>[ 14342.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76c90] width 1920 pitch 7680 (/4 1920)
>[ 14342.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14342.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14342.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2500]
>[ 14342.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2500] width 1920 pitch 7680 (/4 1920)
>[ 14342.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc97c0]
>[ 14343.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc97c0] width 1920 pitch 7680 (/4 1920)
>[ 14343.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc97c0]
>[ 14343.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc97c0] width 1920 pitch 7680 (/4 1920)
>[ 14343.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14343.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14343.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14343.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14343.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14343.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14343.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14343.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14343.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14343.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14343.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14343.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14350.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14350.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14365.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14365.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14395.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14395.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14440.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14440.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14515.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14515.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14530.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14530.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14545.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14545.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14560.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14560.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14590.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14590.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14605.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14605.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14620.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14620.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14635.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14635.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14650.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14650.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14665.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14665.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14680.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14680.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14695.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14695.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14710.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14710.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14725.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14725.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14770.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14770.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14785.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14785.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14800.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14800.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14815.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14815.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14860.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14860.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14875.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d9b0]
>[ 14875.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d9b0] width 1920 pitch 7680 (/4 1920)
>[ 14890.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14890.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14905.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14905.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 14965.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 14965.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 14980.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 14980.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 15010.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 15010.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 15025.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 15025.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 15100.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a2c0]
>[ 15100.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a2c0] width 1920 pitch 7680 (/4 1920)
>[ 15115.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 15115.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 15244.285] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 15244.285] (II) RADEON(0): Using hsync ranges from config file
>[ 15244.285] (II) RADEON(0): Using vrefresh ranges from config file
>[ 15244.285] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 15244.285] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 15244.285] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 15244.285] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 15244.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566520]
>[ 15244.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566520] width 1920 pitch 7680 (/4 1920)
>[ 15265.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006100]
>[ 15265.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006100] width 1920 pitch 7680 (/4 1920)
>[ 15295.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566520]
>[ 15295.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566520] width 1920 pitch 7680 (/4 1920)
>[ 15310.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6230]
>[ 15310.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6230] width 1920 pitch 7680 (/4 1920)
>[ 15325.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bc7f0]
>[ 15325.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bc7f0] width 1920 pitch 7680 (/4 1920)
>[ 15370.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebbad0]
>[ 15370.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebbad0] width 1920 pitch 7680 (/4 1920)
>[ 15385.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c519a0]
>[ 15385.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c519a0] width 1920 pitch 7680 (/4 1920)
>[ 15415.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 15415.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 15430.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd8e0]
>[ 15430.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd8e0] width 1920 pitch 7680 (/4 1920)
>[ 15580.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[ 15580.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[ 15595.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 15595.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 15730.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 15730.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 15745.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006100]
>[ 15745.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006100] width 1920 pitch 7680 (/4 1920)
>[ 15760.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00960]
>[ 15760.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00960] width 1920 pitch 7680 (/4 1920)
>[ 15805.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0a60]
>[ 15805.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0a60] width 1920 pitch 7680 (/4 1920)
>[ 15810.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76c90]
>[ 15810.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76c90] width 1920 pitch 7680 (/4 1920)
>[ 15810.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d6230]
>[ 15810.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d6230] width 1920 pitch 7680 (/4 1920)
>[ 15810.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[ 15810.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[ 15810.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f8a10]
>[ 15810.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f8a10] width 1920 pitch 7680 (/4 1920)
>[ 15810.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31112e0]
>[ 15810.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31112e0] width 1920 pitch 7680 (/4 1920)
>[ 15810.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e830]
>[ 15810.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e830] width 1920 pitch 7680 (/4 1920)
>[ 15810.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e830]
>[ 15810.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e830] width 1920 pitch 7680 (/4 1920)
>[ 15810.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d99a30]
>[ 15810.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d99a30] width 1920 pitch 7680 (/4 1920)
>[ 15810.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15810.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ea40]
>[ 15810.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ea40] width 1920 pitch 7680 (/4 1920)
>[ 15810.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc13c0]
>[ 15810.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc13c0] width 1920 pitch 7680 (/4 1920)
>[ 15862.004] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 15862.004] (II) RADEON(0): Using hsync ranges from config file
>[ 15862.004] (II) RADEON(0): Using vrefresh ranges from config file
>[ 15862.004] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 15862.004] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 15862.004] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 15862.004] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 15952.673] (II) RADEON(0): RADEONSaveScreen(2)
>[ 15952.673] (II) RADEON(0): RADEONSaveScreen(0)
>[ 16368.135] (II) RADEON(0): RADEONSaveScreen(1)
>[ 16368.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c50300]
>[ 16368.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c50300] width 1920 pitch 7680 (/4 1920)
>[ 16456.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[ 16456.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[ 16456.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[ 16456.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[ 16456.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[ 16456.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[ 16456.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[ 16456.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[ 16456.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25004c0]
>[ 16456.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25004c0] width 1920 pitch 7680 (/4 1920)
>[ 16456.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25004c0]
>[ 16456.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25004c0] width 1920 pitch 7680 (/4 1920)
>[ 16456.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25004c0]
>[ 16456.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25004c0] width 1920 pitch 7680 (/4 1920)
>[ 16456.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25004c0]
>[ 16456.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25004c0] width 1920 pitch 7680 (/4 1920)
>[ 16456.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2180]
>[ 16456.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2180] width 1920 pitch 7680 (/4 1920)
>[ 16456.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25004c0]
>[ 16456.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25004c0] width 1920 pitch 7680 (/4 1920)
>[ 16458.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16458.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16458.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16458.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16458.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16458.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16458.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16458.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16458.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16458.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16458.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16458.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16458.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16458.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16458.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16458.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16458.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16458.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16458.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16458.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16458.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16458.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16458.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16458.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16458.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4910]
>[ 16459.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4910] width 1920 pitch 7680 (/4 1920)
>[ 16459.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0910]
>[ 16459.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0910] width 1920 pitch 7680 (/4 1920)
>[ 16459.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 16459.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 16459.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[ 16459.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[ 16459.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 16459.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 16459.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[ 16459.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[ 16459.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 16459.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 16459.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[ 16459.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[ 16459.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[ 16459.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[ 16459.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926de0]
>[ 16459.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926de0] width 1920 pitch 7680 (/4 1920)
>[ 16459.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd1db0]
>[ 16459.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd1db0] width 1920 pitch 7680 (/4 1920)
>[ 16459.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926de0]
>[ 16459.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926de0] width 1920 pitch 7680 (/4 1920)
>[ 16488.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd5a0]
>[ 16488.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd5a0] width 1920 pitch 7680 (/4 1920)
>[ 16503.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2564f20]
>[ 16503.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2564f20] width 1920 pitch 7680 (/4 1920)
>[ 16518.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd8e0]
>[ 16518.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd8e0] width 1920 pitch 7680 (/4 1920)
>[ 16563.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c51530]
>[ 16563.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c51530] width 1920 pitch 7680 (/4 1920)
>[ 16578.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8b7b0]
>[ 16578.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8b7b0] width 1920 pitch 7680 (/4 1920)
>[ 16728.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d060]
>[ 16728.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d060] width 1920 pitch 7680 (/4 1920)
>[ 16743.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3935180]
>[ 16743.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3935180] width 1920 pitch 7680 (/4 1920)
>[ 16747.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6a70]
>[ 16747.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6a70] width 1920 pitch 7680 (/4 1920)
>[ 16747.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16747.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16747.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6a70]
>[ 16747.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6a70] width 1920 pitch 7680 (/4 1920)
>[ 16747.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16747.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16747.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6a70]
>[ 16747.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6a70] width 1920 pitch 7680 (/4 1920)
>[ 16747.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16747.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16747.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6a70]
>[ 16747.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6a70] width 1920 pitch 7680 (/4 1920)
>[ 16748.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16748.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16748.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6a70]
>[ 16748.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6a70] width 1920 pitch 7680 (/4 1920)
>[ 16748.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d1c0]
>[ 16748.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d1c0] width 1920 pitch 7680 (/4 1920)
>[ 16748.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d1c0]
>[ 16748.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d1c0] width 1920 pitch 7680 (/4 1920)
>[ 16748.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16748.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16748.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d1c0]
>[ 16748.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d1c0] width 1920 pitch 7680 (/4 1920)
>[ 16748.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16748.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16748.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dee830]
>[ 16748.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dee830] width 1920 pitch 7680 (/4 1920)
>[ 16748.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7a10]
>[ 16748.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7a10] width 1920 pitch 7680 (/4 1920)
>[ 16748.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7a70]
>[ 16749.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7a70] width 1920 pitch 7680 (/4 1920)
>[ 16749.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18a50]
>[ 16749.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18a50] width 1920 pitch 7680 (/4 1920)
>[ 16749.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7a10]
>[ 16749.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7a10] width 1920 pitch 7680 (/4 1920)
>[ 16749.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18a50]
>[ 16749.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18a50] width 1920 pitch 7680 (/4 1920)
>[ 16749.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7a10]
>[ 16749.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7a10] width 1920 pitch 7680 (/4 1920)
>[ 16749.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16749.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16749.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7a10]
>[ 16749.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7a10] width 1920 pitch 7680 (/4 1920)
>[ 16749.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16749.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16749.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7a10]
>[ 16749.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7a10] width 1920 pitch 7680 (/4 1920)
>[ 16749.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 16749.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 16818.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560710]
>[ 16818.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560710] width 1920 pitch 7680 (/4 1920)
>[ 16833.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dee390]
>[ 16833.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dee390] width 1920 pitch 7680 (/4 1920)
>[ 17043.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560710]
>[ 17043.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560710] width 1920 pitch 7680 (/4 1920)
>[ 17073.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2defeb0]
>[ 17073.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2defeb0] width 1920 pitch 7680 (/4 1920)
>[ 17103.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 17103.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 17133.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[ 17133.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[ 17148.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 17148.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 17163.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[ 17163.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[ 17295.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 17295.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 17295.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954ee0]
>[ 17295.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954ee0] width 1920 pitch 7680 (/4 1920)
>[ 17295.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17295.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17295.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964f80]
>[ 17295.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964f80] width 1920 pitch 7680 (/4 1920)
>[ 17295.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86c40]
>[ 17295.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86c40] width 1920 pitch 7680 (/4 1920)
>[ 17295.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17295.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17295.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17295.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17295.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17296.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17296.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17296.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17296.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17296.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17296.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17296.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17296.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17296.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17296.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17296.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17296.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17296.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17296.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17296.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17296.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17296.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17296.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17296.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17296.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17296.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17300.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17300.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17300.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17300.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17301.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17301.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17301.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17301.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17328.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8700]
>[ 17328.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8700] width 1920 pitch 7680 (/4 1920)
>[ 17343.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f8a0]
>[ 17343.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f8a0] width 1920 pitch 7680 (/4 1920)
>[ 17349.185] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 17349.185] (II) RADEON(0): Using hsync ranges from config file
>[ 17349.185] (II) RADEON(0): Using vrefresh ranges from config file
>[ 17349.185] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 17349.185] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 17349.185] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 17349.185] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 17439.673] (II) RADEON(0): RADEONSaveScreen(2)
>[ 17439.673] (II) RADEON(0): RADEONSaveScreen(0)
>[ 18162.716] (II) RADEON(0): RADEONSaveScreen(1)
>[ 18852.660] (II) RADEON(0): RADEONSaveScreen(2)
>[ 18852.660] (II) RADEON(0): RADEONSaveScreen(0)
>[ 21854.158] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 21854.158] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 21854.158] (II) RADEON(0): Ok, leaving now...
>[ 21867.185] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 21867.185] (II) RADEON(0): RADEONEnterVT_KMS
>[ 21867.224] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 21867.224] (II) RADEON(0): Using hsync ranges from config file
>[ 21867.224] (II) RADEON(0): Using vrefresh ranges from config file
>[ 21867.224] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 21867.224] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 21867.224] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 21867.224] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 21867.231] (II) RADEON(0): RADEONSaveScreen(2)
>[ 21867.231] (II) RADEON(0): RADEONSaveScreen(1)
>[ 21867.231] (EE) evdev: PIXART USB OPTICAL MOUSE: Unable to open evdev device "/dev/input/event14".
>[ 21867.232] [dix] couldn't enable device 10
>[ 21867.242] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 21867.242] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 21867.242] (II) UnloadModule: "evdev"
>[ 21867.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 21867.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 21897.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965460]
>[ 21897.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965460] width 1920 pitch 7680 (/4 1920)
>[ 21912.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 21912.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 22002.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965460]
>[ 22002.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965460] width 1920 pitch 7680 (/4 1920)
>[ 22017.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 22017.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 22092.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965460]
>[ 22092.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965460] width 1920 pitch 7680 (/4 1920)
>[ 22122.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 22122.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 22167.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965460]
>[ 22167.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965460] width 1920 pitch 7680 (/4 1920)
>[ 22182.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 22182.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 22212.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965460]
>[ 22212.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965460] width 1920 pitch 7680 (/4 1920)
>[ 22227.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 22227.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 22302.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965460]
>[ 22302.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965460] width 1920 pitch 7680 (/4 1920)
>[ 22317.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bc70]
>[ 22317.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bc70] width 1920 pitch 7680 (/4 1920)
>[ 22467.274] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 22467.274] (II) RADEON(0): Using hsync ranges from config file
>[ 22467.274] (II) RADEON(0): Using vrefresh ranges from config file
>[ 22467.274] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 22467.274] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 22467.274] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 22467.274] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 22557.654] (II) RADEON(0): RADEONSaveScreen(2)
>[ 22557.654] (II) RADEON(0): RADEONSaveScreen(0)
>[ 25559.164] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 25559.164] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 25559.164] (II) RADEON(0): Ok, leaving now...
>[ 25572.154] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 25572.154] (II) RADEON(0): RADEONEnterVT_KMS
>[ 25572.199] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 25572.199] (II) RADEON(0): Using hsync ranges from config file
>[ 25572.199] (II) RADEON(0): Using vrefresh ranges from config file
>[ 25572.199] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 25572.199] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 25572.199] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 25572.199] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 25572.206] (II) RADEON(0): RADEONSaveScreen(2)
>[ 25572.206] (II) RADEON(0): RADEONSaveScreen(1)
>[ 25572.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 25572.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 25602.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40a00]
>[ 25602.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40a00] width 1920 pitch 7680 (/4 1920)
>[ 25632.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 25632.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 25662.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40a00]
>[ 25662.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40a00] width 1920 pitch 7680 (/4 1920)
>[ 25692.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 25692.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 25842.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40a00]
>[ 25842.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40a00] width 1920 pitch 7680 (/4 1920)
>[ 25857.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 25857.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 25902.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40a00]
>[ 25902.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40a00] width 1920 pitch 7680 (/4 1920)
>[ 25917.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 25917.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 25932.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40a00]
>[ 25932.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40a00] width 1920 pitch 7680 (/4 1920)
>[ 25947.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 25947.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 26067.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40a00]
>[ 26067.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40a00] width 1920 pitch 7680 (/4 1920)
>[ 26082.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed0e0]
>[ 26082.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed0e0] width 1920 pitch 7680 (/4 1920)
>[ 26172.249] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 26172.249] (II) RADEON(0): Using hsync ranges from config file
>[ 26172.249] (II) RADEON(0): Using vrefresh ranges from config file
>[ 26172.249] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 26172.249] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 26172.249] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 26172.249] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 26262.673] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26262.673] (II) RADEON(0): RADEONSaveScreen(0)
>[ 26420.226] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 26420.226] (II) No input driver specified, ignoring this device.
>[ 26420.226] (II) This device may have been added with another device file.
>[ 26420.227] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 26420.227] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 26420.227] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 26420.227] 	Option "XkbRules" "evdev"
>[ 26420.227] 	Option "XkbModel" "evdev"
>[ 26420.227] 	Option "XkbLayout" "us"
>[ 26420.227] 	Option "_source" "server/udev"
>[ 26420.227] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 26420.227] 	Option "path" "/dev/input/event14"
>[ 26420.227] 	Option "device" "/dev/input/event14"
>[ 26420.227] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input20/event14"
>[ 26420.227] 	Option "driver" "evdev"
>[ 26420.227] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 26420.227] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 26420.227] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 26420.227] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 26420.227] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 26420.227] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 26420.227] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 26420.227] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 26420.227] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 26420.227] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 26420.227] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 26420.227] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input20/event14"
>[ 26420.227] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 26420.227] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 26420.227] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 26420.227] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 26420.227] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 26420.227] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 26421.620] (II) RADEON(0): RADEONSaveScreen(1)
>[ 26421.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26421.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26430.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26430.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26430.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26430.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26430.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26430.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26430.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26430.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26430.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26430.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26430.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de2b40]
>[ 26430.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de2b40] width 1920 pitch 7680 (/4 1920)
>[ 26430.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26430.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26430.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[ 26430.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[ 26430.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdd00]
>[ 26430.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdd00] width 1920 pitch 7680 (/4 1920)
>[ 26430.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[ 26430.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[ 26430.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26430.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26430.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[ 26430.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[ 26430.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26430.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26430.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[ 26430.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[ 26430.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560710]
>[ 26430.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560710] width 1920 pitch 7680 (/4 1920)
>[ 26430.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdd00]
>[ 26430.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdd00] width 1920 pitch 7680 (/4 1920)
>[ 26430.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393da90]
>[ 26430.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393da90] width 1920 pitch 7680 (/4 1920)
>[ 26430.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[ 26430.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[ 26466.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26466.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26481.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26481.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26486.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393da90]
>[ 26486.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393da90] width 1920 pitch 7680 (/4 1920)
>[ 26488.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560710]
>[ 26488.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560710] width 1920 pitch 7680 (/4 1920)
>[ 26488.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de2b40]
>[ 26488.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de2b40] width 1920 pitch 7680 (/4 1920)
>[ 26489.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26489.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26489.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26489.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26489.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26489.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26489.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26489.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26489.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26489.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26489.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26489.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26489.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26489.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26489.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26489.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26489.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26489.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26489.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26489.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26489.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26490.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26490.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[ 26490.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[ 26490.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26490.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26490.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332a80]
>[ 26490.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332a80] width 1920 pitch 7680 (/4 1920)
>[ 26490.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb70c0]
>[ 26490.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb70c0] width 1920 pitch 7680 (/4 1920)
>[ 26490.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393da90]
>[ 26490.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393da90] width 1920 pitch 7680 (/4 1920)
>[ 26490.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532d50]
>[ 26490.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532d50] width 1920 pitch 7680 (/4 1920)
>[ 26490.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393da90]
>[ 26490.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393da90] width 1920 pitch 7680 (/4 1920)
>[ 26490.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532d50]
>[ 26490.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532d50] width 1920 pitch 7680 (/4 1920)
>[ 26490.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7b00]
>[ 26490.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7b00] width 1920 pitch 7680 (/4 1920)
>[ 26490.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25629e0]
>[ 26490.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25629e0] width 1920 pitch 7680 (/4 1920)
>[ 26490.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2559750]
>[ 26490.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2559750] width 1920 pitch 7680 (/4 1920)
>[ 26490.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8b6f0]
>[ 26490.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8b6f0] width 1920 pitch 7680 (/4 1920)
>[ 26490.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2e1d0]
>[ 26490.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2e1d0] width 1920 pitch 7680 (/4 1920)
>[ 26490.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25629e0]
>[ 26490.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25629e0] width 1920 pitch 7680 (/4 1920)
>[ 26490.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2e1d0]
>[ 26490.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2e1d0] width 1920 pitch 7680 (/4 1920)
>[ 26496.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2e5a0]
>[ 26496.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2e5a0] width 1920 pitch 7680 (/4 1920)
>[ 26498.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de7a80]
>[ 26498.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de7a80] width 1920 pitch 7680 (/4 1920)
>[ 26499.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a870]
>[ 26499.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a870] width 1920 pitch 7680 (/4 1920)
>[ 26499.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922de0]
>[ 26499.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922de0] width 1920 pitch 7680 (/4 1920)
>[ 26511.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de7a80]
>[ 26511.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de7a80] width 1920 pitch 7680 (/4 1920)
>[ 26526.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed6c0]
>[ 26526.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed6c0] width 1920 pitch 7680 (/4 1920)
>[ 26541.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40005f0]
>[ 26541.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40005f0] width 1920 pitch 7680 (/4 1920)
>[ 26548.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43b60]
>[ 26548.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43b60] width 1920 pitch 7680 (/4 1920)
>[ 26549.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22ae0]
>[ 26549.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22ae0] width 1920 pitch 7680 (/4 1920)
>[ 26549.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c4b0]
>[ 26549.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c4b0] width 1920 pitch 7680 (/4 1920)
>[ 26549.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26549.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[ 26570.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[ 26570.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26570.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26570.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[ 26570.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[ 26570.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdd00]
>[ 26570.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdd00] width 1920 pitch 7680 (/4 1920)
>[ 26570.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26570.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdd00]
>[ 26570.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdd00] width 1920 pitch 7680 (/4 1920)
>[ 26570.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26570.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdd00]
>[ 26570.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdd00] width 1920 pitch 7680 (/4 1920)
>[ 26570.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26570.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26570.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26570.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26570.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26570.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26570.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26570.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26570.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26570.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26570.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26570.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26570.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26570.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb70c0]
>[ 26570.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb70c0] width 1920 pitch 7680 (/4 1920)
>[ 26571.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb70c0]
>[ 26571.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb70c0] width 1920 pitch 7680 (/4 1920)
>[ 26571.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb70c0]
>[ 26571.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb70c0] width 1920 pitch 7680 (/4 1920)
>[ 26571.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8a80]
>[ 26571.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8a80] width 1920 pitch 7680 (/4 1920)
>[ 26571.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de2b40]
>[ 26571.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de2b40] width 1920 pitch 7680 (/4 1920)
>[ 26571.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[ 26571.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[ 26571.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390a280]
>[ 26571.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390a280] width 1920 pitch 7680 (/4 1920)
>[ 26571.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26571.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26571.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26571.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26571.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26571.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26571.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26571.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26571.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26571.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26571.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92a60]
>[ 26571.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92a60] width 1920 pitch 7680 (/4 1920)
>[ 26571.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26571.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26571.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ded0]
>[ 26571.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ded0] width 1920 pitch 7680 (/4 1920)
>[ 26571.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26571.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26571.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ded0]
>[ 26571.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ded0] width 1920 pitch 7680 (/4 1920)
>[ 26571.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b950]
>[ 26571.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b950] width 1920 pitch 7680 (/4 1920)
>[ 26571.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ded0]
>[ 26571.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ded0] width 1920 pitch 7680 (/4 1920)
>[ 26580.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000340]
>[ 26580.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000340] width 1920 pitch 7680 (/4 1920)
>[ 26581.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2b810]
>[ 26581.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2b810] width 1920 pitch 7680 (/4 1920)
>[ 26581.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4af0]
>[ 26581.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4af0] width 1920 pitch 7680 (/4 1920)
>[ 26600.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30b90]
>[ 26600.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30b90] width 1920 pitch 7680 (/4 1920)
>[ 26631.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b950]
>[ 26631.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b950] width 1920 pitch 7680 (/4 1920)
>[ 26646.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64bd0]
>[ 26646.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64bd0] width 1920 pitch 7680 (/4 1920)
>[ 26661.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 26661.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 26676.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 26676.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 26736.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 26736.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 26751.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 26751.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 26961.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 26961.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 26976.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 26976.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 26991.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 26991.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 27006.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 27006.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 27036.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 27036.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 27051.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 27051.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 27096.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30a80]
>[ 27096.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30a80] width 1920 pitch 7680 (/4 1920)
>[ 27102.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 27102.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 27102.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 27102.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 27102.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 27102.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 27102.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 27102.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 27102.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 27102.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 27102.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[ 27102.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[ 27102.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30930]
>[ 27102.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30930] width 1920 pitch 7680 (/4 1920)
>[ 27102.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 27102.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 27102.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66a50]
>[ 27102.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66a50] width 1920 pitch 7680 (/4 1920)
>[ 27102.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 27102.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 27102.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66a50]
>[ 27102.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66a50] width 1920 pitch 7680 (/4 1920)
>[ 27102.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 27102.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 27102.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66a50]
>[ 27102.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66a50] width 1920 pitch 7680 (/4 1920)
>[ 27102.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 27102.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 27102.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66a50]
>[ 27102.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66a50] width 1920 pitch 7680 (/4 1920)
>[ 27102.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[ 27102.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[ 27102.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66a50]
>[ 27102.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66a50] width 1920 pitch 7680 (/4 1920)
>[ 27102.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39db0]
>[ 27102.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39db0] width 1920 pitch 7680 (/4 1920)
>[ 27102.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb70c0]
>[ 27102.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb70c0] width 1920 pitch 7680 (/4 1920)
>[ 27102.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[ 27102.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[ 27102.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[ 27102.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[ 27102.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9d790]
>[ 27102.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9d790] width 1920 pitch 7680 (/4 1920)
>[ 27102.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97520]
>[ 27102.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97520] width 1920 pitch 7680 (/4 1920)
>[ 27102.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47460]
>[ 27102.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47460] width 1920 pitch 7680 (/4 1920)
>[ 27102.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97520]
>[ 27102.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97520] width 1920 pitch 7680 (/4 1920)
>[ 27102.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47460]
>[ 27102.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47460] width 1920 pitch 7680 (/4 1920)
>[ 27102.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97520]
>[ 27102.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97520] width 1920 pitch 7680 (/4 1920)
>[ 27102.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47460]
>[ 27102.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47460] width 1920 pitch 7680 (/4 1920)
>[ 27102.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97520]
>[ 27102.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97520] width 1920 pitch 7680 (/4 1920)
>[ 27102.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47460]
>[ 27102.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47460] width 1920 pitch 7680 (/4 1920)
>[ 27102.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97520]
>[ 27102.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97520] width 1920 pitch 7680 (/4 1920)
>[ 27102.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5d130]
>[ 27102.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5d130] width 1920 pitch 7680 (/4 1920)
>[ 27102.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97520]
>[ 27102.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97520] width 1920 pitch 7680 (/4 1920)
>[ 27102.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90310]
>[ 27102.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90310] width 1920 pitch 7680 (/4 1920)
>[ 27106.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27106.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27106.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27106.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27106.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27106.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27106.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27106.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27106.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27106.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27106.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27106.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27106.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27106.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27106.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27106.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27106.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27106.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27106.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27106.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27106.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27106.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27106.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27106.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27107.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf9e0]
>[ 27107.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf9e0] width 1920 pitch 7680 (/4 1920)
>[ 27107.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27107.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27107.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568710]
>[ 27107.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568710] width 1920 pitch 7680 (/4 1920)
>[ 27107.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c290]
>[ 27107.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c290] width 1920 pitch 7680 (/4 1920)
>[ 27108.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568710]
>[ 27108.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568710] width 1920 pitch 7680 (/4 1920)
>[ 27108.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dee7f0]
>[ 27108.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dee7f0] width 1920 pitch 7680 (/4 1920)
>[ 27108.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568710]
>[ 27108.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568710] width 1920 pitch 7680 (/4 1920)
>[ 27108.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1d70]
>[ 27108.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1d70] width 1920 pitch 7680 (/4 1920)
>[ 27108.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568710]
>[ 27108.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568710] width 1920 pitch 7680 (/4 1920)
>[ 27108.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1d70]
>[ 27108.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1d70] width 1920 pitch 7680 (/4 1920)
>[ 27108.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568710]
>[ 27108.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568710] width 1920 pitch 7680 (/4 1920)
>[ 27108.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1d70]
>[ 27108.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1d70] width 1920 pitch 7680 (/4 1920)
>[ 27108.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568710]
>[ 27108.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568710] width 1920 pitch 7680 (/4 1920)
>[ 27108.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dee7f0]
>[ 27108.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dee7f0] width 1920 pitch 7680 (/4 1920)
>[ 27111.136] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 27111.136] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 27111.136] (II) UnloadModule: "evdev"
>[ 27111.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937c60]
>[ 27111.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937c60] width 1920 pitch 7680 (/4 1920)
>[ 27141.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a70]
>[ 27141.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a70] width 1920 pitch 7680 (/4 1920)
>[ 27156.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000300]
>[ 27156.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000300] width 1920 pitch 7680 (/4 1920)
>[ 27216.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49240]
>[ 27216.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49240] width 1920 pitch 7680 (/4 1920)
>[ 27231.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c494d0]
>[ 27231.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c494d0] width 1920 pitch 7680 (/4 1920)
>[ 27258.453] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 27258.453] (II) No input driver specified, ignoring this device.
>[ 27258.453] (II) This device may have been added with another device file.
>[ 27258.453] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 27258.453] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 27258.453] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 27258.453] 	Option "XkbRules" "evdev"
>[ 27258.453] 	Option "XkbModel" "evdev"
>[ 27258.453] 	Option "XkbLayout" "us"
>[ 27258.453] 	Option "_source" "server/udev"
>[ 27258.453] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 27258.453] 	Option "path" "/dev/input/event14"
>[ 27258.453] 	Option "device" "/dev/input/event14"
>[ 27258.453] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input21/event14"
>[ 27258.453] 	Option "driver" "evdev"
>[ 27258.453] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 27258.453] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 27258.453] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 27258.453] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 27258.453] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 27258.453] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 27258.453] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 27258.453] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 27258.453] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 27258.453] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 27258.453] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 27258.453] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input21/event14"
>[ 27258.453] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 27258.453] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 27258.453] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 27258.453] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 27258.453] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 27258.453] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 27261.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f03ba0]
>[ 27261.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f03ba0] width 1920 pitch 7680 (/4 1920)
>[ 27269.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cff3d0]
>[ 27269.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cff3d0] width 1920 pitch 7680 (/4 1920)
>[ 27270.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3910940]
>[ 27270.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3910940] width 1920 pitch 7680 (/4 1920)
>[ 27270.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47460]
>[ 27270.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47460] width 1920 pitch 7680 (/4 1920)
>[ 27270.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d1c0]
>[ 27270.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d1c0] width 1920 pitch 7680 (/4 1920)
>[ 27276.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47460]
>[ 27276.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47460] width 1920 pitch 7680 (/4 1920)
>[ 27291.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1720]
>[ 27291.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1720] width 1920 pitch 7680 (/4 1920)
>[ 27306.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968400]
>[ 27306.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968400] width 1920 pitch 7680 (/4 1920)
>[ 27308.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 27308.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 27308.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27308.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27309.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dec110]
>[ 27309.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dec110] width 1920 pitch 7680 (/4 1920)
>[ 27310.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 27310.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 27310.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 27310.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 27310.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 27310.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 27312.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 27312.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 27313.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 27313.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 27314.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 27314.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 27314.912] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 27314.912] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 27314.912] (II) UnloadModule: "evdev"
>[ 27321.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 27321.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 27328.093] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 27328.093] (II) No input driver specified, ignoring this device.
>[ 27328.093] (II) This device may have been added with another device file.
>[ 27328.093] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 27328.093] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 27328.093] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 27328.093] 	Option "XkbRules" "evdev"
>[ 27328.093] 	Option "XkbModel" "evdev"
>[ 27328.093] 	Option "XkbLayout" "us"
>[ 27328.093] 	Option "_source" "server/udev"
>[ 27328.093] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 27328.093] 	Option "path" "/dev/input/event14"
>[ 27328.093] 	Option "device" "/dev/input/event14"
>[ 27328.093] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input22/event14"
>[ 27328.093] 	Option "driver" "evdev"
>[ 27328.093] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 27328.093] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 27328.093] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 27328.093] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 27328.093] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 27328.093] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 27328.093] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 27328.093] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 27328.093] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 27328.093] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 27328.093] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 27328.093] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input22/event14"
>[ 27328.093] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 27328.093] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 27328.093] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 27328.093] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 27328.093] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 27328.093] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 27330.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 27330.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 27332.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27332.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27332.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9ba0]
>[ 27332.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9ba0] width 1920 pitch 7680 (/4 1920)
>[ 27332.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27332.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27332.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27332.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27332.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27332.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27332.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27332.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27332.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27332.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27332.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27332.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27332.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27332.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27332.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27332.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27332.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27332.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa4a0]
>[ 27333.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa4a0] width 1920 pitch 7680 (/4 1920)
>[ 27333.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27333.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27333.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27333.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27333.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27333.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27333.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27333.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27333.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27333.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27333.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27333.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27334.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27334.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27334.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de770]
>[ 27334.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de770] width 1920 pitch 7680 (/4 1920)
>[ 27334.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed39b0]
>[ 27334.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed39b0] width 1920 pitch 7680 (/4 1920)
>[ 27334.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed39b0]
>[ 27334.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed39b0] width 1920 pitch 7680 (/4 1920)
>[ 27334.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[ 27334.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[ 27334.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27334.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27334.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27334.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27334.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed760]
>[ 27334.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed760] width 1920 pitch 7680 (/4 1920)
>[ 27334.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4440]
>[ 27334.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4440] width 1920 pitch 7680 (/4 1920)
>[ 27335.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9f760]
>[ 27335.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9f760] width 1920 pitch 7680 (/4 1920)
>[ 27335.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c0c0]
>[ 27335.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c0c0] width 1920 pitch 7680 (/4 1920)
>[ 27335.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0990]
>[ 27335.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0990] width 1920 pitch 7680 (/4 1920)
>[ 27335.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c0c0]
>[ 27335.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c0c0] width 1920 pitch 7680 (/4 1920)
>[ 27336.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0990]
>[ 27336.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0990] width 1920 pitch 7680 (/4 1920)
>[ 27351.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d954f0]
>[ 27351.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d954f0] width 1920 pitch 7680 (/4 1920)
>[ 27366.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9cef0]
>[ 27366.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9cef0] width 1920 pitch 7680 (/4 1920)
>[ 27381.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114230]
>[ 27381.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114230] width 1920 pitch 7680 (/4 1920)
>[ 27396.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab3b0]
>[ 27396.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab3b0] width 1920 pitch 7680 (/4 1920)
>[ 27430.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114150]
>[ 27430.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114150] width 1920 pitch 7680 (/4 1920)
>[ 27430.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114150]
>[ 27430.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114150] width 1920 pitch 7680 (/4 1920)
>[ 27430.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2326910]
>[ 27430.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2326910] width 1920 pitch 7680 (/4 1920)
>[ 27430.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114150]
>[ 27430.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114150] width 1920 pitch 7680 (/4 1920)
>[ 27430.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab3b0]
>[ 27430.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab3b0] width 1920 pitch 7680 (/4 1920)
>[ 27430.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114150]
>[ 27430.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114150] width 1920 pitch 7680 (/4 1920)
>[ 27430.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab3b0]
>[ 27430.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab3b0] width 1920 pitch 7680 (/4 1920)
>[ 27430.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114150]
>[ 27430.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114150] width 1920 pitch 7680 (/4 1920)
>[ 27430.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27430.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27430.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27430.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27430.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27431.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27431.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27431.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27431.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27431.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27431.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27431.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27431.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[ 27431.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[ 27431.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[ 27431.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[ 27431.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01cf0]
>[ 27431.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01cf0] width 1920 pitch 7680 (/4 1920)
>[ 27431.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c62fb0]
>[ 27431.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c62fb0] width 1920 pitch 7680 (/4 1920)
>[ 27431.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27431.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27431.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27431.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27431.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27431.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27431.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27431.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27431.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27432.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27432.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27432.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27432.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27432.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27432.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27432.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27432.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27432.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27432.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27432.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27432.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27432.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27432.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd2580]
>[ 27432.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd2580] width 1920 pitch 7680 (/4 1920)
>[ 27432.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca23d0]
>[ 27432.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca23d0] width 1920 pitch 7680 (/4 1920)
>[ 27432.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca23d0]
>[ 27432.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca23d0] width 1920 pitch 7680 (/4 1920)
>[ 27432.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca23d0]
>[ 27432.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca23d0] width 1920 pitch 7680 (/4 1920)
>[ 27432.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdfa0]
>[ 27432.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdfa0] width 1920 pitch 7680 (/4 1920)
>[ 27432.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4f00]
>[ 27432.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4f00] width 1920 pitch 7680 (/4 1920)
>[ 27432.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27432.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27432.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89be0]
>[ 27432.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89be0] width 1920 pitch 7680 (/4 1920)
>[ 27432.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89be0]
>[ 27432.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89be0] width 1920 pitch 7680 (/4 1920)
>[ 27436.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1d20]
>[ 27436.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1d20] width 1920 pitch 7680 (/4 1920)
>[ 27436.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27436.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27436.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27436.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27436.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27436.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27436.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27436.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27436.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27436.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27436.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27436.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27436.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27436.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27436.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27436.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27436.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27436.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27437.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27437.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27437.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27437.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27437.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27437.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27437.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27437.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27438.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27438.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27438.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27438.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27439.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27439.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27439.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27439.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27440.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7810]
>[ 27440.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7810] width 1920 pitch 7680 (/4 1920)
>[ 27441.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde3e0]
>[ 27441.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde3e0] width 1920 pitch 7680 (/4 1920)
>[ 27441.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27441.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27441.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde3e0]
>[ 27441.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde3e0] width 1920 pitch 7680 (/4 1920)
>[ 27441.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde3e0]
>[ 27441.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde3e0] width 1920 pitch 7680 (/4 1920)
>[ 27441.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde3e0]
>[ 27441.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde3e0] width 1920 pitch 7680 (/4 1920)
>[ 27441.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4c90]
>[ 27441.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4c90] width 1920 pitch 7680 (/4 1920)
>[ 27441.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde3e0]
>[ 27441.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde3e0] width 1920 pitch 7680 (/4 1920)
>[ 27441.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4c90]
>[ 27441.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4c90] width 1920 pitch 7680 (/4 1920)
>[ 27441.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde3e0]
>[ 27441.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde3e0] width 1920 pitch 7680 (/4 1920)
>[ 27441.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e0b0]
>[ 27441.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e0b0] width 1920 pitch 7680 (/4 1920)
>[ 27443.550] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 27443.550] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 27443.550] (II) UnloadModule: "evdev"
>[ 27456.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7850]
>[ 27456.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7850] width 1920 pitch 7680 (/4 1920)
>[ 27471.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e160]
>[ 27471.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e160] width 1920 pitch 7680 (/4 1920)
>[ 27480.274] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 27480.274] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 27480.274] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 27480.274] 	Option "XkbRules" "evdev"
>[ 27480.274] 	Option "XkbModel" "evdev"
>[ 27480.274] 	Option "XkbLayout" "us"
>[ 27480.274] 	Option "_source" "server/udev"
>[ 27480.274] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 27480.274] 	Option "path" "/dev/input/event14"
>[ 27480.275] 	Option "device" "/dev/input/event14"
>[ 27480.275] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input23/event14"
>[ 27480.275] 	Option "driver" "evdev"
>[ 27480.275] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 27480.275] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 27480.275] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 27480.275] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 27480.275] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 27480.275] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 27480.275] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 27480.275] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 27480.275] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 27480.275] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 27480.275] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 27480.275] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input23/event14"
>[ 27480.275] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 27480.275] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 27480.275] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 27480.275] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 27480.275] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 27480.275] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 27480.275] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 27480.275] (II) No input driver specified, ignoring this device.
>[ 27480.275] (II) This device may have been added with another device file.
>[ 27483.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db36c0]
>[ 27483.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db36c0] width 1920 pitch 7680 (/4 1920)
>[ 27486.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b4f0]
>[ 27486.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b4f0] width 1920 pitch 7680 (/4 1920)
>[ 27501.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2ea0]
>[ 27501.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2ea0] width 1920 pitch 7680 (/4 1920)
>[ 27516.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2230]
>[ 27516.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2230] width 1920 pitch 7680 (/4 1920)
>[ 27531.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbca10]
>[ 27531.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbca10] width 1920 pitch 7680 (/4 1920)
>[ 27544.418] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 27544.418] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 27544.418] (II) UnloadModule: "evdev"
>[ 27546.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b3e0]
>[ 27546.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b3e0] width 1920 pitch 7680 (/4 1920)
>[ 27561.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b2f20]
>[ 27561.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b2f20] width 1920 pitch 7680 (/4 1920)
>[ 27567.698] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 27567.698] (II) No input driver specified, ignoring this device.
>[ 27567.698] (II) This device may have been added with another device file.
>[ 27567.698] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 27567.698] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 27567.698] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 27567.698] 	Option "XkbRules" "evdev"
>[ 27567.698] 	Option "XkbModel" "evdev"
>[ 27567.698] 	Option "XkbLayout" "us"
>[ 27567.698] 	Option "_source" "server/udev"
>[ 27567.698] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 27567.698] 	Option "path" "/dev/input/event14"
>[ 27567.698] 	Option "device" "/dev/input/event14"
>[ 27567.698] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input24/event14"
>[ 27567.698] 	Option "driver" "evdev"
>[ 27567.698] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 27567.698] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 27567.700] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 27567.700] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 27567.700] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 27567.700] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 27567.700] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 27567.700] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 27567.700] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 27567.700] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 27567.700] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 27567.700] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input24/event14"
>[ 27567.700] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 27567.700] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 27567.700] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 27567.700] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 27567.700] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 27567.700] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 27571.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b4b0]
>[ 27571.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b4b0] width 1920 pitch 7680 (/4 1920)
>[ 27571.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea0180]
>[ 27571.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea0180] width 1920 pitch 7680 (/4 1920)
>[ 27571.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea0180]
>[ 27571.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea0180] width 1920 pitch 7680 (/4 1920)
>[ 27571.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9efa0]
>[ 27571.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9efa0] width 1920 pitch 7680 (/4 1920)
>[ 27598.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0ae0]
>[ 27598.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0ae0] width 1920 pitch 7680 (/4 1920)
>[ 27598.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27598.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27598.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 27598.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 27598.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd5b60]
>[ 27598.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd5b60] width 1920 pitch 7680 (/4 1920)
>[ 27598.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77520]
>[ 27598.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77520] width 1920 pitch 7680 (/4 1920)
>[ 27599.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77520]
>[ 27599.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77520] width 1920 pitch 7680 (/4 1920)
>[ 27599.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27599.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27599.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77520]
>[ 27599.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77520] width 1920 pitch 7680 (/4 1920)
>[ 27613.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27613.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27613.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77520]
>[ 27613.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77520] width 1920 pitch 7680 (/4 1920)
>[ 27613.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2040]
>[ 27613.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2040] width 1920 pitch 7680 (/4 1920)
>[ 27613.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77520]
>[ 27613.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77520] width 1920 pitch 7680 (/4 1920)
>[ 27619.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaaf10]
>[ 27619.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaaf10] width 1920 pitch 7680 (/4 1920)
>[ 27619.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27619.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27619.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27619.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27619.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27619.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27621.593] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 27621.593] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 27621.593] (II) UnloadModule: "evdev"
>[ 27621.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27621.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27635.920] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 27635.920] (II) No input driver specified, ignoring this device.
>[ 27635.920] (II) This device may have been added with another device file.
>[ 27635.920] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 27635.920] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 27635.920] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 27635.920] 	Option "XkbRules" "evdev"
>[ 27635.920] 	Option "XkbModel" "evdev"
>[ 27635.920] 	Option "XkbLayout" "us"
>[ 27635.920] 	Option "_source" "server/udev"
>[ 27635.920] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 27635.920] 	Option "path" "/dev/input/event14"
>[ 27635.920] 	Option "device" "/dev/input/event14"
>[ 27635.920] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input25/event14"
>[ 27635.920] 	Option "driver" "evdev"
>[ 27635.920] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 27635.920] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 27635.923] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 27635.923] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 27635.923] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 27635.923] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 27635.923] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 27635.923] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 27635.923] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 27635.923] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 27635.923] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 27635.923] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input25/event14"
>[ 27635.923] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 27635.923] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 27635.923] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 27635.923] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 27635.923] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 27635.923] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 27636.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e06900]
>[ 27636.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e06900] width 1920 pitch 7680 (/4 1920)
>[ 27650.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 27650.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 27650.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27650.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27650.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27650.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27650.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 27650.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 27658.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca180]
>[ 27658.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca180] width 1920 pitch 7680 (/4 1920)
>[ 27786.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 27786.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 27831.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 27831.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 27876.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 27876.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 27891.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 27891.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 27906.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[ 27906.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[ 27921.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 27921.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 27936.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 27936.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 28086.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 28086.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 28101.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2a10]
>[ 28101.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2a10] width 1920 pitch 7680 (/4 1920)
>[ 28146.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e36a60]
>[ 28146.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e36a60] width 1920 pitch 7680 (/4 1920)
>[ 28161.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39980]
>[ 28161.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39980] width 1920 pitch 7680 (/4 1920)
>[ 28176.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bf440]
>[ 28176.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bf440] width 1920 pitch 7680 (/4 1920)
>[ 28206.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bf440]
>[ 28206.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bf440] width 1920 pitch 7680 (/4 1920)
>[ 28221.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bf440]
>[ 28221.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bf440] width 1920 pitch 7680 (/4 1920)
>[ 28236.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39980]
>[ 28236.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39980] width 1920 pitch 7680 (/4 1920)
>[ 28266.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efca0]
>[ 28266.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efca0] width 1920 pitch 7680 (/4 1920)
>[ 28281.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e36a60]
>[ 28281.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e36a60] width 1920 pitch 7680 (/4 1920)
>[ 28296.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efca0]
>[ 28296.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efca0] width 1920 pitch 7680 (/4 1920)
>[ 28326.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39980]
>[ 28326.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39980] width 1920 pitch 7680 (/4 1920)
>[ 28356.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bf440]
>[ 28356.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bf440] width 1920 pitch 7680 (/4 1920)
>[ 28360.917] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 28360.917] (II) RADEON(0): Using hsync ranges from config file
>[ 28360.917] (II) RADEON(0): Using vrefresh ranges from config file
>[ 28360.917] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 28360.917] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 28360.917] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 28360.917] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 28450.667] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28450.667] (II) RADEON(0): RADEONSaveScreen(0)
>[ 28492.718] (II) RADEON(0): RADEONSaveScreen(1)
>[ 28492.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28492.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28499.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 28499.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 28499.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28499.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28499.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28499.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28499.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05a10]
>[ 28499.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05a10] width 1920 pitch 7680 (/4 1920)
>[ 28499.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28499.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28499.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05a10]
>[ 28499.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05a10] width 1920 pitch 7680 (/4 1920)
>[ 28499.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28499.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28499.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05a10]
>[ 28499.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05a10] width 1920 pitch 7680 (/4 1920)
>[ 28499.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28499.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28499.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05a10]
>[ 28499.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05a10] width 1920 pitch 7680 (/4 1920)
>[ 28499.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28499.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28500.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28500.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28500.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28500.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28500.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28500.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28500.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28500.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28500.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28500.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28500.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28500.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28501.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28501.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28506.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28506.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28506.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 28506.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 28506.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28506.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28506.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 28506.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 28506.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28506.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28506.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 28506.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 28506.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28506.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28506.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 28506.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 28506.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28506.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28508.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f000]
>[ 28508.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f000] width 1920 pitch 7680 (/4 1920)
>[ 28515.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f680]
>[ 28515.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f680] width 1920 pitch 7680 (/4 1920)
>[ 28515.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d240]
>[ 28515.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d240] width 1920 pitch 7680 (/4 1920)
>[ 28515.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28515.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28515.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20440]
>[ 28515.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20440] width 1920 pitch 7680 (/4 1920)
>[ 28515.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28515.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28515.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20440]
>[ 28515.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20440] width 1920 pitch 7680 (/4 1920)
>[ 28515.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28515.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28515.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20440]
>[ 28515.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20440] width 1920 pitch 7680 (/4 1920)
>[ 28515.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28515.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28515.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20440]
>[ 28515.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20440] width 1920 pitch 7680 (/4 1920)
>[ 28515.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28515.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28515.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20440]
>[ 28515.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20440] width 1920 pitch 7680 (/4 1920)
>[ 28515.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28515.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28519.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28519.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28519.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c100]
>[ 28519.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c100] width 1920 pitch 7680 (/4 1920)
>[ 28519.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28519.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28519.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c100]
>[ 28519.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c100] width 1920 pitch 7680 (/4 1920)
>[ 28519.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28519.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28519.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c100]
>[ 28519.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c100] width 1920 pitch 7680 (/4 1920)
>[ 28519.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28519.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28519.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c100]
>[ 28519.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c100] width 1920 pitch 7680 (/4 1920)
>[ 28519.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28519.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28519.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c100]
>[ 28519.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c100] width 1920 pitch 7680 (/4 1920)
>[ 28519.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28520.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28520.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c100]
>[ 28520.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c100] width 1920 pitch 7680 (/4 1920)
>[ 28520.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28520.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28520.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 28520.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 28521.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28521.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28521.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f450]
>[ 28521.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f450] width 1920 pitch 7680 (/4 1920)
>[ 28521.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28521.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28521.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f450]
>[ 28521.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f450] width 1920 pitch 7680 (/4 1920)
>[ 28521.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28521.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28521.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f450]
>[ 28521.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f450] width 1920 pitch 7680 (/4 1920)
>[ 28521.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28521.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28521.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f450]
>[ 28521.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f450] width 1920 pitch 7680 (/4 1920)
>[ 28521.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c231a0]
>[ 28521.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c231a0] width 1920 pitch 7680 (/4 1920)
>[ 28521.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f450]
>[ 28521.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f450] width 1920 pitch 7680 (/4 1920)
>[ 28521.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c231a0]
>[ 28521.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c231a0] width 1920 pitch 7680 (/4 1920)
>[ 28521.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f450]
>[ 28521.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f450] width 1920 pitch 7680 (/4 1920)
>[ 28521.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c23340]
>[ 28521.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c23340] width 1920 pitch 7680 (/4 1920)
>[ 28521.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2130]
>[ 28521.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2130] width 1920 pitch 7680 (/4 1920)
>[ 28522.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 28522.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 28522.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05a10]
>[ 28522.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05a10] width 1920 pitch 7680 (/4 1920)
>[ 28522.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02fc0]
>[ 28522.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02fc0] width 1920 pitch 7680 (/4 1920)
>[ 28522.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28522.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28537.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a3c0]
>[ 28537.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a3c0] width 1920 pitch 7680 (/4 1920)
>[ 28537.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a3c0]
>[ 28537.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a3c0] width 1920 pitch 7680 (/4 1920)
>[ 28537.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38200]
>[ 28537.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38200] width 1920 pitch 7680 (/4 1920)
>[ 28537.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 28537.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 28538.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4030410]
>[ 28538.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4030410] width 1920 pitch 7680 (/4 1920)
>[ 28553.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930cd0]
>[ 28553.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930cd0] width 1920 pitch 7680 (/4 1920)
>[ 28568.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403ffa0]
>[ 28568.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403ffa0] width 1920 pitch 7680 (/4 1920)
>[ 28598.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a9d0]
>[ 28598.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a9d0] width 1920 pitch 7680 (/4 1920)
>[ 28599.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a9d0]
>[ 28599.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a9d0] width 1920 pitch 7680 (/4 1920)
>[ 28599.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b582c0]
>[ 28599.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b582c0] width 1920 pitch 7680 (/4 1920)
>[ 28599.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf1590]
>[ 28599.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf1590] width 1920 pitch 7680 (/4 1920)
>[ 28628.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd3d20]
>[ 28628.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd3d20] width 1920 pitch 7680 (/4 1920)
>[ 28646.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4590]
>[ 28646.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4590] width 1920 pitch 7680 (/4 1920)
>[ 28658.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2560]
>[ 28658.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2560] width 1920 pitch 7680 (/4 1920)
>[ 28677.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28677.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28678.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28678.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28678.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ffd0]
>[ 28678.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ffd0] width 1920 pitch 7680 (/4 1920)
>[ 28678.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28678.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28689.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ffd0]
>[ 28689.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ffd0] width 1920 pitch 7680 (/4 1920)
>[ 28690.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28690.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28690.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a8e0]
>[ 28690.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a8e0] width 1920 pitch 7680 (/4 1920)
>[ 28690.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28690.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28700.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a8e0]
>[ 28700.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a8e0] width 1920 pitch 7680 (/4 1920)
>[ 28700.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6aa90]
>[ 28700.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6aa90] width 1920 pitch 7680 (/4 1920)
>[ 28700.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6aa90]
>[ 28700.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6aa90] width 1920 pitch 7680 (/4 1920)
>[ 28700.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce83f0]
>[ 28700.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce83f0] width 1920 pitch 7680 (/4 1920)
>[ 28763.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28763.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28778.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61bc0]
>[ 28778.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61bc0] width 1920 pitch 7680 (/4 1920)
>[ 28913.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0b3b0]
>[ 28913.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0b3b0] width 1920 pitch 7680 (/4 1920)
>[ 28928.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 28928.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 28958.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 28958.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 28973.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9b90]
>[ 28973.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9b90] width 1920 pitch 7680 (/4 1920)
>[ 28988.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 28988.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29003.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc210]
>[ 29003.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc210] width 1920 pitch 7680 (/4 1920)
>[ 29011.417] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 29011.417] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 29011.417] (II) UnloadModule: "evdev"
>[ 29018.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29018.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29033.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29033.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29043.035] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 29043.035] (II) No input driver specified, ignoring this device.
>[ 29043.035] (II) This device may have been added with another device file.
>[ 29043.036] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 29043.036] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 29043.036] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 29043.036] 	Option "XkbRules" "evdev"
>[ 29043.036] 	Option "XkbModel" "evdev"
>[ 29043.036] 	Option "XkbLayout" "us"
>[ 29043.036] 	Option "_source" "server/udev"
>[ 29043.036] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 29043.036] 	Option "path" "/dev/input/event14"
>[ 29043.036] 	Option "device" "/dev/input/event14"
>[ 29043.036] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input26/event14"
>[ 29043.036] 	Option "driver" "evdev"
>[ 29043.036] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 29043.036] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 29043.041] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 29043.041] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 29043.041] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 29043.041] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 29043.041] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 29043.041] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 29043.041] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 29043.041] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 29043.041] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 29043.041] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input26/event14"
>[ 29043.041] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 29043.041] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 29043.041] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 29043.041] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 29043.041] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 29043.041] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 29045.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29045.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29046.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29046.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29046.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c57550]
>[ 29046.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c57550] width 1920 pitch 7680 (/4 1920)
>[ 29046.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29047.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29048.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29048.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29078.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29078.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29093.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f330]
>[ 29093.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f330] width 1920 pitch 7680 (/4 1920)
>[ 29108.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1f330]
>[ 29108.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1f330] width 1920 pitch 7680 (/4 1920)
>[ 29134.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29134.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29136.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29136.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29136.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 29136.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 29140.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29140.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29140.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29140.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29140.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29140.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29140.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29140.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29140.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29140.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29156.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29156.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29156.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29156.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29156.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29156.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29156.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29156.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29156.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29156.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29156.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29156.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29156.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29156.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29156.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29156.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29156.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29157.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29157.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29157.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29157.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29157.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29157.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29157.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29157.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29157.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29157.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29157.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29157.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 29157.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 29157.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29157.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29157.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29157.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29158.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 29158.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 29158.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965580]
>[ 29158.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965580] width 1920 pitch 7680 (/4 1920)
>[ 29158.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 29158.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 29158.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48ac0]
>[ 29158.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48ac0] width 1920 pitch 7680 (/4 1920)
>[ 29158.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 29158.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 29158.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f127a0]
>[ 29158.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f127a0] width 1920 pitch 7680 (/4 1920)
>[ 29158.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38dd0]
>[ 29158.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38dd0] width 1920 pitch 7680 (/4 1920)
>[ 29158.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb580]
>[ 29158.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb580] width 1920 pitch 7680 (/4 1920)
>[ 29158.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb100]
>[ 29158.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb100] width 1920 pitch 7680 (/4 1920)
>[ 29158.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d4f0]
>[ 29158.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d4f0] width 1920 pitch 7680 (/4 1920)
>[ 29158.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d6d0]
>[ 29158.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d6d0] width 1920 pitch 7680 (/4 1920)
>[ 29158.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c469a0]
>[ 29158.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c469a0] width 1920 pitch 7680 (/4 1920)
>[ 29158.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d6d0]
>[ 29158.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d6d0] width 1920 pitch 7680 (/4 1920)
>[ 29158.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38cd0]
>[ 29158.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38cd0] width 1920 pitch 7680 (/4 1920)
>[ 29158.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d6d0]
>[ 29158.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d6d0] width 1920 pitch 7680 (/4 1920)
>[ 29158.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38cd0]
>[ 29158.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38cd0] width 1920 pitch 7680 (/4 1920)
>[ 29158.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d6d0]
>[ 29158.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d6d0] width 1920 pitch 7680 (/4 1920)
>[ 29158.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb100]
>[ 29158.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb100] width 1920 pitch 7680 (/4 1920)
>[ 29158.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c466c0]
>[ 29158.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c466c0] width 1920 pitch 7680 (/4 1920)
>[ 29158.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46760]
>[ 29158.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46760] width 1920 pitch 7680 (/4 1920)
>[ 29158.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c466c0]
>[ 29158.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c466c0] width 1920 pitch 7680 (/4 1920)
>[ 29158.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46760]
>[ 29158.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46760] width 1920 pitch 7680 (/4 1920)
>[ 29178.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c39da0]
>[ 29178.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c39da0] width 1920 pitch 7680 (/4 1920)
>[ 29183.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40200]
>[ 29183.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40200] width 1920 pitch 7680 (/4 1920)
>[ 29184.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40200]
>[ 29184.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40200] width 1920 pitch 7680 (/4 1920)
>[ 29184.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c403b0]
>[ 29184.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c403b0] width 1920 pitch 7680 (/4 1920)
>[ 29184.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40200]
>[ 29184.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40200] width 1920 pitch 7680 (/4 1920)
>[ 29184.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c403b0]
>[ 29184.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c403b0] width 1920 pitch 7680 (/4 1920)
>[ 29184.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40200]
>[ 29184.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40200] width 1920 pitch 7680 (/4 1920)
>[ 29184.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c403b0]
>[ 29184.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c403b0] width 1920 pitch 7680 (/4 1920)
>[ 29184.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40200]
>[ 29184.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40200] width 1920 pitch 7680 (/4 1920)
>[ 29184.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c403b0]
>[ 29184.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c403b0] width 1920 pitch 7680 (/4 1920)
>[ 29184.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40250]
>[ 29184.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40250] width 1920 pitch 7680 (/4 1920)
>[ 29184.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c403b0]
>[ 29184.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c403b0] width 1920 pitch 7680 (/4 1920)
>[ 29185.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64430]
>[ 29185.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64430] width 1920 pitch 7680 (/4 1920)
>[ 29185.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29185.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29185.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64430]
>[ 29185.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64430] width 1920 pitch 7680 (/4 1920)
>[ 29185.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29185.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29186.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29186.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29186.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9b90]
>[ 29186.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9b90] width 1920 pitch 7680 (/4 1920)
>[ 29186.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29186.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29186.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9b90]
>[ 29186.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9b90] width 1920 pitch 7680 (/4 1920)
>[ 29186.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29186.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29186.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9b90]
>[ 29186.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9b90] width 1920 pitch 7680 (/4 1920)
>[ 29186.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29186.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29186.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9b90]
>[ 29186.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9b90] width 1920 pitch 7680 (/4 1920)
>[ 29186.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29186.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29186.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47750]
>[ 29186.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47750] width 1920 pitch 7680 (/4 1920)
>[ 29186.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[ 29187.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[ 29187.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29187.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29187.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[ 29187.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[ 29187.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29187.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29187.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[ 29187.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[ 29187.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29187.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29187.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[ 29187.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[ 29187.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248b070]
>[ 29187.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248b070] width 1920 pitch 7680 (/4 1920)
>[ 29187.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[ 29187.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[ 29187.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47750]
>[ 29187.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47750] width 1920 pitch 7680 (/4 1920)
>[ 29187.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29187.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29188.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47750]
>[ 29188.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47750] width 1920 pitch 7680 (/4 1920)
>[ 29188.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[ 29188.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[ 29188.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c47750]
>[ 29188.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c47750] width 1920 pitch 7680 (/4 1920)
>[ 29188.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3c2c0]
>[ 29188.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3c2c0] width 1920 pitch 7680 (/4 1920)
>[ 29188.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 29188.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 29189.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebde20]
>[ 29189.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebde20] width 1920 pitch 7680 (/4 1920)
>[ 29189.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 29189.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 29189.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9ba0]
>[ 29189.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9ba0] width 1920 pitch 7680 (/4 1920)
>[ 29189.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 29189.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 29189.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9ba0]
>[ 29189.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9ba0] width 1920 pitch 7680 (/4 1920)
>[ 29189.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc230]
>[ 29189.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc230] width 1920 pitch 7680 (/4 1920)
>[ 29189.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9ba0]
>[ 29189.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9ba0] width 1920 pitch 7680 (/4 1920)
>[ 29195.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a3c0]
>[ 29195.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a3c0] width 1920 pitch 7680 (/4 1920)
>[ 29195.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25672b0]
>[ 29195.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25672b0] width 1920 pitch 7680 (/4 1920)
>[ 29195.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 29195.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 29195.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25672b0]
>[ 29195.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25672b0] width 1920 pitch 7680 (/4 1920)
>[ 29195.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 29195.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 29195.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25672b0]
>[ 29196.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25672b0] width 1920 pitch 7680 (/4 1920)
>[ 29196.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 29196.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 29196.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad5a0]
>[ 29196.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad5a0] width 1920 pitch 7680 (/4 1920)
>[ 29196.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 29196.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 29196.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9ba0]
>[ 29196.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9ba0] width 1920 pitch 7680 (/4 1920)
>[ 29196.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[ 29196.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[ 29196.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9ba0]
>[ 29196.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9ba0] width 1920 pitch 7680 (/4 1920)
>[ 29196.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdca0]
>[ 29196.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdca0] width 1920 pitch 7680 (/4 1920)
>[ 29196.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29196.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29196.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdca0]
>[ 29196.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdca0] width 1920 pitch 7680 (/4 1920)
>[ 29196.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29196.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29196.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdca0]
>[ 29196.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdca0] width 1920 pitch 7680 (/4 1920)
>[ 29196.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29196.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29196.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdca0]
>[ 29196.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdca0] width 1920 pitch 7680 (/4 1920)
>[ 29196.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29196.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29196.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdca0]
>[ 29196.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdca0] width 1920 pitch 7680 (/4 1920)
>[ 29197.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29197.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29197.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcdca0]
>[ 29197.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcdca0] width 1920 pitch 7680 (/4 1920)
>[ 29197.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29197.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29197.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ea20]
>[ 29197.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ea20] width 1920 pitch 7680 (/4 1920)
>[ 29197.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29197.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29197.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29197.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29197.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29197.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29197.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29197.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29197.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29197.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29197.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29197.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29197.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29197.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29197.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29197.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29197.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29197.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29197.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29197.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29198.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29198.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29198.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29198.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29198.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29199.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29199.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29199.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29199.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29199.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29199.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29199.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29199.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29199.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29199.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29199.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29199.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29199.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29199.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4110]
>[ 29201.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4110] width 1920 pitch 7680 (/4 1920)
>[ 29201.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.618] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 29201.618] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 29201.618] (II) UnloadModule: "evdev"
>[ 29201.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29201.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29201.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29201.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29201.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29201.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29201.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29201.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29201.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29201.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29201.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64620]
>[ 29202.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64620] width 1920 pitch 7680 (/4 1920)
>[ 29202.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29202.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29286.982] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 29286.982] (II) No input driver specified, ignoring this device.
>[ 29286.982] (II) This device may have been added with another device file.
>[ 29286.983] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 29286.983] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 29286.983] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 29286.983] 	Option "XkbRules" "evdev"
>[ 29286.983] 	Option "XkbModel" "evdev"
>[ 29286.983] 	Option "XkbLayout" "us"
>[ 29286.983] 	Option "_source" "server/udev"
>[ 29286.983] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 29286.983] 	Option "path" "/dev/input/event14"
>[ 29286.983] 	Option "device" "/dev/input/event14"
>[ 29286.983] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input27/event14"
>[ 29286.983] 	Option "driver" "evdev"
>[ 29286.983] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 29286.983] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 29286.986] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 29286.986] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 29286.986] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 29286.986] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 29286.986] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 29286.986] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 29286.986] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 29286.986] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 29286.986] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 29286.986] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input27/event14"
>[ 29286.986] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 29286.986] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 29286.986] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 29286.986] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 29286.986] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 29286.986] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 29295.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 29295.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 29297.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c74640]
>[ 29297.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c74640] width 1920 pitch 7680 (/4 1920)
>[ 29307.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29307.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29307.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29307.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29307.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29307.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29307.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29307.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29307.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29307.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29307.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29307.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29307.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29307.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29307.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29307.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29307.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29307.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29307.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29307.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29307.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29307.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29308.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29308.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29308.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de44d0]
>[ 29308.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de44d0] width 1920 pitch 7680 (/4 1920)
>[ 29308.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b3970]
>[ 29308.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b3970] width 1920 pitch 7680 (/4 1920)
>[ 29308.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81e20]
>[ 29308.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81e20] width 1920 pitch 7680 (/4 1920)
>[ 29318.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69b70]
>[ 29318.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69b70] width 1920 pitch 7680 (/4 1920)
>[ 29333.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e80]
>[ 29333.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e80] width 1920 pitch 7680 (/4 1920)
>[ 29339.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29339.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29340.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e80]
>[ 29340.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e80] width 1920 pitch 7680 (/4 1920)
>[ 29340.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2561e80]
>[ 29340.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2561e80] width 1920 pitch 7680 (/4 1920)
>[ 29341.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69b90]
>[ 29341.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69b90] width 1920 pitch 7680 (/4 1920)
>[ 29341.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b3970]
>[ 29341.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b3970] width 1920 pitch 7680 (/4 1920)
>[ 29341.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c40260]
>[ 29341.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c40260] width 1920 pitch 7680 (/4 1920)
>[ 29341.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69b70]
>[ 29341.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69b70] width 1920 pitch 7680 (/4 1920)
>[ 29342.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b3970]
>[ 29342.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b3970] width 1920 pitch 7680 (/4 1920)
>[ 29342.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29342.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29342.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29342.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29342.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29342.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29342.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29342.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29342.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29342.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29342.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29342.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29342.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29342.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29343.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29343.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29345.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29345.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29345.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29345.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29345.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f165e0]
>[ 29345.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f165e0] width 1920 pitch 7680 (/4 1920)
>[ 29348.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29348.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29378.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29378.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29393.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29393.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29423.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29423.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29453.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75c90]
>[ 29453.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75c90] width 1920 pitch 7680 (/4 1920)
>[ 29468.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75c90]
>[ 29468.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75c90] width 1920 pitch 7680 (/4 1920)
>[ 29498.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29498.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29515.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29515.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29515.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29515.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29515.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75c90]
>[ 29515.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75c90] width 1920 pitch 7680 (/4 1920)
>[ 29515.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29515.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29515.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75c90]
>[ 29515.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75c90] width 1920 pitch 7680 (/4 1920)
>[ 29515.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29515.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29515.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75c90]
>[ 29515.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75c90] width 1920 pitch 7680 (/4 1920)
>[ 29515.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29515.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29515.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75c90]
>[ 29515.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75c90] width 1920 pitch 7680 (/4 1920)
>[ 29515.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29515.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29516.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda850]
>[ 29516.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda850] width 1920 pitch 7680 (/4 1920)
>[ 29516.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29516.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29516.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda850]
>[ 29516.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda850] width 1920 pitch 7680 (/4 1920)
>[ 29516.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda850]
>[ 29516.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda850] width 1920 pitch 7680 (/4 1920)
>[ 29516.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe390]
>[ 29516.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe390] width 1920 pitch 7680 (/4 1920)
>[ 29516.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda850]
>[ 29517.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda850] width 1920 pitch 7680 (/4 1920)
>[ 29517.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda850]
>[ 29517.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda850] width 1920 pitch 7680 (/4 1920)
>[ 29517.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda850]
>[ 29517.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda850] width 1920 pitch 7680 (/4 1920)
>[ 29517.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1f00]
>[ 29517.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1f00] width 1920 pitch 7680 (/4 1920)
>[ 29517.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903c50]
>[ 29517.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903c50] width 1920 pitch 7680 (/4 1920)
>[ 29517.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1f00]
>[ 29517.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1f00] width 1920 pitch 7680 (/4 1920)
>[ 29517.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903c50]
>[ 29517.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903c50] width 1920 pitch 7680 (/4 1920)
>[ 29517.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1f00]
>[ 29517.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1f00] width 1920 pitch 7680 (/4 1920)
>[ 29517.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903c50]
>[ 29517.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903c50] width 1920 pitch 7680 (/4 1920)
>[ 29517.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1f00]
>[ 29517.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1f00] width 1920 pitch 7680 (/4 1920)
>[ 29520.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b621a0]
>[ 29520.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b621a0] width 1920 pitch 7680 (/4 1920)
>[ 29520.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[ 29520.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[ 29520.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2d510]
>[ 29520.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2d510] width 1920 pitch 7680 (/4 1920)
>[ 29520.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[ 29520.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[ 29520.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f78e0]
>[ 29520.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f78e0] width 1920 pitch 7680 (/4 1920)
>[ 29521.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 29521.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 29521.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[ 29521.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[ 29521.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29521.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29521.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29521.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29521.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29521.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29521.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29521.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29521.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29521.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29521.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29521.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29521.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29521.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29521.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29521.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29521.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d480]
>[ 29521.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d480] width 1920 pitch 7680 (/4 1920)
>[ 29521.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ba1e0]
>[ 29521.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ba1e0] width 1920 pitch 7680 (/4 1920)
>[ 29522.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29522.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29522.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29522.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29522.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 29522.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 29522.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c477b0]
>[ 29522.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c477b0] width 1920 pitch 7680 (/4 1920)
>[ 29523.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29523.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29523.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29523.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29523.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29523.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29523.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29523.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29523.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29523.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29523.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29523.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29523.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29523.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29523.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 29523.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 29523.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 29523.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 29618.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29618.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29633.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7ae0]
>[ 29633.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7ae0] width 1920 pitch 7680 (/4 1920)
>[ 29663.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[ 29663.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[ 29678.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 29678.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 29708.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29708.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29723.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 29723.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 29738.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0540]
>[ 29738.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0540] width 1920 pitch 7680 (/4 1920)
>[ 29753.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29753.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29783.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7ae0]
>[ 29783.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7ae0] width 1920 pitch 7680 (/4 1920)
>[ 29798.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 29798.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 29800.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3230]
>[ 29800.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3230] width 1920 pitch 7680 (/4 1920)
>[ 29800.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29800.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29800.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29800.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29800.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29800.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29800.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29800.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29800.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29800.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29800.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29800.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29800.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29800.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29800.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29800.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29800.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29800.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29800.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29800.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29800.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29800.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29800.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29800.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29800.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29801.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29804.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29804.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29804.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29805.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29805.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29805.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29805.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29805.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29805.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29805.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29805.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29805.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29806.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29806.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29806.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29806.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29858.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29858.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29873.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29873.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29883.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c670]
>[ 29883.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c670] width 1920 pitch 7680 (/4 1920)
>[ 29883.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29883.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29883.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2371e20]
>[ 29883.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2371e20] width 1920 pitch 7680 (/4 1920)
>[ 29883.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3450]
>[ 29883.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3450] width 1920 pitch 7680 (/4 1920)
>[ 29883.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f5f0]
>[ 29883.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f5f0] width 1920 pitch 7680 (/4 1920)
>[ 29883.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29883.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29883.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f5f0]
>[ 29883.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f5f0] width 1920 pitch 7680 (/4 1920)
>[ 29883.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29883.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29883.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f5f0]
>[ 29883.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f5f0] width 1920 pitch 7680 (/4 1920)
>[ 29883.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3450]
>[ 29883.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3450] width 1920 pitch 7680 (/4 1920)
>[ 29883.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29883.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29883.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f5f0]
>[ 29883.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f5f0] width 1920 pitch 7680 (/4 1920)
>[ 29883.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3450]
>[ 29883.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3450] width 1920 pitch 7680 (/4 1920)
>[ 29883.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29883.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29883.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f5f0]
>[ 29883.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f5f0] width 1920 pitch 7680 (/4 1920)
>[ 29884.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70b50]
>[ 29884.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70b50] width 1920 pitch 7680 (/4 1920)
>[ 29885.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402b750]
>[ 29885.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402b750] width 1920 pitch 7680 (/4 1920)
>[ 29885.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29885.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29885.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29885.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29887.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29887.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29887.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29887.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29887.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29887.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29887.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29887.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29887.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29887.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29887.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29887.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29887.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29888.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29888.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29888.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29888.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29888.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29888.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29888.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29888.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29888.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29888.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29888.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29888.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda490]
>[ 29888.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda490] width 1920 pitch 7680 (/4 1920)
>[ 29888.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29888.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29948.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 29948.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 29954.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29954.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29954.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254d9c0]
>[ 29954.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254d9c0] width 1920 pitch 7680 (/4 1920)
>[ 29954.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29954.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29954.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254d9c0]
>[ 29954.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254d9c0] width 1920 pitch 7680 (/4 1920)
>[ 29954.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29954.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29954.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254d9c0]
>[ 29954.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254d9c0] width 1920 pitch 7680 (/4 1920)
>[ 29954.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29954.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29954.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254d9c0]
>[ 29954.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254d9c0] width 1920 pitch 7680 (/4 1920)
>[ 29954.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd540]
>[ 29954.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd540] width 1920 pitch 7680 (/4 1920)
>[ 29954.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29954.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29954.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 29955.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 29955.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e807a0]
>[ 29955.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e807a0] width 1920 pitch 7680 (/4 1920)
>[ 29955.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29955.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29955.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d95440]
>[ 29955.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d95440] width 1920 pitch 7680 (/4 1920)
>[ 29955.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfabc0]
>[ 29955.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfabc0] width 1920 pitch 7680 (/4 1920)
>[ 29955.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 29955.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 29955.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941260]
>[ 29955.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941260] width 1920 pitch 7680 (/4 1920)
>[ 29956.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff7d40]
>[ 29956.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff7d40] width 1920 pitch 7680 (/4 1920)
>[ 29956.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7deb0]
>[ 29956.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7deb0] width 1920 pitch 7680 (/4 1920)
>[ 29956.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29956.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[ 29956.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[ 29956.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[ 29956.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[ 29963.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39076a0]
>[ 29963.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39076a0] width 1920 pitch 7680 (/4 1920)
>[ 29966.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 29966.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 29966.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[ 29966.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[ 29966.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[ 29966.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[ 29966.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3230]
>[ 29966.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3230] width 1920 pitch 7680 (/4 1920)
>[ 29966.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 29966.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 29966.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd540]
>[ 29966.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd540] width 1920 pitch 7680 (/4 1920)
>[ 29966.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2e960]
>[ 29966.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2e960] width 1920 pitch 7680 (/4 1920)
>[ 29966.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 29966.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 29966.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 29966.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 29966.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[ 29966.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[ 29966.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 29966.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 29966.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 29966.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 29970.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 29970.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 29971.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1e70]
>[ 29971.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1e70] width 1920 pitch 7680 (/4 1920)
>[ 29971.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1e70]
>[ 29971.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1e70] width 1920 pitch 7680 (/4 1920)
>[ 29974.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ed140]
>[ 29974.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ed140] width 1920 pitch 7680 (/4 1920)
>[ 30011.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb5d0]
>[ 30011.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb5d0] width 1920 pitch 7680 (/4 1920)
>[ 30011.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb5d0]
>[ 30011.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb5d0] width 1920 pitch 7680 (/4 1920)
>[ 30011.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb5d0]
>[ 30011.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb5d0] width 1920 pitch 7680 (/4 1920)
>[ 30011.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb5d0]
>[ 30011.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb5d0] width 1920 pitch 7680 (/4 1920)
>[ 30011.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb5d0]
>[ 30011.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb5d0] width 1920 pitch 7680 (/4 1920)
>[ 30011.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3230]
>[ 30011.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3230] width 1920 pitch 7680 (/4 1920)
>[ 30011.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3230]
>[ 30011.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3230] width 1920 pitch 7680 (/4 1920)
>[ 30011.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30011.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30011.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3230]
>[ 30011.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3230] width 1920 pitch 7680 (/4 1920)
>[ 30011.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024810]
>[ 30011.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024810] width 1920 pitch 7680 (/4 1920)
>[ 30011.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3230]
>[ 30011.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3230] width 1920 pitch 7680 (/4 1920)
>[ 30013.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a4d0]
>[ 30013.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a4d0] width 1920 pitch 7680 (/4 1920)
>[ 30013.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 30013.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 30013.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30013.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30013.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 30013.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 30013.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 30013.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 30013.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d95440]
>[ 30013.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d95440] width 1920 pitch 7680 (/4 1920)
>[ 30013.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[ 30013.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[ 30013.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[ 30013.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[ 30013.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30013.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30014.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 30014.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 30014.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30014.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30014.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 30014.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 30014.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30014.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30014.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[ 30014.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[ 30014.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30014.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30014.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30014.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30014.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30014.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30016.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30016.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30016.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b360]
>[ 30016.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b360] width 1920 pitch 7680 (/4 1920)
>[ 30016.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937de0]
>[ 30016.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937de0] width 1920 pitch 7680 (/4 1920)
>[ 30059.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bea00]
>[ 30059.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bea00] width 1920 pitch 7680 (/4 1920)
>[ 30059.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[ 30059.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[ 30059.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bea00]
>[ 30059.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bea00] width 1920 pitch 7680 (/4 1920)
>[ 30059.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[ 30059.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[ 30059.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bea00]
>[ 30059.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bea00] width 1920 pitch 7680 (/4 1920)
>[ 30059.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 30059.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 30059.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[ 30059.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[ 30059.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[ 30059.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[ 30059.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d95440]
>[ 30059.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d95440] width 1920 pitch 7680 (/4 1920)
>[ 30059.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38d70]
>[ 30059.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38d70] width 1920 pitch 7680 (/4 1920)
>[ 30059.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[ 30059.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[ 30059.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402b840]
>[ 30060.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402b840] width 1920 pitch 7680 (/4 1920)
>[ 30060.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[ 30060.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[ 30060.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402b840]
>[ 30060.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402b840] width 1920 pitch 7680 (/4 1920)
>[ 30060.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[ 30060.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[ 30060.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402b840]
>[ 30060.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402b840] width 1920 pitch 7680 (/4 1920)
>[ 30060.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[ 30060.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[ 30060.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a4d0]
>[ 30060.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a4d0] width 1920 pitch 7680 (/4 1920)
>[ 30060.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30060.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30061.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8d40]
>[ 30061.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8d40] width 1920 pitch 7680 (/4 1920)
>[ 30061.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bea00]
>[ 30061.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bea00] width 1920 pitch 7680 (/4 1920)
>[ 30061.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb7e0]
>[ 30061.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb7e0] width 1920 pitch 7680 (/4 1920)
>[ 30061.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[ 30061.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[ 30061.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 30061.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 30061.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 30061.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 30061.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 30061.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 30061.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 30061.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 30061.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 30061.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 30061.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 30061.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 30061.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 30061.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 30061.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 30061.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 30061.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 30061.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 30061.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead100]
>[ 30061.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead100] width 1920 pitch 7680 (/4 1920)
>[ 30061.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[ 30061.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[ 30063.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2e960]
>[ 30063.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2e960] width 1920 pitch 7680 (/4 1920)
>[ 30063.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[ 30063.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[ 30063.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30063.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30063.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30063.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30063.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30063.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30063.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30063.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30064.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30064.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30064.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30064.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30064.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30064.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30064.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30064.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30064.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30064.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30064.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30064.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30064.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30064.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30064.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30064.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30064.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30064.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30064.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[ 30064.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[ 30064.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30065.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30065.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30065.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30065.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30065.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30065.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30065.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30065.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30065.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30065.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30065.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30065.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30065.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30065.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30065.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30065.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d3e0]
>[ 30065.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d3e0] width 1920 pitch 7680 (/4 1920)
>[ 30065.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d71d0]
>[ 30065.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d71d0] width 1920 pitch 7680 (/4 1920)
>[ 30065.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c2f0]
>[ 30065.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c2f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfee0]
>[ 30065.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfee0] width 1920 pitch 7680 (/4 1920)
>[ 30065.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30065.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30065.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfee0]
>[ 30065.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfee0] width 1920 pitch 7680 (/4 1920)
>[ 30065.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b220]
>[ 30065.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b220] width 1920 pitch 7680 (/4 1920)
>[ 30065.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30065.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30065.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 30065.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30065.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30065.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 30065.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30065.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30065.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 30065.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30065.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30065.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 30065.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30065.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30065.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[ 30065.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5e570]
>[ 30065.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5e570] width 1920 pitch 7680 (/4 1920)
>[ 30065.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39368f0]
>[ 30065.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39368f0] width 1920 pitch 7680 (/4 1920)
>[ 30065.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07030]
>[ 30065.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07030] width 1920 pitch 7680 (/4 1920)
>[ 30066.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30066.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30066.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30066.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30066.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30066.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30066.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5910]
>[ 30066.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5910] width 1920 pitch 7680 (/4 1920)
>[ 30066.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5a80]
>[ 30066.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5a80] width 1920 pitch 7680 (/4 1920)
>[ 30067.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a4b0]
>[ 30067.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a4b0] width 1920 pitch 7680 (/4 1920)
>[ 30067.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30067.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30067.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d620]
>[ 30067.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d620] width 1920 pitch 7680 (/4 1920)
>[ 30067.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd2c0]
>[ 30067.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd2c0] width 1920 pitch 7680 (/4 1920)
>[ 30068.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9380]
>[ 30068.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9380] width 1920 pitch 7680 (/4 1920)
>[ 30072.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d4f0]
>[ 30072.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d4f0] width 1920 pitch 7680 (/4 1920)
>[ 30072.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5970]
>[ 30072.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5970] width 1920 pitch 7680 (/4 1920)
>[ 30072.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30072.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30072.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba7990]
>[ 30072.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba7990] width 1920 pitch 7680 (/4 1920)
>[ 30072.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30072.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30072.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba7990]
>[ 30072.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba7990] width 1920 pitch 7680 (/4 1920)
>[ 30072.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30072.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30072.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d4f0]
>[ 30072.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d4f0] width 1920 pitch 7680 (/4 1920)
>[ 30072.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5970]
>[ 30072.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5970] width 1920 pitch 7680 (/4 1920)
>[ 30072.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501c60]
>[ 30072.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501c60] width 1920 pitch 7680 (/4 1920)
>[ 30072.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30072.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30073.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501c60]
>[ 30073.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501c60] width 1920 pitch 7680 (/4 1920)
>[ 30073.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30073.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30073.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501c60]
>[ 30073.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501c60] width 1920 pitch 7680 (/4 1920)
>[ 30073.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30073.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30073.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501c60]
>[ 30073.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501c60] width 1920 pitch 7680 (/4 1920)
>[ 30073.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebd260]
>[ 30073.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebd260] width 1920 pitch 7680 (/4 1920)
>[ 30073.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2501c60]
>[ 30073.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2501c60] width 1920 pitch 7680 (/4 1920)
>[ 30083.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f43b0]
>[ 30083.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f43b0] width 1920 pitch 7680 (/4 1920)
>[ 30085.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08fb0]
>[ 30085.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08fb0] width 1920 pitch 7680 (/4 1920)
>[ 30136.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90790]
>[ 30136.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90790] width 1920 pitch 7680 (/4 1920)
>[ 30136.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90790]
>[ 30136.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90790] width 1920 pitch 7680 (/4 1920)
>[ 30136.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90790]
>[ 30136.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90790] width 1920 pitch 7680 (/4 1920)
>[ 30136.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90790]
>[ 30136.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90790] width 1920 pitch 7680 (/4 1920)
>[ 30136.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67660]
>[ 30136.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67660] width 1920 pitch 7680 (/4 1920)
>[ 30136.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67660]
>[ 30136.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67660] width 1920 pitch 7680 (/4 1920)
>[ 30136.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67660]
>[ 30136.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67660] width 1920 pitch 7680 (/4 1920)
>[ 30136.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67660]
>[ 30136.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67660] width 1920 pitch 7680 (/4 1920)
>[ 30136.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40237e0]
>[ 30136.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40237e0] width 1920 pitch 7680 (/4 1920)
>[ 30136.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67660]
>[ 30136.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67660] width 1920 pitch 7680 (/4 1920)
>[ 30154.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61180]
>[ 30154.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61180] width 1920 pitch 7680 (/4 1920)
>[ 30154.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff2e90]
>[ 30154.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff2e90] width 1920 pitch 7680 (/4 1920)
>[ 30154.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff2e90]
>[ 30154.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff2e90] width 1920 pitch 7680 (/4 1920)
>[ 30154.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff2e90]
>[ 30154.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff2e90] width 1920 pitch 7680 (/4 1920)
>[ 30154.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61780]
>[ 30154.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61780] width 1920 pitch 7680 (/4 1920)
>[ 30154.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61780]
>[ 30154.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61780] width 1920 pitch 7680 (/4 1920)
>[ 30154.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23740]
>[ 30154.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23740] width 1920 pitch 7680 (/4 1920)
>[ 30154.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23740]
>[ 30154.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23740] width 1920 pitch 7680 (/4 1920)
>[ 30154.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30154.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2ae0]
>[ 30154.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2ae0] width 1920 pitch 7680 (/4 1920)
>[ 30154.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61050]
>[ 30154.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61050] width 1920 pitch 7680 (/4 1920)
>[ 30161.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6b740]
>[ 30161.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6b740] width 1920 pitch 7680 (/4 1920)
>[ 30161.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67790]
>[ 30161.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67790] width 1920 pitch 7680 (/4 1920)
>[ 30161.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6b740]
>[ 30161.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6b740] width 1920 pitch 7680 (/4 1920)
>[ 30161.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67790]
>[ 30161.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67790] width 1920 pitch 7680 (/4 1920)
>[ 30161.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6b740]
>[ 30161.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6b740] width 1920 pitch 7680 (/4 1920)
>[ 30161.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71e60]
>[ 30161.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71e60] width 1920 pitch 7680 (/4 1920)
>[ 30161.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e676c0]
>[ 30161.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e676c0] width 1920 pitch 7680 (/4 1920)
>[ 30161.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71e60]
>[ 30161.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71e60] width 1920 pitch 7680 (/4 1920)
>[ 30161.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e676c0]
>[ 30161.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e676c0] width 1920 pitch 7680 (/4 1920)
>[ 30161.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71e60]
>[ 30161.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71e60] width 1920 pitch 7680 (/4 1920)
>[ 30161.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e676c0]
>[ 30161.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e676c0] width 1920 pitch 7680 (/4 1920)
>[ 30161.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71e60]
>[ 30161.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71e60] width 1920 pitch 7680 (/4 1920)
>[ 30161.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e676c0]
>[ 30161.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e676c0] width 1920 pitch 7680 (/4 1920)
>[ 30161.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71e60]
>[ 30161.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71e60] width 1920 pitch 7680 (/4 1920)
>[ 30161.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e676c0]
>[ 30161.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e676c0] width 1920 pitch 7680 (/4 1920)
>[ 30161.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71e60]
>[ 30161.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71e60] width 1920 pitch 7680 (/4 1920)
>[ 30161.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e676c0]
>[ 30161.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e676c0] width 1920 pitch 7680 (/4 1920)
>[ 30163.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392cd90]
>[ 30163.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392cd90] width 1920 pitch 7680 (/4 1920)
>[ 30163.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392cd90]
>[ 30163.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392cd90] width 1920 pitch 7680 (/4 1920)
>[ 30163.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392cd90]
>[ 30163.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392cd90] width 1920 pitch 7680 (/4 1920)
>[ 30163.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09260]
>[ 30163.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09260] width 1920 pitch 7680 (/4 1920)
>[ 30163.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09260]
>[ 30163.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09260] width 1920 pitch 7680 (/4 1920)
>[ 30163.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09260]
>[ 30163.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09260] width 1920 pitch 7680 (/4 1920)
>[ 30163.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09260]
>[ 30163.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09260] width 1920 pitch 7680 (/4 1920)
>[ 30163.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09260]
>[ 30163.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09260] width 1920 pitch 7680 (/4 1920)
>[ 30163.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7f8d0]
>[ 30163.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7f8d0] width 1920 pitch 7680 (/4 1920)
>[ 30163.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09260]
>[ 30163.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09260] width 1920 pitch 7680 (/4 1920)
>[ 30166.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30166.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30166.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30166.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30166.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30166.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30166.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ae40]
>[ 30166.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ae40] width 1920 pitch 7680 (/4 1920)
>[ 30166.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30166.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30169.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe190]
>[ 30169.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe190] width 1920 pitch 7680 (/4 1920)
>[ 30169.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2ae0]
>[ 30169.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2ae0] width 1920 pitch 7680 (/4 1920)
>[ 30169.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe190]
>[ 30169.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe190] width 1920 pitch 7680 (/4 1920)
>[ 30169.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2ae0]
>[ 30169.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2ae0] width 1920 pitch 7680 (/4 1920)
>[ 30169.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe190]
>[ 30169.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe190] width 1920 pitch 7680 (/4 1920)
>[ 30169.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2ae0]
>[ 30169.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2ae0] width 1920 pitch 7680 (/4 1920)
>[ 30169.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30169.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30169.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fa60]
>[ 30169.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fa60] width 1920 pitch 7680 (/4 1920)
>[ 30169.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30169.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30169.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fa60]
>[ 30169.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fa60] width 1920 pitch 7680 (/4 1920)
>[ 30169.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30169.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30169.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fa60]
>[ 30169.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fa60] width 1920 pitch 7680 (/4 1920)
>[ 30169.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30169.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30169.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fa60]
>[ 30169.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fa60] width 1920 pitch 7680 (/4 1920)
>[ 30169.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30169.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30169.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fa60]
>[ 30169.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fa60] width 1920 pitch 7680 (/4 1920)
>[ 30169.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b407b0]
>[ 30169.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b407b0] width 1920 pitch 7680 (/4 1920)
>[ 30203.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbdde0]
>[ 30203.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbdde0] width 1920 pitch 7680 (/4 1920)
>[ 30207.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd4c0]
>[ 30207.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd4c0] width 1920 pitch 7680 (/4 1920)
>[ 30207.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd4c0]
>[ 30207.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd4c0] width 1920 pitch 7680 (/4 1920)
>[ 30207.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd4c0]
>[ 30207.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd4c0] width 1920 pitch 7680 (/4 1920)
>[ 30207.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd4c0]
>[ 30207.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd4c0] width 1920 pitch 7680 (/4 1920)
>[ 30207.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd4c0]
>[ 30207.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd4c0] width 1920 pitch 7680 (/4 1920)
>[ 30207.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dd4c0]
>[ 30207.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dd4c0] width 1920 pitch 7680 (/4 1920)
>[ 30207.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fda0]
>[ 30207.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fda0] width 1920 pitch 7680 (/4 1920)
>[ 30207.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30207.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fda0]
>[ 30207.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fda0] width 1920 pitch 7680 (/4 1920)
>[ 30207.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40039a0]
>[ 30207.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40039a0] width 1920 pitch 7680 (/4 1920)
>[ 30213.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30213.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3bd0]
>[ 30213.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 30213.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30213.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee0f20]
>[ 30215.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee0f20] width 1920 pitch 7680 (/4 1920)
>[ 30215.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb8c20]
>[ 30215.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb8c20] width 1920 pitch 7680 (/4 1920)
>[ 30215.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30215.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30215.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30215.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30215.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c32e0]
>[ 30215.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c32e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbde90]
>[ 30215.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbde90] width 1920 pitch 7680 (/4 1920)
>[ 30215.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbdc10]
>[ 30215.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbdc10] width 1920 pitch 7680 (/4 1920)
>[ 30215.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5c8e0]
>[ 30215.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5c8e0] width 1920 pitch 7680 (/4 1920)
>[ 30215.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbdc10]
>[ 30215.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbdc10] width 1920 pitch 7680 (/4 1920)
>[ 30218.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff78e0]
>[ 30218.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff78e0] width 1920 pitch 7680 (/4 1920)
>[ 30233.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11060]
>[ 30233.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11060] width 1920 pitch 7680 (/4 1920)
>[ 30233.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ebd0]
>[ 30233.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ebd0] width 1920 pitch 7680 (/4 1920)
>[ 30233.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11060]
>[ 30233.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11060] width 1920 pitch 7680 (/4 1920)
>[ 30233.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ebd0]
>[ 30233.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ebd0] width 1920 pitch 7680 (/4 1920)
>[ 30233.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11060]
>[ 30233.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11060] width 1920 pitch 7680 (/4 1920)
>[ 30233.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ebd0]
>[ 30233.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ebd0] width 1920 pitch 7680 (/4 1920)
>[ 30233.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11060]
>[ 30233.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11060] width 1920 pitch 7680 (/4 1920)
>[ 30233.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ebd0]
>[ 30233.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ebd0] width 1920 pitch 7680 (/4 1920)
>[ 30233.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11060]
>[ 30233.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11060] width 1920 pitch 7680 (/4 1920)
>[ 30233.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954090]
>[ 30233.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954090] width 1920 pitch 7680 (/4 1920)
>[ 30233.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11060]
>[ 30233.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11060] width 1920 pitch 7680 (/4 1920)
>[ 30233.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954090]
>[ 30233.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954090] width 1920 pitch 7680 (/4 1920)
>[ 30233.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fb70]
>[ 30233.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fb70] width 1920 pitch 7680 (/4 1920)
>[ 30233.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954090]
>[ 30233.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954090] width 1920 pitch 7680 (/4 1920)
>[ 30233.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c049e0]
>[ 30233.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c049e0] width 1920 pitch 7680 (/4 1920)
>[ 30233.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954090]
>[ 30233.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954090] width 1920 pitch 7680 (/4 1920)
>[ 30233.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c049e0]
>[ 30233.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c049e0] width 1920 pitch 7680 (/4 1920)
>[ 30234.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30234.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30234.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30234.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30234.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30234.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30234.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30234.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30234.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30234.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30234.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3b00]
>[ 30234.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3b00] width 1920 pitch 7680 (/4 1920)
>[ 30234.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30234.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30234.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30235.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30235.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30235.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30235.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b0a0]
>[ 30235.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b0a0] width 1920 pitch 7680 (/4 1920)
>[ 30235.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6aba0]
>[ 30235.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6aba0] width 1920 pitch 7680 (/4 1920)
>[ 30247.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30247.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30247.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30247.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30247.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30247.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30247.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30247.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30247.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30247.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30247.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30247.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30248.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30248.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30248.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30248.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30248.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30248.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30248.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30248.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30248.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30248.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30248.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30248.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30248.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30248.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30248.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30248.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30248.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30248.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30248.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30248.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30248.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70df0]
>[ 30248.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70df0] width 1920 pitch 7680 (/4 1920)
>[ 30248.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc3970]
>[ 30248.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc3970] width 1920 pitch 7680 (/4 1920)
>[ 30248.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3340]
>[ 30248.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3340] width 1920 pitch 7680 (/4 1920)
>[ 30248.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4004d10]
>[ 30248.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4004d10] width 1920 pitch 7680 (/4 1920)
>[ 30248.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926d20]
>[ 30248.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926d20] width 1920 pitch 7680 (/4 1920)
>[ 30248.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3340]
>[ 30248.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3340] width 1920 pitch 7680 (/4 1920)
>[ 30248.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbcb10]
>[ 30248.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbcb10] width 1920 pitch 7680 (/4 1920)
>[ 30293.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4003380]
>[ 30293.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4003380] width 1920 pitch 7680 (/4 1920)
>[ 30308.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bfc0]
>[ 30308.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bfc0] width 1920 pitch 7680 (/4 1920)
>[ 30338.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30338.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30347.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6f930]
>[ 30347.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6f930] width 1920 pitch 7680 (/4 1920)
>[ 30347.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a2e0]
>[ 30347.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a2e0] width 1920 pitch 7680 (/4 1920)
>[ 30347.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2541320]
>[ 30347.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2541320] width 1920 pitch 7680 (/4 1920)
>[ 30361.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30361.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30361.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30361.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30361.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30361.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30361.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30361.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30361.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30361.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30361.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4fd10]
>[ 30361.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4fd10] width 1920 pitch 7680 (/4 1920)
>[ 30361.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4fd10]
>[ 30361.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4fd10] width 1920 pitch 7680 (/4 1920)
>[ 30361.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30361.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30361.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253bd80]
>[ 30361.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253bd80] width 1920 pitch 7680 (/4 1920)
>[ 30361.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30361.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30362.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30362.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30362.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30362.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30362.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5be80]
>[ 30362.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5be80] width 1920 pitch 7680 (/4 1920)
>[ 30362.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30362.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30362.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5be80]
>[ 30362.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5be80] width 1920 pitch 7680 (/4 1920)
>[ 30362.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30362.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30362.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30362.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30362.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30362.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30362.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30363.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30363.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30363.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30363.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30363.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30363.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30363.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30363.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30363.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30363.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30363.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30363.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30363.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30363.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30363.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30365.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c520]
>[ 30365.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c520] width 1920 pitch 7680 (/4 1920)
>[ 30365.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e837c0]
>[ 30365.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e837c0] width 1920 pitch 7680 (/4 1920)
>[ 30365.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e837a0]
>[ 30365.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e837a0] width 1920 pitch 7680 (/4 1920)
>[ 30367.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83a80]
>[ 30367.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83a80] width 1920 pitch 7680 (/4 1920)
>[ 30383.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83a80]
>[ 30383.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83a80] width 1920 pitch 7680 (/4 1920)
>[ 30397.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b7e0]
>[ 30397.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b7e0] width 1920 pitch 7680 (/4 1920)
>[ 30397.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c46f80]
>[ 30397.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c46f80] width 1920 pitch 7680 (/4 1920)
>[ 30397.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b7e0]
>[ 30397.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b7e0] width 1920 pitch 7680 (/4 1920)
>[ 30397.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76c50]
>[ 30398.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76c50] width 1920 pitch 7680 (/4 1920)
>[ 30398.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b7e0]
>[ 30398.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b7e0] width 1920 pitch 7680 (/4 1920)
>[ 30398.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76c50]
>[ 30398.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76c50] width 1920 pitch 7680 (/4 1920)
>[ 30398.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b7e0]
>[ 30398.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b7e0] width 1920 pitch 7680 (/4 1920)
>[ 30398.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76c50]
>[ 30398.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76c50] width 1920 pitch 7680 (/4 1920)
>[ 30398.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b7e0]
>[ 30398.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b7e0] width 1920 pitch 7680 (/4 1920)
>[ 30398.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5d6d0]
>[ 30398.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5d6d0] width 1920 pitch 7680 (/4 1920)
>[ 30398.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46860]
>[ 30398.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46860] width 1920 pitch 7680 (/4 1920)
>[ 30398.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5d6d0]
>[ 30398.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5d6d0] width 1920 pitch 7680 (/4 1920)
>[ 30398.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46860]
>[ 30398.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46860] width 1920 pitch 7680 (/4 1920)
>[ 30398.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5d6d0]
>[ 30398.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5d6d0] width 1920 pitch 7680 (/4 1920)
>[ 30398.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46860]
>[ 30398.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46860] width 1920 pitch 7680 (/4 1920)
>[ 30398.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84040]
>[ 30398.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84040] width 1920 pitch 7680 (/4 1920)
>[ 30398.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46860]
>[ 30398.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46860] width 1920 pitch 7680 (/4 1920)
>[ 30398.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84040]
>[ 30398.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84040] width 1920 pitch 7680 (/4 1920)
>[ 30400.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542d30]
>[ 30400.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542d30] width 1920 pitch 7680 (/4 1920)
>[ 30400.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5be80]
>[ 30400.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5be80] width 1920 pitch 7680 (/4 1920)
>[ 30400.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30400.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30400.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fb10]
>[ 30400.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fb10] width 1920 pitch 7680 (/4 1920)
>[ 30400.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39545f0]
>[ 30400.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39545f0] width 1920 pitch 7680 (/4 1920)
>[ 30400.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30400.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30400.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39545f0]
>[ 30400.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39545f0] width 1920 pitch 7680 (/4 1920)
>[ 30400.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30400.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30400.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30400.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30400.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30400.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30400.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30400.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30400.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30400.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30400.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30400.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30400.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30400.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30400.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30400.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30400.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30400.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30400.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fb10]
>[ 30400.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fb10] width 1920 pitch 7680 (/4 1920)
>[ 30413.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30413.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30443.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30443.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30458.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30458.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30488.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76c50]
>[ 30488.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76c50] width 1920 pitch 7680 (/4 1920)
>[ 30518.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e22ff0]
>[ 30518.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e22ff0] width 1920 pitch 7680 (/4 1920)
>[ 30533.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39545f0]
>[ 30533.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39545f0] width 1920 pitch 7680 (/4 1920)
>[ 30548.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39545f0]
>[ 30548.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39545f0] width 1920 pitch 7680 (/4 1920)
>[ 30578.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[ 30578.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[ 30597.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2542a10]
>[ 30597.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2542a10] width 1920 pitch 7680 (/4 1920)
>[ 30598.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dae450]
>[ 30598.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dae450] width 1920 pitch 7680 (/4 1920)
>[ 30598.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30598.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30598.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbe260]
>[ 30598.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbe260] width 1920 pitch 7680 (/4 1920)
>[ 30608.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 30608.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 30623.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 30623.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 30638.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30638.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30653.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30653.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30698.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30698.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30713.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4810]
>[ 30713.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4810] width 1920 pitch 7680 (/4 1920)
>[ 30743.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b71890]
>[ 30743.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b71890] width 1920 pitch 7680 (/4 1920)
>[ 30758.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 30758.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 30818.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23729f0]
>[ 30818.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23729f0] width 1920 pitch 7680 (/4 1920)
>[ 30833.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372d80]
>[ 30833.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372d80] width 1920 pitch 7680 (/4 1920)
>[ 30863.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 30863.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 30893.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ab0]
>[ 30893.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ab0] width 1920 pitch 7680 (/4 1920)
>[ 30953.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ab0]
>[ 30953.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ab0] width 1920 pitch 7680 (/4 1920)
>[ 30968.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 30968.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 30983.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 30983.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 30998.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2372ab0]
>[ 30998.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2372ab0] width 1920 pitch 7680 (/4 1920)
>[ 31028.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5d160]
>[ 31028.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5d160] width 1920 pitch 7680 (/4 1920)
>[ 31043.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31043.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31058.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31058.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31088.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31088.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31103.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4d730]
>[ 31103.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4d730] width 1920 pitch 7680 (/4 1920)
>[ 31133.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31133.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31148.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31148.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31163.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31163.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31178.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b61590]
>[ 31178.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b61590] width 1920 pitch 7680 (/4 1920)
>[ 31200.069] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 31200.069] (II) RADEON(0): Using hsync ranges from config file
>[ 31200.069] (II) RADEON(0): Using vrefresh ranges from config file
>[ 31200.069] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 31200.069] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 31200.069] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 31200.069] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 31208.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efe30]
>[ 31208.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efe30] width 1920 pitch 7680 (/4 1920)
>[ 31290.671] (II) RADEON(0): RADEONSaveScreen(2)
>[ 31290.671] (II) RADEON(0): RADEONSaveScreen(0)
>[ 31774.135] (II) RADEON(0): RADEONSaveScreen(1)
>[ 31779.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e46760]
>[ 31779.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e46760] width 1920 pitch 7680 (/4 1920)
>[ 31779.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e405c0]
>[ 31780.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e405c0] width 1920 pitch 7680 (/4 1920)
>[ 31780.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73320]
>[ 31780.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73320] width 1920 pitch 7680 (/4 1920)
>[ 31780.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73320]
>[ 31780.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73320] width 1920 pitch 7680 (/4 1920)
>[ 31780.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73320]
>[ 31780.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73320] width 1920 pitch 7680 (/4 1920)
>[ 31780.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4fd00]
>[ 31780.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4fd00] width 1920 pitch 7680 (/4 1920)
>[ 31780.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e326c0]
>[ 31780.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e326c0] width 1920 pitch 7680 (/4 1920)
>[ 31780.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e326c0]
>[ 31780.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e326c0] width 1920 pitch 7680 (/4 1920)
>[ 31780.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31780.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31780.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31780.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31780.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31780.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31780.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31781.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31781.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31781.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31781.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31784.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e805d0]
>[ 31784.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e805d0] width 1920 pitch 7680 (/4 1920)
>[ 31784.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31784.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31785.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31785.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31785.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31785.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31786.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31786.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31786.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f600]
>[ 31786.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f600] width 1920 pitch 7680 (/4 1920)
>[ 31791.412] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 31791.412] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 31791.412] (II) UnloadModule: "evdev"
>[ 31804.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31804.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31819.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31819.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31834.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392c810]
>[ 31834.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392c810] width 1920 pitch 7680 (/4 1920)
>[ 31894.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3890]
>[ 31894.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3890] width 1920 pitch 7680 (/4 1920)
>[ 31909.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce72b0]
>[ 31909.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce72b0] width 1920 pitch 7680 (/4 1920)
>[ 31924.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded150]
>[ 31924.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded150] width 1920 pitch 7680 (/4 1920)
>[ 31939.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4008460]
>[ 31939.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4008460] width 1920 pitch 7680 (/4 1920)
>[ 31954.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded150]
>[ 31954.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded150] width 1920 pitch 7680 (/4 1920)
>[ 31999.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3890]
>[ 31999.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3890] width 1920 pitch 7680 (/4 1920)
>[ 32014.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df9440]
>[ 32014.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df9440] width 1920 pitch 7680 (/4 1920)
>[ 32044.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a580]
>[ 32044.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a580] width 1920 pitch 7680 (/4 1920)
>[ 32059.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df9440]
>[ 32059.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df9440] width 1920 pitch 7680 (/4 1920)
>[ 32074.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30acfc0]
>[ 32074.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30acfc0] width 1920 pitch 7680 (/4 1920)
>[ 32104.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded150]
>[ 32104.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded150] width 1920 pitch 7680 (/4 1920)
>[ 32119.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30acfc0]
>[ 32119.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30acfc0] width 1920 pitch 7680 (/4 1920)
>[ 32134.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30acfc0]
>[ 32134.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30acfc0] width 1920 pitch 7680 (/4 1920)
>[ 32149.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded150]
>[ 32149.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded150] width 1920 pitch 7680 (/4 1920)
>[ 32164.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30acfc0]
>[ 32164.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30acfc0] width 1920 pitch 7680 (/4 1920)
>[ 32194.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469050]
>[ 32194.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469050] width 1920 pitch 7680 (/4 1920)
>[ 32239.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30acfc0]
>[ 32239.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30acfc0] width 1920 pitch 7680 (/4 1920)
>[ 32254.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded150]
>[ 32254.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded150] width 1920 pitch 7680 (/4 1920)
>[ 32269.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c690]
>[ 32269.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c690] width 1920 pitch 7680 (/4 1920)
>[ 32284.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30acfc0]
>[ 32284.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30acfc0] width 1920 pitch 7680 (/4 1920)
>[ 32299.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469050]
>[ 32299.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469050] width 1920 pitch 7680 (/4 1920)
>[ 32314.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c690]
>[ 32314.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c690] width 1920 pitch 7680 (/4 1920)
>[ 32329.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c690]
>[ 32329.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c690] width 1920 pitch 7680 (/4 1920)
>[ 32344.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469050]
>[ 32344.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469050] width 1920 pitch 7680 (/4 1920)
>[ 32359.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c690]
>[ 32359.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c690] width 1920 pitch 7680 (/4 1920)
>[ 32374.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2469050]
>[ 32374.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2469050] width 1920 pitch 7680 (/4 1920)
>[ 32389.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c690]
>[ 32389.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c690] width 1920 pitch 7680 (/4 1920)
>[ 32391.009] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 32391.009] (II) RADEON(0): Using hsync ranges from config file
>[ 32391.009] (II) RADEON(0): Using vrefresh ranges from config file
>[ 32391.009] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 32391.009] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 32391.009] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 32391.009] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 32481.662] (II) RADEON(0): RADEONSaveScreen(2)
>[ 32481.662] (II) RADEON(0): RADEONSaveScreen(0)
>[ 38155.894] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 38155.894] (II) No input driver specified, ignoring this device.
>[ 38155.894] (II) This device may have been added with another device file.
>[ 38155.894] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 38155.894] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 38155.894] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 38155.894] 	Option "XkbRules" "evdev"
>[ 38155.894] 	Option "XkbModel" "evdev"
>[ 38155.894] 	Option "XkbLayout" "us"
>[ 38155.894] 	Option "_source" "server/udev"
>[ 38155.894] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 38155.894] 	Option "path" "/dev/input/event14"
>[ 38155.894] 	Option "device" "/dev/input/event14"
>[ 38155.894] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input28/event14"
>[ 38155.894] 	Option "driver" "evdev"
>[ 38155.894] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 38155.895] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 38155.897] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 38155.897] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 38155.897] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 38155.897] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 38155.897] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 38155.897] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 38155.897] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 38155.897] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 38155.897] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 38155.897] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input28/event14"
>[ 38155.897] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 38155.897] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 38155.897] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 38155.897] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 38155.897] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 38155.897] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 38155.906] (II) RADEON(0): RADEONSaveScreen(1)
>[ 38156.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38156.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38161.656] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 38161.656] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 38161.656] (II) UnloadModule: "evdev"
>[ 38261.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38261.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38291.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38291.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38306.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38306.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38336.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38336.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38396.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38396.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38411.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38411.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38456.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38456.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38486.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38486.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38501.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38501.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38516.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38516.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38531.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38531.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38591.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38591.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38608.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38608.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11610]
>[ 38608.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11610] width 1920 pitch 7680 (/4 1920)
>[ 38608.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38608.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38612.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38612.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38612.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38612.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38636.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38636.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38651.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38651.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38666.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38666.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38681.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38681.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38696.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a870]
>[ 38696.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a870] width 1920 pitch 7680 (/4 1920)
>[ 38711.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11d00]
>[ 38711.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11d00] width 1920 pitch 7680 (/4 1920)
>[ 38761.634] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 38761.634] (II) RADEON(0): Using hsync ranges from config file
>[ 38761.634] (II) RADEON(0): Using vrefresh ranges from config file
>[ 38761.634] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 38761.634] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 38761.634] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 38761.634] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 38851.655] (II) RADEON(0): RADEONSaveScreen(2)
>[ 38851.655] (II) RADEON(0): RADEONSaveScreen(0)
>[ 39331.570] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 39331.570] (II) No input driver specified, ignoring this device.
>[ 39331.570] (II) This device may have been added with another device file.
>[ 39331.571] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 39331.571] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 39331.571] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 39331.571] 	Option "XkbRules" "evdev"
>[ 39331.571] 	Option "XkbModel" "evdev"
>[ 39331.571] 	Option "XkbLayout" "us"
>[ 39331.571] 	Option "_source" "server/udev"
>[ 39331.571] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 39331.571] 	Option "path" "/dev/input/event14"
>[ 39331.571] 	Option "device" "/dev/input/event14"
>[ 39331.571] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input29/event14"
>[ 39331.571] 	Option "driver" "evdev"
>[ 39331.571] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 39331.571] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 39331.575] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 39331.575] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 39331.575] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 39331.575] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 39331.575] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 39331.575] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 39331.575] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 39331.575] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 39331.575] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 39331.575] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input29/event14"
>[ 39331.575] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 39331.575] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 39331.575] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 39331.575] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 39331.575] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 39331.575] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 39331.583] (II) RADEON(0): RADEONSaveScreen(1)
>[ 39331.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39331.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39331.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39331.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39331.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39331.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39331.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39331.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39331.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39331.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39331.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39331.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39331.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39331.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39331.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39331.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39332.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39332.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39332.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39332.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39332.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39332.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39332.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39332.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39332.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39332.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39332.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a880]
>[ 39332.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a880] width 1920 pitch 7680 (/4 1920)
>[ 39334.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39334.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39334.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39334.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39335.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39335.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39335.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39335.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39336.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39336.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39336.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39336.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39337.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39337.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39337.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39337.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39337.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39337.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39337.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39337.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39337.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39337.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98620]
>[ 39337.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98620] width 1920 pitch 7680 (/4 1920)
>[ 39337.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39337.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39337.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39337.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39337.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39337.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39337.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39337.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39337.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39337.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39337.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39338.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39338.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39338.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39338.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39338.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39338.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39338.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39338.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39338.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39338.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39338.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39338.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39338.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39338.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c748b0]
>[ 39338.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c748b0] width 1920 pitch 7680 (/4 1920)
>[ 39338.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dc00]
>[ 39338.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dc00] width 1920 pitch 7680 (/4 1920)
>[ 39338.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5b30]
>[ 39338.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5b30] width 1920 pitch 7680 (/4 1920)
>[ 39341.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39341.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39341.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39341.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39341.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39341.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39341.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39341.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39341.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39341.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39341.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39341.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39341.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[ 39341.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[ 39341.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39341.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39341.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc7b0]
>[ 39342.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc7b0] width 1920 pitch 7680 (/4 1920)
>[ 39342.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39342.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39342.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc7b0]
>[ 39342.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc7b0] width 1920 pitch 7680 (/4 1920)
>[ 39342.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea3cb0]
>[ 39342.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea3cb0] width 1920 pitch 7680 (/4 1920)
>[ 39342.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4be10]
>[ 39342.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4be10] width 1920 pitch 7680 (/4 1920)
>[ 39342.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25419d0]
>[ 39342.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25419d0] width 1920 pitch 7680 (/4 1920)
>[ 39342.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[ 39342.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[ 39342.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc7b0]
>[ 39342.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc7b0] width 1920 pitch 7680 (/4 1920)
>[ 39342.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[ 39342.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[ 39342.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc7b0]
>[ 39342.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc7b0] width 1920 pitch 7680 (/4 1920)
>[ 39342.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[ 39342.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[ 39342.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[ 39342.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[ 39342.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[ 39342.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[ 39342.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25419d0]
>[ 39342.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25419d0] width 1920 pitch 7680 (/4 1920)
>[ 39342.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25419d0]
>[ 39342.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25419d0] width 1920 pitch 7680 (/4 1920)
>[ 39342.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5ab0]
>[ 39342.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5ab0] width 1920 pitch 7680 (/4 1920)
>[ 39342.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25419d0]
>[ 39342.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25419d0] width 1920 pitch 7680 (/4 1920)
>[ 39348.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32820]
>[ 39348.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32820] width 1920 pitch 7680 (/4 1920)
>[ 39348.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c456f0]
>[ 39348.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c456f0] width 1920 pitch 7680 (/4 1920)
>[ 39348.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d1c0]
>[ 39348.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d1c0] width 1920 pitch 7680 (/4 1920)
>[ 39348.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34740]
>[ 39348.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34740] width 1920 pitch 7680 (/4 1920)
>[ 39348.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8d1c0]
>[ 39348.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8d1c0] width 1920 pitch 7680 (/4 1920)
>[ 39348.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34740]
>[ 39348.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34740] width 1920 pitch 7680 (/4 1920)
>[ 39348.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32820]
>[ 39348.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32820] width 1920 pitch 7680 (/4 1920)
>[ 39348.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34740]
>[ 39348.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34740] width 1920 pitch 7680 (/4 1920)
>[ 39348.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32820]
>[ 39348.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32820] width 1920 pitch 7680 (/4 1920)
>[ 39348.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d37990]
>[ 39348.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d37990] width 1920 pitch 7680 (/4 1920)
>[ 39348.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32820]
>[ 39348.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32820] width 1920 pitch 7680 (/4 1920)
>[ 39348.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d37990]
>[ 39348.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d37990] width 1920 pitch 7680 (/4 1920)
>[ 39348.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32820]
>[ 39348.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32820] width 1920 pitch 7680 (/4 1920)
>[ 39348.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d37990]
>[ 39348.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d37990] width 1920 pitch 7680 (/4 1920)
>[ 39349.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34cc0]
>[ 39349.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34cc0] width 1920 pitch 7680 (/4 1920)
>[ 39349.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d33400]
>[ 39349.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d33400] width 1920 pitch 7680 (/4 1920)
>[ 39349.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1c160]
>[ 39349.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1c160] width 1920 pitch 7680 (/4 1920)
>[ 39349.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7770]
>[ 39349.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7770] width 1920 pitch 7680 (/4 1920)
>[ 39349.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7770]
>[ 39349.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7770] width 1920 pitch 7680 (/4 1920)
>[ 39349.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34740]
>[ 39349.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34740] width 1920 pitch 7680 (/4 1920)
>[ 39349.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffe990]
>[ 39349.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffe990] width 1920 pitch 7680 (/4 1920)
>[ 39349.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f11960]
>[ 39349.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f11960] width 1920 pitch 7680 (/4 1920)
>[ 39349.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34740]
>[ 39349.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34740] width 1920 pitch 7680 (/4 1920)
>[ 39349.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc16a0]
>[ 39349.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc16a0] width 1920 pitch 7680 (/4 1920)
>[ 39349.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1c740]
>[ 39349.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1c740] width 1920 pitch 7680 (/4 1920)
>[ 39357.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 39357.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 39445.734] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 39445.734] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 39445.734] (II) UnloadModule: "evdev"
>[ 39466.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556590]
>[ 39466.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556590] width 1920 pitch 7680 (/4 1920)
>[ 39509.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d33580]
>[ 39509.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d33580] width 1920 pitch 7680 (/4 1920)
>[ 39509.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1e330]
>[ 39509.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1e330] width 1920 pitch 7680 (/4 1920)
>[ 39509.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2ce10]
>[ 39509.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2ce10] width 1920 pitch 7680 (/4 1920)
>[ 39509.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 39509.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 39509.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2efd0]
>[ 39509.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2efd0] width 1920 pitch 7680 (/4 1920)
>[ 39509.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 39509.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 39509.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39655a0]
>[ 39509.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39655a0] width 1920 pitch 7680 (/4 1920)
>[ 39509.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 39509.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 39509.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39655a0]
>[ 39509.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39655a0] width 1920 pitch 7680 (/4 1920)
>[ 39509.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 39509.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 39509.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39655a0]
>[ 39509.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39655a0] width 1920 pitch 7680 (/4 1920)
>[ 39509.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1e330]
>[ 39509.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1e330] width 1920 pitch 7680 (/4 1920)
>[ 39511.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2efd0]
>[ 39511.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2efd0] width 1920 pitch 7680 (/4 1920)
>[ 39556.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2efd0]
>[ 39556.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2efd0] width 1920 pitch 7680 (/4 1920)
>[ 39586.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1e330]
>[ 39586.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1e330] width 1920 pitch 7680 (/4 1920)
>[ 39631.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d33580]
>[ 39631.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d33580] width 1920 pitch 7680 (/4 1920)
>[ 39646.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39655a0]
>[ 39646.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39655a0] width 1920 pitch 7680 (/4 1920)
>[ 39661.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1e330]
>[ 39661.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1e330] width 1920 pitch 7680 (/4 1920)
>[ 39676.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c50230]
>[ 39676.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c50230] width 1920 pitch 7680 (/4 1920)
>[ 39901.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c50230]
>[ 39901.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c50230] width 1920 pitch 7680 (/4 1920)
>[ 39916.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 39916.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 39991.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c50230]
>[ 39991.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c50230] width 1920 pitch 7680 (/4 1920)
>[ 40006.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7ea60]
>[ 40006.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7ea60] width 1920 pitch 7680 (/4 1920)
>[ 40045.341] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 40045.341] (II) RADEON(0): Using hsync ranges from config file
>[ 40045.341] (II) RADEON(0): Using vrefresh ranges from config file
>[ 40045.341] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 40045.341] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 40045.341] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 40045.341] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 40135.673] (II) RADEON(0): RADEONSaveScreen(2)
>[ 40135.673] (II) RADEON(0): RADEONSaveScreen(0)
>[ 46233.255] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 46233.255] (II) No input driver specified, ignoring this device.
>[ 46233.255] (II) This device may have been added with another device file.
>[ 46233.255] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 46233.255] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 46233.255] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 46233.255] 	Option "XkbRules" "evdev"
>[ 46233.255] 	Option "XkbModel" "evdev"
>[ 46233.255] 	Option "XkbLayout" "us"
>[ 46233.255] 	Option "_source" "server/udev"
>[ 46233.255] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 46233.255] 	Option "path" "/dev/input/event14"
>[ 46233.255] 	Option "device" "/dev/input/event14"
>[ 46233.255] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input30/event14"
>[ 46233.255] 	Option "driver" "evdev"
>[ 46233.255] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 46233.255] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 46233.255] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 46233.255] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 46233.255] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 46233.255] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 46233.255] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 46233.255] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 46233.255] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 46233.255] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 46233.255] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 46233.255] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input30/event14"
>[ 46233.255] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 46233.256] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 46233.256] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 46233.256] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 46233.256] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 46233.256] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 46233.274] (II) RADEON(0): RADEONSaveScreen(1)
>[ 46236.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46236.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46258.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a830]
>[ 46258.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a830] width 1920 pitch 7680 (/4 1920)
>[ 46266.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f21060]
>[ 46266.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f21060] width 1920 pitch 7680 (/4 1920)
>[ 46266.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46266.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46266.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c980]
>[ 46266.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c980] width 1920 pitch 7680 (/4 1920)
>[ 46266.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46266.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46266.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58050]
>[ 46266.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58050] width 1920 pitch 7680 (/4 1920)
>[ 46353.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d323a0]
>[ 46353.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d323a0] width 1920 pitch 7680 (/4 1920)
>[ 46365.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46365.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46365.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46365.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46365.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46365.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46365.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46365.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46365.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46365.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46365.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46365.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46365.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46365.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46365.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46365.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46365.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46365.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46365.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46365.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46365.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46365.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46366.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46366.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46367.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46367.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46368.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46368.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46368.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46368.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46368.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46368.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46368.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46368.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46368.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46368.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46368.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 46368.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 46371.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46371.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46371.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46371.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46371.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a890]
>[ 46371.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a890] width 1920 pitch 7680 (/4 1920)
>[ 46371.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46371.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46371.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a890]
>[ 46371.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a890] width 1920 pitch 7680 (/4 1920)
>[ 46371.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f208b0]
>[ 46371.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f208b0] width 1920 pitch 7680 (/4 1920)
>[ 46371.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a890]
>[ 46371.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a890] width 1920 pitch 7680 (/4 1920)
>[ 46371.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f569c0]
>[ 46371.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f569c0] width 1920 pitch 7680 (/4 1920)
>[ 46371.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f23400]
>[ 46371.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f23400] width 1920 pitch 7680 (/4 1920)
>[ 46371.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5ab0]
>[ 46371.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5ab0] width 1920 pitch 7680 (/4 1920)
>[ 46371.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4b900]
>[ 46371.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4b900] width 1920 pitch 7680 (/4 1920)
>[ 46383.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf55a0]
>[ 46383.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf55a0] width 1920 pitch 7680 (/4 1920)
>[ 46384.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf20c0]
>[ 46384.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf20c0] width 1920 pitch 7680 (/4 1920)
>[ 46384.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3dc0]
>[ 46384.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3dc0] width 1920 pitch 7680 (/4 1920)
>[ 46384.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd7790]
>[ 46384.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd7790] width 1920 pitch 7680 (/4 1920)
>[ 46384.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3dc0]
>[ 46384.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3dc0] width 1920 pitch 7680 (/4 1920)
>[ 46384.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3dc0]
>[ 46384.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3dc0] width 1920 pitch 7680 (/4 1920)
>[ 46384.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8e70]
>[ 46384.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8e70] width 1920 pitch 7680 (/4 1920)
>[ 46384.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3dc0]
>[ 46384.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3dc0] width 1920 pitch 7680 (/4 1920)
>[ 46384.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3dc0]
>[ 46384.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3dc0] width 1920 pitch 7680 (/4 1920)
>[ 46384.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fe0]
>[ 46384.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fe0] width 1920 pitch 7680 (/4 1920)
>[ 46384.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3dc0]
>[ 46384.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3dc0] width 1920 pitch 7680 (/4 1920)
>[ 46384.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af3fe0]
>[ 46384.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af3fe0] width 1920 pitch 7680 (/4 1920)
>[ 46394.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced4f0]
>[ 46394.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced4f0] width 1920 pitch 7680 (/4 1920)
>[ 46394.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43930]
>[ 46394.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43930] width 1920 pitch 7680 (/4 1920)
>[ 46394.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f569c0]
>[ 46394.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f569c0] width 1920 pitch 7680 (/4 1920)
>[ 46394.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43930]
>[ 46394.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43930] width 1920 pitch 7680 (/4 1920)
>[ 46394.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f569c0]
>[ 46394.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f569c0] width 1920 pitch 7680 (/4 1920)
>[ 46394.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43930]
>[ 46394.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43930] width 1920 pitch 7680 (/4 1920)
>[ 46394.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f569c0]
>[ 46394.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f569c0] width 1920 pitch 7680 (/4 1920)
>[ 46394.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce8370]
>[ 46394.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce8370] width 1920 pitch 7680 (/4 1920)
>[ 46394.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f569c0]
>[ 46394.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f569c0] width 1920 pitch 7680 (/4 1920)
>[ 46394.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3c860]
>[ 46394.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3c860] width 1920 pitch 7680 (/4 1920)
>[ 46394.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f569c0]
>[ 46394.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f569c0] width 1920 pitch 7680 (/4 1920)
>[ 46394.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[ 46394.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[ 46398.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ece0]
>[ 46398.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ece0] width 1920 pitch 7680 (/4 1920)
>[ 46422.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46422.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46422.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a9e0]
>[ 46422.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a9e0] width 1920 pitch 7680 (/4 1920)
>[ 46422.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46422.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46422.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a9e0]
>[ 46422.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a9e0] width 1920 pitch 7680 (/4 1920)
>[ 46422.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46422.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46422.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a9e0]
>[ 46422.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a9e0] width 1920 pitch 7680 (/4 1920)
>[ 46422.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46422.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46422.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a9e0]
>[ 46422.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a9e0] width 1920 pitch 7680 (/4 1920)
>[ 46422.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46422.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46423.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a9e0]
>[ 46423.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a9e0] width 1920 pitch 7680 (/4 1920)
>[ 46423.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b60]
>[ 46423.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b60] width 1920 pitch 7680 (/4 1920)
>[ 46423.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e560]
>[ 46423.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e560] width 1920 pitch 7680 (/4 1920)
>[ 46424.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b60]
>[ 46424.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b60] width 1920 pitch 7680 (/4 1920)
>[ 46424.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e560]
>[ 46424.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e560] width 1920 pitch 7680 (/4 1920)
>[ 46425.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b60]
>[ 46425.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b60] width 1920 pitch 7680 (/4 1920)
>[ 46425.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46425.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46425.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46425.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46425.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46425.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46425.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46425.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46425.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46425.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46425.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46425.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46425.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46425.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46425.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af0ee0]
>[ 46425.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af0ee0] width 1920 pitch 7680 (/4 1920)
>[ 46428.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05560]
>[ 46428.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05560] width 1920 pitch 7680 (/4 1920)
>[ 46429.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19e20]
>[ 46429.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19e20] width 1920 pitch 7680 (/4 1920)
>[ 46429.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398d2f0]
>[ 46429.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398d2f0] width 1920 pitch 7680 (/4 1920)
>[ 46446.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06c90]
>[ 46446.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06c90] width 1920 pitch 7680 (/4 1920)
>[ 46446.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46446.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46446.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06c90]
>[ 46446.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06c90] width 1920 pitch 7680 (/4 1920)
>[ 46446.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46446.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46446.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06c90]
>[ 46446.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06c90] width 1920 pitch 7680 (/4 1920)
>[ 46446.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46446.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46446.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06c90]
>[ 46446.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06c90] width 1920 pitch 7680 (/4 1920)
>[ 46446.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46446.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46446.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3db60]
>[ 46446.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3db60] width 1920 pitch 7680 (/4 1920)
>[ 46446.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15050]
>[ 46446.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15050] width 1920 pitch 7680 (/4 1920)
>[ 46446.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f42e50]
>[ 46446.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f42e50] width 1920 pitch 7680 (/4 1920)
>[ 46446.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46447.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46447.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f42e50]
>[ 46447.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f42e50] width 1920 pitch 7680 (/4 1920)
>[ 46447.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46447.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46447.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f42e50]
>[ 46447.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f42e50] width 1920 pitch 7680 (/4 1920)
>[ 46447.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e190]
>[ 46447.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e190] width 1920 pitch 7680 (/4 1920)
>[ 46447.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f42e50]
>[ 46447.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f42e50] width 1920 pitch 7680 (/4 1920)
>[ 46447.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf67f0]
>[ 46447.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf67f0] width 1920 pitch 7680 (/4 1920)
>[ 46447.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398cfd0]
>[ 46447.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398cfd0] width 1920 pitch 7680 (/4 1920)
>[ 46447.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398cfd0]
>[ 46447.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398cfd0] width 1920 pitch 7680 (/4 1920)
>[ 46447.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3c730]
>[ 46447.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3c730] width 1920 pitch 7680 (/4 1920)
>[ 46447.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46447.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46447.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e560]
>[ 46447.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e560] width 1920 pitch 7680 (/4 1920)
>[ 46447.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee5d0]
>[ 46447.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee5d0] width 1920 pitch 7680 (/4 1920)
>[ 46447.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a9e0]
>[ 46447.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a9e0] width 1920 pitch 7680 (/4 1920)
>[ 46447.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b960]
>[ 46447.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b960] width 1920 pitch 7680 (/4 1920)
>[ 46447.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3992980]
>[ 46447.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3992980] width 1920 pitch 7680 (/4 1920)
>[ 46569.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46569.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46569.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46569.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46569.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46569.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46569.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46569.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46569.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46569.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46569.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46569.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46569.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46569.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46569.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46569.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46569.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46569.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46569.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46569.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46608.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46608.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46623.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[ 46623.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[ 46638.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 46638.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 46641.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46641.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46641.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07e80]
>[ 46641.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07e80] width 1920 pitch 7680 (/4 1920)
>[ 46641.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46642.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46642.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0ee10]
>[ 46642.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0ee10] width 1920 pitch 7680 (/4 1920)
>[ 46642.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46642.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46642.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0ee10]
>[ 46642.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0ee10] width 1920 pitch 7680 (/4 1920)
>[ 46642.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46642.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46642.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0ee10]
>[ 46642.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0ee10] width 1920 pitch 7680 (/4 1920)
>[ 46642.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 46642.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 46642.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46642.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46642.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 46642.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 46642.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46642.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46642.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 46642.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 46642.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46642.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46643.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46643.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46644.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46644.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46644.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d19ef0]
>[ 46644.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d19ef0] width 1920 pitch 7680 (/4 1920)
>[ 46644.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0a2a0]
>[ 46644.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0a2a0] width 1920 pitch 7680 (/4 1920)
>[ 46648.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34cc0]
>[ 46648.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34cc0] width 1920 pitch 7680 (/4 1920)
>[ 46648.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33da0]
>[ 46648.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33da0] width 1920 pitch 7680 (/4 1920)
>[ 46648.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32830]
>[ 46648.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32830] width 1920 pitch 7680 (/4 1920)
>[ 46649.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 46649.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 46649.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d41410]
>[ 46649.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d41410] width 1920 pitch 7680 (/4 1920)
>[ 46649.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d41410]
>[ 46649.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d41410] width 1920 pitch 7680 (/4 1920)
>[ 46650.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d41410]
>[ 46650.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d41410] width 1920 pitch 7680 (/4 1920)
>[ 46650.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 46650.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 46650.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4550]
>[ 46650.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4550] width 1920 pitch 7680 (/4 1920)
>[ 46651.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 46651.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 46651.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 46651.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 46651.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 46651.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 46651.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06cd0]
>[ 46651.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06cd0] width 1920 pitch 7680 (/4 1920)
>[ 46651.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 46651.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 46653.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 46653.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 46654.111] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 46654.111] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 46654.111] (II) UnloadModule: "evdev"
>[ 46668.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 46668.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 46698.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 46698.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 46743.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 46743.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 46758.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 46758.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 46803.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 46803.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 46818.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 46818.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 46878.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 46878.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 46893.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 46893.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 46908.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 46908.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 46923.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 46923.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 47043.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 47043.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 47073.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 47073.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 47148.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 47148.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 47163.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a80]
>[ 47163.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a80] width 1920 pitch 7680 (/4 1920)
>[ 47193.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 47193.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 47208.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ce60]
>[ 47208.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ce60] width 1920 pitch 7680 (/4 1920)
>[ 47238.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9af00]
>[ 47238.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9af00] width 1920 pitch 7680 (/4 1920)
>[ 47253.692] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 47253.692] (II) RADEON(0): Using hsync ranges from config file
>[ 47253.692] (II) RADEON(0): Using vrefresh ranges from config file
>[ 47253.692] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 47253.692] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 47253.692] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 47253.692] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 47253.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 47253.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 47343.673] (II) RADEON(0): RADEONSaveScreen(2)
>[ 47343.673] (II) RADEON(0): RADEONSaveScreen(0)
>[ 82618.545] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 82618.545] (II) No input driver specified, ignoring this device.
>[ 82618.545] (II) This device may have been added with another device file.
>[ 82618.545] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 82618.545] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 82618.545] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 82618.545] 	Option "XkbRules" "evdev"
>[ 82618.545] 	Option "XkbModel" "evdev"
>[ 82618.545] 	Option "XkbLayout" "us"
>[ 82618.545] 	Option "_source" "server/udev"
>[ 82618.545] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 82618.545] 	Option "path" "/dev/input/event14"
>[ 82618.545] 	Option "device" "/dev/input/event14"
>[ 82618.545] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input31/event14"
>[ 82618.545] 	Option "driver" "evdev"
>[ 82618.545] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 82618.545] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 82618.551] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 82618.551] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 82618.551] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 82618.551] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 82618.551] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 82618.551] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 82618.551] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 82618.551] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 82618.551] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 82618.551] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input31/event14"
>[ 82618.551] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 82618.551] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 82618.551] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 82618.551] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 82618.551] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 82618.551] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 82625.388] (II) RADEON(0): RADEONSaveScreen(1)
>[ 82626.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39925f0]
>[ 82626.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39925f0] width 1920 pitch 7680 (/4 1920)
>[ 82630.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82630.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82630.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82630.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82630.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82630.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82630.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82630.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82630.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82630.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82630.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82630.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82630.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82630.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82630.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82630.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82630.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82630.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82630.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82630.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82630.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82630.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82631.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82631.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82631.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82631.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82631.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64020]
>[ 82631.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64020] width 1920 pitch 7680 (/4 1920)
>[ 82633.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82633.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82634.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82634.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82634.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39925f0]
>[ 82635.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39925f0] width 1920 pitch 7680 (/4 1920)
>[ 82635.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82635.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82635.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39925f0]
>[ 82635.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39925f0] width 1920 pitch 7680 (/4 1920)
>[ 82635.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82635.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82635.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39925f0]
>[ 82635.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39925f0] width 1920 pitch 7680 (/4 1920)
>[ 82635.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82635.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82635.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39925f0]
>[ 82635.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39925f0] width 1920 pitch 7680 (/4 1920)
>[ 82635.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82635.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82635.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39925f0]
>[ 82635.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39925f0] width 1920 pitch 7680 (/4 1920)
>[ 82640.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d31830]
>[ 82640.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d31830] width 1920 pitch 7680 (/4 1920)
>[ 82643.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82643.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82643.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a890]
>[ 82643.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a890] width 1920 pitch 7680 (/4 1920)
>[ 82643.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3cc0]
>[ 82643.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3cc0] width 1920 pitch 7680 (/4 1920)
>[ 82643.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a890]
>[ 82643.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a890] width 1920 pitch 7680 (/4 1920)
>[ 82643.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3cc0]
>[ 82643.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3cc0] width 1920 pitch 7680 (/4 1920)
>[ 82645.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82645.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82645.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82645.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82645.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82645.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82645.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82645.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82645.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82645.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82645.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56c50]
>[ 82645.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56c50] width 1920 pitch 7680 (/4 1920)
>[ 82645.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82645.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82645.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56c50]
>[ 82645.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56c50] width 1920 pitch 7680 (/4 1920)
>[ 82645.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82645.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82645.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56c50]
>[ 82645.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56c50] width 1920 pitch 7680 (/4 1920)
>[ 82646.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82646.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82646.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56c50]
>[ 82646.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56c50] width 1920 pitch 7680 (/4 1920)
>[ 82646.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82646.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82646.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56c50]
>[ 82646.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56c50] width 1920 pitch 7680 (/4 1920)
>[ 82646.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82646.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82648.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2cd90]
>[ 82648.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2cd90] width 1920 pitch 7680 (/4 1920)
>[ 82648.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[ 82648.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[ 82648.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82648.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82648.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82648.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82648.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0ca0]
>[ 82648.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0ca0] width 1920 pitch 7680 (/4 1920)
>[ 82648.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f386d0]
>[ 82648.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f386d0] width 1920 pitch 7680 (/4 1920)
>[ 82648.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38730]
>[ 82648.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38730] width 1920 pitch 7680 (/4 1920)
>[ 82648.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e835a0]
>[ 82648.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e835a0] width 1920 pitch 7680 (/4 1920)
>[ 82648.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0ca0]
>[ 82648.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0ca0] width 1920 pitch 7680 (/4 1920)
>[ 82648.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57ff0]
>[ 82648.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57ff0] width 1920 pitch 7680 (/4 1920)
>[ 82648.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0ca0]
>[ 82648.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0ca0] width 1920 pitch 7680 (/4 1920)
>[ 82648.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57ff0]
>[ 82648.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57ff0] width 1920 pitch 7680 (/4 1920)
>[ 82648.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0ca0]
>[ 82648.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0ca0] width 1920 pitch 7680 (/4 1920)
>[ 82648.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57ff0]
>[ 82648.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57ff0] width 1920 pitch 7680 (/4 1920)
>[ 82648.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0ca0]
>[ 82648.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0ca0] width 1920 pitch 7680 (/4 1920)
>[ 82648.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57ff0]
>[ 82648.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57ff0] width 1920 pitch 7680 (/4 1920)
>[ 82658.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55ef0]
>[ 82658.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55ef0] width 1920 pitch 7680 (/4 1920)
>[ 82658.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a900]
>[ 82658.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a900] width 1920 pitch 7680 (/4 1920)
>[ 82658.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55ef0]
>[ 82658.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55ef0] width 1920 pitch 7680 (/4 1920)
>[ 82658.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[ 82658.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[ 82658.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3cc0]
>[ 82658.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3cc0] width 1920 pitch 7680 (/4 1920)
>[ 82658.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6cb0]
>[ 82658.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6cb0] width 1920 pitch 7680 (/4 1920)
>[ 82658.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[ 82658.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[ 82658.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6cb0]
>[ 82658.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6cb0] width 1920 pitch 7680 (/4 1920)
>[ 82658.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[ 82658.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[ 82669.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b06830]
>[ 82669.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b06830] width 1920 pitch 7680 (/4 1920)
>[ 82669.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82669.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82669.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0b380]
>[ 82669.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0b380] width 1920 pitch 7680 (/4 1920)
>[ 82669.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82669.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82669.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56c50]
>[ 82669.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56c50] width 1920 pitch 7680 (/4 1920)
>[ 82670.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82670.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82670.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82670.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82670.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82670.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82670.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82670.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82670.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82670.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82670.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82670.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82670.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82670.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82670.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82670.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82670.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82670.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82670.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82670.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82671.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2c2b0]
>[ 82671.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2c2b0] width 1920 pitch 7680 (/4 1920)
>[ 82671.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b25ca0]
>[ 82671.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b25ca0] width 1920 pitch 7680 (/4 1920)
>[ 82671.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82671.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82672.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82672.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82672.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3c9e0]
>[ 82672.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 82674.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64020]
>[ 82674.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64020] width 1920 pitch 7680 (/4 1920)
>[ 82675.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07340]
>[ 82675.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07340] width 1920 pitch 7680 (/4 1920)
>[ 82675.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b07340]
>[ 82675.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b07340] width 1920 pitch 7680 (/4 1920)
>[ 82675.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32830]
>[ 82675.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32830] width 1920 pitch 7680 (/4 1920)
>[ 82675.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ec30]
>[ 82675.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ec30] width 1920 pitch 7680 (/4 1920)
>[ 82675.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34cc0]
>[ 82675.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34cc0] width 1920 pitch 7680 (/4 1920)
>[ 82675.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64020]
>[ 82675.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64020] width 1920 pitch 7680 (/4 1920)
>[ 82675.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d34cc0]
>[ 82675.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d34cc0] width 1920 pitch 7680 (/4 1920)
>[ 82675.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64020]
>[ 82675.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64020] width 1920 pitch 7680 (/4 1920)
>[ 82675.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64020]
>[ 82675.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64020] width 1920 pitch 7680 (/4 1920)
>[ 82685.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d32830]
>[ 82685.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d32830] width 1920 pitch 7680 (/4 1920)
>[ 82697.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43880]
>[ 82697.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43880] width 1920 pitch 7680 (/4 1920)
>[ 82697.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82697.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82697.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991d80]
>[ 82697.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991d80] width 1920 pitch 7680 (/4 1920)
>[ 82697.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82697.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82697.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991d80]
>[ 82697.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991d80] width 1920 pitch 7680 (/4 1920)
>[ 82697.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82697.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82697.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991d80]
>[ 82697.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991d80] width 1920 pitch 7680 (/4 1920)
>[ 82697.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b7a0]
>[ 82697.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b7a0] width 1920 pitch 7680 (/4 1920)
>[ 82697.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82697.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82697.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3b7a0]
>[ 82697.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3b7a0] width 1920 pitch 7680 (/4 1920)
>[ 82697.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82697.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82697.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82697.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82697.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7800]
>[ 82697.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7800] width 1920 pitch 7680 (/4 1920)
>[ 82698.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b70]
>[ 82698.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b70] width 1920 pitch 7680 (/4 1920)
>[ 82698.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82698.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82698.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b70]
>[ 82698.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b70] width 1920 pitch 7680 (/4 1920)
>[ 82698.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82698.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82698.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b70]
>[ 82698.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b70] width 1920 pitch 7680 (/4 1920)
>[ 82698.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82698.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82698.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b70]
>[ 82698.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b70] width 1920 pitch 7680 (/4 1920)
>[ 82698.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82698.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82698.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b70]
>[ 82698.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b70] width 1920 pitch 7680 (/4 1920)
>[ 82698.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82698.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82699.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b70]
>[ 82699.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b70] width 1920 pitch 7680 (/4 1920)
>[ 82699.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82699.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82699.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03b10]
>[ 82699.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03b10] width 1920 pitch 7680 (/4 1920)
>[ 82699.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82699.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82699.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee520]
>[ 82699.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee520] width 1920 pitch 7680 (/4 1920)
>[ 82699.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82699.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82699.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee520]
>[ 82699.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee520] width 1920 pitch 7680 (/4 1920)
>[ 82699.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82699.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82699.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee520]
>[ 82699.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee520] width 1920 pitch 7680 (/4 1920)
>[ 82699.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ada0]
>[ 82699.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ada0] width 1920 pitch 7680 (/4 1920)
>[ 82699.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee520]
>[ 82699.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee520] width 1920 pitch 7680 (/4 1920)
>[ 82699.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000240]
>[ 82699.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000240] width 1920 pitch 7680 (/4 1920)
>[ 82703.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f110]
>[ 82703.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f110] width 1920 pitch 7680 (/4 1920)
>[ 82714.655] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 82714.655] (II) RADEON(0): Using hsync ranges from config file
>[ 82714.655] (II) RADEON(0): Using vrefresh ranges from config file
>[ 82714.655] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 82714.655] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 82714.655] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 82714.655] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 82714.701] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 82714.701] (II) RADEON(0): Using hsync ranges from config file
>[ 82714.701] (II) RADEON(0): Using vrefresh ranges from config file
>[ 82714.701] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 82714.701] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 82714.701] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 82714.701] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 82714.749] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 82714.749] (II) RADEON(0): Using hsync ranges from config file
>[ 82714.749] (II) RADEON(0): Using vrefresh ranges from config file
>[ 82714.749] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 82714.749] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 82714.749] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 82714.749] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 82715.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b62720]
>[ 82715.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b62720] width 1920 pitch 7680 (/4 1920)
>[ 82723.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 82723.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 82730.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 82730.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 82745.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 82745.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 82835.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 82835.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 82865.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 82865.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 82880.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 82880.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 82895.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 82895.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 82910.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 82910.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 82940.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 82940.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 82985.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 82985.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 83000.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83000.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83195.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83195.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83210.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83210.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83225.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83225.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83240.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83240.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83285.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83285.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83300.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83300.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83345.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83345.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83360.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83360.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83375.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83375.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83405.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83405.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83465.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83465.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83525.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40073f0]
>[ 83525.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40073f0] width 1920 pitch 7680 (/4 1920)
>[ 83540.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83540.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83570.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 83570.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 83585.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 83585.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 83600.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 83600.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 83615.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 83615.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 83630.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24bb0]
>[ 83630.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24bb0] width 1920 pitch 7680 (/4 1920)
>[ 83645.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24bb0]
>[ 83645.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24bb0] width 1920 pitch 7680 (/4 1920)
>[ 83675.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39152a0]
>[ 83675.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39152a0] width 1920 pitch 7680 (/4 1920)
>[ 83750.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39152a0]
>[ 83750.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39152a0] width 1920 pitch 7680 (/4 1920)
>[ 83855.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 83855.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 83900.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39152a0]
>[ 83900.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39152a0] width 1920 pitch 7680 (/4 1920)
>[ 83930.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24b30]
>[ 83930.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24b30] width 1920 pitch 7680 (/4 1920)
>[ 83945.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24b30]
>[ 83945.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24b30] width 1920 pitch 7680 (/4 1920)
>[ 83975.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39152a0]
>[ 83975.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39152a0] width 1920 pitch 7680 (/4 1920)
>[ 84005.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39152a0]
>[ 84005.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39152a0] width 1920 pitch 7680 (/4 1920)
>[ 84035.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 84035.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 84050.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a10]
>[ 84050.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a10] width 1920 pitch 7680 (/4 1920)
>[ 84170.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46100]
>[ 84170.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46100] width 1920 pitch 7680 (/4 1920)
>[ 84200.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46100]
>[ 84200.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46100] width 1920 pitch 7680 (/4 1920)
>[ 84440.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 84440.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 84470.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 84470.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 84530.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 84530.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 84560.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 84560.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 84605.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 84605.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 84620.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 84620.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 84710.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 84710.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 84785.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46100]
>[ 84785.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46100] width 1920 pitch 7680 (/4 1920)
>[ 84800.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 84800.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 84815.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 84815.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 84935.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059f0]
>[ 84935.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059f0] width 1920 pitch 7680 (/4 1920)
>[ 84950.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 84950.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 84965.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e290c0]
>[ 84965.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e290c0] width 1920 pitch 7680 (/4 1920)
>[ 84980.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b62720]
>[ 84980.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b62720] width 1920 pitch 7680 (/4 1920)
>[ 85025.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b62720]
>[ 85025.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b62720] width 1920 pitch 7680 (/4 1920)
>[ 85040.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b16070]
>[ 85040.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b16070] width 1920 pitch 7680 (/4 1920)
>[ 85160.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 85160.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 85175.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 85175.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 85310.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059e0]
>[ 85310.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059e0] width 1920 pitch 7680 (/4 1920)
>[ 85325.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 85325.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 85340.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 85340.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 85355.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 85355.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 85415.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f505f0]
>[ 85415.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f505f0] width 1920 pitch 7680 (/4 1920)
>[ 85430.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 85430.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 85505.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f505f0]
>[ 85505.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f505f0] width 1920 pitch 7680 (/4 1920)
>[ 85535.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059c0]
>[ 85535.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059c0] width 1920 pitch 7680 (/4 1920)
>[ 85595.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 85595.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 85610.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059e0]
>[ 85610.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059e0] width 1920 pitch 7680 (/4 1920)
>[ 85715.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 85715.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 85730.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 85730.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 85745.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 85745.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 85760.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059f0]
>[ 85760.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059f0] width 1920 pitch 7680 (/4 1920)
>[ 85775.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b059a0]
>[ 85775.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b059a0] width 1920 pitch 7680 (/4 1920)
>[ 85805.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 85805.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 85820.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f505f0]
>[ 85820.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f505f0] width 1920 pitch 7680 (/4 1920)
>[ 85850.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f190]
>[ 85850.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f190] width 1920 pitch 7680 (/4 1920)
>[ 85895.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 85895.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 85910.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 85910.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 85925.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 85925.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 85940.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 85940.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 85955.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 85955.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 85970.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46140]
>[ 85970.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46140] width 1920 pitch 7680 (/4 1920)
>[ 86135.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e875b0]
>[ 86135.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e875b0] width 1920 pitch 7680 (/4 1920)
>[ 86150.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 86150.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 86165.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 86165.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 86195.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 86195.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 86240.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05a20]
>[ 86240.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05a20] width 1920 pitch 7680 (/4 1920)
>[ 86255.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f50680]
>[ 86255.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f50680] width 1920 pitch 7680 (/4 1920)
>[ 86285.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 86285.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 86300.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 86300.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 86360.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 86360.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 86375.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 86375.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 86510.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24be0]
>[ 86510.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24be0] width 1920 pitch 7680 (/4 1920)
>[ 86525.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24be0]
>[ 86525.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24be0] width 1920 pitch 7680 (/4 1920)
>[ 86555.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 86555.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 86585.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24be0]
>[ 86585.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24be0] width 1920 pitch 7680 (/4 1920)
>[ 86615.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 86615.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 86630.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24be0]
>[ 86630.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24be0] width 1920 pitch 7680 (/4 1920)
>[ 86660.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 86660.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 86675.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6370]
>[ 86675.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6370] width 1920 pitch 7680 (/4 1920)
>[ 86705.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b62720]
>[ 86705.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b62720] width 1920 pitch 7680 (/4 1920)
>[ 86720.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b62720]
>[ 86720.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b62720] width 1920 pitch 7680 (/4 1920)
>[ 86782.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[ 86782.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[ 86783.961] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 86783.961] (II) RADEON(0): Using hsync ranges from config file
>[ 86783.961] (II) RADEON(0): Using vrefresh ranges from config file
>[ 86783.961] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 86783.961] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 86783.961] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 86783.961] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 86784.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[ 86784.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[ 86786.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86786.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86786.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86786.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86786.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86786.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86786.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86786.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86786.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86786.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86786.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86786.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86786.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86786.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86786.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86786.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86787.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86787.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86787.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86787.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86787.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86787.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86787.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86787.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86787.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86787.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86796.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86796.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86811.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86811.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86841.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86841.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86856.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86856.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 86946.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 86946.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 86961.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 86961.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87096.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 87096.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 87111.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87111.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87321.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e77cc0]
>[ 87321.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e77cc0] width 1920 pitch 7680 (/4 1920)
>[ 87336.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87336.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87381.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87381.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87390.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 87390.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 87390.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87390.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87390.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 87390.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 87390.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87390.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87390.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 87390.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 87390.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87390.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87390.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 87390.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 87390.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47a10]
>[ 87390.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47a10] width 1920 pitch 7680 (/4 1920)
>[ 87390.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915310]
>[ 87390.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915310] width 1920 pitch 7680 (/4 1920)
>[ 87390.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c485f0]
>[ 87390.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c485f0] width 1920 pitch 7680 (/4 1920)
>[ 87391.171] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[ 87391.171] (II) RADEON(0): Using hsync ranges from config file
>[ 87391.171] (II) RADEON(0): Using vrefresh ranges from config file
>[ 87391.171] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 87391.171] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[ 87391.171] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[ 87391.171] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[ 87391.172] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[ 87396.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[ 87396.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[ 87480.672] (II) RADEON(0): RADEONSaveScreen(2)
>[ 87480.672] (II) RADEON(0): RADEONSaveScreen(0)
>[ 88848.294] (II) RADEON(0): RADEONSaveScreen(1)
>[ 88848.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[ 88848.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[ 88854.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88854.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88856.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88856.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88856.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[ 88856.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[ 88938.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[ 88938.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[ 88968.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e066c0]
>[ 88968.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e066c0] width 1920 pitch 7680 (/4 1920)
>[ 88974.321] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[ 88974.321] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[ 88974.321] (II) UnloadModule: "evdev"
>[ 88985.219] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[ 88985.219] (II) No input driver specified, ignoring this device.
>[ 88985.219] (II) This device may have been added with another device file.
>[ 88985.219] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[ 88985.219] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[ 88985.219] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[ 88985.219] 	Option "XkbRules" "evdev"
>[ 88985.219] 	Option "XkbModel" "evdev"
>[ 88985.219] 	Option "XkbLayout" "us"
>[ 88985.219] 	Option "_source" "server/udev"
>[ 88985.219] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[ 88985.219] 	Option "path" "/dev/input/event14"
>[ 88985.219] 	Option "device" "/dev/input/event14"
>[ 88985.219] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input32/event14"
>[ 88985.219] 	Option "driver" "evdev"
>[ 88985.219] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[ 88985.219] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[ 88985.219] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[ 88985.219] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[ 88985.219] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[ 88985.219] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[ 88985.219] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[ 88985.219] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[ 88985.219] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[ 88985.219] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[ 88985.219] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[ 88985.219] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input32/event14"
>[ 88985.219] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[ 88985.220] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[ 88985.220] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[ 88985.220] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[ 88985.220] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[ 88985.220] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[ 88988.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88988.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88988.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88988.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88988.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88988.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88988.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88988.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88988.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88988.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88988.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88988.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88988.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88988.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88988.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88988.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88988.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88988.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88988.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88988.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88988.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88988.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88988.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88989.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88989.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88989.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88989.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88989.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88990.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88990.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88990.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88990.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88990.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88990.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88990.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88990.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88990.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88990.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88990.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88990.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88990.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb790]
>[ 88990.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb790] width 1920 pitch 7680 (/4 1920)
>[ 88990.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f51950]
>[ 88990.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f51950] width 1920 pitch 7680 (/4 1920)
>[ 88992.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6e0]
>[ 88992.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6e0] width 1920 pitch 7680 (/4 1920)
>[ 88992.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392ead0]
>[ 88992.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392ead0] width 1920 pitch 7680 (/4 1920)
>[ 88992.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c868d0]
>[ 88992.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c868d0] width 1920 pitch 7680 (/4 1920)
>[ 88992.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c227d0]
>[ 88992.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c227d0] width 1920 pitch 7680 (/4 1920)
>[ 88992.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c22770]
>[ 88992.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c22770] width 1920 pitch 7680 (/4 1920)
>[ 88992.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c227d0]
>[ 88992.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c227d0] width 1920 pitch 7680 (/4 1920)
>[ 88992.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c22770]
>[ 88992.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c22770] width 1920 pitch 7680 (/4 1920)
>[ 88992.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf33a0]
>[ 88992.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf33a0] width 1920 pitch 7680 (/4 1920)
>[ 88992.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38d20]
>[ 88992.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38d20] width 1920 pitch 7680 (/4 1920)
>[ 88992.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c22770]
>[ 88992.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c22770] width 1920 pitch 7680 (/4 1920)
>[ 88992.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf33a0]
>[ 88992.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf33a0] width 1920 pitch 7680 (/4 1920)
>[ 88993.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006710]
>[ 88993.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006710] width 1920 pitch 7680 (/4 1920)
>[ 88993.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006910]
>[ 88993.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006910] width 1920 pitch 7680 (/4 1920)
>[ 88993.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006990]
>[ 88993.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006990] width 1920 pitch 7680 (/4 1920)
>[ 88993.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fa370]
>[ 88993.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fa370] width 1920 pitch 7680 (/4 1920)
>[ 89004.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf33a0]
>[ 89004.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf33a0] width 1920 pitch 7680 (/4 1920)
>[ 89004.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fa370]
>[ 89004.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fa370] width 1920 pitch 7680 (/4 1920)
>[ 89004.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce29b0]
>[ 89004.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce29b0] width 1920 pitch 7680 (/4 1920)
>[ 89004.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce2be0]
>[ 89004.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce2be0] width 1920 pitch 7680 (/4 1920)
>[ 89006.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38870]
>[ 89006.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38870] width 1920 pitch 7680 (/4 1920)
>[ 89006.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce29b0]
>[ 89006.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce29b0] width 1920 pitch 7680 (/4 1920)
>[ 89006.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38870]
>[ 89006.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38870] width 1920 pitch 7680 (/4 1920)
>[ 89006.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46030]
>[ 89006.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46030] width 1920 pitch 7680 (/4 1920)
>[ 89006.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40408f0]
>[ 89006.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40408f0] width 1920 pitch 7680 (/4 1920)
>[ 89007.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[ 89007.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[ 89008.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[ 89008.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[ 89008.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[ 89008.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[ 89008.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[ 89008.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[ 89010.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80fc0]
>[ 89010.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80fc0] width 1920 pitch 7680 (/4 1920)
>[ 89013.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf22e0]
>[ 89013.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf22e0] width 1920 pitch 7680 (/4 1920)
>[ 89026.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45fb0]
>[ 89026.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45fb0] width 1920 pitch 7680 (/4 1920)
>[ 89028.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf33a0]
>[ 89028.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf33a0] width 1920 pitch 7680 (/4 1920)
>[ 89055.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89055.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89055.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89055.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89055.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89055.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89055.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89055.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89055.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89056.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89056.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89056.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89056.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89056.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89056.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89056.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89056.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89056.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89056.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89056.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89056.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89056.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89056.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89056.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89056.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89056.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89056.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89056.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89118.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89118.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89133.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89133.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89163.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89163.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89178.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89178.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89208.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d00]
>[ 89208.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d00] width 1920 pitch 7680 (/4 1920)
>[ 89223.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89223.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89253.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d00]
>[ 89253.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d00] width 1920 pitch 7680 (/4 1920)
>[ 89268.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d00]
>[ 89268.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d00] width 1920 pitch 7680 (/4 1920)
>[ 89418.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89418.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89433.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d00]
>[ 89433.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d00] width 1920 pitch 7680 (/4 1920)
>[ 89463.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89463.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89493.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d00]
>[ 89493.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d00] width 1920 pitch 7680 (/4 1920)
>[ 89568.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89568.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89581.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 89581.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 89582.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 89582.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 89582.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2900]
>[ 89582.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2900] width 1920 pitch 7680 (/4 1920)
>[ 89582.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 89582.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 89582.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 89582.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 89582.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 89582.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 89582.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 89582.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 89582.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 89582.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 89582.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89582.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28b30]
>[ 89582.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28b30] width 1920 pitch 7680 (/4 1920)
>[ 89582.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d557d0]
>[ 89582.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d557d0] width 1920 pitch 7680 (/4 1920)
>[ 89583.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80910]
>[ 89583.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80910] width 1920 pitch 7680 (/4 1920)
>[ 89593.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffd8b0]
>[ 89593.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffd8b0] width 1920 pitch 7680 (/4 1920)
>[ 89594.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45500]
>[ 89594.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45500] width 1920 pitch 7680 (/4 1920)
>[ 89594.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17610]
>[ 89594.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17610] width 1920 pitch 7680 (/4 1920)
>[ 89613.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae9b20]
>[ 89613.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae9b20] width 1920 pitch 7680 (/4 1920)
>[ 89643.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d18310]
>[ 89643.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d18310] width 1920 pitch 7680 (/4 1920)
>[ 89646.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[ 89646.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[ 89658.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5a5d0]
>[ 89658.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5a5d0] width 1920 pitch 7680 (/4 1920)
>[ 89683.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acaa10]
>[ 89683.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acaa10] width 1920 pitch 7680 (/4 1920)
>[ 89683.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acae00]
>[ 89683.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acae00] width 1920 pitch 7680 (/4 1920)
>[ 89683.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18a70]
>[ 89683.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18a70] width 1920 pitch 7680 (/4 1920)
>[ 89683.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89683.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89683.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18a70]
>[ 89683.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18a70] width 1920 pitch 7680 (/4 1920)
>[ 89683.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89683.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89683.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18a70]
>[ 89683.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18a70] width 1920 pitch 7680 (/4 1920)
>[ 89683.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18a70]
>[ 89683.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18a70] width 1920 pitch 7680 (/4 1920)
>[ 89683.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89683.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89683.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18a70]
>[ 89683.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18a70] width 1920 pitch 7680 (/4 1920)
>[ 89683.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89683.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89683.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27640]
>[ 89683.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27640] width 1920 pitch 7680 (/4 1920)
>[ 89683.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27640]
>[ 89683.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27640] width 1920 pitch 7680 (/4 1920)
>[ 89683.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89683.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89687.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27640]
>[ 89687.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27640] width 1920 pitch 7680 (/4 1920)
>[ 89687.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89687.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89687.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89687.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89687.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89687.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89687.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89687.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89687.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89687.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89687.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89687.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89687.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89688.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89688.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89688.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89688.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89688.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27640]
>[ 89688.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27640] width 1920 pitch 7680 (/4 1920)
>[ 89688.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89688.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89688.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89688.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89688.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5a5d0]
>[ 89688.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5a5d0] width 1920 pitch 7680 (/4 1920)
>[ 89688.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91ed0]
>[ 89688.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91ed0] width 1920 pitch 7680 (/4 1920)
>[ 89688.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27640]
>[ 89688.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27640] width 1920 pitch 7680 (/4 1920)
>[ 89688.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89688.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89688.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89688.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89688.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af68b0]
>[ 89688.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af68b0] width 1920 pitch 7680 (/4 1920)
>[ 89778.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3acae00]
>[ 89778.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3acae00] width 1920 pitch 7680 (/4 1920)
>[ 89793.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18ad0]
>[ 89793.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18ad0] width 1920 pitch 7680 (/4 1920)
>[ 89973.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18d00]
>[ 89973.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18d00] width 1920 pitch 7680 (/4 1920)
>[ 89988.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a18d00]
>[ 89988.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a18d00] width 1920 pitch 7680 (/4 1920)
>[ 90093.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a70630]
>[ 90093.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a70630] width 1920 pitch 7680 (/4 1920)
>[ 90108.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a75140]
>[ 90108.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a75140] width 1920 pitch 7680 (/4 1920)
>[ 90123.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79050]
>[ 90123.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79050] width 1920 pitch 7680 (/4 1920)
>[ 90125.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b74010]
>[ 90125.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b74010] width 1920 pitch 7680 (/4 1920)
>[ 90126.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6890]
>[ 90126.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6890] width 1920 pitch 7680 (/4 1920)
>[ 90126.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6890]
>[ 90126.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6890] width 1920 pitch 7680 (/4 1920)
>[ 90126.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73bd0]
>[ 90126.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73bd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6890]
>[ 90126.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6890] width 1920 pitch 7680 (/4 1920)
>[ 90126.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90126.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90126.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90126.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90126.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90126.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90126.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90126.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90126.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90126.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90126.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90126.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90126.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90127.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90127.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90127.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90127.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90127.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1040]
>[ 90127.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1040] width 1920 pitch 7680 (/4 1920)
>[ 90127.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90127.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90127.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519f10]
>[ 90127.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519f10] width 1920 pitch 7680 (/4 1920)
>[ 90127.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90127.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90127.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90127.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90127.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90127.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90127.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90127.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90127.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90127.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90127.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90127.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90127.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 90127.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 90127.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c289c0]
>[ 90127.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c289c0] width 1920 pitch 7680 (/4 1920)
>[ 90127.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90127.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90127.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c289c0]
>[ 90127.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c289c0] width 1920 pitch 7680 (/4 1920)
>[ 90127.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1040]
>[ 90127.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1040] width 1920 pitch 7680 (/4 1920)
>[ 90127.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90127.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90127.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90127.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90127.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90127.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90127.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90127.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90127.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90127.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90127.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90127.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90128.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90128.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90128.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90128.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90128.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90128.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90128.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90128.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90128.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90128.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90128.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1040]
>[ 90128.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1040] width 1920 pitch 7680 (/4 1920)
>[ 90128.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 90128.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 90129.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1040]
>[ 90129.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1040] width 1920 pitch 7680 (/4 1920)
>[ 90129.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 90129.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 90129.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519f10]
>[ 90129.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519f10] width 1920 pitch 7680 (/4 1920)
>[ 90129.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 90129.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 90129.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519f10]
>[ 90129.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519f10] width 1920 pitch 7680 (/4 1920)
>[ 90129.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8070]
>[ 90129.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8070] width 1920 pitch 7680 (/4 1920)
>[ 90129.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 90129.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 90129.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfbe70]
>[ 90129.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfbe70] width 1920 pitch 7680 (/4 1920)
>[ 90129.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90129.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90129.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfbe70]
>[ 90129.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfbe70] width 1920 pitch 7680 (/4 1920)
>[ 90129.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90129.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90129.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfbe70]
>[ 90129.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfbe70] width 1920 pitch 7680 (/4 1920)
>[ 90129.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90129.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90130.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfbe70]
>[ 90130.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfbe70] width 1920 pitch 7680 (/4 1920)
>[ 90130.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90130.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90130.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90130.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90130.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90130.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90130.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90130.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90130.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3560]
>[ 90130.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3560] width 1920 pitch 7680 (/4 1920)
>[ 90130.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90130.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90130.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 90130.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 90130.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90130.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90130.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c289c0]
>[ 90130.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c289c0] width 1920 pitch 7680 (/4 1920)
>[ 90130.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90131.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90131.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c289c0]
>[ 90131.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c289c0] width 1920 pitch 7680 (/4 1920)
>[ 90131.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90131.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90131.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c289c0]
>[ 90131.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c289c0] width 1920 pitch 7680 (/4 1920)
>[ 90131.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7dbd0]
>[ 90131.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7dbd0] width 1920 pitch 7680 (/4 1920)
>[ 90131.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90131.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90131.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce2a30]
>[ 90131.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce2a30] width 1920 pitch 7680 (/4 1920)
>[ 90131.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10150]
>[ 90131.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10150] width 1920 pitch 7680 (/4 1920)
>[ 90131.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4aa00]
>[ 90131.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4aa00] width 1920 pitch 7680 (/4 1920)
>[ 90131.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d100f0]
>[ 90131.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d100f0] width 1920 pitch 7680 (/4 1920)
>[ 90131.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[ 90131.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[ 90131.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80e20]
>[ 90131.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80e20] width 1920 pitch 7680 (/4 1920)
>[ 90132.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[ 90132.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[ 90138.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90138.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90153.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90153.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90168.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90168.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90189.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10a70]
>[ 90189.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10a70] width 1920 pitch 7680 (/4 1920)
>[ 90189.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90189.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90189.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90189.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90189.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90189.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90189.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90189.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90189.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90189.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90189.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90189.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90189.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90189.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90189.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90189.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90190.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90190.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90190.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90190.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90190.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90190.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90190.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90190.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90190.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0680]
>[ 90190.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0680] width 1920 pitch 7680 (/4 1920)
>[ 90191.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90191.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90191.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90191.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90191.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb8800]
>[ 90191.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb8800] width 1920 pitch 7680 (/4 1920)
>[ 90191.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90191.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90191.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb8800]
>[ 90191.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb8800] width 1920 pitch 7680 (/4 1920)
>[ 90191.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3a850]
>[ 90191.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3a850] width 1920 pitch 7680 (/4 1920)
>[ 90197.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb94c0]
>[ 90197.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb94c0] width 1920 pitch 7680 (/4 1920)
>[ 90198.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38a10]
>[ 90198.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38a10] width 1920 pitch 7680 (/4 1920)
>[ 90198.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c912b0]
>[ 90198.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c912b0] width 1920 pitch 7680 (/4 1920)
>[ 90201.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b51640]
>[ 90201.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b51640] width 1920 pitch 7680 (/4 1920)
>[ 90217.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ea50]
>[ 90217.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ea50] width 1920 pitch 7680 (/4 1920)
>[ 90218.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38b00]
>[ 90218.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38b00] width 1920 pitch 7680 (/4 1920)
>[ 90218.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90218.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90218.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90218.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90218.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb3f0]
>[ 90218.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb3f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90218.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90218.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90218.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90218.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90218.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90218.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90218.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90218.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ea50]
>[ 90218.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ea50] width 1920 pitch 7680 (/4 1920)
>[ 90218.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90218.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90218.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90219.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90219.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90219.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90219.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90219.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90219.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90219.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90219.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e9f0]
>[ 90219.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e9f0] width 1920 pitch 7680 (/4 1920)
>[ 90219.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90219.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90219.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90219.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90219.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e290]
>[ 90219.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e290] width 1920 pitch 7680 (/4 1920)
>[ 90219.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb3f0]
>[ 90219.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb3f0] width 1920 pitch 7680 (/4 1920)
>[ 90219.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e710]
>[ 90219.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e710] width 1920 pitch 7680 (/4 1920)
>[ 90219.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ece0]
>[ 90219.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ece0] width 1920 pitch 7680 (/4 1920)
>[ 90219.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e710]
>[ 90219.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e710] width 1920 pitch 7680 (/4 1920)
>[ 90219.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ece0]
>[ 90219.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ece0] width 1920 pitch 7680 (/4 1920)
>[ 90219.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ece0]
>[ 90219.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ece0] width 1920 pitch 7680 (/4 1920)
>[ 90219.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8c30]
>[ 90219.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8c30] width 1920 pitch 7680 (/4 1920)
>[ 90219.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8c90]
>[ 90219.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8c90] width 1920 pitch 7680 (/4 1920)
>[ 90219.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e710]
>[ 90219.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e710] width 1920 pitch 7680 (/4 1920)
>[ 90219.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ece0]
>[ 90219.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ece0] width 1920 pitch 7680 (/4 1920)
>[ 90219.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ece0]
>[ 90219.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ece0] width 1920 pitch 7680 (/4 1920)
>[ 90219.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e710]
>[ 90219.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e710] width 1920 pitch 7680 (/4 1920)
>[ 90219.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8c30]
>[ 90219.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8c30] width 1920 pitch 7680 (/4 1920)
>[ 90219.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90219.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90219.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90219.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90219.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8c30]
>[ 90219.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8c30] width 1920 pitch 7680 (/4 1920)
>[ 90219.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90219.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90219.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[ 90219.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[ 90219.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90219.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90243.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77c10]
>[ 90243.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77c10] width 1920 pitch 7680 (/4 1920)
>[ 90252.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d12b40]
>[ 90252.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d12b40] width 1920 pitch 7680 (/4 1920)
>[ 90252.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14560]
>[ 90252.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14560] width 1920 pitch 7680 (/4 1920)
>[ 90252.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ecb0]
>[ 90252.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ecb0] width 1920 pitch 7680 (/4 1920)
>[ 90252.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8fe0]
>[ 90252.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8fe0] width 1920 pitch 7680 (/4 1920)
>[ 90252.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9080]
>[ 90252.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9080] width 1920 pitch 7680 (/4 1920)
>[ 90252.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9080]
>[ 90252.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9080] width 1920 pitch 7680 (/4 1920)
>[ 90252.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90252.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90252.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90252.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90252.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90253.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90253.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90253.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90253.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90253.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90253.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90253.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90253.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90253.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90253.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90253.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90253.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0330]
>[ 90253.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0330] width 1920 pitch 7680 (/4 1920)
>[ 90253.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e380]
>[ 90253.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e380] width 1920 pitch 7680 (/4 1920)
>[ 90258.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8e20]
>[ 90258.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8e20] width 1920 pitch 7680 (/4 1920)
>[ 90273.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d022d0]
>[ 90273.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d022d0] width 1920 pitch 7680 (/4 1920)
>[ 90288.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8e20]
>[ 90288.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8e20] width 1920 pitch 7680 (/4 1920)
>[ 90303.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90303.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90318.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14560]
>[ 90318.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14560] width 1920 pitch 7680 (/4 1920)
>[ 90378.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90378.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90393.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d022d0]
>[ 90393.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d022d0] width 1920 pitch 7680 (/4 1920)
>[ 90408.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0420]
>[ 90408.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0420] width 1920 pitch 7680 (/4 1920)
>[ 90423.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16e60]
>[ 90423.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16e60] width 1920 pitch 7680 (/4 1920)
>[ 90543.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d022d0]
>[ 90543.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d022d0] width 1920 pitch 7680 (/4 1920)
>[ 90573.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d95850]
>[ 90573.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d95850] width 1920 pitch 7680 (/4 1920)
>[ 90588.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d022d0]
>[ 90588.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d022d0] width 1920 pitch 7680 (/4 1920)
>[ 90603.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d022d0]
>[ 90603.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d022d0] width 1920 pitch 7680 (/4 1920)
>[ 90648.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d958d0]
>[ 90648.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d958d0] width 1920 pitch 7680 (/4 1920)
>[ 90663.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d022d0]
>[ 90663.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d022d0] width 1920 pitch 7680 (/4 1920)
>[ 90708.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ba40]
>[ 90708.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ba40] width 1920 pitch 7680 (/4 1920)
>[ 90723.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6bd0]
>[ 90723.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6bd0] width 1920 pitch 7680 (/4 1920)
>[ 90813.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f39750]
>[ 90813.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f39750] width 1920 pitch 7680 (/4 1920)
>[ 90828.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6bd0]
>[ 90828.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6bd0] width 1920 pitch 7680 (/4 1920)
>[ 90948.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 90948.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 90963.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f39750]
>[ 90963.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f39750] width 1920 pitch 7680 (/4 1920)
>[ 90993.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 90993.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 91023.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91023.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91068.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16640]
>[ 91068.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16640] width 1920 pitch 7680 (/4 1920)
>[ 91083.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91083.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91218.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398c3c0]
>[ 91218.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398c3c0] width 1920 pitch 7680 (/4 1920)
>[ 91233.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91233.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91248.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 91248.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 91278.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16640]
>[ 91278.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16640] width 1920 pitch 7680 (/4 1920)
>[ 91383.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91383.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91413.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91413.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91488.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91488.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91503.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398c3c0]
>[ 91503.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398c3c0] width 1920 pitch 7680 (/4 1920)
>[ 91773.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36980]
>[ 91773.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36980] width 1920 pitch 7680 (/4 1920)
>[ 91788.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 91788.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 91863.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16640]
>[ 91863.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16640] width 1920 pitch 7680 (/4 1920)
>[ 91878.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398c3c0]
>[ 91878.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398c3c0] width 1920 pitch 7680 (/4 1920)
>[ 91917.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd19a0]
>[ 91917.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd19a0] width 1920 pitch 7680 (/4 1920)
>[ 91917.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd19a0]
>[ 91917.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd19a0] width 1920 pitch 7680 (/4 1920)
>[ 91917.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b15290]
>[ 91917.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b15290] width 1920 pitch 7680 (/4 1920)
>[ 91917.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf7640]
>[ 91917.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf7640] width 1920 pitch 7680 (/4 1920)
>[ 91917.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 91917.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 91917.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540180]
>[ 91917.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540180] width 1920 pitch 7680 (/4 1920)
>[ 91917.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b15290]
>[ 91917.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b15290] width 1920 pitch 7680 (/4 1920)
>[ 91917.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd19a0]
>[ 91917.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd19a0] width 1920 pitch 7680 (/4 1920)
>[ 91923.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd19a0]
>[ 91923.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd19a0] width 1920 pitch 7680 (/4 1920)
>[ 91923.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b15290]
>[ 91923.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b15290] width 1920 pitch 7680 (/4 1920)
>[ 91923.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540180]
>[ 91923.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540180] width 1920 pitch 7680 (/4 1920)
>[ 91924.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 91924.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 91924.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519f10]
>[ 91924.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519f10] width 1920 pitch 7680 (/4 1920)
>[ 91924.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519f10]
>[ 91925.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519f10] width 1920 pitch 7680 (/4 1920)
>[ 91925.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c289c0]
>[ 91925.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c289c0] width 1920 pitch 7680 (/4 1920)
>[ 91925.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519f10]
>[ 91925.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519f10] width 1920 pitch 7680 (/4 1920)
>[ 91925.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d184d0]
>[ 91925.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d184d0] width 1920 pitch 7680 (/4 1920)
>[ 91998.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e365b0]
>[ 91998.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e365b0] width 1920 pitch 7680 (/4 1920)
>[ 92028.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[ 92028.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[ 92163.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58b60]
>[ 92163.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58b60] width 1920 pitch 7680 (/4 1920)
>[ 92178.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e365b0]
>[ 92178.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e365b0] width 1920 pitch 7680 (/4 1920)
>[ 92283.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58b60]
>[ 92283.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58b60] width 1920 pitch 7680 (/4 1920)
>[ 92287.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79860]
>[ 92287.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79860] width 1920 pitch 7680 (/4 1920)
>[ 92288.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfc1f0]
>[ 92288.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfc1f0] width 1920 pitch 7680 (/4 1920)
>[ 92288.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 92288.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 92288.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 92288.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 92298.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcbac0]
>[ 92298.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcbac0] width 1920 pitch 7680 (/4 1920)
>[ 92448.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[ 92448.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[ 92463.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 92463.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 92493.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[ 92493.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[ 92508.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 92508.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 92523.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[ 92523.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[ 92538.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 92538.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 92583.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[ 92583.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[ 92598.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 92598.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 92643.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[ 92643.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[ 92658.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 92658.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 92688.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[ 92688.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[ 92703.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[ 92703.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[ 93031.655] (II) RADEON(0): RADEONSaveScreen(2)
>[ 93031.655] (II) RADEON(0): RADEONSaveScreen(0)
>[ 93033.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6660]
>[101361.181] (II) RADEON(0): RADEONSaveScreen(1)
>[101361.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6660] width 1920 pitch 7680 (/4 1920)
>[101361.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101361.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101365.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65860]
>[101365.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65860] width 1920 pitch 7680 (/4 1920)
>[101365.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8e770]
>[101365.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8e770] width 1920 pitch 7680 (/4 1920)
>[101371.102] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[101371.102] (II) RADEON(0): Using hsync ranges from config file
>[101371.102] (II) RADEON(0): Using vrefresh ranges from config file
>[101371.102] (II) RADEON(0): Printing DDC gathered Modelines:
>[101371.102] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[101371.102] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[101371.102] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[101371.102] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[101371.102] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[101371.102] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[101371.102] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[101371.102] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[101371.102] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[101371.102] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[101371.102] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[101371.102] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[101371.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[101371.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[101372.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[101372.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[101376.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912750]
>[101376.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912750] width 1920 pitch 7680 (/4 1920)
>[101376.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3993880]
>[101376.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3993880] width 1920 pitch 7680 (/4 1920)
>[101376.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912750]
>[101376.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912750] width 1920 pitch 7680 (/4 1920)
>[101376.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3993880]
>[101376.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3993880] width 1920 pitch 7680 (/4 1920)
>[101376.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b51640]
>[101376.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b51640] width 1920 pitch 7680 (/4 1920)
>[101376.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912460]
>[101376.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912460] width 1920 pitch 7680 (/4 1920)
>[101377.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101377.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101377.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101377.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101377.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101377.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101377.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101377.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101377.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101377.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101377.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101377.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101377.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101377.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101378.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101378.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101378.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101378.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101378.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101378.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101378.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101379.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101379.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101379.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101379.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101379.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101380.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101380.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101380.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101380.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101380.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101380.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101381.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101381.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101381.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101381.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101381.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101381.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101381.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101381.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101381.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101381.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101381.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101381.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101382.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101382.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101383.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101383.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101383.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101383.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101384.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101384.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101385.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101385.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101388.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101388.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101388.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101388.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101388.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101388.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101388.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101388.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101388.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101388.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101389.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101389.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101389.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101389.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101389.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101389.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101389.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101389.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101389.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101389.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101389.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101389.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101389.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101390.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101390.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101390.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101390.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101390.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101391.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3dfe0]
>[101391.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3dfe0] width 1920 pitch 7680 (/4 1920)
>[101391.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101391.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101391.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[101391.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[101391.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101391.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101391.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c471f0]
>[101391.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c471f0] width 1920 pitch 7680 (/4 1920)
>[101391.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ebd0]
>[101391.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ebd0] width 1920 pitch 7680 (/4 1920)
>[101391.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bfc0]
>[101391.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bfc0] width 1920 pitch 7680 (/4 1920)
>[101391.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05fc0]
>[101391.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05fc0] width 1920 pitch 7680 (/4 1920)
>[101391.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bfc0]
>[101391.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bfc0] width 1920 pitch 7680 (/4 1920)
>[101391.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05fc0]
>[101391.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05fc0] width 1920 pitch 7680 (/4 1920)
>[101391.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bfc0]
>[101391.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bfc0] width 1920 pitch 7680 (/4 1920)
>[101391.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05fc0]
>[101391.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05fc0] width 1920 pitch 7680 (/4 1920)
>[101391.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bfc0]
>[101391.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bfc0] width 1920 pitch 7680 (/4 1920)
>[101403.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5be10]
>[101403.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5be10] width 1920 pitch 7680 (/4 1920)
>[101404.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8900]
>[101404.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8900] width 1920 pitch 7680 (/4 1920)
>[101404.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101404.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101410.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d37400]
>[101410.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d37400] width 1920 pitch 7680 (/4 1920)
>[101410.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101410.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101410.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d37400]
>[101410.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d37400] width 1920 pitch 7680 (/4 1920)
>[101410.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d37400]
>[101411.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d37400] width 1920 pitch 7680 (/4 1920)
>[101411.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb970]
>[101411.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb970] width 1920 pitch 7680 (/4 1920)
>[101411.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb970]
>[101411.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb970] width 1920 pitch 7680 (/4 1920)
>[101411.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb970]
>[101411.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb970] width 1920 pitch 7680 (/4 1920)
>[101411.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb970]
>[101411.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb970] width 1920 pitch 7680 (/4 1920)
>[101411.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb970]
>[101411.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb970] width 1920 pitch 7680 (/4 1920)
>[101411.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8820]
>[101411.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8820] width 1920 pitch 7680 (/4 1920)
>[101411.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb970]
>[101411.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb970] width 1920 pitch 7680 (/4 1920)
>[101411.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101411.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101411.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101411.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d970]
>[101411.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d970] width 1920 pitch 7680 (/4 1920)
>[101418.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bae0]
>[101418.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bae0] width 1920 pitch 7680 (/4 1920)
>[101418.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92d00]
>[101418.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92d00] width 1920 pitch 7680 (/4 1920)
>[101418.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6c50]
>[101418.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6c50] width 1920 pitch 7680 (/4 1920)
>[101420.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f7300]
>[101420.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f7300] width 1920 pitch 7680 (/4 1920)
>[101420.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f7300]
>[101420.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f7300] width 1920 pitch 7680 (/4 1920)
>[101420.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f7300]
>[101420.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f7300] width 1920 pitch 7680 (/4 1920)
>[101420.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f7300]
>[101420.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f7300] width 1920 pitch 7680 (/4 1920)
>[101420.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93950]
>[101420.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93950] width 1920 pitch 7680 (/4 1920)
>[101420.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93950]
>[101420.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93950] width 1920 pitch 7680 (/4 1920)
>[101420.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93950]
>[101420.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93950] width 1920 pitch 7680 (/4 1920)
>[101420.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3a60]
>[101420.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3a60] width 1920 pitch 7680 (/4 1920)
>[101420.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d93950]
>[101420.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d93950] width 1920 pitch 7680 (/4 1920)
>[101422.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101422.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101422.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101422.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101422.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101422.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101422.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101422.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101422.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101422.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101422.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06fd0]
>[101422.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06fd0] width 1920 pitch 7680 (/4 1920)
>[101422.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c84500]
>[101422.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c84500] width 1920 pitch 7680 (/4 1920)
>[101422.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73190]
>[101422.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73190] width 1920 pitch 7680 (/4 1920)
>[101422.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101423.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101423.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f7320]
>[101423.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f7320] width 1920 pitch 7680 (/4 1920)
>[101427.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101427.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101427.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd29c0]
>[101427.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd29c0] width 1920 pitch 7680 (/4 1920)
>[101427.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101427.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101427.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd29c0]
>[101427.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd29c0] width 1920 pitch 7680 (/4 1920)
>[101427.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101427.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101427.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd29c0]
>[101427.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd29c0] width 1920 pitch 7680 (/4 1920)
>[101427.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101427.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101427.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54b90]
>[101427.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54b90] width 1920 pitch 7680 (/4 1920)
>[101427.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101427.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101427.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101427.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101427.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101427.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101427.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101427.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101427.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101427.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101427.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101427.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101427.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101427.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101427.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101427.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101427.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0230]
>[101427.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0230] width 1920 pitch 7680 (/4 1920)
>[101428.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101428.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101428.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101428.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101428.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101428.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101428.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101428.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101428.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101428.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101428.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c740]
>[101428.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c740] width 1920 pitch 7680 (/4 1920)
>[101428.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101428.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101428.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101428.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101428.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9eab0]
>[101428.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9eab0] width 1920 pitch 7680 (/4 1920)
>[101481.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101481.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101496.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101496.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101526.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101526.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101541.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101541.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101556.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101556.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101601.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101601.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101631.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101631.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101646.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101646.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101676.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101676.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101691.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101691.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101781.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101781.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101811.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101811.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101931.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101931.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[101946.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[101946.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[101991.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[101991.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[102006.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[102006.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[102021.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[102021.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[102036.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[102036.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[102098.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd2720]
>[102098.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd2720] width 1920 pitch 7680 (/4 1920)
>[102099.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[102099.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[102099.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef2a0]
>[102099.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef2a0] width 1920 pitch 7680 (/4 1920)
>[102099.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f446e0]
>[102099.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f446e0] width 1920 pitch 7680 (/4 1920)
>[102171.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926de0]
>[102171.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926de0] width 1920 pitch 7680 (/4 1920)
>[102186.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc8d0]
>[102186.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc8d0] width 1920 pitch 7680 (/4 1920)
>[102209.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af70c0]
>[102209.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af70c0] width 1920 pitch 7680 (/4 1920)
>[102209.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0030]
>[102209.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0030] width 1920 pitch 7680 (/4 1920)
>[102209.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47910]
>[102209.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47910] width 1920 pitch 7680 (/4 1920)
>[102209.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0030]
>[102209.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0030] width 1920 pitch 7680 (/4 1920)
>[102229.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57840]
>[102229.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57840] width 1920 pitch 7680 (/4 1920)
>[102230.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de330]
>[102230.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de330] width 1920 pitch 7680 (/4 1920)
>[102230.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d47af0]
>[102230.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d47af0] width 1920 pitch 7680 (/4 1920)
>[102230.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d42a80]
>[102230.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d42a80] width 1920 pitch 7680 (/4 1920)
>[102230.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5aed0]
>[102230.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5aed0] width 1920 pitch 7680 (/4 1920)
>[102230.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102230.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102306.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d47af0]
>[102306.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d47af0] width 1920 pitch 7680 (/4 1920)
>[102314.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d02040]
>[102314.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d02040] width 1920 pitch 7680 (/4 1920)
>[102321.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96580]
>[102321.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96580] width 1920 pitch 7680 (/4 1920)
>[102347.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953750]
>[102347.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953750] width 1920 pitch 7680 (/4 1920)
>[102347.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[102347.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[102347.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40181a0]
>[102347.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40181a0] width 1920 pitch 7680 (/4 1920)
>[102347.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[102347.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[102351.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[102351.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[102366.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102366.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102381.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[102381.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[102396.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5afc0]
>[102396.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5afc0] width 1920 pitch 7680 (/4 1920)
>[102411.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0bc0]
>[102411.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0bc0] width 1920 pitch 7680 (/4 1920)
>[102441.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c62190]
>[102441.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c62190] width 1920 pitch 7680 (/4 1920)
>[102441.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953750]
>[102441.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953750] width 1920 pitch 7680 (/4 1920)
>[102482.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102482.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102482.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[102482.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[102482.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0bc0]
>[102482.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0bc0] width 1920 pitch 7680 (/4 1920)
>[102482.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[102482.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[102486.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[102486.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[102501.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[102501.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[102531.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86da0]
>[102531.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86da0] width 1920 pitch 7680 (/4 1920)
>[102546.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03b70]
>[102546.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03b70] width 1920 pitch 7680 (/4 1920)
>[102547.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102547.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102547.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102547.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102547.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102547.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102547.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102547.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102547.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102548.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102548.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102548.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102548.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102548.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102548.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102548.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102548.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102548.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102548.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102548.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102548.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102548.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102548.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102548.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102548.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102548.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102550.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102550.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102550.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102550.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102550.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102550.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102550.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102550.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102551.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102551.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102551.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102551.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102551.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102551.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102551.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102551.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102553.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102553.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102553.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102553.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102553.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102553.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102553.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102553.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102553.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102553.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102553.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102553.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102553.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102553.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102553.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102553.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102557.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102557.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102557.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102557.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102557.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102557.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102557.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102557.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102559.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102559.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102559.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102559.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102559.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102560.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102560.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102560.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102560.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102560.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102560.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102560.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102560.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57810]
>[102560.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57810] width 1920 pitch 7680 (/4 1920)
>[102560.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22110]
>[102560.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22110] width 1920 pitch 7680 (/4 1920)
>[102560.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0bc0]
>[102560.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0bc0] width 1920 pitch 7680 (/4 1920)
>[102560.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96580]
>[102560.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96580] width 1920 pitch 7680 (/4 1920)
>[102565.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0bc0]
>[102565.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0bc0] width 1920 pitch 7680 (/4 1920)
>[102565.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d01fe0]
>[102565.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d01fe0] width 1920 pitch 7680 (/4 1920)
>[102610.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[102610.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[102621.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[102621.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[102628.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ef00]
>[102628.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ef00] width 1920 pitch 7680 (/4 1920)
>[102629.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ef00]
>[102629.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ef00] width 1920 pitch 7680 (/4 1920)
>[102629.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487ed0]
>[102629.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487ed0] width 1920 pitch 7680 (/4 1920)
>[102629.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4280]
>[102629.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4280] width 1920 pitch 7680 (/4 1920)
>[102642.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487ed0]
>[102642.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487ed0] width 1920 pitch 7680 (/4 1920)
>[102642.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ef00]
>[102642.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ef00] width 1920 pitch 7680 (/4 1920)
>[102642.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ef00]
>[102642.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ef00] width 1920 pitch 7680 (/4 1920)
>[102642.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487ed0]
>[102642.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487ed0] width 1920 pitch 7680 (/4 1920)
>[102651.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66ee0]
>[102651.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66ee0] width 1920 pitch 7680 (/4 1920)
>[102711.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c68ef0]
>[102711.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c68ef0] width 1920 pitch 7680 (/4 1920)
>[102726.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded7e0]
>[102726.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded7e0] width 1920 pitch 7680 (/4 1920)
>[102816.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d730]
>[102816.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d730] width 1920 pitch 7680 (/4 1920)
>[102831.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[102831.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[102876.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953750]
>[102876.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953750] width 1920 pitch 7680 (/4 1920)
>[102889.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[102889.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[102889.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[102889.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[102889.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced4f0]
>[102889.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced4f0] width 1920 pitch 7680 (/4 1920)
>[102889.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4dd60]
>[102889.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4dd60] width 1920 pitch 7680 (/4 1920)
>[102891.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[102891.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[102911.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d360b0]
>[102911.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d360b0] width 1920 pitch 7680 (/4 1920)
>[102951.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb60e0]
>[102951.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb60e0] width 1920 pitch 7680 (/4 1920)
>[102981.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bff60]
>[102981.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bff60] width 1920 pitch 7680 (/4 1920)
>[102996.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2563140]
>[102996.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2563140] width 1920 pitch 7680 (/4 1920)
>[103026.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4dd60]
>[103026.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4dd60] width 1920 pitch 7680 (/4 1920)
>[103080.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93680]
>[103080.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93680] width 1920 pitch 7680 (/4 1920)
>[103080.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45ec0]
>[103080.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45ec0] width 1920 pitch 7680 (/4 1920)
>[103080.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d91870]
>[103080.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d91870] width 1920 pitch 7680 (/4 1920)
>[103080.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bfa0]
>[103080.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bfa0] width 1920 pitch 7680 (/4 1920)
>[103080.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bfa0]
>[103080.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bfa0] width 1920 pitch 7680 (/4 1920)
>[103080.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bfa0]
>[103080.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bfa0] width 1920 pitch 7680 (/4 1920)
>[103080.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac03a0]
>[103080.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac03a0] width 1920 pitch 7680 (/4 1920)
>[103080.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac03a0]
>[103080.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac03a0] width 1920 pitch 7680 (/4 1920)
>[103080.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac03a0]
>[103080.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac03a0] width 1920 pitch 7680 (/4 1920)
>[103080.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe020]
>[103080.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe020] width 1920 pitch 7680 (/4 1920)
>[103080.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe020]
>[103080.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe020] width 1920 pitch 7680 (/4 1920)
>[103080.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe020]
>[103080.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe020] width 1920 pitch 7680 (/4 1920)
>[103080.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103080.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe020]
>[103080.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe020] width 1920 pitch 7680 (/4 1920)
>[103080.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a800]
>[103080.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a800] width 1920 pitch 7680 (/4 1920)
>[103116.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87cd0]
>[103116.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87cd0] width 1920 pitch 7680 (/4 1920)
>[103131.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2569200]
>[103131.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2569200] width 1920 pitch 7680 (/4 1920)
>[103161.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ff00]
>[103161.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ff00] width 1920 pitch 7680 (/4 1920)
>[103176.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103176.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103206.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103206.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103251.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103251.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103296.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103296.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103311.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103311.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103356.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103356.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103371.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103371.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103416.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103416.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103431.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103431.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103491.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103491.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103521.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103521.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103581.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103581.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103626.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103626.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103641.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a929d0]
>[103641.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a929d0] width 1920 pitch 7680 (/4 1920)
>[103656.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd570]
>[103656.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd570] width 1920 pitch 7680 (/4 1920)
>[103818.970] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[103818.970] (II) RADEON(0): Using hsync ranges from config file
>[103818.970] (II) RADEON(0): Using vrefresh ranges from config file
>[103818.970] (II) RADEON(0): Printing DDC gathered Modelines:
>[103818.970] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[103818.970] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[103818.970] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[103818.970] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[103818.970] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[103818.970] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[103818.970] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[103818.971] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[103818.971] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[103818.971] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[103818.971] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[103818.971] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[103909.672] (II) RADEON(0): RADEONSaveScreen(2)
>[103909.672] (II) RADEON(0): RADEONSaveScreen(0)
>[103995.343] (II) RADEON(0): RADEONSaveScreen(1)
>[103995.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[103995.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104025.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d4b40]
>[104025.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d4b40] width 1920 pitch 7680 (/4 1920)
>[104039.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104039.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104039.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104039.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104039.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b6f0]
>[104039.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b6f0] width 1920 pitch 7680 (/4 1920)
>[104040.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104040.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104040.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea6a0]
>[104040.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea6a0] width 1920 pitch 7680 (/4 1920)
>[104072.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c470]
>[104072.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c470] width 1920 pitch 7680 (/4 1920)
>[104073.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104073.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104073.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4ba0]
>[104073.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4ba0] width 1920 pitch 7680 (/4 1920)
>[104073.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104073.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104089.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104089.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104089.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104089.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104090.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104090.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104090.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104090.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104100.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae7dd0]
>[104100.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae7dd0] width 1920 pitch 7680 (/4 1920)
>[104107.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db8e10]
>[104107.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db8e10] width 1920 pitch 7680 (/4 1920)
>[104107.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540470]
>[104107.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540470] width 1920 pitch 7680 (/4 1920)
>[104107.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba4ba0]
>[104107.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba4ba0] width 1920 pitch 7680 (/4 1920)
>[104107.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea6a0]
>[104107.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea6a0] width 1920 pitch 7680 (/4 1920)
>[104114.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0fc00]
>[104114.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0fc00] width 1920 pitch 7680 (/4 1920)
>[104114.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b10470]
>[104114.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b10470] width 1920 pitch 7680 (/4 1920)
>[104114.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9c70]
>[104114.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9c70] width 1920 pitch 7680 (/4 1920)
>[104114.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b10470]
>[104114.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b10470] width 1920 pitch 7680 (/4 1920)
>[104115.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b10470]
>[104115.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b10470] width 1920 pitch 7680 (/4 1920)
>[104117.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9c70]
>[104117.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9c70] width 1920 pitch 7680 (/4 1920)
>[104117.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[104117.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[104117.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104117.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104117.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[104117.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[104118.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104118.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104118.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104118.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104118.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d45a60]
>[104118.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d45a60] width 1920 pitch 7680 (/4 1920)
>[104118.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f039c0]
>[104118.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f039c0] width 1920 pitch 7680 (/4 1920)
>[104148.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8c30]
>[104148.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8c30] width 1920 pitch 7680 (/4 1920)
>[104148.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931de0]
>[104148.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931de0] width 1920 pitch 7680 (/4 1920)
>[104148.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf1170]
>[104148.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf1170] width 1920 pitch 7680 (/4 1920)
>[104149.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931de0]
>[104149.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931de0] width 1920 pitch 7680 (/4 1920)
>[104153.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17080]
>[104153.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17080] width 1920 pitch 7680 (/4 1920)
>[104153.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20e60]
>[104153.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20e60] width 1920 pitch 7680 (/4 1920)
>[104153.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e6da0]
>[104153.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e6da0] width 1920 pitch 7680 (/4 1920)
>[104153.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded6a0]
>[104153.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded6a0] width 1920 pitch 7680 (/4 1920)
>[104160.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c82000]
>[104160.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c82000] width 1920 pitch 7680 (/4 1920)
>[104163.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81cf0]
>[104163.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81cf0] width 1920 pitch 7680 (/4 1920)
>[104163.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931de0]
>[104163.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931de0] width 1920 pitch 7680 (/4 1920)
>[104163.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20fc0]
>[104163.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20fc0] width 1920 pitch 7680 (/4 1920)
>[104163.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17080]
>[104163.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17080] width 1920 pitch 7680 (/4 1920)
>[104169.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fdce0]
>[104169.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fdce0] width 1920 pitch 7680 (/4 1920)
>[104169.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20fc0]
>[104169.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20fc0] width 1920 pitch 7680 (/4 1920)
>[104169.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92760]
>[104169.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92760] width 1920 pitch 7680 (/4 1920)
>[104169.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d67e60]
>[104169.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d67e60] width 1920 pitch 7680 (/4 1920)
>[104190.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d67e60]
>[104190.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d67e60] width 1920 pitch 7680 (/4 1920)
>[104295.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13a00]
>[104295.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13a00] width 1920 pitch 7680 (/4 1920)
>[104325.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13a00]
>[104325.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13a00] width 1920 pitch 7680 (/4 1920)
>[104355.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13a00]
>[104355.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13a00] width 1920 pitch 7680 (/4 1920)
>[104359.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13a00]
>[104359.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13a00] width 1920 pitch 7680 (/4 1920)
>[104359.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104359.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104359.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104359.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104359.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104359.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104359.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104359.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104359.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104359.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104359.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104359.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104359.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104360.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104360.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104360.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104360.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104360.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104360.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104360.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104360.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104360.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104360.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104360.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104360.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104360.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104360.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104360.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104360.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104360.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104360.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104360.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104360.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104360.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104361.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104361.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104361.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104361.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13a00]
>[104362.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13a00] width 1920 pitch 7680 (/4 1920)
>[104362.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104362.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e47090]
>[104362.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e47090] width 1920 pitch 7680 (/4 1920)
>[104362.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104362.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104370.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13a00]
>[104370.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13a00] width 1920 pitch 7680 (/4 1920)
>[104401.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d41fd0]
>[104401.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d41fd0] width 1920 pitch 7680 (/4 1920)
>[104402.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104402.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104403.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09010]
>[104403.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09010] width 1920 pitch 7680 (/4 1920)
>[104558.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f860]
>[104558.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f860] width 1920 pitch 7680 (/4 1920)
>[104560.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81280]
>[104560.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81280] width 1920 pitch 7680 (/4 1920)
>[104562.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f860]
>[104562.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f860] width 1920 pitch 7680 (/4 1920)
>[104562.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dab870]
>[104562.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dab870] width 1920 pitch 7680 (/4 1920)
>[104562.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392f0e0]
>[104562.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392f0e0] width 1920 pitch 7680 (/4 1920)
>[104568.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeb0f0]
>[104568.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeb0f0] width 1920 pitch 7680 (/4 1920)
>[104569.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104569.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104569.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab0d70]
>[104569.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab0d70] width 1920 pitch 7680 (/4 1920)
>[104586.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a36310]
>[104586.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a36310] width 1920 pitch 7680 (/4 1920)
>[104586.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abaac0]
>[104586.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abaac0] width 1920 pitch 7680 (/4 1920)
>[104586.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7f70]
>[104586.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7f70] width 1920 pitch 7680 (/4 1920)
>[104586.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb82b0]
>[104586.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb82b0] width 1920 pitch 7680 (/4 1920)
>[104587.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7f70]
>[104587.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7f70] width 1920 pitch 7680 (/4 1920)
>[104587.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0c520]
>[104587.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0c520] width 1920 pitch 7680 (/4 1920)
>[104587.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abaf00]
>[104587.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abaf00] width 1920 pitch 7680 (/4 1920)
>[104587.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fef0]
>[104587.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fef0] width 1920 pitch 7680 (/4 1920)
>[104587.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0c520]
>[104587.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0c520] width 1920 pitch 7680 (/4 1920)
>[104587.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80f40]
>[104587.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80f40] width 1920 pitch 7680 (/4 1920)
>[104587.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e95a0]
>[104587.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e95a0] width 1920 pitch 7680 (/4 1920)
>[104587.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246fef0]
>[104587.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246fef0] width 1920 pitch 7680 (/4 1920)
>[104587.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e95a0]
>[104587.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e95a0] width 1920 pitch 7680 (/4 1920)
>[104591.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb290]
>[104591.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb290] width 1920 pitch 7680 (/4 1920)
>[104592.412] GetModeLine - scrn: 0 clock: 148500
>[104592.412] GetModeLine - hdsp: 1920 hbeg: 2008 hend: 2052 httl: 2200
>[104592.412]               vdsp: 1080 vbeg: 1084 vend: 1089 vttl: 1125 flags: 5
>[104592.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a37b30]
>[104592.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a37b30] width 1920 pitch 7680 (/4 1920)
>[104592.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104592.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104592.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a37b30]
>[104592.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a37b30] width 1920 pitch 7680 (/4 1920)
>[104593.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104593.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104593.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104593.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8ff0]
>[104593.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8ff0] width 1920 pitch 7680 (/4 1920)
>[104594.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104594.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104594.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104594.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104594.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104594.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104594.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92a50]
>[104594.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92a50] width 1920 pitch 7680 (/4 1920)
>[104594.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78f0]
>[104594.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78f0] width 1920 pitch 7680 (/4 1920)
>[104595.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d040]
>[104595.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d040] width 1920 pitch 7680 (/4 1920)
>[104595.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104595.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca5c0]
>[104597.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca5c0] width 1920 pitch 7680 (/4 1920)
>[104597.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca5c0]
>[104597.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca5c0] width 1920 pitch 7680 (/4 1920)
>[104597.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca5c0]
>[104597.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca5c0] width 1920 pitch 7680 (/4 1920)
>[104597.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca5c0]
>[104597.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca5c0] width 1920 pitch 7680 (/4 1920)
>[104597.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caaf20]
>[104597.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caaf20] width 1920 pitch 7680 (/4 1920)
>[104597.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caaf20]
>[104597.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caaf20] width 1920 pitch 7680 (/4 1920)
>[104597.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104597.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104597.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caaf20]
>[104597.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caaf20] width 1920 pitch 7680 (/4 1920)
>[104610.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05250]
>[104610.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05250] width 1920 pitch 7680 (/4 1920)
>[104611.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d06e70]
>[104611.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d06e70] width 1920 pitch 7680 (/4 1920)
>[104611.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d06e70]
>[104611.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d06e70] width 1920 pitch 7680 (/4 1920)
>[104615.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05320]
>[104615.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05320] width 1920 pitch 7680 (/4 1920)
>[104615.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc79d0]
>[104615.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc79d0] width 1920 pitch 7680 (/4 1920)
>[104615.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05320]
>[104615.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05320] width 1920 pitch 7680 (/4 1920)
>[104615.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc79d0]
>[104615.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc79d0] width 1920 pitch 7680 (/4 1920)
>[104618.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e520]
>[104618.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e520] width 1920 pitch 7680 (/4 1920)
>[104618.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca560]
>[104618.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca560] width 1920 pitch 7680 (/4 1920)
>[104618.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[104618.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[104618.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca560]
>[104618.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca560] width 1920 pitch 7680 (/4 1920)
>[104618.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[104618.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[104618.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39ea0]
>[104618.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39ea0] width 1920 pitch 7680 (/4 1920)
>[104618.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b83ef0]
>[104618.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b83ef0] width 1920 pitch 7680 (/4 1920)
>[104618.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104618.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104618.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b83ef0]
>[104618.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b83ef0] width 1920 pitch 7680 (/4 1920)
>[104618.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104618.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104618.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c97460]
>[104618.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c97460] width 1920 pitch 7680 (/4 1920)
>[104620.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5ccc0]
>[104620.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5ccc0] width 1920 pitch 7680 (/4 1920)
>[104620.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104620.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104620.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d552b0]
>[104620.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d552b0] width 1920 pitch 7680 (/4 1920)
>[104620.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5ccc0]
>[104620.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5ccc0] width 1920 pitch 7680 (/4 1920)
>[104620.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104620.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104620.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5ccc0]
>[104620.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5ccc0] width 1920 pitch 7680 (/4 1920)
>[104620.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104620.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104620.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5ccc0]
>[104620.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5ccc0] width 1920 pitch 7680 (/4 1920)
>[104620.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c44880]
>[104620.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c44880] width 1920 pitch 7680 (/4 1920)
>[104620.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d552b0]
>[104621.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d552b0] width 1920 pitch 7680 (/4 1920)
>[104621.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104621.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104621.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de4b60]
>[104621.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de4b60] width 1920 pitch 7680 (/4 1920)
>[104637.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efc680]
>[104637.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efc680] width 1920 pitch 7680 (/4 1920)
>[104638.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2590]
>[104638.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2590] width 1920 pitch 7680 (/4 1920)
>[104638.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d056b0]
>[104638.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d056b0] width 1920 pitch 7680 (/4 1920)
>[104657.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32660]
>[104657.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32660] width 1920 pitch 7680 (/4 1920)
>[104670.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cd40]
>[104670.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cd40] width 1920 pitch 7680 (/4 1920)
>[104675.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb0110]
>[104675.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb0110] width 1920 pitch 7680 (/4 1920)
>[104675.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a71da0]
>[104675.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a71da0] width 1920 pitch 7680 (/4 1920)
>[104675.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6040]
>[104675.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6040] width 1920 pitch 7680 (/4 1920)
>[104675.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c97520]
>[104675.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c97520] width 1920 pitch 7680 (/4 1920)
>[104675.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6040]
>[104675.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6040] width 1920 pitch 7680 (/4 1920)
>[104682.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f0780]
>[104682.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f0780] width 1920 pitch 7680 (/4 1920)
>[104682.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04560]
>[104682.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04560] width 1920 pitch 7680 (/4 1920)
>[104685.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04560]
>[104685.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04560] width 1920 pitch 7680 (/4 1920)
>[104697.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[104697.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[104697.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16970]
>[104697.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16970] width 1920 pitch 7680 (/4 1920)
>[104697.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104697.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104698.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05810]
>[104698.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05810] width 1920 pitch 7680 (/4 1920)
>[104698.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104698.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104699.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104699.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104699.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104699.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104699.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104699.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104699.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104699.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104699.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104699.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104699.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104699.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104699.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104699.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104700.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104700.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104700.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104700.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104700.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104700.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104700.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104700.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104700.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104700.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104700.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104700.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104700.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[104700.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[104701.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3a2a0]
>[104701.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3a2a0] width 1920 pitch 7680 (/4 1920)
>[104701.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75980]
>[104701.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75980] width 1920 pitch 7680 (/4 1920)
>[104701.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104701.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104701.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81280]
>[104701.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81280] width 1920 pitch 7680 (/4 1920)
>[104701.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104701.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104701.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81280]
>[104701.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81280] width 1920 pitch 7680 (/4 1920)
>[104701.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104701.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104701.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81280]
>[104701.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81280] width 1920 pitch 7680 (/4 1920)
>[104701.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104701.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104715.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81280]
>[104715.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81280] width 1920 pitch 7680 (/4 1920)
>[104729.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104729.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104729.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d360b0]
>[104729.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d360b0] width 1920 pitch 7680 (/4 1920)
>[104729.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104729.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104729.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d360b0]
>[104729.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d360b0] width 1920 pitch 7680 (/4 1920)
>[104729.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[104729.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[104729.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d360b0]
>[104729.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d360b0] width 1920 pitch 7680 (/4 1920)
>[104775.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[104775.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[104790.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4ca0]
>[104790.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4ca0] width 1920 pitch 7680 (/4 1920)
>[104820.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8ea10]
>[104820.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8ea10] width 1920 pitch 7680 (/4 1920)
>[104835.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912fe0]
>[104835.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912fe0] width 1920 pitch 7680 (/4 1920)
>[104865.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912fe0]
>[104865.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912fe0] width 1920 pitch 7680 (/4 1920)
>[104880.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[104880.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105030.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105030.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105045.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105045.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105079.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105079.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105079.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105079.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105079.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105079.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105079.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105079.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105079.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105081.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f690]
>[105081.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f690] width 1920 pitch 7680 (/4 1920)
>[105082.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6c4d0]
>[105082.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6c4d0] width 1920 pitch 7680 (/4 1920)
>[105082.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c39080]
>[105082.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c39080] width 1920 pitch 7680 (/4 1920)
>[105082.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c39080]
>[105082.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c39080] width 1920 pitch 7680 (/4 1920)
>[105082.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c39080]
>[105082.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c39080] width 1920 pitch 7680 (/4 1920)
>[105082.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c39080]
>[105082.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c39080] width 1920 pitch 7680 (/4 1920)
>[105082.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105082.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105082.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530040]
>[105082.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530040] width 1920 pitch 7680 (/4 1920)
>[105082.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105082.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105082.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2530040]
>[105082.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2530040] width 1920 pitch 7680 (/4 1920)
>[105082.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105082.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105082.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d4ff10]
>[105082.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d4ff10] width 1920 pitch 7680 (/4 1920)
>[105082.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105082.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105082.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105082.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105082.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105082.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105082.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105082.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105082.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105082.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105082.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105082.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105082.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105082.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105082.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105083.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105083.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d30]
>[105083.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d30] width 1920 pitch 7680 (/4 1920)
>[105092.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccab90]
>[105092.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccab90] width 1920 pitch 7680 (/4 1920)
>[105092.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ff70]
>[105092.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ff70] width 1920 pitch 7680 (/4 1920)
>[105092.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40bd0]
>[105092.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40bd0] width 1920 pitch 7680 (/4 1920)
>[105092.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ff70]
>[105092.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ff70] width 1920 pitch 7680 (/4 1920)
>[105150.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105150.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105165.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105165.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105180.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105180.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105195.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105195.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105200.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105200.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105200.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105200.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105202.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105202.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105202.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[105202.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[105202.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105202.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105247.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105247.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105247.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105247.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105247.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105247.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105247.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105247.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105315.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105315.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105330.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105330.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105345.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105345.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105360.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105360.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105375.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105375.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105390.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54700]
>[105390.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54700] width 1920 pitch 7680 (/4 1920)
>[105420.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105420.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105435.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105435.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105446.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105446.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105446.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105446.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105446.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105446.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105446.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54700]
>[105446.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54700] width 1920 pitch 7680 (/4 1920)
>[105446.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105446.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105446.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[105446.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[105446.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105446.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105446.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[105446.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[105446.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105446.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105446.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[105446.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[105446.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105446.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105446.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105446.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105446.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105446.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105446.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[105446.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[105448.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105448.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105450.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a688e0]
>[105450.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a688e0] width 1920 pitch 7680 (/4 1920)
>[105450.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105450.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105450.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105450.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105450.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105450.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105450.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[105450.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[105450.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54700]
>[105450.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54700] width 1920 pitch 7680 (/4 1920)
>[105450.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[105450.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[105450.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a640]
>[105450.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a640] width 1920 pitch 7680 (/4 1920)
>[105450.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105450.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105450.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105450.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105450.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105450.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105450.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105450.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105450.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105450.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105450.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105450.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105450.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105450.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105450.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105450.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105450.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105450.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105450.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105451.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105451.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105451.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251dbb0]
>[105451.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251dbb0] width 1920 pitch 7680 (/4 1920)
>[105451.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105451.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105451.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105451.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105451.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105451.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105451.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105451.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105451.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105451.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105451.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105451.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105451.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f960]
>[105451.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f960] width 1920 pitch 7680 (/4 1920)
>[105451.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251dbb0]
>[105451.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251dbb0] width 1920 pitch 7680 (/4 1920)
>[105451.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db020]
>[105451.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db020] width 1920 pitch 7680 (/4 1920)
>[105451.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84930]
>[105451.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84930] width 1920 pitch 7680 (/4 1920)
>[105451.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cccbe0]
>[105451.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cccbe0] width 1920 pitch 7680 (/4 1920)
>[105451.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05920]
>[105451.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05920] width 1920 pitch 7680 (/4 1920)
>[105459.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30de0]
>[105459.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30de0] width 1920 pitch 7680 (/4 1920)
>[105459.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04470]
>[105459.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04470] width 1920 pitch 7680 (/4 1920)
>[105459.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed4f0]
>[105459.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed4f0] width 1920 pitch 7680 (/4 1920)
>[105461.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed4f0]
>[105461.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed4f0] width 1920 pitch 7680 (/4 1920)
>[105461.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed5e0]
>[105461.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed5e0] width 1920 pitch 7680 (/4 1920)
>[105461.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5d6e0]
>[105461.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5d6e0] width 1920 pitch 7680 (/4 1920)
>[105461.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed4f0]
>[105461.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed4f0] width 1920 pitch 7680 (/4 1920)
>[105462.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed5e0]
>[105462.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed5e0] width 1920 pitch 7680 (/4 1920)
>[105462.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0c20]
>[105462.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0c20] width 1920 pitch 7680 (/4 1920)
>[105462.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04470]
>[105462.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04470] width 1920 pitch 7680 (/4 1920)
>[105462.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffbd90]
>[105462.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffbd90] width 1920 pitch 7680 (/4 1920)
>[105462.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5ced0]
>[105462.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5ced0] width 1920 pitch 7680 (/4 1920)
>[105465.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbdbe0]
>[105465.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbdbe0] width 1920 pitch 7680 (/4 1920)
>[105465.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eecb80]
>[105465.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eecb80] width 1920 pitch 7680 (/4 1920)
>[105465.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed520]
>[105465.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed520] width 1920 pitch 7680 (/4 1920)
>[105466.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a64920]
>[105466.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a64920] width 1920 pitch 7680 (/4 1920)
>[105466.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed520]
>[105466.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed520] width 1920 pitch 7680 (/4 1920)
>[105466.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cb80]
>[105466.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cb80] width 1920 pitch 7680 (/4 1920)
>[105466.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eed520]
>[105466.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eed520] width 1920 pitch 7680 (/4 1920)
>[105467.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7ef0]
>[105467.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7ef0] width 1920 pitch 7680 (/4 1920)
>[105467.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cb80]
>[105467.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cb80] width 1920 pitch 7680 (/4 1920)
>[105467.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a06a20]
>[105467.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a06a20] width 1920 pitch 7680 (/4 1920)
>[105467.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a13790]
>[105467.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a13790] width 1920 pitch 7680 (/4 1920)
>[105467.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503cb80]
>[105467.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503cb80] width 1920 pitch 7680 (/4 1920)
>[105469.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad900]
>[105469.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad900] width 1920 pitch 7680 (/4 1920)
>[105470.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb5600]
>[105470.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb5600] width 1920 pitch 7680 (/4 1920)
>[105470.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb55e0]
>[105470.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb55e0] width 1920 pitch 7680 (/4 1920)
>[105471.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48400]
>[105471.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48400] width 1920 pitch 7680 (/4 1920)
>[105471.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a12410]
>[105471.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a12410] width 1920 pitch 7680 (/4 1920)
>[105471.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48400]
>[105471.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48400] width 1920 pitch 7680 (/4 1920)
>[105471.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a391e0]
>[105471.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a391e0] width 1920 pitch 7680 (/4 1920)
>[105472.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251e0a0]
>[105472.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251e0a0] width 1920 pitch 7680 (/4 1920)
>[105472.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a399b0]
>[105472.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a399b0] width 1920 pitch 7680 (/4 1920)
>[105472.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39320]
>[105472.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39320] width 1920 pitch 7680 (/4 1920)
>[105472.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41740]
>[105472.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41740] width 1920 pitch 7680 (/4 1920)
>[105472.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c92d60]
>[105472.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c92d60] width 1920 pitch 7680 (/4 1920)
>[105474.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7fa0]
>[105474.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7fa0] width 1920 pitch 7680 (/4 1920)
>[105474.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d0a0]
>[105474.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d0a0] width 1920 pitch 7680 (/4 1920)
>[105474.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74520]
>[105474.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74520] width 1920 pitch 7680 (/4 1920)
>[105474.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d0a0]
>[105474.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d0a0] width 1920 pitch 7680 (/4 1920)
>[105474.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74520]
>[105474.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74520] width 1920 pitch 7680 (/4 1920)
>[105474.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d0a0]
>[105474.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d0a0] width 1920 pitch 7680 (/4 1920)
>[105474.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74520]
>[105474.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74520] width 1920 pitch 7680 (/4 1920)
>[105474.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d0a0]
>[105474.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d0a0] width 1920 pitch 7680 (/4 1920)
>[105474.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f0f0]
>[105474.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f0f0] width 1920 pitch 7680 (/4 1920)
>[105475.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a720e0]
>[105475.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a720e0] width 1920 pitch 7680 (/4 1920)
>[105475.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7fa0]
>[105475.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7fa0] width 1920 pitch 7680 (/4 1920)
>[105475.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b81d30]
>[105475.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b81d30] width 1920 pitch 7680 (/4 1920)
>[105475.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74520]
>[105475.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74520] width 1920 pitch 7680 (/4 1920)
>[105475.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b81d30]
>[105475.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b81d30] width 1920 pitch 7680 (/4 1920)
>[105475.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[105475.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[105475.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251dca0]
>[105475.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251dca0] width 1920 pitch 7680 (/4 1920)
>[105475.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[105475.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[105475.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251dca0]
>[105475.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251dca0] width 1920 pitch 7680 (/4 1920)
>[105475.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[105476.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[105476.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251dca0]
>[105476.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251dca0] width 1920 pitch 7680 (/4 1920)
>[105476.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[105476.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[105476.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251dca0]
>[105476.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251dca0] width 1920 pitch 7680 (/4 1920)
>[105476.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83510]
>[105476.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83510] width 1920 pitch 7680 (/4 1920)
>[105476.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105476.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105476.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d42190]
>[105476.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d42190] width 1920 pitch 7680 (/4 1920)
>[105476.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[105476.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[105476.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105476.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105476.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989bd0]
>[105476.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989bd0] width 1920 pitch 7680 (/4 1920)
>[105476.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105476.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105477.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989bd0]
>[105477.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989bd0] width 1920 pitch 7680 (/4 1920)
>[105477.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105477.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105477.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989bd0]
>[105477.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989bd0] width 1920 pitch 7680 (/4 1920)
>[105477.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105477.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105477.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989bd0]
>[105477.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989bd0] width 1920 pitch 7680 (/4 1920)
>[105477.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105477.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105477.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989bd0]
>[105477.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989bd0] width 1920 pitch 7680 (/4 1920)
>[105477.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105477.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105477.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989bd0]
>[105477.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989bd0] width 1920 pitch 7680 (/4 1920)
>[105477.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105477.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105477.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[105477.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[105477.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254f160]
>[105477.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254f160] width 1920 pitch 7680 (/4 1920)
>[105504.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105504.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105540.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d420a0]
>[105540.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d420a0] width 1920 pitch 7680 (/4 1920)
>[105552.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d420a0]
>[105552.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d420a0] width 1920 pitch 7680 (/4 1920)
>[105553.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[105553.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[105553.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ffb0]
>[105553.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ffb0] width 1920 pitch 7680 (/4 1920)
>[105553.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[105553.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[105555.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[105555.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[105585.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca1e0]
>[105585.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca1e0] width 1920 pitch 7680 (/4 1920)
>[105600.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d420a0]
>[105600.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d420a0] width 1920 pitch 7680 (/4 1920)
>[105675.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f110]
>[105675.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f110] width 1920 pitch 7680 (/4 1920)
>[105690.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d420a0]
>[105690.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d420a0] width 1920 pitch 7680 (/4 1920)
>[105737.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea7ab0]
>[105737.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea7ab0] width 1920 pitch 7680 (/4 1920)
>[105737.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73e50]
>[105737.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73e50] width 1920 pitch 7680 (/4 1920)
>[105737.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65da0]
>[105737.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65da0] width 1920 pitch 7680 (/4 1920)
>[105737.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98b30]
>[105737.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98b30] width 1920 pitch 7680 (/4 1920)
>[105747.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3989b40]
>[105747.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3989b40] width 1920 pitch 7680 (/4 1920)
>[105747.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb2860]
>[105747.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb2860] width 1920 pitch 7680 (/4 1920)
>[105747.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54340]
>[105747.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54340] width 1920 pitch 7680 (/4 1920)
>[105747.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb2860]
>[105747.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb2860] width 1920 pitch 7680 (/4 1920)
>[105758.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54340]
>[105758.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54340] width 1920 pitch 7680 (/4 1920)
>[105758.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105758.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105758.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105758.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105758.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105758.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105785.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105785.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105786.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105786.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105786.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105786.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105786.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105786.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105787.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54340]
>[105787.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54340] width 1920 pitch 7680 (/4 1920)
>[105787.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b54340]
>[105787.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b54340] width 1920 pitch 7680 (/4 1920)
>[105787.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105787.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105787.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[105787.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[105810.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105810.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105825.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105825.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105828.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105828.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105828.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105828.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105828.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105828.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105828.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105828.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105828.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105828.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105828.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105828.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105828.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105828.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105828.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105828.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105828.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105828.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105829.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105829.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105829.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105829.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105829.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105829.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105829.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105829.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105829.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105829.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105829.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105829.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105829.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105829.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105829.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105829.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105829.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105829.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105829.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105829.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105829.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105829.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105830.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105830.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105830.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105830.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105830.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105830.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105855.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a939e0]
>[105855.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a939e0] width 1920 pitch 7680 (/4 1920)
>[105870.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11f20]
>[105870.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11f20] width 1920 pitch 7680 (/4 1920)
>[105874.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105874.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105874.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5e790]
>[105874.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5e790] width 1920 pitch 7680 (/4 1920)
>[105874.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105874.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105874.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5e790]
>[105874.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5e790] width 1920 pitch 7680 (/4 1920)
>[105874.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105874.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105874.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5e790]
>[105874.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5e790] width 1920 pitch 7680 (/4 1920)
>[105874.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105874.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105874.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5e790]
>[105874.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5e790] width 1920 pitch 7680 (/4 1920)
>[105874.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105874.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105874.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15f50]
>[105874.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15f50] width 1920 pitch 7680 (/4 1920)
>[105875.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105875.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105875.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15f50]
>[105875.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15f50] width 1920 pitch 7680 (/4 1920)
>[105875.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105875.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105875.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5e790]
>[105875.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5e790] width 1920 pitch 7680 (/4 1920)
>[105875.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105875.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105875.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15f50]
>[105875.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15f50] width 1920 pitch 7680 (/4 1920)
>[105875.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99740]
>[105875.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99740] width 1920 pitch 7680 (/4 1920)
>[105876.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15f50]
>[105876.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15f50] width 1920 pitch 7680 (/4 1920)
>[105876.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bff60]
>[105876.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bff60] width 1920 pitch 7680 (/4 1920)
>[105877.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5e790]
>[105877.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5e790] width 1920 pitch 7680 (/4 1920)
>[105878.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2563140]
>[105878.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2563140] width 1920 pitch 7680 (/4 1920)
>[105878.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5b00]
>[105878.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5b00] width 1920 pitch 7680 (/4 1920)
>[105879.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566520]
>[105879.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566520] width 1920 pitch 7680 (/4 1920)
>[105879.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[105879.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[105879.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105879.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105879.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968400]
>[105879.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968400] width 1920 pitch 7680 (/4 1920)
>[105879.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105879.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105879.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968400]
>[105880.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968400] width 1920 pitch 7680 (/4 1920)
>[105880.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105880.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105880.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968400]
>[105880.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968400] width 1920 pitch 7680 (/4 1920)
>[105880.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105880.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105880.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6f460]
>[105880.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6f460] width 1920 pitch 7680 (/4 1920)
>[105885.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bff60]
>[105885.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bff60] width 1920 pitch 7680 (/4 1920)
>[105888.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05be0]
>[105888.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05be0] width 1920 pitch 7680 (/4 1920)
>[105889.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abd6a0]
>[105889.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abd6a0] width 1920 pitch 7680 (/4 1920)
>[105889.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abd6a0]
>[105889.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abd6a0] width 1920 pitch 7680 (/4 1920)
>[105890.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8d270]
>[105890.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8d270] width 1920 pitch 7680 (/4 1920)
>[105890.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0fd80]
>[105890.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0fd80] width 1920 pitch 7680 (/4 1920)
>[105890.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8d270]
>[105890.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8d270] width 1920 pitch 7680 (/4 1920)
>[105890.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b5f0]
>[105890.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b5f0] width 1920 pitch 7680 (/4 1920)
>[105891.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8d270]
>[105891.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8d270] width 1920 pitch 7680 (/4 1920)
>[105891.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03030]
>[105891.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03030] width 1920 pitch 7680 (/4 1920)
>[105891.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8d270]
>[105891.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8d270] width 1920 pitch 7680 (/4 1920)
>[105891.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f46b20]
>[105891.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f46b20] width 1920 pitch 7680 (/4 1920)
>[105891.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd1170]
>[105891.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd1170] width 1920 pitch 7680 (/4 1920)
>[105894.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5190]
>[105894.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5190] width 1920 pitch 7680 (/4 1920)
>[105894.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464cb0]
>[105894.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464cb0] width 1920 pitch 7680 (/4 1920)
>[105894.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2464cd0]
>[105894.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2464cd0] width 1920 pitch 7680 (/4 1920)
>[105895.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abaf80]
>[105895.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abaf80] width 1920 pitch 7680 (/4 1920)
>[105895.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87100]
>[105895.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87100] width 1920 pitch 7680 (/4 1920)
>[105895.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a09b20]
>[105895.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a09b20] width 1920 pitch 7680 (/4 1920)
>[105895.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e46f0]
>[105895.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e46f0] width 1920 pitch 7680 (/4 1920)
>[105896.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce42c0]
>[105896.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce42c0] width 1920 pitch 7680 (/4 1920)
>[105896.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce42c0]
>[105896.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce42c0] width 1920 pitch 7680 (/4 1920)
>[105896.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79720]
>[105896.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79720] width 1920 pitch 7680 (/4 1920)
>[105896.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a094e0]
>[105896.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a094e0] width 1920 pitch 7680 (/4 1920)
>[105896.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c81fa0]
>[105896.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c81fa0] width 1920 pitch 7680 (/4 1920)
>[105899.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c58a30]
>[105899.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c58a30] width 1920 pitch 7680 (/4 1920)
>[105899.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc7690]
>[105899.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc7690] width 1920 pitch 7680 (/4 1920)
>[105899.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc7740]
>[105899.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc7740] width 1920 pitch 7680 (/4 1920)
>[105900.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42e40]
>[105900.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42e40] width 1920 pitch 7680 (/4 1920)
>[105900.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc75f0]
>[105900.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc75f0] width 1920 pitch 7680 (/4 1920)
>[105900.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efb0e0]
>[105900.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efb0e0] width 1920 pitch 7680 (/4 1920)
>[105900.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc78d0]
>[105900.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc78d0] width 1920 pitch 7680 (/4 1920)
>[105901.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efb0e0]
>[105901.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efb0e0] width 1920 pitch 7680 (/4 1920)
>[105901.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a266b0]
>[105901.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a266b0] width 1920 pitch 7680 (/4 1920)
>[105901.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3927c80]
>[105901.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3927c80] width 1920 pitch 7680 (/4 1920)
>[105901.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3accaa0]
>[105901.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3accaa0] width 1920 pitch 7680 (/4 1920)
>[105901.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c680]
>[105901.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c680] width 1920 pitch 7680 (/4 1920)
>[105901.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[105901.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[105902.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c41ef0]
>[105902.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c41ef0] width 1920 pitch 7680 (/4 1920)
>[105902.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909e90]
>[105902.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909e90] width 1920 pitch 7680 (/4 1920)
>[105902.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c680]
>[105902.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c680] width 1920 pitch 7680 (/4 1920)
>[105902.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909e90]
>[105902.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909e90] width 1920 pitch 7680 (/4 1920)
>[105902.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c680]
>[105902.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c680] width 1920 pitch 7680 (/4 1920)
>[105902.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909e90]
>[105902.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909e90] width 1920 pitch 7680 (/4 1920)
>[105902.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c680]
>[105902.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c680] width 1920 pitch 7680 (/4 1920)
>[105902.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[105902.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[105902.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105902.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105903.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[105903.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[105903.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105903.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105903.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[105903.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[105903.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80500]
>[105903.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80500] width 1920 pitch 7680 (/4 1920)
>[105903.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2120]
>[105903.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2120] width 1920 pitch 7680 (/4 1920)
>[105903.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968400]
>[105904.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968400] width 1920 pitch 7680 (/4 1920)
>[105904.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2120]
>[105904.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2120] width 1920 pitch 7680 (/4 1920)
>[105904.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6f460]
>[105904.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6f460] width 1920 pitch 7680 (/4 1920)
>[105904.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[105904.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[105904.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6f460]
>[105904.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6f460] width 1920 pitch 7680 (/4 1920)
>[105904.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[105904.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[105904.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c41ef0]
>[105904.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c41ef0] width 1920 pitch 7680 (/4 1920)
>[105904.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[105904.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[105904.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c41ef0]
>[105904.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c41ef0] width 1920 pitch 7680 (/4 1920)
>[105904.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7170]
>[105904.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7170] width 1920 pitch 7680 (/4 1920)
>[105969.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be2c00]
>[105969.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be2c00] width 1920 pitch 7680 (/4 1920)
>[105969.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89630]
>[105969.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89630] width 1920 pitch 7680 (/4 1920)
>[105969.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75650]
>[105969.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75650] width 1920 pitch 7680 (/4 1920)
>[105969.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad840]
>[105969.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad840] width 1920 pitch 7680 (/4 1920)
>[105971.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b94cc0]
>[105971.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b94cc0] width 1920 pitch 7680 (/4 1920)
>[105972.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75650]
>[105972.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75650] width 1920 pitch 7680 (/4 1920)
>[105972.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75650]
>[105972.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75650] width 1920 pitch 7680 (/4 1920)
>[105972.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b529e0]
>[105972.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b529e0] width 1920 pitch 7680 (/4 1920)
>[106064.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106064.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106064.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106064.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106064.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106064.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106064.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106064.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106064.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05d20]
>[106064.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05d20] width 1920 pitch 7680 (/4 1920)
>[106064.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106064.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106064.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05d20]
>[106064.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05d20] width 1920 pitch 7680 (/4 1920)
>[106064.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106064.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106064.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05d20]
>[106064.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05d20] width 1920 pitch 7680 (/4 1920)
>[106064.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106064.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106064.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05d20]
>[106064.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05d20] width 1920 pitch 7680 (/4 1920)
>[106064.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106064.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106065.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05d20]
>[106065.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05d20] width 1920 pitch 7680 (/4 1920)
>[106072.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106072.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106072.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106072.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106072.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106072.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106072.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8fd0]
>[106072.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8fd0] width 1920 pitch 7680 (/4 1920)
>[106072.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106072.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106110.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106110.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106125.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05d20]
>[106125.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05d20] width 1920 pitch 7680 (/4 1920)
>[106170.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106170.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106200.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106200.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106218.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106218.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106218.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106218.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106218.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[106218.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[106218.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106218.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106218.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106218.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106218.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106218.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106218.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106218.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106218.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7b60]
>[106218.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7b60] width 1920 pitch 7680 (/4 1920)
>[106222.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1cc20]
>[106222.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1cc20] width 1920 pitch 7680 (/4 1920)
>[106222.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106222.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106222.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106222.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106222.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106222.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106222.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106222.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106222.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106222.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106222.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106222.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106222.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106222.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106222.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106222.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106222.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb80e0]
>[106222.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb80e0] width 1920 pitch 7680 (/4 1920)
>[106222.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5cf0]
>[106222.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5cf0] width 1920 pitch 7680 (/4 1920)
>[106230.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[106230.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[106260.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1c30]
>[106260.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1c30] width 1920 pitch 7680 (/4 1920)
>[106409.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106409.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106409.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106410.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106410.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106410.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106410.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdc710]
>[106410.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdc710] width 1920 pitch 7680 (/4 1920)
>[106410.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106410.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106410.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdc710]
>[106410.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdc710] width 1920 pitch 7680 (/4 1920)
>[106410.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106410.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106410.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdc710]
>[106410.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdc710] width 1920 pitch 7680 (/4 1920)
>[106410.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106410.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106410.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdc710]
>[106410.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdc710] width 1920 pitch 7680 (/4 1920)
>[106410.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106410.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106410.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdc710]
>[106410.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdc710] width 1920 pitch 7680 (/4 1920)
>[106410.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106410.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106413.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106413.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106413.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106413.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106413.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106413.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106413.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106413.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106413.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5a930]
>[106413.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5a930] width 1920 pitch 7680 (/4 1920)
>[106413.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106413.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106423.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0e550]
>[106423.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0e550] width 1920 pitch 7680 (/4 1920)
>[106423.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8ce0]
>[106423.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8ce0] width 1920 pitch 7680 (/4 1920)
>[106423.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8c80]
>[106423.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8c80] width 1920 pitch 7680 (/4 1920)
>[106423.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106423.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106423.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8c80]
>[106423.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8c80] width 1920 pitch 7680 (/4 1920)
>[106423.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106423.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106423.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0cce0]
>[106423.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0cce0] width 1920 pitch 7680 (/4 1920)
>[106423.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106423.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106423.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0cce0]
>[106423.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0cce0] width 1920 pitch 7680 (/4 1920)
>[106423.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106423.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106423.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0cce0]
>[106423.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0cce0] width 1920 pitch 7680 (/4 1920)
>[106423.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106423.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106423.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0cce0]
>[106424.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0cce0] width 1920 pitch 7680 (/4 1920)
>[106424.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8dce0]
>[106424.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8dce0] width 1920 pitch 7680 (/4 1920)
>[106424.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0cce0]
>[106424.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0cce0] width 1920 pitch 7680 (/4 1920)
>[106425.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106425.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106425.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106425.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0daf0]
>[106425.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0daf0] width 1920 pitch 7680 (/4 1920)
>[106432.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d780]
>[106432.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d780] width 1920 pitch 7680 (/4 1920)
>[106464.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106464.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106464.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106464.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106464.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106464.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106464.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106464.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106464.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106464.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106464.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106464.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106464.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106464.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106464.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106464.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106464.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106464.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106464.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106464.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106464.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106464.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106464.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106464.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106464.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106464.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106464.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106464.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106465.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05410]
>[106465.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05410] width 1920 pitch 7680 (/4 1920)
>[106466.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106466.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106466.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f580]
>[106466.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f580] width 1920 pitch 7680 (/4 1920)
>[106466.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106466.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106466.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106466.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106466.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106466.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106466.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106466.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106466.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106466.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106466.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106466.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106466.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89fe0]
>[106466.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89fe0] width 1920 pitch 7680 (/4 1920)
>[106466.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89ca0]
>[106466.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89ca0] width 1920 pitch 7680 (/4 1920)
>[106466.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89fe0]
>[106466.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89fe0] width 1920 pitch 7680 (/4 1920)
>[106466.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89ca0]
>[106466.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89ca0] width 1920 pitch 7680 (/4 1920)
>[106466.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106466.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106466.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b7a0]
>[106466.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b7a0] width 1920 pitch 7680 (/4 1920)
>[106466.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106466.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106466.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b7a0]
>[106466.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b7a0] width 1920 pitch 7680 (/4 1920)
>[106466.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106466.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106466.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b7a0]
>[106466.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b7a0] width 1920 pitch 7680 (/4 1920)
>[106466.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106466.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106466.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89ca0]
>[106466.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89ca0] width 1920 pitch 7680 (/4 1920)
>[106467.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a3d0]
>[106467.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a3d0] width 1920 pitch 7680 (/4 1920)
>[106467.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106467.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106467.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106467.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106467.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a65800]
>[106467.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a65800] width 1920 pitch 7680 (/4 1920)
>[106467.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106467.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106467.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106467.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106467.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106467.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106467.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106467.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106467.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106467.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106467.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106467.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106467.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106467.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106467.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106467.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106467.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106467.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106467.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106467.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106469.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb500]
>[106469.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb500] width 1920 pitch 7680 (/4 1920)
>[106469.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ac20]
>[106469.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ac20] width 1920 pitch 7680 (/4 1920)
>[106469.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f820]
>[106469.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f820] width 1920 pitch 7680 (/4 1920)
>[106486.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106486.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106486.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106486.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106486.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106486.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106486.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106486.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106486.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106486.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106486.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106486.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106486.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106486.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106486.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106486.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106486.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106486.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106486.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106486.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106486.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106486.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106486.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106486.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106486.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106486.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106486.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106486.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106486.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106487.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106487.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f5f0]
>[106487.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f5f0] width 1920 pitch 7680 (/4 1920)
>[106487.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106487.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106487.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106487.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106487.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106487.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106487.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106487.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106487.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106487.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106487.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106487.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106487.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106487.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106487.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106487.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106487.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106487.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106487.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106487.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106487.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106487.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106487.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106487.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106487.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106487.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106487.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdd590]
>[106487.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdd590] width 1920 pitch 7680 (/4 1920)
>[106487.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3cf50]
>[106487.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3cf50] width 1920 pitch 7680 (/4 1920)
>[106487.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd13b0]
>[106487.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd13b0] width 1920 pitch 7680 (/4 1920)
>[106487.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3ab40]
>[106487.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3ab40] width 1920 pitch 7680 (/4 1920)
>[106489.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49260]
>[106489.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49260] width 1920 pitch 7680 (/4 1920)
>[106490.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede8f0]
>[106490.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede8f0] width 1920 pitch 7680 (/4 1920)
>[106490.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfa50]
>[106490.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfa50] width 1920 pitch 7680 (/4 1920)
>[106495.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2030]
>[106495.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2030] width 1920 pitch 7680 (/4 1920)
>[106495.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2170]
>[106495.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2170] width 1920 pitch 7680 (/4 1920)
>[106495.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1fb0]
>[106495.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1fb0] width 1920 pitch 7680 (/4 1920)
>[106495.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2260]
>[106495.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2260] width 1920 pitch 7680 (/4 1920)
>[106495.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2030]
>[106495.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2030] width 1920 pitch 7680 (/4 1920)
>[106495.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1330]
>[106495.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1330] width 1920 pitch 7680 (/4 1920)
>[106495.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1ef0]
>[106495.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1ef0] width 1920 pitch 7680 (/4 1920)
>[106495.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2170]
>[106495.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2170] width 1920 pitch 7680 (/4 1920)
>[106495.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbfb0]
>[106495.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbfb0] width 1920 pitch 7680 (/4 1920)
>[106495.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2170]
>[106495.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2170] width 1920 pitch 7680 (/4 1920)
>[106495.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbfb0]
>[106495.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbfb0] width 1920 pitch 7680 (/4 1920)
>[106495.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee2170]
>[106495.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee2170] width 1920 pitch 7680 (/4 1920)
>[106495.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbfb0]
>[106495.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbfb0] width 1920 pitch 7680 (/4 1920)
>[106495.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e844f0]
>[106495.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e844f0] width 1920 pitch 7680 (/4 1920)
>[106495.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbfb0]
>[106495.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbfb0] width 1920 pitch 7680 (/4 1920)
>[106495.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e844f0]
>[106495.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e844f0] width 1920 pitch 7680 (/4 1920)
>[106495.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbfb0]
>[106496.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbfb0] width 1920 pitch 7680 (/4 1920)
>[106497.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12150]
>[106497.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12150] width 1920 pitch 7680 (/4 1920)
>[106497.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90840]
>[106497.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90840] width 1920 pitch 7680 (/4 1920)
>[106497.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eecb80]
>[106497.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eecb80] width 1920 pitch 7680 (/4 1920)
>[106497.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e844f0]
>[106497.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e844f0] width 1920 pitch 7680 (/4 1920)
>[106497.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eecb80]
>[106497.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eecb80] width 1920 pitch 7680 (/4 1920)
>[106497.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0300]
>[106497.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0300] width 1920 pitch 7680 (/4 1920)
>[106497.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0300]
>[106497.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0300] width 1920 pitch 7680 (/4 1920)
>[106497.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90840]
>[106497.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90840] width 1920 pitch 7680 (/4 1920)
>[106497.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12150]
>[106497.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12150] width 1920 pitch 7680 (/4 1920)
>[106497.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91980]
>[106497.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91980] width 1920 pitch 7680 (/4 1920)
>[106497.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0300]
>[106497.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0300] width 1920 pitch 7680 (/4 1920)
>[106497.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90840]
>[106497.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90840] width 1920 pitch 7680 (/4 1920)
>[106497.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12150]
>[106497.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12150] width 1920 pitch 7680 (/4 1920)
>[106497.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91980]
>[106497.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91980] width 1920 pitch 7680 (/4 1920)
>[106497.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0300]
>[106497.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0300] width 1920 pitch 7680 (/4 1920)
>[106497.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90840]
>[106497.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90840] width 1920 pitch 7680 (/4 1920)
>[106505.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91980]
>[106505.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91980] width 1920 pitch 7680 (/4 1920)
>[106505.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0300]
>[106505.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0300] width 1920 pitch 7680 (/4 1920)
>[106505.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12150]
>[106505.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12150] width 1920 pitch 7680 (/4 1920)
>[106505.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0c80]
>[106505.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0c80] width 1920 pitch 7680 (/4 1920)
>[106505.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8bf80]
>[106505.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8bf80] width 1920 pitch 7680 (/4 1920)
>[106505.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d9b0]
>[106505.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d9b0] width 1920 pitch 7680 (/4 1920)
>[106505.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8bf80]
>[106505.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8bf80] width 1920 pitch 7680 (/4 1920)
>[106505.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d9b0]
>[106505.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d9b0] width 1920 pitch 7680 (/4 1920)
>[106505.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8bf80]
>[106505.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8bf80] width 1920 pitch 7680 (/4 1920)
>[106505.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d9b0]
>[106505.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d9b0] width 1920 pitch 7680 (/4 1920)
>[106505.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8bf80]
>[106506.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8bf80] width 1920 pitch 7680 (/4 1920)
>[106506.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d9b0]
>[106506.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d9b0] width 1920 pitch 7680 (/4 1920)
>[106506.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8bf80]
>[106506.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8bf80] width 1920 pitch 7680 (/4 1920)
>[106506.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d9b0]
>[106506.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d9b0] width 1920 pitch 7680 (/4 1920)
>[106507.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8bf80]
>[106507.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8bf80] width 1920 pitch 7680 (/4 1920)
>[106507.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0e50]
>[106507.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0e50] width 1920 pitch 7680 (/4 1920)
>[106507.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb8ad0]
>[106507.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb8ad0] width 1920 pitch 7680 (/4 1920)
>[106507.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0e50]
>[106507.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0e50] width 1920 pitch 7680 (/4 1920)
>[106507.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb8ad0]
>[106507.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb8ad0] width 1920 pitch 7680 (/4 1920)
>[106507.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0e50]
>[106507.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0e50] width 1920 pitch 7680 (/4 1920)
>[106507.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb8ad0]
>[106507.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb8ad0] width 1920 pitch 7680 (/4 1920)
>[106507.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0e50]
>[106507.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0e50] width 1920 pitch 7680 (/4 1920)
>[106507.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75bc0]
>[106507.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75bc0] width 1920 pitch 7680 (/4 1920)
>[106575.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0e50]
>[106575.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0e50] width 1920 pitch 7680 (/4 1920)
>[106627.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106627.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106627.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a3d0]
>[106627.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a3d0] width 1920 pitch 7680 (/4 1920)
>[106627.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d144f0]
>[106627.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d144f0] width 1920 pitch 7680 (/4 1920)
>[106627.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106627.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106627.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d144f0]
>[106627.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d144f0] width 1920 pitch 7680 (/4 1920)
>[106627.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106627.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106627.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d144f0]
>[106627.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d144f0] width 1920 pitch 7680 (/4 1920)
>[106627.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106627.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106627.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a3d0]
>[106627.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a3d0] width 1920 pitch 7680 (/4 1920)
>[106627.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106627.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106627.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a3d0]
>[106627.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a3d0] width 1920 pitch 7680 (/4 1920)
>[106627.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106628.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106628.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a3d0]
>[106628.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a3d0] width 1920 pitch 7680 (/4 1920)
>[106635.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106635.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106637.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106637.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106637.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106637.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106637.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106637.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106637.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106637.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106637.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106637.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106637.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106637.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106637.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106637.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106637.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106638.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106638.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106639.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106639.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106639.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106639.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106639.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106639.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106639.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106639.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106639.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b104d0]
>[106639.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b104d0] width 1920 pitch 7680 (/4 1920)
>[106641.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106641.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106641.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9ad0]
>[106641.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9ad0] width 1920 pitch 7680 (/4 1920)
>[106641.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14fc0]
>[106641.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14fc0] width 1920 pitch 7680 (/4 1920)
>[106641.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2b30]
>[106641.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2b30] width 1920 pitch 7680 (/4 1920)
>[106646.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aece20]
>[106646.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aece20] width 1920 pitch 7680 (/4 1920)
>[106646.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d144f0]
>[106646.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d144f0] width 1920 pitch 7680 (/4 1920)
>[106646.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14fc0]
>[106646.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14fc0] width 1920 pitch 7680 (/4 1920)
>[106646.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d144f0]
>[106646.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d144f0] width 1920 pitch 7680 (/4 1920)
>[106691.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14fc0]
>[106691.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14fc0] width 1920 pitch 7680 (/4 1920)
>[106691.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d144f0]
>[106691.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d144f0] width 1920 pitch 7680 (/4 1920)
>[106691.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddca90]
>[106691.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddca90] width 1920 pitch 7680 (/4 1920)
>[106691.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91980]
>[106691.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91980] width 1920 pitch 7680 (/4 1920)
>[106740.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14fc0]
>[106740.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14fc0] width 1920 pitch 7680 (/4 1920)
>[106755.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40240]
>[106755.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40240] width 1920 pitch 7680 (/4 1920)
>[106770.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14fc0]
>[106770.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14fc0] width 1920 pitch 7680 (/4 1920)
>[106785.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e4f40]
>[106785.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e4f40] width 1920 pitch 7680 (/4 1920)
>[106800.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d8f0]
>[106800.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d8f0] width 1920 pitch 7680 (/4 1920)
>[106815.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d8f0]
>[106815.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d8f0] width 1920 pitch 7680 (/4 1920)
>[106846.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106846.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106846.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106846.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106846.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106846.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106846.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106846.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106846.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106846.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106846.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106846.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106846.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106846.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106846.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106846.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106846.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106846.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106846.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106846.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106846.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106846.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106846.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106846.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106846.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106846.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106846.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106846.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106848.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee21a0]
>[106848.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee21a0] width 1920 pitch 7680 (/4 1920)
>[106848.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106849.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106849.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106849.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106849.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106849.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106849.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106849.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106849.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee21a0]
>[106849.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee21a0] width 1920 pitch 7680 (/4 1920)
>[106849.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106849.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106849.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee21a0]
>[106849.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee21a0] width 1920 pitch 7680 (/4 1920)
>[106849.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106849.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106849.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee21a0]
>[106849.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee21a0] width 1920 pitch 7680 (/4 1920)
>[106849.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106849.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106849.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[106849.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[106849.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[106849.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[106850.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[106850.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[106872.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6f460]
>[106872.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6f460] width 1920 pitch 7680 (/4 1920)
>[106872.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaccf0]
>[106872.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaccf0] width 1920 pitch 7680 (/4 1920)
>[106872.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ebb0]
>[106872.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ebb0] width 1920 pitch 7680 (/4 1920)
>[106872.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaccf0]
>[106872.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaccf0] width 1920 pitch 7680 (/4 1920)
>[106896.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edbb80]
>[106896.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edbb80] width 1920 pitch 7680 (/4 1920)
>[106897.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca180]
>[106897.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca180] width 1920 pitch 7680 (/4 1920)
>[106897.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[106897.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[106897.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dca180]
>[106897.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dca180] width 1920 pitch 7680 (/4 1920)
>[106932.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[106932.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[106932.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05ac0]
>[106932.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05ac0] width 1920 pitch 7680 (/4 1920)
>[106932.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398f4d0]
>[106932.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398f4d0] width 1920 pitch 7680 (/4 1920)
>[106932.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf860]
>[106932.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf860] width 1920 pitch 7680 (/4 1920)
>[107136.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b87890]
>[107136.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b87890] width 1920 pitch 7680 (/4 1920)
>[107148.099] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[107148.100] (II) RADEON(0): Using hsync ranges from config file
>[107148.100] (II) RADEON(0): Using vrefresh ranges from config file
>[107148.100] (II) RADEON(0): Printing DDC gathered Modelines:
>[107148.100] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[107148.100] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[107148.100] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[107148.100] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[107148.100] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[107148.100] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[107148.100] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[107148.100] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[107148.100] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[107148.100] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[107148.100] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[107148.100] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[107148.146] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[107148.146] (II) RADEON(0): Using hsync ranges from config file
>[107148.146] (II) RADEON(0): Using vrefresh ranges from config file
>[107148.146] (II) RADEON(0): Printing DDC gathered Modelines:
>[107148.146] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[107148.146] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[107148.146] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[107148.146] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[107148.146] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[107148.146] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[107148.146] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[107148.146] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[107148.146] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[107148.146] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[107148.146] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[107148.146] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[107148.193] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[107148.193] (II) RADEON(0): Using hsync ranges from config file
>[107148.193] (II) RADEON(0): Using vrefresh ranges from config file
>[107148.193] (II) RADEON(0): Printing DDC gathered Modelines:
>[107148.193] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[107148.193] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[107148.193] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[107148.193] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[107148.193] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[107148.193] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[107148.193] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[107148.193] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[107148.193] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[107148.193] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[107148.193] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[107148.193] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[107156.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d143b0]
>[107156.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d143b0] width 1920 pitch 7680 (/4 1920)
>[107160.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcf5e0]
>[107160.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcf5e0] width 1920 pitch 7680 (/4 1920)
>[107175.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcf5e0]
>[107175.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcf5e0] width 1920 pitch 7680 (/4 1920)
>[107220.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82a40]
>[107220.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82a40] width 1920 pitch 7680 (/4 1920)
>[107235.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[107235.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[107505.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d532c0]
>[107505.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d532c0] width 1920 pitch 7680 (/4 1920)
>[107535.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[107535.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[107700.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30000]
>[107700.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30000] width 1920 pitch 7680 (/4 1920)
>[107715.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37e40]
>[107715.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37e40] width 1920 pitch 7680 (/4 1920)
>[107745.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[107745.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[107775.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c365d0]
>[107775.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c365d0] width 1920 pitch 7680 (/4 1920)
>[107805.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3100b40]
>[107805.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3100b40] width 1920 pitch 7680 (/4 1920)
>[107820.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd780]
>[107820.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd780] width 1920 pitch 7680 (/4 1920)
>[107880.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd790]
>[107880.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd790] width 1920 pitch 7680 (/4 1920)
>[107895.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd790]
>[107895.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd790] width 1920 pitch 7680 (/4 1920)
>[107940.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[107940.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[107955.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[107955.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[107985.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd790]
>[107985.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd790] width 1920 pitch 7680 (/4 1920)
>[108000.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd790]
>[108000.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd790] width 1920 pitch 7680 (/4 1920)
>[108045.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd790]
>[108045.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd790] width 1920 pitch 7680 (/4 1920)
>[108060.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3a690]
>[108060.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3a690] width 1920 pitch 7680 (/4 1920)
>[108075.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd790]
>[108075.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd790] width 1920 pitch 7680 (/4 1920)
>[108090.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108090.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108300.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30040]
>[108300.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30040] width 1920 pitch 7680 (/4 1920)
>[108315.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108315.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108510.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36630]
>[108510.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36630] width 1920 pitch 7680 (/4 1920)
>[108525.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37e40]
>[108525.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37e40] width 1920 pitch 7680 (/4 1920)
>[108600.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3100b40]
>[108600.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3100b40] width 1920 pitch 7680 (/4 1920)
>[108615.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3100b00]
>[108615.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3100b00] width 1920 pitch 7680 (/4 1920)
>[108645.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30000]
>[108645.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30000] width 1920 pitch 7680 (/4 1920)
>[108660.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108660.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108720.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108720.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108735.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108735.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108750.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108750.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108765.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d13c40]
>[108765.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d13c40] width 1920 pitch 7680 (/4 1920)
>[108780.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d13c40]
>[108780.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d13c40] width 1920 pitch 7680 (/4 1920)
>[108795.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d13c40]
>[108795.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d13c40] width 1920 pitch 7680 (/4 1920)
>[108810.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d135e0]
>[108810.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d135e0] width 1920 pitch 7680 (/4 1920)
>[108825.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d135e0]
>[108825.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d135e0] width 1920 pitch 7680 (/4 1920)
>[108840.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108840.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108855.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[108855.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[108885.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3100970]
>[108885.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3100970] width 1920 pitch 7680 (/4 1920)
>[108930.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e787e0]
>[108930.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e787e0] width 1920 pitch 7680 (/4 1920)
>[108945.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30020]
>[108945.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30020] width 1920 pitch 7680 (/4 1920)
>[109050.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[109050.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[109080.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[109080.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[109095.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[109095.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[109110.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5ac70]
>[109110.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5ac70] width 1920 pitch 7680 (/4 1920)
>[109215.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d13df0]
>[109215.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d13df0] width 1920 pitch 7680 (/4 1920)
>[109245.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d13df0]
>[109245.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d13df0] width 1920 pitch 7680 (/4 1920)
>[109275.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76a30]
>[109275.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76a30] width 1920 pitch 7680 (/4 1920)
>[109290.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76a30]
>[109290.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76a30] width 1920 pitch 7680 (/4 1920)
>[109305.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d135e0]
>[109305.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d135e0] width 1920 pitch 7680 (/4 1920)
>[109320.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d135e0]
>[109320.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d135e0] width 1920 pitch 7680 (/4 1920)
>[109338.144] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[109338.144] (II) RADEON(0): Using hsync ranges from config file
>[109338.144] (II) RADEON(0): Using vrefresh ranges from config file
>[109338.144] (II) RADEON(0): Printing DDC gathered Modelines:
>[109338.144] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[109338.144] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[109338.144] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[109338.144] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[109338.144] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[109338.144] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[109338.144] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[109338.144] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[109338.144] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[109338.144] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[109338.144] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[109338.144] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[109338.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13c50]
>[109338.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13c50] width 1920 pitch 7680 (/4 1920)
>[109339.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d970]
>[109339.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d970] width 1920 pitch 7680 (/4 1920)
>[109380.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ce50]
>[109380.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ce50] width 1920 pitch 7680 (/4 1920)
>[109395.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7e0d0]
>[109395.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7e0d0] width 1920 pitch 7680 (/4 1920)
>[109455.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a831e0]
>[109455.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a831e0] width 1920 pitch 7680 (/4 1920)
>[109470.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded000]
>[109470.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded000] width 1920 pitch 7680 (/4 1920)
>[109530.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[109530.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[109545.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8070]
>[109545.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8070] width 1920 pitch 7680 (/4 1920)
>[109695.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[109695.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[109710.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8070]
>[109710.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8070] width 1920 pitch 7680 (/4 1920)
>[109860.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[109860.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[109875.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8070]
>[109875.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8070] width 1920 pitch 7680 (/4 1920)
>[109920.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[109920.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[109950.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8070]
>[109950.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8070] width 1920 pitch 7680 (/4 1920)
>[110010.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[110010.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[110025.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8070]
>[110025.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8070] width 1920 pitch 7680 (/4 1920)
>[110070.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2539750]
>[110070.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2539750] width 1920 pitch 7680 (/4 1920)
>[110081.269] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[110081.269] (II) RADEON(0): Using hsync ranges from config file
>[110081.269] (II) RADEON(0): Using vrefresh ranges from config file
>[110081.269] (II) RADEON(0): Printing DDC gathered Modelines:
>[110081.269] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[110081.269] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[110081.269] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[110081.269] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[110081.269] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[110081.269] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[110081.269] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[110081.269] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[110081.269] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[110081.269] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[110081.269] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[110081.269] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[110171.671] (II) RADEON(0): RADEONSaveScreen(2)
>[110171.671] (II) RADEON(0): RADEONSaveScreen(0)
>[112792.011] (II) RADEON(0): RADEONSaveScreen(1)
>[112792.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8560]
>[112792.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8560] width 1920 pitch 7680 (/4 1920)
>[112797.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55460]
>[112797.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55460] width 1920 pitch 7680 (/4 1920)
>[112797.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7e0d0]
>[112797.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7e0d0] width 1920 pitch 7680 (/4 1920)
>[112797.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112797.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112797.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112797.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112797.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112798.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112798.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112798.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112798.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112798.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112798.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112798.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112798.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112798.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112798.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112798.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112798.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112798.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112798.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112798.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112798.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112799.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112799.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112799.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112799.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112799.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112799.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112799.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112799.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550be0]
>[112799.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550be0] width 1920 pitch 7680 (/4 1920)
>[112799.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d0d0]
>[112799.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d0d0] width 1920 pitch 7680 (/4 1920)
>[112818.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a593f0]
>[112818.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a593f0] width 1920 pitch 7680 (/4 1920)
>[112819.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea2750]
>[112819.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea2750] width 1920 pitch 7680 (/4 1920)
>[112819.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89160]
>[112819.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89160] width 1920 pitch 7680 (/4 1920)
>[112819.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea2750]
>[112819.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea2750] width 1920 pitch 7680 (/4 1920)
>[112820.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d24a80]
>[112820.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d24a80] width 1920 pitch 7680 (/4 1920)
>[112824.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7c940]
>[112824.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7c940] width 1920 pitch 7680 (/4 1920)
>[112827.420] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[112827.420] (II) RADEON(0): Using hsync ranges from config file
>[112827.420] (II) RADEON(0): Using vrefresh ranges from config file
>[112827.420] (II) RADEON(0): Printing DDC gathered Modelines:
>[112827.420] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[112827.420] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[112827.420] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[112827.420] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[112827.420] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[112827.420] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[112827.420] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[112827.420] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[112827.420] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[112827.420] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[112827.420] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[112827.420] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[112827.421] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[112827.465] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[112827.465] (II) RADEON(0): Using hsync ranges from config file
>[112827.465] (II) RADEON(0): Using vrefresh ranges from config file
>[112827.465] (II) RADEON(0): Printing DDC gathered Modelines:
>[112827.465] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[112827.465] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[112827.465] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[112827.465] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[112827.465] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[112827.465] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[112827.465] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[112827.465] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[112827.465] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[112827.465] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[112827.465] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[112827.465] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[112827.512] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[112827.512] (II) RADEON(0): Using hsync ranges from config file
>[112827.512] (II) RADEON(0): Using vrefresh ranges from config file
>[112827.512] (II) RADEON(0): Printing DDC gathered Modelines:
>[112827.512] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[112827.512] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[112827.512] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[112827.512] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[112827.512] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[112827.512] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[112827.512] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[112827.512] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[112827.512] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[112827.512] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[112827.512] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[112827.512] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[112838.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d373e0]
>[112838.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d373e0] width 1920 pitch 7680 (/4 1920)
>[112839.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d640]
>[112839.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d640] width 1920 pitch 7680 (/4 1920)
>[112840.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306d2c0]
>[112840.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306d2c0] width 1920 pitch 7680 (/4 1920)
>[112840.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3080210]
>[112840.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3080210] width 1920 pitch 7680 (/4 1920)
>[112840.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d640]
>[112840.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d640] width 1920 pitch 7680 (/4 1920)
>[112842.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3080d50]
>[112842.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3080d50] width 1920 pitch 7680 (/4 1920)
>[112842.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d34f80]
>[112842.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d34f80] width 1920 pitch 7680 (/4 1920)
>[112842.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7bab0]
>[112842.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7bab0] width 1920 pitch 7680 (/4 1920)
>[112842.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81fe0]
>[112842.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81fe0] width 1920 pitch 7680 (/4 1920)
>[112852.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81fe0]
>[112852.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81fe0] width 1920 pitch 7680 (/4 1920)
>[112854.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30810c0]
>[112854.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30810c0] width 1920 pitch 7680 (/4 1920)
>[112854.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112854.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112854.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30810c0]
>[112854.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30810c0] width 1920 pitch 7680 (/4 1920)
>[112857.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5730]
>[112857.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5730] width 1920 pitch 7680 (/4 1920)
>[112857.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5730]
>[112857.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5730] width 1920 pitch 7680 (/4 1920)
>[112857.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5730]
>[112857.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5730] width 1920 pitch 7680 (/4 1920)
>[112857.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5730]
>[112857.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5730] width 1920 pitch 7680 (/4 1920)
>[112857.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112857.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112857.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112857.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112857.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112857.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112857.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112857.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112857.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112857.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112857.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[112857.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[112858.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c43d40]
>[112858.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c43d40] width 1920 pitch 7680 (/4 1920)
>[112858.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112858.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112858.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112858.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112858.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112858.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112858.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[112858.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[112858.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[112858.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[112858.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[112858.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[112858.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[112858.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[112858.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112858.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112858.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4040870]
>[112858.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4040870] width 1920 pitch 7680 (/4 1920)
>[112862.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d82580]
>[112862.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d82580] width 1920 pitch 7680 (/4 1920)
>[112862.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[112862.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[112862.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48ac0]
>[112862.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48ac0] width 1920 pitch 7680 (/4 1920)
>[112862.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[112862.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[112862.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112862.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112862.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[112862.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[112862.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112862.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112862.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[112862.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[112862.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[112862.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[112862.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[112862.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[112862.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec710]
>[112862.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec710] width 1920 pitch 7680 (/4 1920)
>[112867.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[112867.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[112882.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[112882.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[112897.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[112897.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[112912.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[112912.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113017.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[113017.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113047.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[113047.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[113062.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[113062.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113092.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c070]
>[113092.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c070] width 1920 pitch 7680 (/4 1920)
>[113182.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c070]
>[113182.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c070] width 1920 pitch 7680 (/4 1920)
>[113197.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[113197.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[113212.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113212.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113227.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[113227.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[113332.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7e880]
>[113332.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7e880] width 1920 pitch 7680 (/4 1920)
>[113347.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113347.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113392.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[113392.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[113407.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[113407.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[113527.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[113527.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113542.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[113542.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113572.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[113572.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113587.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113587.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113602.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39307a0]
>[113602.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39307a0] width 1920 pitch 7680 (/4 1920)
>[113632.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37da0]
>[113632.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37da0] width 1920 pitch 7680 (/4 1920)
>[113647.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[113647.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[113662.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37da0]
>[113662.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37da0] width 1920 pitch 7680 (/4 1920)
>[113767.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113767.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113782.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113782.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113842.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113842.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113857.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81010]
>[113857.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81010] width 1920 pitch 7680 (/4 1920)
>[113887.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[113887.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[113902.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81010]
>[113902.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81010] width 1920 pitch 7680 (/4 1920)
>[113992.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[113992.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[114007.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[114007.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[114037.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[114037.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[114052.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81010]
>[114052.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81010] width 1920 pitch 7680 (/4 1920)
>[114082.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[114082.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[114097.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81d60]
>[114097.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81d60] width 1920 pitch 7680 (/4 1920)
>[114217.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df9f20]
>[114217.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df9f20] width 1920 pitch 7680 (/4 1920)
>[114232.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[114232.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[114262.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[114262.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[114262.982] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[114262.982] (II) RADEON(0): Using hsync ranges from config file
>[114262.982] (II) RADEON(0): Using vrefresh ranges from config file
>[114262.982] (II) RADEON(0): Printing DDC gathered Modelines:
>[114262.982] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[114262.982] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[114262.982] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[114262.982] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[114262.982] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[114262.982] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[114262.982] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[114262.982] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[114262.982] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[114262.982] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[114262.982] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[114262.982] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[114263.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114263.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114277.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c65c0]
>[114277.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c65c0] width 1920 pitch 7680 (/4 1920)
>[114292.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114292.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114307.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c65c0]
>[114307.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c65c0] width 1920 pitch 7680 (/4 1920)
>[114322.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114322.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114382.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c65c0]
>[114382.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c65c0] width 1920 pitch 7680 (/4 1920)
>[114412.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114412.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114502.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c65c0]
>[114502.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c65c0] width 1920 pitch 7680 (/4 1920)
>[114517.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114517.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114547.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c65c0]
>[114547.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c65c0] width 1920 pitch 7680 (/4 1920)
>[114562.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114562.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114607.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114607.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114622.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[114622.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[114727.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3903f40]
>[114727.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3903f40] width 1920 pitch 7680 (/4 1920)
>[114742.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36fe0]
>[114742.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36fe0] width 1920 pitch 7680 (/4 1920)
>[114863.130] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[114863.130] (II) RADEON(0): Using hsync ranges from config file
>[114863.130] (II) RADEON(0): Using vrefresh ranges from config file
>[114863.130] (II) RADEON(0): Printing DDC gathered Modelines:
>[114863.130] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[114863.130] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[114863.130] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[114863.130] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[114863.130] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[114863.130] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[114863.131] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[114863.131] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[114863.131] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[114863.131] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[114863.131] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[114863.131] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[114953.660] (II) RADEON(0): RADEONSaveScreen(2)
>[114953.660] (II) RADEON(0): RADEONSaveScreen(0)
>[116226.672] (II) RADEON(0): RADEONSaveScreen(1)
>[116226.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[116226.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[116236.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da99e0]
>[116236.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da99e0] width 1920 pitch 7680 (/4 1920)
>[116236.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116236.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116236.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116236.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116236.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116236.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116236.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0e60]
>[116236.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0e60] width 1920 pitch 7680 (/4 1920)
>[116236.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[116236.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[116237.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116237.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116237.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116237.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116237.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116237.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116237.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116237.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116237.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116237.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116237.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116238.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116238.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116238.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116238.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116238.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116238.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116238.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116238.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116238.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116238.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116238.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116238.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116238.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116238.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116238.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116238.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116238.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116238.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116238.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116238.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[116238.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[116238.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116238.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116239.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901590]
>[116239.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901590] width 1920 pitch 7680 (/4 1920)
>[116240.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[116240.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[116240.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dee7f0]
>[116240.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dee7f0] width 1920 pitch 7680 (/4 1920)
>[116240.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bea00]
>[116240.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bea00] width 1920 pitch 7680 (/4 1920)
>[116241.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[116241.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[116250.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[116250.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[116252.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[116252.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[116252.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532c70]
>[116252.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532c70] width 1920 pitch 7680 (/4 1920)
>[116252.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[116252.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[116286.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c65c0]
>[116286.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c65c0] width 1920 pitch 7680 (/4 1920)
>[116291.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43170]
>[116291.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43170] width 1920 pitch 7680 (/4 1920)
>[116292.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacdb0]
>[116292.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacdb0] width 1920 pitch 7680 (/4 1920)
>[116292.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489ab0]
>[116292.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489ab0] width 1920 pitch 7680 (/4 1920)
>[116294.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489ab0]
>[116294.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489ab0] width 1920 pitch 7680 (/4 1920)
>[116294.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489ab0]
>[116294.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489ab0] width 1920 pitch 7680 (/4 1920)
>[116294.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59a00]
>[116294.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59a00] width 1920 pitch 7680 (/4 1920)
>[116294.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59a00]
>[116294.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59a00] width 1920 pitch 7680 (/4 1920)
>[116294.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ef0]
>[116294.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ef0] width 1920 pitch 7680 (/4 1920)
>[116294.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ef0]
>[116294.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ef0] width 1920 pitch 7680 (/4 1920)
>[116294.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ef0]
>[116294.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ef0] width 1920 pitch 7680 (/4 1920)
>[116294.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116294.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[116294.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[116294.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116294.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116296.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[116296.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[116296.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a4d0]
>[116296.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a4d0] width 1920 pitch 7680 (/4 1920)
>[116296.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[116296.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[116296.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1a4d0]
>[116296.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1a4d0] width 1920 pitch 7680 (/4 1920)
>[116296.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[116296.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[116296.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[116296.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[116296.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[116296.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[116296.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024810]
>[116296.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024810] width 1920 pitch 7680 (/4 1920)
>[116296.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[116296.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[116296.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116296.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116296.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[116296.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[116296.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfee0]
>[116296.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfee0] width 1920 pitch 7680 (/4 1920)
>[116296.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[116296.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[116296.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d95440]
>[116296.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d95440] width 1920 pitch 7680 (/4 1920)
>[116296.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e886e0]
>[116296.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e886e0] width 1920 pitch 7680 (/4 1920)
>[116296.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55460]
>[116296.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55460] width 1920 pitch 7680 (/4 1920)
>[116297.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[116297.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[116297.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9da10]
>[116297.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9da10] width 1920 pitch 7680 (/4 1920)
>[116297.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca820]
>[116297.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca820] width 1920 pitch 7680 (/4 1920)
>[116301.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3e550]
>[116301.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3e550] width 1920 pitch 7680 (/4 1920)
>[116311.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f513f0]
>[116311.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f513f0] width 1920 pitch 7680 (/4 1920)
>[116315.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e32570]
>[116315.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e32570] width 1920 pitch 7680 (/4 1920)
>[116315.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c2f0]
>[116315.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c2f0] width 1920 pitch 7680 (/4 1920)
>[116315.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[116315.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[116315.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c2f0]
>[116315.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c2f0] width 1920 pitch 7680 (/4 1920)
>[116315.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[116315.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[116345.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2503f20]
>[116345.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2503f20] width 1920 pitch 7680 (/4 1920)
>[116345.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc410]
>[116345.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc410] width 1920 pitch 7680 (/4 1920)
>[116345.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[116345.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[116345.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[116345.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[116345.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[116345.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[116345.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[116345.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[116346.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[116346.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[116346.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[116346.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[116346.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[116346.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[116346.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[116346.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[116346.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[116346.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[116346.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[116346.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[116346.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116346.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116346.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[116346.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[116347.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116347.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116347.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[116347.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[116347.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[116347.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[116347.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[116347.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[116347.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[116347.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[116347.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[116347.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[116376.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2503f20]
>[116376.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2503f20] width 1920 pitch 7680 (/4 1920)
>[116391.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2373260]
>[116391.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2373260] width 1920 pitch 7680 (/4 1920)
>[116406.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[116406.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[116421.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[116421.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[116436.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2373260]
>[116436.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2373260] width 1920 pitch 7680 (/4 1920)
>[116451.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024810]
>[116451.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024810] width 1920 pitch 7680 (/4 1920)
>[116464.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59a00]
>[116464.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59a00] width 1920 pitch 7680 (/4 1920)
>[116464.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252d8c0]
>[116464.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252d8c0] width 1920 pitch 7680 (/4 1920)
>[116464.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116465.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116465.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116465.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116465.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116465.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116465.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116465.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116465.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116465.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116465.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116465.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116465.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116465.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116465.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116465.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116465.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116465.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116465.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116465.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116465.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116465.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116466.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116466.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116466.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116466.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116466.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116466.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116466.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fca8e0]
>[116466.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fca8e0] width 1920 pitch 7680 (/4 1920)
>[116467.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[116467.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[116467.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ae250]
>[116467.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ae250] width 1920 pitch 7680 (/4 1920)
>[116467.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[116467.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[116467.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ae250]
>[116467.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ae250] width 1920 pitch 7680 (/4 1920)
>[116467.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[116467.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[116467.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ae250]
>[116468.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ae250] width 1920 pitch 7680 (/4 1920)
>[116468.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[116468.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[116468.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ae250]
>[116468.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ae250] width 1920 pitch 7680 (/4 1920)
>[116468.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c2f0]
>[116468.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c2f0] width 1920 pitch 7680 (/4 1920)
>[116469.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2fa0]
>[116469.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2fa0] width 1920 pitch 7680 (/4 1920)
>[116469.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfabc0]
>[116469.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfabc0] width 1920 pitch 7680 (/4 1920)
>[116489.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc5250]
>[116489.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc5250] width 1920 pitch 7680 (/4 1920)
>[116541.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc000]
>[116541.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc000] width 1920 pitch 7680 (/4 1920)
>[116556.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d62af0]
>[116556.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d62af0] width 1920 pitch 7680 (/4 1920)
>[116676.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5630]
>[116676.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5630] width 1920 pitch 7680 (/4 1920)
>[116691.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116691.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116706.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93700]
>[116706.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93700] width 1920 pitch 7680 (/4 1920)
>[116721.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116721.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116841.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116841.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116856.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116856.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116857.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116857.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116857.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116857.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116861.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116861.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116861.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116861.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116862.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116862.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116862.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116862.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116931.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116931.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116946.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116946.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[116976.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[116976.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[116991.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[116991.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117126.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117126.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117141.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117141.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117231.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117231.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117246.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117246.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117256.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117256.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117256.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117256.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117259.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc17b0]
>[117259.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc17b0] width 1920 pitch 7680 (/4 1920)
>[117259.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93750]
>[117259.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93750] width 1920 pitch 7680 (/4 1920)
>[117259.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117259.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117259.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93750]
>[117259.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93750] width 1920 pitch 7680 (/4 1920)
>[117259.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117259.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117259.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc17b0]
>[117259.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc17b0] width 1920 pitch 7680 (/4 1920)
>[117259.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117259.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117259.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93750]
>[117259.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93750] width 1920 pitch 7680 (/4 1920)
>[117259.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc17b0]
>[117259.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc17b0] width 1920 pitch 7680 (/4 1920)
>[117259.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb41a0]
>[117259.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb41a0] width 1920 pitch 7680 (/4 1920)
>[117259.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93750]
>[117259.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93750] width 1920 pitch 7680 (/4 1920)
>[117259.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb41a0]
>[117259.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb41a0] width 1920 pitch 7680 (/4 1920)
>[117259.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ecb0]
>[117259.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ecb0] width 1920 pitch 7680 (/4 1920)
>[117259.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc17b0]
>[117259.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc17b0] width 1920 pitch 7680 (/4 1920)
>[117259.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117259.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117306.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3cba0]
>[117306.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3cba0] width 1920 pitch 7680 (/4 1920)
>[117321.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08350]
>[117321.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08350] width 1920 pitch 7680 (/4 1920)
>[117374.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81dc0]
>[117374.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81dc0] width 1920 pitch 7680 (/4 1920)
>[117374.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d740]
>[117374.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d740] width 1920 pitch 7680 (/4 1920)
>[117374.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81dc0]
>[117374.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81dc0] width 1920 pitch 7680 (/4 1920)
>[117374.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d740]
>[117374.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d740] width 1920 pitch 7680 (/4 1920)
>[117374.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81dc0]
>[117374.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81dc0] width 1920 pitch 7680 (/4 1920)
>[117374.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d740]
>[117374.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d740] width 1920 pitch 7680 (/4 1920)
>[117374.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81dc0]
>[117374.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81dc0] width 1920 pitch 7680 (/4 1920)
>[117374.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea7790]
>[117374.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea7790] width 1920 pitch 7680 (/4 1920)
>[117374.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117374.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117374.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc410]
>[117374.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc410] width 1920 pitch 7680 (/4 1920)
>[117374.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2503f20]
>[117374.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2503f20] width 1920 pitch 7680 (/4 1920)
>[117374.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[117374.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[117374.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c2f0]
>[117374.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c2f0] width 1920 pitch 7680 (/4 1920)
>[117374.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43170]
>[117374.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43170] width 1920 pitch 7680 (/4 1920)
>[117374.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117374.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117374.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[117374.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[117375.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117375.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117375.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117375.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117375.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117375.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117375.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117375.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117375.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117375.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3890]
>[117376.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3890] width 1920 pitch 7680 (/4 1920)
>[117376.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d678b0]
>[117376.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d678b0] width 1920 pitch 7680 (/4 1920)
>[117376.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117376.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117376.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117376.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117376.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117377.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caef00]
>[117377.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caef00] width 1920 pitch 7680 (/4 1920)
>[117377.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd30a0]
>[117377.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd30a0] width 1920 pitch 7680 (/4 1920)
>[117377.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd30a0]
>[117377.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd30a0] width 1920 pitch 7680 (/4 1920)
>[117377.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc5ae0]
>[117377.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc5ae0] width 1920 pitch 7680 (/4 1920)
>[117377.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc5ae0]
>[117377.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc5ae0] width 1920 pitch 7680 (/4 1920)
>[117377.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23570]
>[117377.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23570] width 1920 pitch 7680 (/4 1920)
>[117377.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23570]
>[117377.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23570] width 1920 pitch 7680 (/4 1920)
>[117377.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f710]
>[117377.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f710] width 1920 pitch 7680 (/4 1920)
>[117377.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd30a0]
>[117377.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd30a0] width 1920 pitch 7680 (/4 1920)
>[117377.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f710]
>[117377.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f710] width 1920 pitch 7680 (/4 1920)
>[117377.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caef00]
>[117377.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caef00] width 1920 pitch 7680 (/4 1920)
>[117377.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caef00]
>[117377.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caef00] width 1920 pitch 7680 (/4 1920)
>[117377.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f710]
>[117377.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f710] width 1920 pitch 7680 (/4 1920)
>[117377.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46ae0]
>[117377.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46ae0] width 1920 pitch 7680 (/4 1920)
>[117377.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c46ae0]
>[117377.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c46ae0] width 1920 pitch 7680 (/4 1920)
>[117377.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117377.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117377.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f710]
>[117377.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f710] width 1920 pitch 7680 (/4 1920)
>[117377.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2fd0]
>[117377.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2fd0] width 1920 pitch 7680 (/4 1920)
>[117377.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550440]
>[117377.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550440] width 1920 pitch 7680 (/4 1920)
>[117377.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fdd0]
>[117377.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fdd0] width 1920 pitch 7680 (/4 1920)
>[117377.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117377.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117377.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117377.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117377.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f7c80]
>[117377.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f7c80] width 1920 pitch 7680 (/4 1920)
>[117377.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117377.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117377.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb850]
>[117377.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb850] width 1920 pitch 7680 (/4 1920)
>[117377.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117377.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117377.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb850]
>[117378.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb850] width 1920 pitch 7680 (/4 1920)
>[117378.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117378.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117378.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb850]
>[117378.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb850] width 1920 pitch 7680 (/4 1920)
>[117378.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117378.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117378.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb850]
>[117378.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb850] width 1920 pitch 7680 (/4 1920)
>[117378.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aed590]
>[117378.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aed590] width 1920 pitch 7680 (/4 1920)
>[117378.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfb850]
>[117378.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfb850] width 1920 pitch 7680 (/4 1920)
>[117383.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ec30]
>[117383.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ec30] width 1920 pitch 7680 (/4 1920)
>[117383.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3ec30]
>[117383.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3ec30] width 1920 pitch 7680 (/4 1920)
>[117383.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117383.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117383.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[117383.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[117387.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c756a0]
>[117387.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c756a0] width 1920 pitch 7680 (/4 1920)
>[117387.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117387.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117387.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117387.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117387.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[117387.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[117387.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117387.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117387.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[117387.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[117387.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117387.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117387.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[117387.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[117387.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117387.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117387.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[117387.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[117387.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117387.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117389.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f1fda0]
>[117389.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f1fda0] width 1920 pitch 7680 (/4 1920)
>[117390.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ae250]
>[117390.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ae250] width 1920 pitch 7680 (/4 1920)
>[117390.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b16a20]
>[117390.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b16a20] width 1920 pitch 7680 (/4 1920)
>[117390.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55460]
>[117390.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55460] width 1920 pitch 7680 (/4 1920)
>[117391.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2503f20]
>[117391.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2503f20] width 1920 pitch 7680 (/4 1920)
>[117391.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacb70]
>[117391.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacb70] width 1920 pitch 7680 (/4 1920)
>[117391.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7c430]
>[117391.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7c430] width 1920 pitch 7680 (/4 1920)
>[117391.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c04ad0]
>[117391.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c04ad0] width 1920 pitch 7680 (/4 1920)
>[117392.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55460]
>[117392.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55460] width 1920 pitch 7680 (/4 1920)
>[117392.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2e960]
>[117392.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2e960] width 1920 pitch 7680 (/4 1920)
>[117392.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[117392.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[117392.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[117392.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[117411.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2503f20]
>[117411.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2503f20] width 1920 pitch 7680 (/4 1920)
>[117426.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e303d0]
>[117426.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e303d0] width 1920 pitch 7680 (/4 1920)
>[117458.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfee0]
>[117458.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfee0] width 1920 pitch 7680 (/4 1920)
>[117458.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117458.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117458.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06ba0]
>[117458.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06ba0] width 1920 pitch 7680 (/4 1920)
>[117458.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117459.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117459.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06ba0]
>[117459.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06ba0] width 1920 pitch 7680 (/4 1920)
>[117459.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117459.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117459.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06ba0]
>[117459.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06ba0] width 1920 pitch 7680 (/4 1920)
>[117459.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117459.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117459.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06ba0]
>[117459.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06ba0] width 1920 pitch 7680 (/4 1920)
>[117459.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117459.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117459.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06ba0]
>[117459.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06ba0] width 1920 pitch 7680 (/4 1920)
>[117460.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117460.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117460.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06ba0]
>[117460.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06ba0] width 1920 pitch 7680 (/4 1920)
>[117460.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5a90]
>[117460.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5a90] width 1920 pitch 7680 (/4 1920)
>[117460.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[117460.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[117460.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117460.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117460.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[117460.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[117460.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117460.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117460.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[117460.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[117460.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117460.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117460.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[117460.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[117460.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc410]
>[117460.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc410] width 1920 pitch 7680 (/4 1920)
>[117463.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da99e0]
>[117463.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da99e0] width 1920 pitch 7680 (/4 1920)
>[117463.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce92e0]
>[117463.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce92e0] width 1920 pitch 7680 (/4 1920)
>[117463.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117463.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117463.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117464.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117464.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117464.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117464.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117464.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117464.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117464.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117464.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117464.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117464.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117464.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117464.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117464.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117464.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117464.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117464.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117464.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117464.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117465.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117465.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117465.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117465.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117465.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117465.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117465.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117465.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117465.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117465.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117465.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117465.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117465.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117465.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117465.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117465.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117466.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117466.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117466.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117466.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117466.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117466.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117466.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117466.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117466.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117466.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117466.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117466.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117466.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117466.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117466.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117467.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117467.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117467.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117467.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117467.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117467.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117467.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117467.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117467.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117467.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117467.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117467.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117467.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117467.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117467.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117467.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117467.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117467.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117467.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117467.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117467.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117467.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117467.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117467.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117468.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117468.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117468.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117468.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117469.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117469.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117469.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117469.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117469.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117469.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117469.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117469.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117469.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117469.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117469.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117469.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117469.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117469.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117471.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117471.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117471.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117472.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117473.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117473.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117474.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117474.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117474.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117474.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117475.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2f70]
>[117476.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2f70] width 1920 pitch 7680 (/4 1920)
>[117477.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dd80]
>[117477.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dd80] width 1920 pitch 7680 (/4 1920)
>[117479.111] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[117479.111] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[117479.111] (II) UnloadModule: "evdev"
>[117546.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[117546.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[117561.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[117561.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[117636.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[117636.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[117651.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[117651.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[117771.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[117771.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[117786.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[117786.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[117846.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[117846.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[117861.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[117861.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[117876.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8950]
>[117876.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8950] width 1920 pitch 7680 (/4 1920)
>[117881.024] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[117881.024] (II) No input driver specified, ignoring this device.
>[117881.024] (II) This device may have been added with another device file.
>[117881.024] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[117881.024] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[117881.024] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[117881.024] 	Option "XkbRules" "evdev"
>[117881.024] 	Option "XkbModel" "evdev"
>[117881.025] 	Option "XkbLayout" "us"
>[117881.025] 	Option "_source" "server/udev"
>[117881.025] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[117881.025] 	Option "path" "/dev/input/event14"
>[117881.025] 	Option "device" "/dev/input/event14"
>[117881.025] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input33/event14"
>[117881.025] 	Option "driver" "evdev"
>[117881.025] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[117881.025] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[117881.025] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[117881.025] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[117881.025] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[117881.025] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[117881.025] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[117881.025] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[117881.025] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[117881.025] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[117881.025] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[117881.025] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input33/event14"
>[117881.025] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[117881.025] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[117881.025] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[117881.025] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[117881.025] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[117881.025] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[117881.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117881.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117882.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117882.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117882.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117882.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117882.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117882.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117883.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117883.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117883.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117883.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117884.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117884.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117884.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117884.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117884.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117884.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117884.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117884.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117884.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117884.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117884.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117884.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb590]
>[117884.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb590] width 1920 pitch 7680 (/4 1920)
>[117884.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda530]
>[117884.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda530] width 1920 pitch 7680 (/4 1920)
>[117884.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117884.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117884.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117884.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117884.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117884.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117884.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117884.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117884.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117884.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117884.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4005200]
>[117884.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4005200] width 1920 pitch 7680 (/4 1920)
>[117884.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce7b90]
>[117884.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce7b90] width 1920 pitch 7680 (/4 1920)
>[117884.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c04ad0]
>[117884.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c04ad0] width 1920 pitch 7680 (/4 1920)
>[117891.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c270]
>[117891.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c270] width 1920 pitch 7680 (/4 1920)
>[117908.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43170]
>[117908.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43170] width 1920 pitch 7680 (/4 1920)
>[117909.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48ac0]
>[117909.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48ac0] width 1920 pitch 7680 (/4 1920)
>[117909.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48ac0]
>[117909.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48ac0] width 1920 pitch 7680 (/4 1920)
>[117936.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c03d70]
>[117936.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c03d70] width 1920 pitch 7680 (/4 1920)
>[117951.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ad110]
>[117951.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ad110] width 1920 pitch 7680 (/4 1920)
>[118026.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2532e40]
>[118026.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2532e40] width 1920 pitch 7680 (/4 1920)
>[118056.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97b90]
>[118056.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97b90] width 1920 pitch 7680 (/4 1920)
>[118236.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555410]
>[118236.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555410] width 1920 pitch 7680 (/4 1920)
>[118251.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55460]
>[118251.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55460] width 1920 pitch 7680 (/4 1920)
>[118536.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115b90]
>[118536.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115b90] width 1920 pitch 7680 (/4 1920)
>[118551.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed9ad0]
>[118551.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed9ad0] width 1920 pitch 7680 (/4 1920)
>[118626.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c71f40]
>[118626.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c71f40] width 1920 pitch 7680 (/4 1920)
>[118638.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4026ba0]
>[118638.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4026ba0] width 1920 pitch 7680 (/4 1920)
>[118640.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7380]
>[118640.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7380] width 1920 pitch 7680 (/4 1920)
>[118640.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb9f0]
>[118640.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb9f0] width 1920 pitch 7680 (/4 1920)
>[118640.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d37210]
>[118640.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d37210] width 1920 pitch 7680 (/4 1920)
>[118641.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb9f0]
>[118641.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb9f0] width 1920 pitch 7680 (/4 1920)
>[118641.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9db20]
>[118641.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9db20] width 1920 pitch 7680 (/4 1920)
>[118641.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9db20]
>[118641.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9db20] width 1920 pitch 7680 (/4 1920)
>[118641.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b860]
>[118641.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b860] width 1920 pitch 7680 (/4 1920)
>[118641.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[118641.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[118643.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a838e0]
>[118643.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a838e0] width 1920 pitch 7680 (/4 1920)
>[118648.324] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[118648.324] (II) RADEON(0): Using hsync ranges from config file
>[118648.324] (II) RADEON(0): Using vrefresh ranges from config file
>[118648.324] (II) RADEON(0): Printing DDC gathered Modelines:
>[118648.324] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[118648.324] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[118648.324] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[118648.324] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[118648.324] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[118648.324] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[118648.324] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[118648.324] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[118648.324] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[118648.324] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[118648.324] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[118648.324] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[118648.367] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[118648.367] (II) RADEON(0): Using hsync ranges from config file
>[118648.367] (II) RADEON(0): Using vrefresh ranges from config file
>[118648.367] (II) RADEON(0): Printing DDC gathered Modelines:
>[118648.367] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[118648.367] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[118648.367] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[118648.367] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[118648.367] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[118648.367] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[118648.367] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[118648.367] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[118648.367] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[118648.367] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[118648.367] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[118648.367] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[118648.415] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[118648.415] (II) RADEON(0): Using hsync ranges from config file
>[118648.415] (II) RADEON(0): Using vrefresh ranges from config file
>[118648.415] (II) RADEON(0): Printing DDC gathered Modelines:
>[118648.415] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[118648.415] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[118648.415] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[118648.415] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[118648.415] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[118648.415] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[118648.415] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[118648.415] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[118648.415] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[118648.415] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[118648.415] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[118648.415] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[118663.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e80c50]
>[118663.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e80c50] width 1920 pitch 7680 (/4 1920)
>[118716.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[118716.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[118731.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a12420]
>[118731.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a12420] width 1920 pitch 7680 (/4 1920)
>[118776.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[118776.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[118791.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[118791.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[118926.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[118926.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[118941.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[118941.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[118971.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[118971.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119001.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119001.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119031.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119031.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119046.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119046.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119061.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119061.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119076.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119076.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119091.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119091.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119106.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119106.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119121.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119121.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119136.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119136.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119151.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119151.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119166.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119166.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119181.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119181.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119196.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119196.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119226.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119226.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119241.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119241.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119301.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119301.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119331.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119331.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119436.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119436.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119451.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119451.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119511.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119511.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119526.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119526.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119586.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119586.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119601.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119601.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119604.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119604.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119604.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119604.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119604.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119604.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119604.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119604.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119604.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119604.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119604.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119604.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119605.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119605.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119605.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119605.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119605.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119605.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119605.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119605.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119605.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119605.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119605.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119606.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119607.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119607.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119607.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40400d0]
>[119607.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40400d0] width 1920 pitch 7680 (/4 1920)
>[119617.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119617.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119617.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40001e0]
>[119617.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40001e0] width 1920 pitch 7680 (/4 1920)
>[119617.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119617.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119617.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119617.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119617.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119617.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119617.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119617.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119618.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119618.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119618.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119618.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119618.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[119618.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[119618.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119618.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119618.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[119618.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[119618.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119619.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119619.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[119619.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[119619.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119619.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119706.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119706.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119721.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119721.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119736.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119736.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119751.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[119751.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[119766.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[119766.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[119781.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119781.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119796.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[119796.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[119826.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119826.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119841.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f360]
>[119841.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f360] width 1920 pitch 7680 (/4 1920)
>[119856.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[119856.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[119901.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119901.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[119916.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[119916.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120006.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120006.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120036.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120036.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120051.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0680]
>[120051.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0680] width 1920 pitch 7680 (/4 1920)
>[120066.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120066.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120081.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[120081.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[120126.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f360]
>[120126.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f360] width 1920 pitch 7680 (/4 1920)
>[120141.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120141.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120171.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120171.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120186.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120186.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120216.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[120216.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[120246.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120246.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120276.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8360]
>[120276.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8360] width 1920 pitch 7680 (/4 1920)
>[120291.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120291.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120306.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120306.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120321.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120321.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120336.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120336.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120351.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[120351.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[120366.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120366.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120381.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f360]
>[120381.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f360] width 1920 pitch 7680 (/4 1920)
>[120396.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120396.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120411.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120411.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120426.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[120426.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[120456.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120456.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120471.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120471.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120486.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120486.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120501.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120501.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120516.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120516.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120531.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120531.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120546.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120546.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120576.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120576.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120591.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120591.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120606.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120606.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120651.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120651.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120666.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120666.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120681.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[120681.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[120726.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120726.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120741.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120741.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120756.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f360]
>[120756.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f360] width 1920 pitch 7680 (/4 1920)
>[120771.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120771.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120801.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120801.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120816.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[120816.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[120846.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120846.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120861.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[120861.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[120876.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[120876.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[120966.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[120966.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[120981.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120981.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[120996.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[120996.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121011.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[121011.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[121131.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121131.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121146.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[121146.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[121161.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121161.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121176.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121176.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121206.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121206.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121221.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121221.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121236.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[121236.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[121281.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121281.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121296.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121296.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121311.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121311.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121326.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121326.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121341.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121341.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121431.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[121431.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[121446.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121446.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121476.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[121476.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[121491.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121491.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121521.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[121521.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[121536.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[121536.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[121596.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121596.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121611.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121611.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121626.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121626.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121716.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121716.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121731.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f360]
>[121731.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f360] width 1920 pitch 7680 (/4 1920)
>[121791.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121791.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121806.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121806.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121836.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121836.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121851.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121851.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121866.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[121866.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[121896.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[121896.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[121941.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121941.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121956.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121956.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[121971.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[121971.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[121986.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[121986.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122001.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0680]
>[122001.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0680] width 1920 pitch 7680 (/4 1920)
>[122031.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[122031.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[122046.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122046.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122061.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122061.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122091.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122091.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122106.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122106.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122121.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122121.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122136.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[122136.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[122286.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[122286.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[122301.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122301.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122316.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e3f0]
>[122316.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e3f0] width 1920 pitch 7680 (/4 1920)
>[122331.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f360]
>[122331.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f360] width 1920 pitch 7680 (/4 1920)
>[122346.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d049f0]
>[122346.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d049f0] width 1920 pitch 7680 (/4 1920)
>[122361.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ee40]
>[122361.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ee40] width 1920 pitch 7680 (/4 1920)
>[122376.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0680]
>[122376.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0680] width 1920 pitch 7680 (/4 1920)
>[122406.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[122406.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[122481.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122481.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122496.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122496.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122511.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122511.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122526.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122526.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122541.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122541.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122556.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122556.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122571.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122571.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122586.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122586.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122601.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122601.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122616.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122616.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122646.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122646.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122661.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122661.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122676.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122676.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122691.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122691.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122706.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122706.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122736.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122736.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122751.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122751.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122766.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122766.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122781.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122781.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122796.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122796.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122811.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122811.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122826.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122826.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122841.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122841.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122871.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122871.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122886.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122886.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122901.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122901.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122916.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122916.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122931.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122931.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[122946.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122946.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122961.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[122961.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[122976.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[122976.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[123036.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd65b0]
>[123036.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd65b0] width 1920 pitch 7680 (/4 1920)
>[123051.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d560]
>[123051.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d560] width 1920 pitch 7680 (/4 1920)
>[123070.170] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[123070.170] (II) RADEON(0): Using hsync ranges from config file
>[123070.170] (II) RADEON(0): Using vrefresh ranges from config file
>[123070.170] (II) RADEON(0): Printing DDC gathered Modelines:
>[123070.170] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[123070.170] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[123070.170] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[123070.170] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[123070.170] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[123070.170] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[123070.170] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[123070.170] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[123070.170] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[123070.170] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[123070.170] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[123070.170] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[123160.653] (II) RADEON(0): RADEONSaveScreen(2)
>[123160.653] (II) RADEON(0): RADEONSaveScreen(0)
>[123819.450] (II) RADEON(0): RADEONSaveScreen(1)
>[124129.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124130.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124179.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124179.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124194.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124194.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124209.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[124209.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[124224.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[124224.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[124254.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124254.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124299.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64aa0]
>[124299.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64aa0] width 1920 pitch 7680 (/4 1920)
>[124314.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb680]
>[124314.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb680] width 1920 pitch 7680 (/4 1920)
>[124359.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124359.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124374.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124374.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124389.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[124389.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[124404.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124404.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124434.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124434.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124569.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124569.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124584.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[124584.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[124599.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[124599.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[124614.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[124614.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[124644.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124644.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124674.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124674.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124689.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[124689.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[124719.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[124719.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[124734.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124734.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124749.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64aa0]
>[124749.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64aa0] width 1920 pitch 7680 (/4 1920)
>[124764.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[124764.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[124779.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124779.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124824.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[124824.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[124839.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124839.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124869.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64aa0]
>[124869.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64aa0] width 1920 pitch 7680 (/4 1920)
>[124899.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64aa0]
>[124899.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64aa0] width 1920 pitch 7680 (/4 1920)
>[124914.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[124914.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[124944.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124944.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124959.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[124959.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[124989.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[124989.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[125019.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[125019.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[125049.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125049.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125064.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64aa0]
>[125064.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64aa0] width 1920 pitch 7680 (/4 1920)
>[125079.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125079.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125094.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[125094.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[125109.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[125109.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[125169.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[125169.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[125199.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125199.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125214.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125214.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125229.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4020]
>[125229.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4020] width 1920 pitch 7680 (/4 1920)
>[125244.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125244.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125259.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909c50]
>[125259.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909c50] width 1920 pitch 7680 (/4 1920)
>[125274.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[125274.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[125289.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[125289.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[125319.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125319.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125334.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[125334.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[125349.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb680]
>[125349.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb680] width 1920 pitch 7680 (/4 1920)
>[125379.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[125379.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[125394.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125394.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125424.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125424.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125439.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125439.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125454.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[125454.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[125574.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[125574.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[125589.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[125589.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[125634.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd01f0]
>[125634.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd01f0] width 1920 pitch 7680 (/4 1920)
>[125649.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125649.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[125784.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[125784.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[125799.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d4e0]
>[125799.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d4e0] width 1920 pitch 7680 (/4 1920)
>[125814.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[125814.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[125829.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76030]
>[125829.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76030] width 1920 pitch 7680 (/4 1920)
>[125904.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2020]
>[125904.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2020] width 1920 pitch 7680 (/4 1920)
>[125919.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[125919.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[126003.536] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[126003.536] (II) RADEON(0): Using hsync ranges from config file
>[126003.536] (II) RADEON(0): Using vrefresh ranges from config file
>[126003.536] (II) RADEON(0): Printing DDC gathered Modelines:
>[126003.536] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[126003.536] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[126003.536] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[126003.536] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[126003.536] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[126003.536] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[126003.536] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[126003.536] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[126003.536] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[126003.536] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[126003.536] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[126003.536] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[126003.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4f50]
>[126003.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4f50] width 1920 pitch 7680 (/4 1920)
>[126009.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[126009.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[126024.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2710]
>[126024.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2710] width 1920 pitch 7680 (/4 1920)
>[126099.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[126099.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[126114.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2710]
>[126114.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2710] width 1920 pitch 7680 (/4 1920)
>[126234.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[126234.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[126249.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2710]
>[126249.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2710] width 1920 pitch 7680 (/4 1920)
>[126279.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[126279.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[126294.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2710]
>[126294.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2710] width 1920 pitch 7680 (/4 1920)
>[126339.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[126339.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[126354.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2710]
>[126354.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2710] width 1920 pitch 7680 (/4 1920)
>[126504.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39562d0]
>[126504.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39562d0] width 1920 pitch 7680 (/4 1920)
>[126519.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2710]
>[126519.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2710] width 1920 pitch 7680 (/4 1920)
>[126624.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[126624.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[126639.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b543a0]
>[126639.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b543a0] width 1920 pitch 7680 (/4 1920)
>[126924.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[126924.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[126939.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b543a0]
>[126939.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b543a0] width 1920 pitch 7680 (/4 1920)
>[127029.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127029.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127042.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c248b0]
>[127042.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c248b0] width 1920 pitch 7680 (/4 1920)
>[127042.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c7d0]
>[127042.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c7d0] width 1920 pitch 7680 (/4 1920)
>[127042.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[127042.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[127042.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c7d0]
>[127042.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c7d0] width 1920 pitch 7680 (/4 1920)
>[127042.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[127042.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[127042.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c7d0]
>[127042.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c7d0] width 1920 pitch 7680 (/4 1920)
>[127042.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb72c0]
>[127042.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb72c0] width 1920 pitch 7680 (/4 1920)
>[127042.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c7d0]
>[127042.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c7d0] width 1920 pitch 7680 (/4 1920)
>[127042.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127042.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127043.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c7d0]
>[127043.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c7d0] width 1920 pitch 7680 (/4 1920)
>[127043.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[127043.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[127043.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127043.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127043.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[127043.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[127043.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127043.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127043.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[127043.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[127043.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127043.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127043.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c248b0]
>[127043.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c248b0] width 1920 pitch 7680 (/4 1920)
>[127043.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c73b30]
>[127043.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c73b30] width 1920 pitch 7680 (/4 1920)
>[127043.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c248b0]
>[127043.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c248b0] width 1920 pitch 7680 (/4 1920)
>[127043.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c73b30]
>[127043.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c73b30] width 1920 pitch 7680 (/4 1920)
>[127044.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d95b70]
>[127044.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d95b70] width 1920 pitch 7680 (/4 1920)
>[127088.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4b260]
>[127088.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4b260] width 1920 pitch 7680 (/4 1920)
>[127088.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127088.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127088.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[127088.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[127088.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127088.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127088.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ed80]
>[127088.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ed80] width 1920 pitch 7680 (/4 1920)
>[127088.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e40240]
>[127088.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e40240] width 1920 pitch 7680 (/4 1920)
>[127089.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d420a0]
>[127089.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d420a0] width 1920 pitch 7680 (/4 1920)
>[127089.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5ed0]
>[127089.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5ed0] width 1920 pitch 7680 (/4 1920)
>[127089.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfeed0]
>[127089.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfeed0] width 1920 pitch 7680 (/4 1920)
>[127089.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2564f80]
>[127089.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2564f80] width 1920 pitch 7680 (/4 1920)
>[127104.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19650]
>[127104.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19650] width 1920 pitch 7680 (/4 1920)
>[127128.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127128.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127128.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[127128.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[127128.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fa00]
>[127128.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fa00] width 1920 pitch 7680 (/4 1920)
>[127134.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b660]
>[127134.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b660] width 1920 pitch 7680 (/4 1920)
>[127148.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4dff0]
>[127148.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4dff0] width 1920 pitch 7680 (/4 1920)
>[127149.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4dff0]
>[127149.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4dff0] width 1920 pitch 7680 (/4 1920)
>[127168.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a59c0]
>[127168.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a59c0] width 1920 pitch 7680 (/4 1920)
>[127168.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a59c0]
>[127168.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a59c0] width 1920 pitch 7680 (/4 1920)
>[127168.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a59c0]
>[127168.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a59c0] width 1920 pitch 7680 (/4 1920)
>[127168.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a59c0]
>[127168.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a59c0] width 1920 pitch 7680 (/4 1920)
>[127168.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0e5e0]
>[127168.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0e5e0] width 1920 pitch 7680 (/4 1920)
>[127168.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0e5e0]
>[127168.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0e5e0] width 1920 pitch 7680 (/4 1920)
>[127168.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcdf90]
>[127168.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcdf90] width 1920 pitch 7680 (/4 1920)
>[127168.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0e5e0]
>[127168.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0e5e0] width 1920 pitch 7680 (/4 1920)
>[127169.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c459b0]
>[127169.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c459b0] width 1920 pitch 7680 (/4 1920)
>[127169.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f440]
>[127169.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f440] width 1920 pitch 7680 (/4 1920)
>[127169.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[127169.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[127171.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38880]
>[127171.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38880] width 1920 pitch 7680 (/4 1920)
>[127172.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245b0a0]
>[127172.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245b0a0] width 1920 pitch 7680 (/4 1920)
>[127172.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1a90]
>[127172.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1a90] width 1920 pitch 7680 (/4 1920)
>[127172.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb9e80]
>[127172.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb9e80] width 1920 pitch 7680 (/4 1920)
>[127172.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0b3b0]
>[127172.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0b3b0] width 1920 pitch 7680 (/4 1920)
>[127172.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127172.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127172.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127172.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127172.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127172.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127172.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127172.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127172.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127172.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127172.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127172.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127173.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127173.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127173.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127173.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127173.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127173.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127173.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127173.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127173.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127173.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127173.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127173.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127179.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[127179.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[127188.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64300]
>[127188.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64300] width 1920 pitch 7680 (/4 1920)
>[127188.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24832d0]
>[127188.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24832d0] width 1920 pitch 7680 (/4 1920)
>[127189.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d59950]
>[127189.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d59950] width 1920 pitch 7680 (/4 1920)
>[127190.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9fca0]
>[127190.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9fca0] width 1920 pitch 7680 (/4 1920)
>[127190.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115560]
>[127190.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115560] width 1920 pitch 7680 (/4 1920)
>[127190.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127190.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127192.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19650]
>[127192.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19650] width 1920 pitch 7680 (/4 1920)
>[127192.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527d90]
>[127192.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527d90] width 1920 pitch 7680 (/4 1920)
>[127192.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c7d0]
>[127192.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c7d0] width 1920 pitch 7680 (/4 1920)
>[127194.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb9e80]
>[127194.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb9e80] width 1920 pitch 7680 (/4 1920)
>[127195.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e59e10]
>[127195.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e59e10] width 1920 pitch 7680 (/4 1920)
>[127195.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c459b0]
>[127195.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c459b0] width 1920 pitch 7680 (/4 1920)
>[127195.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25614c0]
>[127195.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25614c0] width 1920 pitch 7680 (/4 1920)
>[127195.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127195.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127204.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127204.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127204.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127204.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127204.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127204.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127204.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127204.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127204.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127205.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127205.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127206.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127206.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127206.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127206.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127206.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127206.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127206.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[127206.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[127206.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c406c0]
>[127206.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c406c0] width 1920 pitch 7680 (/4 1920)
>[127207.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cfb90]
>[127207.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cfb90] width 1920 pitch 7680 (/4 1920)
>[127207.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25614c0]
>[127207.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25614c0] width 1920 pitch 7680 (/4 1920)
>[127207.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cfb90]
>[127207.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cfb90] width 1920 pitch 7680 (/4 1920)
>[127207.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25614c0]
>[127207.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25614c0] width 1920 pitch 7680 (/4 1920)
>[127207.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cfb90]
>[127207.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cfb90] width 1920 pitch 7680 (/4 1920)
>[127207.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fd460]
>[127207.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fd460] width 1920 pitch 7680 (/4 1920)
>[127207.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2483610]
>[127207.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2483610] width 1920 pitch 7680 (/4 1920)
>[127207.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127207.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127207.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09490]
>[127207.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09490] width 1920 pitch 7680 (/4 1920)
>[127207.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127207.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127207.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09490]
>[127207.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09490] width 1920 pitch 7680 (/4 1920)
>[127207.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127207.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127207.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09490]
>[127207.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09490] width 1920 pitch 7680 (/4 1920)
>[127207.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f540]
>[127207.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f540] width 1920 pitch 7680 (/4 1920)
>[127207.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09490]
>[127207.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09490] width 1920 pitch 7680 (/4 1920)
>[127207.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2527d90]
>[127207.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2527d90] width 1920 pitch 7680 (/4 1920)
>[127207.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ff00]
>[127207.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ff00] width 1920 pitch 7680 (/4 1920)
>[127207.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[127207.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[127207.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38880]
>[127207.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38880] width 1920 pitch 7680 (/4 1920)
>[127207.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[127207.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[127207.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38880]
>[127207.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38880] width 1920 pitch 7680 (/4 1920)
>[127207.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[127207.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[127207.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575590]
>[127207.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575590] width 1920 pitch 7680 (/4 1920)
>[127207.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead160]
>[127207.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead160] width 1920 pitch 7680 (/4 1920)
>[127207.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5550]
>[127208.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5550] width 1920 pitch 7680 (/4 1920)
>[127208.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5550]
>[127208.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5550] width 1920 pitch 7680 (/4 1920)
>[127208.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2575590]
>[127208.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2575590] width 1920 pitch 7680 (/4 1920)
>[127209.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127209.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127209.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b740]
>[127209.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b740] width 1920 pitch 7680 (/4 1920)
>[127209.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127209.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127209.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127209.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127209.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127210.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127210.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127210.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127210.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127210.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127210.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127210.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127210.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127210.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127210.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127210.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127210.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127210.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127210.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127210.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127210.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127210.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127210.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4f00]
>[127210.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4f00] width 1920 pitch 7680 (/4 1920)
>[127214.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e9a0]
>[127214.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e9a0] width 1920 pitch 7680 (/4 1920)
>[127214.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a2b0]
>[127214.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a2b0] width 1920 pitch 7680 (/4 1920)
>[127214.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90630]
>[127214.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90630] width 1920 pitch 7680 (/4 1920)
>[127214.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127214.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90630]
>[127214.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90630] width 1920 pitch 7680 (/4 1920)
>[127214.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127214.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90630]
>[127214.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90630] width 1920 pitch 7680 (/4 1920)
>[127214.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127214.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e9a0]
>[127214.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e9a0] width 1920 pitch 7680 (/4 1920)
>[127214.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127214.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127214.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127214.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127214.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127214.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127214.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127214.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127214.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127214.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57260]
>[127214.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57260] width 1920 pitch 7680 (/4 1920)
>[127214.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316eb70]
>[127214.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316eb70] width 1920 pitch 7680 (/4 1920)
>[127228.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0fe40]
>[127228.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0fe40] width 1920 pitch 7680 (/4 1920)
>[127284.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b52810]
>[127284.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b52810] width 1920 pitch 7680 (/4 1920)
>[127297.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e562c0]
>[127297.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e562c0] width 1920 pitch 7680 (/4 1920)
>[127297.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20ec0]
>[127297.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20ec0] width 1920 pitch 7680 (/4 1920)
>[127297.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e562c0]
>[127297.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e562c0] width 1920 pitch 7680 (/4 1920)
>[127297.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20ec0]
>[127298.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20ec0] width 1920 pitch 7680 (/4 1920)
>[127298.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e562c0]
>[127298.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e562c0] width 1920 pitch 7680 (/4 1920)
>[127298.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20ec0]
>[127298.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20ec0] width 1920 pitch 7680 (/4 1920)
>[127298.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38480]
>[127298.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38480] width 1920 pitch 7680 (/4 1920)
>[127298.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f010]
>[127298.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f010] width 1920 pitch 7680 (/4 1920)
>[127298.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38480]
>[127298.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38480] width 1920 pitch 7680 (/4 1920)
>[127298.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f010]
>[127298.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f010] width 1920 pitch 7680 (/4 1920)
>[127298.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38480]
>[127298.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38480] width 1920 pitch 7680 (/4 1920)
>[127298.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f010]
>[127298.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f010] width 1920 pitch 7680 (/4 1920)
>[127298.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38480]
>[127298.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38480] width 1920 pitch 7680 (/4 1920)
>[127298.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e58520]
>[127298.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e58520] width 1920 pitch 7680 (/4 1920)
>[127298.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38480]
>[127298.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38480] width 1920 pitch 7680 (/4 1920)
>[127298.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e58520]
>[127298.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e58520] width 1920 pitch 7680 (/4 1920)
>[127298.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38480]
>[127298.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38480] width 1920 pitch 7680 (/4 1920)
>[127299.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd19d0]
>[127299.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd19d0] width 1920 pitch 7680 (/4 1920)
>[127303.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd7310]
>[127303.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd7310] width 1920 pitch 7680 (/4 1920)
>[127303.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf6b0]
>[127303.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf6b0] width 1920 pitch 7680 (/4 1920)
>[127303.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d52100]
>[127303.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d52100] width 1920 pitch 7680 (/4 1920)
>[127303.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf6b0]
>[127303.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf6b0] width 1920 pitch 7680 (/4 1920)
>[127303.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d52100]
>[127303.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d52100] width 1920 pitch 7680 (/4 1920)
>[127303.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf6b0]
>[127303.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf6b0] width 1920 pitch 7680 (/4 1920)
>[127303.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6ac0]
>[127303.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6ac0] width 1920 pitch 7680 (/4 1920)
>[127303.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd7640]
>[127303.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd7640] width 1920 pitch 7680 (/4 1920)
>[127303.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6ac0]
>[127303.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6ac0] width 1920 pitch 7680 (/4 1920)
>[127303.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd7640]
>[127303.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd7640] width 1920 pitch 7680 (/4 1920)
>[127303.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6ac0]
>[127303.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6ac0] width 1920 pitch 7680 (/4 1920)
>[127303.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd7640]
>[127303.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd7640] width 1920 pitch 7680 (/4 1920)
>[127303.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6ac0]
>[127303.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6ac0] width 1920 pitch 7680 (/4 1920)
>[127303.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd7640]
>[127303.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd7640] width 1920 pitch 7680 (/4 1920)
>[127303.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6ac0]
>[127303.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6ac0] width 1920 pitch 7680 (/4 1920)
>[127303.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd7640]
>[127303.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd7640] width 1920 pitch 7680 (/4 1920)
>[127303.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6ac0]
>[127303.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6ac0] width 1920 pitch 7680 (/4 1920)
>[127303.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcf720]
>[127303.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcf720] width 1920 pitch 7680 (/4 1920)
>[127309.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e562c0]
>[127309.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e562c0] width 1920 pitch 7680 (/4 1920)
>[127309.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf8c0]
>[127309.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf8c0] width 1920 pitch 7680 (/4 1920)
>[127309.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e562c0]
>[127309.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e562c0] width 1920 pitch 7680 (/4 1920)
>[127309.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf8c0]
>[127309.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf8c0] width 1920 pitch 7680 (/4 1920)
>[127309.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127309.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf8c0]
>[127309.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf8c0] width 1920 pitch 7680 (/4 1920)
>[127309.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127309.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf8c0]
>[127309.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf8c0] width 1920 pitch 7680 (/4 1920)
>[127309.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127309.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cf8c0]
>[127309.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cf8c0] width 1920 pitch 7680 (/4 1920)
>[127309.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127309.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38c50]
>[127309.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38c50] width 1920 pitch 7680 (/4 1920)
>[127309.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127309.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38c50]
>[127309.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38c50] width 1920 pitch 7680 (/4 1920)
>[127309.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127309.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38c50]
>[127309.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38c50] width 1920 pitch 7680 (/4 1920)
>[127309.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3946c80]
>[127309.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3946c80] width 1920 pitch 7680 (/4 1920)
>[127312.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9a810]
>[127312.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9a810] width 1920 pitch 7680 (/4 1920)
>[127312.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b336e0]
>[127312.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b336e0] width 1920 pitch 7680 (/4 1920)
>[127312.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9a810]
>[127312.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9a810] width 1920 pitch 7680 (/4 1920)
>[127312.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b336e0]
>[127312.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b336e0] width 1920 pitch 7680 (/4 1920)
>[127312.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9a810]
>[127312.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9a810] width 1920 pitch 7680 (/4 1920)
>[127312.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b336e0]
>[127312.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b336e0] width 1920 pitch 7680 (/4 1920)
>[127312.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9a810]
>[127312.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9a810] width 1920 pitch 7680 (/4 1920)
>[127312.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae960]
>[127312.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae960] width 1920 pitch 7680 (/4 1920)
>[127312.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb3d80]
>[127312.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb3d80] width 1920 pitch 7680 (/4 1920)
>[127312.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae960]
>[127312.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae960] width 1920 pitch 7680 (/4 1920)
>[127312.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb3d80]
>[127312.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb3d80] width 1920 pitch 7680 (/4 1920)
>[127312.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae960]
>[127312.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae960] width 1920 pitch 7680 (/4 1920)
>[127312.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb3d80]
>[127312.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb3d80] width 1920 pitch 7680 (/4 1920)
>[127312.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae960]
>[127312.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae960] width 1920 pitch 7680 (/4 1920)
>[127312.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb3d80]
>[127312.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb3d80] width 1920 pitch 7680 (/4 1920)
>[127312.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae960]
>[127312.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae960] width 1920 pitch 7680 (/4 1920)
>[127312.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb3d80]
>[127312.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb3d80] width 1920 pitch 7680 (/4 1920)
>[127312.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cae960]
>[127312.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cae960] width 1920 pitch 7680 (/4 1920)
>[127344.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568ef0]
>[127344.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568ef0] width 1920 pitch 7680 (/4 1920)
>[127374.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbe940]
>[127374.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbe940] width 1920 pitch 7680 (/4 1920)
>[127377.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6df0]
>[127377.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6df0] width 1920 pitch 7680 (/4 1920)
>[127377.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49400]
>[127377.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49400] width 1920 pitch 7680 (/4 1920)
>[127377.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127377.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127377.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49400]
>[127377.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49400] width 1920 pitch 7680 (/4 1920)
>[127377.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127377.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127377.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49400]
>[127377.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49400] width 1920 pitch 7680 (/4 1920)
>[127377.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127377.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127377.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49400]
>[127377.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49400] width 1920 pitch 7680 (/4 1920)
>[127377.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127377.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127377.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c49400]
>[127377.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c49400] width 1920 pitch 7680 (/4 1920)
>[127377.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127377.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127377.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6df0]
>[127377.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6df0] width 1920 pitch 7680 (/4 1920)
>[127377.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7e50]
>[127377.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7e50] width 1920 pitch 7680 (/4 1920)
>[127378.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed05c0]
>[127378.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed05c0] width 1920 pitch 7680 (/4 1920)
>[127378.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127378.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127378.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7e50]
>[127378.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7e50] width 1920 pitch 7680 (/4 1920)
>[127378.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127378.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127378.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7e50]
>[127378.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7e50] width 1920 pitch 7680 (/4 1920)
>[127379.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[127379.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[127379.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7e50]
>[127379.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7e50] width 1920 pitch 7680 (/4 1920)
>[127379.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe170]
>[127379.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe170] width 1920 pitch 7680 (/4 1920)
>[127381.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed05c0]
>[127381.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed05c0] width 1920 pitch 7680 (/4 1920)
>[127381.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed0ef0]
>[127381.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed0ef0] width 1920 pitch 7680 (/4 1920)
>[127382.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127382.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127382.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127382.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127382.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127382.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed05c0]
>[127382.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed05c0] width 1920 pitch 7680 (/4 1920)
>[127382.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127382.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24db400]
>[127382.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24db400] width 1920 pitch 7680 (/4 1920)
>[127382.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20dd0]
>[127382.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20dd0] width 1920 pitch 7680 (/4 1920)
>[127383.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed05c0]
>[127383.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed05c0] width 1920 pitch 7680 (/4 1920)
>[127383.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abe130]
>[127383.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abe130] width 1920 pitch 7680 (/4 1920)
>[127383.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6df0]
>[127383.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6df0] width 1920 pitch 7680 (/4 1920)
>[127384.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7e50]
>[127384.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7e50] width 1920 pitch 7680 (/4 1920)
>[127384.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed0f30]
>[127384.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed0f30] width 1920 pitch 7680 (/4 1920)
>[127385.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf1960]
>[127385.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf1960] width 1920 pitch 7680 (/4 1920)
>[127385.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed0f30]
>[127385.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed0f30] width 1920 pitch 7680 (/4 1920)
>[127385.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf1960]
>[127385.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf1960] width 1920 pitch 7680 (/4 1920)
>[127385.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed0f30]
>[127385.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed0f30] width 1920 pitch 7680 (/4 1920)
>[127385.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf1960]
>[127385.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf1960] width 1920 pitch 7680 (/4 1920)
>[127385.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4390]
>[127385.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4390] width 1920 pitch 7680 (/4 1920)
>[127385.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4390]
>[127385.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4390] width 1920 pitch 7680 (/4 1920)
>[127385.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4390]
>[127385.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4390] width 1920 pitch 7680 (/4 1920)
>[127385.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3937110]
>[127385.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3937110] width 1920 pitch 7680 (/4 1920)
>[127388.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127388.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127389.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20270]
>[127389.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20270] width 1920 pitch 7680 (/4 1920)
>[127389.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127389.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127389.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20270]
>[127389.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20270] width 1920 pitch 7680 (/4 1920)
>[127390.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d206f0]
>[127390.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d206f0] width 1920 pitch 7680 (/4 1920)
>[127390.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20870]
>[127390.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20870] width 1920 pitch 7680 (/4 1920)
>[127390.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127390.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127390.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20870]
>[127390.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20870] width 1920 pitch 7680 (/4 1920)
>[127390.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127390.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127390.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20870]
>[127390.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20870] width 1920 pitch 7680 (/4 1920)
>[127390.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127390.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127390.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20870]
>[127390.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20870] width 1920 pitch 7680 (/4 1920)
>[127390.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127390.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127390.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20870]
>[127390.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20870] width 1920 pitch 7680 (/4 1920)
>[127390.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127390.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127391.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff9180]
>[127391.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff9180] width 1920 pitch 7680 (/4 1920)
>[127391.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127391.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127391.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d208e0]
>[127391.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d208e0] width 1920 pitch 7680 (/4 1920)
>[127391.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20940]
>[127391.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20940] width 1920 pitch 7680 (/4 1920)
>[127391.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d208e0]
>[127391.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d208e0] width 1920 pitch 7680 (/4 1920)
>[127391.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20940]
>[127391.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20940] width 1920 pitch 7680 (/4 1920)
>[127391.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d208e0]
>[127391.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d208e0] width 1920 pitch 7680 (/4 1920)
>[127391.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20940]
>[127391.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20940] width 1920 pitch 7680 (/4 1920)
>[127391.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d208e0]
>[127391.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d208e0] width 1920 pitch 7680 (/4 1920)
>[127391.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20940]
>[127391.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20940] width 1920 pitch 7680 (/4 1920)
>[127391.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d208e0]
>[127391.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d208e0] width 1920 pitch 7680 (/4 1920)
>[127392.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede5a0]
>[127392.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede5a0] width 1920 pitch 7680 (/4 1920)
>[127392.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede600]
>[127392.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede600] width 1920 pitch 7680 (/4 1920)
>[127392.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede5a0]
>[127392.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede5a0] width 1920 pitch 7680 (/4 1920)
>[127392.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede600]
>[127392.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede600] width 1920 pitch 7680 (/4 1920)
>[127392.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede5a0]
>[127392.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede5a0] width 1920 pitch 7680 (/4 1920)
>[127392.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede600]
>[127392.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede600] width 1920 pitch 7680 (/4 1920)
>[127392.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede5a0]
>[127392.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede5a0] width 1920 pitch 7680 (/4 1920)
>[127392.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede600]
>[127392.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede600] width 1920 pitch 7680 (/4 1920)
>[127392.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede5a0]
>[127392.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede5a0] width 1920 pitch 7680 (/4 1920)
>[127392.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede600]
>[127392.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede600] width 1920 pitch 7680 (/4 1920)
>[127392.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede5a0]
>[127392.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede5a0] width 1920 pitch 7680 (/4 1920)
>[127392.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d20940]
>[127392.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d20940] width 1920 pitch 7680 (/4 1920)
>[127393.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40196c0]
>[127393.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40196c0] width 1920 pitch 7680 (/4 1920)
>[127393.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019740]
>[127393.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019740] width 1920 pitch 7680 (/4 1920)
>[127393.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40196c0]
>[127393.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40196c0] width 1920 pitch 7680 (/4 1920)
>[127393.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019740]
>[127393.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019740] width 1920 pitch 7680 (/4 1920)
>[127393.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40196c0]
>[127393.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40196c0] width 1920 pitch 7680 (/4 1920)
>[127393.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019740]
>[127393.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019740] width 1920 pitch 7680 (/4 1920)
>[127393.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40196c0]
>[127393.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40196c0] width 1920 pitch 7680 (/4 1920)
>[127393.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff9120]
>[127393.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff9120] width 1920 pitch 7680 (/4 1920)
>[127393.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40196c0]
>[127393.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40196c0] width 1920 pitch 7680 (/4 1920)
>[127393.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d208a0]
>[127393.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d208a0] width 1920 pitch 7680 (/4 1920)
>[127394.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3927b40]
>[127394.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3927b40] width 1920 pitch 7680 (/4 1920)
>[127394.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edba70]
>[127394.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edba70] width 1920 pitch 7680 (/4 1920)
>[127394.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6df0]
>[127395.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6df0] width 1920 pitch 7680 (/4 1920)
>[127395.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127395.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127395.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127395.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127395.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127395.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127395.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127395.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127395.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127395.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127395.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127395.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127395.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3fa0]
>[127395.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3fa0] width 1920 pitch 7680 (/4 1920)
>[127395.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127395.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127395.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb6490]
>[127395.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb6490] width 1920 pitch 7680 (/4 1920)
>[127395.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127396.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127396.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb6510]
>[127396.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb6510] width 1920 pitch 7680 (/4 1920)
>[127396.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127396.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127396.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb6510]
>[127396.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb6510] width 1920 pitch 7680 (/4 1920)
>[127396.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edba00]
>[127396.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edba00] width 1920 pitch 7680 (/4 1920)
>[127397.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11fa0]
>[127397.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11fa0] width 1920 pitch 7680 (/4 1920)
>[127397.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11fa0]
>[127397.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11fa0] width 1920 pitch 7680 (/4 1920)
>[127397.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127397.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127397.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127397.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127397.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127397.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127397.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127397.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127397.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127397.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127397.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127397.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127397.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127397.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127397.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127397.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127397.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127397.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127397.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758c0]
>[127397.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758c0] width 1920 pitch 7680 (/4 1920)
>[127397.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6fe20]
>[127397.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6fe20] width 1920 pitch 7680 (/4 1920)
>[127397.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11fa0]
>[127397.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11fa0] width 1920 pitch 7680 (/4 1920)
>[127419.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f129c0]
>[127419.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f129c0] width 1920 pitch 7680 (/4 1920)
>[127434.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc7b10]
>[127434.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc7b10] width 1920 pitch 7680 (/4 1920)
>[127449.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8ef0]
>[127449.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8ef0] width 1920 pitch 7680 (/4 1920)
>[127464.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d7a40]
>[127464.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d7a40] width 1920 pitch 7680 (/4 1920)
>[127479.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b950]
>[127479.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b950] width 1920 pitch 7680 (/4 1920)
>[127539.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25263c0]
>[127539.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25263c0] width 1920 pitch 7680 (/4 1920)
>[127554.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df99c0]
>[127554.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df99c0] width 1920 pitch 7680 (/4 1920)
>[127599.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8560]
>[127599.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8560] width 1920 pitch 7680 (/4 1920)
>[127614.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90510]
>[127614.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90510] width 1920 pitch 7680 (/4 1920)
>[127629.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd4300]
>[127629.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd4300] width 1920 pitch 7680 (/4 1920)
>[127644.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a380]
>[127644.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a380] width 1920 pitch 7680 (/4 1920)
>[127659.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a380]
>[127659.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a380] width 1920 pitch 7680 (/4 1920)
>[127689.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea0760]
>[127689.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea0760] width 1920 pitch 7680 (/4 1920)
>[127713.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8560]
>[127713.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8560] width 1920 pitch 7680 (/4 1920)
>[127714.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112f80]
>[127714.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112f80] width 1920 pitch 7680 (/4 1920)
>[127714.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c658b0]
>[127714.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c658b0] width 1920 pitch 7680 (/4 1920)
>[127714.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dcb60]
>[127714.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dcb60] width 1920 pitch 7680 (/4 1920)
>[127719.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112f80]
>[127719.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112f80] width 1920 pitch 7680 (/4 1920)
>[127734.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112f80]
>[127734.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112f80] width 1920 pitch 7680 (/4 1920)
>[127736.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113a10]
>[127736.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113a10] width 1920 pitch 7680 (/4 1920)
>[127737.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7e4d0]
>[127737.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7e4d0] width 1920 pitch 7680 (/4 1920)
>[127737.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[127737.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[127737.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255f0d0]
>[127737.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255f0d0] width 1920 pitch 7680 (/4 1920)
>[127749.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f129c0]
>[127749.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f129c0] width 1920 pitch 7680 (/4 1920)
>[127779.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[127779.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[127809.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b97e00]
>[127809.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b97e00] width 1920 pitch 7680 (/4 1920)
>[127824.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae93a0]
>[127824.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae93a0] width 1920 pitch 7680 (/4 1920)
>[127839.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8560]
>[127839.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8560] width 1920 pitch 7680 (/4 1920)
>[127884.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc7b10]
>[127884.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc7b10] width 1920 pitch 7680 (/4 1920)
>[127899.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40192d0]
>[127899.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40192d0] width 1920 pitch 7680 (/4 1920)
>[127929.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8560]
>[127929.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8560] width 1920 pitch 7680 (/4 1920)
>[127944.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f77f0]
>[127944.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f77f0] width 1920 pitch 7680 (/4 1920)
>[127959.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc7b10]
>[127959.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc7b10] width 1920 pitch 7680 (/4 1920)
>[128004.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315baf0]
>[128004.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315baf0] width 1920 pitch 7680 (/4 1920)
>[128019.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[128019.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[128034.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7e4d0]
>[128034.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7e4d0] width 1920 pitch 7680 (/4 1920)
>[128064.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255f0d0]
>[128064.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255f0d0] width 1920 pitch 7680 (/4 1920)
>[128079.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8fa00]
>[128079.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8fa00] width 1920 pitch 7680 (/4 1920)
>[128094.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc7b10]
>[128094.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc7b10] width 1920 pitch 7680 (/4 1920)
>[128109.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[128109.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[128124.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255f0d0]
>[128124.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255f0d0] width 1920 pitch 7680 (/4 1920)
>[128139.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8fa00]
>[128139.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8fa00] width 1920 pitch 7680 (/4 1920)
>[128154.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f8560]
>[128154.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f8560] width 1920 pitch 7680 (/4 1920)
>[128169.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df99c0]
>[128169.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df99c0] width 1920 pitch 7680 (/4 1920)
>[128184.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[128184.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[128199.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25263c0]
>[128199.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25263c0] width 1920 pitch 7680 (/4 1920)
>[128229.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2537fa0]
>[128229.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2537fa0] width 1920 pitch 7680 (/4 1920)
>[128244.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ea40]
>[128244.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ea40] width 1920 pitch 7680 (/4 1920)
>[128259.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315baf0]
>[128259.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315baf0] width 1920 pitch 7680 (/4 1920)
>[128289.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[128289.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[128304.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40192d0]
>[128304.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40192d0] width 1920 pitch 7680 (/4 1920)
>[128319.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea0760]
>[128319.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea0760] width 1920 pitch 7680 (/4 1920)
>[128334.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ec50]
>[128334.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ec50] width 1920 pitch 7680 (/4 1920)
>[128363.075] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[128363.075] (II) RADEON(0): Using hsync ranges from config file
>[128363.075] (II) RADEON(0): Using vrefresh ranges from config file
>[128363.075] (II) RADEON(0): Printing DDC gathered Modelines:
>[128363.075] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[128363.075] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[128363.075] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[128363.075] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[128363.075] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[128363.075] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[128363.075] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[128363.075] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[128363.075] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[128363.075] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[128363.075] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[128363.075] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[128364.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae93a0]
>[128364.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae93a0] width 1920 pitch 7680 (/4 1920)
>[128453.666] (II) RADEON(0): RADEONSaveScreen(2)
>[128453.666] (II) RADEON(0): RADEONSaveScreen(0)
>[129415.104] (II) RADEON(0): RADEONSaveScreen(1)
>[129415.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25275d0]
>[129415.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25275d0] width 1920 pitch 7680 (/4 1920)
>[129419.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129419.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129419.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129419.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129419.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129419.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129419.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129419.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129419.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129419.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129419.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129420.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129420.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129420.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129420.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129420.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129420.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129420.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129420.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129420.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129420.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129420.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129420.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129420.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129420.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129420.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129421.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129421.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129421.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129421.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129422.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129422.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129422.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129422.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129422.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129422.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129422.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129422.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129422.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129422.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129422.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129422.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129422.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129422.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129422.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129422.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129423.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129423.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129423.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129423.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129423.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129423.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129423.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129423.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129423.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129423.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129423.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129423.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129423.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129423.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129426.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129426.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129426.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129426.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129426.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129426.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129426.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129426.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129426.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129426.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129426.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129426.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129426.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129426.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129426.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129426.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129426.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129426.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129426.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129426.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129426.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129426.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129426.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129427.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129427.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129427.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129427.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129427.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129428.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb52c0]
>[129428.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb52c0] width 1920 pitch 7680 (/4 1920)
>[129428.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbd790]
>[129428.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbd790] width 1920 pitch 7680 (/4 1920)
>[129428.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1c620]
>[129428.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1c620] width 1920 pitch 7680 (/4 1920)
>[129428.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d05be0]
>[129428.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d05be0] width 1920 pitch 7680 (/4 1920)
>[129428.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb950]
>[129428.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb950] width 1920 pitch 7680 (/4 1920)
>[129428.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cc9b0]
>[129428.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cc9b0] width 1920 pitch 7680 (/4 1920)
>[129428.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b788f0]
>[129428.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b788f0] width 1920 pitch 7680 (/4 1920)
>[129428.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1b80]
>[129428.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1b80] width 1920 pitch 7680 (/4 1920)
>[129428.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5c9c0]
>[129428.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5c9c0] width 1920 pitch 7680 (/4 1920)
>[129428.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5c7b0]
>[129428.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5c7b0] width 1920 pitch 7680 (/4 1920)
>[129428.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5c750]
>[129428.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5c750] width 1920 pitch 7680 (/4 1920)
>[129428.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5c7b0]
>[129428.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5c7b0] width 1920 pitch 7680 (/4 1920)
>[129428.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5c750]
>[129428.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5c750] width 1920 pitch 7680 (/4 1920)
>[129431.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04d70]
>[129431.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04d70] width 1920 pitch 7680 (/4 1920)
>[129443.803] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[129443.803] (II) RADEON(0): Using hsync ranges from config file
>[129443.803] (II) RADEON(0): Using vrefresh ranges from config file
>[129443.803] (II) RADEON(0): Printing DDC gathered Modelines:
>[129443.803] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[129443.803] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[129443.803] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[129443.803] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[129443.803] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[129443.803] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[129443.803] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[129443.803] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[129443.803] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[129443.803] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[129443.803] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[129443.803] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[129443.848] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[129443.848] (II) RADEON(0): Using hsync ranges from config file
>[129443.848] (II) RADEON(0): Using vrefresh ranges from config file
>[129443.848] (II) RADEON(0): Printing DDC gathered Modelines:
>[129443.848] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[129443.848] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[129443.848] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[129443.848] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[129443.848] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[129443.848] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[129443.848] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[129443.848] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[129443.848] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[129443.848] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[129443.848] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[129443.848] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[129443.898] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[129443.898] (II) RADEON(0): Using hsync ranges from config file
>[129443.898] (II) RADEON(0): Using vrefresh ranges from config file
>[129443.898] (II) RADEON(0): Printing DDC gathered Modelines:
>[129443.898] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[129443.898] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[129443.898] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[129443.898] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[129443.898] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[129443.898] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[129443.898] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[129443.898] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[129443.898] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[129443.898] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[129443.898] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[129443.898] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[129451.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29210]
>[129451.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29210] width 1920 pitch 7680 (/4 1920)
>[129490.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c295c0]
>[129490.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c295c0] width 1920 pitch 7680 (/4 1920)
>[129505.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85840]
>[129505.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85840] width 1920 pitch 7680 (/4 1920)
>[129565.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b858a0]
>[129565.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b858a0] width 1920 pitch 7680 (/4 1920)
>[129580.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85840]
>[129580.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85840] width 1920 pitch 7680 (/4 1920)
>[129595.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85a60]
>[129595.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85a60] width 1920 pitch 7680 (/4 1920)
>[129610.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29640]
>[129610.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29640] width 1920 pitch 7680 (/4 1920)
>[129670.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b858a0]
>[129670.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b858a0] width 1920 pitch 7680 (/4 1920)
>[129700.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85900]
>[129700.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85900] width 1920 pitch 7680 (/4 1920)
>[129715.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c294f0]
>[129715.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c294f0] width 1920 pitch 7680 (/4 1920)
>[129730.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b858a0]
>[129730.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b858a0] width 1920 pitch 7680 (/4 1920)
>[129805.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85900]
>[129805.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85900] width 1920 pitch 7680 (/4 1920)
>[129820.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85900]
>[129820.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85900] width 1920 pitch 7680 (/4 1920)
>[129910.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c295d0]
>[129910.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c295d0] width 1920 pitch 7680 (/4 1920)
>[129925.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85b60]
>[129925.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85b60] width 1920 pitch 7680 (/4 1920)
>[129970.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85b60]
>[129970.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85b60] width 1920 pitch 7680 (/4 1920)
>[129985.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29460]
>[129985.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29460] width 1920 pitch 7680 (/4 1920)
>[130000.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85b60]
>[130000.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85b60] width 1920 pitch 7680 (/4 1920)
>[130030.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85e60]
>[130030.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85e60] width 1920 pitch 7680 (/4 1920)
>[130045.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b859e0]
>[130045.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b859e0] width 1920 pitch 7680 (/4 1920)
>[130120.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b859e0]
>[130120.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b859e0] width 1920 pitch 7680 (/4 1920)
>[130135.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130135.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130150.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfb50]
>[130150.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfb50] width 1920 pitch 7680 (/4 1920)
>[130165.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfb50]
>[130165.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfb50] width 1920 pitch 7680 (/4 1920)
>[130180.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfb50]
>[130180.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfb50] width 1920 pitch 7680 (/4 1920)
>[130195.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130195.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130210.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130210.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130225.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfb50]
>[130225.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfb50] width 1920 pitch 7680 (/4 1920)
>[130240.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130240.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130270.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c295b0]
>[130270.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c295b0] width 1920 pitch 7680 (/4 1920)
>[130285.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c295b0]
>[130285.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c295b0] width 1920 pitch 7680 (/4 1920)
>[130315.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c295b0]
>[130315.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c295b0] width 1920 pitch 7680 (/4 1920)
>[130330.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfb50]
>[130330.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfb50] width 1920 pitch 7680 (/4 1920)
>[130360.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c295b0]
>[130360.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c295b0] width 1920 pitch 7680 (/4 1920)
>[130390.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfb50]
>[130390.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfb50] width 1920 pitch 7680 (/4 1920)
>[130420.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85e60]
>[130420.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85e60] width 1920 pitch 7680 (/4 1920)
>[130450.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85840]
>[130450.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85840] width 1920 pitch 7680 (/4 1920)
>[130465.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29630]
>[130465.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29630] width 1920 pitch 7680 (/4 1920)
>[130510.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29630]
>[130510.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29630] width 1920 pitch 7680 (/4 1920)
>[130525.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29630]
>[130525.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29630] width 1920 pitch 7680 (/4 1920)
>[130540.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130540.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130555.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29630]
>[130555.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29630] width 1920 pitch 7680 (/4 1920)
>[130570.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130570.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130585.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130585.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130600.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c29630]
>[130600.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c29630] width 1920 pitch 7680 (/4 1920)
>[130615.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130615.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130630.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36790]
>[130630.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36790] width 1920 pitch 7680 (/4 1920)
>[130645.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85840]
>[130645.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85840] width 1920 pitch 7680 (/4 1920)
>[130675.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfbc0]
>[130675.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfbc0] width 1920 pitch 7680 (/4 1920)
>[130698.066] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[130698.066] (II) RADEON(0): Using hsync ranges from config file
>[130698.066] (II) RADEON(0): Using vrefresh ranges from config file
>[130698.066] (II) RADEON(0): Printing DDC gathered Modelines:
>[130698.066] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[130698.066] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[130698.066] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[130698.066] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[130698.066] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[130698.066] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[130698.066] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[130698.066] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[130698.066] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[130698.066] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[130698.066] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[130698.066] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[130698.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd8500]
>[130698.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd8500] width 1920 pitch 7680 (/4 1920)
>[130715.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d8e20]
>[130715.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d8e20] width 1920 pitch 7680 (/4 1920)
>[130716.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b1c620]
>[130716.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b1c620] width 1920 pitch 7680 (/4 1920)
>[130717.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67f30]
>[130717.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67f30] width 1920 pitch 7680 (/4 1920)
>[130717.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38460]
>[130717.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38460] width 1920 pitch 7680 (/4 1920)
>[130717.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e67f30]
>[130717.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e67f30] width 1920 pitch 7680 (/4 1920)
>[130719.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309fc90]
>[130719.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309fc90] width 1920 pitch 7680 (/4 1920)
>[130720.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d38460]
>[130720.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d38460] width 1920 pitch 7680 (/4 1920)
>[130720.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee2d0]
>[130720.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee2d0] width 1920 pitch 7680 (/4 1920)
>[130720.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3efa0]
>[130720.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3efa0] width 1920 pitch 7680 (/4 1920)
>[130733.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00ae0]
>[130733.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00ae0] width 1920 pitch 7680 (/4 1920)
>[130733.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbcdb0]
>[130733.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbcdb0] width 1920 pitch 7680 (/4 1920)
>[130733.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b10230]
>[130733.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b10230] width 1920 pitch 7680 (/4 1920)
>[130735.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8520]
>[130735.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8520] width 1920 pitch 7680 (/4 1920)
>[130750.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e4c00]
>[130750.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e4c00] width 1920 pitch 7680 (/4 1920)
>[130753.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e4c00]
>[130753.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e4c00] width 1920 pitch 7680 (/4 1920)
>[130800.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130800.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130800.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4f20]
>[130800.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4f20] width 1920 pitch 7680 (/4 1920)
>[130800.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130800.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130800.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4f20]
>[130800.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4f20] width 1920 pitch 7680 (/4 1920)
>[130800.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130800.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130800.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4f20]
>[130800.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4f20] width 1920 pitch 7680 (/4 1920)
>[130800.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130800.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130800.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2484e90]
>[130801.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2484e90] width 1920 pitch 7680 (/4 1920)
>[130801.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130801.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130801.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2484e90]
>[130801.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2484e90] width 1920 pitch 7680 (/4 1920)
>[130801.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130801.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130801.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2484e90]
>[130801.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2484e90] width 1920 pitch 7680 (/4 1920)
>[130801.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130801.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130801.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2484e90]
>[130801.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2484e90] width 1920 pitch 7680 (/4 1920)
>[130801.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130801.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130801.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52510]
>[130801.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52510] width 1920 pitch 7680 (/4 1920)
>[130802.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00ae0]
>[130802.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00ae0] width 1920 pitch 7680 (/4 1920)
>[130802.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130802.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25265c0]
>[130802.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25265c0] width 1920 pitch 7680 (/4 1920)
>[130802.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130802.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b72d40]
>[130802.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b72d40] width 1920 pitch 7680 (/4 1920)
>[130802.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25265c0]
>[130802.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25265c0] width 1920 pitch 7680 (/4 1920)
>[130802.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00ae0]
>[130802.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00ae0] width 1920 pitch 7680 (/4 1920)
>[130802.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c52510]
>[130802.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c52510] width 1920 pitch 7680 (/4 1920)
>[130802.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130802.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d183f0]
>[130802.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d183f0] width 1920 pitch 7680 (/4 1920)
>[130802.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130802.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d183f0]
>[130802.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d183f0] width 1920 pitch 7680 (/4 1920)
>[130802.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130802.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d183f0]
>[130802.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d183f0] width 1920 pitch 7680 (/4 1920)
>[130802.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130802.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d183f0]
>[130802.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d183f0] width 1920 pitch 7680 (/4 1920)
>[130802.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05d70]
>[130802.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05d70] width 1920 pitch 7680 (/4 1920)
>[130814.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0c50]
>[130814.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0c50] width 1920 pitch 7680 (/4 1920)
>[130814.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cc760]
>[130814.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cc760] width 1920 pitch 7680 (/4 1920)
>[130814.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cc760]
>[130814.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cc760] width 1920 pitch 7680 (/4 1920)
>[130814.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cdac0]
>[130814.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cdac0] width 1920 pitch 7680 (/4 1920)
>[130840.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2538430]
>[130840.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2538430] width 1920 pitch 7680 (/4 1920)
>[130855.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57cf0]
>[130855.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57cf0] width 1920 pitch 7680 (/4 1920)
>[130864.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00f60]
>[130864.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00f60] width 1920 pitch 7680 (/4 1920)
>[130865.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00f60]
>[130865.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00f60] width 1920 pitch 7680 (/4 1920)
>[130865.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11ef0]
>[130865.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11ef0] width 1920 pitch 7680 (/4 1920)
>[130865.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00f60]
>[130865.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00f60] width 1920 pitch 7680 (/4 1920)
>[130866.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffbdf0]
>[130866.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffbdf0] width 1920 pitch 7680 (/4 1920)
>[130868.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0b00]
>[130868.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0b00] width 1920 pitch 7680 (/4 1920)
>[130868.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0b00]
>[130868.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0b00] width 1920 pitch 7680 (/4 1920)
>[130868.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[130868.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[130868.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a66360]
>[130868.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a66360] width 1920 pitch 7680 (/4 1920)
>[130876.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffbdf0]
>[130876.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffbdf0] width 1920 pitch 7680 (/4 1920)
>[130877.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57cf0]
>[130877.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57cf0] width 1920 pitch 7680 (/4 1920)
>[130877.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d07330]
>[130877.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d07330] width 1920 pitch 7680 (/4 1920)
>[130877.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e00f60]
>[130877.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e00f60] width 1920 pitch 7680 (/4 1920)
>[130945.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83360]
>[130945.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83360] width 1920 pitch 7680 (/4 1920)
>[130960.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25265c0]
>[130960.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25265c0] width 1920 pitch 7680 (/4 1920)
>[131000.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30a80]
>[131000.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30a80] width 1920 pitch 7680 (/4 1920)
>[131000.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c83d00]
>[131000.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c83d00] width 1920 pitch 7680 (/4 1920)
>[131000.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[131000.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[131000.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82ff0]
>[131000.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82ff0] width 1920 pitch 7680 (/4 1920)
>[131000.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[131000.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[131000.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82ff0]
>[131000.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82ff0] width 1920 pitch 7680 (/4 1920)
>[131000.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[131000.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[131000.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82ff0]
>[131000.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82ff0] width 1920 pitch 7680 (/4 1920)
>[131000.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[131000.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[131000.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a82ff0]
>[131000.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a82ff0] width 1920 pitch 7680 (/4 1920)
>[131000.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b89c00]
>[131000.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b89c00] width 1920 pitch 7680 (/4 1920)
>[131000.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[131000.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[131000.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd820]
>[131000.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd820] width 1920 pitch 7680 (/4 1920)
>[131000.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[131000.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[131000.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbd820]
>[131000.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbd820] width 1920 pitch 7680 (/4 1920)
>[131000.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9da20]
>[131000.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9da20] width 1920 pitch 7680 (/4 1920)
>[131035.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbcc00]
>[131035.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbcc00] width 1920 pitch 7680 (/4 1920)
>[131050.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbcb40]
>[131050.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbcb40] width 1920 pitch 7680 (/4 1920)
>[131079.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03200]
>[131079.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03200] width 1920 pitch 7680 (/4 1920)
>[131079.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2504cf0]
>[131079.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2504cf0] width 1920 pitch 7680 (/4 1920)
>[131079.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942eb0]
>[131079.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942eb0] width 1920 pitch 7680 (/4 1920)
>[131079.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528b40]
>[131079.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528b40] width 1920 pitch 7680 (/4 1920)
>[131082.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131082.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131082.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef2d0]
>[131082.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef2d0] width 1920 pitch 7680 (/4 1920)
>[131082.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbcfd0]
>[131082.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbcfd0] width 1920 pitch 7680 (/4 1920)
>[131082.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbcfd0]
>[131082.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbcfd0] width 1920 pitch 7680 (/4 1920)
>[131088.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13de0]
>[131088.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13de0] width 1920 pitch 7680 (/4 1920)
>[131089.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f47c30]
>[131089.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f47c30] width 1920 pitch 7680 (/4 1920)
>[131089.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f47e30]
>[131089.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f47e30] width 1920 pitch 7680 (/4 1920)
>[131094.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf9b0]
>[131094.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf9b0] width 1920 pitch 7680 (/4 1920)
>[131094.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0430]
>[131094.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0430] width 1920 pitch 7680 (/4 1920)
>[131094.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf9b0]
>[131094.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf9b0] width 1920 pitch 7680 (/4 1920)
>[131094.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0430]
>[131094.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0430] width 1920 pitch 7680 (/4 1920)
>[131094.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf9b0]
>[131094.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf9b0] width 1920 pitch 7680 (/4 1920)
>[131094.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf0430]
>[131094.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf0430] width 1920 pitch 7680 (/4 1920)
>[131094.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbf9b0]
>[131094.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbf9b0] width 1920 pitch 7680 (/4 1920)
>[131094.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f49f80]
>[131094.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f49f80] width 1920 pitch 7680 (/4 1920)
>[131094.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce3fe0]
>[131094.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce3fe0] width 1920 pitch 7680 (/4 1920)
>[131094.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398a640]
>[131094.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398a640] width 1920 pitch 7680 (/4 1920)
>[131094.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131094.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131094.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131094.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131094.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131094.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131094.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131094.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131094.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131094.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131094.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131094.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131094.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131094.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131095.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4cc30]
>[131095.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4cc30] width 1920 pitch 7680 (/4 1920)
>[131095.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131095.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131095.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131095.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131095.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131095.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131095.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131095.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131095.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4cc30]
>[131095.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4cc30] width 1920 pitch 7680 (/4 1920)
>[131095.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131095.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131095.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131095.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131095.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4cc30]
>[131095.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4cc30] width 1920 pitch 7680 (/4 1920)
>[131095.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131095.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131095.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e731a0]
>[131095.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e731a0] width 1920 pitch 7680 (/4 1920)
>[131095.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131095.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131095.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131095.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131095.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131095.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131095.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05290]
>[131095.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05290] width 1920 pitch 7680 (/4 1920)
>[131095.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc31a0]
>[131095.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc31a0] width 1920 pitch 7680 (/4 1920)
>[131126.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9ab60]
>[131126.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9ab60] width 1920 pitch 7680 (/4 1920)
>[131126.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc500]
>[131126.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc500] width 1920 pitch 7680 (/4 1920)
>[131140.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b086f0]
>[131140.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b086f0] width 1920 pitch 7680 (/4 1920)
>[131150.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4026b40]
>[131150.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4026b40] width 1920 pitch 7680 (/4 1920)
>[131150.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4026b40]
>[131150.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4026b40] width 1920 pitch 7680 (/4 1920)
>[131150.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffbdf0]
>[131150.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffbdf0] width 1920 pitch 7680 (/4 1920)
>[131150.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11ef0]
>[131150.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11ef0] width 1920 pitch 7680 (/4 1920)
>[131151.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d750]
>[131151.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d750] width 1920 pitch 7680 (/4 1920)
>[131151.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[131151.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[131151.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5d3f0]
>[131151.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5d3f0] width 1920 pitch 7680 (/4 1920)
>[131151.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3cac0]
>[131151.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3cac0] width 1920 pitch 7680 (/4 1920)
>[131151.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9ab60]
>[131151.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9ab60] width 1920 pitch 7680 (/4 1920)
>[131153.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[131153.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[131153.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9ab60]
>[131153.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9ab60] width 1920 pitch 7680 (/4 1920)
>[131153.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9ab60]
>[131153.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9ab60] width 1920 pitch 7680 (/4 1920)
>[131154.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245b0a0]
>[131154.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245b0a0] width 1920 pitch 7680 (/4 1920)
>[131154.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83d30]
>[131154.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83d30] width 1920 pitch 7680 (/4 1920)
>[131154.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0b3b0]
>[131154.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0b3b0] width 1920 pitch 7680 (/4 1920)
>[131154.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ff00]
>[131154.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ff00] width 1920 pitch 7680 (/4 1920)
>[131154.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b74260]
>[131154.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b74260] width 1920 pitch 7680 (/4 1920)
>[131154.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ac550]
>[131154.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ac550] width 1920 pitch 7680 (/4 1920)
>[131154.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0b110]
>[131154.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0b110] width 1920 pitch 7680 (/4 1920)
>[131154.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0340]
>[131154.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0340] width 1920 pitch 7680 (/4 1920)
>[131154.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0b110]
>[131154.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0b110] width 1920 pitch 7680 (/4 1920)
>[131154.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0340]
>[131154.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0340] width 1920 pitch 7680 (/4 1920)
>[131154.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0b110]
>[131154.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0b110] width 1920 pitch 7680 (/4 1920)
>[131154.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcff80]
>[131154.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcff80] width 1920 pitch 7680 (/4 1920)
>[131155.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d860]
>[131155.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d860] width 1920 pitch 7680 (/4 1920)
>[131155.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ea70]
>[131155.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ea70] width 1920 pitch 7680 (/4 1920)
>[131156.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e1d0]
>[131156.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e1d0] width 1920 pitch 7680 (/4 1920)
>[131156.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45c80]
>[131156.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45c80] width 1920 pitch 7680 (/4 1920)
>[131156.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b63db0]
>[131156.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b63db0] width 1920 pitch 7680 (/4 1920)
>[131157.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d910]
>[131157.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d910] width 1920 pitch 7680 (/4 1920)
>[131157.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfeed0]
>[131157.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfeed0] width 1920 pitch 7680 (/4 1920)
>[131157.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b64300]
>[131157.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b64300] width 1920 pitch 7680 (/4 1920)
>[131157.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6f440]
>[131157.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6f440] width 1920 pitch 7680 (/4 1920)
>[131157.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b582c0]
>[131157.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b582c0] width 1920 pitch 7680 (/4 1920)
>[131158.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebe600]
>[131158.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebe600] width 1920 pitch 7680 (/4 1920)
>[131158.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39464d0]
>[131158.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39464d0] width 1920 pitch 7680 (/4 1920)
>[131158.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c373e0]
>[131158.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c373e0] width 1920 pitch 7680 (/4 1920)
>[131158.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f52fe0]
>[131158.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f52fe0] width 1920 pitch 7680 (/4 1920)
>[131160.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39326e0]
>[131160.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39326e0] width 1920 pitch 7680 (/4 1920)
>[131160.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe1a0]
>[131160.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe1a0] width 1920 pitch 7680 (/4 1920)
>[131160.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4006100]
>[131160.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4006100] width 1920 pitch 7680 (/4 1920)
>[131160.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48d40]
>[131160.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48d40] width 1920 pitch 7680 (/4 1920)
>[131160.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb33e0]
>[131160.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb33e0] width 1920 pitch 7680 (/4 1920)
>[131163.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0ff10]
>[131163.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0ff10] width 1920 pitch 7680 (/4 1920)
>[131164.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86e70]
>[131164.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86e70] width 1920 pitch 7680 (/4 1920)
>[131230.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb350]
>[131230.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb350] width 1920 pitch 7680 (/4 1920)
>[131245.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246a840]
>[131245.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246a840] width 1920 pitch 7680 (/4 1920)
>[131275.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a33bb0]
>[131275.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a33bb0] width 1920 pitch 7680 (/4 1920)
>[131290.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af80c0]
>[131290.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af80c0] width 1920 pitch 7680 (/4 1920)
>[131305.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ee50]
>[131305.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ee50] width 1920 pitch 7680 (/4 1920)
>[131320.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b356d0]
>[131320.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b356d0] width 1920 pitch 7680 (/4 1920)
>[131335.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c9f0]
>[131335.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c9f0] width 1920 pitch 7680 (/4 1920)
>[131350.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea1e40]
>[131350.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea1e40] width 1920 pitch 7680 (/4 1920)
>[131443.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c9f0]
>[131443.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c9f0] width 1920 pitch 7680 (/4 1920)
>[131443.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131443.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131443.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131443.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131443.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131443.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131443.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131443.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131443.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131443.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131443.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131443.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131443.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131443.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131443.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131443.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131444.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131444.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131470.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131470.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131485.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131485.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131515.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131515.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131530.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131530.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131620.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131620.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131635.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131635.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131665.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131665.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131680.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131680.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131815.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131815.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131830.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131830.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131875.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131875.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131890.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131890.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[131965.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[131965.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[131980.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[131980.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[132100.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20bb0]
>[132100.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20bb0] width 1920 pitch 7680 (/4 1920)
>[132130.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2519700]
>[132130.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2519700] width 1920 pitch 7680 (/4 1920)
>[132169.803] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[132169.803] (II) RADEON(0): Using hsync ranges from config file
>[132169.803] (II) RADEON(0): Using vrefresh ranges from config file
>[132169.803] (II) RADEON(0): Printing DDC gathered Modelines:
>[132169.803] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[132169.803] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[132169.803] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[132169.803] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[132169.803] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[132169.803] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[132169.803] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[132169.803] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[132169.803] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[132169.803] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[132169.803] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[132169.803] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[132259.673] (II) RADEON(0): RADEONSaveScreen(2)
>[132259.673] (II) RADEON(0): RADEONSaveScreen(0)
>[154404.226] (II) RADEON(0): RADEONSaveScreen(1)
>[155048.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14830]
>[155048.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14830] width 1920 pitch 7680 (/4 1920)
>[155049.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c423a0]
>[155049.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c423a0] width 1920 pitch 7680 (/4 1920)
>[155124.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14830]
>[155124.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14830] width 1920 pitch 7680 (/4 1920)
>[155139.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c423a0]
>[155139.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c423a0] width 1920 pitch 7680 (/4 1920)
>[155169.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14830]
>[155169.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14830] width 1920 pitch 7680 (/4 1920)
>[155184.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c423a0]
>[155184.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c423a0] width 1920 pitch 7680 (/4 1920)
>[155259.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14830]
>[155259.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14830] width 1920 pitch 7680 (/4 1920)
>[155274.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c423a0]
>[155274.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c423a0] width 1920 pitch 7680 (/4 1920)
>[155289.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14830]
>[155289.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14830] width 1920 pitch 7680 (/4 1920)
>[155304.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c423a0]
>[155304.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c423a0] width 1920 pitch 7680 (/4 1920)
>[155379.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f14830]
>[155379.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f14830] width 1920 pitch 7680 (/4 1920)
>[155394.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c423a0]
>[155394.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c423a0] width 1920 pitch 7680 (/4 1920)
>[155650.458] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[155650.459] (II) RADEON(0): Using hsync ranges from config file
>[155650.459] (II) RADEON(0): Using vrefresh ranges from config file
>[155650.459] (II) RADEON(0): Printing DDC gathered Modelines:
>[155650.459] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[155650.459] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[155650.459] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[155650.459] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[155650.459] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[155650.459] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[155650.459] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[155650.459] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[155650.459] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[155650.459] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[155650.459] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[155650.459] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[155740.657] (II) RADEON(0): RADEONSaveScreen(2)
>[155740.657] (II) RADEON(0): RADEONSaveScreen(0)
>[159045.247] (II) RADEON(0): RADEONSaveScreen(1)
>[159735.677] (II) RADEON(0): RADEONSaveScreen(2)
>[159735.677] (II) RADEON(0): RADEONSaveScreen(0)
>[168869.564] (II) RADEON(0): RADEONSaveScreen(1)
>[168874.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247ffd0]
>[168874.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247ffd0] width 1920 pitch 7680 (/4 1920)
>[168880.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25758a0]
>[168880.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25758a0] width 1920 pitch 7680 (/4 1920)
>[168880.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168880.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168880.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168880.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168880.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168880.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168880.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168880.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168880.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168880.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168881.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168881.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168881.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168881.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168881.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d98140]
>[168881.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d98140] width 1920 pitch 7680 (/4 1920)
>[168881.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd06f0]
>[168881.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd06f0] width 1920 pitch 7680 (/4 1920)
>[168881.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9e730]
>[168881.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9e730] width 1920 pitch 7680 (/4 1920)
>[168881.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0550]
>[168881.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0550] width 1920 pitch 7680 (/4 1920)
>[168881.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe0d0]
>[168881.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe0d0] width 1920 pitch 7680 (/4 1920)
>[168881.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168881.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe0d0]
>[168881.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe0d0] width 1920 pitch 7680 (/4 1920)
>[168881.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168881.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe0d0]
>[168881.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe0d0] width 1920 pitch 7680 (/4 1920)
>[168881.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168881.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe0d0]
>[168881.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe0d0] width 1920 pitch 7680 (/4 1920)
>[168881.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168881.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe0d0]
>[168881.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe0d0] width 1920 pitch 7680 (/4 1920)
>[168881.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168881.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168882.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe0d0]
>[168882.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe0d0] width 1920 pitch 7680 (/4 1920)
>[168882.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2533c30]
>[168882.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2533c30] width 1920 pitch 7680 (/4 1920)
>[168882.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9e730]
>[168882.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9e730] width 1920 pitch 7680 (/4 1920)
>[168882.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c4490]
>[168882.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c4490] width 1920 pitch 7680 (/4 1920)
>[168882.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcaef0]
>[168882.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcaef0] width 1920 pitch 7680 (/4 1920)
>[168882.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc8f00]
>[168882.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc8f00] width 1920 pitch 7680 (/4 1920)
>[168882.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcaef0]
>[168882.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcaef0] width 1920 pitch 7680 (/4 1920)
>[168882.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc8f00]
>[168882.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc8f00] width 1920 pitch 7680 (/4 1920)
>[168882.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4340]
>[168882.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4340] width 1920 pitch 7680 (/4 1920)
>[168882.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2df60]
>[168882.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2df60] width 1920 pitch 7680 (/4 1920)
>[168882.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e4340]
>[168882.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e4340] width 1920 pitch 7680 (/4 1920)
>[168882.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2df60]
>[168882.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2df60] width 1920 pitch 7680 (/4 1920)
>[168882.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb2690]
>[168882.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb2690] width 1920 pitch 7680 (/4 1920)
>[168882.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2df60]
>[168882.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2df60] width 1920 pitch 7680 (/4 1920)
>[168883.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb2690]
>[168883.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb2690] width 1920 pitch 7680 (/4 1920)
>[168883.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2df60]
>[168883.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2df60] width 1920 pitch 7680 (/4 1920)
>[168883.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb2690]
>[168883.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb2690] width 1920 pitch 7680 (/4 1920)
>[168883.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2df60]
>[168883.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2df60] width 1920 pitch 7680 (/4 1920)
>[168883.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6ab60]
>[168883.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6ab60] width 1920 pitch 7680 (/4 1920)
>[168884.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2ae0]
>[168884.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2ae0] width 1920 pitch 7680 (/4 1920)
>[168884.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954a70]
>[168884.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954a70] width 1920 pitch 7680 (/4 1920)
>[168884.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38db110]
>[168884.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38db110] width 1920 pitch 7680 (/4 1920)
>[168884.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac9d20]
>[168884.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac9d20] width 1920 pitch 7680 (/4 1920)
>[168884.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77b70]
>[168884.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77b70] width 1920 pitch 7680 (/4 1920)
>[168884.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954a70]
>[168884.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954a70] width 1920 pitch 7680 (/4 1920)
>[168884.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77b70]
>[168884.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77b70] width 1920 pitch 7680 (/4 1920)
>[168884.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954a70]
>[168884.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954a70] width 1920 pitch 7680 (/4 1920)
>[168884.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77b70]
>[168884.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77b70] width 1920 pitch 7680 (/4 1920)
>[168884.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954a70]
>[168884.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954a70] width 1920 pitch 7680 (/4 1920)
>[168884.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c77b70]
>[168884.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c77b70] width 1920 pitch 7680 (/4 1920)
>[168884.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e017d0]
>[168884.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e017d0] width 1920 pitch 7680 (/4 1920)
>[168884.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fba0d0]
>[168884.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fba0d0] width 1920 pitch 7680 (/4 1920)
>[168899.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c20a70]
>[168899.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c20a70] width 1920 pitch 7680 (/4 1920)
>[168944.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dca60]
>[168944.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dca60] width 1920 pitch 7680 (/4 1920)
>[168959.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30abf00]
>[168959.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30abf00] width 1920 pitch 7680 (/4 1920)
>[169004.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8b610]
>[169004.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8b610] width 1920 pitch 7680 (/4 1920)
>[169019.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568b80]
>[169019.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568b80] width 1920 pitch 7680 (/4 1920)
>[169034.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b823a0]
>[169034.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b823a0] width 1920 pitch 7680 (/4 1920)
>[169052.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967ab0]
>[169052.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967ab0] width 1920 pitch 7680 (/4 1920)
>[169052.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b823a0]
>[169052.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b823a0] width 1920 pitch 7680 (/4 1920)
>[169079.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb7e0]
>[169079.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb7e0] width 1920 pitch 7680 (/4 1920)
>[169094.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10830]
>[169094.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10830] width 1920 pitch 7680 (/4 1920)
>[169109.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a2c0]
>[169109.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a2c0] width 1920 pitch 7680 (/4 1920)
>[169124.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2470]
>[169124.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2470] width 1920 pitch 7680 (/4 1920)
>[169139.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2540c90]
>[169139.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2540c90] width 1920 pitch 7680 (/4 1920)
>[169154.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7d230]
>[169154.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7d230] width 1920 pitch 7680 (/4 1920)
>[169169.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bdf0]
>[169169.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bdf0] width 1920 pitch 7680 (/4 1920)
>[169214.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea6700]
>[169214.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea6700] width 1920 pitch 7680 (/4 1920)
>[169244.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169244.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169256.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169256.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169256.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169256.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169256.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5fa00]
>[169257.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5fa00] width 1920 pitch 7680 (/4 1920)
>[169257.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e02e0]
>[169257.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e02e0] width 1920 pitch 7680 (/4 1920)
>[169257.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169257.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169257.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169257.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169257.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e02e0]
>[169257.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e02e0] width 1920 pitch 7680 (/4 1920)
>[169257.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169258.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169258.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e02e0]
>[169258.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e02e0] width 1920 pitch 7680 (/4 1920)
>[169258.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169258.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169258.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[169258.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[169258.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169258.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169258.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e02e0]
>[169258.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e02e0] width 1920 pitch 7680 (/4 1920)
>[169258.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d1b10]
>[169258.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d1b10] width 1920 pitch 7680 (/4 1920)
>[169258.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e02e0]
>[169258.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e02e0] width 1920 pitch 7680 (/4 1920)
>[169274.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3d210]
>[169274.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3d210] width 1920 pitch 7680 (/4 1920)
>[169304.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc45d0]
>[169304.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc45d0] width 1920 pitch 7680 (/4 1920)
>[169349.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fce5e0]
>[169349.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fce5e0] width 1920 pitch 7680 (/4 1920)
>[169364.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdffe0]
>[169364.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdffe0] width 1920 pitch 7680 (/4 1920)
>[169394.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc40a0]
>[169394.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc40a0] width 1920 pitch 7680 (/4 1920)
>[169409.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[169409.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[169483.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169483.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169483.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169483.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169483.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169483.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169483.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169483.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169483.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e83010]
>[169484.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e83010] width 1920 pitch 7680 (/4 1920)
>[169484.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169484.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16380]
>[169484.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16380] width 1920 pitch 7680 (/4 1920)
>[169484.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b560]
>[169484.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b560] width 1920 pitch 7680 (/4 1920)
>[169544.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d87c20]
>[169544.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d87c20] width 1920 pitch 7680 (/4 1920)
>[169559.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f8970]
>[169559.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f8970] width 1920 pitch 7680 (/4 1920)
>[169784.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d87c20]
>[169784.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d87c20] width 1920 pitch 7680 (/4 1920)
>[169799.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f8970]
>[169799.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f8970] width 1920 pitch 7680 (/4 1920)
>[169904.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa5e0]
>[169904.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa5e0] width 1920 pitch 7680 (/4 1920)
>[169934.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf52c0]
>[169934.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf52c0] width 1920 pitch 7680 (/4 1920)
>[169949.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920340]
>[169949.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920340] width 1920 pitch 7680 (/4 1920)
>[169994.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88230]
>[169994.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88230] width 1920 pitch 7680 (/4 1920)
>[170039.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e66e20]
>[170039.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e66e20] width 1920 pitch 7680 (/4 1920)
>[170054.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85ea0]
>[170054.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85ea0] width 1920 pitch 7680 (/4 1920)
>[170099.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c50]
>[170099.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c50] width 1920 pitch 7680 (/4 1920)
>[170114.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e66100]
>[170114.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e66100] width 1920 pitch 7680 (/4 1920)
>[170144.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67c50]
>[170144.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67c50] width 1920 pitch 7680 (/4 1920)
>[170174.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd9bd0]
>[170174.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd9bd0] width 1920 pitch 7680 (/4 1920)
>[170189.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11590]
>[170189.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11590] width 1920 pitch 7680 (/4 1920)
>[170204.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2577200]
>[170204.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2577200] width 1920 pitch 7680 (/4 1920)
>[170309.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04500]
>[170309.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04500] width 1920 pitch 7680 (/4 1920)
>[170324.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a351a0]
>[170324.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a351a0] width 1920 pitch 7680 (/4 1920)
>[170354.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57bb0]
>[170354.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57bb0] width 1920 pitch 7680 (/4 1920)
>[170369.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391d9b0]
>[170369.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391d9b0] width 1920 pitch 7680 (/4 1920)
>[170399.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3061c00]
>[170399.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3061c00] width 1920 pitch 7680 (/4 1920)
>[170414.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170414.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170415.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[170415.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[170415.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a09980]
>[170415.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a09980] width 1920 pitch 7680 (/4 1920)
>[170416.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3061c00]
>[170416.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3061c00] width 1920 pitch 7680 (/4 1920)
>[170416.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170416.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170416.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170416.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170416.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170416.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170416.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170416.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170416.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170416.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170417.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[170417.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[170417.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd9a0]
>[170417.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd9a0] width 1920 pitch 7680 (/4 1920)
>[170429.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ef10]
>[170429.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ef10] width 1920 pitch 7680 (/4 1920)
>[170444.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc4280]
>[170444.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc4280] width 1920 pitch 7680 (/4 1920)
>[170474.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c844d0]
>[170474.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c844d0] width 1920 pitch 7680 (/4 1920)
>[170489.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d118d0]
>[170489.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d118d0] width 1920 pitch 7680 (/4 1920)
>[170504.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c844d0]
>[170504.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c844d0] width 1920 pitch 7680 (/4 1920)
>[170519.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d118d0]
>[170519.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d118d0] width 1920 pitch 7680 (/4 1920)
>[170549.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c844d0]
>[170549.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c844d0] width 1920 pitch 7680 (/4 1920)
>[170564.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d118d0]
>[170564.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d118d0] width 1920 pitch 7680 (/4 1920)
>[170594.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964930]
>[170594.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964930] width 1920 pitch 7680 (/4 1920)
>[170609.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ac30]
>[170609.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ac30] width 1920 pitch 7680 (/4 1920)
>[170639.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964930]
>[170639.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964930] width 1920 pitch 7680 (/4 1920)
>[170654.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ac30]
>[170654.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ac30] width 1920 pitch 7680 (/4 1920)
>[170804.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964930]
>[170804.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964930] width 1920 pitch 7680 (/4 1920)
>[170819.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ac30]
>[170819.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ac30] width 1920 pitch 7680 (/4 1920)
>[170834.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964930]
>[170834.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964930] width 1920 pitch 7680 (/4 1920)
>[170864.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ac30]
>[170864.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ac30] width 1920 pitch 7680 (/4 1920)
>[171014.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964930]
>[171014.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964930] width 1920 pitch 7680 (/4 1920)
>[171017.440] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[171017.440] (II) RADEON(0): Using hsync ranges from config file
>[171017.440] (II) RADEON(0): Using vrefresh ranges from config file
>[171017.440] (II) RADEON(0): Printing DDC gathered Modelines:
>[171017.440] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[171017.440] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[171017.440] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[171017.440] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[171017.441] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[171017.441] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[171017.441] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[171017.441] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[171017.441] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[171017.441] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[171017.441] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[171017.441] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[171107.655] (II) RADEON(0): RADEONSaveScreen(2)
>[171107.655] (II) RADEON(0): RADEONSaveScreen(0)
>[172687.465] (II) RADEON(0): RADEONSaveScreen(1)
>[172699.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d14f0]
>[172699.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d14f0] width 1920 pitch 7680 (/4 1920)
>[172702.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[172702.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[172717.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fcbc0]
>[172717.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fcbc0] width 1920 pitch 7680 (/4 1920)
>[172807.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fcbc0]
>[172807.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fcbc0] width 1920 pitch 7680 (/4 1920)
>[172807.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec230]
>[172807.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec230] width 1920 pitch 7680 (/4 1920)
>[172807.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec230]
>[172807.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec230] width 1920 pitch 7680 (/4 1920)
>[172807.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172807.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172807.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172807.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172807.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172807.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172807.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172807.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172807.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172807.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172807.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172807.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172807.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172807.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172807.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172808.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172808.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172808.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172808.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172808.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172808.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172808.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172808.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172808.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172809.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172809.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172809.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172809.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172809.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172809.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172809.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172809.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172810.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172810.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172810.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172810.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172810.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172810.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172810.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172810.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172810.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172810.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172810.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172810.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172810.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172810.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172810.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172810.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172810.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a6d0]
>[172810.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a6d0] width 1920 pitch 7680 (/4 1920)
>[172810.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f48500]
>[172810.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f48500] width 1920 pitch 7680 (/4 1920)
>[172822.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[172822.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[172927.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[172927.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[172942.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bccc20]
>[172942.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bccc20] width 1920 pitch 7680 (/4 1920)
>[172957.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bccc20]
>[172957.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bccc20] width 1920 pitch 7680 (/4 1920)
>[172972.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bccc20]
>[172972.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bccc20] width 1920 pitch 7680 (/4 1920)
>[172987.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad550]
>[172987.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad550] width 1920 pitch 7680 (/4 1920)
>[173002.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bdf0]
>[173002.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bdf0] width 1920 pitch 7680 (/4 1920)
>[173017.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bdf0]
>[173017.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bdf0] width 1920 pitch 7680 (/4 1920)
>[173032.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f61a0]
>[173032.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f61a0] width 1920 pitch 7680 (/4 1920)
>[173347.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce89b0]
>[173347.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce89b0] width 1920 pitch 7680 (/4 1920)
>[173362.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fc10]
>[173362.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fc10] width 1920 pitch 7680 (/4 1920)
>[173392.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b85430]
>[173392.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b85430] width 1920 pitch 7680 (/4 1920)
>[173407.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a947e0]
>[173407.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a947e0] width 1920 pitch 7680 (/4 1920)
>[173467.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517290]
>[173467.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517290] width 1920 pitch 7680 (/4 1920)
>[173482.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c040]
>[173482.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c040] width 1920 pitch 7680 (/4 1920)
>[173527.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57210]
>[173527.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57210] width 1920 pitch 7680 (/4 1920)
>[173542.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5c90]
>[173542.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5c90] width 1920 pitch 7680 (/4 1920)
>[173557.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05570]
>[173557.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05570] width 1920 pitch 7680 (/4 1920)
>[173572.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eec9d0]
>[173572.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eec9d0] width 1920 pitch 7680 (/4 1920)
>[173671.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93be0]
>[173671.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93be0] width 1920 pitch 7680 (/4 1920)
>[173671.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8020]
>[173671.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8020] width 1920 pitch 7680 (/4 1920)
>[173671.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeecb0]
>[173671.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeecb0] width 1920 pitch 7680 (/4 1920)
>[173671.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8020]
>[173671.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8020] width 1920 pitch 7680 (/4 1920)
>[173707.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efae0]
>[173707.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efae0] width 1920 pitch 7680 (/4 1920)
>[173767.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d35bc0]
>[173767.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d35bc0] width 1920 pitch 7680 (/4 1920)
>[173779.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa170]
>[173779.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa170] width 1920 pitch 7680 (/4 1920)
>[173779.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9ceb0]
>[173779.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9ceb0] width 1920 pitch 7680 (/4 1920)
>[173779.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfa250]
>[173779.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfa250] width 1920 pitch 7680 (/4 1920)
>[173779.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efc320]
>[173779.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efc320] width 1920 pitch 7680 (/4 1920)
>[173797.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb9620]
>[173797.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb9620] width 1920 pitch 7680 (/4 1920)
>[173812.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebdd0]
>[173812.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebdd0] width 1920 pitch 7680 (/4 1920)
>[173962.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56cb0]
>[173962.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56cb0] width 1920 pitch 7680 (/4 1920)
>[173977.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7450]
>[173977.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7450] width 1920 pitch 7680 (/4 1920)
>[174097.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56cb0]
>[174097.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56cb0] width 1920 pitch 7680 (/4 1920)
>[174112.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7450]
>[174112.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7450] width 1920 pitch 7680 (/4 1920)
>[174127.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56cb0]
>[174127.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56cb0] width 1920 pitch 7680 (/4 1920)
>[174142.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7450]
>[174142.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7450] width 1920 pitch 7680 (/4 1920)
>[174217.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56cb0]
>[174217.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56cb0] width 1920 pitch 7680 (/4 1920)
>[174232.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7450]
>[174232.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7450] width 1920 pitch 7680 (/4 1920)
>[174337.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56cb0]
>[174337.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56cb0] width 1920 pitch 7680 (/4 1920)
>[174352.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7450]
>[174352.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7450] width 1920 pitch 7680 (/4 1920)
>[174367.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56cb0]
>[174367.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56cb0] width 1920 pitch 7680 (/4 1920)
>[174397.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7450]
>[174397.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7450] width 1920 pitch 7680 (/4 1920)
>[174408.041] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[174408.041] (II) RADEON(0): Using hsync ranges from config file
>[174408.041] (II) RADEON(0): Using vrefresh ranges from config file
>[174408.041] (II) RADEON(0): Printing DDC gathered Modelines:
>[174408.041] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[174408.041] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[174408.041] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[174408.041] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[174408.041] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[174408.041] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[174408.041] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[174408.041] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[174408.041] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[174408.041] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[174408.041] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[174408.041] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[174498.673] (II) RADEON(0): RADEONSaveScreen(2)
>[174498.673] (II) RADEON(0): RADEONSaveScreen(0)
>[183338.929] (II) RADEON(0): RADEONSaveScreen(1)
>[184029.664] (II) RADEON(0): RADEONSaveScreen(2)
>[184029.664] (II) RADEON(0): RADEONSaveScreen(0)
>[185072.672] (II) RADEON(0): RADEONSaveScreen(1)
>[185072.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5afa0]
>[185072.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5afa0] width 1920 pitch 7680 (/4 1920)
>[185088.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94bf0]
>[185088.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94bf0] width 1920 pitch 7680 (/4 1920)
>[185118.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e727c0]
>[185118.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e727c0] width 1920 pitch 7680 (/4 1920)
>[185148.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01050]
>[185148.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01050] width 1920 pitch 7680 (/4 1920)
>[185178.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9c490]
>[185178.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9c490] width 1920 pitch 7680 (/4 1920)
>[185303.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8150]
>[185303.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8150] width 1920 pitch 7680 (/4 1920)
>[185303.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a50a0]
>[185303.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a50a0] width 1920 pitch 7680 (/4 1920)
>[185303.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8150]
>[185303.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8150] width 1920 pitch 7680 (/4 1920)
>[185303.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5bae0]
>[185303.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5bae0] width 1920 pitch 7680 (/4 1920)
>[185523.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3d00]
>[185523.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3d00] width 1920 pitch 7680 (/4 1920)
>[185553.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5460]
>[185553.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5460] width 1920 pitch 7680 (/4 1920)
>[185613.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1750]
>[185613.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1750] width 1920 pitch 7680 (/4 1920)
>[185628.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a7d0]
>[185628.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a7d0] width 1920 pitch 7680 (/4 1920)
>[185703.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[185703.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[185733.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31197f0]
>[185733.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31197f0] width 1920 pitch 7680 (/4 1920)
>[185808.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1c2c0]
>[185808.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1c2c0] width 1920 pitch 7680 (/4 1920)
>[185838.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[185838.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[185853.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1c2c0]
>[185853.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1c2c0] width 1920 pitch 7680 (/4 1920)
>[185868.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[185868.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[185898.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3d4c0]
>[185898.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3d4c0] width 1920 pitch 7680 (/4 1920)
>[185913.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60b20]
>[185913.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60b20] width 1920 pitch 7680 (/4 1920)
>[185958.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60b20]
>[185958.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60b20] width 1920 pitch 7680 (/4 1920)
>[185973.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3d4c0]
>[185973.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3d4c0] width 1920 pitch 7680 (/4 1920)
>[186048.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3edf0]
>[186048.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3edf0] width 1920 pitch 7680 (/4 1920)
>[186063.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd5e90]
>[186063.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd5e90] width 1920 pitch 7680 (/4 1920)
>[186078.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc1570]
>[186078.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc1570] width 1920 pitch 7680 (/4 1920)
>[186093.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0e10]
>[186093.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0e10] width 1920 pitch 7680 (/4 1920)
>[186123.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15de0]
>[186123.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15de0] width 1920 pitch 7680 (/4 1920)
>[186138.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e945a0]
>[186138.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e945a0] width 1920 pitch 7680 (/4 1920)
>[186243.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904520]
>[186243.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904520] width 1920 pitch 7680 (/4 1920)
>[186258.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163d00]
>[186258.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163d00] width 1920 pitch 7680 (/4 1920)
>[186288.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e9b0]
>[186288.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e9b0] width 1920 pitch 7680 (/4 1920)
>[186303.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02300]
>[186303.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02300] width 1920 pitch 7680 (/4 1920)
>[186333.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02300]
>[186333.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02300] width 1920 pitch 7680 (/4 1920)
>[186363.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40203a0]
>[186363.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40203a0] width 1920 pitch 7680 (/4 1920)
>[186378.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df4d70]
>[186378.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df4d70] width 1920 pitch 7680 (/4 1920)
>[186393.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[186393.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[186423.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c64d40]
>[186423.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c64d40] width 1920 pitch 7680 (/4 1920)
>[186438.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f45fe0]
>[186438.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f45fe0] width 1920 pitch 7680 (/4 1920)
>[186528.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b16620]
>[186528.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b16620] width 1920 pitch 7680 (/4 1920)
>[186543.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab650]
>[186543.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab650] width 1920 pitch 7680 (/4 1920)
>[186708.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab5d0]
>[186708.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab5d0] width 1920 pitch 7680 (/4 1920)
>[186723.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cbae0]
>[186723.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cbae0] width 1920 pitch 7680 (/4 1920)
>[186755.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cbae0]
>[186755.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cbae0] width 1920 pitch 7680 (/4 1920)
>[186755.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d27a60]
>[186755.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d27a60] width 1920 pitch 7680 (/4 1920)
>[186755.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cbae0]
>[186755.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cbae0] width 1920 pitch 7680 (/4 1920)
>[186756.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186756.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186756.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186756.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186756.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186756.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186756.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186756.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186756.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186756.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186756.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186756.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186756.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186756.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186756.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186756.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186756.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186756.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186756.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186756.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186756.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186756.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186757.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186757.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186757.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186757.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186757.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186757.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186758.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186758.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186758.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186758.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186758.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186758.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186758.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186758.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186758.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186758.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186758.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186758.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186758.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186758.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186758.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186758.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186758.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8d50]
>[186758.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8d50] width 1920 pitch 7680 (/4 1920)
>[186758.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f5a0]
>[186758.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f5a0] width 1920 pitch 7680 (/4 1920)
>[186768.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e25cc0]
>[186768.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e25cc0] width 1920 pitch 7680 (/4 1920)
>[186798.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e25cc0]
>[186798.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e25cc0] width 1920 pitch 7680 (/4 1920)
>[186828.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ccf0]
>[186828.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ccf0] width 1920 pitch 7680 (/4 1920)
>[186843.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8abd0]
>[186843.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8abd0] width 1920 pitch 7680 (/4 1920)
>[186888.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab8850]
>[186888.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab8850] width 1920 pitch 7680 (/4 1920)
>[186903.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c7260]
>[186903.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c7260] width 1920 pitch 7680 (/4 1920)
>[186963.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92700]
>[186963.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92700] width 1920 pitch 7680 (/4 1920)
>[186978.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[186978.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[186993.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5f40]
>[186993.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5f40] width 1920 pitch 7680 (/4 1920)
>[187008.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca05d0]
>[187008.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca05d0] width 1920 pitch 7680 (/4 1920)
>[187023.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a920]
>[187023.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a920] width 1920 pitch 7680 (/4 1920)
>[187053.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7eb50]
>[187053.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7eb50] width 1920 pitch 7680 (/4 1920)
>[187278.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9600]
>[187278.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9600] width 1920 pitch 7680 (/4 1920)
>[187293.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53280]
>[187293.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53280] width 1920 pitch 7680 (/4 1920)
>[187338.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b853f0]
>[187338.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b853f0] width 1920 pitch 7680 (/4 1920)
>[187353.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[187353.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[187413.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3af50]
>[187413.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3af50] width 1920 pitch 7680 (/4 1920)
>[187443.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31153f0]
>[187443.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31153f0] width 1920 pitch 7680 (/4 1920)
>[187473.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f09e00]
>[187473.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f09e00] width 1920 pitch 7680 (/4 1920)
>[187488.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[187488.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[187518.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931760]
>[187518.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931760] width 1920 pitch 7680 (/4 1920)
>[187563.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e98f60]
>[187563.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e98f60] width 1920 pitch 7680 (/4 1920)
>[187698.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f114b0]
>[187698.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f114b0] width 1920 pitch 7680 (/4 1920)
>[187713.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93e30]
>[187713.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93e30] width 1920 pitch 7680 (/4 1920)
>[187848.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd5990]
>[187848.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd5990] width 1920 pitch 7680 (/4 1920)
>[187863.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d740]
>[187863.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d740] width 1920 pitch 7680 (/4 1920)
>[187893.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40203a0]
>[187893.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40203a0] width 1920 pitch 7680 (/4 1920)
>[187908.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c3970]
>[187908.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c3970] width 1920 pitch 7680 (/4 1920)
>[188238.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c500f0]
>[188238.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c500f0] width 1920 pitch 7680 (/4 1920)
>[188253.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fbb50]
>[188253.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fbb50] width 1920 pitch 7680 (/4 1920)
>[188328.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2060]
>[188328.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2060] width 1920 pitch 7680 (/4 1920)
>[188343.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2060]
>[188343.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2060] width 1920 pitch 7680 (/4 1920)
>[188388.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddca00]
>[188388.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddca00] width 1920 pitch 7680 (/4 1920)
>[188403.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2060]
>[188403.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2060] width 1920 pitch 7680 (/4 1920)
>[188418.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2060]
>[188418.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2060] width 1920 pitch 7680 (/4 1920)
>[188433.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2060]
>[188433.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2060] width 1920 pitch 7680 (/4 1920)
>[188598.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddca00]
>[188598.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddca00] width 1920 pitch 7680 (/4 1920)
>[188620.535] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[188620.535] (II) RADEON(0): Using hsync ranges from config file
>[188620.535] (II) RADEON(0): Using vrefresh ranges from config file
>[188620.535] (II) RADEON(0): Printing DDC gathered Modelines:
>[188620.535] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[188620.535] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[188620.535] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[188620.535] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[188620.535] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[188620.535] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[188620.535] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[188620.535] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[188620.535] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[188620.535] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[188620.535] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[188620.535] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[188628.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab5f0]
>[188628.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab5f0] width 1920 pitch 7680 (/4 1920)
>[188710.665] (II) RADEON(0): RADEONSaveScreen(2)
>[188710.665] (II) RADEON(0): RADEONSaveScreen(0)
>[188861.537] (II) RADEON(0): RADEONSaveScreen(1)
>[188861.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5a40]
>[188861.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5a40] width 1920 pitch 7680 (/4 1920)
>[188863.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed400]
>[188863.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed400] width 1920 pitch 7680 (/4 1920)
>[188863.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36ef0]
>[188863.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36ef0] width 1920 pitch 7680 (/4 1920)
>[188863.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab5f0]
>[188863.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab5f0] width 1920 pitch 7680 (/4 1920)
>[188863.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316e120]
>[188863.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316e120] width 1920 pitch 7680 (/4 1920)
>[188863.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c500f0]
>[188863.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c500f0] width 1920 pitch 7680 (/4 1920)
>[188863.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11610]
>[188863.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11610] width 1920 pitch 7680 (/4 1920)
>[188863.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9010]
>[188863.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9010] width 1920 pitch 7680 (/4 1920)
>[188863.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465560]
>[188863.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465560] width 1920 pitch 7680 (/4 1920)
>[188863.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f238d0]
>[188863.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f238d0] width 1920 pitch 7680 (/4 1920)
>[188863.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3d590]
>[188863.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3d590] width 1920 pitch 7680 (/4 1920)
>[188863.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffc90]
>[188863.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffc90] width 1920 pitch 7680 (/4 1920)
>[188863.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96730]
>[188863.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96730] width 1920 pitch 7680 (/4 1920)
>[188863.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5a40]
>[188863.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5a40] width 1920 pitch 7680 (/4 1920)
>[188863.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53210]
>[188863.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53210] width 1920 pitch 7680 (/4 1920)
>[188863.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5400]
>[188863.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5400] width 1920 pitch 7680 (/4 1920)
>[188863.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb75a0]
>[188863.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb75a0] width 1920 pitch 7680 (/4 1920)
>[188863.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c490]
>[188863.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c490] width 1920 pitch 7680 (/4 1920)
>[188863.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb75a0]
>[188863.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb75a0] width 1920 pitch 7680 (/4 1920)
>[188864.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5400]
>[188864.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5400] width 1920 pitch 7680 (/4 1920)
>[188864.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53210]
>[188864.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53210] width 1920 pitch 7680 (/4 1920)
>[188864.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5a40]
>[188864.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5a40] width 1920 pitch 7680 (/4 1920)
>[188864.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96730]
>[188864.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96730] width 1920 pitch 7680 (/4 1920)
>[188864.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffc90]
>[188864.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffc90] width 1920 pitch 7680 (/4 1920)
>[188864.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3d590]
>[188864.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3d590] width 1920 pitch 7680 (/4 1920)
>[188864.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f238d0]
>[188864.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f238d0] width 1920 pitch 7680 (/4 1920)
>[188864.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465560]
>[188864.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465560] width 1920 pitch 7680 (/4 1920)
>[188864.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9010]
>[188864.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9010] width 1920 pitch 7680 (/4 1920)
>[188864.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11610]
>[188864.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11610] width 1920 pitch 7680 (/4 1920)
>[188864.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c500f0]
>[188864.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c500f0] width 1920 pitch 7680 (/4 1920)
>[188864.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316e120]
>[188864.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316e120] width 1920 pitch 7680 (/4 1920)
>[188864.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab5f0]
>[188864.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab5f0] width 1920 pitch 7680 (/4 1920)
>[188864.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316e120]
>[188864.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316e120] width 1920 pitch 7680 (/4 1920)
>[188865.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96730]
>[188865.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96730] width 1920 pitch 7680 (/4 1920)
>[188865.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffc90]
>[188866.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffc90] width 1920 pitch 7680 (/4 1920)
>[188866.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3d590]
>[188866.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3d590] width 1920 pitch 7680 (/4 1920)
>[188866.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d249f0]
>[188866.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d249f0] width 1920 pitch 7680 (/4 1920)
>[188866.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53210]
>[188866.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53210] width 1920 pitch 7680 (/4 1920)
>[188866.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af5400]
>[188866.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af5400] width 1920 pitch 7680 (/4 1920)
>[188866.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9010]
>[188866.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9010] width 1920 pitch 7680 (/4 1920)
>[188866.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11610]
>[188866.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11610] width 1920 pitch 7680 (/4 1920)
>[188866.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465560]
>[188866.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465560] width 1920 pitch 7680 (/4 1920)
>[188866.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f238d0]
>[188866.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f238d0] width 1920 pitch 7680 (/4 1920)
>[188866.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c500f0]
>[188866.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c500f0] width 1920 pitch 7680 (/4 1920)
>[188866.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316e120]
>[188866.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316e120] width 1920 pitch 7680 (/4 1920)
>[188866.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36ef0]
>[188866.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36ef0] width 1920 pitch 7680 (/4 1920)
>[188866.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed400]
>[188866.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed400] width 1920 pitch 7680 (/4 1920)
>[188866.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab5f0]
>[188866.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab5f0] width 1920 pitch 7680 (/4 1920)
>[188866.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c7d0]
>[188866.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c7d0] width 1920 pitch 7680 (/4 1920)
>[188866.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c500f0]
>[188866.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c500f0] width 1920 pitch 7680 (/4 1920)
>[188866.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f238d0]
>[188866.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f238d0] width 1920 pitch 7680 (/4 1920)
>[188866.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465560]
>[188866.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465560] width 1920 pitch 7680 (/4 1920)
>[188866.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11610]
>[188866.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11610] width 1920 pitch 7680 (/4 1920)
>[188866.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9010]
>[188866.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9010] width 1920 pitch 7680 (/4 1920)
>[188866.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53210]
>[188866.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53210] width 1920 pitch 7680 (/4 1920)
>[188866.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d249f0]
>[188866.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d249f0] width 1920 pitch 7680 (/4 1920)
>[188866.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3d590]
>[188866.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3d590] width 1920 pitch 7680 (/4 1920)
>[188866.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed400]
>[188866.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed400] width 1920 pitch 7680 (/4 1920)
>[188866.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36ef0]
>[188866.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36ef0] width 1920 pitch 7680 (/4 1920)
>[188866.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316e120]
>[188866.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316e120] width 1920 pitch 7680 (/4 1920)
>[188876.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250c490]
>[188876.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250c490] width 1920 pitch 7680 (/4 1920)
>[188906.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a447b0]
>[188906.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a447b0] width 1920 pitch 7680 (/4 1920)
>[188966.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fedde0]
>[188966.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fedde0] width 1920 pitch 7680 (/4 1920)
>[188981.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8cbf0]
>[188981.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8cbf0] width 1920 pitch 7680 (/4 1920)
>[189296.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[189296.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[189311.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0160]
>[189311.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0160] width 1920 pitch 7680 (/4 1920)
>[189418.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3f410]
>[189418.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3f410] width 1920 pitch 7680 (/4 1920)
>[189425.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[189425.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[189566.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[189566.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[189581.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2b1f0]
>[189581.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2b1f0] width 1920 pitch 7680 (/4 1920)
>[189596.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[189596.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[189611.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26aa0]
>[189611.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26aa0] width 1920 pitch 7680 (/4 1920)
>[189626.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f220a0]
>[189626.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f220a0] width 1920 pitch 7680 (/4 1920)
>[189641.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[189641.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[189806.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0230]
>[189806.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0230] width 1920 pitch 7680 (/4 1920)
>[189836.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[189836.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190012.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190012.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190012.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[190012.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[190012.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e07a70]
>[190012.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e07a70] width 1920 pitch 7680 (/4 1920)
>[190012.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[190012.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[190012.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[190012.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[190012.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[190012.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[190012.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190012.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190012.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0160]
>[190012.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0160] width 1920 pitch 7680 (/4 1920)
>[190012.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[190012.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[190013.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40024b0]
>[190013.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40024b0] width 1920 pitch 7680 (/4 1920)
>[190013.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f220a0]
>[190013.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f220a0] width 1920 pitch 7680 (/4 1920)
>[190013.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3b680]
>[190013.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3b680] width 1920 pitch 7680 (/4 1920)
>[190013.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82b50]
>[190013.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82b50] width 1920 pitch 7680 (/4 1920)
>[190013.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e07a70]
>[190013.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e07a70] width 1920 pitch 7680 (/4 1920)
>[190014.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[190014.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[190015.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[190015.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[190015.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190015.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190016.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[190016.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[190016.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190016.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190016.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190016.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190016.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce5a40]
>[190016.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce5a40] width 1920 pitch 7680 (/4 1920)
>[190016.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190016.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190016.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce5a40]
>[190016.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce5a40] width 1920 pitch 7680 (/4 1920)
>[190016.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190016.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190016.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce5a40]
>[190016.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce5a40] width 1920 pitch 7680 (/4 1920)
>[190016.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190016.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190016.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce5a40]
>[190016.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce5a40] width 1920 pitch 7680 (/4 1920)
>[190016.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190017.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190031.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99b20]
>[190031.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99b20] width 1920 pitch 7680 (/4 1920)
>[190041.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3b680]
>[190041.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3b680] width 1920 pitch 7680 (/4 1920)
>[190041.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190041.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190041.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82b50]
>[190041.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82b50] width 1920 pitch 7680 (/4 1920)
>[190041.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190041.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190087.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afc300]
>[190087.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afc300] width 1920 pitch 7680 (/4 1920)
>[190087.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f23ea0]
>[190087.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f23ea0] width 1920 pitch 7680 (/4 1920)
>[190087.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[190087.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[190087.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99b20]
>[190087.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99b20] width 1920 pitch 7680 (/4 1920)
>[190087.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[190087.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[190087.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d043e0]
>[190087.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d043e0] width 1920 pitch 7680 (/4 1920)
>[190087.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3b680]
>[190087.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3b680] width 1920 pitch 7680 (/4 1920)
>[190087.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[190087.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[190087.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2b1f0]
>[190087.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2b1f0] width 1920 pitch 7680 (/4 1920)
>[190087.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[190087.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[190087.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190087.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190087.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190087.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190087.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190087.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190087.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190087.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190087.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[190087.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[190087.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4fd50]
>[190087.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4fd50] width 1920 pitch 7680 (/4 1920)
>[190088.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190088.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3b680]
>[190089.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3b680] width 1920 pitch 7680 (/4 1920)
>[190089.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190089.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190089.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190089.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190089.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190089.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190089.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50c50]
>[190089.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50c50] width 1920 pitch 7680 (/4 1920)
>[190089.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4e50]
>[190089.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4e50] width 1920 pitch 7680 (/4 1920)
>[190091.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[190091.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[190093.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463a80]
>[190093.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463a80] width 1920 pitch 7680 (/4 1920)
>[190093.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8cf40]
>[190093.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8cf40] width 1920 pitch 7680 (/4 1920)
>[190093.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0230]
>[190094.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0230] width 1920 pitch 7680 (/4 1920)
>[190094.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8cf40]
>[190094.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8cf40] width 1920 pitch 7680 (/4 1920)
>[190094.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[190094.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[190100.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d5f0]
>[190100.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d5f0] width 1920 pitch 7680 (/4 1920)
>[190106.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7cdb0]
>[190106.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7cdb0] width 1920 pitch 7680 (/4 1920)
>[190110.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463930]
>[190110.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463930] width 1920 pitch 7680 (/4 1920)
>[190110.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82b50]
>[190110.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82b50] width 1920 pitch 7680 (/4 1920)
>[190110.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463930]
>[190110.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463930] width 1920 pitch 7680 (/4 1920)
>[190110.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20410]
>[190110.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20410] width 1920 pitch 7680 (/4 1920)
>[190110.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252aad0]
>[190110.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252aad0] width 1920 pitch 7680 (/4 1920)
>[190111.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[190111.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[190111.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd8d0]
>[190111.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd8d0] width 1920 pitch 7680 (/4 1920)
>[190111.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[190111.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[190111.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4036e50]
>[190111.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4036e50] width 1920 pitch 7680 (/4 1920)
>[190111.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[190111.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[190111.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4036e50]
>[190111.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4036e50] width 1920 pitch 7680 (/4 1920)
>[190111.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[190111.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[190111.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4036e50]
>[190111.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4036e50] width 1920 pitch 7680 (/4 1920)
>[190111.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f86a70]
>[190111.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f86a70] width 1920 pitch 7680 (/4 1920)
>[190121.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5f40]
>[190121.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5f40] width 1920 pitch 7680 (/4 1920)
>[190126.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fc460]
>[190126.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fc460] width 1920 pitch 7680 (/4 1920)
>[190126.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31149e0]
>[190126.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31149e0] width 1920 pitch 7680 (/4 1920)
>[190126.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c81e0]
>[190126.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c81e0] width 1920 pitch 7680 (/4 1920)
>[190126.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0080]
>[190126.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0080] width 1920 pitch 7680 (/4 1920)
>[190196.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ea50]
>[190196.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ea50] width 1920 pitch 7680 (/4 1920)
>[190226.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2b1f0]
>[190226.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2b1f0] width 1920 pitch 7680 (/4 1920)
>[190391.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b4d0]
>[190391.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b4d0] width 1920 pitch 7680 (/4 1920)
>[190406.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b4d0]
>[190406.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b4d0] width 1920 pitch 7680 (/4 1920)
>[190421.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99b20]
>[190421.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99b20] width 1920 pitch 7680 (/4 1920)
>[190451.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50490]
>[190451.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50490] width 1920 pitch 7680 (/4 1920)
>[190481.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d8e70]
>[190481.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d8e70] width 1920 pitch 7680 (/4 1920)
>[190526.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e43d0]
>[190526.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e43d0] width 1920 pitch 7680 (/4 1920)
>[190541.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50490]
>[190541.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50490] width 1920 pitch 7680 (/4 1920)
>[190556.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ca020]
>[190556.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ca020] width 1920 pitch 7680 (/4 1920)
>[190691.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaa620]
>[190691.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaa620] width 1920 pitch 7680 (/4 1920)
>[190706.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f2f0]
>[190706.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f2f0] width 1920 pitch 7680 (/4 1920)
>[190826.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97420]
>[190826.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97420] width 1920 pitch 7680 (/4 1920)
>[190856.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8060]
>[190856.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8060] width 1920 pitch 7680 (/4 1920)
>[190926.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7040]
>[190926.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7040] width 1920 pitch 7680 (/4 1920)
>[190927.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168f70]
>[190927.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168f70] width 1920 pitch 7680 (/4 1920)
>[190991.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e3950]
>[190991.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e3950] width 1920 pitch 7680 (/4 1920)
>[191021.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22430]
>[191021.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22430] width 1920 pitch 7680 (/4 1920)
>[191066.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d754d0]
>[191066.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d754d0] width 1920 pitch 7680 (/4 1920)
>[191096.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b826f0]
>[191096.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b826f0] width 1920 pitch 7680 (/4 1920)
>[191141.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bccc20]
>[191141.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bccc20] width 1920 pitch 7680 (/4 1920)
>[191156.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d359e0]
>[191156.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d359e0] width 1920 pitch 7680 (/4 1920)
>[191186.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39527c0]
>[191186.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39527c0] width 1920 pitch 7680 (/4 1920)
>[191201.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39527c0]
>[191201.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39527c0] width 1920 pitch 7680 (/4 1920)
>[191216.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc64e0]
>[191216.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc64e0] width 1920 pitch 7680 (/4 1920)
>[191231.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf8850]
>[191231.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf8850] width 1920 pitch 7680 (/4 1920)
>[191261.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11420]
>[191261.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11420] width 1920 pitch 7680 (/4 1920)
>[191276.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25b30]
>[191276.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25b30] width 1920 pitch 7680 (/4 1920)
>[191366.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[191366.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[191381.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6edb0]
>[191381.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6edb0] width 1920 pitch 7680 (/4 1920)
>[191426.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f510d0]
>[191426.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f510d0] width 1920 pitch 7680 (/4 1920)
>[191456.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7410]
>[191456.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7410] width 1920 pitch 7680 (/4 1920)
>[191486.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a00c10]
>[191486.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a00c10] width 1920 pitch 7680 (/4 1920)
>[191501.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaac30]
>[191501.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaac30] width 1920 pitch 7680 (/4 1920)
>[191516.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d4fab0]
>[191516.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d4fab0] width 1920 pitch 7680 (/4 1920)
>[191531.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a9d0]
>[191531.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a9d0] width 1920 pitch 7680 (/4 1920)
>[191591.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25489f0]
>[191591.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25489f0] width 1920 pitch 7680 (/4 1920)
>[191606.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e25cc0]
>[191606.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e25cc0] width 1920 pitch 7680 (/4 1920)
>[191741.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39620]
>[191741.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39620] width 1920 pitch 7680 (/4 1920)
>[191756.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50490]
>[191756.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50490] width 1920 pitch 7680 (/4 1920)
>[191771.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce86f0]
>[191771.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce86f0] width 1920 pitch 7680 (/4 1920)
>[191786.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c7260]
>[191786.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c7260] width 1920 pitch 7680 (/4 1920)
>[191801.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[191801.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[191831.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f86990]
>[191831.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f86990] width 1920 pitch 7680 (/4 1920)
>[191876.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c790]
>[191876.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c790] width 1920 pitch 7680 (/4 1920)
>[191891.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf2b30]
>[191891.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf2b30] width 1920 pitch 7680 (/4 1920)
>[191966.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccb700]
>[191966.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccb700] width 1920 pitch 7680 (/4 1920)
>[191981.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d15160]
>[191981.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d15160] width 1920 pitch 7680 (/4 1920)
>[191996.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec54b0]
>[191996.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec54b0] width 1920 pitch 7680 (/4 1920)
>[192041.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e5e40]
>[192041.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e5e40] width 1920 pitch 7680 (/4 1920)
>[192176.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c27040]
>[192176.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c27040] width 1920 pitch 7680 (/4 1920)
>[192191.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02640]
>[192191.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02640] width 1920 pitch 7680 (/4 1920)
>[192206.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3140]
>[192206.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3140] width 1920 pitch 7680 (/4 1920)
>[192221.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3140]
>[192221.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3140] width 1920 pitch 7680 (/4 1920)
>[192281.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0700]
>[192281.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0700] width 1920 pitch 7680 (/4 1920)
>[192296.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[192296.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[192300.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abef70]
>[192300.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abef70] width 1920 pitch 7680 (/4 1920)
>[192300.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f220a0]
>[192300.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f220a0] width 1920 pitch 7680 (/4 1920)
>[192311.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[192311.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[192356.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56460]
>[192356.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56460] width 1920 pitch 7680 (/4 1920)
>[192446.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce86f0]
>[192446.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce86f0] width 1920 pitch 7680 (/4 1920)
>[192461.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[192461.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[192551.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01170]
>[192551.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01170] width 1920 pitch 7680 (/4 1920)
>[192566.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4200]
>[192566.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4200] width 1920 pitch 7680 (/4 1920)
>[192611.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ca40]
>[192611.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ca40] width 1920 pitch 7680 (/4 1920)
>[192626.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[192626.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[192656.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251efd0]
>[192656.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251efd0] width 1920 pitch 7680 (/4 1920)
>[192686.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[192686.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[193031.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9e80]
>[193031.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9e80] width 1920 pitch 7680 (/4 1920)
>[193046.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9e80]
>[193046.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9e80] width 1920 pitch 7680 (/4 1920)
>[193076.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0ef90]
>[193076.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0ef90] width 1920 pitch 7680 (/4 1920)
>[193091.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9e80]
>[193091.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9e80] width 1920 pitch 7680 (/4 1920)
>[193151.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9e80]
>[193151.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9e80] width 1920 pitch 7680 (/4 1920)
>[193166.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34660]
>[193166.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34660] width 1920 pitch 7680 (/4 1920)
>[193226.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5a20]
>[193226.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5a20] width 1920 pitch 7680 (/4 1920)
>[193241.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d272e0]
>[193241.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d272e0] width 1920 pitch 7680 (/4 1920)
>[193256.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f5ab0]
>[193256.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f5ab0] width 1920 pitch 7680 (/4 1920)
>[193286.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1400]
>[193286.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1400] width 1920 pitch 7680 (/4 1920)
>[193346.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0ef90]
>[193346.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0ef90] width 1920 pitch 7680 (/4 1920)
>[193361.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc1d60]
>[193361.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc1d60] width 1920 pitch 7680 (/4 1920)
>[193451.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efbb20]
>[193451.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efbb20] width 1920 pitch 7680 (/4 1920)
>[193466.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9e80]
>[193466.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9e80] width 1920 pitch 7680 (/4 1920)
>[193578.118] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[193578.118] (II) RADEON(0): Using hsync ranges from config file
>[193578.118] (II) RADEON(0): Using vrefresh ranges from config file
>[193578.118] (II) RADEON(0): Printing DDC gathered Modelines:
>[193578.118] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[193578.118] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[193578.118] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[193578.118] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[193578.118] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[193578.118] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[193578.118] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[193578.118] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[193578.118] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[193578.118] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[193578.118] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[193578.118] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[193668.663] (II) RADEON(0): RADEONSaveScreen(2)
>[193668.663] (II) RADEON(0): RADEONSaveScreen(0)
>[193739.263] (II) RADEON(0): RADEONSaveScreen(1)
>[193739.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a58b30]
>[193739.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a58b30] width 1920 pitch 7680 (/4 1920)
>[193874.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d432b0]
>[193874.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d432b0] width 1920 pitch 7680 (/4 1920)
>[193889.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c04b90]
>[193889.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c04b90] width 1920 pitch 7680 (/4 1920)
>[193964.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc80d0]
>[193964.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc80d0] width 1920 pitch 7680 (/4 1920)
>[193979.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0ef90]
>[193979.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0ef90] width 1920 pitch 7680 (/4 1920)
>[193994.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[193994.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[194009.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[194009.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[194039.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a58b30]
>[194039.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a58b30] width 1920 pitch 7680 (/4 1920)
>[194054.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d432b0]
>[194054.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d432b0] width 1920 pitch 7680 (/4 1920)
>[194114.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd0650]
>[194114.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd0650] width 1920 pitch 7680 (/4 1920)
>[194129.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0ef90]
>[194129.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0ef90] width 1920 pitch 7680 (/4 1920)
>[194204.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39073f0]
>[194204.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39073f0] width 1920 pitch 7680 (/4 1920)
>[194219.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a000]
>[194219.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a000] width 1920 pitch 7680 (/4 1920)
>[194489.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03f10]
>[194489.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03f10] width 1920 pitch 7680 (/4 1920)
>[194504.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3065c00]
>[194504.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3065c00] width 1920 pitch 7680 (/4 1920)
>[194604.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31197f0]
>[194604.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31197f0] width 1920 pitch 7680 (/4 1920)
>[194604.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194604.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194604.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194604.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194604.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194604.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194604.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194604.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194604.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194604.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194604.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194604.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194604.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194604.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194604.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194604.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194604.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194604.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194605.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194605.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194605.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194605.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194605.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194605.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194605.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194605.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194605.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194605.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194605.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194605.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194605.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194605.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194605.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194605.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194605.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194605.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194605.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ff0]
>[194605.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ff0] width 1920 pitch 7680 (/4 1920)
>[194605.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[194605.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[194819.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1990]
>[194819.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1990] width 1920 pitch 7680 (/4 1920)
>[194834.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99f70]
>[194834.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99f70] width 1920 pitch 7680 (/4 1920)
>[194894.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ccf0]
>[194894.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ccf0] width 1920 pitch 7680 (/4 1920)
>[194903.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ccf0]
>[194903.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ccf0] width 1920 pitch 7680 (/4 1920)
>[194903.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b00]
>[194903.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b00] width 1920 pitch 7680 (/4 1920)
>[194904.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[194904.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[194904.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad50]
>[194904.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad50] width 1920 pitch 7680 (/4 1920)
>[194904.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[194904.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[194904.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad50]
>[194904.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad50] width 1920 pitch 7680 (/4 1920)
>[194909.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81b70]
>[194909.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81b70] width 1920 pitch 7680 (/4 1920)
>[194939.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1080]
>[194939.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1080] width 1920 pitch 7680 (/4 1920)
>[194954.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff3f0]
>[194954.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff3f0] width 1920 pitch 7680 (/4 1920)
>[194969.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1080]
>[194969.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1080] width 1920 pitch 7680 (/4 1920)
>[194999.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40393f0]
>[194999.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40393f0] width 1920 pitch 7680 (/4 1920)
>[195179.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[195179.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[195194.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b040]
>[195194.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b040] width 1920 pitch 7680 (/4 1920)
>[195209.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[195209.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[195224.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e01b0]
>[195224.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e01b0] width 1920 pitch 7680 (/4 1920)
>[195314.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[195314.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[195329.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[195329.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[195404.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99f70]
>[195404.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99f70] width 1920 pitch 7680 (/4 1920)
>[195419.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[195419.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[195434.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99f70]
>[195434.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99f70] width 1920 pitch 7680 (/4 1920)
>[195449.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[195449.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[195479.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea31d0]
>[195479.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea31d0] width 1920 pitch 7680 (/4 1920)
>[195524.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad50]
>[195524.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad50] width 1920 pitch 7680 (/4 1920)
>[195539.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fcb60]
>[195539.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fcb60] width 1920 pitch 7680 (/4 1920)
>[195569.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396ad50]
>[195569.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396ad50] width 1920 pitch 7680 (/4 1920)
>[195614.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[195614.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[195626.451] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[195626.451] (II) RADEON(0): Using hsync ranges from config file
>[195626.451] (II) RADEON(0): Using vrefresh ranges from config file
>[195626.451] (II) RADEON(0): Printing DDC gathered Modelines:
>[195626.451] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[195626.451] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[195626.451] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[195626.451] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[195626.451] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[195626.451] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[195626.451] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[195626.451] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[195626.451] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[195626.451] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[195626.451] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[195626.451] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[195629.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913700]
>[195629.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913700] width 1920 pitch 7680 (/4 1920)
>[195716.656] (II) RADEON(0): RADEONSaveScreen(2)
>[195716.657] (II) RADEON(0): RADEONSaveScreen(0)
>[196761.105] (II) RADEON(0): RADEONSaveScreen(1)
>[196761.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a6f0]
>[196761.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a6f0] width 1920 pitch 7680 (/4 1920)
>[196768.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196768.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196768.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196768.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196768.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196768.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196768.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196768.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196768.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196768.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196768.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196768.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196768.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196768.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196768.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196768.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196768.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196768.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196768.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196768.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196769.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196769.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196769.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196769.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196769.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196769.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196769.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196769.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196770.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196770.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196770.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196770.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196770.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196770.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196770.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196770.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196770.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196770.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196770.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196770.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196770.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196770.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196770.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196770.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196770.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196770.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196770.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196771.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196771.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196771.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196771.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196771.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196771.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196771.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196772.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196772.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196772.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196772.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196772.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196772.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196772.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196772.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196772.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196772.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196772.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196772.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196772.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196772.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196772.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196772.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196772.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[196772.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[196772.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ef0]
>[196772.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ef0] width 1920 pitch 7680 (/4 1920)
>[196778.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196778.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196778.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f820]
>[196778.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f820] width 1920 pitch 7680 (/4 1920)
>[196778.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196778.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196778.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196778.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196778.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196778.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196778.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196778.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196778.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196778.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196778.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196778.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196778.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196778.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196779.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196779.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196779.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196779.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196779.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196779.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196779.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196779.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196779.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196779.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196780.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196780.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196780.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196780.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196781.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196781.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196781.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196781.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196782.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196782.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196782.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196782.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196782.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196782.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196782.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196782.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196782.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196782.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196782.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196782.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196782.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196782.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196782.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196782.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196782.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196782.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196782.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36010]
>[196782.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36010] width 1920 pitch 7680 (/4 1920)
>[196782.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196782.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196782.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463510]
>[196782.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463510] width 1920 pitch 7680 (/4 1920)
>[196782.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c67280]
>[196782.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c67280] width 1920 pitch 7680 (/4 1920)
>[196782.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[196782.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[196782.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916a00]
>[196782.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916a00] width 1920 pitch 7680 (/4 1920)
>[196782.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6c60]
>[196782.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6c60] width 1920 pitch 7680 (/4 1920)
>[196782.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5f820]
>[196782.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5f820] width 1920 pitch 7680 (/4 1920)
>[196782.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196782.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196782.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d210]
>[196782.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d210] width 1920 pitch 7680 (/4 1920)
>[196782.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196782.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196782.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d210]
>[196782.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d210] width 1920 pitch 7680 (/4 1920)
>[196782.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196782.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196782.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d210]
>[196782.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d210] width 1920 pitch 7680 (/4 1920)
>[196782.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196782.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196782.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d210]
>[196782.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d210] width 1920 pitch 7680 (/4 1920)
>[196782.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196782.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196782.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d210]
>[196782.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d210] width 1920 pitch 7680 (/4 1920)
>[196782.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196782.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196782.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256d210]
>[196783.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256d210] width 1920 pitch 7680 (/4 1920)
>[196783.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[196783.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[196783.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[196783.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[196783.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[196783.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[196783.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[196783.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[196783.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[196783.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[196783.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e01b0]
>[196783.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e01b0] width 1920 pitch 7680 (/4 1920)
>[196783.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e01b0]
>[196783.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e01b0] width 1920 pitch 7680 (/4 1920)
>[196783.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[196783.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[196783.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948680]
>[196783.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948680] width 1920 pitch 7680 (/4 1920)
>[196783.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[196783.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[196783.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2a8b0]
>[196783.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2a8b0] width 1920 pitch 7680 (/4 1920)
>[196783.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[196783.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[196783.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2a8b0]
>[196783.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2a8b0] width 1920 pitch 7680 (/4 1920)
>[196783.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[196783.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[196783.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2a8b0]
>[196783.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2a8b0] width 1920 pitch 7680 (/4 1920)
>[196783.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[196783.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[196783.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2a8b0]
>[196783.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2a8b0] width 1920 pitch 7680 (/4 1920)
>[196783.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0d80]
>[196783.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0d80] width 1920 pitch 7680 (/4 1920)
>[196783.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[196783.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[196783.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196783.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196783.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[196783.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[196784.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e30ca0]
>[196784.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e30ca0] width 1920 pitch 7680 (/4 1920)
>[196784.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[196784.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[196784.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e30ca0]
>[196784.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e30ca0] width 1920 pitch 7680 (/4 1920)
>[196784.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[196784.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[196784.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e30ca0]
>[196784.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e30ca0] width 1920 pitch 7680 (/4 1920)
>[196784.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315f300]
>[196784.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315f300] width 1920 pitch 7680 (/4 1920)
>[196784.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2538680]
>[196784.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2538680] width 1920 pitch 7680 (/4 1920)
>[196784.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e30ca0]
>[196784.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e30ca0] width 1920 pitch 7680 (/4 1920)
>[196784.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196784.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e30ca0]
>[196784.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e30ca0] width 1920 pitch 7680 (/4 1920)
>[196784.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25385d0]
>[196784.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25385d0] width 1920 pitch 7680 (/4 1920)
>[196793.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89050]
>[196793.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89050] width 1920 pitch 7680 (/4 1920)
>[196794.795] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[196794.795] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[196794.795] (II) UnloadModule: "evdev"
>[196802.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43130]
>[196802.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43130] width 1920 pitch 7680 (/4 1920)
>[196836.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea7c0]
>[196836.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea7c0] width 1920 pitch 7680 (/4 1920)
>[196851.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea7c0]
>[196851.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea7c0] width 1920 pitch 7680 (/4 1920)
>[196941.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43130]
>[196941.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43130] width 1920 pitch 7680 (/4 1920)
>[196956.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea7c0]
>[196956.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea7c0] width 1920 pitch 7680 (/4 1920)
>[197091.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c759d0]
>[197091.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c759d0] width 1920 pitch 7680 (/4 1920)
>[197106.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89050]
>[197106.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89050] width 1920 pitch 7680 (/4 1920)
>[197181.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43130]
>[197181.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43130] width 1920 pitch 7680 (/4 1920)
>[197211.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[197211.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[197226.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ea5e0]
>[197226.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ea5e0] width 1920 pitch 7680 (/4 1920)
>[197241.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30d00]
>[197241.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30d00] width 1920 pitch 7680 (/4 1920)
>[197361.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43130]
>[197361.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43130] width 1920 pitch 7680 (/4 1920)
>[197376.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c759d0]
>[197376.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c759d0] width 1920 pitch 7680 (/4 1920)
>[197394.405] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[197394.405] (II) RADEON(0): Using hsync ranges from config file
>[197394.405] (II) RADEON(0): Using vrefresh ranges from config file
>[197394.405] (II) RADEON(0): Printing DDC gathered Modelines:
>[197394.405] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[197394.405] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[197394.405] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[197394.405] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[197394.405] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[197394.405] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[197394.405] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[197394.405] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[197394.405] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[197394.405] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[197394.405] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[197394.405] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[197484.673] (II) RADEON(0): RADEONSaveScreen(2)
>[197484.673] (II) RADEON(0): RADEONSaveScreen(0)
>[198910.094] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[198910.095] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[198910.095] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[198910.095] 	Option "XkbRules" "evdev"
>[198910.095] 	Option "XkbModel" "evdev"
>[198910.095] 	Option "XkbLayout" "us"
>[198910.095] 	Option "_source" "server/udev"
>[198910.095] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[198910.095] 	Option "path" "/dev/input/event14"
>[198910.095] 	Option "device" "/dev/input/event14"
>[198910.095] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input34/event14"
>[198910.095] 	Option "driver" "evdev"
>[198910.095] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[198910.095] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[198910.095] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[198910.095] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[198910.095] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[198910.095] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[198910.095] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[198910.095] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[198910.095] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[198910.095] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[198910.095] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[198910.095] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input34/event14"
>[198910.095] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[198910.095] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[198910.096] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[198910.096] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[198910.096] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[198910.096] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[198910.096] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[198910.096] (II) No input driver specified, ignoring this device.
>[198910.096] (II) This device may have been added with another device file.
>[198910.102] (II) RADEON(0): RADEONSaveScreen(1)
>[198916.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18dd0]
>[198916.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18dd0] width 1920 pitch 7680 (/4 1920)
>[198916.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc22c0]
>[198916.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc22c0] width 1920 pitch 7680 (/4 1920)
>[198916.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2566f80]
>[198916.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2566f80] width 1920 pitch 7680 (/4 1920)
>[198916.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398ae00]
>[198916.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398ae00] width 1920 pitch 7680 (/4 1920)
>[198916.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb4b0]
>[198916.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb4b0] width 1920 pitch 7680 (/4 1920)
>[198916.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb51f0]
>[198916.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb51f0] width 1920 pitch 7680 (/4 1920)
>[198916.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18dd0]
>[198916.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18dd0] width 1920 pitch 7680 (/4 1920)
>[198916.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a967a0]
>[198916.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a967a0] width 1920 pitch 7680 (/4 1920)
>[198916.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fc6d0]
>[198916.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fc6d0] width 1920 pitch 7680 (/4 1920)
>[198916.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc7ec0]
>[198916.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc7ec0] width 1920 pitch 7680 (/4 1920)
>[198916.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390a7e0]
>[198916.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390a7e0] width 1920 pitch 7680 (/4 1920)
>[198916.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5feb0]
>[198916.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5feb0] width 1920 pitch 7680 (/4 1920)
>[198916.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a65060]
>[198917.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a65060] width 1920 pitch 7680 (/4 1920)
>[198917.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7d30]
>[198917.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7d30] width 1920 pitch 7680 (/4 1920)
>[198917.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932000]
>[198917.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932000] width 1920 pitch 7680 (/4 1920)
>[198917.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904a10]
>[198917.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904a10] width 1920 pitch 7680 (/4 1920)
>[198917.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fbc70]
>[198917.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fbc70] width 1920 pitch 7680 (/4 1920)
>[198918.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2c60]
>[198918.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2c60] width 1920 pitch 7680 (/4 1920)
>[198918.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04200]
>[198918.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04200] width 1920 pitch 7680 (/4 1920)
>[198918.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d788c0]
>[198918.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d788c0] width 1920 pitch 7680 (/4 1920)
>[198918.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04200]
>[198918.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04200] width 1920 pitch 7680 (/4 1920)
>[198918.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[198918.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[198919.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04200]
>[198919.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04200] width 1920 pitch 7680 (/4 1920)
>[198919.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926370]
>[198919.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926370] width 1920 pitch 7680 (/4 1920)
>[198919.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402c370]
>[198919.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402c370] width 1920 pitch 7680 (/4 1920)
>[198919.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[198919.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[198919.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000c50]
>[198919.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000c50] width 1920 pitch 7680 (/4 1920)
>[198919.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3956260]
>[198919.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3956260] width 1920 pitch 7680 (/4 1920)
>[198919.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39578f0]
>[198919.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39578f0] width 1920 pitch 7680 (/4 1920)
>[198919.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3957880]
>[198919.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3957880] width 1920 pitch 7680 (/4 1920)
>[198920.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fed720]
>[198920.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fed720] width 1920 pitch 7680 (/4 1920)
>[198920.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3957880]
>[198920.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3957880] width 1920 pitch 7680 (/4 1920)
>[198920.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fed720]
>[198920.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fed720] width 1920 pitch 7680 (/4 1920)
>[198935.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f12e20]
>[198935.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f12e20] width 1920 pitch 7680 (/4 1920)
>[198938.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1e80]
>[198938.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1e80] width 1920 pitch 7680 (/4 1920)
>[198940.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d50]
>[198940.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d50] width 1920 pitch 7680 (/4 1920)
>[198943.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51540]
>[198943.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51540] width 1920 pitch 7680 (/4 1920)
>[198955.201] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[198955.201] (II) RADEON(0): Using hsync ranges from config file
>[198955.201] (II) RADEON(0): Using vrefresh ranges from config file
>[198955.201] (II) RADEON(0): Printing DDC gathered Modelines:
>[198955.201] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[198955.201] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[198955.201] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[198955.201] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[198955.201] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[198955.201] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[198955.201] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[198955.201] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[198955.201] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[198955.201] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[198955.201] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[198955.201] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[198955.247] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[198955.247] (II) RADEON(0): Using hsync ranges from config file
>[198955.247] (II) RADEON(0): Using vrefresh ranges from config file
>[198955.247] (II) RADEON(0): Printing DDC gathered Modelines:
>[198955.247] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[198955.247] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[198955.247] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[198955.247] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[198955.247] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[198955.247] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[198955.247] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[198955.247] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[198955.247] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[198955.247] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[198955.247] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[198955.247] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[198955.292] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[198955.292] (II) RADEON(0): Using hsync ranges from config file
>[198955.292] (II) RADEON(0): Using vrefresh ranges from config file
>[198955.292] (II) RADEON(0): Printing DDC gathered Modelines:
>[198955.292] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[198955.292] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[198955.292] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[198955.292] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[198955.292] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[198955.292] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[198955.292] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[198955.292] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[198955.292] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[198955.292] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[198955.292] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[198955.292] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[198955.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8c20]
>[198955.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8c20] width 1920 pitch 7680 (/4 1920)
>[198985.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a00c80]
>[198985.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a00c80] width 1920 pitch 7680 (/4 1920)
>[199000.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[199000.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[199015.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e78e0]
>[199015.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e78e0] width 1920 pitch 7680 (/4 1920)
>[199060.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b88050]
>[199060.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b88050] width 1920 pitch 7680 (/4 1920)
>[199075.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[199075.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[199225.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7880]
>[199225.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7880] width 1920 pitch 7680 (/4 1920)
>[199270.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7860]
>[199270.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7860] width 1920 pitch 7680 (/4 1920)
>[199285.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7860]
>[199285.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7860] width 1920 pitch 7680 (/4 1920)
>[199300.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e78e0]
>[199300.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e78e0] width 1920 pitch 7680 (/4 1920)
>[199375.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[199375.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[199390.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b880b0]
>[199390.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b880b0] width 1920 pitch 7680 (/4 1920)
>[199450.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e72c0]
>[199450.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e72c0] width 1920 pitch 7680 (/4 1920)
>[199480.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e78c0]
>[199480.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e78c0] width 1920 pitch 7680 (/4 1920)
>[199600.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96160]
>[199600.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96160] width 1920 pitch 7680 (/4 1920)
>[199615.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51650]
>[199615.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51650] width 1920 pitch 7680 (/4 1920)
>[199645.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96160]
>[199645.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96160] width 1920 pitch 7680 (/4 1920)
>[199675.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc3c0]
>[199675.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc3c0] width 1920 pitch 7680 (/4 1920)
>[199855.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[199855.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[199870.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51610]
>[199870.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51610] width 1920 pitch 7680 (/4 1920)
>[199975.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e78c0]
>[199975.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e78c0] width 1920 pitch 7680 (/4 1920)
>[199990.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7410]
>[199990.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7410] width 1920 pitch 7680 (/4 1920)
>[200170.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200170.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200185.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96160]
>[200185.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96160] width 1920 pitch 7680 (/4 1920)
>[200200.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200200.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200230.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7f70]
>[200230.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7f70] width 1920 pitch 7680 (/4 1920)
>[200440.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200440.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200455.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84b40]
>[200455.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84b40] width 1920 pitch 7680 (/4 1920)
>[200515.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7300]
>[200515.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7300] width 1920 pitch 7680 (/4 1920)
>[200530.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7300]
>[200530.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7300] width 1920 pitch 7680 (/4 1920)
>[200560.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200560.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200590.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200590.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200650.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200650.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200665.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d0f0]
>[200665.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d0f0] width 1920 pitch 7680 (/4 1920)
>[200678.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200678.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200678.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200678.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200678.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200678.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200678.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200678.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200678.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200678.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200678.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200678.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200679.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200679.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200679.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200679.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200679.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200679.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200679.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84b50]
>[200679.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84b50] width 1920 pitch 7680 (/4 1920)
>[200679.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200679.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200679.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84b50]
>[200679.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84b50] width 1920 pitch 7680 (/4 1920)
>[200679.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccc380]
>[200679.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccc380] width 1920 pitch 7680 (/4 1920)
>[200680.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200680.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200680.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200680.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200681.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200681.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200681.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84b50]
>[200681.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84b50] width 1920 pitch 7680 (/4 1920)
>[200681.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200681.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200681.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84b50]
>[200681.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84b50] width 1920 pitch 7680 (/4 1920)
>[200681.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200681.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200681.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84b50]
>[200681.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84b50] width 1920 pitch 7680 (/4 1920)
>[200681.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c933b0]
>[200681.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c933b0] width 1920 pitch 7680 (/4 1920)
>[200755.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96160]
>[200755.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96160] width 1920 pitch 7680 (/4 1920)
>[200770.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96160]
>[200770.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96160] width 1920 pitch 7680 (/4 1920)
>[200890.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7410]
>[200890.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7410] width 1920 pitch 7680 (/4 1920)
>[200905.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7410]
>[200905.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7410] width 1920 pitch 7680 (/4 1920)
>[200975.677] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[200975.677] (II) RADEON(0): Using hsync ranges from config file
>[200975.677] (II) RADEON(0): Using vrefresh ranges from config file
>[200975.677] (II) RADEON(0): Printing DDC gathered Modelines:
>[200975.677] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[200975.677] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[200975.677] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[200975.677] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[200975.677] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[200975.677] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[200975.677] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[200975.677] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[200975.677] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[200975.677] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[200975.677] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[200975.677] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[200975.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9c30]
>[200975.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9c30] width 1920 pitch 7680 (/4 1920)
>[200980.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61f10]
>[200980.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61f10] width 1920 pitch 7680 (/4 1920)
>[200995.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9c30]
>[200995.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9c30] width 1920 pitch 7680 (/4 1920)
>[201160.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33e00]
>[201160.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33e00] width 1920 pitch 7680 (/4 1920)
>[201175.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9c30]
>[201175.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9c30] width 1920 pitch 7680 (/4 1920)
>[201205.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9120]
>[201205.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9120] width 1920 pitch 7680 (/4 1920)
>[201220.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9c30]
>[201220.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9c30] width 1920 pitch 7680 (/4 1920)
>[201265.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e7850]
>[201265.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e7850] width 1920 pitch 7680 (/4 1920)
>[201280.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61f10]
>[201280.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61f10] width 1920 pitch 7680 (/4 1920)
>[201310.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33e00]
>[201310.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33e00] width 1920 pitch 7680 (/4 1920)
>[201325.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61f10]
>[201325.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61f10] width 1920 pitch 7680 (/4 1920)
>[201340.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33e00]
>[201340.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33e00] width 1920 pitch 7680 (/4 1920)
>[201385.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa9c30]
>[201385.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa9c30] width 1920 pitch 7680 (/4 1920)
>[201400.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ce30]
>[201400.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ce30] width 1920 pitch 7680 (/4 1920)
>[201415.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e7850]
>[201415.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e7850] width 1920 pitch 7680 (/4 1920)
>[201520.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61f10]
>[201520.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61f10] width 1920 pitch 7680 (/4 1920)
>[201576.725] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[201576.725] (II) RADEON(0): Using hsync ranges from config file
>[201576.725] (II) RADEON(0): Using vrefresh ranges from config file
>[201576.725] (II) RADEON(0): Printing DDC gathered Modelines:
>[201576.725] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[201576.725] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[201576.725] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[201576.725] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[201576.725] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[201576.725] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[201576.725] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[201576.725] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[201576.725] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[201576.725] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[201576.725] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[201576.725] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[201580.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[201580.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[201666.673] (II) RADEON(0): RADEONSaveScreen(2)
>[201666.673] (II) RADEON(0): RADEONSaveScreen(0)
>[203019.824] (II) RADEON(0): RADEONSaveScreen(1)
>[203020.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203020.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203027.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0aef0]
>[203027.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0aef0] width 1920 pitch 7680 (/4 1920)
>[203030.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203030.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203030.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203030.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203030.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203030.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203030.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203030.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203030.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203030.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203030.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203030.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203030.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203030.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203030.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203032.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203032.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203032.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203032.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203032.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203032.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203032.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203032.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203032.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203032.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203032.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203032.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203032.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203032.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203032.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203032.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203032.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203032.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203032.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203033.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203033.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203033.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203033.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203033.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203033.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203033.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203033.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203033.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203033.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203033.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203033.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203033.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203035.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203035.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203039.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203039.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203040.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203040.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203041.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203041.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203041.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203041.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203041.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203041.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203041.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203041.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203041.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203041.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203041.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203041.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203041.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203042.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203042.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203042.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203042.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203042.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203042.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203042.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203042.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203042.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203042.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203042.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203042.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203042.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203042.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203042.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203042.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203042.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203043.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203043.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203043.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203043.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203044.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203044.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203046.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203046.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203046.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203046.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203046.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203046.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203046.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203046.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203046.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203046.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203046.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203046.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203046.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203046.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203046.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203046.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203046.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203046.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203048.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203048.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203048.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203048.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203048.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203048.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203048.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203048.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203048.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203048.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203048.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203048.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203048.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203048.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203048.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203048.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203048.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203048.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203048.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203048.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203048.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203048.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203049.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203049.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203049.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203049.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203049.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203049.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203049.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203049.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203049.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203049.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203049.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203049.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203049.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[203049.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[203049.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec010]
>[203049.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec010] width 1920 pitch 7680 (/4 1920)
>[203049.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203049.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203050.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203050.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203050.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a520]
>[203050.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a520] width 1920 pitch 7680 (/4 1920)
>[203053.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a520]
>[203053.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a520] width 1920 pitch 7680 (/4 1920)
>[203053.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203053.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203053.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0f30]
>[203053.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0f30] width 1920 pitch 7680 (/4 1920)
>[203053.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203053.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203053.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203053.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203053.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203053.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203053.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203053.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203053.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203053.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203054.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203054.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203054.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203054.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203054.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203054.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203054.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203054.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203054.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203054.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203054.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203054.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203055.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7940]
>[203055.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7940] width 1920 pitch 7680 (/4 1920)
>[203056.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ab0]
>[203056.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ab0] width 1920 pitch 7680 (/4 1920)
>[203056.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[203056.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[203056.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[203056.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[203056.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[203056.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[203056.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[203056.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[203056.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[203056.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[203056.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[203056.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[203056.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[203056.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[203056.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[203057.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[203064.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cef300]
>[203064.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cef300] width 1920 pitch 7680 (/4 1920)
>[203065.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[203065.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[203070.275] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[203070.275] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[203070.275] (II) UnloadModule: "evdev"
>[203080.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[203080.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[203085.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f56200]
>[203085.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f56200] width 1920 pitch 7680 (/4 1920)
>[203140.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[203140.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[203155.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce1ee0]
>[203155.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce1ee0] width 1920 pitch 7680 (/4 1920)
>[203245.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c43b0]
>[203245.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c43b0] width 1920 pitch 7680 (/4 1920)
>[203260.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc3db0]
>[203260.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc3db0] width 1920 pitch 7680 (/4 1920)
>[203275.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc3db0]
>[203275.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc3db0] width 1920 pitch 7680 (/4 1920)
>[203290.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5750]
>[203290.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5750] width 1920 pitch 7680 (/4 1920)
>[203305.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[203305.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[203320.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5750]
>[203320.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5750] width 1920 pitch 7680 (/4 1920)
>[203350.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc3db0]
>[203350.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc3db0] width 1920 pitch 7680 (/4 1920)
>[203365.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c43b0]
>[203365.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c43b0] width 1920 pitch 7680 (/4 1920)
>[203440.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f50f10]
>[203440.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f50f10] width 1920 pitch 7680 (/4 1920)
>[203455.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[203455.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[203515.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[203515.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[203530.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[203530.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[203543.616] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[203543.616] (II) No input driver specified, ignoring this device.
>[203543.616] (II) This device may have been added with another device file.
>[203543.617] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[203543.617] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[203543.617] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[203543.617] 	Option "XkbRules" "evdev"
>[203543.617] 	Option "XkbModel" "evdev"
>[203543.617] 	Option "XkbLayout" "us"
>[203543.617] 	Option "_source" "server/udev"
>[203543.617] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[203543.617] 	Option "path" "/dev/input/event14"
>[203543.617] 	Option "device" "/dev/input/event14"
>[203543.617] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input35/event14"
>[203543.617] 	Option "driver" "evdev"
>[203543.617] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[203543.617] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[203543.625] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[203543.625] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[203543.625] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[203543.625] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[203543.625] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[203543.625] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[203543.625] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[203543.625] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[203543.625] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[203543.625] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input35/event14"
>[203543.625] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[203543.625] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[203543.625] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[203543.625] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[203543.625] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[203543.625] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[203550.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[203550.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[203552.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203552.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203552.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203552.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203552.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203552.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203552.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2290]
>[203552.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2290] width 1920 pitch 7680 (/4 1920)
>[203552.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203552.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203552.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203552.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203552.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203552.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203552.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203552.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203553.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203553.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203553.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203553.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203553.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203553.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203553.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203553.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203553.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203553.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203553.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203554.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203554.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203554.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203554.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203554.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203555.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203555.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203555.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203555.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203555.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203555.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203555.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203555.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203555.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203555.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203555.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203555.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203555.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203555.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203555.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203555.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203555.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203555.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203555.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203555.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203555.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203556.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203556.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203556.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203556.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203556.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203556.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203556.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203556.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203556.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203556.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203556.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203556.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203556.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203556.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae59d0]
>[203556.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae59d0] width 1920 pitch 7680 (/4 1920)
>[203556.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203556.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203556.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203556.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203556.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203556.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203556.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203557.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403fba0]
>[203557.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403fba0] width 1920 pitch 7680 (/4 1920)
>[203557.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203557.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203558.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203558.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39455a0]
>[203559.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39455a0] width 1920 pitch 7680 (/4 1920)
>[203559.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae46d0]
>[203559.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae46d0] width 1920 pitch 7680 (/4 1920)
>[203559.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4660]
>[203559.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4660] width 1920 pitch 7680 (/4 1920)
>[203559.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2370]
>[203559.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2370] width 1920 pitch 7680 (/4 1920)
>[203559.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4660]
>[203559.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4660] width 1920 pitch 7680 (/4 1920)
>[203559.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2370]
>[203559.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2370] width 1920 pitch 7680 (/4 1920)
>[203559.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4660]
>[203559.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4660] width 1920 pitch 7680 (/4 1920)
>[203559.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2370]
>[203559.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2370] width 1920 pitch 7680 (/4 1920)
>[203559.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4310]
>[203559.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4310] width 1920 pitch 7680 (/4 1920)
>[203559.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4490]
>[203559.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4490] width 1920 pitch 7680 (/4 1920)
>[203559.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4490]
>[203559.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4490] width 1920 pitch 7680 (/4 1920)
>[203559.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4490]
>[203559.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4490] width 1920 pitch 7680 (/4 1920)
>[203559.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4490]
>[203559.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4490] width 1920 pitch 7680 (/4 1920)
>[203559.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4490]
>[203559.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4490] width 1920 pitch 7680 (/4 1920)
>[203559.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4490]
>[203559.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4490] width 1920 pitch 7680 (/4 1920)
>[203559.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203559.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7490]
>[203559.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7490] width 1920 pitch 7680 (/4 1920)
>[203559.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[203559.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[203560.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7490]
>[203560.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7490] width 1920 pitch 7680 (/4 1920)
>[203565.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954e60]
>[203565.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954e60] width 1920 pitch 7680 (/4 1920)
>[203565.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7490]
>[203565.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7490] width 1920 pitch 7680 (/4 1920)
>[203565.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7490]
>[203565.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7490] width 1920 pitch 7680 (/4 1920)
>[203566.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571660]
>[203566.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571660] width 1920 pitch 7680 (/4 1920)
>[203575.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7490]
>[203575.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7490] width 1920 pitch 7680 (/4 1920)
>[203578.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571660]
>[203578.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571660] width 1920 pitch 7680 (/4 1920)
>[203588.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[203588.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[203588.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203588.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203588.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b072e0]
>[203588.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b072e0] width 1920 pitch 7680 (/4 1920)
>[203588.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203588.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203588.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b072e0]
>[203588.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b072e0] width 1920 pitch 7680 (/4 1920)
>[203588.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203588.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203588.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b072e0]
>[203588.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b072e0] width 1920 pitch 7680 (/4 1920)
>[203588.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203588.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203588.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b072e0]
>[203588.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b072e0] width 1920 pitch 7680 (/4 1920)
>[203588.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203588.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203589.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b072e0]
>[203589.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b072e0] width 1920 pitch 7680 (/4 1920)
>[203589.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203589.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203589.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203589.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203589.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203589.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203589.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203589.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203589.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203590.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203590.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203590.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203590.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203590.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203590.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203590.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203590.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203590.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203590.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203590.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203590.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203590.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203590.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203590.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203590.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203590.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203590.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203590.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203591.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203591.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203591.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203591.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203591.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203591.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203591.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203591.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203591.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203591.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203591.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203591.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203591.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203591.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203591.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203591.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203591.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[203591.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[203591.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[203591.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[203599.806] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[203599.806] (II) RADEON(0): Using hsync ranges from config file
>[203599.806] (II) RADEON(0): Using vrefresh ranges from config file
>[203599.806] (II) RADEON(0): Printing DDC gathered Modelines:
>[203599.806] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[203599.806] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[203599.806] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[203599.806] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[203599.806] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[203599.806] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[203599.806] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[203599.806] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[203599.806] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[203599.806] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[203599.806] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[203599.806] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[203599.852] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[203599.852] (II) RADEON(0): Using hsync ranges from config file
>[203599.852] (II) RADEON(0): Using vrefresh ranges from config file
>[203599.852] (II) RADEON(0): Printing DDC gathered Modelines:
>[203599.852] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[203599.852] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[203599.852] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[203599.852] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[203599.852] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[203599.852] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[203599.852] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[203599.852] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[203599.852] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[203599.852] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[203599.852] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[203599.852] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[203599.897] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[203599.897] (II) RADEON(0): Using hsync ranges from config file
>[203599.897] (II) RADEON(0): Using vrefresh ranges from config file
>[203599.897] (II) RADEON(0): Printing DDC gathered Modelines:
>[203599.897] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[203599.897] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[203599.897] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[203599.897] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[203599.897] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[203599.897] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[203599.897] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[203599.897] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[203599.897] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[203599.897] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[203599.897] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[203599.897] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[203620.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[203620.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[203635.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[203635.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[203650.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde310]
>[203650.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde310] width 1920 pitch 7680 (/4 1920)
>[203665.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[203665.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[203680.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[203680.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[203695.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d70]
>[203695.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d70] width 1920 pitch 7680 (/4 1920)
>[203785.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[203785.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[203800.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04c00]
>[203800.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04c00] width 1920 pitch 7680 (/4 1920)
>[203815.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[203815.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[203830.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[203830.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[203905.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d90]
>[203905.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d90] width 1920 pitch 7680 (/4 1920)
>[203920.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[203920.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[204010.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ceb0]
>[204010.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ceb0] width 1920 pitch 7680 (/4 1920)
>[204025.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[204025.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[204055.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2b60]
>[204055.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2b60] width 1920 pitch 7680 (/4 1920)
>[204085.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[204085.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[204205.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[204205.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[204220.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1f50]
>[204220.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1f50] width 1920 pitch 7680 (/4 1920)
>[204370.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[204370.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[204400.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d50]
>[204400.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d50] width 1920 pitch 7680 (/4 1920)
>[204610.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[204610.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[204655.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[204655.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[204700.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[204700.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[204715.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[204715.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[204775.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[204775.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[204790.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[204790.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[204850.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[204850.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[204865.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[204865.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[204880.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[204880.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[204895.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[204895.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[204940.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3eb80]
>[204940.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3eb80] width 1920 pitch 7680 (/4 1920)
>[204955.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a040]
>[204955.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a040] width 1920 pitch 7680 (/4 1920)
>[204985.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[204985.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205015.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205015.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205030.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205030.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205045.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e6880]
>[205045.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e6880] width 1920 pitch 7680 (/4 1920)
>[205060.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205060.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205075.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e6880]
>[205075.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e6880] width 1920 pitch 7680 (/4 1920)
>[205120.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205120.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205135.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04dd0]
>[205135.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04dd0] width 1920 pitch 7680 (/4 1920)
>[205150.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205150.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205165.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[205165.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[205195.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[205195.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[205210.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205210.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205225.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[205225.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[205240.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[205240.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[205285.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[205285.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[205315.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205315.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205330.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205330.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205345.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04dd0]
>[205345.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04dd0] width 1920 pitch 7680 (/4 1920)
>[205375.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205375.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205390.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205390.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205405.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205405.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205420.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205420.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205450.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205450.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205465.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3eb80]
>[205465.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3eb80] width 1920 pitch 7680 (/4 1920)
>[205495.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[205495.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[205510.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d50]
>[205510.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d50] width 1920 pitch 7680 (/4 1920)
>[205540.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d50]
>[205540.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d50] width 1920 pitch 7680 (/4 1920)
>[205555.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205555.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205570.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205570.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205585.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205585.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205600.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205600.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205615.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2ba0]
>[205615.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2ba0] width 1920 pitch 7680 (/4 1920)
>[205630.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205630.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205645.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d50]
>[205645.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d50] width 1920 pitch 7680 (/4 1920)
>[205660.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d50]
>[205660.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d50] width 1920 pitch 7680 (/4 1920)
>[205675.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ceb0]
>[205675.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ceb0] width 1920 pitch 7680 (/4 1920)
>[205690.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205690.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205705.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205705.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205720.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[205720.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[205735.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205735.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205750.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205750.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205765.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[205765.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[205780.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205780.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205810.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[205810.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[205825.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[205825.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[205840.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205840.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205855.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205855.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205870.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205870.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205885.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[205885.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[205900.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205900.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205915.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[205915.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[205930.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205930.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205945.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205945.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205960.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[205960.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[205990.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2ba0]
>[205990.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2ba0] width 1920 pitch 7680 (/4 1920)
>[206005.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[206005.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[206020.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04d50]
>[206020.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04d50] width 1920 pitch 7680 (/4 1920)
>[206035.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[206035.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[206050.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206050.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206065.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206065.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206095.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[206095.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[206110.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206110.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206125.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1f10]
>[206125.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1f10] width 1920 pitch 7680 (/4 1920)
>[206170.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1f10]
>[206170.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1f10] width 1920 pitch 7680 (/4 1920)
>[206185.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206185.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206200.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[206200.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[206260.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1f10]
>[206260.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1f10] width 1920 pitch 7680 (/4 1920)
>[206290.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1f10]
>[206290.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1f10] width 1920 pitch 7680 (/4 1920)
>[206380.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[206380.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[206395.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[206395.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[206455.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04c00]
>[206455.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04c00] width 1920 pitch 7680 (/4 1920)
>[206515.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3eb80]
>[206515.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3eb80] width 1920 pitch 7680 (/4 1920)
>[206530.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[206530.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[206545.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[206545.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[206560.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206560.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206590.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206590.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206605.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[206605.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[206695.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1ed0]
>[206695.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1ed0] width 1920 pitch 7680 (/4 1920)
>[206710.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206710.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206905.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[206905.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[206920.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[206920.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[206965.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[206965.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[206980.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[206980.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[207010.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[207010.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[207025.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[207025.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[207040.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[207040.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[207055.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d1f50]
>[207055.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d1f50] width 1920 pitch 7680 (/4 1920)
>[207085.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e6900]
>[207085.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e6900] width 1920 pitch 7680 (/4 1920)
>[207115.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[207115.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[207235.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[207235.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[207250.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[207250.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[207340.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[207340.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[207355.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[207355.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[207490.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[207490.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[207535.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[207535.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[207655.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[207655.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[207670.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04b80]
>[207670.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04b80] width 1920 pitch 7680 (/4 1920)
>[207700.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85200]
>[207700.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85200] width 1920 pitch 7680 (/4 1920)
>[207745.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2b40]
>[207745.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2b40] width 1920 pitch 7680 (/4 1920)
>[207760.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[207760.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[207775.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[207775.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[207805.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfd3b0]
>[207805.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfd3b0] width 1920 pitch 7680 (/4 1920)
>[207820.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[207820.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[207850.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[207850.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[207865.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7a080]
>[207865.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7a080] width 1920 pitch 7680 (/4 1920)
>[207895.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c959b0]
>[207895.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c959b0] width 1920 pitch 7680 (/4 1920)
>[207910.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04dd0]
>[207910.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04dd0] width 1920 pitch 7680 (/4 1920)
>[207918.837] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[207918.837] (II) RADEON(0): Using hsync ranges from config file
>[207918.837] (II) RADEON(0): Using vrefresh ranges from config file
>[207918.837] (II) RADEON(0): Printing DDC gathered Modelines:
>[207918.837] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[207918.837] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[207918.837] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[207918.837] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[207918.837] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[207918.837] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[207918.837] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[207918.837] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[207918.837] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[207918.837] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[207918.837] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[207918.837] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[207918.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[207918.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[207918.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207918.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207918.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[207918.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[207918.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207918.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207918.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[207918.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[207918.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207918.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207918.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[207919.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[207919.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207919.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207919.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[207919.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[207919.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207919.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207919.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207919.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207919.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207919.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207919.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207919.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207919.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207919.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207919.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207919.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207919.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede020]
>[207919.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede020] width 1920 pitch 7680 (/4 1920)
>[207919.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207919.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207919.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207919.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207919.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207919.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207919.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207920.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207920.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207920.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207920.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207920.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207920.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207920.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207920.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207920.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207920.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207920.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207920.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207920.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207920.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207920.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207920.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[207920.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[207920.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207920.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207925.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94ec0]
>[207925.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94ec0] width 1920 pitch 7680 (/4 1920)
>[207925.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[207925.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[207925.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207925.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207925.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[207925.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[207925.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207925.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207925.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[207925.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[207925.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207926.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207926.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[207926.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[207926.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207926.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207926.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[207926.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[207926.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207926.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207926.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[207926.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[207926.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207926.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207927.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[207927.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[207927.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[207927.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[207927.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[207927.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[207927.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5cb40]
>[207927.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5cb40] width 1920 pitch 7680 (/4 1920)
>[207927.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[207927.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[207927.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5cb40]
>[207927.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5cb40] width 1920 pitch 7680 (/4 1920)
>[207927.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[207927.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[207927.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5cb40]
>[207927.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5cb40] width 1920 pitch 7680 (/4 1920)
>[207927.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[207927.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[207940.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d558b0]
>[207940.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d558b0] width 1920 pitch 7680 (/4 1920)
>[207940.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2bae0]
>[207940.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2bae0] width 1920 pitch 7680 (/4 1920)
>[207940.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366910]
>[207940.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366910] width 1920 pitch 7680 (/4 1920)
>[207940.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[207940.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[207955.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1120]
>[207955.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1120] width 1920 pitch 7680 (/4 1920)
>[207960.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aba1e0]
>[207960.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aba1e0] width 1920 pitch 7680 (/4 1920)
>[208000.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a52360]
>[208000.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a52360] width 1920 pitch 7680 (/4 1920)
>[208015.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb14a0]
>[208015.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb14a0] width 1920 pitch 7680 (/4 1920)
>[208030.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068290]
>[208030.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068290] width 1920 pitch 7680 (/4 1920)
>[208045.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86ca0]
>[208045.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86ca0] width 1920 pitch 7680 (/4 1920)
>[208048.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208048.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208048.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208048.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0fb0]
>[208048.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0fb0] width 1920 pitch 7680 (/4 1920)
>[208049.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a180]
>[208049.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a180] width 1920 pitch 7680 (/4 1920)
>[208049.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208049.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208049.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a180]
>[208049.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a180] width 1920 pitch 7680 (/4 1920)
>[208049.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208049.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208049.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a180]
>[208049.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a180] width 1920 pitch 7680 (/4 1920)
>[208049.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208049.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208049.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a180]
>[208049.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a180] width 1920 pitch 7680 (/4 1920)
>[208049.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a498e0]
>[208049.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a498e0] width 1920 pitch 7680 (/4 1920)
>[208049.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a180]
>[208049.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a180] width 1920 pitch 7680 (/4 1920)
>[208049.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a498e0]
>[208049.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a498e0] width 1920 pitch 7680 (/4 1920)
>[208049.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208049.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208049.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a498e0]
>[208049.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a498e0] width 1920 pitch 7680 (/4 1920)
>[208049.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208049.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208049.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208049.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208049.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208049.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208049.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208049.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208050.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fc820]
>[208050.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fc820] width 1920 pitch 7680 (/4 1920)
>[208050.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff740]
>[208050.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff740] width 1920 pitch 7680 (/4 1920)
>[208050.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208050.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208050.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208050.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208050.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ead0d0]
>[208050.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ead0d0] width 1920 pitch 7680 (/4 1920)
>[208050.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[208050.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[208050.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208050.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208050.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208050.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208050.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208050.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208050.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208050.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208050.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208050.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208050.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208050.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208050.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208050.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208050.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208050.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208050.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208050.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208050.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208050.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208051.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208051.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208051.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c890]
>[208051.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c890] width 1920 pitch 7680 (/4 1920)
>[208051.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c7b0]
>[208051.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c7b0] width 1920 pitch 7680 (/4 1920)
>[208064.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede190]
>[208064.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede190] width 1920 pitch 7680 (/4 1920)
>[208064.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede190]
>[208064.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede190] width 1920 pitch 7680 (/4 1920)
>[208064.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede190]
>[208064.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede190] width 1920 pitch 7680 (/4 1920)
>[208064.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[208064.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[208064.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7cd0]
>[208064.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7cd0] width 1920 pitch 7680 (/4 1920)
>[208064.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7cd0]
>[208064.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7cd0] width 1920 pitch 7680 (/4 1920)
>[208064.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7cd0]
>[208064.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7cd0] width 1920 pitch 7680 (/4 1920)
>[208064.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208064.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208064.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208064.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208064.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208065.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208065.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208065.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2ae0]
>[208065.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2ae0] width 1920 pitch 7680 (/4 1920)
>[208065.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff740]
>[208065.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff740] width 1920 pitch 7680 (/4 1920)
>[208065.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[208065.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[208065.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208065.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208065.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208065.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208065.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208065.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208065.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208065.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208065.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[208065.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[208065.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88030]
>[208065.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88030] width 1920 pitch 7680 (/4 1920)
>[208065.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208065.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208065.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfa60]
>[208065.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfa60] width 1920 pitch 7680 (/4 1920)
>[208066.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56d00]
>[208066.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56d00] width 1920 pitch 7680 (/4 1920)
>[208066.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56ce0]
>[208066.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56ce0] width 1920 pitch 7680 (/4 1920)
>[208078.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51760]
>[208078.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51760] width 1920 pitch 7680 (/4 1920)
>[208078.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df88b0]
>[208078.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df88b0] width 1920 pitch 7680 (/4 1920)
>[208078.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208078.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208079.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f09d0]
>[208079.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f09d0] width 1920 pitch 7680 (/4 1920)
>[208079.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f70]
>[208079.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f70] width 1920 pitch 7680 (/4 1920)
>[208083.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208083.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208083.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208083.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208083.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f4d0]
>[208083.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f4d0] width 1920 pitch 7680 (/4 1920)
>[208083.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2ae0]
>[208083.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2ae0] width 1920 pitch 7680 (/4 1920)
>[208117.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208117.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208117.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208117.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208117.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2ae0]
>[208117.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2ae0] width 1920 pitch 7680 (/4 1920)
>[208117.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208117.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208135.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208135.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208137.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1190]
>[208137.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1190] width 1920 pitch 7680 (/4 1920)
>[208138.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256aa10]
>[208138.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256aa10] width 1920 pitch 7680 (/4 1920)
>[208138.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92320]
>[208138.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92320] width 1920 pitch 7680 (/4 1920)
>[208150.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2f10]
>[208150.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2f10] width 1920 pitch 7680 (/4 1920)
>[208158.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2130]
>[208158.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2130] width 1920 pitch 7680 (/4 1920)
>[208165.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b2ac0]
>[208165.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b2ac0] width 1920 pitch 7680 (/4 1920)
>[208165.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208165.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208165.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b2ac0]
>[208165.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b2ac0] width 1920 pitch 7680 (/4 1920)
>[208165.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208165.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208165.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b2ac0]
>[208165.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b2ac0] width 1920 pitch 7680 (/4 1920)
>[208165.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208165.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208165.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b2ac0]
>[208165.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b2ac0] width 1920 pitch 7680 (/4 1920)
>[208165.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208166.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208166.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208166.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208166.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc2ae0]
>[208166.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc2ae0] width 1920 pitch 7680 (/4 1920)
>[208166.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208166.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208166.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208166.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208166.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1190]
>[208166.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1190] width 1920 pitch 7680 (/4 1920)
>[208166.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393d750]
>[208166.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393d750] width 1920 pitch 7680 (/4 1920)
>[208166.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208166.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208166.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208166.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208166.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208166.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208167.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1190]
>[208167.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1190] width 1920 pitch 7680 (/4 1920)
>[208167.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4e280]
>[208167.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4e280] width 1920 pitch 7680 (/4 1920)
>[208167.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208167.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208167.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402adc0]
>[208167.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402adc0] width 1920 pitch 7680 (/4 1920)
>[208167.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208167.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208167.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1190]
>[208167.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1190] width 1920 pitch 7680 (/4 1920)
>[208167.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393d750]
>[208167.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393d750] width 1920 pitch 7680 (/4 1920)
>[208167.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f387d0]
>[208167.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f387d0] width 1920 pitch 7680 (/4 1920)
>[208167.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208167.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208167.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f387d0]
>[208167.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f387d0] width 1920 pitch 7680 (/4 1920)
>[208167.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208167.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208167.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f387d0]
>[208167.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f387d0] width 1920 pitch 7680 (/4 1920)
>[208167.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208167.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208167.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208167.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208167.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402adc0]
>[208167.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402adc0] width 1920 pitch 7680 (/4 1920)
>[208167.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208167.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208167.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208167.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208170.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208170.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208170.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92080]
>[208170.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92080] width 1920 pitch 7680 (/4 1920)
>[208170.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208170.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208170.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208170.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208174.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208174.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208174.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208175.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208175.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1190]
>[208175.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1190] width 1920 pitch 7680 (/4 1920)
>[208175.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208175.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208192.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208192.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208193.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402adc0]
>[208193.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402adc0] width 1920 pitch 7680 (/4 1920)
>[208193.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208193.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208193.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402adc0]
>[208193.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402adc0] width 1920 pitch 7680 (/4 1920)
>[208213.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208213.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208213.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82480]
>[208213.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82480] width 1920 pitch 7680 (/4 1920)
>[208213.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3109490]
>[208213.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3109490] width 1920 pitch 7680 (/4 1920)
>[208233.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6d9f0]
>[208233.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6d9f0] width 1920 pitch 7680 (/4 1920)
>[208345.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0bbb0]
>[208345.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0bbb0] width 1920 pitch 7680 (/4 1920)
>[208360.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d219b0]
>[208360.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d219b0] width 1920 pitch 7680 (/4 1920)
>[208375.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea85a0]
>[208375.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea85a0] width 1920 pitch 7680 (/4 1920)
>[208390.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31173e0]
>[208390.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31173e0] width 1920 pitch 7680 (/4 1920)
>[208405.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e7240]
>[208405.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e7240] width 1920 pitch 7680 (/4 1920)
>[208420.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e8250]
>[208420.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e8250] width 1920 pitch 7680 (/4 1920)
>[208465.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1e650]
>[208465.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1e650] width 1920 pitch 7680 (/4 1920)
>[208480.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1cfb0]
>[208480.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1cfb0] width 1920 pitch 7680 (/4 1920)
>[208510.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5f410]
>[208510.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5f410] width 1920 pitch 7680 (/4 1920)
>[208525.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd1950]
>[208525.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd1950] width 1920 pitch 7680 (/4 1920)
>[208540.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a61270]
>[208540.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a61270] width 1920 pitch 7680 (/4 1920)
>[208555.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd2790]
>[208555.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd2790] width 1920 pitch 7680 (/4 1920)
>[208566.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17ad0]
>[208566.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17ad0] width 1920 pitch 7680 (/4 1920)
>[208566.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17a10]
>[208566.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17a10] width 1920 pitch 7680 (/4 1920)
>[208566.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17ad0]
>[208566.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17ad0] width 1920 pitch 7680 (/4 1920)
>[208566.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17a10]
>[208566.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17a10] width 1920 pitch 7680 (/4 1920)
>[208566.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17ad0]
>[208566.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17ad0] width 1920 pitch 7680 (/4 1920)
>[208566.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17a10]
>[208566.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17a10] width 1920 pitch 7680 (/4 1920)
>[208566.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17ad0]
>[208566.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17ad0] width 1920 pitch 7680 (/4 1920)
>[208566.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c17a10]
>[208566.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c17a10] width 1920 pitch 7680 (/4 1920)
>[208566.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208566.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208566.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbc230]
>[208566.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbc230] width 1920 pitch 7680 (/4 1920)
>[208566.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208566.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208566.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208566.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208566.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208567.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208567.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208567.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208567.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208567.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208567.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208567.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208567.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208567.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208568.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb0e10]
>[208568.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb0e10] width 1920 pitch 7680 (/4 1920)
>[208568.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208568.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208568.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208568.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208568.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208568.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208568.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208568.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208568.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208568.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208568.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208568.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208568.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208568.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208568.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208568.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208568.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208568.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208568.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208568.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208568.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208568.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208568.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208568.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208568.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208568.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208568.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208568.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208570.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208570.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208570.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208570.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208570.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208570.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208570.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208570.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208572.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208572.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208572.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13f50]
>[208572.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13f50] width 1920 pitch 7680 (/4 1920)
>[208572.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13f50]
>[208572.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13f50] width 1920 pitch 7680 (/4 1920)
>[208670.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[208670.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[208670.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca4a0]
>[208670.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca4a0] width 1920 pitch 7680 (/4 1920)
>[208670.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[208670.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[208670.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca4a0]
>[208670.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca4a0] width 1920 pitch 7680 (/4 1920)
>[208670.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[208670.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[208670.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca4a0]
>[208670.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca4a0] width 1920 pitch 7680 (/4 1920)
>[208670.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[208670.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[208670.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca4a0]
>[208670.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca4a0] width 1920 pitch 7680 (/4 1920)
>[208670.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[208670.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[208670.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e330]
>[208670.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e330] width 1920 pitch 7680 (/4 1920)
>[208670.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[208670.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[208670.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e330]
>[208670.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e330] width 1920 pitch 7680 (/4 1920)
>[208670.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208670.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208670.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e330]
>[208670.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e330] width 1920 pitch 7680 (/4 1920)
>[208670.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208670.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208670.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3db20]
>[208670.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3db20] width 1920 pitch 7680 (/4 1920)
>[208670.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208670.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208671.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26c60]
>[208671.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26c60] width 1920 pitch 7680 (/4 1920)
>[208671.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3db20]
>[208671.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3db20] width 1920 pitch 7680 (/4 1920)
>[208671.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208671.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208671.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4d50]
>[208671.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4d50] width 1920 pitch 7680 (/4 1920)
>[208671.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[208671.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[208671.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208671.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208671.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208671.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208671.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208671.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208671.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208671.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208671.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208671.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208671.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208671.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208671.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208671.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208671.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208671.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208671.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208671.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208671.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208671.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208671.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2caee20]
>[208671.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2caee20] width 1920 pitch 7680 (/4 1920)
>[208673.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208673.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208673.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208673.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208673.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b28830]
>[208673.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b28830] width 1920 pitch 7680 (/4 1920)
>[208673.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[208673.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[208676.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208676.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208676.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb26d0]
>[208676.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb26d0] width 1920 pitch 7680 (/4 1920)
>[208676.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208676.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208676.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[208676.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[208684.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b3d0]
>[208684.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b3d0] width 1920 pitch 7680 (/4 1920)
>[208684.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a7e0]
>[208684.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a7e0] width 1920 pitch 7680 (/4 1920)
>[208684.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee270]
>[208684.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee270] width 1920 pitch 7680 (/4 1920)
>[208688.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee270]
>[208688.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee270] width 1920 pitch 7680 (/4 1920)
>[208720.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08370]
>[208720.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08370] width 1920 pitch 7680 (/4 1920)
>[208726.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08280]
>[208726.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08280] width 1920 pitch 7680 (/4 1920)
>[208731.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70710]
>[208731.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70710] width 1920 pitch 7680 (/4 1920)
>[208731.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03d30]
>[208731.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03d30] width 1920 pitch 7680 (/4 1920)
>[208731.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[208731.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[208731.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[208731.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[208732.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[208732.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[208733.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[208733.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[208733.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b072e0]
>[208733.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b072e0] width 1920 pitch 7680 (/4 1920)
>[208733.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40365a0]
>[208733.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40365a0] width 1920 pitch 7680 (/4 1920)
>[208735.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f32d70]
>[208735.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f32d70] width 1920 pitch 7680 (/4 1920)
>[208739.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[208739.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[208740.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4deb0]
>[208740.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4deb0] width 1920 pitch 7680 (/4 1920)
>[208740.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[208740.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[208740.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[208740.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[208740.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[208740.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[208740.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff96e0]
>[208740.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff96e0] width 1920 pitch 7680 (/4 1920)
>[208740.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff96e0]
>[208740.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff96e0] width 1920 pitch 7680 (/4 1920)
>[208740.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff96e0]
>[208741.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff96e0] width 1920 pitch 7680 (/4 1920)
>[208743.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ea780]
>[208743.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ea780] width 1920 pitch 7680 (/4 1920)
>[208744.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b068f0]
>[208744.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b068f0] width 1920 pitch 7680 (/4 1920)
>[208744.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965f80]
>[208744.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965f80] width 1920 pitch 7680 (/4 1920)
>[208744.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6bd0]
>[208744.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6bd0] width 1920 pitch 7680 (/4 1920)
>[208745.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7210]
>[208745.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7210] width 1920 pitch 7680 (/4 1920)
>[208745.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ea780]
>[208745.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ea780] width 1920 pitch 7680 (/4 1920)
>[208745.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9e70]
>[208745.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9e70] width 1920 pitch 7680 (/4 1920)
>[208745.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f200a0]
>[208745.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f200a0] width 1920 pitch 7680 (/4 1920)
>[208749.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9e70]
>[208749.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9e70] width 1920 pitch 7680 (/4 1920)
>[208750.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f13a20]
>[208750.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f13a20] width 1920 pitch 7680 (/4 1920)
>[208750.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[208750.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[208750.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9e70]
>[208750.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9e70] width 1920 pitch 7680 (/4 1920)
>[208751.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6210]
>[208751.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6210] width 1920 pitch 7680 (/4 1920)
>[208751.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562f60]
>[208751.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562f60] width 1920 pitch 7680 (/4 1920)
>[208751.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[208751.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[208751.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[208751.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[208765.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[208765.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[208780.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc1de0]
>[208780.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc1de0] width 1920 pitch 7680 (/4 1920)
>[208788.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced8c0]
>[208788.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced8c0] width 1920 pitch 7680 (/4 1920)
>[208788.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208788.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208788.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[208788.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[208788.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208788.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208788.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[208788.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[208788.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208788.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208788.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[208788.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[208788.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208788.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208788.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[208788.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[208788.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208788.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208788.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[208788.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[208788.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208788.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208789.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[208789.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[208789.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[208789.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[208789.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[208789.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[208789.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30633d0]
>[208789.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30633d0] width 1920 pitch 7680 (/4 1920)
>[208789.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[208789.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[208789.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30633d0]
>[208789.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30633d0] width 1920 pitch 7680 (/4 1920)
>[208789.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[208789.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[208789.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30633d0]
>[208789.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30633d0] width 1920 pitch 7680 (/4 1920)
>[208789.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f4920]
>[208789.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f4920] width 1920 pitch 7680 (/4 1920)
>[208789.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9f80]
>[208789.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9f80] width 1920 pitch 7680 (/4 1920)
>[208790.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11ea0]
>[208790.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11ea0] width 1920 pitch 7680 (/4 1920)
>[208790.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53280]
>[208790.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53280] width 1920 pitch 7680 (/4 1920)
>[208790.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b760]
>[208790.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b760] width 1920 pitch 7680 (/4 1920)
>[208790.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25244a0]
>[208790.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25244a0] width 1920 pitch 7680 (/4 1920)
>[208790.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[208790.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[208791.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[208791.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[208791.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[208791.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[208791.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[208791.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[208791.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[208791.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[208791.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[208791.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[208791.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[208791.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[208791.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[208791.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[208791.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[208791.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[208791.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[208791.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[208792.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[208792.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[208792.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[208792.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[208792.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[208792.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[208792.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40299d0]
>[208792.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40299d0] width 1920 pitch 7680 (/4 1920)
>[208792.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[208792.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[208792.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40299d0]
>[208792.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40299d0] width 1920 pitch 7680 (/4 1920)
>[208792.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[208792.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[208792.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40299d0]
>[208792.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40299d0] width 1920 pitch 7680 (/4 1920)
>[208792.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30758d0]
>[208792.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30758d0] width 1920 pitch 7680 (/4 1920)
>[208792.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332820]
>[208792.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332820] width 1920 pitch 7680 (/4 1920)
>[208792.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30758d0]
>[208792.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30758d0] width 1920 pitch 7680 (/4 1920)
>[208792.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11ea0]
>[208792.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11ea0] width 1920 pitch 7680 (/4 1920)
>[208825.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e1980]
>[208825.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e1980] width 1920 pitch 7680 (/4 1920)
>[208840.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03840]
>[208840.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03840] width 1920 pitch 7680 (/4 1920)
>[209050.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e1980]
>[209050.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e1980] width 1920 pitch 7680 (/4 1920)
>[209065.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03840]
>[209065.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03840] width 1920 pitch 7680 (/4 1920)
>[209260.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e1980]
>[209260.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e1980] width 1920 pitch 7680 (/4 1920)
>[209290.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03840]
>[209290.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03840] width 1920 pitch 7680 (/4 1920)
>[209302.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6010]
>[209302.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6010] width 1920 pitch 7680 (/4 1920)
>[209302.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a930]
>[209302.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a930] width 1920 pitch 7680 (/4 1920)
>[209302.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558470]
>[209302.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558470] width 1920 pitch 7680 (/4 1920)
>[209302.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[209302.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[209320.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209320.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209335.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30758d0]
>[209335.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30758d0] width 1920 pitch 7680 (/4 1920)
>[209425.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[209425.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[209440.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cedc30]
>[209440.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cedc30] width 1920 pitch 7680 (/4 1920)
>[209470.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332820]
>[209470.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332820] width 1920 pitch 7680 (/4 1920)
>[209485.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cedc30]
>[209485.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cedc30] width 1920 pitch 7680 (/4 1920)
>[209590.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332820]
>[209590.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332820] width 1920 pitch 7680 (/4 1920)
>[209620.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cedc30]
>[209620.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cedc30] width 1920 pitch 7680 (/4 1920)
>[209650.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2332820]
>[209650.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2332820] width 1920 pitch 7680 (/4 1920)
>[209665.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cedc30]
>[209665.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cedc30] width 1920 pitch 7680 (/4 1920)
>[209684.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[209684.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[209684.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b140]
>[209684.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b140] width 1920 pitch 7680 (/4 1920)
>[209684.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[209684.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[209684.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[209684.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[209684.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[209684.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[209684.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[209684.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[209684.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[209684.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[209684.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[209684.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[209684.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[209684.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[209684.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[209684.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[209684.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[209684.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[209684.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[209684.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[209685.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[209685.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[209685.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209685.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209685.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[209685.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[209686.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209686.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209690.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[209690.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[209690.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209690.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209690.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[209690.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[209692.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209692.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209692.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209692.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209692.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209692.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209692.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209692.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209692.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209692.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209692.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209692.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209692.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209692.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209692.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209692.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209692.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209692.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209692.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[209692.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[209694.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209694.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209694.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209694.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209694.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209694.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209694.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209694.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209694.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209694.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209694.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209694.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209694.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209694.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209694.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209694.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209694.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209694.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209694.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209694.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209695.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209695.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209695.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209695.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209695.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209695.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209695.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209695.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209695.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209695.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209695.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[209695.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[209696.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209696.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209696.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[209696.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[209696.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[209696.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[209696.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[209696.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[209696.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[209696.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[209696.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[209696.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[209696.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[209696.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[209696.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[209696.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[209696.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0eef0]
>[209696.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0eef0] width 1920 pitch 7680 (/4 1920)
>[209740.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528e20]
>[209740.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528e20] width 1920 pitch 7680 (/4 1920)
>[209770.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481470]
>[209770.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481470] width 1920 pitch 7680 (/4 1920)
>[209875.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[209875.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[209882.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39620]
>[209882.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39620] width 1920 pitch 7680 (/4 1920)
>[209883.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931160]
>[209883.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931160] width 1920 pitch 7680 (/4 1920)
>[209883.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf86e0]
>[209883.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf86e0] width 1920 pitch 7680 (/4 1920)
>[209890.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd3d10]
>[209890.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd3d10] width 1920 pitch 7680 (/4 1920)
>[209899.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[209899.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[209899.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[209899.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[209899.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[209899.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[209899.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[209899.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[209899.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[209899.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[209899.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[209899.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[209899.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b6f0]
>[209899.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b6f0] width 1920 pitch 7680 (/4 1920)
>[209899.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209899.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[209899.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[209899.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c48f90]
>[209899.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c48f90] width 1920 pitch 7680 (/4 1920)
>[209900.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[209900.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[209900.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536530]
>[209900.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536530] width 1920 pitch 7680 (/4 1920)
>[209900.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[209900.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[209900.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a920]
>[209900.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a920] width 1920 pitch 7680 (/4 1920)
>[209900.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[209900.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[209900.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[209900.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[209900.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b3d0]
>[209900.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b3d0] width 1920 pitch 7680 (/4 1920)
>[209900.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a000]
>[209900.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a000] width 1920 pitch 7680 (/4 1920)
>[209900.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56460]
>[209900.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56460] width 1920 pitch 7680 (/4 1920)
>[209900.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a000]
>[209900.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a000] width 1920 pitch 7680 (/4 1920)
>[209900.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56460]
>[209900.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56460] width 1920 pitch 7680 (/4 1920)
>[209900.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a000]
>[209900.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a000] width 1920 pitch 7680 (/4 1920)
>[209900.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56460]
>[209900.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56460] width 1920 pitch 7680 (/4 1920)
>[209900.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a000]
>[209900.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a000] width 1920 pitch 7680 (/4 1920)
>[209900.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56460]
>[209900.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56460] width 1920 pitch 7680 (/4 1920)
>[209900.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a000]
>[209900.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a000] width 1920 pitch 7680 (/4 1920)
>[209900.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56460]
>[209900.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56460] width 1920 pitch 7680 (/4 1920)
>[209909.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[209909.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[209909.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a800]
>[209909.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a800] width 1920 pitch 7680 (/4 1920)
>[209909.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05980]
>[209909.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05980] width 1920 pitch 7680 (/4 1920)
>[209914.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feda00]
>[209914.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feda00] width 1920 pitch 7680 (/4 1920)
>[209914.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feda00]
>[209914.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feda00] width 1920 pitch 7680 (/4 1920)
>[209914.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feda00]
>[209914.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feda00] width 1920 pitch 7680 (/4 1920)
>[209914.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[209914.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[209914.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[209914.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[209914.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[209914.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[209914.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[209914.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[209914.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209914.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[209914.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[209914.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209914.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209949.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528e20]
>[209949.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528e20] width 1920 pitch 7680 (/4 1920)
>[209949.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536530]
>[209949.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536530] width 1920 pitch 7680 (/4 1920)
>[209949.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11ea0]
>[209949.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11ea0] width 1920 pitch 7680 (/4 1920)
>[209949.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[209949.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[209949.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b140]
>[209949.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b140] width 1920 pitch 7680 (/4 1920)
>[209949.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[209949.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[209949.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba8410]
>[209949.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba8410] width 1920 pitch 7680 (/4 1920)
>[209949.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[209950.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[209950.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba8410]
>[209950.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba8410] width 1920 pitch 7680 (/4 1920)
>[209950.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[209950.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[209950.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba8410]
>[209950.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba8410] width 1920 pitch 7680 (/4 1920)
>[209950.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[209950.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[209950.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba8410]
>[209950.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba8410] width 1920 pitch 7680 (/4 1920)
>[209950.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd7b0]
>[209950.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd7b0] width 1920 pitch 7680 (/4 1920)
>[209961.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256f950]
>[209961.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256f950] width 1920 pitch 7680 (/4 1920)
>[209961.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d980]
>[209961.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d980] width 1920 pitch 7680 (/4 1920)
>[209961.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d980]
>[209961.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d980] width 1920 pitch 7680 (/4 1920)
>[209965.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[209965.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[209965.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209965.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209965.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[209965.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[209965.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209965.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209965.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[209965.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[209965.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209965.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209965.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[209965.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[209965.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8b420]
>[209965.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8b420] width 1920 pitch 7680 (/4 1920)
>[209965.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[209965.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[209965.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a38e90]
>[209965.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a38e90] width 1920 pitch 7680 (/4 1920)
>[209965.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[209965.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[209965.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[209965.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[209965.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[209965.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[209965.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[209965.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[209965.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[209965.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[209965.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[209965.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[209965.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24656c0]
>[209965.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24656c0] width 1920 pitch 7680 (/4 1920)
>[209967.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[209967.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[209967.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f152b0]
>[209967.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f152b0] width 1920 pitch 7680 (/4 1920)
>[209967.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[209967.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[209967.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[209967.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[209967.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9f80]
>[209967.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9f80] width 1920 pitch 7680 (/4 1920)
>[209967.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[209967.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[209967.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209967.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209967.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[209967.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[209967.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209967.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209967.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[209967.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[209967.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209967.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209967.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[209967.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[209967.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209967.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209967.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[209967.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[209967.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[209967.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[209967.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[209967.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[210190.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210190.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210190.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210190.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210190.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210190.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210190.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210190.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210190.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210190.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210190.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210190.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210190.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210190.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210190.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210190.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210190.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210190.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210190.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210190.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210191.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210191.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210191.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210191.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210192.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210192.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210192.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210192.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210192.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210192.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210192.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210192.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210192.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210192.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210192.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210192.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210192.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210192.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210192.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210192.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210192.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210192.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210192.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210192.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210192.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[210192.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[210192.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[210192.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[210193.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[210193.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[210193.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210193.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210193.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210193.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210193.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210193.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210193.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210193.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210193.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210193.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210193.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210193.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210193.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210193.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210194.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210194.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210194.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210194.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210205.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[210205.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[210220.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[210220.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[210223.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed61c0]
>[210223.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed61c0] width 1920 pitch 7680 (/4 1920)
>[210261.890] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[210261.890] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[210261.890] (II) UnloadModule: "evdev"
>[210310.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2548b30]
>[210310.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2548b30] width 1920 pitch 7680 (/4 1920)
>[210325.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fcc0]
>[210325.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fcc0] width 1920 pitch 7680 (/4 1920)
>[210355.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6010]
>[210355.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6010] width 1920 pitch 7680 (/4 1920)
>[210385.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cd7b0]
>[210385.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cd7b0] width 1920 pitch 7680 (/4 1920)
>[210400.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6010]
>[210400.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6010] width 1920 pitch 7680 (/4 1920)
>[210415.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[210415.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[210475.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba8410]
>[210475.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba8410] width 1920 pitch 7680 (/4 1920)
>[210490.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[210490.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[210580.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[210580.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[210583.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aea5f0]
>[210583.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aea5f0] width 1920 pitch 7680 (/4 1920)
>[210595.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[210595.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[210685.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[210685.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[210700.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24656c0]
>[210700.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24656c0] width 1920 pitch 7680 (/4 1920)
>[210820.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b3d0]
>[210820.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b3d0] width 1920 pitch 7680 (/4 1920)
>[210835.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc1de0]
>[210835.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc1de0] width 1920 pitch 7680 (/4 1920)
>[210861.475] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[210861.475] (II) RADEON(0): Using hsync ranges from config file
>[210861.475] (II) RADEON(0): Using vrefresh ranges from config file
>[210861.475] (II) RADEON(0): Printing DDC gathered Modelines:
>[210861.475] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[210861.475] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[210861.475] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[210861.475] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[210861.475] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[210861.475] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[210861.475] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[210861.475] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[210861.475] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[210861.475] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[210861.475] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[210861.475] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[210951.673] (II) RADEON(0): RADEONSaveScreen(2)
>[210951.673] (II) RADEON(0): RADEONSaveScreen(0)
>[244159.273] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[244159.273] (II) No input driver specified, ignoring this device.
>[244159.273] (II) This device may have been added with another device file.
>[244159.273] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[244159.273] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[244159.273] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[244159.273] 	Option "XkbRules" "evdev"
>[244159.273] 	Option "XkbModel" "evdev"
>[244159.273] 	Option "XkbLayout" "us"
>[244159.273] 	Option "_source" "server/udev"
>[244159.273] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[244159.273] 	Option "path" "/dev/input/event14"
>[244159.273] 	Option "device" "/dev/input/event14"
>[244159.273] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input36/event14"
>[244159.273] 	Option "driver" "evdev"
>[244159.273] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[244159.273] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[244159.273] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[244159.273] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[244159.273] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[244159.273] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[244159.273] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[244159.273] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[244159.273] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[244159.273] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[244159.273] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[244159.273] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input36/event14"
>[244159.273] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[244159.273] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[244159.273] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[244159.273] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[244159.273] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[244159.273] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[244159.292] (II) RADEON(0): RADEONSaveScreen(1)
>[244162.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244162.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244170.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244170.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244170.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244170.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244170.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244170.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244170.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244170.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244170.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244170.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244170.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244170.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244170.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244170.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244170.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244170.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244170.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244170.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244171.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244171.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244171.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244171.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244171.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244171.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244171.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244171.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244171.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244171.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244171.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244171.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244171.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244171.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244171.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244171.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244171.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244171.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244171.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244172.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244172.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[244172.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[244172.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244172.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244172.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[244172.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[244172.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[244172.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[244172.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[244172.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[244172.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[244172.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[244172.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9f80]
>[244172.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9f80] width 1920 pitch 7680 (/4 1920)
>[244172.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[244172.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[244172.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524960]
>[244172.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524960] width 1920 pitch 7680 (/4 1920)
>[244172.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[244172.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[244174.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70c40]
>[244174.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70c40] width 1920 pitch 7680 (/4 1920)
>[244174.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40182d0]
>[244174.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40182d0] width 1920 pitch 7680 (/4 1920)
>[244174.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70c40]
>[244174.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70c40] width 1920 pitch 7680 (/4 1920)
>[244174.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40182d0]
>[244174.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40182d0] width 1920 pitch 7680 (/4 1920)
>[244174.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70c40]
>[244174.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70c40] width 1920 pitch 7680 (/4 1920)
>[244174.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40182d0]
>[244174.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40182d0] width 1920 pitch 7680 (/4 1920)
>[244174.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4039e60]
>[244174.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4039e60] width 1920 pitch 7680 (/4 1920)
>[244189.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b98e30]
>[244189.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b98e30] width 1920 pitch 7680 (/4 1920)
>[244194.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3162230]
>[244194.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3162230] width 1920 pitch 7680 (/4 1920)
>[244201.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b5c0]
>[244201.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b5c0] width 1920 pitch 7680 (/4 1920)
>[244201.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e23b0]
>[244201.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e23b0] width 1920 pitch 7680 (/4 1920)
>[244201.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82830]
>[244201.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82830] width 1920 pitch 7680 (/4 1920)
>[244201.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82830]
>[244201.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82830] width 1920 pitch 7680 (/4 1920)
>[244201.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3073b70]
>[244201.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3073b70] width 1920 pitch 7680 (/4 1920)
>[244201.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a553a0]
>[244201.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a553a0] width 1920 pitch 7680 (/4 1920)
>[244201.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244201.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244201.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507ad0]
>[244201.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507ad0] width 1920 pitch 7680 (/4 1920)
>[244201.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244201.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244201.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82830]
>[244201.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82830] width 1920 pitch 7680 (/4 1920)
>[244201.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244201.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244201.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3073b70]
>[244201.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3073b70] width 1920 pitch 7680 (/4 1920)
>[244201.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244201.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244201.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3073b70]
>[244201.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3073b70] width 1920 pitch 7680 (/4 1920)
>[244201.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82830]
>[244201.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82830] width 1920 pitch 7680 (/4 1920)
>[244201.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507ad0]
>[244201.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507ad0] width 1920 pitch 7680 (/4 1920)
>[244201.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82830]
>[244201.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82830] width 1920 pitch 7680 (/4 1920)
>[244201.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3073b70]
>[244201.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3073b70] width 1920 pitch 7680 (/4 1920)
>[244239.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244239.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244239.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244239.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244239.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244239.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244239.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[244239.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[244239.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25168a0]
>[244239.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25168a0] width 1920 pitch 7680 (/4 1920)
>[244239.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcccc0]
>[244239.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcccc0] width 1920 pitch 7680 (/4 1920)
>[244239.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25168a0]
>[244239.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25168a0] width 1920 pitch 7680 (/4 1920)
>[244239.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[244239.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[244240.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244240.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b630]
>[244240.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b630] width 1920 pitch 7680 (/4 1920)
>[244240.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7520]
>[244240.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7520] width 1920 pitch 7680 (/4 1920)
>[244279.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14260]
>[244279.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14260] width 1920 pitch 7680 (/4 1920)
>[244294.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c653b0]
>[244294.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c653b0] width 1920 pitch 7680 (/4 1920)
>[244302.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244302.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244302.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244302.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244302.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244302.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244302.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244302.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244302.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244302.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244302.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244303.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244303.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244303.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244303.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244303.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244303.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244303.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244303.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244303.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244303.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244303.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244303.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244303.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244303.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244303.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244303.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89c00]
>[244303.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89c00] width 1920 pitch 7680 (/4 1920)
>[244303.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c380]
>[244303.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c380] width 1920 pitch 7680 (/4 1920)
>[244305.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c7f0]
>[244305.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c7f0] width 1920 pitch 7680 (/4 1920)
>[244307.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85cb0]
>[244307.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85cb0] width 1920 pitch 7680 (/4 1920)
>[244307.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2f20]
>[244307.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2f20] width 1920 pitch 7680 (/4 1920)
>[244307.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3500]
>[244307.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3500] width 1920 pitch 7680 (/4 1920)
>[244307.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f15e10]
>[244307.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f15e10] width 1920 pitch 7680 (/4 1920)
>[244307.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3500]
>[244307.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3500] width 1920 pitch 7680 (/4 1920)
>[244307.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4bd0]
>[244307.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4bd0] width 1920 pitch 7680 (/4 1920)
>[244307.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3500]
>[244307.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3500] width 1920 pitch 7680 (/4 1920)
>[244307.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4bd0]
>[244307.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4bd0] width 1920 pitch 7680 (/4 1920)
>[244307.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90150]
>[244307.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90150] width 1920 pitch 7680 (/4 1920)
>[244307.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f15e10]
>[244307.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f15e10] width 1920 pitch 7680 (/4 1920)
>[244307.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4bd0]
>[244307.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4bd0] width 1920 pitch 7680 (/4 1920)
>[244307.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2a0]
>[244307.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2a0] width 1920 pitch 7680 (/4 1920)
>[244307.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3500]
>[244307.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3500] width 1920 pitch 7680 (/4 1920)
>[244324.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c1330]
>[244324.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c1330] width 1920 pitch 7680 (/4 1920)
>[244354.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1770]
>[244354.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1770] width 1920 pitch 7680 (/4 1920)
>[244366.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc1fd0]
>[244366.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc1fd0] width 1920 pitch 7680 (/4 1920)
>[244366.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a540]
>[244366.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a540] width 1920 pitch 7680 (/4 1920)
>[244366.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc1fd0]
>[244366.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc1fd0] width 1920 pitch 7680 (/4 1920)
>[244366.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a540]
>[244366.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a540] width 1920 pitch 7680 (/4 1920)
>[244397.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3e080]
>[244397.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3e080] width 1920 pitch 7680 (/4 1920)
>[244407.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2350]
>[244407.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2350] width 1920 pitch 7680 (/4 1920)
>[244408.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b410]
>[244408.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b410] width 1920 pitch 7680 (/4 1920)
>[244408.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2350]
>[244408.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2350] width 1920 pitch 7680 (/4 1920)
>[244408.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0ce20]
>[244408.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0ce20] width 1920 pitch 7680 (/4 1920)
>[244414.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca30b0]
>[244414.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca30b0] width 1920 pitch 7680 (/4 1920)
>[244414.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b410]
>[244414.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b410] width 1920 pitch 7680 (/4 1920)
>[244424.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2e830]
>[244424.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2e830] width 1920 pitch 7680 (/4 1920)
>[244424.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2e830]
>[244424.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2e830] width 1920 pitch 7680 (/4 1920)
>[244424.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2e830]
>[244424.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2e830] width 1920 pitch 7680 (/4 1920)
>[244424.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2e830]
>[244424.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2e830] width 1920 pitch 7680 (/4 1920)
>[244424.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b410]
>[244424.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b410] width 1920 pitch 7680 (/4 1920)
>[244425.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b410]
>[244425.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b410] width 1920 pitch 7680 (/4 1920)
>[244425.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515400]
>[244425.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515400] width 1920 pitch 7680 (/4 1920)
>[244425.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b410]
>[244425.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b410] width 1920 pitch 7680 (/4 1920)
>[244425.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2515400]
>[244425.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2515400] width 1920 pitch 7680 (/4 1920)
>[244427.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ca00]
>[244427.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ca00] width 1920 pitch 7680 (/4 1920)
>[244427.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b410]
>[244427.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b410] width 1920 pitch 7680 (/4 1920)
>[244427.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[244427.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[244429.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4080]
>[244429.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4080] width 1920 pitch 7680 (/4 1920)
>[244470.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248d130]
>[244470.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248d130] width 1920 pitch 7680 (/4 1920)
>[244474.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39579e0]
>[244474.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39579e0] width 1920 pitch 7680 (/4 1920)
>[244474.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacbe0]
>[244474.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacbe0] width 1920 pitch 7680 (/4 1920)
>[244474.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b894d0]
>[244474.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b894d0] width 1920 pitch 7680 (/4 1920)
>[244475.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a460]
>[244475.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a460] width 1920 pitch 7680 (/4 1920)
>[244489.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eacbe0]
>[244489.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eacbe0] width 1920 pitch 7680 (/4 1920)
>[244495.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ccf0]
>[244495.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ccf0] width 1920 pitch 7680 (/4 1920)
>[244495.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244496.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244496.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ccf0]
>[244496.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ccf0] width 1920 pitch 7680 (/4 1920)
>[244496.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244496.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244496.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316ccf0]
>[244496.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316ccf0] width 1920 pitch 7680 (/4 1920)
>[244497.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244497.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244497.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244497.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244497.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244497.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244500.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d81b40]
>[244500.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d81b40] width 1920 pitch 7680 (/4 1920)
>[244500.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b5c0]
>[244500.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b5c0] width 1920 pitch 7680 (/4 1920)
>[244500.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fc670]
>[244500.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fc670] width 1920 pitch 7680 (/4 1920)
>[244500.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[244500.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[244500.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eec9d0]
>[244500.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eec9d0] width 1920 pitch 7680 (/4 1920)
>[244500.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6010]
>[244500.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6010] width 1920 pitch 7680 (/4 1920)
>[244501.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24656c0]
>[244501.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24656c0] width 1920 pitch 7680 (/4 1920)
>[244501.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbe10]
>[244501.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbe10] width 1920 pitch 7680 (/4 1920)
>[244501.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb360]
>[244501.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb360] width 1920 pitch 7680 (/4 1920)
>[244504.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[244504.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[244518.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[244518.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[244518.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0eef0]
>[244518.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0eef0] width 1920 pitch 7680 (/4 1920)
>[244518.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244518.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244518.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc1de0]
>[244518.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc1de0] width 1920 pitch 7680 (/4 1920)
>[244518.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536530]
>[244518.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536530] width 1920 pitch 7680 (/4 1920)
>[244519.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e0c0]
>[244519.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e0c0] width 1920 pitch 7680 (/4 1920)
>[244519.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40182d0]
>[244519.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40182d0] width 1920 pitch 7680 (/4 1920)
>[244519.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3162570]
>[244519.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3162570] width 1920 pitch 7680 (/4 1920)
>[244519.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fbbe0]
>[244519.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fbbe0] width 1920 pitch 7680 (/4 1920)
>[244519.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4036e70]
>[244519.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4036e70] width 1920 pitch 7680 (/4 1920)
>[244520.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[244520.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[244520.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a39620]
>[244520.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a39620] width 1920 pitch 7680 (/4 1920)
>[244520.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536530]
>[244520.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536530] width 1920 pitch 7680 (/4 1920)
>[244520.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[244520.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[244520.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244520.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244520.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244520.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244520.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536530]
>[244520.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536530] width 1920 pitch 7680 (/4 1920)
>[244520.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[244520.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[244520.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[244520.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[244520.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2520d10]
>[244520.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2520d10] width 1920 pitch 7680 (/4 1920)
>[244520.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed61c0]
>[244520.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed61c0] width 1920 pitch 7680 (/4 1920)
>[244520.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b571f0]
>[244520.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b571f0] width 1920 pitch 7680 (/4 1920)
>[244520.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a920]
>[244521.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a920] width 1920 pitch 7680 (/4 1920)
>[244521.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244521.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244521.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[244521.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[244521.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24656c0]
>[244521.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24656c0] width 1920 pitch 7680 (/4 1920)
>[244521.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[244521.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[244521.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[244521.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[244521.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[244521.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[244521.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cafee0]
>[244521.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cafee0] width 1920 pitch 7680 (/4 1920)
>[244521.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25518a0]
>[244521.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25518a0] width 1920 pitch 7680 (/4 1920)
>[244521.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f881d0]
>[244521.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f881d0] width 1920 pitch 7680 (/4 1920)
>[244521.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25518a0]
>[244521.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25518a0] width 1920 pitch 7680 (/4 1920)
>[244521.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0a00]
>[244521.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0a00] width 1920 pitch 7680 (/4 1920)
>[244521.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25518a0]
>[244522.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25518a0] width 1920 pitch 7680 (/4 1920)
>[244522.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f881d0]
>[244522.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f881d0] width 1920 pitch 7680 (/4 1920)
>[244522.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25518a0]
>[244522.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25518a0] width 1920 pitch 7680 (/4 1920)
>[244525.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ed00]
>[244525.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ed00] width 1920 pitch 7680 (/4 1920)
>[244530.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[244530.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[244534.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244534.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed10]
>[244534.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed10] width 1920 pitch 7680 (/4 1920)
>[244534.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244534.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244535.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f717f0]
>[244535.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f717f0] width 1920 pitch 7680 (/4 1920)
>[244535.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244535.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244535.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1250]
>[244535.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1250] width 1920 pitch 7680 (/4 1920)
>[244538.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8410]
>[244538.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8410] width 1920 pitch 7680 (/4 1920)
>[244541.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[244541.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[244541.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c72a10]
>[244541.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c72a10] width 1920 pitch 7680 (/4 1920)
>[244541.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244541.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244541.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244541.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244541.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244541.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244541.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244541.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244541.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244541.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244543.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a9390]
>[244543.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a9390] width 1920 pitch 7680 (/4 1920)
>[244543.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fadb40]
>[244543.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fadb40] width 1920 pitch 7680 (/4 1920)
>[244543.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca9090]
>[244543.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca9090] width 1920 pitch 7680 (/4 1920)
>[244543.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca9090]
>[244543.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca9090] width 1920 pitch 7680 (/4 1920)
>[244543.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fe00]
>[244543.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fe00] width 1920 pitch 7680 (/4 1920)
>[244543.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca9090]
>[244543.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca9090] width 1920 pitch 7680 (/4 1920)
>[244543.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fe00]
>[244543.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fe00] width 1920 pitch 7680 (/4 1920)
>[244543.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85930]
>[244543.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85930] width 1920 pitch 7680 (/4 1920)
>[244543.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fe00]
>[244543.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fe00] width 1920 pitch 7680 (/4 1920)
>[244545.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fe00]
>[244545.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fe00] width 1920 pitch 7680 (/4 1920)
>[244549.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b39090]
>[244549.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b39090] width 1920 pitch 7680 (/4 1920)
>[244564.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ce20]
>[244564.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ce20] width 1920 pitch 7680 (/4 1920)
>[244579.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305faf0]
>[244579.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305faf0] width 1920 pitch 7680 (/4 1920)
>[244620.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fda0]
>[244620.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fda0] width 1920 pitch 7680 (/4 1920)
>[244623.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca8ed0]
>[244623.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca8ed0] width 1920 pitch 7680 (/4 1920)
>[244623.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30db3f0]
>[244623.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30db3f0] width 1920 pitch 7680 (/4 1920)
>[244623.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca8ed0]
>[244623.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca8ed0] width 1920 pitch 7680 (/4 1920)
>[244624.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30db3f0]
>[244624.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30db3f0] width 1920 pitch 7680 (/4 1920)
>[244624.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244624.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244639.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244639.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244652.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca8ed0]
>[244652.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca8ed0] width 1920 pitch 7680 (/4 1920)
>[244654.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244654.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244654.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96b10]
>[244654.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96b10] width 1920 pitch 7680 (/4 1920)
>[244654.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95770]
>[244654.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95770] width 1920 pitch 7680 (/4 1920)
>[244654.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[244654.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[244654.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244654.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc89e0]
>[244658.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc89e0] width 1920 pitch 7680 (/4 1920)
>[244658.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244658.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244658.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244658.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244658.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244658.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244658.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244658.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244658.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244658.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244658.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244658.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244658.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244658.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244658.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244659.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f69850]
>[244659.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f69850] width 1920 pitch 7680 (/4 1920)
>[244659.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[244659.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[244659.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fda0]
>[244659.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fda0] width 1920 pitch 7680 (/4 1920)
>[244660.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c5c0]
>[244660.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c5c0] width 1920 pitch 7680 (/4 1920)
>[244661.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3950120]
>[244661.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3950120] width 1920 pitch 7680 (/4 1920)
>[244661.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244661.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244661.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e730]
>[244661.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e730] width 1920 pitch 7680 (/4 1920)
>[244661.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244661.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244661.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e730]
>[244661.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e730] width 1920 pitch 7680 (/4 1920)
>[244661.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244661.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244661.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e730]
>[244661.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e730] width 1920 pitch 7680 (/4 1920)
>[244661.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244661.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244661.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e730]
>[244661.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e730] width 1920 pitch 7680 (/4 1920)
>[244661.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244661.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244661.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e730]
>[244661.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e730] width 1920 pitch 7680 (/4 1920)
>[244661.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f695d0]
>[244661.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f695d0] width 1920 pitch 7680 (/4 1920)
>[244661.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7e730]
>[244661.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7e730] width 1920 pitch 7680 (/4 1920)
>[244661.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bced70]
>[244661.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bced70] width 1920 pitch 7680 (/4 1920)
>[244661.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244661.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244661.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c00730]
>[244661.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c00730] width 1920 pitch 7680 (/4 1920)
>[244662.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244662.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244662.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244662.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244662.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244662.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244662.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244662.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244662.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244662.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244662.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddd20]
>[244662.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddd20] width 1920 pitch 7680 (/4 1920)
>[244662.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244662.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39013e0]
>[244662.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39013e0] width 1920 pitch 7680 (/4 1920)
>[244669.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[244669.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[244694.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244694.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244694.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244694.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd740]
>[244694.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd740] width 1920 pitch 7680 (/4 1920)
>[244698.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244698.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244698.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244698.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244698.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244698.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244698.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244698.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244698.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244698.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244698.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244698.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244698.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244699.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244699.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244699.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244699.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244699.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244699.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244699.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244699.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244699.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244699.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244699.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244699.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244699.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244699.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244699.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244699.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244699.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244699.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01930]
>[244699.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01930] width 1920 pitch 7680 (/4 1920)
>[244699.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0890]
>[244699.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0890] width 1920 pitch 7680 (/4 1920)
>[244699.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463b50]
>[244699.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463b50] width 1920 pitch 7680 (/4 1920)
>[244701.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244701.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244701.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[244701.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[244701.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec350]
>[244701.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec350] width 1920 pitch 7680 (/4 1920)
>[244701.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b37e00]
>[244701.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b37e00] width 1920 pitch 7680 (/4 1920)
>[244702.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ebaa0]
>[244702.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ebaa0] width 1920 pitch 7680 (/4 1920)
>[244702.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244702.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244702.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244703.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244703.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244703.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244703.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244703.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244703.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244703.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244703.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244703.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244703.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b85a0]
>[244703.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b85a0] width 1920 pitch 7680 (/4 1920)
>[244703.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c250]
>[244703.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c250] width 1920 pitch 7680 (/4 1920)
>[244703.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6450]
>[244703.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6450] width 1920 pitch 7680 (/4 1920)
>[244703.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c250]
>[244703.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c250] width 1920 pitch 7680 (/4 1920)
>[244711.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244711.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244711.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244711.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244711.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244711.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244711.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244711.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244711.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244711.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244711.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244711.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244711.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244712.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244712.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244712.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244712.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244712.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244712.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244712.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244712.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244712.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244712.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244712.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244712.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244712.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244712.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244712.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244713.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244713.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244713.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244713.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244713.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244713.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244713.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244713.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244713.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244713.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244713.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244713.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244713.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244713.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244713.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244713.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244713.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1dca0]
>[244713.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1dca0] width 1920 pitch 7680 (/4 1920)
>[244722.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fb6c0]
>[244722.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fb6c0] width 1920 pitch 7680 (/4 1920)
>[244733.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244733.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244733.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc8e90]
>[244733.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc8e90] width 1920 pitch 7680 (/4 1920)
>[244733.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df82e0]
>[244733.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df82e0] width 1920 pitch 7680 (/4 1920)
>[244733.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244733.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244733.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df82e0]
>[244733.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df82e0] width 1920 pitch 7680 (/4 1920)
>[244733.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244733.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244733.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df82e0]
>[244733.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df82e0] width 1920 pitch 7680 (/4 1920)
>[244733.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244733.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244733.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc8e10]
>[244733.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc8e10] width 1920 pitch 7680 (/4 1920)
>[244739.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3909300]
>[244739.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3909300] width 1920 pitch 7680 (/4 1920)
>[244739.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0c920]
>[244739.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0c920] width 1920 pitch 7680 (/4 1920)
>[244739.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244739.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244739.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df82e0]
>[244739.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df82e0] width 1920 pitch 7680 (/4 1920)
>[244739.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244739.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244739.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df82e0]
>[244739.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df82e0] width 1920 pitch 7680 (/4 1920)
>[244739.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c50f0]
>[244739.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c50f0] width 1920 pitch 7680 (/4 1920)
>[244739.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df82e0]
>[244739.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df82e0] width 1920 pitch 7680 (/4 1920)
>[244739.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d400c0]
>[244739.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d400c0] width 1920 pitch 7680 (/4 1920)
>[244742.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3958e70]
>[244742.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3958e70] width 1920 pitch 7680 (/4 1920)
>[244755.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4a880]
>[244755.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4a880] width 1920 pitch 7680 (/4 1920)
>[244755.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa8f10]
>[244755.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa8f10] width 1920 pitch 7680 (/4 1920)
>[244755.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4a880]
>[244755.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4a880] width 1920 pitch 7680 (/4 1920)
>[244755.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364740]
>[244755.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364740] width 1920 pitch 7680 (/4 1920)
>[244758.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e6b30]
>[244758.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e6b30] width 1920 pitch 7680 (/4 1920)
>[244758.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c0ec80]
>[244758.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c0ec80] width 1920 pitch 7680 (/4 1920)
>[244758.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5bc0]
>[244758.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5bc0] width 1920 pitch 7680 (/4 1920)
>[244758.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbd3a0]
>[244758.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbd3a0] width 1920 pitch 7680 (/4 1920)
>[244758.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e6b30]
>[244758.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e6b30] width 1920 pitch 7680 (/4 1920)
>[244758.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbd4e0]
>[244758.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbd4e0] width 1920 pitch 7680 (/4 1920)
>[244758.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e6b30]
>[244758.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e6b30] width 1920 pitch 7680 (/4 1920)
>[244758.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244758.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244758.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c484b0]
>[244758.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c484b0] width 1920 pitch 7680 (/4 1920)
>[244758.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244758.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244758.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7cdc0]
>[244758.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7cdc0] width 1920 pitch 7680 (/4 1920)
>[244758.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244758.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244758.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7cdc0]
>[244758.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7cdc0] width 1920 pitch 7680 (/4 1920)
>[244758.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244758.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244759.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c484b0]
>[244759.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c484b0] width 1920 pitch 7680 (/4 1920)
>[244781.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244781.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244781.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[244781.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[244783.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244783.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244783.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244783.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244783.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244783.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244789.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244789.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244799.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244799.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244800.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aad930]
>[244800.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aad930] width 1920 pitch 7680 (/4 1920)
>[244800.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244800.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244800.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[244800.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[244800.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fb840]
>[244800.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fb840] width 1920 pitch 7680 (/4 1920)
>[244801.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d960]
>[244801.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d960] width 1920 pitch 7680 (/4 1920)
>[244801.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244801.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244801.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244801.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244802.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05ca0]
>[244802.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05ca0] width 1920 pitch 7680 (/4 1920)
>[244804.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cea0c0]
>[244804.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cea0c0] width 1920 pitch 7680 (/4 1920)
>[244807.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05ca0]
>[244807.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05ca0] width 1920 pitch 7680 (/4 1920)
>[244807.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8bc40]
>[244807.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8bc40] width 1920 pitch 7680 (/4 1920)
>[244807.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[244807.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[244807.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d960]
>[244807.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d960] width 1920 pitch 7680 (/4 1920)
>[244809.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc11b0]
>[244809.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc11b0] width 1920 pitch 7680 (/4 1920)
>[244818.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c0ec00]
>[244818.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c0ec00] width 1920 pitch 7680 (/4 1920)
>[244818.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc11b0]
>[244818.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc11b0] width 1920 pitch 7680 (/4 1920)
>[244818.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c0ec00]
>[244818.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c0ec00] width 1920 pitch 7680 (/4 1920)
>[244819.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca9b20]
>[244819.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca9b20] width 1920 pitch 7680 (/4 1920)
>[244823.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3064030]
>[244823.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3064030] width 1920 pitch 7680 (/4 1920)
>[244823.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d50b30]
>[244823.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d50b30] width 1920 pitch 7680 (/4 1920)
>[244823.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3aa0]
>[244823.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3aa0] width 1920 pitch 7680 (/4 1920)
>[244829.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244829.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244829.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1add0]
>[244829.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1add0] width 1920 pitch 7680 (/4 1920)
>[244829.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244829.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244829.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244829.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244829.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244829.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244829.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244829.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244829.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244830.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244830.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244830.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244830.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244830.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244830.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244830.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244830.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244830.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244830.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244830.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244830.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244830.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244830.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244830.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244830.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6310]
>[244830.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6310] width 1920 pitch 7680 (/4 1920)
>[244830.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b070]
>[244830.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b070] width 1920 pitch 7680 (/4 1920)
>[244831.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5b890]
>[244831.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5b890] width 1920 pitch 7680 (/4 1920)
>[244831.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4900]
>[244831.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4900] width 1920 pitch 7680 (/4 1920)
>[244831.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ae90]
>[244831.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ae90] width 1920 pitch 7680 (/4 1920)
>[244831.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ae90]
>[244831.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ae90] width 1920 pitch 7680 (/4 1920)
>[244831.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244831.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244831.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244831.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244831.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5280]
>[244831.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5280] width 1920 pitch 7680 (/4 1920)
>[244831.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c150]
>[244831.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c150] width 1920 pitch 7680 (/4 1920)
>[244831.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244831.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244831.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76260]
>[244831.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76260] width 1920 pitch 7680 (/4 1920)
>[244831.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244831.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244831.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76260]
>[244832.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76260] width 1920 pitch 7680 (/4 1920)
>[244832.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244832.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244832.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76260]
>[244832.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76260] width 1920 pitch 7680 (/4 1920)
>[244832.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244832.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244832.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76260]
>[244832.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76260] width 1920 pitch 7680 (/4 1920)
>[244832.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244832.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244832.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76260]
>[244832.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76260] width 1920 pitch 7680 (/4 1920)
>[244832.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b6b0]
>[244832.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b6b0] width 1920 pitch 7680 (/4 1920)
>[244839.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099700]
>[244839.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099700] width 1920 pitch 7680 (/4 1920)
>[244839.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebf70]
>[244839.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebf70] width 1920 pitch 7680 (/4 1920)
>[244840.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3aa0]
>[244840.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3aa0] width 1920 pitch 7680 (/4 1920)
>[244840.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099700]
>[244840.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099700] width 1920 pitch 7680 (/4 1920)
>[244840.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3aa0]
>[244840.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3aa0] width 1920 pitch 7680 (/4 1920)
>[244840.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd9d70]
>[244840.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd9d70] width 1920 pitch 7680 (/4 1920)
>[244840.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40090]
>[244840.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40090] width 1920 pitch 7680 (/4 1920)
>[244840.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c3d0]
>[244840.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c3d0] width 1920 pitch 7680 (/4 1920)
>[244840.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40090]
>[244841.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40090] width 1920 pitch 7680 (/4 1920)
>[244841.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c3d0]
>[244841.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c3d0] width 1920 pitch 7680 (/4 1920)
>[244841.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1bc40]
>[244841.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1bc40] width 1920 pitch 7680 (/4 1920)
>[244841.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff710]
>[244841.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff710] width 1920 pitch 7680 (/4 1920)
>[244841.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3060540]
>[244841.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3060540] width 1920 pitch 7680 (/4 1920)
>[244841.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f561e0]
>[244841.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f561e0] width 1920 pitch 7680 (/4 1920)
>[244843.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a3f0]
>[244843.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a3f0] width 1920 pitch 7680 (/4 1920)
>[244844.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a3f0]
>[244844.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a3f0] width 1920 pitch 7680 (/4 1920)
>[244844.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a3f0]
>[244844.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a3f0] width 1920 pitch 7680 (/4 1920)
>[244844.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1bc40]
>[244844.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1bc40] width 1920 pitch 7680 (/4 1920)
>[244856.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff4f0]
>[244856.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff4f0] width 1920 pitch 7680 (/4 1920)
>[244856.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b87690]
>[244856.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b87690] width 1920 pitch 7680 (/4 1920)
>[244856.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b87690]
>[244856.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b87690] width 1920 pitch 7680 (/4 1920)
>[244856.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff4f0]
>[244856.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff4f0] width 1920 pitch 7680 (/4 1920)
>[244874.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ed140]
>[244874.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ed140] width 1920 pitch 7680 (/4 1920)
>[244874.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb8d0]
>[244874.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb8d0] width 1920 pitch 7680 (/4 1920)
>[244874.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b37f40]
>[244874.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b37f40] width 1920 pitch 7680 (/4 1920)
>[244874.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd2b0]
>[244874.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd2b0] width 1920 pitch 7680 (/4 1920)
>[244874.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab3ea0]
>[244874.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab3ea0] width 1920 pitch 7680 (/4 1920)
>[244920.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c480]
>[244920.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c480] width 1920 pitch 7680 (/4 1920)
>[244920.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92e70]
>[244920.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92e70] width 1920 pitch 7680 (/4 1920)
>[244920.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244921.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244921.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92e70]
>[244921.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92e70] width 1920 pitch 7680 (/4 1920)
>[244923.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[244923.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[244923.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244923.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[244923.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[244923.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244923.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244924.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[244924.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[244924.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[244924.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[244924.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[244925.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[244925.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[244925.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[244925.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904ba0]
>[244925.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904ba0] width 1920 pitch 7680 (/4 1920)
>[244925.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244925.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244925.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244925.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244925.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244925.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244925.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0590]
>[244925.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0590] width 1920 pitch 7680 (/4 1920)
>[244925.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[244925.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[244933.027] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[244933.027] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[244933.027] (II) UnloadModule: "evdev"
>[244954.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba7ff0]
>[244954.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba7ff0] width 1920 pitch 7680 (/4 1920)
>[244999.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7670]
>[244999.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7670] width 1920 pitch 7680 (/4 1920)
>[245059.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[245059.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[245074.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[245074.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[245149.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05ca0]
>[245149.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05ca0] width 1920 pitch 7680 (/4 1920)
>[245164.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cbf50]
>[245164.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cbf50] width 1920 pitch 7680 (/4 1920)
>[245239.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[245239.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[245254.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8bc40]
>[245254.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8bc40] width 1920 pitch 7680 (/4 1920)
>[245319.197] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[245319.197] (II) No input driver specified, ignoring this device.
>[245319.197] (II) This device may have been added with another device file.
>[245319.197] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[245319.197] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[245319.197] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[245319.197] 	Option "XkbRules" "evdev"
>[245319.197] 	Option "XkbModel" "evdev"
>[245319.197] 	Option "XkbLayout" "us"
>[245319.197] 	Option "_source" "server/udev"
>[245319.197] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[245319.197] 	Option "path" "/dev/input/event14"
>[245319.197] 	Option "device" "/dev/input/event14"
>[245319.197] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input37/event14"
>[245319.197] 	Option "driver" "evdev"
>[245319.197] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[245319.197] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[245319.200] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[245319.200] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[245319.200] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[245319.200] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[245319.200] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[245319.200] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[245319.200] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[245319.200] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[245319.200] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[245319.200] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input37/event14"
>[245319.200] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[245319.200] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[245319.200] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[245319.200] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[245319.200] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[245319.200] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[245322.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403d970]
>[245322.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403d970] width 1920 pitch 7680 (/4 1920)
>[245323.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca05d0]
>[245323.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca05d0] width 1920 pitch 7680 (/4 1920)
>[245323.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[245323.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[245323.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245323.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245323.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245323.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245323.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245323.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245323.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245323.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245323.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245323.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245323.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245323.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245323.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245323.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245323.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245323.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245323.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245323.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245323.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245324.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245324.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245324.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245324.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245324.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245324.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245324.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245324.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245324.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245324.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245324.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245324.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[245324.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[245324.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245324.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245324.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df8850]
>[245325.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df8850] width 1920 pitch 7680 (/4 1920)
>[245325.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0eef0]
>[245325.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0eef0] width 1920 pitch 7680 (/4 1920)
>[245325.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14410]
>[245325.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14410] width 1920 pitch 7680 (/4 1920)
>[245325.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5d30]
>[245325.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5d30] width 1920 pitch 7680 (/4 1920)
>[245325.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14410]
>[245325.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14410] width 1920 pitch 7680 (/4 1920)
>[245325.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0eef0]
>[245325.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0eef0] width 1920 pitch 7680 (/4 1920)
>[245325.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14410]
>[245325.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14410] width 1920 pitch 7680 (/4 1920)
>[245325.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0eef0]
>[245325.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0eef0] width 1920 pitch 7680 (/4 1920)
>[245325.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14410]
>[245325.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14410] width 1920 pitch 7680 (/4 1920)
>[245325.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0eef0]
>[245325.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0eef0] width 1920 pitch 7680 (/4 1920)
>[245326.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d09870]
>[245326.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d09870] width 1920 pitch 7680 (/4 1920)
>[245329.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245329.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30b10]
>[245332.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30b10] width 1920 pitch 7680 (/4 1920)
>[245332.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245332.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b940]
>[245332.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b940] width 1920 pitch 7680 (/4 1920)
>[245332.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944ea0]
>[245332.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944ea0] width 1920 pitch 7680 (/4 1920)
>[245334.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c840]
>[245334.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c840] width 1920 pitch 7680 (/4 1920)
>[245334.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40292b0]
>[245334.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40292b0] width 1920 pitch 7680 (/4 1920)
>[245334.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc45c0]
>[245334.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc45c0] width 1920 pitch 7680 (/4 1920)
>[245334.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf8480]
>[245334.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf8480] width 1920 pitch 7680 (/4 1920)
>[245334.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c134a0]
>[245334.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c134a0] width 1920 pitch 7680 (/4 1920)
>[245334.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf8480]
>[245334.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf8480] width 1920 pitch 7680 (/4 1920)
>[245334.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10a40]
>[245334.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10a40] width 1920 pitch 7680 (/4 1920)
>[245334.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964b80]
>[245334.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964b80] width 1920 pitch 7680 (/4 1920)
>[245334.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10a40]
>[245334.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10a40] width 1920 pitch 7680 (/4 1920)
>[245334.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964b80]
>[245334.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964b80] width 1920 pitch 7680 (/4 1920)
>[245334.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10a40]
>[245334.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10a40] width 1920 pitch 7680 (/4 1920)
>[245334.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964b80]
>[245334.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964b80] width 1920 pitch 7680 (/4 1920)
>[245334.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10a40]
>[245334.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10a40] width 1920 pitch 7680 (/4 1920)
>[245346.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf8480]
>[245346.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf8480] width 1920 pitch 7680 (/4 1920)
>[245394.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103be0]
>[245394.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103be0] width 1920 pitch 7680 (/4 1920)
>[245394.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5240]
>[245394.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5240] width 1920 pitch 7680 (/4 1920)
>[245394.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10830]
>[245394.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10830] width 1920 pitch 7680 (/4 1920)
>[245394.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5240]
>[245394.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5240] width 1920 pitch 7680 (/4 1920)
>[245394.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10830]
>[245394.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10830] width 1920 pitch 7680 (/4 1920)
>[245394.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5240]
>[245394.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5240] width 1920 pitch 7680 (/4 1920)
>[245394.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10830]
>[245395.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10830] width 1920 pitch 7680 (/4 1920)
>[245395.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5240]
>[245395.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5240] width 1920 pitch 7680 (/4 1920)
>[245395.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10830]
>[245395.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10830] width 1920 pitch 7680 (/4 1920)
>[245395.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5240]
>[245395.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5240] width 1920 pitch 7680 (/4 1920)
>[245395.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10830]
>[245395.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10830] width 1920 pitch 7680 (/4 1920)
>[245395.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5240]
>[245395.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5240] width 1920 pitch 7680 (/4 1920)
>[245395.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10830]
>[245395.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10830] width 1920 pitch 7680 (/4 1920)
>[245399.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9ee80]
>[245399.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9ee80] width 1920 pitch 7680 (/4 1920)
>[245399.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103be0]
>[245399.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103be0] width 1920 pitch 7680 (/4 1920)
>[245399.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309b3b0]
>[245399.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309b3b0] width 1920 pitch 7680 (/4 1920)
>[245399.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f30ca0]
>[245399.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f30ca0] width 1920 pitch 7680 (/4 1920)
>[245399.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9ee80]
>[245399.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9ee80] width 1920 pitch 7680 (/4 1920)
>[245399.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f30ca0]
>[245399.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f30ca0] width 1920 pitch 7680 (/4 1920)
>[245399.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309b3b0]
>[245399.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309b3b0] width 1920 pitch 7680 (/4 1920)
>[245399.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f30ca0]
>[245399.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f30ca0] width 1920 pitch 7680 (/4 1920)
>[245399.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309b3b0]
>[245399.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309b3b0] width 1920 pitch 7680 (/4 1920)
>[245399.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9ee80]
>[245399.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9ee80] width 1920 pitch 7680 (/4 1920)
>[245399.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309b3b0]
>[245399.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309b3b0] width 1920 pitch 7680 (/4 1920)
>[245399.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9ee80]
>[245399.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9ee80] width 1920 pitch 7680 (/4 1920)
>[245399.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309b3b0]
>[245399.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309b3b0] width 1920 pitch 7680 (/4 1920)
>[245399.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9ee80]
>[245399.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9ee80] width 1920 pitch 7680 (/4 1920)
>[245399.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fb50]
>[245399.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fb50] width 1920 pitch 7680 (/4 1920)
>[245400.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca7290]
>[245400.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca7290] width 1920 pitch 7680 (/4 1920)
>[245400.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d99050]
>[245400.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d99050] width 1920 pitch 7680 (/4 1920)
>[245400.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91ce0]
>[245400.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91ce0] width 1920 pitch 7680 (/4 1920)
>[245400.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d99050]
>[245400.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d99050] width 1920 pitch 7680 (/4 1920)
>[245400.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91ce0]
>[245400.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91ce0] width 1920 pitch 7680 (/4 1920)
>[245400.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fb80]
>[245400.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fb80] width 1920 pitch 7680 (/4 1920)
>[245400.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91ce0]
>[245400.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91ce0] width 1920 pitch 7680 (/4 1920)
>[245400.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fb80]
>[245400.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fb80] width 1920 pitch 7680 (/4 1920)
>[245400.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91ce0]
>[245400.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91ce0] width 1920 pitch 7680 (/4 1920)
>[245400.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fb80]
>[245400.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fb80] width 1920 pitch 7680 (/4 1920)
>[245400.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91ce0]
>[245400.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91ce0] width 1920 pitch 7680 (/4 1920)
>[245400.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fb80]
>[245400.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fb80] width 1920 pitch 7680 (/4 1920)
>[245400.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91ce0]
>[245400.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91ce0] width 1920 pitch 7680 (/4 1920)
>[245400.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fb80]
>[245400.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fb80] width 1920 pitch 7680 (/4 1920)
>[245473.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00e20]
>[245473.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00e20] width 1920 pitch 7680 (/4 1920)
>[245473.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d99050]
>[245473.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d99050] width 1920 pitch 7680 (/4 1920)
>[245475.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103be0]
>[245475.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103be0] width 1920 pitch 7680 (/4 1920)
>[245500.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245500.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245500.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245500.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245500.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245500.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245500.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245501.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245501.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245501.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245501.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245501.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245501.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ae20]
>[245501.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ae20] width 1920 pitch 7680 (/4 1920)
>[245501.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245501.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245505.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245505.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba70a0]
>[245505.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba70a0] width 1920 pitch 7680 (/4 1920)
>[245505.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[245505.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[245575.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[245575.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[245575.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8ed0]
>[245575.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8ed0] width 1920 pitch 7680 (/4 1920)
>[245575.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee9d0]
>[245575.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee9d0] width 1920 pitch 7680 (/4 1920)
>[245575.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3b170]
>[245575.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3b170] width 1920 pitch 7680 (/4 1920)
>[245575.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aab7b0]
>[245575.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aab7b0] width 1920 pitch 7680 (/4 1920)
>[245575.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3b170]
>[245575.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3b170] width 1920 pitch 7680 (/4 1920)
>[245575.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8ed0]
>[245575.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8ed0] width 1920 pitch 7680 (/4 1920)
>[245575.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3d550]
>[245575.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3d550] width 1920 pitch 7680 (/4 1920)
>[245575.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce61b0]
>[245575.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce61b0] width 1920 pitch 7680 (/4 1920)
>[245575.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[245575.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[245575.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce61b0]
>[245575.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce61b0] width 1920 pitch 7680 (/4 1920)
>[245575.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[245575.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[245575.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce61b0]
>[245575.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce61b0] width 1920 pitch 7680 (/4 1920)
>[245575.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[245575.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[245575.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce61b0]
>[245576.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce61b0] width 1920 pitch 7680 (/4 1920)
>[245576.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[245576.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[245577.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33380]
>[245577.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33380] width 1920 pitch 7680 (/4 1920)
>[245577.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33380]
>[245577.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33380] width 1920 pitch 7680 (/4 1920)
>[245577.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33380]
>[245577.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33380] width 1920 pitch 7680 (/4 1920)
>[245577.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33380]
>[245577.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33380] width 1920 pitch 7680 (/4 1920)
>[245577.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e33380]
>[245577.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e33380] width 1920 pitch 7680 (/4 1920)
>[245577.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[245577.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[245577.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[245577.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[245577.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[245577.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[245577.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50dc0]
>[245577.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50dc0] width 1920 pitch 7680 (/4 1920)
>[245577.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[245577.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[245589.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a55180]
>[245589.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a55180] width 1920 pitch 7680 (/4 1920)
>[245589.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a55180]
>[245589.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a55180] width 1920 pitch 7680 (/4 1920)
>[245589.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a55180]
>[245589.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a55180] width 1920 pitch 7680 (/4 1920)
>[245589.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d438e0]
>[245589.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d438e0] width 1920 pitch 7680 (/4 1920)
>[245589.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d438e0]
>[245589.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d438e0] width 1920 pitch 7680 (/4 1920)
>[245589.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d438e0]
>[245589.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d438e0] width 1920 pitch 7680 (/4 1920)
>[245589.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d438e0]
>[245589.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d438e0] width 1920 pitch 7680 (/4 1920)
>[245589.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245589.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245589.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d438e0]
>[245590.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d438e0] width 1920 pitch 7680 (/4 1920)
>[245590.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d43b80]
>[245590.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d43b80] width 1920 pitch 7680 (/4 1920)
>[245590.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d438e0]
>[245590.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d438e0] width 1920 pitch 7680 (/4 1920)
>[245599.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8ae40]
>[245599.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8ae40] width 1920 pitch 7680 (/4 1920)
>[245600.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbfbf0]
>[245600.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbfbf0] width 1920 pitch 7680 (/4 1920)
>[245600.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbfbf0]
>[245600.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbfbf0] width 1920 pitch 7680 (/4 1920)
>[245600.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbfbf0]
>[245600.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbfbf0] width 1920 pitch 7680 (/4 1920)
>[245600.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbfbf0]
>[245600.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbfbf0] width 1920 pitch 7680 (/4 1920)
>[245600.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbfbf0]
>[245600.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbfbf0] width 1920 pitch 7680 (/4 1920)
>[245600.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbfbf0]
>[245600.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbfbf0] width 1920 pitch 7680 (/4 1920)
>[245600.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245600.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245600.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245601.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245614.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8b8d0]
>[245614.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8b8d0] width 1920 pitch 7680 (/4 1920)
>[245621.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245621.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245621.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a2c0]
>[245621.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a2c0] width 1920 pitch 7680 (/4 1920)
>[245621.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245621.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245621.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc1ec0]
>[245621.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc1ec0] width 1920 pitch 7680 (/4 1920)
>[245621.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245621.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245621.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc1ec0]
>[245621.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc1ec0] width 1920 pitch 7680 (/4 1920)
>[245621.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245621.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245621.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30667d0]
>[245621.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30667d0] width 1920 pitch 7680 (/4 1920)
>[245621.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db42f0]
>[245621.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db42f0] width 1920 pitch 7680 (/4 1920)
>[245621.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30667d0]
>[245621.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30667d0] width 1920 pitch 7680 (/4 1920)
>[245621.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db42f0]
>[245621.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db42f0] width 1920 pitch 7680 (/4 1920)
>[245621.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e94880]
>[245621.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e94880] width 1920 pitch 7680 (/4 1920)
>[245621.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2570]
>[245621.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2570] width 1920 pitch 7680 (/4 1920)
>[245621.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30667d0]
>[245621.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30667d0] width 1920 pitch 7680 (/4 1920)
>[245621.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2f00]
>[245621.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2f00] width 1920 pitch 7680 (/4 1920)
>[245621.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9dfd0]
>[245621.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9dfd0] width 1920 pitch 7680 (/4 1920)
>[245621.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255abd0]
>[245621.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255abd0] width 1920 pitch 7680 (/4 1920)
>[245621.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11790]
>[245621.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11790] width 1920 pitch 7680 (/4 1920)
>[245621.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d1d0]
>[245621.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d1d0] width 1920 pitch 7680 (/4 1920)
>[245621.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11790]
>[245621.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11790] width 1920 pitch 7680 (/4 1920)
>[245621.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f260]
>[245621.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f260] width 1920 pitch 7680 (/4 1920)
>[245621.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11790]
>[245621.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11790] width 1920 pitch 7680 (/4 1920)
>[245621.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b990]
>[245621.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b990] width 1920 pitch 7680 (/4 1920)
>[245621.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d1d0]
>[245621.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d1d0] width 1920 pitch 7680 (/4 1920)
>[245621.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2e530]
>[245621.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2e530] width 1920 pitch 7680 (/4 1920)
>[245621.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e2640]
>[245621.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e2640] width 1920 pitch 7680 (/4 1920)
>[245621.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f260]
>[245621.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f260] width 1920 pitch 7680 (/4 1920)
>[245621.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d1d0]
>[245621.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d1d0] width 1920 pitch 7680 (/4 1920)
>[245621.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2e530]
>[245622.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2e530] width 1920 pitch 7680 (/4 1920)
>[245622.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f260]
>[245622.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f260] width 1920 pitch 7680 (/4 1920)
>[245622.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b990]
>[245622.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b990] width 1920 pitch 7680 (/4 1920)
>[245622.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f260]
>[245622.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f260] width 1920 pitch 7680 (/4 1920)
>[245622.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2e530]
>[245622.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2e530] width 1920 pitch 7680 (/4 1920)
>[245622.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f260]
>[245622.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f260] width 1920 pitch 7680 (/4 1920)
>[245622.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11790]
>[245622.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11790] width 1920 pitch 7680 (/4 1920)
>[245629.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b990]
>[245629.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b990] width 1920 pitch 7680 (/4 1920)
>[245637.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245637.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0f20]
>[245637.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0f20] width 1920 pitch 7680 (/4 1920)
>[245637.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4ff50]
>[245637.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4ff50] width 1920 pitch 7680 (/4 1920)
>[245644.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d3150]
>[245644.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d3150] width 1920 pitch 7680 (/4 1920)
>[245650.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aab340]
>[245650.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aab340] width 1920 pitch 7680 (/4 1920)
>[245650.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245650.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245650.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aab340]
>[245650.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aab340] width 1920 pitch 7680 (/4 1920)
>[245650.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245650.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245650.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aab340]
>[245650.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aab340] width 1920 pitch 7680 (/4 1920)
>[245650.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245650.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245650.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc90]
>[245650.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc90] width 1920 pitch 7680 (/4 1920)
>[245650.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245650.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245650.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc90]
>[245650.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc90] width 1920 pitch 7680 (/4 1920)
>[245650.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245651.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245651.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc90]
>[245651.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc90] width 1920 pitch 7680 (/4 1920)
>[245651.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245651.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245651.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc90]
>[245651.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc90] width 1920 pitch 7680 (/4 1920)
>[245651.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245651.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245651.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc90]
>[245651.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc90] width 1920 pitch 7680 (/4 1920)
>[245651.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245651.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245651.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc90]
>[245651.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc90] width 1920 pitch 7680 (/4 1920)
>[245651.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec45a0]
>[245651.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec45a0] width 1920 pitch 7680 (/4 1920)
>[245658.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aab590]
>[245658.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aab590] width 1920 pitch 7680 (/4 1920)
>[245658.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e00]
>[245658.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e00] width 1920 pitch 7680 (/4 1920)
>[245658.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e00]
>[245658.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e00] width 1920 pitch 7680 (/4 1920)
>[245658.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b7e0]
>[245658.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b7e0] width 1920 pitch 7680 (/4 1920)
>[245658.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9cc10]
>[245658.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9cc10] width 1920 pitch 7680 (/4 1920)
>[245658.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b7e0]
>[245659.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b7e0] width 1920 pitch 7680 (/4 1920)
>[245659.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e00]
>[245659.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e00] width 1920 pitch 7680 (/4 1920)
>[245659.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99bd0]
>[245659.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99bd0] width 1920 pitch 7680 (/4 1920)
>[245659.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b7e0]
>[245659.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b7e0] width 1920 pitch 7680 (/4 1920)
>[245659.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d260]
>[245659.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d260] width 1920 pitch 7680 (/4 1920)
>[245659.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc7ab0]
>[245659.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc7ab0] width 1920 pitch 7680 (/4 1920)
>[245659.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e00]
>[245659.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e00] width 1920 pitch 7680 (/4 1920)
>[245659.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b7e0]
>[245659.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b7e0] width 1920 pitch 7680 (/4 1920)
>[245659.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e00]
>[245659.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e00] width 1920 pitch 7680 (/4 1920)
>[245659.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b7e0]
>[245659.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b7e0] width 1920 pitch 7680 (/4 1920)
>[245659.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e00]
>[245659.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e00] width 1920 pitch 7680 (/4 1920)
>[245659.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b7e0]
>[245659.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b7e0] width 1920 pitch 7680 (/4 1920)
>[245672.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245672.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245672.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245672.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245672.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245672.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245672.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245672.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245672.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245672.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245672.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245672.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245672.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245672.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245672.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245672.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245672.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245672.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245672.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245672.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245672.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245672.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245672.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245672.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245672.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245673.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245673.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245673.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245673.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245673.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245673.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11660]
>[245673.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11660] width 1920 pitch 7680 (/4 1920)
>[245673.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245673.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81d0]
>[245685.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81d0] width 1920 pitch 7680 (/4 1920)
>[245685.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0990]
>[245685.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0990] width 1920 pitch 7680 (/4 1920)
>[245685.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a560]
>[245685.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a560] width 1920 pitch 7680 (/4 1920)
>[245685.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e0c0]
>[245685.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e0c0] width 1920 pitch 7680 (/4 1920)
>[245685.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc7b90]
>[245685.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc7b90] width 1920 pitch 7680 (/4 1920)
>[245685.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd6ee0]
>[245685.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd6ee0] width 1920 pitch 7680 (/4 1920)
>[245685.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20c90]
>[245685.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20c90] width 1920 pitch 7680 (/4 1920)
>[245685.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245685.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20c90]
>[245685.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20c90] width 1920 pitch 7680 (/4 1920)
>[245685.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245685.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20c90]
>[245685.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20c90] width 1920 pitch 7680 (/4 1920)
>[245685.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245685.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd6ee0]
>[245685.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd6ee0] width 1920 pitch 7680 (/4 1920)
>[245685.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc7b90]
>[245685.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc7b90] width 1920 pitch 7680 (/4 1920)
>[245685.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e0c0]
>[245685.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e0c0] width 1920 pitch 7680 (/4 1920)
>[245685.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a560]
>[245685.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a560] width 1920 pitch 7680 (/4 1920)
>[245685.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0990]
>[245685.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0990] width 1920 pitch 7680 (/4 1920)
>[245685.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f610]
>[245685.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f610] width 1920 pitch 7680 (/4 1920)
>[245685.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72350]
>[245685.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72350] width 1920 pitch 7680 (/4 1920)
>[245685.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72350]
>[245685.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72350] width 1920 pitch 7680 (/4 1920)
>[245685.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72350]
>[245685.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72350] width 1920 pitch 7680 (/4 1920)
>[245685.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72350]
>[245685.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72350] width 1920 pitch 7680 (/4 1920)
>[245685.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245685.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245685.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4b70]
>[245685.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4b70] width 1920 pitch 7680 (/4 1920)
>[245685.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245685.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f610]
>[245685.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f610] width 1920 pitch 7680 (/4 1920)
>[245685.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2a990]
>[245685.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2a990] width 1920 pitch 7680 (/4 1920)
>[245704.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2badff0]
>[245704.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2badff0] width 1920 pitch 7680 (/4 1920)
>[245704.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526ff0]
>[245704.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526ff0] width 1920 pitch 7680 (/4 1920)
>[245704.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7d60]
>[245704.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7d60] width 1920 pitch 7680 (/4 1920)
>[245704.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2badff0]
>[245704.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2badff0] width 1920 pitch 7680 (/4 1920)
>[245706.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245706.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245706.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[245706.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[245707.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245707.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245707.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[245707.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[245707.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fbbe0]
>[245707.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fbbe0] width 1920 pitch 7680 (/4 1920)
>[245707.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245707.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fbbe0]
>[245707.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fbbe0] width 1920 pitch 7680 (/4 1920)
>[245707.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245707.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fbbe0]
>[245707.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fbbe0] width 1920 pitch 7680 (/4 1920)
>[245707.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245707.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fbbe0]
>[245707.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fbbe0] width 1920 pitch 7680 (/4 1920)
>[245707.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245707.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e0c0]
>[245707.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e0c0] width 1920 pitch 7680 (/4 1920)
>[245707.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245707.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e0c0]
>[245707.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e0c0] width 1920 pitch 7680 (/4 1920)
>[245707.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245707.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e0c0]
>[245707.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e0c0] width 1920 pitch 7680 (/4 1920)
>[245707.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fe00]
>[245707.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fe00] width 1920 pitch 7680 (/4 1920)
>[245708.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d9b0]
>[245708.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d9b0] width 1920 pitch 7680 (/4 1920)
>[245709.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[245709.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[245709.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555360]
>[245709.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555360] width 1920 pitch 7680 (/4 1920)
>[245710.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcd60]
>[245710.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcd60] width 1920 pitch 7680 (/4 1920)
>[245710.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fce410]
>[245710.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fce410] width 1920 pitch 7680 (/4 1920)
>[245711.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[245711.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[245711.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef87d0]
>[245711.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef87d0] width 1920 pitch 7680 (/4 1920)
>[245711.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245711.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245711.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d178e0]
>[245711.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d178e0] width 1920 pitch 7680 (/4 1920)
>[245711.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245711.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245711.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d178e0]
>[245711.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d178e0] width 1920 pitch 7680 (/4 1920)
>[245711.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a83c70]
>[245711.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a83c70] width 1920 pitch 7680 (/4 1920)
>[245711.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d178e0]
>[245711.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d178e0] width 1920 pitch 7680 (/4 1920)
>[245711.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245711.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245711.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245711.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245711.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245711.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245711.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245711.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245711.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245711.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245712.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245712.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245712.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245712.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245713.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245713.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245713.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245713.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245714.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245714.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245715.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245715.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245715.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245715.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245715.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245715.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245715.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245715.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245715.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245715.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245715.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[245715.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[245715.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40321b0]
>[245715.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40321b0] width 1920 pitch 7680 (/4 1920)
>[245716.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[245716.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[245716.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[245717.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[245717.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550740]
>[245717.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550740] width 1920 pitch 7680 (/4 1920)
>[245717.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[245717.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[245717.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[245717.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[245717.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[245717.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[245717.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c1a70]
>[245717.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c1a70] width 1920 pitch 7680 (/4 1920)
>[245717.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2bf0]
>[245717.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2bf0] width 1920 pitch 7680 (/4 1920)
>[245727.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3060270]
>[245727.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3060270] width 1920 pitch 7680 (/4 1920)
>[245807.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba48d0]
>[245807.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba48d0] width 1920 pitch 7680 (/4 1920)
>[245844.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245844.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245844.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245844.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245844.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245844.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245844.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245844.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245844.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245844.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245844.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245844.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245844.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7aef0]
>[245844.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7aef0] width 1920 pitch 7680 (/4 1920)
>[245844.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245844.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245844.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7aef0]
>[245844.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7aef0] width 1920 pitch 7680 (/4 1920)
>[245844.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245844.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245844.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7aef0]
>[245844.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7aef0] width 1920 pitch 7680 (/4 1920)
>[245844.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245844.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245845.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3da30]
>[245845.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3da30] width 1920 pitch 7680 (/4 1920)
>[245846.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3da30]
>[245846.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3da30] width 1920 pitch 7680 (/4 1920)
>[245846.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245846.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245846.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245846.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245846.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245846.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245846.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245846.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245846.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245846.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245846.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245846.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245846.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245846.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245846.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245846.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245846.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245846.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245846.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245847.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245847.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245847.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245847.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245847.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245848.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245848.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245848.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b86960]
>[245848.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b86960] width 1920 pitch 7680 (/4 1920)
>[245848.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245848.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245848.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245848.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245848.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245848.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245848.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245848.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245848.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b501a0]
>[245848.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b501a0] width 1920 pitch 7680 (/4 1920)
>[245848.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb7590]
>[245848.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb7590] width 1920 pitch 7680 (/4 1920)
>[245871.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2e50]
>[245871.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2e50] width 1920 pitch 7680 (/4 1920)
>[245873.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256dce0]
>[245873.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256dce0] width 1920 pitch 7680 (/4 1920)
>[245873.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256dc80]
>[245873.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256dc80] width 1920 pitch 7680 (/4 1920)
>[245877.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f86d0]
>[245877.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f86d0] width 1920 pitch 7680 (/4 1920)
>[245877.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245877.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f86d0]
>[245877.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f86d0] width 1920 pitch 7680 (/4 1920)
>[245877.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245877.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f86d0]
>[245877.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f86d0] width 1920 pitch 7680 (/4 1920)
>[245877.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245877.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f86d0]
>[245877.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f86d0] width 1920 pitch 7680 (/4 1920)
>[245877.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245877.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f86d0]
>[245877.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f86d0] width 1920 pitch 7680 (/4 1920)
>[245877.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f86d0]
>[245877.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f86d0] width 1920 pitch 7680 (/4 1920)
>[245877.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245877.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2508ec0]
>[245877.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2508ec0] width 1920 pitch 7680 (/4 1920)
>[245877.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245877.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2508ec0]
>[245877.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2508ec0] width 1920 pitch 7680 (/4 1920)
>[245877.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39015f0]
>[245877.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39015f0] width 1920 pitch 7680 (/4 1920)
>[245880.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5390]
>[245880.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5390] width 1920 pitch 7680 (/4 1920)
>[245880.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb9ae0]
>[245880.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb9ae0] width 1920 pitch 7680 (/4 1920)
>[245880.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ead120]
>[245880.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ead120] width 1920 pitch 7680 (/4 1920)
>[245880.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c78b0]
>[245880.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c78b0] width 1920 pitch 7680 (/4 1920)
>[245880.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1fc10]
>[245880.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1fc10] width 1920 pitch 7680 (/4 1920)
>[245880.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3fff0]
>[245880.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3fff0] width 1920 pitch 7680 (/4 1920)
>[245880.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5ae60]
>[245880.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5ae60] width 1920 pitch 7680 (/4 1920)
>[245880.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f090]
>[245880.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f090] width 1920 pitch 7680 (/4 1920)
>[245880.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f090]
>[245880.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f090] width 1920 pitch 7680 (/4 1920)
>[245880.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3066430]
>[245880.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3066430] width 1920 pitch 7680 (/4 1920)
>[245880.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f090]
>[245880.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f090] width 1920 pitch 7680 (/4 1920)
>[245880.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3066430]
>[245880.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3066430] width 1920 pitch 7680 (/4 1920)
>[245894.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7650]
>[245894.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7650] width 1920 pitch 7680 (/4 1920)
>[245894.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245894.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245894.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245894.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245894.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245894.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245894.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245894.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245894.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245894.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245894.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245894.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245894.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245894.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245894.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245894.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245894.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245894.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245894.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245894.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245894.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245895.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245895.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245895.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245895.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245895.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245896.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245896.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245896.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245896.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245896.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245896.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245896.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245896.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245896.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245896.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245896.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245896.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245896.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245896.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245896.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245896.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245896.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245896.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245896.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245896.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245896.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245896.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245896.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245896.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245896.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245896.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245896.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e81e0]
>[245896.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e81e0] width 1920 pitch 7680 (/4 1920)
>[245897.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05000]
>[245897.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05000] width 1920 pitch 7680 (/4 1920)
>[245897.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245897.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245897.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245897.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245897.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245897.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245897.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245897.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245897.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b390]
>[245897.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b390] width 1920 pitch 7680 (/4 1920)
>[245897.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245897.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245897.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245897.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245897.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245897.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245897.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245897.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245897.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245897.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245897.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b530]
>[245897.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b530] width 1920 pitch 7680 (/4 1920)
>[245897.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b5d0]
>[245897.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b5d0] width 1920 pitch 7680 (/4 1920)
>[245927.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316d750]
>[245927.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316d750] width 1920 pitch 7680 (/4 1920)
>[245927.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f3b0]
>[245927.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f3b0] width 1920 pitch 7680 (/4 1920)
>[245927.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316d750]
>[245927.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316d750] width 1920 pitch 7680 (/4 1920)
>[245927.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316d750]
>[245927.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316d750] width 1920 pitch 7680 (/4 1920)
>[245927.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316d750]
>[245927.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316d750] width 1920 pitch 7680 (/4 1920)
>[245927.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316d750]
>[245927.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316d750] width 1920 pitch 7680 (/4 1920)
>[245927.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316d750]
>[245927.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316d750] width 1920 pitch 7680 (/4 1920)
>[245927.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4c10]
>[245927.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4c10] width 1920 pitch 7680 (/4 1920)
>[245927.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4c10]
>[245927.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4c10] width 1920 pitch 7680 (/4 1920)
>[245927.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[245927.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[245927.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4c10]
>[245927.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4c10] width 1920 pitch 7680 (/4 1920)
>[245928.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3927b40]
>[245928.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3927b40] width 1920 pitch 7680 (/4 1920)
>[245928.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7e8e0]
>[245928.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7e8e0] width 1920 pitch 7680 (/4 1920)
>[245928.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b5540]
>[245928.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b5540] width 1920 pitch 7680 (/4 1920)
>[245928.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7e8e0]
>[245928.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7e8e0] width 1920 pitch 7680 (/4 1920)
>[245928.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b5540]
>[245928.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b5540] width 1920 pitch 7680 (/4 1920)
>[245928.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[245928.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[245928.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d0d20]
>[245928.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d0d20] width 1920 pitch 7680 (/4 1920)
>[245928.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05fc0]
>[245928.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05fc0] width 1920 pitch 7680 (/4 1920)
>[245928.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8d1b0]
>[245928.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8d1b0] width 1920 pitch 7680 (/4 1920)
>[245928.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0800]
>[245928.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0800] width 1920 pitch 7680 (/4 1920)
>[245928.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8d1b0]
>[245928.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8d1b0] width 1920 pitch 7680 (/4 1920)
>[245928.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[245928.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[245928.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8d1b0]
>[245928.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8d1b0] width 1920 pitch 7680 (/4 1920)
>[245928.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393da90]
>[245928.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393da90] width 1920 pitch 7680 (/4 1920)
>[245928.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8d1b0]
>[245928.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8d1b0] width 1920 pitch 7680 (/4 1920)
>[245928.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536a90]
>[245928.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536a90] width 1920 pitch 7680 (/4 1920)
>[245928.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e833c0]
>[245928.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e833c0] width 1920 pitch 7680 (/4 1920)
>[245928.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[245928.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[245944.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2574230]
>[245944.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2574230] width 1920 pitch 7680 (/4 1920)
>[245968.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fb10]
>[245968.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fb10] width 1920 pitch 7680 (/4 1920)
>[245974.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecbbc0]
>[245974.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecbbc0] width 1920 pitch 7680 (/4 1920)
>[245975.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a53ae0]
>[245975.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a53ae0] width 1920 pitch 7680 (/4 1920)
>[245982.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5bb20]
>[245982.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5bb20] width 1920 pitch 7680 (/4 1920)
>[245983.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[245983.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[245983.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245983.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245983.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69f60]
>[245983.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69f60] width 1920 pitch 7680 (/4 1920)
>[245983.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5bb20]
>[245983.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5bb20] width 1920 pitch 7680 (/4 1920)
>[245983.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69f60]
>[245983.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69f60] width 1920 pitch 7680 (/4 1920)
>[245983.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245983.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245983.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69f60]
>[245983.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69f60] width 1920 pitch 7680 (/4 1920)
>[245983.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245983.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245983.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69f60]
>[245983.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69f60] width 1920 pitch 7680 (/4 1920)
>[245983.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245983.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245983.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69f60]
>[245983.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69f60] width 1920 pitch 7680 (/4 1920)
>[245983.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245983.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245983.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69f60]
>[245983.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69f60] width 1920 pitch 7680 (/4 1920)
>[245983.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245983.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245983.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5bb20]
>[245983.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5bb20] width 1920 pitch 7680 (/4 1920)
>[245983.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245983.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245983.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6e90]
>[245983.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6e90] width 1920 pitch 7680 (/4 1920)
>[245984.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf430]
>[245984.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf430] width 1920 pitch 7680 (/4 1920)
>[245984.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6e90]
>[245984.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6e90] width 1920 pitch 7680 (/4 1920)
>[245984.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc40e0]
>[245984.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc40e0] width 1920 pitch 7680 (/4 1920)
>[245984.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[245984.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[245986.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245986.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245986.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf430]
>[245986.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf430] width 1920 pitch 7680 (/4 1920)
>[245986.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245986.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245986.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245986.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245986.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6e90]
>[245986.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6e90] width 1920 pitch 7680 (/4 1920)
>[245986.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245986.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245986.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6e90]
>[245986.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6e90] width 1920 pitch 7680 (/4 1920)
>[245986.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245986.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245986.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245986.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245986.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245986.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245987.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245987.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5bb20]
>[245987.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5bb20] width 1920 pitch 7680 (/4 1920)
>[245987.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245987.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245987.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245987.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245987.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245987.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245987.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245987.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245987.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d8010]
>[245987.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d8010] width 1920 pitch 7680 (/4 1920)
>[245987.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf430]
>[245987.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf430] width 1920 pitch 7680 (/4 1920)
>[245987.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf430]
>[245987.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf430] width 1920 pitch 7680 (/4 1920)
>[245987.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ade0]
>[245987.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ade0] width 1920 pitch 7680 (/4 1920)
>[245987.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf430]
>[245987.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf430] width 1920 pitch 7680 (/4 1920)
>[245989.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc73a0]
>[245989.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc73a0] width 1920 pitch 7680 (/4 1920)
>[245989.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc73a0]
>[245989.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc73a0] width 1920 pitch 7680 (/4 1920)
>[245989.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3c790]
>[245989.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3c790] width 1920 pitch 7680 (/4 1920)
>[245989.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e036e0]
>[245989.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e036e0] width 1920 pitch 7680 (/4 1920)
>[245989.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7d80]
>[245989.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7d80] width 1920 pitch 7680 (/4 1920)
>[245989.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252cc40]
>[245989.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252cc40] width 1920 pitch 7680 (/4 1920)
>[245989.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56d40]
>[245989.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56d40] width 1920 pitch 7680 (/4 1920)
>[245989.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc73a0]
>[245989.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc73a0] width 1920 pitch 7680 (/4 1920)
>[245989.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56d40]
>[245989.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56d40] width 1920 pitch 7680 (/4 1920)
>[245989.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4c290]
>[245989.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4c290] width 1920 pitch 7680 (/4 1920)
>[245989.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82740]
>[245989.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82740] width 1920 pitch 7680 (/4 1920)
>[245989.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3c790]
>[245989.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3c790] width 1920 pitch 7680 (/4 1920)
>[245989.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3c790]
>[245989.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3c790] width 1920 pitch 7680 (/4 1920)
>[245989.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56d40]
>[245989.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56d40] width 1920 pitch 7680 (/4 1920)
>[245989.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e94000]
>[245989.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e94000] width 1920 pitch 7680 (/4 1920)
>[245989.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e94000]
>[245989.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e94000] width 1920 pitch 7680 (/4 1920)
>[245989.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e94000]
>[245989.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e94000] width 1920 pitch 7680 (/4 1920)
>[245989.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9f6d0]
>[245989.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9f6d0] width 1920 pitch 7680 (/4 1920)
>[245989.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e94000]
>[245989.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e94000] width 1920 pitch 7680 (/4 1920)
>[245989.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56d40]
>[245989.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56d40] width 1920 pitch 7680 (/4 1920)
>[246001.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24688b0]
>[246001.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24688b0] width 1920 pitch 7680 (/4 1920)
>[246001.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ded0]
>[246001.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ded0] width 1920 pitch 7680 (/4 1920)
>[246001.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[246001.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[246001.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[246001.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[246001.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[246001.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[246001.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[246001.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[246001.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[246001.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[246001.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[246001.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[246001.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[246001.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[246001.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25024e0]
>[246001.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25024e0] width 1920 pitch 7680 (/4 1920)
>[246001.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[246001.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[246004.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be21e0]
>[246004.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be21e0] width 1920 pitch 7680 (/4 1920)
>[246019.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[246019.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[246034.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e6e90]
>[246034.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e6e90] width 1920 pitch 7680 (/4 1920)
>[246049.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b3e0]
>[246049.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b3e0] width 1920 pitch 7680 (/4 1920)
>[246134.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[246134.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[246135.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[246135.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[246135.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc75f0]
>[246135.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc75f0] width 1920 pitch 7680 (/4 1920)
>[246135.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9cef0]
>[246135.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9cef0] width 1920 pitch 7680 (/4 1920)
>[246137.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea0180]
>[246137.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea0180] width 1920 pitch 7680 (/4 1920)
>[246137.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d954f0]
>[246137.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d954f0] width 1920 pitch 7680 (/4 1920)
>[246137.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39e30]
>[246137.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39e30] width 1920 pitch 7680 (/4 1920)
>[246137.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9c780]
>[246137.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9c780] width 1920 pitch 7680 (/4 1920)
>[246184.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7c990]
>[246184.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7c990] width 1920 pitch 7680 (/4 1920)
>[246199.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245cd60]
>[246199.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245cd60] width 1920 pitch 7680 (/4 1920)
>[246244.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3e440]
>[246244.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3e440] width 1920 pitch 7680 (/4 1920)
>[246259.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7c990]
>[246259.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7c990] width 1920 pitch 7680 (/4 1920)
>[246409.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8cf0]
>[246409.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8cf0] width 1920 pitch 7680 (/4 1920)
>[246424.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab2d0]
>[246424.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab2d0] width 1920 pitch 7680 (/4 1920)
>[246589.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2deec00]
>[246589.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2deec00] width 1920 pitch 7680 (/4 1920)
>[246604.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b899d0]
>[246604.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b899d0] width 1920 pitch 7680 (/4 1920)
>[246694.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b81d30]
>[246694.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b81d30] width 1920 pitch 7680 (/4 1920)
>[246709.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc1d00]
>[246709.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc1d00] width 1920 pitch 7680 (/4 1920)
>[246739.287] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[246739.287] (II) RADEON(0): Using hsync ranges from config file
>[246739.287] (II) RADEON(0): Using vrefresh ranges from config file
>[246739.287] (II) RADEON(0): Printing DDC gathered Modelines:
>[246739.287] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[246739.287] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[246739.287] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[246739.287] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[246739.287] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[246739.287] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[246739.287] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[246739.287] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[246739.287] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[246739.287] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[246739.287] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[246739.287] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[246829.655] (II) RADEON(0): RADEONSaveScreen(2)
>[246829.655] (II) RADEON(0): RADEONSaveScreen(0)
>[247918.695] (II) RADEON(0): RADEONSaveScreen(1)
>[247991.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df3970]
>[247991.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df3970] width 1920 pitch 7680 (/4 1920)
>[248009.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c774a0]
>[248009.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c774a0] width 1920 pitch 7680 (/4 1920)
>[248024.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edfd20]
>[248024.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edfd20] width 1920 pitch 7680 (/4 1920)
>[248069.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248069.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248084.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c190]
>[248084.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c190] width 1920 pitch 7680 (/4 1920)
>[248114.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248114.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248129.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c190]
>[248129.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c190] width 1920 pitch 7680 (/4 1920)
>[248174.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf080]
>[248174.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf080] width 1920 pitch 7680 (/4 1920)
>[248189.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248189.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248204.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc7560]
>[248204.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc7560] width 1920 pitch 7680 (/4 1920)
>[248219.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248219.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248294.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c50ca0]
>[248294.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c50ca0] width 1920 pitch 7680 (/4 1920)
>[248309.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248309.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248384.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e830]
>[248384.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e830] width 1920 pitch 7680 (/4 1920)
>[248414.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248414.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248459.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390a060]
>[248459.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390a060] width 1920 pitch 7680 (/4 1920)
>[248489.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248489.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248519.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc0660]
>[248519.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc0660] width 1920 pitch 7680 (/4 1920)
>[248534.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248534.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248639.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953960]
>[248639.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953960] width 1920 pitch 7680 (/4 1920)
>[248654.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbcd90]
>[248654.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbcd90] width 1920 pitch 7680 (/4 1920)
>[248669.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953960]
>[248669.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953960] width 1920 pitch 7680 (/4 1920)
>[248677.917] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[248677.917] (II) RADEON(0): Using hsync ranges from config file
>[248677.917] (II) RADEON(0): Using vrefresh ranges from config file
>[248677.917] (II) RADEON(0): Printing DDC gathered Modelines:
>[248677.917] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[248677.917] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[248677.917] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[248677.917] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[248677.917] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[248677.917] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[248677.917] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[248677.917] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[248677.917] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[248677.917] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[248677.917] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[248677.917] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[248684.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315e750]
>[248684.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315e750] width 1920 pitch 7680 (/4 1920)
>[248767.673] (II) RADEON(0): RADEONSaveScreen(2)
>[248767.673] (II) RADEON(0): RADEONSaveScreen(0)
>[250205.847] (II) RADEON(0): RADEONSaveScreen(1)
>[250895.670] (II) RADEON(0): RADEONSaveScreen(2)
>[250895.670] (II) RADEON(0): RADEONSaveScreen(0)
>[253897.192] (II) AIGLX: Suspending AIGLX clients for VT switch
>[253897.192] (II) RADEON(0): RADEONLeaveVT_KMS
>[253897.192] (II) RADEON(0): Ok, leaving now...
>[253910.230] (II) AIGLX: Resuming AIGLX clients after VT switch
>[253910.230] (II) RADEON(0): RADEONEnterVT_KMS
>[253910.280] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[253910.280] (II) RADEON(0): Using hsync ranges from config file
>[253910.280] (II) RADEON(0): Using vrefresh ranges from config file
>[253910.280] (II) RADEON(0): Printing DDC gathered Modelines:
>[253910.280] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[253910.280] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[253910.280] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[253910.280] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[253910.280] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[253910.280] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[253910.280] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[253910.280] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[253910.280] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[253910.280] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[253910.280] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[253910.280] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[253910.319] (II) RADEON(0): RADEONSaveScreen(2)
>[253910.320] (II) RADEON(0): RADEONSaveScreen(1)
>[253910.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf5500]
>[253910.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf5500] width 1920 pitch 7680 (/4 1920)
>[253910.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42740]
>[253910.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42740] width 1920 pitch 7680 (/4 1920)
>[253910.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf5500]
>[253910.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf5500] width 1920 pitch 7680 (/4 1920)
>[253912.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed21c0]
>[253912.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed21c0] width 1920 pitch 7680 (/4 1920)
>[253912.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf080]
>[253912.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf080] width 1920 pitch 7680 (/4 1920)
>[253912.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22e8440]
>[253912.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22e8440] width 1920 pitch 7680 (/4 1920)
>[253912.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253912.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253912.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253912.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253912.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253912.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253912.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253912.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253912.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253912.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253912.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253912.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253912.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253912.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253912.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253913.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253913.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253913.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253913.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253913.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253913.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253913.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253913.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253913.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253913.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbe050]
>[253913.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbe050] width 1920 pitch 7680 (/4 1920)
>[253913.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1af50]
>[253913.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1af50] width 1920 pitch 7680 (/4 1920)
>[253913.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1af50]
>[253913.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1af50] width 1920 pitch 7680 (/4 1920)
>[253913.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1af50]
>[253913.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1af50] width 1920 pitch 7680 (/4 1920)
>[253913.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253913.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253913.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbec20]
>[253913.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbec20] width 1920 pitch 7680 (/4 1920)
>[253913.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca8000]
>[253914.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca8000] width 1920 pitch 7680 (/4 1920)
>[253915.515] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[253915.515] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[253915.515] (II) UnloadModule: "evdev"
>[254105.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256fac0]
>[254105.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256fac0] width 1920 pitch 7680 (/4 1920)
>[254120.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9c3f0]
>[254120.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9c3f0] width 1920 pitch 7680 (/4 1920)
>[254195.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2870]
>[254195.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2870] width 1920 pitch 7680 (/4 1920)
>[254210.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31193e0]
>[254210.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31193e0] width 1920 pitch 7680 (/4 1920)
>[254300.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9af00]
>[254300.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9af00] width 1920 pitch 7680 (/4 1920)
>[254330.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9b720]
>[254330.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9b720] width 1920 pitch 7680 (/4 1920)
>[254405.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[254405.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[254420.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9c3f0]
>[254420.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9c3f0] width 1920 pitch 7680 (/4 1920)
>[254435.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[254435.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[254450.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2870]
>[254450.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2870] width 1920 pitch 7680 (/4 1920)
>[254480.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3fec0]
>[254480.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3fec0] width 1920 pitch 7680 (/4 1920)
>[254510.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31193e0]
>[254510.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31193e0] width 1920 pitch 7680 (/4 1920)
>[254515.091] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[254515.091] (II) RADEON(0): Using hsync ranges from config file
>[254515.091] (II) RADEON(0): Using vrefresh ranges from config file
>[254515.091] (II) RADEON(0): Printing DDC gathered Modelines:
>[254515.091] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[254515.091] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[254515.091] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[254515.091] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[254515.091] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[254515.091] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[254515.091] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[254515.091] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[254515.091] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[254515.091] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[254515.091] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[254515.091] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[254605.654] (II) RADEON(0): RADEONSaveScreen(2)
>[254605.654] (II) RADEON(0): RADEONSaveScreen(0)
>[257607.180] (II) AIGLX: Suspending AIGLX clients for VT switch
>[257607.180] (II) RADEON(0): RADEONLeaveVT_KMS
>[257607.180] (II) RADEON(0): Ok, leaving now...
>[257620.228] (II) AIGLX: Resuming AIGLX clients after VT switch
>[257620.228] (II) RADEON(0): RADEONEnterVT_KMS
>[257620.282] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[257620.282] (II) RADEON(0): Using hsync ranges from config file
>[257620.282] (II) RADEON(0): Using vrefresh ranges from config file
>[257620.282] (II) RADEON(0): Printing DDC gathered Modelines:
>[257620.282] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[257620.282] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[257620.282] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[257620.282] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[257620.282] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[257620.282] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[257620.282] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[257620.282] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[257620.282] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[257620.282] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[257620.282] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[257620.282] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[257620.322] (II) RADEON(0): RADEONSaveScreen(2)
>[257620.322] (II) RADEON(0): RADEONSaveScreen(1)
>[257620.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256fac0]
>[257620.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256fac0] width 1920 pitch 7680 (/4 1920)
>[257650.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31193e0]
>[257650.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31193e0] width 1920 pitch 7680 (/4 1920)
>[257665.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[257665.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[257755.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31193e0]
>[257755.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31193e0] width 1920 pitch 7680 (/4 1920)
>[257800.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256fac0]
>[257800.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256fac0] width 1920 pitch 7680 (/4 1920)
>[257965.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f4920]
>[257965.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f4920] width 1920 pitch 7680 (/4 1920)
>[257980.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256fac0]
>[257980.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256fac0] width 1920 pitch 7680 (/4 1920)
>[257986.976] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[257986.976] (II) No input driver specified, ignoring this device.
>[257986.976] (II) This device may have been added with another device file.
>[257986.976] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[257986.976] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[257986.976] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[257986.976] 	Option "XkbRules" "evdev"
>[257986.976] 	Option "XkbModel" "evdev"
>[257986.976] 	Option "XkbLayout" "us"
>[257986.976] 	Option "_source" "server/udev"
>[257986.976] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[257986.976] 	Option "path" "/dev/input/event14"
>[257986.976] 	Option "device" "/dev/input/event14"
>[257986.976] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input38/event14"
>[257986.976] 	Option "driver" "evdev"
>[257986.976] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[257986.976] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[257986.976] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[257986.976] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[257986.977] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[257986.977] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[257986.977] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[257986.977] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[257986.977] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[257986.977] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[257986.977] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[257986.977] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input38/event14"
>[257986.977] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[257986.977] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[257986.977] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[257986.977] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[257986.977] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[257986.977] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[257987.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256fac0]
>[257987.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256fac0] width 1920 pitch 7680 (/4 1920)
>[257987.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f4920]
>[257987.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f4920] width 1920 pitch 7680 (/4 1920)
>[257989.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dba600]
>[257989.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dba600] width 1920 pitch 7680 (/4 1920)
>[257990.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53635e0]
>[257990.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53635e0] width 1920 pitch 7680 (/4 1920)
>[257990.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256fac0]
>[257990.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256fac0] width 1920 pitch 7680 (/4 1920)
>[257990.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53635e0]
>[257990.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53635e0] width 1920 pitch 7680 (/4 1920)
>[258055.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24eb8c0]
>[258055.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24eb8c0] width 1920 pitch 7680 (/4 1920)
>[258085.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316e050]
>[258085.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316e050] width 1920 pitch 7680 (/4 1920)
>[258145.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c34cc0]
>[258145.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c34cc0] width 1920 pitch 7680 (/4 1920)
>[258146.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258146.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258146.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[258146.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[258146.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[258146.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[258148.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f68ea0]
>[258148.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f68ea0] width 1920 pitch 7680 (/4 1920)
>[258154.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251ca00]
>[258154.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251ca00] width 1920 pitch 7680 (/4 1920)
>[258154.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258154.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258154.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258154.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6a120]
>[258154.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6a120] width 1920 pitch 7680 (/4 1920)
>[258155.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f21230]
>[258155.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f21230] width 1920 pitch 7680 (/4 1920)
>[258155.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[258155.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[258155.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258155.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258155.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[258155.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[258155.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258155.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258155.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[258155.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[258155.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258155.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258155.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[258155.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[258155.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258155.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258155.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[258155.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[258155.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258155.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258155.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[258155.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[258155.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258155.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258155.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[258155.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[258155.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258156.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258156.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[258156.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[258156.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f93a0]
>[258156.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f93a0] width 1920 pitch 7680 (/4 1920)
>[258156.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[258156.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[258163.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eeecf0]
>[258163.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eeecf0] width 1920 pitch 7680 (/4 1920)
>[258166.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46320]
>[258166.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46320] width 1920 pitch 7680 (/4 1920)
>[258166.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b542a0]
>[258166.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b542a0] width 1920 pitch 7680 (/4 1920)
>[258166.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eeecf0]
>[258166.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eeecf0] width 1920 pitch 7680 (/4 1920)
>[258166.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca910]
>[258166.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca910] width 1920 pitch 7680 (/4 1920)
>[258171.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbfa20]
>[258171.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbfa20] width 1920 pitch 7680 (/4 1920)
>[258171.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255e4f0]
>[258171.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255e4f0] width 1920 pitch 7680 (/4 1920)
>[258171.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef4b0]
>[258171.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef4b0] width 1920 pitch 7680 (/4 1920)
>[258171.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255e4f0]
>[258171.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255e4f0] width 1920 pitch 7680 (/4 1920)
>[258171.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef4b0]
>[258171.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef4b0] width 1920 pitch 7680 (/4 1920)
>[258171.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255e4f0]
>[258171.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255e4f0] width 1920 pitch 7680 (/4 1920)
>[258171.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef4b0]
>[258171.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef4b0] width 1920 pitch 7680 (/4 1920)
>[258171.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255e4f0]
>[258171.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255e4f0] width 1920 pitch 7680 (/4 1920)
>[258171.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef4b0]
>[258171.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef4b0] width 1920 pitch 7680 (/4 1920)
>[258171.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b3d0]
>[258171.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b3d0] width 1920 pitch 7680 (/4 1920)
>[258171.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebbb10]
>[258171.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebbb10] width 1920 pitch 7680 (/4 1920)
>[258171.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debda0]
>[258171.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debda0] width 1920 pitch 7680 (/4 1920)
>[258307.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[258307.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[258307.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258307.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258307.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258307.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258307.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258307.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258307.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258307.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258307.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258307.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258307.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258307.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258307.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258307.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258307.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258307.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258307.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258307.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258307.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258307.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258307.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258307.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258308.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258308.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258308.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258308.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258308.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258308.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258308.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258308.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258308.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258308.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258308.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258308.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258308.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258308.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258308.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258308.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258308.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258308.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258308.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258308.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258309.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258309.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258309.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258309.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258309.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258309.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258309.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258309.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258309.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258309.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258309.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258309.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258309.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258309.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258310.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258310.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258310.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258310.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[258310.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[258311.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258311.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258311.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[258311.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[258311.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef4b0]
>[258311.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef4b0] width 1920 pitch 7680 (/4 1920)
>[258311.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258311.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258311.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c250]
>[258311.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c250] width 1920 pitch 7680 (/4 1920)
>[258311.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258311.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258311.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522c10]
>[258311.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522c10] width 1920 pitch 7680 (/4 1920)
>[258311.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258311.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258311.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522c10]
>[258311.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522c10] width 1920 pitch 7680 (/4 1920)
>[258311.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258311.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258311.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522c10]
>[258311.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522c10] width 1920 pitch 7680 (/4 1920)
>[258311.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258311.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258311.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522c10]
>[258311.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522c10] width 1920 pitch 7680 (/4 1920)
>[258311.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258311.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258312.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff48d0]
>[258312.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff48d0] width 1920 pitch 7680 (/4 1920)
>[258319.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46eb0]
>[258319.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46eb0] width 1920 pitch 7680 (/4 1920)
>[258319.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301e000]
>[258319.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301e000] width 1920 pitch 7680 (/4 1920)
>[258319.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb40f0]
>[258319.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb40f0] width 1920 pitch 7680 (/4 1920)
>[258319.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b1c0]
>[258319.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b1c0] width 1920 pitch 7680 (/4 1920)
>[258319.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258319.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258319.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258319.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258319.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258319.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258319.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25762e0]
>[258319.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25762e0] width 1920 pitch 7680 (/4 1920)
>[258319.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def840]
>[258319.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def840] width 1920 pitch 7680 (/4 1920)
>[258319.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258319.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258319.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253e450]
>[258319.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253e450] width 1920 pitch 7680 (/4 1920)
>[258319.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def840]
>[258319.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def840] width 1920 pitch 7680 (/4 1920)
>[258319.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12a10]
>[258319.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12a10] width 1920 pitch 7680 (/4 1920)
>[258319.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258319.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258319.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12a10]
>[258319.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12a10] width 1920 pitch 7680 (/4 1920)
>[258319.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258319.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258325.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f6cf0]
>[258325.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f6cf0] width 1920 pitch 7680 (/4 1920)
>[258328.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258328.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a620]
>[258328.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a620] width 1920 pitch 7680 (/4 1920)
>[258328.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8aa0]
>[258328.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8aa0] width 1920 pitch 7680 (/4 1920)
>[258329.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3db0]
>[258329.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3db0] width 1920 pitch 7680 (/4 1920)
>[258329.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3db0]
>[258329.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3db0] width 1920 pitch 7680 (/4 1920)
>[258329.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3db0]
>[258329.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3db0] width 1920 pitch 7680 (/4 1920)
>[258329.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3db0]
>[258329.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3db0] width 1920 pitch 7680 (/4 1920)
>[258329.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3db0]
>[258329.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3db0] width 1920 pitch 7680 (/4 1920)
>[258329.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3db0]
>[258329.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3db0] width 1920 pitch 7680 (/4 1920)
>[258329.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b98dd0]
>[258329.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b98dd0] width 1920 pitch 7680 (/4 1920)
>[258329.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25270a0]
>[258329.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25270a0] width 1920 pitch 7680 (/4 1920)
>[258329.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258329.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258329.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25270a0]
>[258329.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25270a0] width 1920 pitch 7680 (/4 1920)
>[258330.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258330.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258330.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a3c0]
>[258330.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a3c0] width 1920 pitch 7680 (/4 1920)
>[258330.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8d10]
>[258330.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8d10] width 1920 pitch 7680 (/4 1920)
>[258330.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7a3c0]
>[258330.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7a3c0] width 1920 pitch 7680 (/4 1920)
>[258331.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258331.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258331.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258331.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258331.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258332.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46d0]
>[258332.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46d0] width 1920 pitch 7680 (/4 1920)
>[258332.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480120]
>[258332.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480120] width 1920 pitch 7680 (/4 1920)
>[258333.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258333.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258335.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b3d0]
>[258335.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b3d0] width 1920 pitch 7680 (/4 1920)
>[258336.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb310]
>[258336.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb310] width 1920 pitch 7680 (/4 1920)
>[258336.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c5c0]
>[258336.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c5c0] width 1920 pitch 7680 (/4 1920)
>[258336.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fcb30]
>[258336.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fcb30] width 1920 pitch 7680 (/4 1920)
>[258336.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c5c0]
>[258336.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c5c0] width 1920 pitch 7680 (/4 1920)
>[258336.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76a30]
>[258336.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76a30] width 1920 pitch 7680 (/4 1920)
>[258336.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c5c0]
>[258336.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c5c0] width 1920 pitch 7680 (/4 1920)
>[258336.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76a30]
>[258336.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76a30] width 1920 pitch 7680 (/4 1920)
>[258336.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c5c0]
>[258336.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c5c0] width 1920 pitch 7680 (/4 1920)
>[258336.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76a30]
>[258336.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76a30] width 1920 pitch 7680 (/4 1920)
>[258336.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c5c0]
>[258336.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c5c0] width 1920 pitch 7680 (/4 1920)
>[258336.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76a30]
>[258336.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76a30] width 1920 pitch 7680 (/4 1920)
>[258336.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c5c0]
>[258336.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c5c0] width 1920 pitch 7680 (/4 1920)
>[258336.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76a30]
>[258336.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76a30] width 1920 pitch 7680 (/4 1920)
>[258338.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b16650]
>[258338.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b16650] width 1920 pitch 7680 (/4 1920)
>[258338.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258338.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258338.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258338.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258338.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e715b0]
>[258338.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e715b0] width 1920 pitch 7680 (/4 1920)
>[258338.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258338.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258339.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258339.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258339.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258339.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258339.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258340.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258340.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258340.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258340.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258341.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05c60]
>[258341.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05c60] width 1920 pitch 7680 (/4 1920)
>[258341.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef4b0]
>[258341.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef4b0] width 1920 pitch 7680 (/4 1920)
>[258341.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258341.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258341.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258341.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258341.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258341.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258341.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258341.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258341.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258341.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258341.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258341.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258341.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258341.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258341.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258341.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258341.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258341.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258341.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b38d10]
>[258341.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b38d10] width 1920 pitch 7680 (/4 1920)
>[258341.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258341.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258342.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87e00]
>[258342.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87e00] width 1920 pitch 7680 (/4 1920)
>[258346.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ba10]
>[258346.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ba10] width 1920 pitch 7680 (/4 1920)
>[258346.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbc5e0]
>[258346.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbc5e0] width 1920 pitch 7680 (/4 1920)
>[258346.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942240]
>[258346.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942240] width 1920 pitch 7680 (/4 1920)
>[258346.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942240]
>[258346.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942240] width 1920 pitch 7680 (/4 1920)
>[258346.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbc5e0]
>[258346.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbc5e0] width 1920 pitch 7680 (/4 1920)
>[258346.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6df30]
>[258346.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6df30] width 1920 pitch 7680 (/4 1920)
>[258346.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cd10]
>[258346.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cd10] width 1920 pitch 7680 (/4 1920)
>[258346.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6df30]
>[258346.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6df30] width 1920 pitch 7680 (/4 1920)
>[258346.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942240]
>[258346.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942240] width 1920 pitch 7680 (/4 1920)
>[258346.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cd10]
>[258346.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cd10] width 1920 pitch 7680 (/4 1920)
>[258346.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[258346.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[258346.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cd10]
>[258346.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cd10] width 1920 pitch 7680 (/4 1920)
>[258346.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[258346.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[258346.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cd10]
>[258346.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cd10] width 1920 pitch 7680 (/4 1920)
>[258347.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[258347.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[258347.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cd10]
>[258347.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cd10] width 1920 pitch 7680 (/4 1920)
>[258347.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[258347.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[258347.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3942240]
>[258347.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3942240] width 1920 pitch 7680 (/4 1920)
>[258347.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76de0]
>[258347.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76de0] width 1920 pitch 7680 (/4 1920)
>[258347.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6df30]
>[258347.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6df30] width 1920 pitch 7680 (/4 1920)
>[258347.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db96c0]
>[258347.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db96c0] width 1920 pitch 7680 (/4 1920)
>[258355.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258355.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b660]
>[258355.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b660] width 1920 pitch 7680 (/4 1920)
>[258355.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab4190]
>[258355.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab4190] width 1920 pitch 7680 (/4 1920)
>[258362.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0ccd0]
>[258362.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0ccd0] width 1920 pitch 7680 (/4 1920)
>[258363.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258363.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3075690]
>[258363.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3075690] width 1920 pitch 7680 (/4 1920)
>[258363.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f876d0]
>[258363.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f876d0] width 1920 pitch 7680 (/4 1920)
>[258370.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d76560]
>[258370.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d76560] width 1920 pitch 7680 (/4 1920)
>[258370.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a4c0]
>[258370.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a4c0] width 1920 pitch 7680 (/4 1920)
>[258370.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d76560]
>[258370.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d76560] width 1920 pitch 7680 (/4 1920)
>[258371.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a4c0]
>[258371.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a4c0] width 1920 pitch 7680 (/4 1920)
>[258371.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258372.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258372.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258372.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3240]
>[258372.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3240] width 1920 pitch 7680 (/4 1920)
>[258376.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258376.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[258376.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[258376.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aac5b0]
>[258376.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aac5b0] width 1920 pitch 7680 (/4 1920)
>[258378.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d40a0]
>[258378.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d40a0] width 1920 pitch 7680 (/4 1920)
>[258378.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60ad0]
>[258378.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60ad0] width 1920 pitch 7680 (/4 1920)
>[258378.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c250]
>[258378.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c250] width 1920 pitch 7680 (/4 1920)
>[258378.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[258378.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[258378.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[258378.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[258378.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[258378.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[258378.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[258378.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[258378.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a15dc0]
>[258378.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a15dc0] width 1920 pitch 7680 (/4 1920)
>[258378.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258378.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[258378.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[258378.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[258378.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[258380.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258380.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258380.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258380.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258380.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258380.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258380.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258380.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258380.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258380.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258380.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258380.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258380.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258380.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258380.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258381.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258381.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258381.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258381.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c830]
>[258381.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c830] width 1920 pitch 7680 (/4 1920)
>[258381.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fff6b0]
>[258381.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fff6b0] width 1920 pitch 7680 (/4 1920)
>[258396.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea02a0]
>[258396.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea02a0] width 1920 pitch 7680 (/4 1920)
>[258396.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d1d0]
>[258396.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d1d0] width 1920 pitch 7680 (/4 1920)
>[258396.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258396.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258396.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258396.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258396.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258396.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258396.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258396.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258396.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258396.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258396.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258396.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258396.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258396.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258396.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258396.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258396.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258396.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258396.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258396.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258397.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[258397.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[258397.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258397.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258397.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258397.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258397.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258397.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258397.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258397.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258397.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4021720]
>[258397.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4021720] width 1920 pitch 7680 (/4 1920)
>[258397.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2310]
>[258397.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2310] width 1920 pitch 7680 (/4 1920)
>[258397.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf130]
>[258397.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf130] width 1920 pitch 7680 (/4 1920)
>[258397.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b3e0]
>[258397.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b3e0] width 1920 pitch 7680 (/4 1920)
>[258397.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf130]
>[258397.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf130] width 1920 pitch 7680 (/4 1920)
>[258398.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7b3e0]
>[258398.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7b3e0] width 1920 pitch 7680 (/4 1920)
>[258399.377] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[258399.377] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[258399.377] (II) UnloadModule: "evdev"
>[258535.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258535.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258565.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114230]
>[258565.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114230] width 1920 pitch 7680 (/4 1920)
>[258625.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258625.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258655.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114230]
>[258655.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114230] width 1920 pitch 7680 (/4 1920)
>[258880.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258880.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258895.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114230]
>[258895.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114230] width 1920 pitch 7680 (/4 1920)
>[258910.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[258910.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[258940.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114230]
>[258940.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114230] width 1920 pitch 7680 (/4 1920)
>[258999.042] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[258999.042] (II) RADEON(0): Using hsync ranges from config file
>[258999.042] (II) RADEON(0): Using vrefresh ranges from config file
>[258999.042] (II) RADEON(0): Printing DDC gathered Modelines:
>[258999.042] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[258999.042] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[258999.042] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[258999.042] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[258999.042] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[258999.042] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[258999.042] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[258999.042] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[258999.042] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[258999.042] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[258999.042] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[258999.042] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[258999.043] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[258999.043] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[259089.672] (II) RADEON(0): RADEONSaveScreen(2)
>[259089.672] (II) RADEON(0): RADEONSaveScreen(0)
>[262091.152] (II) AIGLX: Suspending AIGLX clients for VT switch
>[262091.152] (II) RADEON(0): RADEONLeaveVT_KMS
>[262091.152] (II) RADEON(0): Ok, leaving now...
>[262104.089] (II) AIGLX: Resuming AIGLX clients after VT switch
>[262104.089] (II) RADEON(0): RADEONEnterVT_KMS
>[262104.173] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[262104.173] (II) RADEON(0): Using hsync ranges from config file
>[262104.173] (II) RADEON(0): Using vrefresh ranges from config file
>[262104.173] (II) RADEON(0): Printing DDC gathered Modelines:
>[262104.173] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[262104.173] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[262104.173] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[262104.173] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[262104.173] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[262104.173] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[262104.173] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[262104.173] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[262104.173] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[262104.173] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[262104.173] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[262104.173] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[262104.173] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[262104.173] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[262104.173] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[262104.174] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[262104.184] (II) RADEON(0): RADEONSaveScreen(2)
>[262104.184] (II) RADEON(0): RADEONSaveScreen(1)
>[262104.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf130]
>[262104.256] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[262104.256] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[262104.256] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[262104.256] 	Option "XkbRules" "evdev"
>[262104.256] 	Option "XkbModel" "evdev"
>[262104.256] 	Option "XkbLayout" "us"
>[262104.256] 	Option "_source" "server/udev"
>[262104.256] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[262104.256] 	Option "path" "/dev/input/event14"
>[262104.256] 	Option "device" "/dev/input/event14"
>[262104.256] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input39/event14"
>[262104.256] 	Option "driver" "evdev"
>[262104.256] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[262104.256] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[262104.256] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[262104.256] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[262104.256] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[262104.256] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[262104.256] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[262104.256] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[262104.256] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[262104.256] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[262104.256] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[262104.256] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input39/event14"
>[262104.256] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[262104.256] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[262104.256] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[262104.256] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[262104.256] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[262104.256] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[262104.256] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[262104.256] (II) No input driver specified, ignoring this device.
>[262104.256] (II) This device may have been added with another device file.
>[262104.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf130] width 1920 pitch 7680 (/4 1920)
>[262209.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[262209.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[262224.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[262224.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[262254.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[262254.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[262284.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[262284.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[262299.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[262299.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[262314.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e450]
>[262314.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e450] width 1920 pitch 7680 (/4 1920)
>[262338.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2cb90]
>[262338.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2cb90] width 1920 pitch 7680 (/4 1920)
>[262347.387] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[262347.387] (II) RADEON(0): Using hsync ranges from config file
>[262347.387] (II) RADEON(0): Using vrefresh ranges from config file
>[262347.387] (II) RADEON(0): Printing DDC gathered Modelines:
>[262347.387] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[262347.387] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[262347.387] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[262347.387] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[262347.387] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[262347.387] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[262347.387] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[262347.387] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[262347.387] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[262347.387] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[262347.387] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[262347.387] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[262347.432] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[262347.432] (II) RADEON(0): Using hsync ranges from config file
>[262347.432] (II) RADEON(0): Using vrefresh ranges from config file
>[262347.432] (II) RADEON(0): Printing DDC gathered Modelines:
>[262347.432] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[262347.432] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[262347.432] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[262347.432] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[262347.432] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[262347.432] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[262347.432] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[262347.432] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[262347.432] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[262347.432] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[262347.432] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[262347.432] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[262347.480] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[262347.480] (II) RADEON(0): Using hsync ranges from config file
>[262347.480] (II) RADEON(0): Using vrefresh ranges from config file
>[262347.480] (II) RADEON(0): Printing DDC gathered Modelines:
>[262347.480] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[262347.480] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[262347.480] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[262347.480] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[262347.480] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[262347.480] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[262347.480] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[262347.480] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[262347.480] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[262347.480] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[262347.480] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[262347.480] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[262358.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[262358.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[262359.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[262359.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[262374.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05ca0]
>[262374.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05ca0] width 1920 pitch 7680 (/4 1920)
>[262419.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256b4f0]
>[262419.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256b4f0] width 1920 pitch 7680 (/4 1920)
>[262434.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[262434.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[262449.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256b4f0]
>[262449.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256b4f0] width 1920 pitch 7680 (/4 1920)
>[262569.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256b4f0]
>[262569.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256b4f0] width 1920 pitch 7680 (/4 1920)
>[262599.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[262599.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[262644.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256b4f0]
>[262644.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256b4f0] width 1920 pitch 7680 (/4 1920)
>[262659.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[262659.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[262749.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[262749.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[262779.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[262779.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[262854.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[262854.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[262869.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f0e0]
>[262869.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f0e0] width 1920 pitch 7680 (/4 1920)
>[262929.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[262929.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[262944.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[262944.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[263034.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[263034.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[263049.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f0e0]
>[263049.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f0e0] width 1920 pitch 7680 (/4 1920)
>[263079.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[263079.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[263094.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[263094.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[263124.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[263124.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[263169.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[263169.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[263319.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[263319.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[263334.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[263334.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[263409.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14fe0]
>[263409.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14fe0] width 1920 pitch 7680 (/4 1920)
>[263424.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86810]
>[263424.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86810] width 1920 pitch 7680 (/4 1920)
>[263454.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e314f0]
>[263454.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e314f0] width 1920 pitch 7680 (/4 1920)
>[263484.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e314f0]
>[263484.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e314f0] width 1920 pitch 7680 (/4 1920)
>[263499.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86810]
>[263499.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86810] width 1920 pitch 7680 (/4 1920)
>[263514.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e314f0]
>[263514.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e314f0] width 1920 pitch 7680 (/4 1920)
>[263994.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[263994.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[264009.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4a80]
>[264009.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4a80] width 1920 pitch 7680 (/4 1920)
>[264174.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[264174.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[264189.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e314f0]
>[264189.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e314f0] width 1920 pitch 7680 (/4 1920)
>[264264.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[264264.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[264279.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[264279.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[264294.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86810]
>[264294.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86810] width 1920 pitch 7680 (/4 1920)
>[264309.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[264309.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[264434.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264434.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264435.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[264435.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[264435.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264435.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264435.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[264435.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[264435.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264435.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264435.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264435.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264435.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[264435.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[264436.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264436.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264436.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264436.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264436.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264436.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264436.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[264436.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[264437.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d20e40]
>[264437.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d20e40] width 1920 pitch 7680 (/4 1920)
>[264437.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bbc0]
>[264437.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bbc0] width 1920 pitch 7680 (/4 1920)
>[264456.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9a990]
>[264456.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9a990] width 1920 pitch 7680 (/4 1920)
>[264457.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5bb50]
>[264457.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5bb50] width 1920 pitch 7680 (/4 1920)
>[264457.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4a890]
>[264457.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4a890] width 1920 pitch 7680 (/4 1920)
>[264457.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede360]
>[264457.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede360] width 1920 pitch 7680 (/4 1920)
>[264474.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[264474.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[264504.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d43610]
>[264504.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d43610] width 1920 pitch 7680 (/4 1920)
>[264505.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb85f0]
>[264505.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb85f0] width 1920 pitch 7680 (/4 1920)
>[264512.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a8d0]
>[264512.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a8d0] width 1920 pitch 7680 (/4 1920)
>[264512.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[264512.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[264512.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c1100]
>[264512.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c1100] width 1920 pitch 7680 (/4 1920)
>[264512.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[264512.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[264512.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c1100]
>[264512.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c1100] width 1920 pitch 7680 (/4 1920)
>[264512.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[264513.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[264513.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a8d0]
>[264513.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a8d0] width 1920 pitch 7680 (/4 1920)
>[264513.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[264513.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[264513.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[264513.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[264520.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25204b0]
>[264520.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25204b0] width 1920 pitch 7680 (/4 1920)
>[264520.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6a80]
>[264520.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6a80] width 1920 pitch 7680 (/4 1920)
>[264520.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[264520.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[264520.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6a80]
>[264520.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6a80] width 1920 pitch 7680 (/4 1920)
>[264520.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[264520.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[264520.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6a80]
>[264520.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6a80] width 1920 pitch 7680 (/4 1920)
>[264520.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[264520.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[264520.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25204b0]
>[264520.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25204b0] width 1920 pitch 7680 (/4 1920)
>[264520.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[264521.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[264523.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f450]
>[264523.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f450] width 1920 pitch 7680 (/4 1920)
>[264523.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25204b0]
>[264523.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25204b0] width 1920 pitch 7680 (/4 1920)
>[264523.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f450]
>[264523.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f450] width 1920 pitch 7680 (/4 1920)
>[264523.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6a80]
>[264523.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6a80] width 1920 pitch 7680 (/4 1920)
>[264523.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f450]
>[264523.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f450] width 1920 pitch 7680 (/4 1920)
>[264523.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6a80]
>[264523.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6a80] width 1920 pitch 7680 (/4 1920)
>[264523.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f450]
>[264523.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f450] width 1920 pitch 7680 (/4 1920)
>[264524.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcd710]
>[264524.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcd710] width 1920 pitch 7680 (/4 1920)
>[264525.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcd710]
>[264525.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcd710] width 1920 pitch 7680 (/4 1920)
>[264525.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2483770]
>[264525.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2483770] width 1920 pitch 7680 (/4 1920)
>[264525.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2483770]
>[264525.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2483770] width 1920 pitch 7680 (/4 1920)
>[264525.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2483770]
>[264525.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2483770] width 1920 pitch 7680 (/4 1920)
>[264526.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264526.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264526.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[264526.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[264526.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264526.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264526.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[264526.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[264526.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264526.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264526.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[264526.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[264526.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264526.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264526.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[264526.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[264526.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10850]
>[264526.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10850] width 1920 pitch 7680 (/4 1920)
>[264526.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d077f0]
>[264526.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d077f0] width 1920 pitch 7680 (/4 1920)
>[264526.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10850]
>[264526.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10850] width 1920 pitch 7680 (/4 1920)
>[264530.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf4eb0]
>[264531.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf4eb0] width 1920 pitch 7680 (/4 1920)
>[264531.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede870]
>[264531.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede870] width 1920 pitch 7680 (/4 1920)
>[264531.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d077f0]
>[264531.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d077f0] width 1920 pitch 7680 (/4 1920)
>[264531.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede870]
>[264531.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede870] width 1920 pitch 7680 (/4 1920)
>[264531.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d077f0]
>[264531.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d077f0] width 1920 pitch 7680 (/4 1920)
>[264531.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede870]
>[264531.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede870] width 1920 pitch 7680 (/4 1920)
>[264532.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede870]
>[264532.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede870] width 1920 pitch 7680 (/4 1920)
>[264532.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d077f0]
>[264532.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d077f0] width 1920 pitch 7680 (/4 1920)
>[264532.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ede870]
>[264532.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ede870] width 1920 pitch 7680 (/4 1920)
>[264532.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d077f0]
>[264532.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d077f0] width 1920 pitch 7680 (/4 1920)
>[264532.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf4eb0]
>[264532.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf4eb0] width 1920 pitch 7680 (/4 1920)
>[264532.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d077f0]
>[264532.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d077f0] width 1920 pitch 7680 (/4 1920)
>[264549.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a4c0]
>[264549.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a4c0] width 1920 pitch 7680 (/4 1920)
>[264563.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[264563.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[264563.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3f1b0]
>[264563.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3f1b0] width 1920 pitch 7680 (/4 1920)
>[264563.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1ae0]
>[264564.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1ae0] width 1920 pitch 7680 (/4 1920)
>[264564.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede360]
>[264564.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede360] width 1920 pitch 7680 (/4 1920)
>[264564.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264564.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264564.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ede360]
>[264564.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ede360] width 1920 pitch 7680 (/4 1920)
>[264564.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[264564.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[264570.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3920]
>[264570.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3920] width 1920 pitch 7680 (/4 1920)
>[264579.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4030120]
>[264579.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4030120] width 1920 pitch 7680 (/4 1920)
>[264609.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6a40]
>[264609.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6a40] width 1920 pitch 7680 (/4 1920)
>[264639.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10c60]
>[264639.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10c60] width 1920 pitch 7680 (/4 1920)
>[264654.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d280]
>[264654.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d280] width 1920 pitch 7680 (/4 1920)
>[264669.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264669.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264714.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67d40]
>[264714.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67d40] width 1920 pitch 7680 (/4 1920)
>[264729.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67d40]
>[264729.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67d40] width 1920 pitch 7680 (/4 1920)
>[264759.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4bc60]
>[264759.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4bc60] width 1920 pitch 7680 (/4 1920)
>[264774.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f10c60]
>[264774.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f10c60] width 1920 pitch 7680 (/4 1920)
>[264789.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddfba0]
>[264789.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddfba0] width 1920 pitch 7680 (/4 1920)
>[264804.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[264804.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[264819.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddfba0]
>[264819.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddfba0] width 1920 pitch 7680 (/4 1920)
>[264834.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a80]
>[264834.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a80] width 1920 pitch 7680 (/4 1920)
>[264864.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdba50]
>[264864.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdba50] width 1920 pitch 7680 (/4 1920)
>[264894.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253d280]
>[264894.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253d280] width 1920 pitch 7680 (/4 1920)
>[264909.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[264909.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[264924.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddfba0]
>[264924.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddfba0] width 1920 pitch 7680 (/4 1920)
>[264969.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[264969.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[264984.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[264984.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[264999.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[264999.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[265014.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[265014.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[265029.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265029.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265044.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265044.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265059.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265059.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265074.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265074.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265089.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[265089.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[265104.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265104.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265119.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265119.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265134.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265134.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265149.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265149.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265164.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265164.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265179.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[265179.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[265209.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265209.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265224.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265224.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265239.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[265239.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[265254.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[265254.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[265269.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265269.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265284.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[265284.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[265299.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03d60]
>[265299.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03d60] width 1920 pitch 7680 (/4 1920)
>[265314.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[265314.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[265329.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03d60]
>[265329.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03d60] width 1920 pitch 7680 (/4 1920)
>[265344.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265344.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265359.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265359.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265374.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265374.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265389.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265389.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265402.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265402.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265403.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265403.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265403.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265403.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265403.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265403.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265404.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03d60]
>[265404.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03d60] width 1920 pitch 7680 (/4 1920)
>[265434.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265434.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265442.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[265442.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[265443.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265443.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265443.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265443.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265443.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265443.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265449.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265449.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265464.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f160]
>[265464.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f160] width 1920 pitch 7680 (/4 1920)
>[265479.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265479.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265494.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265494.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265509.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265509.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265524.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265524.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265539.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265539.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265554.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265554.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265569.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265569.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265584.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265584.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265614.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265614.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265629.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265629.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265659.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265659.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265674.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265674.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265687.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265687.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265687.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265687.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265687.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265687.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265687.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265687.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265687.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265687.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265687.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265687.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265687.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265688.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265688.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265688.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265688.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40361e0]
>[265688.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40361e0] width 1920 pitch 7680 (/4 1920)
>[265688.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265688.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265688.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265688.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265688.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1db50]
>[265688.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1db50] width 1920 pitch 7680 (/4 1920)
>[265688.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3904d20]
>[265688.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3904d20] width 1920 pitch 7680 (/4 1920)
>[265688.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1db50]
>[265688.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1db50] width 1920 pitch 7680 (/4 1920)
>[265688.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1db50]
>[265688.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1db50] width 1920 pitch 7680 (/4 1920)
>[265688.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4a90]
>[265688.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4a90] width 1920 pitch 7680 (/4 1920)
>[265689.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1db50]
>[265689.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1db50] width 1920 pitch 7680 (/4 1920)
>[265689.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93be0]
>[265689.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93be0] width 1920 pitch 7680 (/4 1920)
>[265690.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4a90]
>[265690.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4a90] width 1920 pitch 7680 (/4 1920)
>[265690.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a087f0]
>[265690.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a087f0] width 1920 pitch 7680 (/4 1920)
>[265690.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265690.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265690.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93be0]
>[265690.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93be0] width 1920 pitch 7680 (/4 1920)
>[265691.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93be0]
>[265691.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93be0] width 1920 pitch 7680 (/4 1920)
>[265692.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93be0]
>[265692.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93be0] width 1920 pitch 7680 (/4 1920)
>[265692.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e03d60]
>[265692.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e03d60] width 1920 pitch 7680 (/4 1920)
>[265692.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265692.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265704.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[265704.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[265719.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93be0]
>[265719.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93be0] width 1920 pitch 7680 (/4 1920)
>[265745.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265745.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265745.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265745.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265745.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e314f0]
>[265745.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e314f0] width 1920 pitch 7680 (/4 1920)
>[265745.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265745.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265749.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265749.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265750.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256ac10]
>[265750.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256ac10] width 1920 pitch 7680 (/4 1920)
>[265751.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265751.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265751.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[265751.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[265751.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[265751.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[265751.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265751.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265751.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265751.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265751.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265751.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265751.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265751.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265751.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[265751.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[265751.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265751.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265751.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[265751.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[265751.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265751.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265752.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265752.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265752.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265752.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265752.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265752.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265752.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b117b0]
>[265752.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b117b0] width 1920 pitch 7680 (/4 1920)
>[265754.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93a40]
>[265754.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93a40] width 1920 pitch 7680 (/4 1920)
>[265754.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265754.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265754.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93a40]
>[265754.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93a40] width 1920 pitch 7680 (/4 1920)
>[265754.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[265754.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[265755.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265755.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265755.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265755.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265755.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265755.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265755.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265755.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265755.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265755.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265755.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265755.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265755.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265755.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265764.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b870c0]
>[265764.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b870c0] width 1920 pitch 7680 (/4 1920)
>[265779.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93a40]
>[265779.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93a40] width 1920 pitch 7680 (/4 1920)
>[265794.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[265794.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[265809.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9b300]
>[265809.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9b300] width 1920 pitch 7680 (/4 1920)
>[265834.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bc20]
>[265834.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bc20] width 1920 pitch 7680 (/4 1920)
>[265839.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3d9a0]
>[265839.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3d9a0] width 1920 pitch 7680 (/4 1920)
>[265840.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea08f0]
>[265840.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea08f0] width 1920 pitch 7680 (/4 1920)
>[265840.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3d9a0]
>[265840.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3d9a0] width 1920 pitch 7680 (/4 1920)
>[265840.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b90e60]
>[265840.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b90e60] width 1920 pitch 7680 (/4 1920)
>[265840.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e190]
>[265840.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e190] width 1920 pitch 7680 (/4 1920)
>[265840.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3ed70]
>[265840.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3ed70] width 1920 pitch 7680 (/4 1920)
>[265840.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3d9a0]
>[265840.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3d9a0] width 1920 pitch 7680 (/4 1920)
>[265840.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f321c0]
>[265840.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f321c0] width 1920 pitch 7680 (/4 1920)
>[265840.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f321c0]
>[265840.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f321c0] width 1920 pitch 7680 (/4 1920)
>[265840.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f4d80]
>[265840.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f4d80] width 1920 pitch 7680 (/4 1920)
>[265854.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x311a260]
>[265854.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x311a260] width 1920 pitch 7680 (/4 1920)
>[265857.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9d350]
>[265857.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9d350] width 1920 pitch 7680 (/4 1920)
>[265857.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d485b0]
>[265857.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d485b0] width 1920 pitch 7680 (/4 1920)
>[265857.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9d350]
>[265857.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9d350] width 1920 pitch 7680 (/4 1920)
>[265857.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9d350]
>[265857.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9d350] width 1920 pitch 7680 (/4 1920)
>[265857.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d485b0]
>[265857.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d485b0] width 1920 pitch 7680 (/4 1920)
>[265857.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9d350]
>[265857.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9d350] width 1920 pitch 7680 (/4 1920)
>[265857.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d485b0]
>[265857.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d485b0] width 1920 pitch 7680 (/4 1920)
>[265857.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9d350]
>[265857.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9d350] width 1920 pitch 7680 (/4 1920)
>[265859.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36c50]
>[265859.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36c50] width 1920 pitch 7680 (/4 1920)
>[265859.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d1d0]
>[265859.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d1d0] width 1920 pitch 7680 (/4 1920)
>[265859.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36c50]
>[265859.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36c50] width 1920 pitch 7680 (/4 1920)
>[265859.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bed0]
>[265859.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bed0] width 1920 pitch 7680 (/4 1920)
>[265859.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36c50]
>[265859.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36c50] width 1920 pitch 7680 (/4 1920)
>[265859.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bed0]
>[265859.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bed0] width 1920 pitch 7680 (/4 1920)
>[265859.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36c50]
>[265859.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36c50] width 1920 pitch 7680 (/4 1920)
>[265859.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bed0]
>[265859.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bed0] width 1920 pitch 7680 (/4 1920)
>[265859.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36c50]
>[265859.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36c50] width 1920 pitch 7680 (/4 1920)
>[265859.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8bed0]
>[265859.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8bed0] width 1920 pitch 7680 (/4 1920)
>[265869.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c90]
>[265869.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c90] width 1920 pitch 7680 (/4 1920)
>[265877.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf4b0]
>[265877.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf4b0] width 1920 pitch 7680 (/4 1920)
>[265877.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265877.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265877.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf4b0]
>[265877.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf4b0] width 1920 pitch 7680 (/4 1920)
>[265877.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265877.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265877.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf4b0]
>[265877.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf4b0] width 1920 pitch 7680 (/4 1920)
>[265877.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265877.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265877.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf4b0]
>[265877.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf4b0] width 1920 pitch 7680 (/4 1920)
>[265881.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf4b0]
>[265881.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf4b0] width 1920 pitch 7680 (/4 1920)
>[265881.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265881.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265881.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf4b0]
>[265881.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf4b0] width 1920 pitch 7680 (/4 1920)
>[265881.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265881.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265881.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f770]
>[265881.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f770] width 1920 pitch 7680 (/4 1920)
>[265881.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265881.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265881.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f770]
>[265881.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f770] width 1920 pitch 7680 (/4 1920)
>[265881.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265881.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265883.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0830]
>[265883.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0830] width 1920 pitch 7680 (/4 1920)
>[265883.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0830]
>[265883.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0830] width 1920 pitch 7680 (/4 1920)
>[265883.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0830]
>[265883.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0830] width 1920 pitch 7680 (/4 1920)
>[265883.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0830]
>[265883.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0830] width 1920 pitch 7680 (/4 1920)
>[265884.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d510a0]
>[265884.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d510a0] width 1920 pitch 7680 (/4 1920)
>[265885.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6040]
>[265885.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6040] width 1920 pitch 7680 (/4 1920)
>[265899.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c310]
>[265899.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c310] width 1920 pitch 7680 (/4 1920)
>[265914.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd46b0]
>[265914.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd46b0] width 1920 pitch 7680 (/4 1920)
>[265929.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6040]
>[265929.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6040] width 1920 pitch 7680 (/4 1920)
>[265944.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcfd90]
>[265944.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcfd90] width 1920 pitch 7680 (/4 1920)
>[265959.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c310]
>[265959.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c310] width 1920 pitch 7680 (/4 1920)
>[265974.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[265974.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[265989.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[265989.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[265997.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b870]
>[265997.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b870] width 1920 pitch 7680 (/4 1920)
>[266004.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266004.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266019.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266019.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266034.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b870]
>[266034.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b870] width 1920 pitch 7680 (/4 1920)
>[266049.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b37130]
>[266049.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b37130] width 1920 pitch 7680 (/4 1920)
>[266064.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266064.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266064.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266064.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266064.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266064.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266064.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266064.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266064.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b37130]
>[266064.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b37130] width 1920 pitch 7680 (/4 1920)
>[266064.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256ac10]
>[266064.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256ac10] width 1920 pitch 7680 (/4 1920)
>[266064.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcaba0]
>[266064.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcaba0] width 1920 pitch 7680 (/4 1920)
>[266064.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266064.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266064.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e480]
>[266064.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e480] width 1920 pitch 7680 (/4 1920)
>[266064.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01740]
>[266064.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01740] width 1920 pitch 7680 (/4 1920)
>[266065.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266065.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266065.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266065.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266065.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e480]
>[266065.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e480] width 1920 pitch 7680 (/4 1920)
>[266065.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266065.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266066.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266066.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266066.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266066.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266066.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266066.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266066.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266066.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266066.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c040]
>[266066.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c040] width 1920 pitch 7680 (/4 1920)
>[266066.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266066.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266066.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c040]
>[266066.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c040] width 1920 pitch 7680 (/4 1920)
>[266067.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266067.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266067.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266067.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266067.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266067.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266068.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266068.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266068.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266068.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266068.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266068.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266068.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266068.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266068.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2d70]
>[266068.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2d70] width 1920 pitch 7680 (/4 1920)
>[266068.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e480]
>[266068.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e480] width 1920 pitch 7680 (/4 1920)
>[266068.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266068.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266068.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266068.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266068.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266068.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266069.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266069.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266069.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c000]
>[266069.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c000] width 1920 pitch 7680 (/4 1920)
>[266069.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019060]
>[266069.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019060] width 1920 pitch 7680 (/4 1920)
>[266069.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c000]
>[266069.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c000] width 1920 pitch 7680 (/4 1920)
>[266069.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddee0]
>[266069.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddee0] width 1920 pitch 7680 (/4 1920)
>[266069.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fac0c0]
>[266069.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fac0c0] width 1920 pitch 7680 (/4 1920)
>[266070.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c7a0]
>[266070.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c7a0] width 1920 pitch 7680 (/4 1920)
>[266070.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fac1f0]
>[266070.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fac1f0] width 1920 pitch 7680 (/4 1920)
>[266070.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c7a0]
>[266070.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c7a0] width 1920 pitch 7680 (/4 1920)
>[266070.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fac1f0]
>[266070.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fac1f0] width 1920 pitch 7680 (/4 1920)
>[266071.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f6130]
>[266071.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f6130] width 1920 pitch 7680 (/4 1920)
>[266071.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266071.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266071.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77260]
>[266071.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77260] width 1920 pitch 7680 (/4 1920)
>[266071.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266071.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266071.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77260]
>[266072.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77260] width 1920 pitch 7680 (/4 1920)
>[266072.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266072.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266072.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266072.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266072.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266072.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266072.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266072.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266072.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266072.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266072.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77260]
>[266072.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77260] width 1920 pitch 7680 (/4 1920)
>[266072.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266072.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266072.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266072.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266073.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266073.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266073.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266073.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266073.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266073.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266073.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266073.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266073.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266073.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266073.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266074.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266074.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266074.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266074.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2080]
>[266074.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2080] width 1920 pitch 7680 (/4 1920)
>[266074.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266074.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266074.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266074.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266074.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266074.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266074.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[266074.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[266074.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[266074.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[266077.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39565f0]
>[266077.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39565f0] width 1920 pitch 7680 (/4 1920)
>[266077.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab810]
>[266077.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab810] width 1920 pitch 7680 (/4 1920)
>[266077.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f86550]
>[266077.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f86550] width 1920 pitch 7680 (/4 1920)
>[266077.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f864f0]
>[266077.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f864f0] width 1920 pitch 7680 (/4 1920)
>[266077.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f865d0]
>[266077.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f865d0] width 1920 pitch 7680 (/4 1920)
>[266077.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f863a0]
>[266077.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f863a0] width 1920 pitch 7680 (/4 1920)
>[266079.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f86680]
>[266079.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f86680] width 1920 pitch 7680 (/4 1920)
>[266086.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c033b0]
>[266086.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c033b0] width 1920 pitch 7680 (/4 1920)
>[266094.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c03400]
>[266094.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c03400] width 1920 pitch 7680 (/4 1920)
>[266106.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c03400]
>[266106.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c03400] width 1920 pitch 7680 (/4 1920)
>[266106.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1fa0]
>[266106.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1fa0] width 1920 pitch 7680 (/4 1920)
>[266106.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d71e60]
>[266106.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d71e60] width 1920 pitch 7680 (/4 1920)
>[266106.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1fa0]
>[266106.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1fa0] width 1920 pitch 7680 (/4 1920)
>[266106.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d71e60]
>[266106.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d71e60] width 1920 pitch 7680 (/4 1920)
>[266106.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3050]
>[266106.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3050] width 1920 pitch 7680 (/4 1920)
>[266109.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eacc90]
>[266109.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eacc90] width 1920 pitch 7680 (/4 1920)
>[266110.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cd170]
>[266110.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cd170] width 1920 pitch 7680 (/4 1920)
>[266124.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391dcf0]
>[266124.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391dcf0] width 1920 pitch 7680 (/4 1920)
>[266130.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e0800]
>[266130.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e0800] width 1920 pitch 7680 (/4 1920)
>[266141.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7ca0]
>[266141.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7ca0] width 1920 pitch 7680 (/4 1920)
>[266143.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7dc0]
>[266143.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7dc0] width 1920 pitch 7680 (/4 1920)
>[266143.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be07a0]
>[266143.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be07a0] width 1920 pitch 7680 (/4 1920)
>[266154.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7ca0]
>[266154.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7ca0] width 1920 pitch 7680 (/4 1920)
>[266169.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6760]
>[266169.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6760] width 1920 pitch 7680 (/4 1920)
>[266184.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7ca0]
>[266184.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7ca0] width 1920 pitch 7680 (/4 1920)
>[266199.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9e630]
>[266199.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9e630] width 1920 pitch 7680 (/4 1920)
>[266214.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcab40]
>[266214.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcab40] width 1920 pitch 7680 (/4 1920)
>[266244.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af16b0]
>[266244.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af16b0] width 1920 pitch 7680 (/4 1920)
>[266259.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1a380]
>[266259.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1a380] width 1920 pitch 7680 (/4 1920)
>[266289.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c34a30]
>[266289.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c34a30] width 1920 pitch 7680 (/4 1920)
>[266310.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1a380]
>[266310.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1a380] width 1920 pitch 7680 (/4 1920)
>[266312.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c34a30]
>[266312.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c34a30] width 1920 pitch 7680 (/4 1920)
>[266312.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a04140]
>[266312.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a04140] width 1920 pitch 7680 (/4 1920)
>[266312.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1a380]
>[266312.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1a380] width 1920 pitch 7680 (/4 1920)
>[266312.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c34a30]
>[266312.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c34a30] width 1920 pitch 7680 (/4 1920)
>[266312.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d78940]
>[266312.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d78940] width 1920 pitch 7680 (/4 1920)
>[266319.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cebf10]
>[266319.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cebf10] width 1920 pitch 7680 (/4 1920)
>[266319.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef86a0]
>[266319.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef86a0] width 1920 pitch 7680 (/4 1920)
>[266325.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f577b0]
>[266325.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f577b0] width 1920 pitch 7680 (/4 1920)
>[266325.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252ebc0]
>[266325.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252ebc0] width 1920 pitch 7680 (/4 1920)
>[266325.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d073f0]
>[266325.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d073f0] width 1920 pitch 7680 (/4 1920)
>[266325.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f20630]
>[266325.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f20630] width 1920 pitch 7680 (/4 1920)
>[266325.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c70]
>[266325.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c70] width 1920 pitch 7680 (/4 1920)
>[266325.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d074e0]
>[266325.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d074e0] width 1920 pitch 7680 (/4 1920)
>[266325.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7c70]
>[266325.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7c70] width 1920 pitch 7680 (/4 1920)
>[266325.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d074e0]
>[266325.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d074e0] width 1920 pitch 7680 (/4 1920)
>[266325.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253b790]
>[266325.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253b790] width 1920 pitch 7680 (/4 1920)
>[266329.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee520]
>[266329.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee520] width 1920 pitch 7680 (/4 1920)
>[266329.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d073f0]
>[266329.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d073f0] width 1920 pitch 7680 (/4 1920)
>[266329.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d073f0]
>[266329.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d073f0] width 1920 pitch 7680 (/4 1920)
>[266329.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d073f0]
>[266329.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d073f0] width 1920 pitch 7680 (/4 1920)
>[266337.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dcb40]
>[266337.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dcb40] width 1920 pitch 7680 (/4 1920)
>[266339.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3430]
>[266339.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3430] width 1920 pitch 7680 (/4 1920)
>[266339.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec31d0]
>[266339.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec31d0] width 1920 pitch 7680 (/4 1920)
>[266339.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3430]
>[266339.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3430] width 1920 pitch 7680 (/4 1920)
>[266339.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec31d0]
>[266340.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec31d0] width 1920 pitch 7680 (/4 1920)
>[266340.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3430]
>[266340.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3430] width 1920 pitch 7680 (/4 1920)
>[266340.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec31d0]
>[266340.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec31d0] width 1920 pitch 7680 (/4 1920)
>[266340.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3430]
>[266340.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3430] width 1920 pitch 7680 (/4 1920)
>[266340.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec31d0]
>[266340.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec31d0] width 1920 pitch 7680 (/4 1920)
>[266340.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02530]
>[266340.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02530] width 1920 pitch 7680 (/4 1920)
>[266340.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db0f0]
>[266340.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db0f0] width 1920 pitch 7680 (/4 1920)
>[266340.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02530]
>[266340.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02530] width 1920 pitch 7680 (/4 1920)
>[266340.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db0f0]
>[266340.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db0f0] width 1920 pitch 7680 (/4 1920)
>[266340.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02530]
>[266340.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02530] width 1920 pitch 7680 (/4 1920)
>[266340.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db0f0]
>[266341.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db0f0] width 1920 pitch 7680 (/4 1920)
>[266341.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02530]
>[266341.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02530] width 1920 pitch 7680 (/4 1920)
>[266341.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db0f0]
>[266341.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db0f0] width 1920 pitch 7680 (/4 1920)
>[266341.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02530]
>[266341.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02530] width 1920 pitch 7680 (/4 1920)
>[266341.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db0f0]
>[266341.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db0f0] width 1920 pitch 7680 (/4 1920)
>[266342.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec3f0]
>[266342.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec3f0] width 1920 pitch 7680 (/4 1920)
>[266342.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ced580]
>[266342.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ced580] width 1920 pitch 7680 (/4 1920)
>[266342.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec3f0]
>[266342.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec3f0] width 1920 pitch 7680 (/4 1920)
>[266342.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec3f0]
>[266343.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec3f0] width 1920 pitch 7680 (/4 1920)
>[266364.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84430]
>[266364.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84430] width 1920 pitch 7680 (/4 1920)
>[266366.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9a4a0]
>[266366.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9a4a0] width 1920 pitch 7680 (/4 1920)
>[266366.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e530]
>[266366.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e530] width 1920 pitch 7680 (/4 1920)
>[266366.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9a4a0]
>[266367.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9a4a0] width 1920 pitch 7680 (/4 1920)
>[266367.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e530]
>[266367.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e530] width 1920 pitch 7680 (/4 1920)
>[266367.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec25a0]
>[266367.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec25a0] width 1920 pitch 7680 (/4 1920)
>[266367.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e530]
>[266367.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e530] width 1920 pitch 7680 (/4 1920)
>[266367.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec25a0]
>[266367.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec25a0] width 1920 pitch 7680 (/4 1920)
>[266367.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e530]
>[266367.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e530] width 1920 pitch 7680 (/4 1920)
>[266367.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec25a0]
>[266367.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec25a0] width 1920 pitch 7680 (/4 1920)
>[266367.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e530]
>[266367.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e530] width 1920 pitch 7680 (/4 1920)
>[266376.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4520]
>[266376.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4520] width 1920 pitch 7680 (/4 1920)
>[266376.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0de30]
>[266376.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0de30] width 1920 pitch 7680 (/4 1920)
>[266376.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4520]
>[266376.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4520] width 1920 pitch 7680 (/4 1920)
>[266376.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0de30]
>[266376.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0de30] width 1920 pitch 7680 (/4 1920)
>[266376.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4520]
>[266376.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4520] width 1920 pitch 7680 (/4 1920)
>[266376.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0de30]
>[266376.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0de30] width 1920 pitch 7680 (/4 1920)
>[266376.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4520]
>[266377.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4520] width 1920 pitch 7680 (/4 1920)
>[266377.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0de30]
>[266377.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0de30] width 1920 pitch 7680 (/4 1920)
>[266381.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7b10]
>[266381.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7b10] width 1920 pitch 7680 (/4 1920)
>[266381.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd7b10]
>[266381.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd7b10] width 1920 pitch 7680 (/4 1920)
>[266381.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f7160]
>[266381.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f7160] width 1920 pitch 7680 (/4 1920)
>[266381.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd640]
>[266381.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd640] width 1920 pitch 7680 (/4 1920)
>[266392.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f9d0]
>[266392.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f9d0] width 1920 pitch 7680 (/4 1920)
>[266392.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9de0]
>[266392.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9de0] width 1920 pitch 7680 (/4 1920)
>[266392.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f9d0]
>[266392.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f9d0] width 1920 pitch 7680 (/4 1920)
>[266392.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9de0]
>[266392.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9de0] width 1920 pitch 7680 (/4 1920)
>[266392.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f9d0]
>[266392.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f9d0] width 1920 pitch 7680 (/4 1920)
>[266392.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9de0]
>[266392.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9de0] width 1920 pitch 7680 (/4 1920)
>[266392.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f9d0]
>[266392.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f9d0] width 1920 pitch 7680 (/4 1920)
>[266392.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9de0]
>[266392.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9de0] width 1920 pitch 7680 (/4 1920)
>[266392.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f9d0]
>[266392.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f9d0] width 1920 pitch 7680 (/4 1920)
>[266393.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff230]
>[266393.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff230] width 1920 pitch 7680 (/4 1920)
>[266393.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9c80]
>[266393.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9c80] width 1920 pitch 7680 (/4 1920)
>[266393.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff230]
>[266394.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff230] width 1920 pitch 7680 (/4 1920)
>[266394.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9c80]
>[266394.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9c80] width 1920 pitch 7680 (/4 1920)
>[266394.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff230]
>[266394.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff230] width 1920 pitch 7680 (/4 1920)
>[266394.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9c80]
>[266394.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9c80] width 1920 pitch 7680 (/4 1920)
>[266394.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff230]
>[266394.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff230] width 1920 pitch 7680 (/4 1920)
>[266394.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9c80]
>[266394.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9c80] width 1920 pitch 7680 (/4 1920)
>[266394.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec2890]
>[266394.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec2890] width 1920 pitch 7680 (/4 1920)
>[266398.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e300]
>[266398.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e300] width 1920 pitch 7680 (/4 1920)
>[266398.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7ec80]
>[266398.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7ec80] width 1920 pitch 7680 (/4 1920)
>[266398.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e300]
>[266398.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e300] width 1920 pitch 7680 (/4 1920)
>[266398.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7ec80]
>[266398.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7ec80] width 1920 pitch 7680 (/4 1920)
>[266398.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e300]
>[266398.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e300] width 1920 pitch 7680 (/4 1920)
>[266398.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7ec80]
>[266398.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7ec80] width 1920 pitch 7680 (/4 1920)
>[266398.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e300]
>[266398.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e300] width 1920 pitch 7680 (/4 1920)
>[266398.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7ec80]
>[266398.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7ec80] width 1920 pitch 7680 (/4 1920)
>[266398.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e300]
>[266398.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e300] width 1920 pitch 7680 (/4 1920)
>[266398.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7ec80]
>[266398.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7ec80] width 1920 pitch 7680 (/4 1920)
>[266399.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d207e0]
>[266399.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d207e0] width 1920 pitch 7680 (/4 1920)
>[266399.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30634b0]
>[266399.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30634b0] width 1920 pitch 7680 (/4 1920)
>[266399.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dcb0]
>[266399.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dcb0] width 1920 pitch 7680 (/4 1920)
>[266399.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5c60]
>[266399.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5c60] width 1920 pitch 7680 (/4 1920)
>[266399.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dcb0]
>[266399.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dcb0] width 1920 pitch 7680 (/4 1920)
>[266399.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5c60]
>[266399.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5c60] width 1920 pitch 7680 (/4 1920)
>[266399.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30634b0]
>[266399.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30634b0] width 1920 pitch 7680 (/4 1920)
>[266400.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a510]
>[266400.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a510] width 1920 pitch 7680 (/4 1920)
>[266400.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301dc90]
>[266400.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301dc90] width 1920 pitch 7680 (/4 1920)
>[266400.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a510]
>[266400.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a510] width 1920 pitch 7680 (/4 1920)
>[266400.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301dc90]
>[266400.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301dc90] width 1920 pitch 7680 (/4 1920)
>[266400.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a510]
>[266400.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a510] width 1920 pitch 7680 (/4 1920)
>[266400.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301dc90]
>[266400.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301dc90] width 1920 pitch 7680 (/4 1920)
>[266400.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a510]
>[266400.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a510] width 1920 pitch 7680 (/4 1920)
>[266400.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301dc90]
>[266400.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301dc90] width 1920 pitch 7680 (/4 1920)
>[266400.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a510]
>[266400.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a510] width 1920 pitch 7680 (/4 1920)
>[266401.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0e7d0]
>[266401.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0e7d0] width 1920 pitch 7680 (/4 1920)
>[266401.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5b70]
>[266401.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5b70] width 1920 pitch 7680 (/4 1920)
>[266401.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ab20]
>[266401.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ab20] width 1920 pitch 7680 (/4 1920)
>[266401.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5b70]
>[266401.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5b70] width 1920 pitch 7680 (/4 1920)
>[266401.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ab20]
>[266401.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ab20] width 1920 pitch 7680 (/4 1920)
>[266401.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5359c70]
>[266401.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5359c70] width 1920 pitch 7680 (/4 1920)
>[266401.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ab20]
>[266401.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ab20] width 1920 pitch 7680 (/4 1920)
>[266401.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5359c70]
>[266401.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5359c70] width 1920 pitch 7680 (/4 1920)
>[266401.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535ab20]
>[266401.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535ab20] width 1920 pitch 7680 (/4 1920)
>[266401.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5359c70]
>[266401.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5359c70] width 1920 pitch 7680 (/4 1920)
>[266406.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8f6b0]
>[266406.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8f6b0] width 1920 pitch 7680 (/4 1920)
>[266406.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8f3f0]
>[266406.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8f3f0] width 1920 pitch 7680 (/4 1920)
>[266406.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094bb0]
>[266406.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094bb0] width 1920 pitch 7680 (/4 1920)
>[266406.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8f3f0]
>[266406.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8f3f0] width 1920 pitch 7680 (/4 1920)
>[266406.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094bb0]
>[266406.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094bb0] width 1920 pitch 7680 (/4 1920)
>[266406.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8f900]
>[266406.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8f900] width 1920 pitch 7680 (/4 1920)
>[266406.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094bb0]
>[266406.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094bb0] width 1920 pitch 7680 (/4 1920)
>[266409.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f5c70]
>[266409.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f5c70] width 1920 pitch 7680 (/4 1920)
>[266409.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed8c10]
>[266409.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed8c10] width 1920 pitch 7680 (/4 1920)
>[266409.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed8ce0]
>[266409.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed8ce0] width 1920 pitch 7680 (/4 1920)
>[266409.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed8c10]
>[266409.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed8c10] width 1920 pitch 7680 (/4 1920)
>[266409.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed8ce0]
>[266409.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed8ce0] width 1920 pitch 7680 (/4 1920)
>[266409.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094d90]
>[266409.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094d90] width 1920 pitch 7680 (/4 1920)
>[266409.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed8ce0]
>[266409.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed8ce0] width 1920 pitch 7680 (/4 1920)
>[266409.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094d90]
>[266409.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094d90] width 1920 pitch 7680 (/4 1920)
>[266409.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed8ce0]
>[266409.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed8ce0] width 1920 pitch 7680 (/4 1920)
>[266409.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91a80]
>[266409.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91a80] width 1920 pitch 7680 (/4 1920)
>[266411.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094c10]
>[266411.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094c10] width 1920 pitch 7680 (/4 1920)
>[266411.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522970]
>[266412.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522970] width 1920 pitch 7680 (/4 1920)
>[266412.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094c10]
>[266412.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094c10] width 1920 pitch 7680 (/4 1920)
>[266412.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094c10]
>[266412.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094c10] width 1920 pitch 7680 (/4 1920)
>[266421.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda750]
>[266421.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda750] width 1920 pitch 7680 (/4 1920)
>[266421.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda3a0]
>[266421.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda3a0] width 1920 pitch 7680 (/4 1920)
>[266421.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda750]
>[266421.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda750] width 1920 pitch 7680 (/4 1920)
>[266421.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda3a0]
>[266421.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda3a0] width 1920 pitch 7680 (/4 1920)
>[266421.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda750]
>[266421.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda750] width 1920 pitch 7680 (/4 1920)
>[266421.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda3a0]
>[266421.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda3a0] width 1920 pitch 7680 (/4 1920)
>[266421.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda750]
>[266421.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda750] width 1920 pitch 7680 (/4 1920)
>[266421.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda3a0]
>[266421.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda3a0] width 1920 pitch 7680 (/4 1920)
>[266421.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db880]
>[266421.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db880] width 1920 pitch 7680 (/4 1920)
>[266421.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fc850]
>[266422.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fc850] width 1920 pitch 7680 (/4 1920)
>[266422.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db880]
>[266422.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db880] width 1920 pitch 7680 (/4 1920)
>[266422.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fc850]
>[266422.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fc850] width 1920 pitch 7680 (/4 1920)
>[266422.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db880]
>[266422.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db880] width 1920 pitch 7680 (/4 1920)
>[266422.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fc850]
>[266422.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fc850] width 1920 pitch 7680 (/4 1920)
>[266422.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db880]
>[266422.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db880] width 1920 pitch 7680 (/4 1920)
>[266422.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf8ac0]
>[266422.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf8ac0] width 1920 pitch 7680 (/4 1920)
>[266422.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db880]
>[266422.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db880] width 1920 pitch 7680 (/4 1920)
>[266423.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5f1c0]
>[266423.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5f1c0] width 1920 pitch 7680 (/4 1920)
>[266423.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28b00]
>[266423.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28b00] width 1920 pitch 7680 (/4 1920)
>[266423.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28b00]
>[266423.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28b00] width 1920 pitch 7680 (/4 1920)
>[266423.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fc850]
>[266423.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fc850] width 1920 pitch 7680 (/4 1920)
>[266425.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f040]
>[266425.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f040] width 1920 pitch 7680 (/4 1920)
>[266433.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253b990]
>[266433.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253b990] width 1920 pitch 7680 (/4 1920)
>[266439.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf3a0]
>[266439.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf3a0] width 1920 pitch 7680 (/4 1920)
>[266439.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fe4f0]
>[266439.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fe4f0] width 1920 pitch 7680 (/4 1920)
>[266439.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbe060]
>[266439.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbe060] width 1920 pitch 7680 (/4 1920)
>[266439.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbe060]
>[266439.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbe060] width 1920 pitch 7680 (/4 1920)
>[266439.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf3a0]
>[266439.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf3a0] width 1920 pitch 7680 (/4 1920)
>[266439.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf3a0]
>[266439.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf3a0] width 1920 pitch 7680 (/4 1920)
>[266446.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096b70]
>[266446.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096b70] width 1920 pitch 7680 (/4 1920)
>[266446.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357290]
>[266446.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357290] width 1920 pitch 7680 (/4 1920)
>[266446.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3095ca0]
>[266446.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3095ca0] width 1920 pitch 7680 (/4 1920)
>[266446.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357290]
>[266446.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357290] width 1920 pitch 7680 (/4 1920)
>[266446.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3095ca0]
>[266446.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3095ca0] width 1920 pitch 7680 (/4 1920)
>[266446.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357290]
>[266446.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357290] width 1920 pitch 7680 (/4 1920)
>[266446.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3095ca0]
>[266446.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3095ca0] width 1920 pitch 7680 (/4 1920)
>[266446.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357290]
>[266446.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357290] width 1920 pitch 7680 (/4 1920)
>[266446.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3095ca0]
>[266446.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3095ca0] width 1920 pitch 7680 (/4 1920)
>[266447.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e58f0]
>[266447.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e58f0] width 1920 pitch 7680 (/4 1920)
>[266447.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356b20]
>[266447.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356b20] width 1920 pitch 7680 (/4 1920)
>[266447.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30996b0]
>[266447.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30996b0] width 1920 pitch 7680 (/4 1920)
>[266447.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356b20]
>[266447.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356b20] width 1920 pitch 7680 (/4 1920)
>[266447.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30996b0]
>[266447.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30996b0] width 1920 pitch 7680 (/4 1920)
>[266447.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356b20]
>[266447.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356b20] width 1920 pitch 7680 (/4 1920)
>[266447.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30996b0]
>[266447.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30996b0] width 1920 pitch 7680 (/4 1920)
>[266447.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ee50]
>[266447.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ee50] width 1920 pitch 7680 (/4 1920)
>[266447.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30996b0]
>[266447.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30996b0] width 1920 pitch 7680 (/4 1920)
>[266447.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5369c60]
>[266448.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5369c60] width 1920 pitch 7680 (/4 1920)
>[266448.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8ee50]
>[266448.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8ee50] width 1920 pitch 7680 (/4 1920)
>[266448.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feb690]
>[266448.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feb690] width 1920 pitch 7680 (/4 1920)
>[266448.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feb690]
>[266448.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feb690] width 1920 pitch 7680 (/4 1920)
>[266450.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feb690]
>[266450.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feb690] width 1920 pitch 7680 (/4 1920)
>[266452.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebc1e0]
>[266452.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebc1e0] width 1920 pitch 7680 (/4 1920)
>[266454.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4240]
>[266454.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4240] width 1920 pitch 7680 (/4 1920)
>[266458.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eac2d0]
>[266459.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eac2d0] width 1920 pitch 7680 (/4 1920)
>[266464.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2525d70]
>[266464.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2525d70] width 1920 pitch 7680 (/4 1920)
>[266464.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab080]
>[266464.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab080] width 1920 pitch 7680 (/4 1920)
>[266464.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964d10]
>[266464.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964d10] width 1920 pitch 7680 (/4 1920)
>[266464.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d515d0]
>[266464.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d515d0] width 1920 pitch 7680 (/4 1920)
>[266464.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3964d10]
>[266464.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3964d10] width 1920 pitch 7680 (/4 1920)
>[266464.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6af90]
>[266464.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6af90] width 1920 pitch 7680 (/4 1920)
>[266464.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbd410]
>[266464.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbd410] width 1920 pitch 7680 (/4 1920)
>[266464.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3101920]
>[266464.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3101920] width 1920 pitch 7680 (/4 1920)
>[266464.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbd410]
>[266464.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbd410] width 1920 pitch 7680 (/4 1920)
>[266464.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3101920]
>[266464.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3101920] width 1920 pitch 7680 (/4 1920)
>[266464.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3101920]
>[266465.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3101920] width 1920 pitch 7680 (/4 1920)
>[266469.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c1e0]
>[266469.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c1e0] width 1920 pitch 7680 (/4 1920)
>[266470.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166180]
>[266470.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166180] width 1920 pitch 7680 (/4 1920)
>[266470.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165e50]
>[266470.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165e50] width 1920 pitch 7680 (/4 1920)
>[266470.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a940]
>[266470.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a940] width 1920 pitch 7680 (/4 1920)
>[266470.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165e50]
>[266470.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165e50] width 1920 pitch 7680 (/4 1920)
>[266470.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf0f0]
>[266470.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf0f0] width 1920 pitch 7680 (/4 1920)
>[266470.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165e50]
>[266470.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165e50] width 1920 pitch 7680 (/4 1920)
>[266470.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf0f0]
>[266470.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf0f0] width 1920 pitch 7680 (/4 1920)
>[266470.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a940]
>[266470.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a940] width 1920 pitch 7680 (/4 1920)
>[266470.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf0f0]
>[266470.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf0f0] width 1920 pitch 7680 (/4 1920)
>[266470.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a940]
>[266470.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a940] width 1920 pitch 7680 (/4 1920)
>[266471.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028580]
>[266471.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028580] width 1920 pitch 7680 (/4 1920)
>[266471.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1e920]
>[266471.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1e920] width 1920 pitch 7680 (/4 1920)
>[266471.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e5d0]
>[266471.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e5d0] width 1920 pitch 7680 (/4 1920)
>[266471.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028580]
>[266471.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028580] width 1920 pitch 7680 (/4 1920)
>[266471.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a844d0]
>[266471.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a844d0] width 1920 pitch 7680 (/4 1920)
>[266471.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30caf70]
>[266471.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30caf70] width 1920 pitch 7680 (/4 1920)
>[266471.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a844d0]
>[266471.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a844d0] width 1920 pitch 7680 (/4 1920)
>[266471.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30caf70]
>[266471.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30caf70] width 1920 pitch 7680 (/4 1920)
>[266471.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a844d0]
>[266471.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a844d0] width 1920 pitch 7680 (/4 1920)
>[266471.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03330]
>[266472.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03330] width 1920 pitch 7680 (/4 1920)
>[266472.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03330]
>[266472.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03330] width 1920 pitch 7680 (/4 1920)
>[266472.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f55b30]
>[266472.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f55b30] width 1920 pitch 7680 (/4 1920)
>[266472.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f55b30]
>[266472.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f55b30] width 1920 pitch 7680 (/4 1920)
>[266477.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b6e0]
>[266477.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b6e0] width 1920 pitch 7680 (/4 1920)
>[266480.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d70250]
>[266480.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d70250] width 1920 pitch 7680 (/4 1920)
>[266480.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5358ac0]
>[266480.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5358ac0] width 1920 pitch 7680 (/4 1920)
>[266480.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357a30]
>[266480.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357a30] width 1920 pitch 7680 (/4 1920)
>[266480.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5358ac0]
>[266480.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5358ac0] width 1920 pitch 7680 (/4 1920)
>[266480.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357a30]
>[266480.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357a30] width 1920 pitch 7680 (/4 1920)
>[266480.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5358ac0]
>[266480.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5358ac0] width 1920 pitch 7680 (/4 1920)
>[266480.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357a30]
>[266480.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357a30] width 1920 pitch 7680 (/4 1920)
>[266480.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5358ac0]
>[266480.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5358ac0] width 1920 pitch 7680 (/4 1920)
>[266480.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357a30]
>[266480.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357a30] width 1920 pitch 7680 (/4 1920)
>[266481.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e220]
>[266481.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e220] width 1920 pitch 7680 (/4 1920)
>[266481.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0dea0]
>[266481.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0dea0] width 1920 pitch 7680 (/4 1920)
>[266481.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b6e0]
>[266481.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b6e0] width 1920 pitch 7680 (/4 1920)
>[266481.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0dea0]
>[266482.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0dea0] width 1920 pitch 7680 (/4 1920)
>[266482.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b680]
>[266482.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b680] width 1920 pitch 7680 (/4 1920)
>[266482.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e989d0]
>[266482.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e989d0] width 1920 pitch 7680 (/4 1920)
>[266482.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ba80]
>[266482.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ba80] width 1920 pitch 7680 (/4 1920)
>[266482.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e989d0]
>[266482.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e989d0] width 1920 pitch 7680 (/4 1920)
>[266482.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ba80]
>[266482.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ba80] width 1920 pitch 7680 (/4 1920)
>[266482.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5358d90]
>[266482.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5358d90] width 1920 pitch 7680 (/4 1920)
>[266482.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5358d90]
>[266482.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5358d90] width 1920 pitch 7680 (/4 1920)
>[266482.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82140]
>[266482.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82140] width 1920 pitch 7680 (/4 1920)
>[266482.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82140]
>[266482.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82140] width 1920 pitch 7680 (/4 1920)
>[266484.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53586f0]
>[266484.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53586f0] width 1920 pitch 7680 (/4 1920)
>[266493.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c59610]
>[266493.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c59610] width 1920 pitch 7680 (/4 1920)
>[266526.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f872d0]
>[266526.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f872d0] width 1920 pitch 7680 (/4 1920)
>[266535.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f380b0]
>[266535.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f380b0] width 1920 pitch 7680 (/4 1920)
>[266535.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb770]
>[266535.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb770] width 1920 pitch 7680 (/4 1920)
>[266535.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2babf30]
>[266535.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2babf30] width 1920 pitch 7680 (/4 1920)
>[266535.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf3360]
>[266535.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf3360] width 1920 pitch 7680 (/4 1920)
>[266535.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5369970]
>[266535.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5369970] width 1920 pitch 7680 (/4 1920)
>[266535.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2babf30]
>[266535.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2babf30] width 1920 pitch 7680 (/4 1920)
>[266535.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926040]
>[266535.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926040] width 1920 pitch 7680 (/4 1920)
>[266535.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb8520]
>[266535.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb8520] width 1920 pitch 7680 (/4 1920)
>[266535.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306c1d0]
>[266535.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306c1d0] width 1920 pitch 7680 (/4 1920)
>[266535.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926040]
>[266535.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926040] width 1920 pitch 7680 (/4 1920)
>[266535.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3df0]
>[266535.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3df0] width 1920 pitch 7680 (/4 1920)
>[266535.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926040]
>[266535.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926040] width 1920 pitch 7680 (/4 1920)
>[266535.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3df0]
>[266535.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3df0] width 1920 pitch 7680 (/4 1920)
>[266535.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3926040]
>[266535.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3926040] width 1920 pitch 7680 (/4 1920)
>[266541.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9bce0]
>[266541.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9bce0] width 1920 pitch 7680 (/4 1920)
>[266541.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00000]
>[266541.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00000] width 1920 pitch 7680 (/4 1920)
>[266541.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3affec0]
>[266541.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3affec0] width 1920 pitch 7680 (/4 1920)
>[266541.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00000]
>[266541.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00000] width 1920 pitch 7680 (/4 1920)
>[266541.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3affec0]
>[266541.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3affec0] width 1920 pitch 7680 (/4 1920)
>[266541.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00000]
>[266541.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00000] width 1920 pitch 7680 (/4 1920)
>[266541.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3affec0]
>[266541.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3affec0] width 1920 pitch 7680 (/4 1920)
>[266541.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00000]
>[266541.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00000] width 1920 pitch 7680 (/4 1920)
>[266541.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3affec0]
>[266541.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3affec0] width 1920 pitch 7680 (/4 1920)
>[266541.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00000]
>[266541.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00000] width 1920 pitch 7680 (/4 1920)
>[266541.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b006b0]
>[266541.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b006b0] width 1920 pitch 7680 (/4 1920)
>[266541.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9ce40]
>[266541.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9ce40] width 1920 pitch 7680 (/4 1920)
>[266541.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b006b0]
>[266541.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b006b0] width 1920 pitch 7680 (/4 1920)
>[266541.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9ce40]
>[266541.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9ce40] width 1920 pitch 7680 (/4 1920)
>[266541.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b006b0]
>[266541.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b006b0] width 1920 pitch 7680 (/4 1920)
>[266541.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9ce40]
>[266541.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9ce40] width 1920 pitch 7680 (/4 1920)
>[266541.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b006b0]
>[266541.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b006b0] width 1920 pitch 7680 (/4 1920)
>[266541.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9ce40]
>[266541.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9ce40] width 1920 pitch 7680 (/4 1920)
>[266541.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b006b0]
>[266542.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b006b0] width 1920 pitch 7680 (/4 1920)
>[266542.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9ce40]
>[266542.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9ce40] width 1920 pitch 7680 (/4 1920)
>[266543.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0d360]
>[266544.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0d360] width 1920 pitch 7680 (/4 1920)
>[266544.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea9050]
>[266544.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea9050] width 1920 pitch 7680 (/4 1920)
>[266544.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0d360]
>[266544.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0d360] width 1920 pitch 7680 (/4 1920)
>[266544.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0d360]
>[266544.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0d360] width 1920 pitch 7680 (/4 1920)
>[266544.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3df0]
>[266544.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3df0] width 1920 pitch 7680 (/4 1920)
>[266545.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc5d20]
>[266545.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc5d20] width 1920 pitch 7680 (/4 1920)
>[266551.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9aed0]
>[266551.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9aed0] width 1920 pitch 7680 (/4 1920)
>[266557.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0e5f0]
>[266557.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0e5f0] width 1920 pitch 7680 (/4 1920)
>[266557.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2babbb0]
>[266557.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2babbb0] width 1920 pitch 7680 (/4 1920)
>[266557.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3101210]
>[266557.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3101210] width 1920 pitch 7680 (/4 1920)
>[266557.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebf060]
>[266557.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebf060] width 1920 pitch 7680 (/4 1920)
>[266557.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedef0]
>[266557.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedef0] width 1920 pitch 7680 (/4 1920)
>[266557.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedef0]
>[266557.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedef0] width 1920 pitch 7680 (/4 1920)
>[266557.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedef0]
>[266557.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedef0] width 1920 pitch 7680 (/4 1920)
>[266563.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f1f0]
>[266563.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f1f0] width 1920 pitch 7680 (/4 1920)
>[266563.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f470]
>[266563.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f470] width 1920 pitch 7680 (/4 1920)
>[266563.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f4d0]
>[266563.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f4d0] width 1920 pitch 7680 (/4 1920)
>[266563.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f470]
>[266563.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f470] width 1920 pitch 7680 (/4 1920)
>[266563.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f3d0]
>[266563.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f3d0] width 1920 pitch 7680 (/4 1920)
>[266563.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f4d0]
>[266563.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f4d0] width 1920 pitch 7680 (/4 1920)
>[266563.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f470]
>[266563.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f470] width 1920 pitch 7680 (/4 1920)
>[266563.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f4d0]
>[266563.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f4d0] width 1920 pitch 7680 (/4 1920)
>[266563.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f470]
>[266563.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f470] width 1920 pitch 7680 (/4 1920)
>[266563.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f4d0]
>[266563.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f4d0] width 1920 pitch 7680 (/4 1920)
>[266566.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa450]
>[266566.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa450] width 1920 pitch 7680 (/4 1920)
>[266566.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87420]
>[266566.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87420] width 1920 pitch 7680 (/4 1920)
>[266566.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92160]
>[266566.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92160] width 1920 pitch 7680 (/4 1920)
>[266566.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87420]
>[266566.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87420] width 1920 pitch 7680 (/4 1920)
>[266566.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92160]
>[266566.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92160] width 1920 pitch 7680 (/4 1920)
>[266566.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87420]
>[266566.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87420] width 1920 pitch 7680 (/4 1920)
>[266566.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92160]
>[266566.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92160] width 1920 pitch 7680 (/4 1920)
>[266566.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87420]
>[266566.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87420] width 1920 pitch 7680 (/4 1920)
>[266566.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d92160]
>[266566.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d92160] width 1920 pitch 7680 (/4 1920)
>[266569.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00290]
>[266569.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00290] width 1920 pitch 7680 (/4 1920)
>[266570.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80c50]
>[266570.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80c50] width 1920 pitch 7680 (/4 1920)
>[266570.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80c50]
>[266570.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80c50] width 1920 pitch 7680 (/4 1920)
>[266570.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00870]
>[266571.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00870] width 1920 pitch 7680 (/4 1920)
>[266571.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b00870]
>[266571.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b00870] width 1920 pitch 7680 (/4 1920)
>[266572.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3ad80]
>[266572.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3ad80] width 1920 pitch 7680 (/4 1920)
>[266578.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebd6c0]
>[266578.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebd6c0] width 1920 pitch 7680 (/4 1920)
>[266580.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f070]
>[266580.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f070] width 1920 pitch 7680 (/4 1920)
>[266580.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99330]
>[266580.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99330] width 1920 pitch 7680 (/4 1920)
>[266580.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e79e70]
>[266580.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e79e70] width 1920 pitch 7680 (/4 1920)
>[266582.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[266582.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[266582.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bed0]
>[266582.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bed0] width 1920 pitch 7680 (/4 1920)
>[266582.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3925f90]
>[266582.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3925f90] width 1920 pitch 7680 (/4 1920)
>[266582.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3edd0]
>[266583.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3edd0] width 1920 pitch 7680 (/4 1920)
>[266583.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f52120]
>[266583.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f52120] width 1920 pitch 7680 (/4 1920)
>[266583.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f25ce0]
>[266583.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f25ce0] width 1920 pitch 7680 (/4 1920)
>[266583.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31690a0]
>[266583.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31690a0] width 1920 pitch 7680 (/4 1920)
>[266583.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27350]
>[266583.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27350] width 1920 pitch 7680 (/4 1920)
>[266597.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d44630]
>[266597.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d44630] width 1920 pitch 7680 (/4 1920)
>[266604.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3076090]
>[266604.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3076090] width 1920 pitch 7680 (/4 1920)
>[266615.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e1910]
>[266615.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e1910] width 1920 pitch 7680 (/4 1920)
>[266619.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8d760]
>[266619.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8d760] width 1920 pitch 7680 (/4 1920)
>[266628.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e8f30]
>[266628.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e8f30] width 1920 pitch 7680 (/4 1920)
>[266629.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e8f30]
>[266629.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e8f30] width 1920 pitch 7680 (/4 1920)
>[266629.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2541610]
>[266629.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2541610] width 1920 pitch 7680 (/4 1920)
>[266629.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2541610]
>[266629.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2541610] width 1920 pitch 7680 (/4 1920)
>[266649.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e1910]
>[266649.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e1910] width 1920 pitch 7680 (/4 1920)
>[266669.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e240]
>[266669.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e240] width 1920 pitch 7680 (/4 1920)
>[266669.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4810]
>[266669.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4810] width 1920 pitch 7680 (/4 1920)
>[266669.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff500]
>[266669.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff500] width 1920 pitch 7680 (/4 1920)
>[266669.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb0710]
>[266669.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb0710] width 1920 pitch 7680 (/4 1920)
>[266669.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ff500]
>[266669.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ff500] width 1920 pitch 7680 (/4 1920)
>[266669.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e1f0]
>[266669.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e1f0] width 1920 pitch 7680 (/4 1920)
>[266669.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5b6e0]
>[266669.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5b6e0] width 1920 pitch 7680 (/4 1920)
>[266670.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31603d0]
>[266670.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31603d0] width 1920 pitch 7680 (/4 1920)
>[266670.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4810]
>[266670.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4810] width 1920 pitch 7680 (/4 1920)
>[266670.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d76eb0]
>[266670.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d76eb0] width 1920 pitch 7680 (/4 1920)
>[266670.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160380]
>[266670.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160380] width 1920 pitch 7680 (/4 1920)
>[266670.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4810]
>[266670.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4810] width 1920 pitch 7680 (/4 1920)
>[266670.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160380]
>[266670.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160380] width 1920 pitch 7680 (/4 1920)
>[266670.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4810]
>[266670.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4810] width 1920 pitch 7680 (/4 1920)
>[266674.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f5ac0]
>[266674.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f5ac0] width 1920 pitch 7680 (/4 1920)
>[266674.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f5ac0]
>[266674.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f5ac0] width 1920 pitch 7680 (/4 1920)
>[266674.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a329c0]
>[266674.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a329c0] width 1920 pitch 7680 (/4 1920)
>[266674.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a329c0]
>[266674.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a329c0] width 1920 pitch 7680 (/4 1920)
>[266674.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4f20]
>[266674.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4f20] width 1920 pitch 7680 (/4 1920)
>[266675.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43e00]
>[266675.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43e00] width 1920 pitch 7680 (/4 1920)
>[266675.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912a10]
>[266675.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912a10] width 1920 pitch 7680 (/4 1920)
>[266675.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43e60]
>[266675.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43e60] width 1920 pitch 7680 (/4 1920)
>[266675.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c05500]
>[266675.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c05500] width 1920 pitch 7680 (/4 1920)
>[266675.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912a10]
>[266675.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912a10] width 1920 pitch 7680 (/4 1920)
>[266675.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c05500]
>[266675.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c05500] width 1920 pitch 7680 (/4 1920)
>[266675.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912a10]
>[266675.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912a10] width 1920 pitch 7680 (/4 1920)
>[266675.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c05500]
>[266675.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c05500] width 1920 pitch 7680 (/4 1920)
>[266677.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ab00]
>[266677.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ab00] width 1920 pitch 7680 (/4 1920)
>[266677.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e19d0]
>[266677.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e19d0] width 1920 pitch 7680 (/4 1920)
>[266677.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ab00]
>[266677.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ab00] width 1920 pitch 7680 (/4 1920)
>[266678.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ab00]
>[266678.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ab00] width 1920 pitch 7680 (/4 1920)
>[266679.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4810]
>[266679.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4810] width 1920 pitch 7680 (/4 1920)
>[266709.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82c80]
>[266709.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82c80] width 1920 pitch 7680 (/4 1920)
>[266754.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3040]
>[266754.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3040] width 1920 pitch 7680 (/4 1920)
>[266784.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b82c80]
>[266784.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b82c80] width 1920 pitch 7680 (/4 1920)
>[266844.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dcb40]
>[266844.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dcb40] width 1920 pitch 7680 (/4 1920)
>[266859.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb8990]
>[266859.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb8990] width 1920 pitch 7680 (/4 1920)
>[266934.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ddf70]
>[266934.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ddf70] width 1920 pitch 7680 (/4 1920)
>[266949.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5a2c0]
>[266949.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5a2c0] width 1920 pitch 7680 (/4 1920)
>[266964.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dcb40]
>[266964.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dcb40] width 1920 pitch 7680 (/4 1920)
>[266979.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f4be0]
>[266979.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f4be0] width 1920 pitch 7680 (/4 1920)
>[266994.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0e670]
>[266994.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0e670] width 1920 pitch 7680 (/4 1920)
>[267009.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56870]
>[267009.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56870] width 1920 pitch 7680 (/4 1920)
>[267024.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e1a30]
>[267024.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e1a30] width 1920 pitch 7680 (/4 1920)
>[267054.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbd9f0]
>[267054.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbd9f0] width 1920 pitch 7680 (/4 1920)
>[267069.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e19d0]
>[267069.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e19d0] width 1920 pitch 7680 (/4 1920)
>[267099.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fbbc0]
>[267099.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fbbc0] width 1920 pitch 7680 (/4 1920)
>[267114.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fbbc0]
>[267114.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fbbc0] width 1920 pitch 7680 (/4 1920)
>[267130.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305d0]
>[267130.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305d0] width 1920 pitch 7680 (/4 1920)
>[267132.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902090]
>[267132.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902090] width 1920 pitch 7680 (/4 1920)
>[267132.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf20]
>[267132.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf20] width 1920 pitch 7680 (/4 1920)
>[267132.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf20]
>[267132.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf20] width 1920 pitch 7680 (/4 1920)
>[267204.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b00]
>[267204.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b00] width 1920 pitch 7680 (/4 1920)
>[267219.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86810]
>[267219.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86810] width 1920 pitch 7680 (/4 1920)
>[267279.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2e700]
>[267279.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2e700] width 1920 pitch 7680 (/4 1920)
>[267299.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267299.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267299.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fab60]
>[267299.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fab60] width 1920 pitch 7680 (/4 1920)
>[267299.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f18b0]
>[267299.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f18b0] width 1920 pitch 7680 (/4 1920)
>[267299.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fab60]
>[267299.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fab60] width 1920 pitch 7680 (/4 1920)
>[267299.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f18b0]
>[267299.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f18b0] width 1920 pitch 7680 (/4 1920)
>[267300.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b00]
>[267300.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b00] width 1920 pitch 7680 (/4 1920)
>[267300.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb030]
>[267300.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb030] width 1920 pitch 7680 (/4 1920)
>[267300.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267300.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267300.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb030]
>[267300.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb030] width 1920 pitch 7680 (/4 1920)
>[267300.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267300.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267300.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e1f0]
>[267300.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e1f0] width 1920 pitch 7680 (/4 1920)
>[267301.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14ab0]
>[267301.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14ab0] width 1920 pitch 7680 (/4 1920)
>[267301.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267301.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267301.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd6880]
>[267301.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd6880] width 1920 pitch 7680 (/4 1920)
>[267301.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a6c0]
>[267301.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a6c0] width 1920 pitch 7680 (/4 1920)
>[267301.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd6880]
>[267301.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd6880] width 1920 pitch 7680 (/4 1920)
>[267301.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267301.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267301.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb030]
>[267301.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb030] width 1920 pitch 7680 (/4 1920)
>[267301.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267302.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267302.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267302.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267302.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb030]
>[267302.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb030] width 1920 pitch 7680 (/4 1920)
>[267302.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb030]
>[267302.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb030] width 1920 pitch 7680 (/4 1920)
>[267302.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267302.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267302.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb030]
>[267302.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb030] width 1920 pitch 7680 (/4 1920)
>[267303.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267303.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267303.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77cb0]
>[267303.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77cb0] width 1920 pitch 7680 (/4 1920)
>[267303.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305d0]
>[267303.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305d0] width 1920 pitch 7680 (/4 1920)
>[267303.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77cb0]
>[267303.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77cb0] width 1920 pitch 7680 (/4 1920)
>[267303.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fbbc0]
>[267303.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fbbc0] width 1920 pitch 7680 (/4 1920)
>[267303.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf80]
>[267303.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf80] width 1920 pitch 7680 (/4 1920)
>[267306.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267306.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267306.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901f30]
>[267306.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901f30] width 1920 pitch 7680 (/4 1920)
>[267306.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267306.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267306.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb090]
>[267306.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb090] width 1920 pitch 7680 (/4 1920)
>[267306.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267306.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267306.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02480]
>[267306.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02480] width 1920 pitch 7680 (/4 1920)
>[267306.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267306.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267307.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb88c0]
>[267307.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb88c0] width 1920 pitch 7680 (/4 1920)
>[267307.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267307.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267307.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267307.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267307.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf80]
>[267307.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf80] width 1920 pitch 7680 (/4 1920)
>[267307.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267307.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267307.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267307.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267307.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cd1f0]
>[267307.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cd1f0] width 1920 pitch 7680 (/4 1920)
>[267307.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267307.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267307.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267308.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267308.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267308.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267308.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a700]
>[267308.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a700] width 1920 pitch 7680 (/4 1920)
>[267309.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dde160]
>[267309.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dde160] width 1920 pitch 7680 (/4 1920)
>[267334.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f870]
>[267334.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f870] width 1920 pitch 7680 (/4 1920)
>[267335.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c90]
>[267335.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c90] width 1920 pitch 7680 (/4 1920)
>[267335.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85dc0]
>[267335.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85dc0] width 1920 pitch 7680 (/4 1920)
>[267335.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9f1e0]
>[267335.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9f1e0] width 1920 pitch 7680 (/4 1920)
>[267335.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31602c0]
>[267335.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31602c0] width 1920 pitch 7680 (/4 1920)
>[267335.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fab60]
>[267335.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fab60] width 1920 pitch 7680 (/4 1920)
>[267345.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a89ba0]
>[267345.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a89ba0] width 1920 pitch 7680 (/4 1920)
>[267345.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31602c0]
>[267345.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31602c0] width 1920 pitch 7680 (/4 1920)
>[267345.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc0ce0]
>[267345.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc0ce0] width 1920 pitch 7680 (/4 1920)
>[267345.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31602c0]
>[267345.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31602c0] width 1920 pitch 7680 (/4 1920)
>[267345.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a89ba0]
>[267345.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a89ba0] width 1920 pitch 7680 (/4 1920)
>[267346.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc0d80]
>[267346.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc0d80] width 1920 pitch 7680 (/4 1920)
>[267346.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31602c0]
>[267346.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31602c0] width 1920 pitch 7680 (/4 1920)
>[267346.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a89ba0]
>[267346.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a89ba0] width 1920 pitch 7680 (/4 1920)
>[267346.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33240]
>[267346.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33240] width 1920 pitch 7680 (/4 1920)
>[267346.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f870]
>[267346.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f870] width 1920 pitch 7680 (/4 1920)
>[267346.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9f1e0]
>[267346.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9f1e0] width 1920 pitch 7680 (/4 1920)
>[267346.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9f1e0]
>[267346.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9f1e0] width 1920 pitch 7680 (/4 1920)
>[267346.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85dc0]
>[267346.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85dc0] width 1920 pitch 7680 (/4 1920)
>[267414.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[267414.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[267429.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f870]
>[267429.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f870] width 1920 pitch 7680 (/4 1920)
>[267534.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c90]
>[267534.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c90] width 1920 pitch 7680 (/4 1920)
>[267549.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12690]
>[267549.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12690] width 1920 pitch 7680 (/4 1920)
>[267579.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c90]
>[267579.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c90] width 1920 pitch 7680 (/4 1920)
>[267594.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3925f90]
>[267594.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3925f90] width 1920 pitch 7680 (/4 1920)
>[267669.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85dc0]
>[267669.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85dc0] width 1920 pitch 7680 (/4 1920)
>[267684.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa6b0]
>[267684.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa6b0] width 1920 pitch 7680 (/4 1920)
>[267714.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa6b0]
>[267714.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa6b0] width 1920 pitch 7680 (/4 1920)
>[267729.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa6b0]
>[267729.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa6b0] width 1920 pitch 7680 (/4 1920)
>[267774.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[267774.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[267789.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa6b0]
>[267789.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa6b0] width 1920 pitch 7680 (/4 1920)
>[267804.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f870]
>[267804.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f870] width 1920 pitch 7680 (/4 1920)
>[267834.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f870]
>[267834.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f870] width 1920 pitch 7680 (/4 1920)
>[267849.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22df0]
>[267849.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22df0] width 1920 pitch 7680 (/4 1920)
>[267864.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bce910]
>[267864.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bce910] width 1920 pitch 7680 (/4 1920)
>[267875.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa6b0]
>[267875.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa6b0] width 1920 pitch 7680 (/4 1920)
>[267876.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9d240]
>[267876.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9d240] width 1920 pitch 7680 (/4 1920)
>[267876.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10ac0]
>[267876.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10ac0] width 1920 pitch 7680 (/4 1920)
>[267879.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38faf40]
>[267879.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38faf40] width 1920 pitch 7680 (/4 1920)
>[267880.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9930]
>[267880.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9930] width 1920 pitch 7680 (/4 1920)
>[267880.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267880.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267880.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9930]
>[267880.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9930] width 1920 pitch 7680 (/4 1920)
>[267880.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267880.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267881.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9930]
>[267881.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9930] width 1920 pitch 7680 (/4 1920)
>[267881.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267881.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267881.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267881.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267881.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932dc0]
>[267881.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932dc0] width 1920 pitch 7680 (/4 1920)
>[267881.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932dc0]
>[267882.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932dc0] width 1920 pitch 7680 (/4 1920)
>[267882.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9930]
>[267882.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9930] width 1920 pitch 7680 (/4 1920)
>[267882.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9930]
>[267882.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9930] width 1920 pitch 7680 (/4 1920)
>[267882.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267882.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267882.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db9930]
>[267883.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db9930] width 1920 pitch 7680 (/4 1920)
>[267883.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0dd0]
>[267883.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0dd0] width 1920 pitch 7680 (/4 1920)
>[267883.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4a860]
>[267883.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4a860] width 1920 pitch 7680 (/4 1920)
>[267939.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465450]
>[267939.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465450] width 1920 pitch 7680 (/4 1920)
>[267954.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24651c0]
>[267954.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24651c0] width 1920 pitch 7680 (/4 1920)
>[267969.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253b970]
>[267969.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253b970] width 1920 pitch 7680 (/4 1920)
>[267984.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbb710]
>[267984.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbb710] width 1920 pitch 7680 (/4 1920)
>[268029.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbb710]
>[268029.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbb710] width 1920 pitch 7680 (/4 1920)
>[268029.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f0cd0]
>[268029.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f0cd0] width 1920 pitch 7680 (/4 1920)
>[268030.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf7b30]
>[268030.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf7b30] width 1920 pitch 7680 (/4 1920)
>[268030.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954820]
>[268030.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954820] width 1920 pitch 7680 (/4 1920)
>[268044.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6fec0]
>[268044.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6fec0] width 1920 pitch 7680 (/4 1920)
>[268134.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398d580]
>[268134.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398d580] width 1920 pitch 7680 (/4 1920)
>[268149.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb2b70]
>[268149.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb2b70] width 1920 pitch 7680 (/4 1920)
>[268164.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b167c0]
>[268164.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b167c0] width 1920 pitch 7680 (/4 1920)
>[268169.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d51a0]
>[268169.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d51a0] width 1920 pitch 7680 (/4 1920)
>[268169.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b167c0]
>[268169.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b167c0] width 1920 pitch 7680 (/4 1920)
>[268170.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b167c0]
>[268170.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b167c0] width 1920 pitch 7680 (/4 1920)
>[268170.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d09720]
>[268170.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d09720] width 1920 pitch 7680 (/4 1920)
>[268170.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b167c0]
>[268170.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b167c0] width 1920 pitch 7680 (/4 1920)
>[268173.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b167c0]
>[268173.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b167c0] width 1920 pitch 7680 (/4 1920)
>[268174.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b167c0]
>[268174.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b167c0] width 1920 pitch 7680 (/4 1920)
>[268174.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d24ab0]
>[268174.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d24ab0] width 1920 pitch 7680 (/4 1920)
>[268175.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3c40]
>[268175.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3c40] width 1920 pitch 7680 (/4 1920)
>[268175.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d51ca0]
>[268175.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d51ca0] width 1920 pitch 7680 (/4 1920)
>[268175.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8a1b0]
>[268175.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8a1b0] width 1920 pitch 7680 (/4 1920)
>[268175.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd1440]
>[268175.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd1440] width 1920 pitch 7680 (/4 1920)
>[268175.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8a1b0]
>[268175.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8a1b0] width 1920 pitch 7680 (/4 1920)
>[268175.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[268175.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[268175.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93a40]
>[268176.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93a40] width 1920 pitch 7680 (/4 1920)
>[268176.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93a40]
>[268176.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93a40] width 1920 pitch 7680 (/4 1920)
>[268179.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3edd0]
>[268179.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3edd0] width 1920 pitch 7680 (/4 1920)
>[268186.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ca0]
>[268186.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ca0] width 1920 pitch 7680 (/4 1920)
>[268186.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d70]
>[268186.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d70] width 1920 pitch 7680 (/4 1920)
>[268186.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b36e40]
>[268186.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b36e40] width 1920 pitch 7680 (/4 1920)
>[268186.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55d70]
>[268186.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55d70] width 1920 pitch 7680 (/4 1920)
>[268186.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d51ca0]
>[268186.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d51ca0] width 1920 pitch 7680 (/4 1920)
>[268186.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f070]
>[268186.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f070] width 1920 pitch 7680 (/4 1920)
>[268186.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f070]
>[268186.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f070] width 1920 pitch 7680 (/4 1920)
>[268194.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc580]
>[268194.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc580] width 1920 pitch 7680 (/4 1920)
>[268209.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbef60]
>[268209.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbef60] width 1920 pitch 7680 (/4 1920)
>[268209.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a96c0]
>[268209.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a96c0] width 1920 pitch 7680 (/4 1920)
>[268217.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be0fb0]
>[268217.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be0fb0] width 1920 pitch 7680 (/4 1920)
>[268217.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536ac40]
>[268217.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536ac40] width 1920 pitch 7680 (/4 1920)
>[268217.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebc000]
>[268217.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebc000] width 1920 pitch 7680 (/4 1920)
>[268217.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf8330]
>[268217.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf8330] width 1920 pitch 7680 (/4 1920)
>[268218.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d71e60]
>[268218.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d71e60] width 1920 pitch 7680 (/4 1920)
>[268219.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebc000]
>[268219.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebc000] width 1920 pitch 7680 (/4 1920)
>[268219.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebc000]
>[268219.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebc000] width 1920 pitch 7680 (/4 1920)
>[268219.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebc000]
>[268219.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebc000] width 1920 pitch 7680 (/4 1920)
>[268231.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6bdf0]
>[268231.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6bdf0] width 1920 pitch 7680 (/4 1920)
>[268237.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6b00]
>[268237.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6b00] width 1920 pitch 7680 (/4 1920)
>[268239.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b94110]
>[268239.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b94110] width 1920 pitch 7680 (/4 1920)
>[268239.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b94170]
>[268239.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b94170] width 1920 pitch 7680 (/4 1920)
>[268239.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b94110]
>[268239.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b94110] width 1920 pitch 7680 (/4 1920)
>[268239.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6bdd0]
>[268239.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6bdd0] width 1920 pitch 7680 (/4 1920)
>[268248.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25420]
>[268248.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25420] width 1920 pitch 7680 (/4 1920)
>[268248.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a50]
>[268248.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a50] width 1920 pitch 7680 (/4 1920)
>[268248.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25420]
>[268248.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25420] width 1920 pitch 7680 (/4 1920)
>[268248.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a50]
>[268248.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a50] width 1920 pitch 7680 (/4 1920)
>[268248.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25420]
>[268248.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25420] width 1920 pitch 7680 (/4 1920)
>[268248.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a50]
>[268248.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a50] width 1920 pitch 7680 (/4 1920)
>[268248.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25420]
>[268248.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25420] width 1920 pitch 7680 (/4 1920)
>[268248.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a50]
>[268248.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a50] width 1920 pitch 7680 (/4 1920)
>[268248.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25420]
>[268248.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25420] width 1920 pitch 7680 (/4 1920)
>[268248.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a50]
>[268248.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a50] width 1920 pitch 7680 (/4 1920)
>[268249.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8a250]
>[268249.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8a250] width 1920 pitch 7680 (/4 1920)
>[268249.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d262c0]
>[268249.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d262c0] width 1920 pitch 7680 (/4 1920)
>[268249.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c660]
>[268249.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c660] width 1920 pitch 7680 (/4 1920)
>[268249.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d262c0]
>[268249.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d262c0] width 1920 pitch 7680 (/4 1920)
>[268249.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2000]
>[268249.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2000] width 1920 pitch 7680 (/4 1920)
>[268249.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c660]
>[268249.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c660] width 1920 pitch 7680 (/4 1920)
>[268249.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d262c0]
>[268249.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d262c0] width 1920 pitch 7680 (/4 1920)
>[268249.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c660]
>[268249.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c660] width 1920 pitch 7680 (/4 1920)
>[268249.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d262c0]
>[268249.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d262c0] width 1920 pitch 7680 (/4 1920)
>[268250.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e6b0]
>[268250.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e6b0] width 1920 pitch 7680 (/4 1920)
>[268250.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56640]
>[268250.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56640] width 1920 pitch 7680 (/4 1920)
>[268250.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f6510]
>[268250.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f6510] width 1920 pitch 7680 (/4 1920)
>[268250.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f6510]
>[268250.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f6510] width 1920 pitch 7680 (/4 1920)
>[268251.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e88800]
>[268251.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e88800] width 1920 pitch 7680 (/4 1920)
>[268254.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae69b0]
>[268254.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae69b0] width 1920 pitch 7680 (/4 1920)
>[268269.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf0f0]
>[268269.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf0f0] width 1920 pitch 7680 (/4 1920)
>[268284.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2e30]
>[268284.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2e30] width 1920 pitch 7680 (/4 1920)
>[268299.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c660]
>[268299.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c660] width 1920 pitch 7680 (/4 1920)
>[268329.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403b420]
>[268329.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403b420] width 1920 pitch 7680 (/4 1920)
>[268359.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a32830]
>[268359.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a32830] width 1920 pitch 7680 (/4 1920)
>[268360.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae4b0]
>[268360.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae4b0] width 1920 pitch 7680 (/4 1920)
>[268361.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c04c0]
>[268361.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c04c0] width 1920 pitch 7680 (/4 1920)
>[268361.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fba370]
>[268362.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fba370] width 1920 pitch 7680 (/4 1920)
>[268362.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5eb30]
>[268362.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5eb30] width 1920 pitch 7680 (/4 1920)
>[268362.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fba370]
>[268362.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fba370] width 1920 pitch 7680 (/4 1920)
>[268374.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8cca0]
>[268374.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8cca0] width 1920 pitch 7680 (/4 1920)
>[268385.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8cca0]
>[268385.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8cca0] width 1920 pitch 7680 (/4 1920)
>[268386.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8cca0]
>[268386.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8cca0] width 1920 pitch 7680 (/4 1920)
>[268386.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309a3b0]
>[268386.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309a3b0] width 1920 pitch 7680 (/4 1920)
>[268386.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9d50]
>[268386.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9d50] width 1920 pitch 7680 (/4 1920)
>[268388.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4af30]
>[268388.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4af30] width 1920 pitch 7680 (/4 1920)
>[268389.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ced4a0]
>[268389.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ced4a0] width 1920 pitch 7680 (/4 1920)
>[268393.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ea2b0]
>[268393.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ea2b0] width 1920 pitch 7680 (/4 1920)
>[268396.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f87390]
>[268396.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f87390] width 1920 pitch 7680 (/4 1920)
>[268396.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f87390]
>[268396.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f87390] width 1920 pitch 7680 (/4 1920)
>[268397.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f87390]
>[268397.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f87390] width 1920 pitch 7680 (/4 1920)
>[268402.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097740]
>[268402.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097740] width 1920 pitch 7680 (/4 1920)
>[268402.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ffaa0]
>[268402.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ffaa0] width 1920 pitch 7680 (/4 1920)
>[268402.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d00c0]
>[268402.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d00c0] width 1920 pitch 7680 (/4 1920)
>[268402.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ffaa0]
>[268403.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ffaa0] width 1920 pitch 7680 (/4 1920)
>[268403.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d00c0]
>[268403.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d00c0] width 1920 pitch 7680 (/4 1920)
>[268403.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ffaa0]
>[268403.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ffaa0] width 1920 pitch 7680 (/4 1920)
>[268403.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d00c0]
>[268403.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d00c0] width 1920 pitch 7680 (/4 1920)
>[268403.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ffaa0]
>[268403.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ffaa0] width 1920 pitch 7680 (/4 1920)
>[268403.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d00c0]
>[268403.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d00c0] width 1920 pitch 7680 (/4 1920)
>[268404.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[268404.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[268404.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3067a20]
>[268404.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3067a20] width 1920 pitch 7680 (/4 1920)
>[268404.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[268404.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[268404.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3067a20]
>[268404.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3067a20] width 1920 pitch 7680 (/4 1920)
>[268404.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[268404.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[268404.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3067a20]
>[268404.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3067a20] width 1920 pitch 7680 (/4 1920)
>[268404.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[268404.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[268404.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3067a20]
>[268404.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3067a20] width 1920 pitch 7680 (/4 1920)
>[268405.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[268405.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[268405.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c04c0]
>[268405.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c04c0] width 1920 pitch 7680 (/4 1920)
>[268405.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c04c0]
>[268406.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c04c0] width 1920 pitch 7680 (/4 1920)
>[268406.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c118c0]
>[268406.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c118c0] width 1920 pitch 7680 (/4 1920)
>[268406.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c04c0]
>[268406.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c04c0] width 1920 pitch 7680 (/4 1920)
>[268449.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4027fb0]
>[268449.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4027fb0] width 1920 pitch 7680 (/4 1920)
>[268464.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c72530]
>[268464.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c72530] width 1920 pitch 7680 (/4 1920)
>[268479.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4027fb0]
>[268479.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4027fb0] width 1920 pitch 7680 (/4 1920)
>[268494.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e3d0]
>[268494.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e3d0] width 1920 pitch 7680 (/4 1920)
>[268509.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e474a0]
>[268509.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e474a0] width 1920 pitch 7680 (/4 1920)
>[268569.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00280]
>[268569.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00280] width 1920 pitch 7680 (/4 1920)
>[268584.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00280]
>[268584.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00280] width 1920 pitch 7680 (/4 1920)
>[268599.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d6c0]
>[268599.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d6c0] width 1920 pitch 7680 (/4 1920)
>[268600.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d6c0]
>[268600.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d6c0] width 1920 pitch 7680 (/4 1920)
>[268601.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d6c0]
>[268601.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d6c0] width 1920 pitch 7680 (/4 1920)
>[268601.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d6c0]
>[268601.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d6c0] width 1920 pitch 7680 (/4 1920)
>[268601.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e474a0]
>[268601.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e474a0] width 1920 pitch 7680 (/4 1920)
>[268601.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2da0]
>[268601.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2da0] width 1920 pitch 7680 (/4 1920)
>[268601.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e474a0]
>[268601.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e474a0] width 1920 pitch 7680 (/4 1920)
>[268689.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099b80]
>[268689.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099b80] width 1920 pitch 7680 (/4 1920)
>[268704.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e474a0]
>[268704.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e474a0] width 1920 pitch 7680 (/4 1920)
>[268734.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099b80]
>[268734.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099b80] width 1920 pitch 7680 (/4 1920)
>[268736.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d18e0]
>[268736.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d18e0] width 1920 pitch 7680 (/4 1920)
>[268744.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb140]
>[268744.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb140] width 1920 pitch 7680 (/4 1920)
>[268761.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb140]
>[268761.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb140] width 1920 pitch 7680 (/4 1920)
>[268761.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[268761.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[268762.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ebce0]
>[268762.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ebce0] width 1920 pitch 7680 (/4 1920)
>[268762.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[268762.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[268762.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ebce0]
>[268762.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ebce0] width 1920 pitch 7680 (/4 1920)
>[268762.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb140]
>[268762.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb140] width 1920 pitch 7680 (/4 1920)
>[268762.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[268762.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[268762.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb140]
>[268762.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb140] width 1920 pitch 7680 (/4 1920)
>[268762.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb140]
>[268762.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb140] width 1920 pitch 7680 (/4 1920)
>[268763.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[268763.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[268763.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[268763.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[268763.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ebce0]
>[268763.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ebce0] width 1920 pitch 7680 (/4 1920)
>[268763.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256be20]
>[268763.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256be20] width 1920 pitch 7680 (/4 1920)
>[268763.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fb140]
>[268763.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fb140] width 1920 pitch 7680 (/4 1920)
>[268763.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ebce0]
>[268763.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ebce0] width 1920 pitch 7680 (/4 1920)
>[268764.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[268764.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[268794.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b141a0]
>[268794.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b141a0] width 1920 pitch 7680 (/4 1920)
>[268794.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eadd00]
>[268794.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eadd00] width 1920 pitch 7680 (/4 1920)
>[268795.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[268795.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[268795.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91820]
>[268795.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91820] width 1920 pitch 7680 (/4 1920)
>[268795.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096460]
>[268795.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096460] width 1920 pitch 7680 (/4 1920)
>[268804.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268804.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268804.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268804.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268804.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268804.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268804.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268804.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268804.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268804.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268804.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268804.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268804.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268804.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268804.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268804.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268804.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268804.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268804.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268805.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268805.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268805.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268805.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268805.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268805.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268805.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268805.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268805.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268805.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268805.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268805.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268805.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268805.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268805.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268805.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268805.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268805.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268805.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268805.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268805.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268805.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268805.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268805.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268806.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268806.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268806.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268806.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268806.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268806.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268806.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268806.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268806.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268806.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268806.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268806.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268806.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268806.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268806.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268806.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268806.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268806.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268806.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268806.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268806.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268807.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268807.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268807.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268807.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268807.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268807.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268807.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268807.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268807.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268807.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268807.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268807.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268807.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268807.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268807.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268807.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268807.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268807.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268807.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268807.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268807.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268807.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268808.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268808.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268808.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268808.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268808.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268808.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268808.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268808.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268808.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268808.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268808.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268808.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268808.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268808.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268808.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268808.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268808.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268808.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268808.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268808.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268808.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268808.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268808.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268809.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268809.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268809.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268809.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268809.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268809.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268809.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268809.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268809.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268809.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268809.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268809.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268809.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268809.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268809.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268809.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268809.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268809.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268809.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268809.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268809.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268809.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268809.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268809.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268809.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268810.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268810.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268810.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268810.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268810.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268810.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268810.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268810.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268810.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268810.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268810.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268810.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268810.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268810.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268810.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268810.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268810.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268810.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268810.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268810.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268810.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268810.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268810.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268810.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268810.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268811.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268811.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268811.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268811.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268811.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268811.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268811.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268811.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268811.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268811.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268811.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268811.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268811.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268811.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268811.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268811.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268811.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268811.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268811.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268811.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268811.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268812.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268812.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268812.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268812.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268812.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268812.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268812.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268812.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268812.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268812.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268812.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268812.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268812.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268812.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268812.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268812.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268812.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268812.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268812.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268812.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268812.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268812.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268812.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268812.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268812.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268813.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268813.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268813.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268813.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268813.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268813.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268813.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268813.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268813.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268813.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268813.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268813.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268813.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268813.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268813.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268813.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268813.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268813.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268813.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268813.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268813.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268813.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268813.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268813.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268813.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268814.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268814.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268814.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268814.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268814.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268814.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268814.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268814.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268814.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268814.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268814.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268814.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268814.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268814.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268814.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268814.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268814.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268814.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268814.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268814.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268814.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268814.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268814.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268815.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268815.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268815.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268815.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268815.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268815.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268815.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268815.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268815.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268815.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268815.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268815.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268815.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268815.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268815.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268815.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268815.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268815.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268815.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268815.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268815.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268815.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268815.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268815.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268815.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268816.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268816.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268816.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268816.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268816.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268816.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268816.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268816.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268816.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268816.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268816.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268816.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268816.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268816.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268816.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268816.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268816.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268816.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268816.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268816.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268816.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268816.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268816.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268816.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268816.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268816.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268817.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268817.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268817.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268817.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268817.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268817.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268817.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268817.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268817.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268817.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268817.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268817.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268817.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268817.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268817.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268817.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268817.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268817.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268817.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268817.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268817.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268817.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268817.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268817.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268817.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268817.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268818.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268818.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268818.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268818.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268818.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268818.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268818.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268818.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268818.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268818.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268818.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268818.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268818.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268818.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268818.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268818.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268818.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268818.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268818.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268818.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268818.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268818.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268818.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268818.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268819.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268819.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268819.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268819.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268819.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268819.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268819.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268819.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268819.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268819.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268819.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268819.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268819.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268819.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268819.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268819.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268819.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99e00]
>[268819.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99e00] width 1920 pitch 7680 (/4 1920)
>[268819.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268819.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268819.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268819.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268819.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268819.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268820.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268820.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268820.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268820.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268820.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268820.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268820.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268820.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268820.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268820.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268820.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268820.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268820.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268820.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268820.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268820.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268820.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268820.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268820.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268820.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268820.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268820.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268820.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268820.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268820.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268820.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268821.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268821.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268821.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268821.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268821.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268821.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268821.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268821.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268821.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268821.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268821.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268821.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268821.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268821.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268821.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268821.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268821.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268821.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268821.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268821.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268821.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268821.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268821.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268821.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268822.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268822.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268822.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268822.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268822.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268822.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268822.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268822.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268822.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268822.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268822.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268822.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268822.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268822.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268822.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268822.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268822.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268822.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268822.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268822.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268822.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268822.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268823.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268823.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268823.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268823.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268823.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268823.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268823.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268823.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268823.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268823.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268823.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268823.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268823.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268823.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268823.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268823.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268823.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268823.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268823.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268823.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268823.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268823.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268823.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268824.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268824.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268824.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268824.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268824.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268824.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268824.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268824.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268824.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268824.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268824.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268824.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268824.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268824.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268824.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268824.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268824.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268824.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268824.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268824.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268825.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268825.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268825.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268825.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268825.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268825.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268825.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268825.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268825.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268825.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268825.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268825.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268825.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268825.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268825.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268825.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268825.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268825.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268825.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268825.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268825.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268826.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268826.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268826.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268826.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268826.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268826.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268826.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268826.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268826.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268826.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268826.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268826.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268826.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268826.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268826.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268826.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268826.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268826.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268826.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268826.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268826.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268826.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268827.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268827.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268827.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268827.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268827.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268827.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268827.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268827.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268827.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268827.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268827.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268827.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268827.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268827.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268827.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268827.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268827.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268827.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268827.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268827.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268827.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268827.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268828.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268828.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268828.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268828.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268828.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268828.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268828.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268828.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268828.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268828.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268828.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268828.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268828.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268828.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268828.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268828.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268828.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268828.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268828.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268828.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268828.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268828.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268828.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268829.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268829.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268829.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268829.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268829.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268829.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268829.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268829.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268829.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268829.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268829.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268829.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268829.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268829.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268829.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268829.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268829.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268829.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268829.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268829.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268829.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268829.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268829.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268830.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268830.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268830.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268830.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268830.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268830.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268830.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268830.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268830.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268830.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268830.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268830.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268830.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268830.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268830.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268830.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268830.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268830.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268830.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268830.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268830.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268830.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268830.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268831.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268831.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268831.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268831.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268831.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268831.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268831.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268831.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268831.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268831.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268831.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268831.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268831.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268831.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268831.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268831.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268831.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268831.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268831.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268831.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268831.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268832.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268832.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268832.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268832.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268832.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268832.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268832.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268832.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268832.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268832.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268832.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268832.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268832.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268832.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268832.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268832.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268832.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268832.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268832.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268832.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268832.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268832.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268832.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268833.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268833.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268833.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268833.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268833.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268833.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268833.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268833.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268833.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268833.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268833.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268833.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268833.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268833.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268833.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268833.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268833.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268833.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268833.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268833.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268833.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268834.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268834.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268834.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268834.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268834.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268834.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268834.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268834.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268834.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268834.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268834.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268834.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268834.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268834.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268834.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268834.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268834.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268834.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268834.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268834.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268834.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268834.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268835.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268835.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268835.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268835.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268835.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268835.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268835.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268835.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268835.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268835.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268835.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268835.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268835.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268835.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268835.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268835.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268835.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268835.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268835.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268835.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268835.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268835.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268836.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268836.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268836.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268836.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268836.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268836.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268836.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268836.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268836.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268836.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268836.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268836.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268836.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268836.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268836.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268836.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268836.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268836.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268836.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268836.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268836.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268836.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268836.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268837.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268837.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268837.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268837.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268837.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268837.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268837.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268837.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268837.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268837.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268837.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268837.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268837.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268837.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268837.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268837.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268837.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268837.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268837.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268837.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268837.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268837.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268838.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268838.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268838.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268838.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268838.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268838.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268838.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268838.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268838.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268838.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268838.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268838.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268838.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268838.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268838.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268838.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268838.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268838.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268838.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268838.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268838.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268838.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268839.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268839.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268839.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268839.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268839.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268839.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268839.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268839.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268839.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268839.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268839.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268839.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268839.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268839.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268839.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268839.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268839.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268839.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268839.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268839.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268839.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268840.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268840.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268840.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268840.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268840.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268840.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268840.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268840.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268840.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268840.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268840.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268840.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268840.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268840.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268840.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268840.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268840.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268840.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268840.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268840.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268840.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268840.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268840.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268841.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268841.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268841.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268841.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268841.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268841.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268841.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268841.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268841.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268841.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268841.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268841.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268841.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268841.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268841.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268841.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268841.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268841.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268841.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268841.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268841.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268841.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268841.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268842.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268842.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268842.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268842.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268842.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268842.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268842.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268842.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268842.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268842.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268842.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268842.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268842.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268842.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268842.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268842.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268842.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268842.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268842.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268842.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268842.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268842.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268842.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268843.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268843.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268843.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268843.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268843.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268843.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268843.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268843.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268843.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268843.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268843.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268843.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268843.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268843.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268843.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268843.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268843.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268843.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268843.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268843.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268843.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268843.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268843.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268843.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268844.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268844.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268844.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268844.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268844.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268844.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268844.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268844.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268844.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268844.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268844.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268844.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268844.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268844.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268844.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268844.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268844.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268844.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268844.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268844.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268844.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268844.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268844.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268844.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268845.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268845.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268845.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268845.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268845.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268845.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268845.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268845.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268845.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268845.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268845.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268845.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268845.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268845.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268845.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268845.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268845.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268845.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268845.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268845.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268845.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268845.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268845.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268845.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268845.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268846.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268846.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268846.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268846.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268846.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268846.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268846.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268846.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268846.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268846.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268846.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268846.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268846.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268846.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268846.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268846.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268846.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268846.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268846.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268846.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268846.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268846.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268847.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268847.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268847.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268847.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268847.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268847.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268847.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268847.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268847.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268847.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268847.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268847.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268847.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268847.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268847.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268847.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268847.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268847.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268847.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268847.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268847.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268847.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268847.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268847.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268847.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268847.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268848.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268848.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268848.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268848.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268848.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268848.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268848.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268848.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268848.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268848.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268848.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268848.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268848.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268848.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268848.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268848.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268848.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268848.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268848.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268848.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268848.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268848.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268848.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268848.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268848.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268848.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268849.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268849.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268849.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268849.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268849.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268849.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268849.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268849.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268849.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268849.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268849.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268849.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268849.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268849.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268849.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268849.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268849.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268849.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268849.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268849.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268849.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268850.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268850.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268850.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268850.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268850.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268850.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268850.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268850.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268850.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268850.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268850.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268850.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268850.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268850.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268850.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268850.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268850.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268850.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268850.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268850.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268851.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268851.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268851.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268851.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268851.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268851.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268851.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268851.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268851.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268851.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268851.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268851.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268851.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268851.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268851.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268851.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268851.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268851.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268851.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268851.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268851.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268852.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268852.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268852.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268852.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268852.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268852.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268852.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268852.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268852.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268852.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268852.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[268852.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[268852.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[268852.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[268852.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[268852.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[268852.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e850]
>[268852.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e850] width 1920 pitch 7680 (/4 1920)
>[268852.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[268852.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[268853.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e850]
>[268853.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e850] width 1920 pitch 7680 (/4 1920)
>[268854.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0fe30]
>[268854.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0fe30] width 1920 pitch 7680 (/4 1920)
>[268869.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[268869.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[268884.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eadd00]
>[268884.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eadd00] width 1920 pitch 7680 (/4 1920)
>[268929.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[268929.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[268944.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eadd00]
>[268944.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eadd00] width 1920 pitch 7680 (/4 1920)
>[268974.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[268974.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[269004.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eadd00]
>[269004.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eadd00] width 1920 pitch 7680 (/4 1920)
>[269019.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269019.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269034.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[269034.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[269064.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[269064.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[269079.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[269079.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[269124.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6470]
>[269124.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6470] width 1920 pitch 7680 (/4 1920)
>[269139.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6470]
>[269139.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6470] width 1920 pitch 7680 (/4 1920)
>[269229.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[269229.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[269259.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6d90]
>[269259.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6d90] width 1920 pitch 7680 (/4 1920)
>[269274.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6d90]
>[269274.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6d90] width 1920 pitch 7680 (/4 1920)
>[269319.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[269319.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[269334.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[269334.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[269364.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[269364.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[269379.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[269379.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[269387.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91820]
>[269387.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91820] width 1920 pitch 7680 (/4 1920)
>[269387.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00e80]
>[269387.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00e80] width 1920 pitch 7680 (/4 1920)
>[269387.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91820]
>[269388.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91820] width 1920 pitch 7680 (/4 1920)
>[269388.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269388.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269388.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00e80]
>[269388.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00e80] width 1920 pitch 7680 (/4 1920)
>[269388.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269388.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269388.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00e80]
>[269388.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00e80] width 1920 pitch 7680 (/4 1920)
>[269388.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269388.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269388.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269388.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269388.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00e80]
>[269388.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00e80] width 1920 pitch 7680 (/4 1920)
>[269388.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269389.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269389.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269389.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269389.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbf00]
>[269389.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbf00] width 1920 pitch 7680 (/4 1920)
>[269389.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c5f0]
>[269389.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c5f0] width 1920 pitch 7680 (/4 1920)
>[269389.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c91820]
>[269389.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c91820] width 1920 pitch 7680 (/4 1920)
>[269389.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac23f0]
>[269389.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac23f0] width 1920 pitch 7680 (/4 1920)
>[269392.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c5f0]
>[269392.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c5f0] width 1920 pitch 7680 (/4 1920)
>[269392.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[269392.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[269392.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d6f0]
>[269392.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d6f0] width 1920 pitch 7680 (/4 1920)
>[269392.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[269392.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[269392.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d6f0]
>[269392.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d6f0] width 1920 pitch 7680 (/4 1920)
>[269392.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99330]
>[269392.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99330] width 1920 pitch 7680 (/4 1920)
>[269392.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[269392.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[269392.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[269392.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[269392.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99330]
>[269393.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99330] width 1920 pitch 7680 (/4 1920)
>[269393.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[269393.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[269393.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7d6f0]
>[269393.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7d6f0] width 1920 pitch 7680 (/4 1920)
>[269395.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93a40]
>[269395.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93a40] width 1920 pitch 7680 (/4 1920)
>[269395.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[269395.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[269397.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01b10]
>[269397.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01b10] width 1920 pitch 7680 (/4 1920)
>[269397.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4650]
>[269397.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4650] width 1920 pitch 7680 (/4 1920)
>[269397.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468180]
>[269397.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468180] width 1920 pitch 7680 (/4 1920)
>[269398.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2556b10]
>[269398.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2556b10] width 1920 pitch 7680 (/4 1920)
>[269398.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ee50]
>[269398.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ee50] width 1920 pitch 7680 (/4 1920)
>[269398.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[269398.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[269398.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[269398.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[269400.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[269400.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[269400.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eac2d0]
>[269400.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eac2d0] width 1920 pitch 7680 (/4 1920)
>[269400.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39312a0]
>[269400.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39312a0] width 1920 pitch 7680 (/4 1920)
>[269404.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0e970]
>[269404.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0e970] width 1920 pitch 7680 (/4 1920)
>[269410.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248cbe0]
>[269410.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248cbe0] width 1920 pitch 7680 (/4 1920)
>[269419.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[269419.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[269419.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb700]
>[269419.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb700] width 1920 pitch 7680 (/4 1920)
>[269419.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac7020]
>[269419.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac7020] width 1920 pitch 7680 (/4 1920)
>[269419.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45a30]
>[269419.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45a30] width 1920 pitch 7680 (/4 1920)
>[269419.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a51e0]
>[269419.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a51e0] width 1920 pitch 7680 (/4 1920)
>[269419.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269419.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269420.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a51e0]
>[269420.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a51e0] width 1920 pitch 7680 (/4 1920)
>[269420.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269420.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269420.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a51e0]
>[269420.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a51e0] width 1920 pitch 7680 (/4 1920)
>[269420.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269420.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269420.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a51e0]
>[269420.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a51e0] width 1920 pitch 7680 (/4 1920)
>[269420.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269420.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269420.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a51e0]
>[269420.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a51e0] width 1920 pitch 7680 (/4 1920)
>[269420.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269420.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269420.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269421.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269421.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[269421.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[269421.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a51e0]
>[269421.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a51e0] width 1920 pitch 7680 (/4 1920)
>[269421.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b566c0]
>[269421.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b566c0] width 1920 pitch 7680 (/4 1920)
>[269422.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd85f0]
>[269422.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd85f0] width 1920 pitch 7680 (/4 1920)
>[269422.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45a30]
>[269422.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45a30] width 1920 pitch 7680 (/4 1920)
>[269422.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24dd3d0]
>[269422.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24dd3d0] width 1920 pitch 7680 (/4 1920)
>[269422.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468180]
>[269422.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468180] width 1920 pitch 7680 (/4 1920)
>[269422.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b60]
>[269422.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b60] width 1920 pitch 7680 (/4 1920)
>[269422.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c7720]
>[269422.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c7720] width 1920 pitch 7680 (/4 1920)
>[269423.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc1b0]
>[269423.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc1b0] width 1920 pitch 7680 (/4 1920)
>[269423.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c7720]
>[269423.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c7720] width 1920 pitch 7680 (/4 1920)
>[269423.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffb5c0]
>[269423.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffb5c0] width 1920 pitch 7680 (/4 1920)
>[269424.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffb5c0]
>[269424.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffb5c0] width 1920 pitch 7680 (/4 1920)
>[269424.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc1b0]
>[269424.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc1b0] width 1920 pitch 7680 (/4 1920)
>[269424.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffb5c0]
>[269424.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffb5c0] width 1920 pitch 7680 (/4 1920)
>[269424.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc1b0]
>[269424.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc1b0] width 1920 pitch 7680 (/4 1920)
>[269425.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b60]
>[269425.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b60] width 1920 pitch 7680 (/4 1920)
>[269425.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7fa0]
>[269425.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7fa0] width 1920 pitch 7680 (/4 1920)
>[269425.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b60]
>[269425.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b60] width 1920 pitch 7680 (/4 1920)
>[269425.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468180]
>[269425.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468180] width 1920 pitch 7680 (/4 1920)
>[269425.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b60]
>[269425.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b60] width 1920 pitch 7680 (/4 1920)
>[269425.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ced340]
>[269425.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ced340] width 1920 pitch 7680 (/4 1920)
>[269425.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b60]
>[269426.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b60] width 1920 pitch 7680 (/4 1920)
>[269426.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4007570]
>[269426.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4007570] width 1920 pitch 7680 (/4 1920)
>[269426.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d14b60]
>[269426.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d14b60] width 1920 pitch 7680 (/4 1920)
>[269426.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2468180]
>[269426.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2468180] width 1920 pitch 7680 (/4 1920)
>[269426.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4007570]
>[269426.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4007570] width 1920 pitch 7680 (/4 1920)
>[269426.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf62b0]
>[269426.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf62b0] width 1920 pitch 7680 (/4 1920)
>[269500.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40167e0]
>[269500.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40167e0] width 1920 pitch 7680 (/4 1920)
>[269515.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5840]
>[269515.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5840] width 1920 pitch 7680 (/4 1920)
>[269560.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947780]
>[269560.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947780] width 1920 pitch 7680 (/4 1920)
>[269575.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc310]
>[269575.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc310] width 1920 pitch 7680 (/4 1920)
>[269590.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[269590.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[269605.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[269605.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[269635.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fe10]
>[269635.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fe10] width 1920 pitch 7680 (/4 1920)
>[269650.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce86f0]
>[269650.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce86f0] width 1920 pitch 7680 (/4 1920)
>[269665.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc4280]
>[269665.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc4280] width 1920 pitch 7680 (/4 1920)
>[269680.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25489f0]
>[269680.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25489f0] width 1920 pitch 7680 (/4 1920)
>[269710.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc310]
>[269710.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc310] width 1920 pitch 7680 (/4 1920)
>[269740.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c020]
>[269740.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c020] width 1920 pitch 7680 (/4 1920)
>[269770.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[269770.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[269800.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03d10]
>[269800.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03d10] width 1920 pitch 7680 (/4 1920)
>[269815.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ea780]
>[269815.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ea780] width 1920 pitch 7680 (/4 1920)
>[269815.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccfb0]
>[269815.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccfb0] width 1920 pitch 7680 (/4 1920)
>[269815.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c200]
>[269815.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c200] width 1920 pitch 7680 (/4 1920)
>[269815.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[269815.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[269830.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45fe0]
>[269830.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45fe0] width 1920 pitch 7680 (/4 1920)
>[269890.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[269890.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[269905.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252c200]
>[269905.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252c200] width 1920 pitch 7680 (/4 1920)
>[269920.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[269920.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[269935.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45fe0]
>[269935.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45fe0] width 1920 pitch 7680 (/4 1920)
>[269950.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[269950.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[270010.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d41b50]
>[270010.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d41b50] width 1920 pitch 7680 (/4 1920)
>[270025.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76fd0]
>[270025.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76fd0] width 1920 pitch 7680 (/4 1920)
>[270055.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[270055.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[270070.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca26c0]
>[270070.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca26c0] width 1920 pitch 7680 (/4 1920)
>[270160.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a652e0]
>[270160.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a652e0] width 1920 pitch 7680 (/4 1920)
>[270175.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e3950]
>[270175.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e3950] width 1920 pitch 7680 (/4 1920)
>[270220.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967330]
>[270220.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967330] width 1920 pitch 7680 (/4 1920)
>[270235.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63240]
>[270235.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63240] width 1920 pitch 7680 (/4 1920)
>[270280.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[270280.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[270295.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[270295.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[270325.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[270325.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[270340.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160430]
>[270340.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160430] width 1920 pitch 7680 (/4 1920)
>[270385.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1d90]
>[270385.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1d90] width 1920 pitch 7680 (/4 1920)
>[270400.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[270400.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[270415.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fca0]
>[270415.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fca0] width 1920 pitch 7680 (/4 1920)
>[270430.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[270430.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[270520.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39511c0]
>[270520.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39511c0] width 1920 pitch 7680 (/4 1920)
>[270535.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39511c0]
>[270535.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39511c0] width 1920 pitch 7680 (/4 1920)
>[270550.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39511c0]
>[270550.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39511c0] width 1920 pitch 7680 (/4 1920)
>[270565.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39511c0]
>[270565.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39511c0] width 1920 pitch 7680 (/4 1920)
>[270655.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[270655.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[270670.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcf5a0]
>[270670.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcf5a0] width 1920 pitch 7680 (/4 1920)
>[270820.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7be60]
>[270820.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7be60] width 1920 pitch 7680 (/4 1920)
>[270835.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7be60]
>[270835.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7be60] width 1920 pitch 7680 (/4 1920)
>[270865.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[270865.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[270875.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f240]
>[270875.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f240] width 1920 pitch 7680 (/4 1920)
>[270875.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b760]
>[270875.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b760] width 1920 pitch 7680 (/4 1920)
>[270875.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8240]
>[270875.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8240] width 1920 pitch 7680 (/4 1920)
>[270875.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f240]
>[270875.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f240] width 1920 pitch 7680 (/4 1920)
>[270875.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8240]
>[270875.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8240] width 1920 pitch 7680 (/4 1920)
>[270875.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f240]
>[270875.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f240] width 1920 pitch 7680 (/4 1920)
>[270875.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8240]
>[270875.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8240] width 1920 pitch 7680 (/4 1920)
>[270875.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b760]
>[270875.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b760] width 1920 pitch 7680 (/4 1920)
>[270875.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f240]
>[270875.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f240] width 1920 pitch 7680 (/4 1920)
>[270876.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f8240]
>[270877.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f8240] width 1920 pitch 7680 (/4 1920)
>[270877.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34aa0]
>[270877.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34aa0] width 1920 pitch 7680 (/4 1920)
>[270880.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524a90]
>[270880.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524a90] width 1920 pitch 7680 (/4 1920)
>[270955.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[270955.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[270970.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4dc90]
>[270970.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4dc90] width 1920 pitch 7680 (/4 1920)
>[271000.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30db5f0]
>[271000.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30db5f0] width 1920 pitch 7680 (/4 1920)
>[271014.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76fd0]
>[271014.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76fd0] width 1920 pitch 7680 (/4 1920)
>[271014.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84700]
>[271015.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84700] width 1920 pitch 7680 (/4 1920)
>[271015.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8f40]
>[271015.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8f40] width 1920 pitch 7680 (/4 1920)
>[271015.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b760]
>[271015.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b760] width 1920 pitch 7680 (/4 1920)
>[271060.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e76fd0]
>[271060.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e76fd0] width 1920 pitch 7680 (/4 1920)
>[271150.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ffd50]
>[271150.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ffd50] width 1920 pitch 7680 (/4 1920)
>[271180.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d41b50]
>[271180.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d41b50] width 1920 pitch 7680 (/4 1920)
>[271210.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcf5a0]
>[271210.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcf5a0] width 1920 pitch 7680 (/4 1920)
>[271225.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[271225.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[271240.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[271240.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[271270.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[271270.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[271285.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[271285.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[271330.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[271330.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[271345.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[271345.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[271405.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4ce0]
>[271405.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4ce0] width 1920 pitch 7680 (/4 1920)
>[271435.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2cf10]
>[271435.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2cf10] width 1920 pitch 7680 (/4 1920)
>[271450.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0d20]
>[271450.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0d20] width 1920 pitch 7680 (/4 1920)
>[271465.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3061460]
>[271465.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3061460] width 1920 pitch 7680 (/4 1920)
>[271525.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced8c0]
>[271525.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced8c0] width 1920 pitch 7680 (/4 1920)
>[271540.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce86f0]
>[271540.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce86f0] width 1920 pitch 7680 (/4 1920)
>[271570.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a652e0]
>[271570.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a652e0] width 1920 pitch 7680 (/4 1920)
>[271585.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9e30]
>[271585.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9e30] width 1920 pitch 7680 (/4 1920)
>[271649.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271649.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271649.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30db5f0]
>[271649.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30db5f0] width 1920 pitch 7680 (/4 1920)
>[271649.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85830]
>[271649.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85830] width 1920 pitch 7680 (/4 1920)
>[271649.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271649.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271649.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85830]
>[271650.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85830] width 1920 pitch 7680 (/4 1920)
>[271650.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271650.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271650.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85830]
>[271650.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85830] width 1920 pitch 7680 (/4 1920)
>[271650.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271650.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271650.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271650.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271650.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271650.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271650.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8f40]
>[271650.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8f40] width 1920 pitch 7680 (/4 1920)
>[271650.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[271650.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[271650.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b760]
>[271650.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b760] width 1920 pitch 7680 (/4 1920)
>[271651.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d41b50]
>[271651.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d41b50] width 1920 pitch 7680 (/4 1920)
>[271651.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e45fe0]
>[271651.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e45fe0] width 1920 pitch 7680 (/4 1920)
>[271651.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[271651.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[271651.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967330]
>[271651.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967330] width 1920 pitch 7680 (/4 1920)
>[271651.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160430]
>[271651.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160430] width 1920 pitch 7680 (/4 1920)
>[271651.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967330]
>[271651.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967330] width 1920 pitch 7680 (/4 1920)
>[271651.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160430]
>[271651.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160430] width 1920 pitch 7680 (/4 1920)
>[271651.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04ce0]
>[271651.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04ce0] width 1920 pitch 7680 (/4 1920)
>[271651.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160430]
>[271651.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160430] width 1920 pitch 7680 (/4 1920)
>[271652.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160430]
>[271652.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160430] width 1920 pitch 7680 (/4 1920)
>[271652.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04ce0]
>[271652.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04ce0] width 1920 pitch 7680 (/4 1920)
>[271652.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04ce0]
>[271653.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04ce0] width 1920 pitch 7680 (/4 1920)
>[271654.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04ce0]
>[271654.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04ce0] width 1920 pitch 7680 (/4 1920)
>[271655.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4c620]
>[271655.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4c620] width 1920 pitch 7680 (/4 1920)
>[271771.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e3950]
>[271771.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e3950] width 1920 pitch 7680 (/4 1920)
>[271771.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9e30]
>[271771.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9e30] width 1920 pitch 7680 (/4 1920)
>[271771.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947780]
>[271771.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947780] width 1920 pitch 7680 (/4 1920)
>[271771.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcf5a0]
>[271771.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcf5a0] width 1920 pitch 7680 (/4 1920)
>[271772.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e3950]
>[271772.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e3950] width 1920 pitch 7680 (/4 1920)
>[271773.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc310]
>[271773.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc310] width 1920 pitch 7680 (/4 1920)
>[271773.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[271773.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[271773.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[271773.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[271855.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9600]
>[271855.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9600] width 1920 pitch 7680 (/4 1920)
>[271885.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2950]
>[271885.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2950] width 1920 pitch 7680 (/4 1920)
>[272005.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[272005.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[272020.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fe10]
>[272020.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fe10] width 1920 pitch 7680 (/4 1920)
>[272050.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2c020]
>[272050.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2c020] width 1920 pitch 7680 (/4 1920)
>[272065.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[272065.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[272095.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[272095.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[272110.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56a80]
>[272110.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56a80] width 1920 pitch 7680 (/4 1920)
>[272125.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9e30]
>[272125.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9e30] width 1920 pitch 7680 (/4 1920)
>[272140.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fe10]
>[272140.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fe10] width 1920 pitch 7680 (/4 1920)
>[272155.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[272155.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[272172.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc310]
>[272172.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc310] width 1920 pitch 7680 (/4 1920)
>[272185.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84700]
>[272185.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84700] width 1920 pitch 7680 (/4 1920)
>[272185.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[272185.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[272186.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70ad0]
>[272186.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70ad0] width 1920 pitch 7680 (/4 1920)
>[272195.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa13a0]
>[272195.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa13a0] width 1920 pitch 7680 (/4 1920)
>[272195.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7be60]
>[272195.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7be60] width 1920 pitch 7680 (/4 1920)
>[272195.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[272195.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[272200.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a10]
>[272200.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a10] width 1920 pitch 7680 (/4 1920)
>[272215.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ea780]
>[272215.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ea780] width 1920 pitch 7680 (/4 1920)
>[272219.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[272219.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[272220.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c550]
>[272220.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c550] width 1920 pitch 7680 (/4 1920)
>[272230.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39170]
>[272230.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39170] width 1920 pitch 7680 (/4 1920)
>[272245.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395abd0]
>[272245.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395abd0] width 1920 pitch 7680 (/4 1920)
>[272260.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[272260.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[272275.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[272275.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[272305.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84700]
>[272305.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84700] width 1920 pitch 7680 (/4 1920)
>[272318.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[272318.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[272318.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[272318.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[272318.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[272318.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[272350.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8bc40]
>[272350.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8bc40] width 1920 pitch 7680 (/4 1920)
>[272365.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[272365.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[272372.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21590]
>[272372.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21590] width 1920 pitch 7680 (/4 1920)
>[272372.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20ab0]
>[272372.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20ab0] width 1920 pitch 7680 (/4 1920)
>[272380.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03d10]
>[272380.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03d10] width 1920 pitch 7680 (/4 1920)
>[272391.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4037390]
>[272391.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4037390] width 1920 pitch 7680 (/4 1920)
>[272391.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa6b0]
>[272391.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa6b0] width 1920 pitch 7680 (/4 1920)
>[272391.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a143c0]
>[272391.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a143c0] width 1920 pitch 7680 (/4 1920)
>[272393.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcf5a0]
>[272393.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcf5a0] width 1920 pitch 7680 (/4 1920)
>[272393.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcf5a0]
>[272393.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcf5a0] width 1920 pitch 7680 (/4 1920)
>[272395.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[272395.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[272440.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[272440.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[272455.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a92560]
>[272455.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a92560] width 1920 pitch 7680 (/4 1920)
>[272470.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9e30]
>[272470.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9e30] width 1920 pitch 7680 (/4 1920)
>[272485.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[272485.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[272545.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf4ba0]
>[272545.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf4ba0] width 1920 pitch 7680 (/4 1920)
>[272560.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[272560.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[272575.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05910]
>[272575.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05910] width 1920 pitch 7680 (/4 1920)
>[272605.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbb710]
>[272605.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbb710] width 1920 pitch 7680 (/4 1920)
>[272614.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca940]
>[272614.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca940] width 1920 pitch 7680 (/4 1920)
>[272615.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ed170]
>[272615.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ed170] width 1920 pitch 7680 (/4 1920)
>[272620.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9e30]
>[272620.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9e30] width 1920 pitch 7680 (/4 1920)
>[272634.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60200]
>[272634.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60200] width 1920 pitch 7680 (/4 1920)
>[272635.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3094af0]
>[272635.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3094af0] width 1920 pitch 7680 (/4 1920)
>[272649.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2950]
>[272649.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2950] width 1920 pitch 7680 (/4 1920)
>[272650.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff9650]
>[272650.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff9650] width 1920 pitch 7680 (/4 1920)
>[272650.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2950]
>[272650.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2950] width 1920 pitch 7680 (/4 1920)
>[272665.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2950]
>[272665.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2950] width 1920 pitch 7680 (/4 1920)
>[272670.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9e30]
>[272670.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9e30] width 1920 pitch 7680 (/4 1920)
>[272671.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2950]
>[272671.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2950] width 1920 pitch 7680 (/4 1920)
>[272671.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4039b90]
>[272671.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4039b90] width 1920 pitch 7680 (/4 1920)
>[272671.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4039b90]
>[272671.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4039b90] width 1920 pitch 7680 (/4 1920)
>[272680.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11010]
>[272680.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11010] width 1920 pitch 7680 (/4 1920)
>[272687.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c02da0]
>[272687.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c02da0] width 1920 pitch 7680 (/4 1920)
>[272695.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c02da0]
>[272695.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c02da0] width 1920 pitch 7680 (/4 1920)
>[272706.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11010]
>[272706.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11010] width 1920 pitch 7680 (/4 1920)
>[272706.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec27b0]
>[272706.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec27b0] width 1920 pitch 7680 (/4 1920)
>[272706.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c020]
>[272706.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c020] width 1920 pitch 7680 (/4 1920)
>[272706.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c020]
>[272706.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c020] width 1920 pitch 7680 (/4 1920)
>[272710.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a11010]
>[272710.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a11010] width 1920 pitch 7680 (/4 1920)
>[272710.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c020]
>[272710.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c020] width 1920 pitch 7680 (/4 1920)
>[272712.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb180]
>[272713.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb180] width 1920 pitch 7680 (/4 1920)
>[272713.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb2dc0]
>[272713.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb2dc0] width 1920 pitch 7680 (/4 1920)
>[272713.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec27b0]
>[272713.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec27b0] width 1920 pitch 7680 (/4 1920)
>[272713.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec27b0]
>[272713.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec27b0] width 1920 pitch 7680 (/4 1920)
>[272713.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebd580]
>[272713.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebd580] width 1920 pitch 7680 (/4 1920)
>[272713.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec27b0]
>[272713.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec27b0] width 1920 pitch 7680 (/4 1920)
>[272713.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3eaf0]
>[272713.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3eaf0] width 1920 pitch 7680 (/4 1920)
>[272713.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f223c0]
>[272713.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f223c0] width 1920 pitch 7680 (/4 1920)
>[272740.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce9920]
>[272740.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce9920] width 1920 pitch 7680 (/4 1920)
>[272755.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c020]
>[272755.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c020] width 1920 pitch 7680 (/4 1920)
>[272756.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8c020]
>[272756.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8c020] width 1920 pitch 7680 (/4 1920)
>[272756.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ee40]
>[272756.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ee40] width 1920 pitch 7680 (/4 1920)
>[272756.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0ba0]
>[272756.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0ba0] width 1920 pitch 7680 (/4 1920)
>[272756.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebebd0]
>[272756.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebebd0] width 1920 pitch 7680 (/4 1920)
>[272761.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ee40]
>[272761.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ee40] width 1920 pitch 7680 (/4 1920)
>[272761.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ee40]
>[272761.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ee40] width 1920 pitch 7680 (/4 1920)
>[272770.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d515d0]
>[272770.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d515d0] width 1920 pitch 7680 (/4 1920)
>[272771.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abaa20]
>[272771.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abaa20] width 1920 pitch 7680 (/4 1920)
>[272771.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f21620]
>[272771.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f21620] width 1920 pitch 7680 (/4 1920)
>[272771.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81940]
>[272771.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81940] width 1920 pitch 7680 (/4 1920)
>[272771.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81940]
>[272771.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81940] width 1920 pitch 7680 (/4 1920)
>[272776.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcd740]
>[272776.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcd740] width 1920 pitch 7680 (/4 1920)
>[272786.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a930]
>[272786.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a930] width 1920 pitch 7680 (/4 1920)
>[272790.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f21620]
>[272790.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f21620] width 1920 pitch 7680 (/4 1920)
>[272791.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[272791.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[272791.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[272792.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[272792.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[272792.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[272800.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[272800.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[272845.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd1a0]
>[272845.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd1a0] width 1920 pitch 7680 (/4 1920)
>[272853.458] (II) AIGLX: Suspending AIGLX clients for VT switch
>[272853.458] (II) RADEON(0): RADEONLeaveVT_KMS
>[272853.458] (II) RADEON(0): Ok, leaving now...
>[272906.597] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[272906.598] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[272906.598] (II) UnloadModule: "evdev"
>[272908.137] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[272908.137] (II) No input driver specified, ignoring this device.
>[272908.137] (II) This device may have been added with another device file.
>[272908.137] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[272908.137] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[272908.137] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[272908.137] 	Option "XkbRules" "evdev"
>[272908.137] 	Option "XkbModel" "evdev"
>[272908.137] 	Option "XkbLayout" "us"
>[272908.137] 	Option "_source" "server/udev"
>[272908.137] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[272908.137] 	Option "path" "/dev/input/event14"
>[272908.137] 	Option "device" "/dev/input/event14"
>[272908.137] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input40/event14"
>[272908.137] 	Option "driver" "evdev"
>[272908.137] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[272908.137] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[272908.142] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[272908.142] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[272908.142] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[272908.142] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[272908.142] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[272908.142] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[272908.142] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[272908.142] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[272908.142] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[272908.142] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input40/event14"
>[272908.142] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[272908.142] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[272908.142] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[272908.142] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[272908.142] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[272908.142] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[272912.094] (II) AIGLX: Resuming AIGLX clients after VT switch
>[272912.094] (II) RADEON(0): RADEONEnterVT_KMS
>[272912.135] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[272912.135] (II) RADEON(0): Using hsync ranges from config file
>[272912.135] (II) RADEON(0): Using vrefresh ranges from config file
>[272912.135] (II) RADEON(0): Printing DDC gathered Modelines:
>[272912.135] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[272912.135] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[272912.135] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[272912.135] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[272912.135] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[272912.135] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[272912.135] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[272912.135] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[272912.135] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[272912.135] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[272912.135] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[272912.135] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[272912.139] (II) RADEON(0): RADEONSaveScreen(2)
>[272914.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17030]
>[272914.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17030] width 1920 pitch 7680 (/4 1920)
>[272915.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069c70]
>[272915.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069c70] width 1920 pitch 7680 (/4 1920)
>[272915.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069c70]
>[272915.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069c70] width 1920 pitch 7680 (/4 1920)
>[272915.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bf60]
>[272915.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bf60] width 1920 pitch 7680 (/4 1920)
>[272916.453] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[272916.453] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[272916.453] (II) UnloadModule: "evdev"
>[272919.010] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[272919.010] (II) No input driver specified, ignoring this device.
>[272919.010] (II) This device may have been added with another device file.
>[272919.010] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[272919.010] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[272919.010] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[272919.010] 	Option "XkbRules" "evdev"
>[272919.010] 	Option "XkbModel" "evdev"
>[272919.010] 	Option "XkbLayout" "us"
>[272919.010] 	Option "_source" "server/udev"
>[272919.010] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[272919.010] 	Option "path" "/dev/input/event14"
>[272919.010] 	Option "device" "/dev/input/event14"
>[272919.010] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input41/event14"
>[272919.010] 	Option "driver" "evdev"
>[272919.010] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[272919.010] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[272919.010] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[272919.010] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[272919.010] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[272919.010] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[272919.010] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[272919.010] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[272919.010] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[272919.010] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[272919.010] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[272919.010] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input41/event14"
>[272919.010] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[272919.010] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[272919.010] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[272919.010] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[272919.010] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[272919.010] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[272926.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a8b0]
>[272926.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a8b0] width 1920 pitch 7680 (/4 1920)
>[272926.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17030]
>[272926.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17030] width 1920 pitch 7680 (/4 1920)
>[272928.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f4b0]
>[272928.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f4b0] width 1920 pitch 7680 (/4 1920)
>[272928.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f3640]
>[272928.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f3640] width 1920 pitch 7680 (/4 1920)
>[272928.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17030]
>[272928.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17030] width 1920 pitch 7680 (/4 1920)
>[272928.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bf60]
>[272928.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bf60] width 1920 pitch 7680 (/4 1920)
>[272929.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f4b0]
>[272929.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f4b0] width 1920 pitch 7680 (/4 1920)
>[272929.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f3640]
>[272930.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f3640] width 1920 pitch 7680 (/4 1920)
>[272930.130] (II) AIGLX: Suspending AIGLX clients for VT switch
>[272930.130] (II) RADEON(0): RADEONLeaveVT_KMS
>[272930.130] (II) RADEON(0): Ok, leaving now...
>[272954.637] (II) AIGLX: Resuming AIGLX clients after VT switch
>[272954.637] (II) RADEON(0): RADEONEnterVT_KMS
>[272954.679] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[272954.679] (II) RADEON(0): Using hsync ranges from config file
>[272954.679] (II) RADEON(0): Using vrefresh ranges from config file
>[272954.679] (II) RADEON(0): Printing DDC gathered Modelines:
>[272954.679] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[272954.679] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[272954.679] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[272954.679] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[272954.679] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[272954.679] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[272954.679] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[272954.679] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[272954.679] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[272954.679] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[272954.679] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[272954.679] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[272954.681] (II) RADEON(0): RADEONSaveScreen(2)
>[272954.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[272954.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[272955.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[272955.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[272955.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84700]
>[272955.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84700] width 1920 pitch 7680 (/4 1920)
>[272955.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[272956.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[272956.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84700]
>[272956.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84700] width 1920 pitch 7680 (/4 1920)
>[272956.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[272956.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[272956.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b84700]
>[272956.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b84700] width 1920 pitch 7680 (/4 1920)
>[272956.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524a90]
>[272956.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524a90] width 1920 pitch 7680 (/4 1920)
>[272956.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[272956.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[272956.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524a90]
>[272956.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524a90] width 1920 pitch 7680 (/4 1920)
>[272956.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524a90]
>[272956.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524a90] width 1920 pitch 7680 (/4 1920)
>[272957.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e04350]
>[272957.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e04350] width 1920 pitch 7680 (/4 1920)
>[272957.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccfb0]
>[272957.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccfb0] width 1920 pitch 7680 (/4 1920)
>[272957.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca27e0]
>[272957.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca27e0] width 1920 pitch 7680 (/4 1920)
>[272957.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccfb0]
>[272957.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccfb0] width 1920 pitch 7680 (/4 1920)
>[272957.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca27e0]
>[272957.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca27e0] width 1920 pitch 7680 (/4 1920)
>[272957.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccfb0]
>[272957.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccfb0] width 1920 pitch 7680 (/4 1920)
>[272957.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca27e0]
>[272957.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca27e0] width 1920 pitch 7680 (/4 1920)
>[272969.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f3640]
>[272969.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f3640] width 1920 pitch 7680 (/4 1920)
>[272979.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3fb90]
>[272979.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3fb90] width 1920 pitch 7680 (/4 1920)
>[272981.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7af70]
>[272981.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7af70] width 1920 pitch 7680 (/4 1920)
>[272999.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7af40]
>[272999.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7af40] width 1920 pitch 7680 (/4 1920)
>[273010.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c61560]
>[273010.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c61560] width 1920 pitch 7680 (/4 1920)
>[273010.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c61560]
>[273010.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c61560] width 1920 pitch 7680 (/4 1920)
>[273010.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c800]
>[273011.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c800] width 1920 pitch 7680 (/4 1920)
>[273011.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5ebf0]
>[273011.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5ebf0] width 1920 pitch 7680 (/4 1920)
>[273014.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a50480]
>[273014.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a50480] width 1920 pitch 7680 (/4 1920)
>[273026.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c7d80]
>[273026.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c7d80] width 1920 pitch 7680 (/4 1920)
>[273029.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3947f90]
>[273029.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3947f90] width 1920 pitch 7680 (/4 1920)
>[273044.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8bf80]
>[273044.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8bf80] width 1920 pitch 7680 (/4 1920)
>[273052.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d558b0]
>[273052.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d558b0] width 1920 pitch 7680 (/4 1920)
>[273052.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d558b0]
>[273052.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d558b0] width 1920 pitch 7680 (/4 1920)
>[273059.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2badf30]
>[273059.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2badf30] width 1920 pitch 7680 (/4 1920)
>[273061.403] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273061.403] (II) RADEON(0): RADEONLeaveVT_KMS
>[273061.403] (II) RADEON(0): Ok, leaving now...
>[273074.148] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273074.148] (II) RADEON(0): RADEONEnterVT_KMS
>[273074.186] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273074.186] (II) RADEON(0): Using hsync ranges from config file
>[273074.186] (II) RADEON(0): Using vrefresh ranges from config file
>[273074.186] (II) RADEON(0): Printing DDC gathered Modelines:
>[273074.186] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273074.186] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273074.186] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273074.186] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273074.186] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273074.186] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273074.187] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273074.187] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273074.187] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273074.187] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273074.187] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273074.187] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273074.189] (II) RADEON(0): RADEONSaveScreen(2)
>[273074.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d86680]
>[273074.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d86680] width 1920 pitch 7680 (/4 1920)
>[273074.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a070]
>[273074.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a070] width 1920 pitch 7680 (/4 1920)
>[273074.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d86680]
>[273074.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d86680] width 1920 pitch 7680 (/4 1920)
>[273074.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a070]
>[273074.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a070] width 1920 pitch 7680 (/4 1920)
>[273074.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d86680]
>[273074.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d86680] width 1920 pitch 7680 (/4 1920)
>[273074.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a070]
>[273074.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a070] width 1920 pitch 7680 (/4 1920)
>[273074.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d86680]
>[273074.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d86680] width 1920 pitch 7680 (/4 1920)
>[273074.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a070]
>[273074.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a070] width 1920 pitch 7680 (/4 1920)
>[273076.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00520]
>[273076.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00520] width 1920 pitch 7680 (/4 1920)
>[273076.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315bc60]
>[273076.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315bc60] width 1920 pitch 7680 (/4 1920)
>[273076.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00520]
>[273076.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00520] width 1920 pitch 7680 (/4 1920)
>[273076.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315bc60]
>[273076.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315bc60] width 1920 pitch 7680 (/4 1920)
>[273076.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00520]
>[273076.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00520] width 1920 pitch 7680 (/4 1920)
>[273076.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315bc60]
>[273076.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315bc60] width 1920 pitch 7680 (/4 1920)
>[273076.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00520]
>[273076.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00520] width 1920 pitch 7680 (/4 1920)
>[273076.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315bc60]
>[273076.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315bc60] width 1920 pitch 7680 (/4 1920)
>[273076.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00520]
>[273076.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00520] width 1920 pitch 7680 (/4 1920)
>[273084.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315bc60]
>[273084.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315bc60] width 1920 pitch 7680 (/4 1920)
>[273084.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae080]
>[273084.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae080] width 1920 pitch 7680 (/4 1920)
>[273084.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baa0a0]
>[273084.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baa0a0] width 1920 pitch 7680 (/4 1920)
>[273084.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8bf80]
>[273084.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8bf80] width 1920 pitch 7680 (/4 1920)
>[273084.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baa0a0]
>[273084.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baa0a0] width 1920 pitch 7680 (/4 1920)
>[273084.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8bf80]
>[273084.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8bf80] width 1920 pitch 7680 (/4 1920)
>[273084.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baa0a0]
>[273084.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baa0a0] width 1920 pitch 7680 (/4 1920)
>[273084.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8bf80]
>[273084.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8bf80] width 1920 pitch 7680 (/4 1920)
>[273084.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baa0a0]
>[273084.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baa0a0] width 1920 pitch 7680 (/4 1920)
>[273084.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315bc60]
>[273084.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315bc60] width 1920 pitch 7680 (/4 1920)
>[273084.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93060]
>[273084.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93060] width 1920 pitch 7680 (/4 1920)
>[273084.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93060]
>[273084.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93060] width 1920 pitch 7680 (/4 1920)
>[273085.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bfa0]
>[273085.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bfa0] width 1920 pitch 7680 (/4 1920)
>[273085.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae080]
>[273085.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae080] width 1920 pitch 7680 (/4 1920)
>[273085.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bfa0]
>[273085.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bfa0] width 1920 pitch 7680 (/4 1920)
>[273085.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae080]
>[273085.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae080] width 1920 pitch 7680 (/4 1920)
>[273085.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bfa0]
>[273085.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bfa0] width 1920 pitch 7680 (/4 1920)
>[273085.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae080]
>[273086.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae080] width 1920 pitch 7680 (/4 1920)
>[273086.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bfa0]
>[273086.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bfa0] width 1920 pitch 7680 (/4 1920)
>[273086.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7950]
>[273086.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7950] width 1920 pitch 7680 (/4 1920)
>[273089.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8bf80]
>[273089.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8bf80] width 1920 pitch 7680 (/4 1920)
>[273091.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273091.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273091.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93060]
>[273091.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93060] width 1920 pitch 7680 (/4 1920)
>[273091.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273091.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273091.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93060]
>[273091.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93060] width 1920 pitch 7680 (/4 1920)
>[273091.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273091.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273091.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93060]
>[273091.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93060] width 1920 pitch 7680 (/4 1920)
>[273091.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273091.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273091.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c93060]
>[273091.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c93060] width 1920 pitch 7680 (/4 1920)
>[273096.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7950]
>[273096.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7950] width 1920 pitch 7680 (/4 1920)
>[273096.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd4850]
>[273096.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd4850] width 1920 pitch 7680 (/4 1920)
>[273096.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fadae0]
>[273096.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fadae0] width 1920 pitch 7680 (/4 1920)
>[273096.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7950]
>[273096.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7950] width 1920 pitch 7680 (/4 1920)
>[273096.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fadae0]
>[273096.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fadae0] width 1920 pitch 7680 (/4 1920)
>[273096.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7950]
>[273096.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7950] width 1920 pitch 7680 (/4 1920)
>[273096.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fadae0]
>[273096.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fadae0] width 1920 pitch 7680 (/4 1920)
>[273096.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf7950]
>[273096.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf7950] width 1920 pitch 7680 (/4 1920)
>[273096.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cafa0]
>[273096.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cafa0] width 1920 pitch 7680 (/4 1920)
>[273097.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae080]
>[273097.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae080] width 1920 pitch 7680 (/4 1920)
>[273102.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5620]
>[273102.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5620] width 1920 pitch 7680 (/4 1920)
>[273102.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8bf80]
>[273102.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8bf80] width 1920 pitch 7680 (/4 1920)
>[273102.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273102.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273102.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c92e20]
>[273102.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c92e20] width 1920 pitch 7680 (/4 1920)
>[273104.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5620]
>[273104.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5620] width 1920 pitch 7680 (/4 1920)
>[273106.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb5620]
>[273106.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb5620] width 1920 pitch 7680 (/4 1920)
>[273106.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069320]
>[273106.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069320] width 1920 pitch 7680 (/4 1920)
>[273110.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ead1a0]
>[273110.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ead1a0] width 1920 pitch 7680 (/4 1920)
>[273119.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5e2c0]
>[273119.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5e2c0] width 1920 pitch 7680 (/4 1920)
>[273134.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250a070]
>[273134.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250a070] width 1920 pitch 7680 (/4 1920)
>[273149.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bfa0]
>[273149.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bfa0] width 1920 pitch 7680 (/4 1920)
>[273164.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9bfa0]
>[273164.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9bfa0] width 1920 pitch 7680 (/4 1920)
>[273178.054] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273178.054] (II) RADEON(0): RADEONLeaveVT_KMS
>[273178.054] (II) RADEON(0): Ok, leaving now...
>[273186.763] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273186.763] (II) RADEON(0): RADEONEnterVT_KMS
>[273186.801] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273186.801] (II) RADEON(0): Using hsync ranges from config file
>[273186.801] (II) RADEON(0): Using vrefresh ranges from config file
>[273186.801] (II) RADEON(0): Printing DDC gathered Modelines:
>[273186.801] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273186.801] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273186.801] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273186.801] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273186.801] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273186.801] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273186.801] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273186.801] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273186.801] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273186.801] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273186.801] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273186.801] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273186.805] (II) RADEON(0): RADEONSaveScreen(2)
>[273187.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[273187.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[273187.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6f310]
>[273187.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6f310] width 1920 pitch 7680 (/4 1920)
>[273187.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[273187.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[273187.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efca00]
>[273187.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efca00] width 1920 pitch 7680 (/4 1920)
>[273187.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[273187.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[273187.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efca00]
>[273187.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efca00] width 1920 pitch 7680 (/4 1920)
>[273187.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0c260]
>[273187.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0c260] width 1920 pitch 7680 (/4 1920)
>[273187.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efca00]
>[273187.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efca00] width 1920 pitch 7680 (/4 1920)
>[273191.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6f310]
>[273191.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6f310] width 1920 pitch 7680 (/4 1920)
>[273191.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc88c0]
>[273191.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc88c0] width 1920 pitch 7680 (/4 1920)
>[273191.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e800]
>[273191.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e800] width 1920 pitch 7680 (/4 1920)
>[273191.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc88c0]
>[273191.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc88c0] width 1920 pitch 7680 (/4 1920)
>[273191.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6f310]
>[273192.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6f310] width 1920 pitch 7680 (/4 1920)
>[273192.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e800]
>[273192.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e800] width 1920 pitch 7680 (/4 1920)
>[273192.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6f310]
>[273192.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6f310] width 1920 pitch 7680 (/4 1920)
>[273192.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e800]
>[273192.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e800] width 1920 pitch 7680 (/4 1920)
>[273192.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6f310]
>[273192.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6f310] width 1920 pitch 7680 (/4 1920)
>[273196.557] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273196.557] (II) RADEON(0): RADEONLeaveVT_KMS
>[273196.557] (II) RADEON(0): Ok, leaving now...
>[273208.666] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273208.666] (II) RADEON(0): RADEONEnterVT_KMS
>[273208.707] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273208.707] (II) RADEON(0): Using hsync ranges from config file
>[273208.707] (II) RADEON(0): Using vrefresh ranges from config file
>[273208.707] (II) RADEON(0): Printing DDC gathered Modelines:
>[273208.707] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273208.707] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273208.707] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273208.707] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273208.707] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273208.707] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273208.707] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273208.707] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273208.707] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273208.707] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273208.707] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273208.707] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273208.711] (II) RADEON(0): RADEONSaveScreen(2)
>[273211.281] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273211.281] (II) RADEON(0): RADEONLeaveVT_KMS
>[273211.281] (II) RADEON(0): Ok, leaving now...
>[273225.978] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273225.978] (II) RADEON(0): RADEONEnterVT_KMS
>[273226.019] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273226.019] (II) RADEON(0): Using hsync ranges from config file
>[273226.019] (II) RADEON(0): Using vrefresh ranges from config file
>[273226.019] (II) RADEON(0): Printing DDC gathered Modelines:
>[273226.019] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273226.019] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273226.019] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273226.019] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273226.019] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273226.019] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273226.019] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273226.019] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273226.019] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273226.019] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273226.019] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273226.019] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273226.022] (II) RADEON(0): RADEONSaveScreen(2)
>[273226.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9b10]
>[273226.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9b10] width 1920 pitch 7680 (/4 1920)
>[273227.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d09a80]
>[273227.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d09a80] width 1920 pitch 7680 (/4 1920)
>[273228.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5bc00]
>[273228.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5bc00] width 1920 pitch 7680 (/4 1920)
>[273228.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8520]
>[273228.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8520] width 1920 pitch 7680 (/4 1920)
>[273228.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e7b0]
>[273228.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e7b0] width 1920 pitch 7680 (/4 1920)
>[273228.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8520]
>[273228.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8520] width 1920 pitch 7680 (/4 1920)
>[273228.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38620]
>[273228.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38620] width 1920 pitch 7680 (/4 1920)
>[273228.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8520]
>[273228.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8520] width 1920 pitch 7680 (/4 1920)
>[273228.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c38620]
>[273228.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c38620] width 1920 pitch 7680 (/4 1920)
>[273228.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8520]
>[273228.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8520] width 1920 pitch 7680 (/4 1920)
>[273229.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efda20]
>[273229.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efda20] width 1920 pitch 7680 (/4 1920)
>[273229.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034340]
>[273229.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034340] width 1920 pitch 7680 (/4 1920)
>[273229.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efda20]
>[273229.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efda20] width 1920 pitch 7680 (/4 1920)
>[273229.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034340]
>[273229.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034340] width 1920 pitch 7680 (/4 1920)
>[273229.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efda20]
>[273229.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efda20] width 1920 pitch 7680 (/4 1920)
>[273229.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034340]
>[273229.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034340] width 1920 pitch 7680 (/4 1920)
>[273229.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efda20]
>[273229.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efda20] width 1920 pitch 7680 (/4 1920)
>[273229.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034340]
>[273229.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034340] width 1920 pitch 7680 (/4 1920)
>[273232.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d558b0]
>[273232.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d558b0] width 1920 pitch 7680 (/4 1920)
>[273232.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d35760]
>[273232.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d35760] width 1920 pitch 7680 (/4 1920)
>[273232.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d558b0]
>[273232.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d558b0] width 1920 pitch 7680 (/4 1920)
>[273232.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d35760]
>[273232.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d35760] width 1920 pitch 7680 (/4 1920)
>[273232.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d558b0]
>[273232.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d558b0] width 1920 pitch 7680 (/4 1920)
>[273234.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273234.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273234.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efda20]
>[273234.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efda20] width 1920 pitch 7680 (/4 1920)
>[273234.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df54e0]
>[273234.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df54e0] width 1920 pitch 7680 (/4 1920)
>[273234.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efda20]
>[273234.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efda20] width 1920 pitch 7680 (/4 1920)
>[273235.184] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273235.184] (II) RADEON(0): RADEONLeaveVT_KMS
>[273235.184] (II) RADEON(0): Ok, leaving now...
>[273237.898] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273237.898] (II) RADEON(0): RADEONEnterVT_KMS
>[273237.936] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273237.936] (II) RADEON(0): Using hsync ranges from config file
>[273237.936] (II) RADEON(0): Using vrefresh ranges from config file
>[273237.936] (II) RADEON(0): Printing DDC gathered Modelines:
>[273237.936] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273237.936] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273237.936] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273237.936] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273237.936] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273237.936] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273237.936] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273237.936] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273237.936] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273237.936] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273237.936] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273237.936] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273237.939] (II) RADEON(0): RADEONSaveScreen(2)
>[273241.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ba9ec0]
>[273241.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ba9ec0] width 1920 pitch 7680 (/4 1920)
>[273241.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e66bb0]
>[273241.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e66bb0] width 1920 pitch 7680 (/4 1920)
>[273241.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ba9ec0]
>[273241.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ba9ec0] width 1920 pitch 7680 (/4 1920)
>[273241.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e66bb0]
>[273241.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e66bb0] width 1920 pitch 7680 (/4 1920)
>[273241.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72f10]
>[273241.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72f10] width 1920 pitch 7680 (/4 1920)
>[273241.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e66bb0]
>[273241.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e66bb0] width 1920 pitch 7680 (/4 1920)
>[273241.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72f10]
>[273241.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72f10] width 1920 pitch 7680 (/4 1920)
>[273244.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2bff0]
>[273244.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2bff0] width 1920 pitch 7680 (/4 1920)
>[273244.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed4e20]
>[273244.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed4e20] width 1920 pitch 7680 (/4 1920)
>[273244.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0af0]
>[273244.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0af0] width 1920 pitch 7680 (/4 1920)
>[273244.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0d30]
>[273244.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0d30] width 1920 pitch 7680 (/4 1920)
>[273244.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ec650]
>[273244.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ec650] width 1920 pitch 7680 (/4 1920)
>[273244.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3070ee0]
>[273244.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3070ee0] width 1920 pitch 7680 (/4 1920)
>[273244.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ec650]
>[273244.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ec650] width 1920 pitch 7680 (/4 1920)
>[273244.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3070ee0]
>[273244.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3070ee0] width 1920 pitch 7680 (/4 1920)
>[273244.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ec650]
>[273244.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ec650] width 1920 pitch 7680 (/4 1920)
>[273244.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3070ee0]
>[273244.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3070ee0] width 1920 pitch 7680 (/4 1920)
>[273245.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9a90]
>[273245.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9a90] width 1920 pitch 7680 (/4 1920)
>[273245.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9a90]
>[273245.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9a90] width 1920 pitch 7680 (/4 1920)
>[273245.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40284b0]
>[273245.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40284b0] width 1920 pitch 7680 (/4 1920)
>[273245.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40284b0]
>[273245.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40284b0] width 1920 pitch 7680 (/4 1920)
>[273249.343] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273249.343] (II) RADEON(0): RADEONLeaveVT_KMS
>[273249.343] (II) RADEON(0): Ok, leaving now...
>[273277.042] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273277.042] (II) RADEON(0): RADEONEnterVT_KMS
>[273277.085] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273277.085] (II) RADEON(0): Using hsync ranges from config file
>[273277.085] (II) RADEON(0): Using vrefresh ranges from config file
>[273277.085] (II) RADEON(0): Printing DDC gathered Modelines:
>[273277.085] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273277.085] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273277.085] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273277.085] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273277.085] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273277.085] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273277.085] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273277.085] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273277.085] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273277.085] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273277.085] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273277.085] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273277.087] (II) RADEON(0): RADEONSaveScreen(2)
>[273277.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a503b0]
>[273277.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a503b0] width 1920 pitch 7680 (/4 1920)
>[273277.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[273277.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[273277.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a503b0]
>[273277.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a503b0] width 1920 pitch 7680 (/4 1920)
>[273277.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[273277.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[273277.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a503b0]
>[273277.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a503b0] width 1920 pitch 7680 (/4 1920)
>[273277.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[273277.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[273277.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a503b0]
>[273277.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a503b0] width 1920 pitch 7680 (/4 1920)
>[273277.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5ddf0]
>[273277.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5ddf0] width 1920 pitch 7680 (/4 1920)
>[273277.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a503b0]
>[273277.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a503b0] width 1920 pitch 7680 (/4 1920)
>[273278.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247d110]
>[273278.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247d110] width 1920 pitch 7680 (/4 1920)
>[273279.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35010]
>[273279.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35010] width 1920 pitch 7680 (/4 1920)
>[273279.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273279.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273279.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35010]
>[273279.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35010] width 1920 pitch 7680 (/4 1920)
>[273279.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273279.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273279.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35010]
>[273279.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35010] width 1920 pitch 7680 (/4 1920)
>[273279.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273279.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273279.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35010]
>[273279.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35010] width 1920 pitch 7680 (/4 1920)
>[273279.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273279.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273288.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3c670]
>[273288.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3c670] width 1920 pitch 7680 (/4 1920)
>[273292.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40343a0]
>[273292.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40343a0] width 1920 pitch 7680 (/4 1920)
>[273297.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23420]
>[273297.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23420] width 1920 pitch 7680 (/4 1920)
>[273298.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fabc60]
>[273298.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fabc60] width 1920 pitch 7680 (/4 1920)
>[273300.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3d420]
>[273300.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3d420] width 1920 pitch 7680 (/4 1920)
>[273300.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3065c80]
>[273300.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3065c80] width 1920 pitch 7680 (/4 1920)
>[273300.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3d420]
>[273300.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3d420] width 1920 pitch 7680 (/4 1920)
>[273302.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffb270]
>[273302.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffb270] width 1920 pitch 7680 (/4 1920)
>[273302.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7450]
>[273302.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7450] width 1920 pitch 7680 (/4 1920)
>[273302.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feae70]
>[273302.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feae70] width 1920 pitch 7680 (/4 1920)
>[273302.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feae70]
>[273302.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feae70] width 1920 pitch 7680 (/4 1920)
>[273303.418] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273303.418] (II) RADEON(0): RADEONLeaveVT_KMS
>[273303.418] (II) RADEON(0): Ok, leaving now...
>[273339.521] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273339.521] (II) RADEON(0): RADEONEnterVT_KMS
>[273339.559] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273339.559] (II) RADEON(0): Using hsync ranges from config file
>[273339.559] (II) RADEON(0): Using vrefresh ranges from config file
>[273339.559] (II) RADEON(0): Printing DDC gathered Modelines:
>[273339.559] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273339.559] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273339.559] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273339.559] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273339.559] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273339.559] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273339.559] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273339.559] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273339.559] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273339.559] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273339.559] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273339.559] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273339.563] (II) RADEON(0): RADEONSaveScreen(2)
>[273341.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a5b0]
>[273341.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a5b0] width 1920 pitch 7680 (/4 1920)
>[273352.713] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273352.713] (II) RADEON(0): RADEONLeaveVT_KMS
>[273352.713] (II) RADEON(0): Ok, leaving now...
>[273386.961] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273386.961] (II) RADEON(0): RADEONEnterVT_KMS
>[273387.001] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273387.001] (II) RADEON(0): Using hsync ranges from config file
>[273387.001] (II) RADEON(0): Using vrefresh ranges from config file
>[273387.001] (II) RADEON(0): Printing DDC gathered Modelines:
>[273387.001] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273387.001] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273387.001] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273387.001] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273387.001] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273387.001] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273387.001] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273387.001] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273387.001] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273387.001] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273387.001] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273387.001] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273387.004] (II) RADEON(0): RADEONSaveScreen(2)
>[273396.241] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273396.241] (II) RADEON(0): RADEONLeaveVT_KMS
>[273396.241] (II) RADEON(0): Ok, leaving now...
>[273416.745] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273416.745] (II) RADEON(0): RADEONEnterVT_KMS
>[273416.785] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273416.785] (II) RADEON(0): Using hsync ranges from config file
>[273416.785] (II) RADEON(0): Using vrefresh ranges from config file
>[273416.785] (II) RADEON(0): Printing DDC gathered Modelines:
>[273416.785] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273416.785] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273416.785] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273416.785] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273416.785] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273416.785] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273416.785] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273416.785] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273416.785] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273416.785] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273416.785] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273416.785] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273416.788] (II) RADEON(0): RADEONSaveScreen(2)
>[273422.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d85990]
>[273422.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d85990] width 1920 pitch 7680 (/4 1920)
>[273422.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baaad0]
>[273422.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baaad0] width 1920 pitch 7680 (/4 1920)
>[273422.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fc80]
>[273422.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fc80] width 1920 pitch 7680 (/4 1920)
>[273422.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fabc60]
>[273422.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fabc60] width 1920 pitch 7680 (/4 1920)
>[273422.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fc80]
>[273422.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fc80] width 1920 pitch 7680 (/4 1920)
>[273423.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baaad0]
>[273423.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baaad0] width 1920 pitch 7680 (/4 1920)
>[273423.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fabc60]
>[273423.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fabc60] width 1920 pitch 7680 (/4 1920)
>[273423.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fc80]
>[273423.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fc80] width 1920 pitch 7680 (/4 1920)
>[273423.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fabc60]
>[273423.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fabc60] width 1920 pitch 7680 (/4 1920)
>[273423.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fc80]
>[273423.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fc80] width 1920 pitch 7680 (/4 1920)
>[273424.695] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273424.695] (II) RADEON(0): RADEONLeaveVT_KMS
>[273424.695] (II) RADEON(0): Ok, leaving now...
>[273445.328] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273445.328] (II) RADEON(0): RADEONEnterVT_KMS
>[273445.370] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273445.370] (II) RADEON(0): Using hsync ranges from config file
>[273445.370] (II) RADEON(0): Using vrefresh ranges from config file
>[273445.370] (II) RADEON(0): Printing DDC gathered Modelines:
>[273445.370] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273445.370] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273445.370] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273445.370] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273445.370] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273445.370] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273445.370] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273445.370] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273445.370] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273445.370] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273445.370] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273445.370] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273445.372] (II) RADEON(0): RADEONSaveScreen(2)
>[273449.551] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273449.551] (II) RADEON(0): RADEONLeaveVT_KMS
>[273449.551] (II) RADEON(0): Ok, leaving now...
>[273459.520] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273459.520] (II) RADEON(0): RADEONEnterVT_KMS
>[273459.562] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273459.562] (II) RADEON(0): Using hsync ranges from config file
>[273459.562] (II) RADEON(0): Using vrefresh ranges from config file
>[273459.562] (II) RADEON(0): Printing DDC gathered Modelines:
>[273459.562] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273459.562] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273459.562] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273459.562] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273459.562] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273459.562] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273459.562] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273459.562] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273459.562] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273459.562] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273459.562] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273459.562] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273459.566] (II) RADEON(0): RADEONSaveScreen(2)
>[273463.176] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273463.176] (II) RADEON(0): RADEONLeaveVT_KMS
>[273463.176] (II) RADEON(0): Ok, leaving now...
>[273483.279] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273483.279] (II) RADEON(0): RADEONEnterVT_KMS
>[273483.320] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273483.320] (II) RADEON(0): Using hsync ranges from config file
>[273483.320] (II) RADEON(0): Using vrefresh ranges from config file
>[273483.320] (II) RADEON(0): Printing DDC gathered Modelines:
>[273483.320] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273483.320] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273483.320] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273483.320] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273483.320] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273483.320] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273483.320] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273483.320] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273483.320] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273483.320] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273483.320] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273483.320] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273483.324] (II) RADEON(0): RADEONSaveScreen(2)
>[273485.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54210]
>[273485.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54210] width 1920 pitch 7680 (/4 1920)
>[273486.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902b40]
>[273486.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902b40] width 1920 pitch 7680 (/4 1920)
>[273486.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54210]
>[273486.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54210] width 1920 pitch 7680 (/4 1920)
>[273486.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54210]
>[273486.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54210] width 1920 pitch 7680 (/4 1920)
>[273491.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902b40]
>[273491.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902b40] width 1920 pitch 7680 (/4 1920)
>[273491.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922680]
>[273491.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922680] width 1920 pitch 7680 (/4 1920)
>[273491.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902b40]
>[273491.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902b40] width 1920 pitch 7680 (/4 1920)
>[273491.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3922680]
>[273491.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3922680] width 1920 pitch 7680 (/4 1920)
>[273491.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902b40]
>[273491.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902b40] width 1920 pitch 7680 (/4 1920)
>[273492.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca040]
>[273493.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca040] width 1920 pitch 7680 (/4 1920)
>[273493.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902b40]
>[273493.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902b40] width 1920 pitch 7680 (/4 1920)
>[273493.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca040]
>[273493.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca040] width 1920 pitch 7680 (/4 1920)
>[273493.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3902b40]
>[273493.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3902b40] width 1920 pitch 7680 (/4 1920)
>[273493.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca040]
>[273493.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca040] width 1920 pitch 7680 (/4 1920)
>[273493.790] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273493.790] (II) RADEON(0): RADEONLeaveVT_KMS
>[273493.790] (II) RADEON(0): Ok, leaving now...
>[273530.575] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273530.575] (II) RADEON(0): RADEONEnterVT_KMS
>[273530.616] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273530.616] (II) RADEON(0): Using hsync ranges from config file
>[273530.616] (II) RADEON(0): Using vrefresh ranges from config file
>[273530.616] (II) RADEON(0): Printing DDC gathered Modelines:
>[273530.616] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273530.616] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273530.616] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273530.616] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273530.616] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273530.616] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273530.616] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273530.616] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273530.616] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273530.616] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273530.616] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273530.616] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273530.619] (II) RADEON(0): RADEONSaveScreen(2)
>[273530.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b86f90]
>[273530.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b86f90] width 1920 pitch 7680 (/4 1920)
>[273533.205] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273533.205] (II) RADEON(0): RADEONLeaveVT_KMS
>[273533.205] (II) RADEON(0): Ok, leaving now...
>[273586.527] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[273586.528] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[273586.528] (II) UnloadModule: "evdev"
>[273588.078] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[273588.078] (II) No input driver specified, ignoring this device.
>[273588.078] (II) This device may have been added with another device file.
>[273588.078] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[273588.078] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[273588.078] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[273588.078] 	Option "XkbRules" "evdev"
>[273588.078] 	Option "XkbModel" "evdev"
>[273588.078] 	Option "XkbLayout" "us"
>[273588.078] 	Option "_source" "server/udev"
>[273588.078] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[273588.078] 	Option "path" "/dev/input/event14"
>[273588.078] 	Option "device" "/dev/input/event14"
>[273588.078] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input42/event14"
>[273588.078] 	Option "driver" "evdev"
>[273588.078] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[273588.078] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[273588.078] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[273588.078] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[273588.078] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[273588.079] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[273588.079] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[273588.079] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[273588.079] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[273588.079] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[273588.079] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[273588.079] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input42/event14"
>[273588.079] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[273588.079] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[273588.079] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[273588.079] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[273588.079] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[273588.079] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[273596.086] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273596.086] (II) RADEON(0): RADEONEnterVT_KMS
>[273596.125] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273596.125] (II) RADEON(0): Using hsync ranges from config file
>[273596.125] (II) RADEON(0): Using vrefresh ranges from config file
>[273596.125] (II) RADEON(0): Printing DDC gathered Modelines:
>[273596.125] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273596.125] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273596.125] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273596.125] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273596.125] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273596.125] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273596.125] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273596.125] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273596.125] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273596.125] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273596.125] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273596.125] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273596.127] (II) RADEON(0): RADEONSaveScreen(2)
>[273596.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526f30]
>[273596.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526f30] width 1920 pitch 7680 (/4 1920)
>[273596.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91db0]
>[273596.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91db0] width 1920 pitch 7680 (/4 1920)
>[273596.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526f30]
>[273596.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526f30] width 1920 pitch 7680 (/4 1920)
>[273596.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91db0]
>[273596.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91db0] width 1920 pitch 7680 (/4 1920)
>[273596.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526f30]
>[273596.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526f30] width 1920 pitch 7680 (/4 1920)
>[273596.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91db0]
>[273596.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91db0] width 1920 pitch 7680 (/4 1920)
>[273596.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba6d0]
>[273596.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba6d0] width 1920 pitch 7680 (/4 1920)
>[273596.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91db0]
>[273596.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91db0] width 1920 pitch 7680 (/4 1920)
>[273596.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba6d0]
>[273596.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba6d0] width 1920 pitch 7680 (/4 1920)
>[273596.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e91db0]
>[273596.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e91db0] width 1920 pitch 7680 (/4 1920)
>[273598.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaa570]
>[273598.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaa570] width 1920 pitch 7680 (/4 1920)
>[273598.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fe80]
>[273598.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fe80] width 1920 pitch 7680 (/4 1920)
>[273598.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaa570]
>[273598.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaa570] width 1920 pitch 7680 (/4 1920)
>[273598.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fe80]
>[273598.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fe80] width 1920 pitch 7680 (/4 1920)
>[273598.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eaa570]
>[273598.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eaa570] width 1920 pitch 7680 (/4 1920)
>[273598.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fe80]
>[273598.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fe80] width 1920 pitch 7680 (/4 1920)
>[273598.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c217f0]
>[273598.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c217f0] width 1920 pitch 7680 (/4 1920)
>[273598.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fe80]
>[273598.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fe80] width 1920 pitch 7680 (/4 1920)
>[273601.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fe80]
>[273601.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fe80] width 1920 pitch 7680 (/4 1920)
>[273601.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394fe80]
>[273601.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394fe80] width 1920 pitch 7680 (/4 1920)
>[273601.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf7290]
>[273601.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf7290] width 1920 pitch 7680 (/4 1920)
>[273601.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640f0]
>[273601.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640f0] width 1920 pitch 7680 (/4 1920)
>[273603.583] (II) AIGLX: Suspending AIGLX clients for VT switch
>[273603.583] (II) RADEON(0): RADEONLeaveVT_KMS
>[273603.583] (II) RADEON(0): Ok, leaving now...
>[273656.924] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[273656.925] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[273656.925] (II) UnloadModule: "evdev"
>[273658.467] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[273658.467] (II) No input driver specified, ignoring this device.
>[273658.467] (II) This device may have been added with another device file.
>[273658.468] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[273658.468] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[273658.468] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[273658.468] 	Option "XkbRules" "evdev"
>[273658.468] 	Option "XkbModel" "evdev"
>[273658.468] 	Option "XkbLayout" "us"
>[273658.468] 	Option "_source" "server/udev"
>[273658.468] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[273658.468] 	Option "path" "/dev/input/event14"
>[273658.468] 	Option "device" "/dev/input/event14"
>[273658.468] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input43/event14"
>[273658.468] 	Option "driver" "evdev"
>[273658.468] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[273658.468] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[273658.470] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[273658.470] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[273658.470] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[273658.470] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[273658.470] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[273658.470] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[273658.470] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[273658.470] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[273658.470] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[273658.470] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input43/event14"
>[273658.470] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[273658.470] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[273658.470] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[273658.470] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[273658.470] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[273658.470] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[273780.484] (II) AIGLX: Resuming AIGLX clients after VT switch
>[273780.484] (II) RADEON(0): RADEONEnterVT_KMS
>[273780.522] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[273780.522] (II) RADEON(0): Using hsync ranges from config file
>[273780.522] (II) RADEON(0): Using vrefresh ranges from config file
>[273780.522] (II) RADEON(0): Printing DDC gathered Modelines:
>[273780.522] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[273780.522] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[273780.522] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[273780.522] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[273780.522] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[273780.522] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[273780.522] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[273780.522] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[273780.522] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[273780.522] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[273780.522] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[273780.522] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[273780.526] (II) RADEON(0): RADEONSaveScreen(2)
>[273780.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[273780.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[273780.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a420]
>[273780.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a420] width 1920 pitch 7680 (/4 1920)
>[273780.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[273780.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[273780.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a420]
>[273780.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a420] width 1920 pitch 7680 (/4 1920)
>[273780.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[273780.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[273780.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a420]
>[273780.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a420] width 1920 pitch 7680 (/4 1920)
>[273780.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b89930]
>[273780.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b89930] width 1920 pitch 7680 (/4 1920)
>[273780.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a420]
>[273780.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a420] width 1920 pitch 7680 (/4 1920)
>[273782.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273782.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273783.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273783.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273783.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[273783.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[273783.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273784.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273784.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[273784.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[273784.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273784.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273784.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[273784.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[273784.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273784.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273784.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[273784.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[273784.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273784.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273784.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb9a80]
>[273784.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb9a80] width 1920 pitch 7680 (/4 1920)
>[273790.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5730]
>[273790.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5730] width 1920 pitch 7680 (/4 1920)
>[273790.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[273790.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[273790.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5730]
>[273790.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5730] width 1920 pitch 7680 (/4 1920)
>[273790.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[273790.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[273790.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5730]
>[273790.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5730] width 1920 pitch 7680 (/4 1920)
>[273790.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c34cc0]
>[273791.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c34cc0] width 1920 pitch 7680 (/4 1920)
>[273791.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5730]
>[273791.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5730] width 1920 pitch 7680 (/4 1920)
>[273791.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed5730]
>[273791.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed5730] width 1920 pitch 7680 (/4 1920)
>[273791.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[273791.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[273791.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[273791.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[273791.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[273791.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[273792.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[273792.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[273792.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca30b0]
>[273792.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca30b0] width 1920 pitch 7680 (/4 1920)
>[273795.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17030]
>[273795.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17030] width 1920 pitch 7680 (/4 1920)
>[273797.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[273797.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[273797.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273797.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273797.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2a8b0]
>[273797.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2a8b0] width 1920 pitch 7680 (/4 1920)
>[273797.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273797.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273797.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273797.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273797.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273797.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273798.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273798.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273798.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2a8b0]
>[273798.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2a8b0] width 1920 pitch 7680 (/4 1920)
>[273798.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273798.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273798.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273798.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273799.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273799.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273799.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273799.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273799.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273799.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273799.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273799.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273799.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273799.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273799.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273799.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273799.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273799.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273799.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273799.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273799.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273799.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273799.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273799.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273799.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273799.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273799.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273800.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273800.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273800.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273800.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273800.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273801.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273801.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273801.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273801.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273801.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273801.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273801.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273801.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273801.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273801.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273801.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273801.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273801.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010d0]
>[273801.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010d0] width 1920 pitch 7680 (/4 1920)
>[273801.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[273801.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[273801.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35010]
>[273801.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35010] width 1920 pitch 7680 (/4 1920)
>[273810.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4002420]
>[273810.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4002420] width 1920 pitch 7680 (/4 1920)
>[273840.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[273840.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[273853.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2700]
>[273853.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2700] width 1920 pitch 7680 (/4 1920)
>[273854.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bf60]
>[273854.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bf60] width 1920 pitch 7680 (/4 1920)
>[273854.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524830]
>[273854.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524830] width 1920 pitch 7680 (/4 1920)
>[273854.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4aa40]
>[273854.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4aa40] width 1920 pitch 7680 (/4 1920)
>[273865.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42de0]
>[273865.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42de0] width 1920 pitch 7680 (/4 1920)
>[273865.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25323a0]
>[273865.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25323a0] width 1920 pitch 7680 (/4 1920)
>[273865.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[273865.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[273870.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[273870.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[273885.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3d800]
>[273885.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3d800] width 1920 pitch 7680 (/4 1920)
>[273915.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05910]
>[273915.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05910] width 1920 pitch 7680 (/4 1920)
>[273930.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[273930.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[273960.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a503b0]
>[273960.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a503b0] width 1920 pitch 7680 (/4 1920)
>[273972.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[273972.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[273972.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[273972.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[273975.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[273975.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[273985.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[273985.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[273985.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3e440]
>[273985.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3e440] width 1920 pitch 7680 (/4 1920)
>[273985.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b05910]
>[273985.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b05910] width 1920 pitch 7680 (/4 1920)
>[273985.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03ad0]
>[273985.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03ad0] width 1920 pitch 7680 (/4 1920)
>[273986.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2522580]
>[273986.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2522580] width 1920 pitch 7680 (/4 1920)
>[273986.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4c00]
>[273986.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4c00] width 1920 pitch 7680 (/4 1920)
>[274020.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[274020.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[274022.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034a70]
>[274022.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034a70] width 1920 pitch 7680 (/4 1920)
>[274022.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9600]
>[274022.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9600] width 1920 pitch 7680 (/4 1920)
>[274022.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89320]
>[274022.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89320] width 1920 pitch 7680 (/4 1920)
>[274023.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[274023.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[274023.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee08a0]
>[274023.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee08a0] width 1920 pitch 7680 (/4 1920)
>[274023.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42de0]
>[274023.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42de0] width 1920 pitch 7680 (/4 1920)
>[274023.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42de0]
>[274023.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42de0] width 1920 pitch 7680 (/4 1920)
>[274050.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[274050.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[274054.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[274054.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[274054.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccfb0]
>[274054.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccfb0] width 1920 pitch 7680 (/4 1920)
>[274055.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3064250]
>[274055.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3064250] width 1920 pitch 7680 (/4 1920)
>[274055.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[274055.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[274086.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[274086.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[274086.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[274086.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[274102.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc310]
>[274102.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc310] width 1920 pitch 7680 (/4 1920)
>[274102.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edc310]
>[274102.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edc310] width 1920 pitch 7680 (/4 1920)
>[274103.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[274103.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[274103.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b7f70]
>[274103.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b7f70] width 1920 pitch 7680 (/4 1920)
>[274235.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401fff0]
>[274235.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401fff0] width 1920 pitch 7680 (/4 1920)
>[274235.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[274235.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[274235.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c34cc0]
>[274235.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c34cc0] width 1920 pitch 7680 (/4 1920)
>[274235.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6500]
>[274235.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6500] width 1920 pitch 7680 (/4 1920)
>[274236.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a34e30]
>[274236.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a34e30] width 1920 pitch 7680 (/4 1920)
>[274237.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a34e30]
>[274237.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a34e30] width 1920 pitch 7680 (/4 1920)
>[274238.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89320]
>[274238.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89320] width 1920 pitch 7680 (/4 1920)
>[274238.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[274238.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[274238.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2700]
>[274238.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2700] width 1920 pitch 7680 (/4 1920)
>[274238.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f490]
>[274238.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f490] width 1920 pitch 7680 (/4 1920)
>[274246.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f6b0]
>[274246.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f6b0] width 1920 pitch 7680 (/4 1920)
>[274246.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca30b0]
>[274247.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca30b0] width 1920 pitch 7680 (/4 1920)
>[274247.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3104ee0]
>[274247.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3104ee0] width 1920 pitch 7680 (/4 1920)
>[274247.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3104ee0]
>[274247.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3104ee0] width 1920 pitch 7680 (/4 1920)
>[274270.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35010]
>[274270.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35010] width 1920 pitch 7680 (/4 1920)
>[274270.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f240]
>[274270.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f240] width 1920 pitch 7680 (/4 1920)
>[274270.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[274270.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[274270.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f490]
>[274270.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f490] width 1920 pitch 7680 (/4 1920)
>[274297.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f490]
>[274297.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f490] width 1920 pitch 7680 (/4 1920)
>[274298.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f490]
>[274298.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f490] width 1920 pitch 7680 (/4 1920)
>[274339.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee9d0]
>[274339.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee9d0] width 1920 pitch 7680 (/4 1920)
>[274341.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee9d0]
>[274341.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee9d0] width 1920 pitch 7680 (/4 1920)
>[274359.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8790]
>[274359.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8790] width 1920 pitch 7680 (/4 1920)
>[274389.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d91400]
>[274389.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d91400] width 1920 pitch 7680 (/4 1920)
>[274390.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d91400]
>[274390.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d91400] width 1920 pitch 7680 (/4 1920)
>[274390.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364640]
>[274390.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364640] width 1920 pitch 7680 (/4 1920)
>[274390.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364640]
>[274391.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364640] width 1920 pitch 7680 (/4 1920)
>[274406.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479090]
>[274406.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479090] width 1920 pitch 7680 (/4 1920)
>[274410.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479090]
>[274410.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479090] width 1920 pitch 7680 (/4 1920)
>[274425.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[274425.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[274515.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479090]
>[274515.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479090] width 1920 pitch 7680 (/4 1920)
>[274530.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479090]
>[274530.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479090] width 1920 pitch 7680 (/4 1920)
>[274545.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479090]
>[274545.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479090] width 1920 pitch 7680 (/4 1920)
>[274560.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965190]
>[274560.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965190] width 1920 pitch 7680 (/4 1920)
>[274586.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddf40]
>[274586.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddf40] width 1920 pitch 7680 (/4 1920)
>[274586.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035e10]
>[274586.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035e10] width 1920 pitch 7680 (/4 1920)
>[274586.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c540]
>[274586.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c540] width 1920 pitch 7680 (/4 1920)
>[274586.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddf40]
>[274586.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddf40] width 1920 pitch 7680 (/4 1920)
>[274586.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c540]
>[274586.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c540] width 1920 pitch 7680 (/4 1920)
>[274586.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddf40]
>[274586.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddf40] width 1920 pitch 7680 (/4 1920)
>[274586.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c540]
>[274586.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c540] width 1920 pitch 7680 (/4 1920)
>[274586.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddf40]
>[274586.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddf40] width 1920 pitch 7680 (/4 1920)
>[274586.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c540]
>[274586.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c540] width 1920 pitch 7680 (/4 1920)
>[274586.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ddf40]
>[274586.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ddf40] width 1920 pitch 7680 (/4 1920)
>[274586.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c3c0]
>[274586.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c3c0] width 1920 pitch 7680 (/4 1920)
>[274588.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de8f30]
>[274588.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de8f30] width 1920 pitch 7680 (/4 1920)
>[274588.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c540]
>[274588.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c540] width 1920 pitch 7680 (/4 1920)
>[274588.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c540]
>[274588.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c540] width 1920 pitch 7680 (/4 1920)
>[274590.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fb20]
>[274590.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fb20] width 1920 pitch 7680 (/4 1920)
>[274590.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fad0]
>[274590.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fad0] width 1920 pitch 7680 (/4 1920)
>[274590.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526ef0]
>[274590.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526ef0] width 1920 pitch 7680 (/4 1920)
>[274590.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fad0]
>[274590.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fad0] width 1920 pitch 7680 (/4 1920)
>[274590.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526ef0]
>[274590.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526ef0] width 1920 pitch 7680 (/4 1920)
>[274590.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fad0]
>[274591.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fad0] width 1920 pitch 7680 (/4 1920)
>[274591.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526ef0]
>[274591.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526ef0] width 1920 pitch 7680 (/4 1920)
>[274591.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fad0]
>[274591.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fad0] width 1920 pitch 7680 (/4 1920)
>[274591.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526ef0]
>[274591.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526ef0] width 1920 pitch 7680 (/4 1920)
>[274591.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fad0]
>[274591.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fad0] width 1920 pitch 7680 (/4 1920)
>[274591.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a7a70]
>[274591.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a7a70] width 1920 pitch 7680 (/4 1920)
>[274591.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fad0]
>[274591.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fad0] width 1920 pitch 7680 (/4 1920)
>[274605.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c390]
>[274605.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c390] width 1920 pitch 7680 (/4 1920)
>[274620.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ba7e0]
>[274620.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ba7e0] width 1920 pitch 7680 (/4 1920)
>[274635.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c390]
>[274635.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c390] width 1920 pitch 7680 (/4 1920)
>[274800.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2babac0]
>[274800.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2babac0] width 1920 pitch 7680 (/4 1920)
>[274830.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d5b30]
>[274830.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d5b30] width 1920 pitch 7680 (/4 1920)
>[274856.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39046a0]
>[274856.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39046a0] width 1920 pitch 7680 (/4 1920)
>[274857.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baec40]
>[274857.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baec40] width 1920 pitch 7680 (/4 1920)
>[274857.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39046a0]
>[274857.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39046a0] width 1920 pitch 7680 (/4 1920)
>[274857.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baec40]
>[274857.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baec40] width 1920 pitch 7680 (/4 1920)
>[274857.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39046a0]
>[274857.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39046a0] width 1920 pitch 7680 (/4 1920)
>[274857.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baec40]
>[274857.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baec40] width 1920 pitch 7680 (/4 1920)
>[274857.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39046a0]
>[274857.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39046a0] width 1920 pitch 7680 (/4 1920)
>[274857.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baec40]
>[274857.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baec40] width 1920 pitch 7680 (/4 1920)
>[274857.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3078170]
>[274857.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3078170] width 1920 pitch 7680 (/4 1920)
>[274857.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baec40]
>[274857.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baec40] width 1920 pitch 7680 (/4 1920)
>[274857.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3078170]
>[274857.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3078170] width 1920 pitch 7680 (/4 1920)
>[274860.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29f30]
>[274860.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29f30] width 1920 pitch 7680 (/4 1920)
>[274860.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274860.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274860.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29f30]
>[274860.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29f30] width 1920 pitch 7680 (/4 1920)
>[274860.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274860.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274860.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29f30]
>[274860.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29f30] width 1920 pitch 7680 (/4 1920)
>[274860.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274860.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274860.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29f30]
>[274860.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29f30] width 1920 pitch 7680 (/4 1920)
>[274860.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274860.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274860.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29f30]
>[274860.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29f30] width 1920 pitch 7680 (/4 1920)
>[274867.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47cd0]
>[274867.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47cd0] width 1920 pitch 7680 (/4 1920)
>[274867.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274867.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274867.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035dc0]
>[274867.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035dc0] width 1920 pitch 7680 (/4 1920)
>[274867.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274867.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274867.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035dc0]
>[274867.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035dc0] width 1920 pitch 7680 (/4 1920)
>[274867.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274867.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274867.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035dc0]
>[274868.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035dc0] width 1920 pitch 7680 (/4 1920)
>[274868.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274868.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274868.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035dc0]
>[274868.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035dc0] width 1920 pitch 7680 (/4 1920)
>[274868.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274868.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274868.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035dc0]
>[274868.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035dc0] width 1920 pitch 7680 (/4 1920)
>[274870.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035f20]
>[274870.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035f20] width 1920 pitch 7680 (/4 1920)
>[274870.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035f20]
>[274870.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035f20] width 1920 pitch 7680 (/4 1920)
>[274870.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035f20]
>[274870.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035f20] width 1920 pitch 7680 (/4 1920)
>[274870.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fb50]
>[274870.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fb50] width 1920 pitch 7680 (/4 1920)
>[274870.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e400]
>[274870.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e400] width 1920 pitch 7680 (/4 1920)
>[274870.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fb50]
>[274870.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fb50] width 1920 pitch 7680 (/4 1920)
>[274870.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e400]
>[274870.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e400] width 1920 pitch 7680 (/4 1920)
>[274870.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fb50]
>[274870.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fb50] width 1920 pitch 7680 (/4 1920)
>[274870.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e400]
>[274870.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e400] width 1920 pitch 7680 (/4 1920)
>[274870.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fb50]
>[274870.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fb50] width 1920 pitch 7680 (/4 1920)
>[274870.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e400]
>[274871.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e400] width 1920 pitch 7680 (/4 1920)
>[274871.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536fb50]
>[274871.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536fb50] width 1920 pitch 7680 (/4 1920)
>[274871.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0e400]
>[274871.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0e400] width 1920 pitch 7680 (/4 1920)
>[274871.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2df0]
>[274871.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2df0] width 1920 pitch 7680 (/4 1920)
>[274871.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29d80]
>[274871.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29d80] width 1920 pitch 7680 (/4 1920)
>[274871.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c1e0]
>[274871.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c1e0] width 1920 pitch 7680 (/4 1920)
>[274871.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29d80]
>[274871.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29d80] width 1920 pitch 7680 (/4 1920)
>[274871.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c1e0]
>[274871.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c1e0] width 1920 pitch 7680 (/4 1920)
>[274871.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29d80]
>[274871.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29d80] width 1920 pitch 7680 (/4 1920)
>[274871.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8c1e0]
>[274871.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8c1e0] width 1920 pitch 7680 (/4 1920)
>[274871.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29d80]
>[274871.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29d80] width 1920 pitch 7680 (/4 1920)
>[274871.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2df0]
>[274871.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2df0] width 1920 pitch 7680 (/4 1920)
>[274871.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29d80]
>[274871.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29d80] width 1920 pitch 7680 (/4 1920)
>[274871.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2df0]
>[274871.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2df0] width 1920 pitch 7680 (/4 1920)
>[274871.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b29d80]
>[274871.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b29d80] width 1920 pitch 7680 (/4 1920)
>[274871.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2df0]
>[274871.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2df0] width 1920 pitch 7680 (/4 1920)
>[274873.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4900]
>[274873.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4900] width 1920 pitch 7680 (/4 1920)
>[274873.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c352c0]
>[274873.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c352c0] width 1920 pitch 7680 (/4 1920)
>[274873.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4900]
>[274873.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4900] width 1920 pitch 7680 (/4 1920)
>[274873.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c352c0]
>[274873.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c352c0] width 1920 pitch 7680 (/4 1920)
>[274873.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25019d0]
>[274873.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25019d0] width 1920 pitch 7680 (/4 1920)
>[274873.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c352c0]
>[274873.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c352c0] width 1920 pitch 7680 (/4 1920)
>[274873.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25019d0]
>[274873.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25019d0] width 1920 pitch 7680 (/4 1920)
>[274873.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c352c0]
>[274873.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c352c0] width 1920 pitch 7680 (/4 1920)
>[274873.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25019d0]
>[274873.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25019d0] width 1920 pitch 7680 (/4 1920)
>[274873.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c352c0]
>[274873.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c352c0] width 1920 pitch 7680 (/4 1920)
>[274873.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25019d0]
>[274873.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25019d0] width 1920 pitch 7680 (/4 1920)
>[274873.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c352c0]
>[274873.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c352c0] width 1920 pitch 7680 (/4 1920)
>[274873.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25019d0]
>[274873.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25019d0] width 1920 pitch 7680 (/4 1920)
>[274890.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c73390]
>[274890.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c73390] width 1920 pitch 7680 (/4 1920)
>[274905.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c73390]
>[274905.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c73390] width 1920 pitch 7680 (/4 1920)
>[274919.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e30f90]
>[274919.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e30f90] width 1920 pitch 7680 (/4 1920)
>[274920.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7b260]
>[274920.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7b260] width 1920 pitch 7680 (/4 1920)
>[274920.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7b260]
>[274920.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7b260] width 1920 pitch 7680 (/4 1920)
>[274920.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7b260]
>[274920.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7b260] width 1920 pitch 7680 (/4 1920)
>[274924.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274924.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274950.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965190]
>[274950.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965190] width 1920 pitch 7680 (/4 1920)
>[274965.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7a80]
>[274965.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7a80] width 1920 pitch 7680 (/4 1920)
>[274977.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33f90]
>[274977.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33f90] width 1920 pitch 7680 (/4 1920)
>[274977.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33f90]
>[274977.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33f90] width 1920 pitch 7680 (/4 1920)
>[274977.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6ab00]
>[274977.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6ab00] width 1920 pitch 7680 (/4 1920)
>[274977.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9270]
>[274977.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9270] width 1920 pitch 7680 (/4 1920)
>[274978.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3d620]
>[274978.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3d620] width 1920 pitch 7680 (/4 1920)
>[274978.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cca890]
>[274978.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cca890] width 1920 pitch 7680 (/4 1920)
>[274978.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[274978.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[274978.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a16ee0]
>[274978.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a16ee0] width 1920 pitch 7680 (/4 1920)
>[275025.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c34650]
>[275025.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c34650] width 1920 pitch 7680 (/4 1920)
>[275025.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa7b70]
>[275025.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa7b70] width 1920 pitch 7680 (/4 1920)
>[275025.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa1170]
>[275025.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa1170] width 1920 pitch 7680 (/4 1920)
>[275025.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39df280]
>[275025.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39df280] width 1920 pitch 7680 (/4 1920)
>[275026.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa1170]
>[275026.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa1170] width 1920 pitch 7680 (/4 1920)
>[275026.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403b520]
>[275026.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403b520] width 1920 pitch 7680 (/4 1920)
>[275026.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9270]
>[275026.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9270] width 1920 pitch 7680 (/4 1920)
>[275026.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af9270]
>[275026.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af9270] width 1920 pitch 7680 (/4 1920)
>[275062.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f49830]
>[275062.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f49830] width 1920 pitch 7680 (/4 1920)
>[275062.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035f90]
>[275062.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035f90] width 1920 pitch 7680 (/4 1920)
>[275062.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baed20]
>[275062.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baed20] width 1920 pitch 7680 (/4 1920)
>[275062.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baed20]
>[275062.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baed20] width 1920 pitch 7680 (/4 1920)
>[275063.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035f90]
>[275063.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035f90] width 1920 pitch 7680 (/4 1920)
>[275063.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035f90]
>[275063.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035f90] width 1920 pitch 7680 (/4 1920)
>[275063.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526200]
>[275063.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526200] width 1920 pitch 7680 (/4 1920)
>[275063.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526200]
>[275063.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526200] width 1920 pitch 7680 (/4 1920)
>[275108.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9a990]
>[275108.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9a990] width 1920 pitch 7680 (/4 1920)
>[275108.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa1170]
>[275108.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa1170] width 1920 pitch 7680 (/4 1920)
>[275108.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9a990]
>[275108.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9a990] width 1920 pitch 7680 (/4 1920)
>[275109.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9a990]
>[275109.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9a990] width 1920 pitch 7680 (/4 1920)
>[275121.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4abf0]
>[275121.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4abf0] width 1920 pitch 7680 (/4 1920)
>[275122.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c080]
>[275122.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c080] width 1920 pitch 7680 (/4 1920)
>[275122.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c080]
>[275122.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c080] width 1920 pitch 7680 (/4 1920)
>[275122.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c080]
>[275122.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c080] width 1920 pitch 7680 (/4 1920)
>[275145.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6cbd0]
>[275145.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6cbd0] width 1920 pitch 7680 (/4 1920)
>[275148.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3b7c0]
>[275148.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3b7c0] width 1920 pitch 7680 (/4 1920)
>[275159.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a7ec0]
>[275159.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a7ec0] width 1920 pitch 7680 (/4 1920)
>[275160.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a7ec0]
>[275160.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a7ec0] width 1920 pitch 7680 (/4 1920)
>[275167.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca18e0]
>[275167.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca18e0] width 1920 pitch 7680 (/4 1920)
>[275167.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ccf10]
>[275167.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ccf10] width 1920 pitch 7680 (/4 1920)
>[275167.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ccf10]
>[275167.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ccf10] width 1920 pitch 7680 (/4 1920)
>[275168.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ccf10]
>[275168.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ccf10] width 1920 pitch 7680 (/4 1920)
>[275175.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b9f0]
>[275175.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b9f0] width 1920 pitch 7680 (/4 1920)
>[275190.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0ac0]
>[275190.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0ac0] width 1920 pitch 7680 (/4 1920)
>[275205.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0ac0]
>[275205.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0ac0] width 1920 pitch 7680 (/4 1920)
>[275252.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4240]
>[275252.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4240] width 1920 pitch 7680 (/4 1920)
>[275253.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93d50]
>[275253.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93d50] width 1920 pitch 7680 (/4 1920)
>[275253.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2be50]
>[275254.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2be50] width 1920 pitch 7680 (/4 1920)
>[275254.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93d50]
>[275254.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93d50] width 1920 pitch 7680 (/4 1920)
>[275254.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2be50]
>[275254.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2be50] width 1920 pitch 7680 (/4 1920)
>[275254.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93d50]
>[275254.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93d50] width 1920 pitch 7680 (/4 1920)
>[275254.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca8340]
>[275254.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca8340] width 1920 pitch 7680 (/4 1920)
>[275254.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93d50]
>[275254.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93d50] width 1920 pitch 7680 (/4 1920)
>[275254.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca8340]
>[275254.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca8340] width 1920 pitch 7680 (/4 1920)
>[275254.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93d50]
>[275254.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93d50] width 1920 pitch 7680 (/4 1920)
>[275254.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca8340]
>[275254.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca8340] width 1920 pitch 7680 (/4 1920)
>[275254.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93d50]
>[275254.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93d50] width 1920 pitch 7680 (/4 1920)
>[275257.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f1fd0]
>[275257.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f1fd0] width 1920 pitch 7680 (/4 1920)
>[275257.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab39a0]
>[275257.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab39a0] width 1920 pitch 7680 (/4 1920)
>[275257.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f1fd0]
>[275257.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f1fd0] width 1920 pitch 7680 (/4 1920)
>[275257.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab39a0]
>[275257.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab39a0] width 1920 pitch 7680 (/4 1920)
>[275257.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b9f0]
>[275257.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b9f0] width 1920 pitch 7680 (/4 1920)
>[275257.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab39a0]
>[275257.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab39a0] width 1920 pitch 7680 (/4 1920)
>[275257.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b9f0]
>[275257.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b9f0] width 1920 pitch 7680 (/4 1920)
>[275257.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab39a0]
>[275257.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab39a0] width 1920 pitch 7680 (/4 1920)
>[275257.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b9f0]
>[275257.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b9f0] width 1920 pitch 7680 (/4 1920)
>[275257.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab39a0]
>[275257.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab39a0] width 1920 pitch 7680 (/4 1920)
>[275257.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b9f0]
>[275257.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b9f0] width 1920 pitch 7680 (/4 1920)
>[275258.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f1fd0]
>[275258.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f1fd0] width 1920 pitch 7680 (/4 1920)
>[275258.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2be50]
>[275258.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2be50] width 1920 pitch 7680 (/4 1920)
>[275258.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd5e0]
>[275258.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd5e0] width 1920 pitch 7680 (/4 1920)
>[275258.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd5e0]
>[275258.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd5e0] width 1920 pitch 7680 (/4 1920)
>[275258.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1bc0]
>[275258.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1bc0] width 1920 pitch 7680 (/4 1920)
>[275259.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2be50]
>[275259.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2be50] width 1920 pitch 7680 (/4 1920)
>[275259.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f863a0]
>[275259.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f863a0] width 1920 pitch 7680 (/4 1920)
>[275259.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1b00]
>[275259.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1b00] width 1920 pitch 7680 (/4 1920)
>[275262.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27a60]
>[275262.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27a60] width 1920 pitch 7680 (/4 1920)
>[275262.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2be50]
>[275262.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2be50] width 1920 pitch 7680 (/4 1920)
>[275262.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27a60]
>[275262.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27a60] width 1920 pitch 7680 (/4 1920)
>[275262.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27a60]
>[275262.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27a60] width 1920 pitch 7680 (/4 1920)
>[275269.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d44880]
>[275269.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d44880] width 1920 pitch 7680 (/4 1920)
>[275269.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9ca40]
>[275269.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9ca40] width 1920 pitch 7680 (/4 1920)
>[275278.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b3f0]
>[275278.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b3f0] width 1920 pitch 7680 (/4 1920)
>[275278.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb480]
>[275279.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb480] width 1920 pitch 7680 (/4 1920)
>[275279.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6e860]
>[275279.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6e860] width 1920 pitch 7680 (/4 1920)
>[275279.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6e860]
>[275279.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6e860] width 1920 pitch 7680 (/4 1920)
>[275286.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b5a0]
>[275286.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b5a0] width 1920 pitch 7680 (/4 1920)
>[275286.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c090]
>[275286.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c090] width 1920 pitch 7680 (/4 1920)
>[275286.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1660]
>[275286.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1660] width 1920 pitch 7680 (/4 1920)
>[275286.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c090]
>[275286.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c090] width 1920 pitch 7680 (/4 1920)
>[275286.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1660]
>[275286.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1660] width 1920 pitch 7680 (/4 1920)
>[275286.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c090]
>[275287.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c090] width 1920 pitch 7680 (/4 1920)
>[275287.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1660]
>[275287.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1660] width 1920 pitch 7680 (/4 1920)
>[275287.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c090]
>[275287.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c090] width 1920 pitch 7680 (/4 1920)
>[275287.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1660]
>[275287.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1660] width 1920 pitch 7680 (/4 1920)
>[275287.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c090]
>[275287.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c090] width 1920 pitch 7680 (/4 1920)
>[275287.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca1660]
>[275287.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca1660] width 1920 pitch 7680 (/4 1920)
>[275287.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c090]
>[275287.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c090] width 1920 pitch 7680 (/4 1920)
>[275288.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9be30]
>[275288.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9be30] width 1920 pitch 7680 (/4 1920)
>[275288.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6e860]
>[275288.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6e860] width 1920 pitch 7680 (/4 1920)
>[275288.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9be30]
>[275288.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9be30] width 1920 pitch 7680 (/4 1920)
>[275288.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd5e0]
>[275288.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd5e0] width 1920 pitch 7680 (/4 1920)
>[275288.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9be30]
>[275288.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9be30] width 1920 pitch 7680 (/4 1920)
>[275288.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dd5e0]
>[275288.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dd5e0] width 1920 pitch 7680 (/4 1920)
>[275288.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9be30]
>[275288.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9be30] width 1920 pitch 7680 (/4 1920)
>[275288.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39ae0]
>[275288.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39ae0] width 1920 pitch 7680 (/4 1920)
>[275288.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9be30]
>[275288.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9be30] width 1920 pitch 7680 (/4 1920)
>[275288.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39ae0]
>[275289.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39ae0] width 1920 pitch 7680 (/4 1920)
>[275289.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ea10]
>[275289.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ea10] width 1920 pitch 7680 (/4 1920)
>[275289.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9b3f0]
>[275289.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9b3f0] width 1920 pitch 7680 (/4 1920)
>[275289.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ea10]
>[275289.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ea10] width 1920 pitch 7680 (/4 1920)
>[275290.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ea10]
>[275290.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ea10] width 1920 pitch 7680 (/4 1920)
>[275290.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6e860]
>[275290.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6e860] width 1920 pitch 7680 (/4 1920)
>[275290.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39f10]
>[275290.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39f10] width 1920 pitch 7680 (/4 1920)
>[275290.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d39f10]
>[275290.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d39f10] width 1920 pitch 7680 (/4 1920)
>[275325.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6e860]
>[275325.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6e860] width 1920 pitch 7680 (/4 1920)
>[275350.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[275350.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[275351.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f86a0]
>[275351.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f86a0] width 1920 pitch 7680 (/4 1920)
>[275351.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89320]
>[275351.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89320] width 1920 pitch 7680 (/4 1920)
>[275351.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477fd0]
>[275351.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477fd0] width 1920 pitch 7680 (/4 1920)
>[275385.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477fd0]
>[275385.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477fd0] width 1920 pitch 7680 (/4 1920)
>[275445.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4c00]
>[275445.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4c00] width 1920 pitch 7680 (/4 1920)
>[275460.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[275460.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[275475.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[275475.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[275490.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[275490.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[275505.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[275505.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[275535.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035d60]
>[275535.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035d60] width 1920 pitch 7680 (/4 1920)
>[275700.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[275700.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[275707.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[275707.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[275707.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[275707.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[275707.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[275707.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[275707.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[275707.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[275707.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[275707.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[275707.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e1740]
>[275708.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e1740] width 1920 pitch 7680 (/4 1920)
>[275708.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[275708.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[275708.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[275708.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[275708.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[275708.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[275708.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f49920]
>[275708.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f49920] width 1920 pitch 7680 (/4 1920)
>[275708.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[275708.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[275708.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f70ad0]
>[275708.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f70ad0] width 1920 pitch 7680 (/4 1920)
>[275708.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f00c90]
>[275708.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f00c90] width 1920 pitch 7680 (/4 1920)
>[275709.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f8720]
>[275709.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f8720] width 1920 pitch 7680 (/4 1920)
>[275709.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2524830]
>[275709.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2524830] width 1920 pitch 7680 (/4 1920)
>[275712.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b17030]
>[275712.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b17030] width 1920 pitch 7680 (/4 1920)
>[275712.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc420]
>[275712.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc420] width 1920 pitch 7680 (/4 1920)
>[275712.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[275712.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[275712.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[275712.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[275712.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[275712.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[275712.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[275712.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[275712.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97840]
>[275713.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97840] width 1920 pitch 7680 (/4 1920)
>[275713.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[275713.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[275713.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b560]
>[275713.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b560] width 1920 pitch 7680 (/4 1920)
>[275713.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[275713.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[275713.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[275713.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[275713.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[275713.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[275713.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[275713.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[275713.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01680]
>[275713.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01680] width 1920 pitch 7680 (/4 1920)
>[275713.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[275713.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[275713.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb630]
>[275713.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb630] width 1920 pitch 7680 (/4 1920)
>[275714.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[275714.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[275715.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[275715.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[275716.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[275716.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[275716.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954960]
>[275716.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954960] width 1920 pitch 7680 (/4 1920)
>[275716.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee970]
>[275716.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee970] width 1920 pitch 7680 (/4 1920)
>[275716.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954960]
>[275716.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954960] width 1920 pitch 7680 (/4 1920)
>[275716.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5b10]
>[275716.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5b10] width 1920 pitch 7680 (/4 1920)
>[275716.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee970]
>[275716.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee970] width 1920 pitch 7680 (/4 1920)
>[275716.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5b10]
>[275716.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5b10] width 1920 pitch 7680 (/4 1920)
>[275717.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5b10]
>[275717.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5b10] width 1920 pitch 7680 (/4 1920)
>[275717.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ee970]
>[275717.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ee970] width 1920 pitch 7680 (/4 1920)
>[275717.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954960]
>[275717.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954960] width 1920 pitch 7680 (/4 1920)
>[275717.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954960]
>[275717.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954960] width 1920 pitch 7680 (/4 1920)
>[275717.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63240]
>[275717.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63240] width 1920 pitch 7680 (/4 1920)
>[275717.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[275718.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[275718.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63240]
>[275718.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63240] width 1920 pitch 7680 (/4 1920)
>[275718.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3e1e0]
>[275718.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3e1e0] width 1920 pitch 7680 (/4 1920)
>[275718.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2555360]
>[275718.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2555360] width 1920 pitch 7680 (/4 1920)
>[275718.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4c00]
>[275718.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4c00] width 1920 pitch 7680 (/4 1920)
>[275720.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275720.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275720.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275720.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275720.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275720.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275720.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275720.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275720.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275720.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275720.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275720.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275720.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275720.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275721.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275721.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275721.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275721.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275721.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275721.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275721.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275721.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275721.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275721.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275721.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275721.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275721.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275721.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275721.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275721.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275721.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275721.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275721.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275721.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275721.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275721.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275722.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[275722.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[275722.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275722.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275722.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275722.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275722.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275722.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275722.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275722.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275722.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393e3d0]
>[275722.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393e3d0] width 1920 pitch 7680 (/4 1920)
>[275722.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275722.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275722.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275722.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275722.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae290]
>[275722.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae290] width 1920 pitch 7680 (/4 1920)
>[275722.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ba80]
>[275722.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ba80] width 1920 pitch 7680 (/4 1920)
>[275722.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca30b0]
>[275723.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca30b0] width 1920 pitch 7680 (/4 1920)
>[275723.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae290]
>[275723.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae290] width 1920 pitch 7680 (/4 1920)
>[275723.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca30b0]
>[275723.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca30b0] width 1920 pitch 7680 (/4 1920)
>[275723.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae290]
>[275723.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae290] width 1920 pitch 7680 (/4 1920)
>[275723.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[275723.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[275723.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[275723.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[275723.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae290]
>[275723.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae290] width 1920 pitch 7680 (/4 1920)
>[275723.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[275723.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[275723.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae290]
>[275723.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae290] width 1920 pitch 7680 (/4 1920)
>[275723.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d10320]
>[275723.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d10320] width 1920 pitch 7680 (/4 1920)
>[275723.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ae290]
>[275723.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ae290] width 1920 pitch 7680 (/4 1920)
>[275723.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[275723.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[275724.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[275724.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[275724.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[275724.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[275724.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[275724.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[275724.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf05a0]
>[275724.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf05a0] width 1920 pitch 7680 (/4 1920)
>[275724.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[275724.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[275724.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d35e0]
>[275724.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d35e0] width 1920 pitch 7680 (/4 1920)
>[275760.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d97a0]
>[275760.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d97a0] width 1920 pitch 7680 (/4 1920)
>[275775.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392bf60]
>[275775.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392bf60] width 1920 pitch 7680 (/4 1920)
>[275786.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ee10]
>[275786.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ee10] width 1920 pitch 7680 (/4 1920)
>[275786.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[275786.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[275786.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401fff0]
>[275786.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401fff0] width 1920 pitch 7680 (/4 1920)
>[275786.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[275786.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[275786.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401fff0]
>[275786.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401fff0] width 1920 pitch 7680 (/4 1920)
>[275786.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[275786.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[275786.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ee10]
>[275786.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ee10] width 1920 pitch 7680 (/4 1920)
>[275787.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[275787.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[275787.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[275787.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[275787.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ee10]
>[275787.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ee10] width 1920 pitch 7680 (/4 1920)
>[275787.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[275787.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[275787.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ee10]
>[275787.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ee10] width 1920 pitch 7680 (/4 1920)
>[275787.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2ca0]
>[275787.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2ca0] width 1920 pitch 7680 (/4 1920)
>[275787.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ee10]
>[275787.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ee10] width 1920 pitch 7680 (/4 1920)
>[275787.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f6b0]
>[275787.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f6b0] width 1920 pitch 7680 (/4 1920)
>[275787.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253ee10]
>[275787.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253ee10] width 1920 pitch 7680 (/4 1920)
>[275787.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f6b0]
>[275787.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f6b0] width 1920 pitch 7680 (/4 1920)
>[275787.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2bbf0]
>[275787.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2bbf0] width 1920 pitch 7680 (/4 1920)
>[275865.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395abd0]
>[275865.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395abd0] width 1920 pitch 7680 (/4 1920)
>[275895.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395abd0]
>[275895.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395abd0] width 1920 pitch 7680 (/4 1920)
>[275940.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[275940.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[275955.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18370]
>[275955.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18370] width 1920 pitch 7680 (/4 1920)
>[276014.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[276014.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[276014.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[276014.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[276014.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[276014.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[276014.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[276014.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[276014.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[276014.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[276014.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[276014.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[276015.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02070]
>[276015.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02070] width 1920 pitch 7680 (/4 1920)
>[276015.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[276015.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[276015.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035680]
>[276015.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035680] width 1920 pitch 7680 (/4 1920)
>[276015.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa13a0]
>[276015.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa13a0] width 1920 pitch 7680 (/4 1920)
>[276015.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb630]
>[276015.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb630] width 1920 pitch 7680 (/4 1920)
>[276015.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa13a0]
>[276015.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa13a0] width 1920 pitch 7680 (/4 1920)
>[276015.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3caa0]
>[276015.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3caa0] width 1920 pitch 7680 (/4 1920)
>[276015.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[276015.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[276015.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f240]
>[276015.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f240] width 1920 pitch 7680 (/4 1920)
>[276030.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954960]
>[276030.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954960] width 1920 pitch 7680 (/4 1920)
>[276105.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23727f0]
>[276105.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23727f0] width 1920 pitch 7680 (/4 1920)
>[276120.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4abf0]
>[276120.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4abf0] width 1920 pitch 7680 (/4 1920)
>[276135.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[276135.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[276150.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7ac60]
>[276150.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7ac60] width 1920 pitch 7680 (/4 1920)
>[276195.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db32b0]
>[276195.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db32b0] width 1920 pitch 7680 (/4 1920)
>[276210.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd28d0]
>[276210.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd28d0] width 1920 pitch 7680 (/4 1920)
>[276226.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9600]
>[276226.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9600] width 1920 pitch 7680 (/4 1920)
>[276227.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e04350]
>[276227.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e04350] width 1920 pitch 7680 (/4 1920)
>[276227.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd28d0]
>[276227.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd28d0] width 1920 pitch 7680 (/4 1920)
>[276227.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401fff0]
>[276227.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401fff0] width 1920 pitch 7680 (/4 1920)
>[276240.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd28d0]
>[276240.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd28d0] width 1920 pitch 7680 (/4 1920)
>[276270.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd28d0]
>[276270.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd28d0] width 1920 pitch 7680 (/4 1920)
>[276285.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd28d0]
>[276285.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd28d0] width 1920 pitch 7680 (/4 1920)
>[276300.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbb710]
>[276300.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbb710] width 1920 pitch 7680 (/4 1920)
>[276315.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f6b0]
>[276315.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f6b0] width 1920 pitch 7680 (/4 1920)
>[276360.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3064250]
>[276360.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3064250] width 1920 pitch 7680 (/4 1920)
>[276375.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[276375.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[276390.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366880]
>[276390.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366880] width 1920 pitch 7680 (/4 1920)
>[276405.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d116a0]
>[276405.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d116a0] width 1920 pitch 7680 (/4 1920)
>[276435.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f49920]
>[276435.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f49920] width 1920 pitch 7680 (/4 1920)
>[276465.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3104ee0]
>[276465.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3104ee0] width 1920 pitch 7680 (/4 1920)
>[276480.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaa90]
>[276480.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaa90] width 1920 pitch 7680 (/4 1920)
>[276495.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaa90]
>[276495.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaa90] width 1920 pitch 7680 (/4 1920)
>[276510.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3104ee0]
>[276510.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3104ee0] width 1920 pitch 7680 (/4 1920)
>[276525.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaa90]
>[276525.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaa90] width 1920 pitch 7680 (/4 1920)
>[276540.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc420]
>[276540.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc420] width 1920 pitch 7680 (/4 1920)
>[276549.255] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[276549.255] (II) RADEON(0): Using hsync ranges from config file
>[276549.255] (II) RADEON(0): Using vrefresh ranges from config file
>[276549.255] (II) RADEON(0): Printing DDC gathered Modelines:
>[276549.255] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[276549.255] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[276549.255] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[276549.255] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[276549.255] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[276549.255] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[276549.255] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[276549.255] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[276549.255] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[276549.255] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[276549.255] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[276549.255] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[276549.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9600]
>[276549.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9600] width 1920 pitch 7680 (/4 1920)
>[276555.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035d60]
>[276555.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035d60] width 1920 pitch 7680 (/4 1920)
>[276570.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d03ad0]
>[276570.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d03ad0] width 1920 pitch 7680 (/4 1920)
>[276660.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3d800]
>[276660.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3d800] width 1920 pitch 7680 (/4 1920)
>[276675.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[276675.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[276720.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3d800]
>[276720.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3d800] width 1920 pitch 7680 (/4 1920)
>[276735.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f49e0]
>[276735.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f49e0] width 1920 pitch 7680 (/4 1920)
>[276810.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4035d60]
>[276810.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4035d60] width 1920 pitch 7680 (/4 1920)
>[276840.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cec020]
>[276840.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cec020] width 1920 pitch 7680 (/4 1920)
>[276900.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d24290]
>[276900.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d24290] width 1920 pitch 7680 (/4 1920)
>[276915.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6320]
>[276915.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6320] width 1920 pitch 7680 (/4 1920)
>[276930.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[276930.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[276960.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdf420]
>[276960.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdf420] width 1920 pitch 7680 (/4 1920)
>[276965.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13eb0]
>[276965.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13eb0] width 1920 pitch 7680 (/4 1920)
>[276965.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18370]
>[276965.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18370] width 1920 pitch 7680 (/4 1920)
>[276965.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13eb0]
>[276965.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13eb0] width 1920 pitch 7680 (/4 1920)
>[276965.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18370]
>[276965.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18370] width 1920 pitch 7680 (/4 1920)
>[276965.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13eb0]
>[276965.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13eb0] width 1920 pitch 7680 (/4 1920)
>[276965.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18370]
>[276965.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18370] width 1920 pitch 7680 (/4 1920)
>[276965.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13eb0]
>[276965.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13eb0] width 1920 pitch 7680 (/4 1920)
>[276965.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18370]
>[276965.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18370] width 1920 pitch 7680 (/4 1920)
>[276965.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13eb0]
>[276965.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13eb0] width 1920 pitch 7680 (/4 1920)
>[276965.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18370]
>[276965.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18370] width 1920 pitch 7680 (/4 1920)
>[276966.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3104ee0]
>[276966.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3104ee0] width 1920 pitch 7680 (/4 1920)
>[276966.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc30e0]
>[276966.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc30e0] width 1920 pitch 7680 (/4 1920)
>[276966.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a34e30]
>[276966.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a34e30] width 1920 pitch 7680 (/4 1920)
>[276966.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc30e0]
>[276966.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc30e0] width 1920 pitch 7680 (/4 1920)
>[276966.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a34e30]
>[276966.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a34e30] width 1920 pitch 7680 (/4 1920)
>[276966.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc30e0]
>[276966.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc30e0] width 1920 pitch 7680 (/4 1920)
>[276966.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a34e30]
>[276966.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a34e30] width 1920 pitch 7680 (/4 1920)
>[276966.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc30e0]
>[276966.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc30e0] width 1920 pitch 7680 (/4 1920)
>[276966.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a34e30]
>[276966.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a34e30] width 1920 pitch 7680 (/4 1920)
>[276966.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc30e0]
>[276966.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc30e0] width 1920 pitch 7680 (/4 1920)
>[276966.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2543eb0]
>[276966.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2543eb0] width 1920 pitch 7680 (/4 1920)
>[276966.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[276966.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[276966.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2543eb0]
>[276966.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2543eb0] width 1920 pitch 7680 (/4 1920)
>[276966.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cf20]
>[276966.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cf20] width 1920 pitch 7680 (/4 1920)
>[276968.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca05d0]
>[276968.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca05d0] width 1920 pitch 7680 (/4 1920)
>[276968.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276968.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276968.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276968.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276968.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276968.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276968.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276968.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276969.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276969.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276969.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276969.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276969.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276969.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276969.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276969.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276969.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276969.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276969.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276969.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276969.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276969.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276969.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276969.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276969.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276969.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276970.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276970.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276970.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276970.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276970.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276970.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276970.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276970.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276970.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276970.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276970.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276970.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276970.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276970.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276970.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276970.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276970.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[276970.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[276970.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[276970.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[276970.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395abd0]
>[276970.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395abd0] width 1920 pitch 7680 (/4 1920)
>[276970.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276970.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b55170]
>[276971.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b55170] width 1920 pitch 7680 (/4 1920)
>[276971.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f3d60]
>[276971.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f3d60] width 1920 pitch 7680 (/4 1920)
>[276971.450] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[276971.450] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[276971.450] (II) UnloadModule: "evdev"
>[277005.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3932a80]
>[277005.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3932a80] width 1920 pitch 7680 (/4 1920)
>[277020.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27350]
>[277020.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27350] width 1920 pitch 7680 (/4 1920)
>[277080.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb7960]
>[277080.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb7960] width 1920 pitch 7680 (/4 1920)
>[277095.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a420]
>[277095.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a420] width 1920 pitch 7680 (/4 1920)
>[277170.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b670]
>[277170.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b670] width 1920 pitch 7680 (/4 1920)
>[277185.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0fe30]
>[277185.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0fe30] width 1920 pitch 7680 (/4 1920)
>[277350.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d232b0]
>[277350.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d232b0] width 1920 pitch 7680 (/4 1920)
>[277365.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd9e20]
>[277365.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd9e20] width 1920 pitch 7680 (/4 1920)
>[277515.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8cca0]
>[277515.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8cca0] width 1920 pitch 7680 (/4 1920)
>[277560.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab9600]
>[277560.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab9600] width 1920 pitch 7680 (/4 1920)
>[277571.032] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[277571.032] (II) RADEON(0): Using hsync ranges from config file
>[277571.032] (II) RADEON(0): Using vrefresh ranges from config file
>[277571.032] (II) RADEON(0): Printing DDC gathered Modelines:
>[277571.032] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[277571.032] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[277571.032] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[277571.032] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[277571.032] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[277571.032] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[277571.032] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[277571.032] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[277571.032] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[277571.032] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[277571.032] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[277571.032] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[277571.032] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[277571.033] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[277571.033] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[277571.033] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[277661.673] (II) RADEON(0): RADEONSaveScreen(2)
>[277661.673] (II) RADEON(0): RADEONSaveScreen(0)
>[280663.161] (II) AIGLX: Suspending AIGLX clients for VT switch
>[280663.161] (II) RADEON(0): RADEONLeaveVT_KMS
>[280663.161] (II) RADEON(0): Ok, leaving now...
>[280676.237] (II) AIGLX: Resuming AIGLX clients after VT switch
>[280676.237] (II) RADEON(0): RADEONEnterVT_KMS
>[280676.276] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[280676.276] (II) RADEON(0): Using hsync ranges from config file
>[280676.276] (II) RADEON(0): Using vrefresh ranges from config file
>[280676.276] (II) RADEON(0): Printing DDC gathered Modelines:
>[280676.276] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[280676.276] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[280676.276] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[280676.276] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[280676.276] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[280676.276] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[280676.276] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[280676.276] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[280676.276] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[280676.276] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[280676.276] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[280676.276] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[280676.283] (II) RADEON(0): RADEONSaveScreen(2)
>[280676.283] (II) RADEON(0): RADEONSaveScreen(1)
>[280676.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3913700]
>[280676.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3913700] width 1920 pitch 7680 (/4 1920)
>[280736.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb2690]
>[280736.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb2690] width 1920 pitch 7680 (/4 1920)
>[280738.402] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[280738.402] (II) No input driver specified, ignoring this device.
>[280738.402] (II) This device may have been added with another device file.
>[280738.402] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[280738.402] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[280738.402] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[280738.402] 	Option "XkbRules" "evdev"
>[280738.402] 	Option "XkbModel" "evdev"
>[280738.402] 	Option "XkbLayout" "us"
>[280738.402] 	Option "_source" "server/udev"
>[280738.402] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[280738.402] 	Option "path" "/dev/input/event14"
>[280738.402] 	Option "device" "/dev/input/event14"
>[280738.402] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input44/event14"
>[280738.402] 	Option "driver" "evdev"
>[280738.402] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[280738.402] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[280738.406] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[280738.406] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[280738.406] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[280738.406] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[280738.406] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[280738.406] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[280738.406] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[280738.406] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[280738.406] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[280738.406] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input44/event14"
>[280738.406] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[280738.406] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[280738.406] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[280738.406] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[280738.406] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[280738.406] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[280751.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb2690]
>[280751.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb2690] width 1920 pitch 7680 (/4 1920)
>[280765.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a930]
>[280765.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a930] width 1920 pitch 7680 (/4 1920)
>[280766.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d672b0]
>[280766.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d672b0] width 1920 pitch 7680 (/4 1920)
>[280766.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a930]
>[280766.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a930] width 1920 pitch 7680 (/4 1920)
>[280766.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40393f0]
>[280766.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40393f0] width 1920 pitch 7680 (/4 1920)
>[280767.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280767.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b200]
>[280767.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b200] width 1920 pitch 7680 (/4 1920)
>[280767.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f02440]
>[280767.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f02440] width 1920 pitch 7680 (/4 1920)
>[280768.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60fb0]
>[280768.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60fb0] width 1920 pitch 7680 (/4 1920)
>[280768.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393f070]
>[280768.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393f070] width 1920 pitch 7680 (/4 1920)
>[280768.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0d20]
>[280768.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0d20] width 1920 pitch 7680 (/4 1920)
>[280768.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6c2c0]
>[280768.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6c2c0] width 1920 pitch 7680 (/4 1920)
>[280769.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25603a0]
>[280769.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25603a0] width 1920 pitch 7680 (/4 1920)
>[280769.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4030120]
>[280769.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4030120] width 1920 pitch 7680 (/4 1920)
>[280769.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a882a0]
>[280769.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a882a0] width 1920 pitch 7680 (/4 1920)
>[280769.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40400b0]
>[280769.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40400b0] width 1920 pitch 7680 (/4 1920)
>[280769.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fbd90]
>[280769.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fbd90] width 1920 pitch 7680 (/4 1920)
>[280769.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0360]
>[280769.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0360] width 1920 pitch 7680 (/4 1920)
>[280769.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3baa0]
>[280769.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3baa0] width 1920 pitch 7680 (/4 1920)
>[280769.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df7b20]
>[280769.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df7b20] width 1920 pitch 7680 (/4 1920)
>[280769.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6f860]
>[280769.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6f860] width 1920 pitch 7680 (/4 1920)
>[280769.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcd9c0]
>[280769.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcd9c0] width 1920 pitch 7680 (/4 1920)
>[280769.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd84e0]
>[280769.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd84e0] width 1920 pitch 7680 (/4 1920)
>[280769.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1250]
>[280769.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1250] width 1920 pitch 7680 (/4 1920)
>[280769.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6c800]
>[280769.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6c800] width 1920 pitch 7680 (/4 1920)
>[280772.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d207a0]
>[280772.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d207a0] width 1920 pitch 7680 (/4 1920)
>[280779.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280779.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280779.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280779.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280779.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280779.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280779.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[280779.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[280779.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280779.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280781.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[280781.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[280792.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb2e0]
>[280792.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb2e0] width 1920 pitch 7680 (/4 1920)
>[280811.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280811.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280826.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f5350]
>[280826.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f5350] width 1920 pitch 7680 (/4 1920)
>[280863.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280863.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280863.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4450]
>[280863.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4450] width 1920 pitch 7680 (/4 1920)
>[280863.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb2e0]
>[280863.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb2e0] width 1920 pitch 7680 (/4 1920)
>[280863.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280863.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280863.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280863.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280864.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280864.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280864.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280864.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280864.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280864.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280864.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280864.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280864.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280864.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280864.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280864.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280864.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280864.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280864.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280864.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280864.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280864.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280864.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280864.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280864.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280864.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280864.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21920]
>[280864.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21920] width 1920 pitch 7680 (/4 1920)
>[280871.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad4e0]
>[280871.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad4e0] width 1920 pitch 7680 (/4 1920)
>[280886.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3fd40]
>[280886.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3fd40] width 1920 pitch 7680 (/4 1920)
>[280901.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4450]
>[280901.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4450] width 1920 pitch 7680 (/4 1920)
>[280916.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[280916.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[280931.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4450]
>[280931.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4450] width 1920 pitch 7680 (/4 1920)
>[280946.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad4e0]
>[280946.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad4e0] width 1920 pitch 7680 (/4 1920)
>[280991.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad4e0]
>[280991.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad4e0] width 1920 pitch 7680 (/4 1920)
>[281006.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebb2e0]
>[281006.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebb2e0] width 1920 pitch 7680 (/4 1920)
>[281021.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[281021.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[281066.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3fd40]
>[281066.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3fd40] width 1920 pitch 7680 (/4 1920)
>[281081.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4450]
>[281081.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4450] width 1920 pitch 7680 (/4 1920)
>[281141.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3991e20]
>[281141.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3991e20] width 1920 pitch 7680 (/4 1920)
>[281171.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad4e0]
>[281171.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad4e0] width 1920 pitch 7680 (/4 1920)
>[281336.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cad4e0]
>[281336.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cad4e0] width 1920 pitch 7680 (/4 1920)
>[281351.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3fd40]
>[281351.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3fd40] width 1920 pitch 7680 (/4 1920)
>[281466.577] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[281466.577] (II) RADEON(0): Using hsync ranges from config file
>[281466.577] (II) RADEON(0): Using vrefresh ranges from config file
>[281466.577] (II) RADEON(0): Printing DDC gathered Modelines:
>[281466.577] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[281466.577] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[281466.577] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[281466.577] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[281466.577] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[281466.577] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[281466.577] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[281466.577] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[281466.577] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[281466.577] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[281466.577] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[281466.577] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[281556.666] (II) RADEON(0): RADEONSaveScreen(2)
>[281556.666] (II) RADEON(0): RADEONSaveScreen(0)
>[284558.169] (II) AIGLX: Suspending AIGLX clients for VT switch
>[284558.169] (II) RADEON(0): RADEONLeaveVT_KMS
>[284558.169] (II) RADEON(0): Ok, leaving now...
>[284571.158] (II) AIGLX: Resuming AIGLX clients after VT switch
>[284571.158] (II) RADEON(0): RADEONEnterVT_KMS
>[284571.209] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[284571.209] (II) RADEON(0): Using hsync ranges from config file
>[284571.209] (II) RADEON(0): Using vrefresh ranges from config file
>[284571.209] (II) RADEON(0): Printing DDC gathered Modelines:
>[284571.209] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[284571.209] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[284571.209] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[284571.209] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[284571.209] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[284571.209] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[284571.209] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[284571.209] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[284571.209] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[284571.209] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[284571.209] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[284571.209] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[284571.216] (II) RADEON(0): RADEONSaveScreen(2)
>[284571.216] (II) RADEON(0): RADEONSaveScreen(1)
>[284571.216] (EE) evdev: PIXART USB OPTICAL MOUSE: Unable to open evdev device "/dev/input/event14".
>[284571.216] [dix] couldn't enable device 10
>[284571.217] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[284571.217] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[284571.217] (II) UnloadModule: "evdev"
>[284571.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f6c90]
>[284571.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f6c90] width 1920 pitch 7680 (/4 1920)
>[284571.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c25530]
>[284571.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c25530] width 1920 pitch 7680 (/4 1920)
>[284571.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5369ac0]
>[284571.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5369ac0] width 1920 pitch 7680 (/4 1920)
>[284571.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5369ac0]
>[284571.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5369ac0] width 1920 pitch 7680 (/4 1920)
>[284571.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5369ac0]
>[284571.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5369ac0] width 1920 pitch 7680 (/4 1920)
>[284571.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284571.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284571.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284571.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284571.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284571.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284571.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf5900]
>[284571.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf5900] width 1920 pitch 7680 (/4 1920)
>[284571.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4c20]
>[284571.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4c20] width 1920 pitch 7680 (/4 1920)
>[284736.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce88e0]
>[284736.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce88e0] width 1920 pitch 7680 (/4 1920)
>[284751.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05cf0]
>[284751.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05cf0] width 1920 pitch 7680 (/4 1920)
>[285171.271] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[285171.271] (II) RADEON(0): Using hsync ranges from config file
>[285171.271] (II) RADEON(0): Using vrefresh ranges from config file
>[285171.271] (II) RADEON(0): Printing DDC gathered Modelines:
>[285171.271] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[285171.271] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[285171.271] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[285171.271] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[285171.271] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[285171.271] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[285171.271] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[285171.271] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[285171.271] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[285171.271] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[285171.271] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[285171.271] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[285261.661] (II) RADEON(0): RADEONSaveScreen(2)
>[285261.661] (II) RADEON(0): RADEONSaveScreen(0)
>[288263.166] (II) AIGLX: Suspending AIGLX clients for VT switch
>[288263.166] (II) RADEON(0): RADEONLeaveVT_KMS
>[288263.166] (II) RADEON(0): Ok, leaving now...
>[288276.272] (II) AIGLX: Resuming AIGLX clients after VT switch
>[288276.272] (II) RADEON(0): RADEONEnterVT_KMS
>[288276.314] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[288276.314] (II) RADEON(0): Using hsync ranges from config file
>[288276.314] (II) RADEON(0): Using vrefresh ranges from config file
>[288276.314] (II) RADEON(0): Printing DDC gathered Modelines:
>[288276.314] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[288276.314] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[288276.314] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[288276.314] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[288276.314] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[288276.314] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[288276.314] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[288276.314] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[288276.314] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[288276.314] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[288276.314] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[288276.314] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[288276.324] (II) RADEON(0): RADEONSaveScreen(2)
>[288276.324] (II) RADEON(0): RADEONSaveScreen(1)
>[288276.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[288276.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[288276.430] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[288276.430] (II) No input driver specified, ignoring this device.
>[288276.430] (II) This device may have been added with another device file.
>[288276.430] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[288276.430] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[288276.430] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[288276.430] 	Option "XkbRules" "evdev"
>[288276.430] 	Option "XkbModel" "evdev"
>[288276.430] 	Option "XkbLayout" "us"
>[288276.430] 	Option "_source" "server/udev"
>[288276.430] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[288276.430] 	Option "path" "/dev/input/event14"
>[288276.430] 	Option "device" "/dev/input/event14"
>[288276.430] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input45/event14"
>[288276.430] 	Option "driver" "evdev"
>[288276.430] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[288276.430] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[288276.430] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[288276.430] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[288276.430] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[288276.430] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[288276.430] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[288276.430] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[288276.430] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[288276.430] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[288276.430] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[288276.430] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input45/event14"
>[288276.430] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[288276.430] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[288276.430] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[288276.430] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[288276.430] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[288276.430] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[288283.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[288283.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[288284.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475d90]
>[288284.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475d90] width 1920 pitch 7680 (/4 1920)
>[288284.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24635b0]
>[288284.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24635b0] width 1920 pitch 7680 (/4 1920)
>[288286.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475d90]
>[288286.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475d90] width 1920 pitch 7680 (/4 1920)
>[288286.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288286.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288286.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475d90]
>[288286.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475d90] width 1920 pitch 7680 (/4 1920)
>[288286.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288286.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288286.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475d90]
>[288286.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475d90] width 1920 pitch 7680 (/4 1920)
>[288286.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288287.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288287.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475d90]
>[288287.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475d90] width 1920 pitch 7680 (/4 1920)
>[288287.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288287.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288287.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475d90]
>[288287.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475d90] width 1920 pitch 7680 (/4 1920)
>[288287.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288287.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288287.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7140]
>[288287.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7140] width 1920 pitch 7680 (/4 1920)
>[288287.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288287.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288287.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7140]
>[288287.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7140] width 1920 pitch 7680 (/4 1920)
>[288287.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288287.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288287.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce8840]
>[288287.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce8840] width 1920 pitch 7680 (/4 1920)
>[288287.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288287.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288288.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7140]
>[288288.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7140] width 1920 pitch 7680 (/4 1920)
>[288288.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce8840]
>[288288.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce8840] width 1920 pitch 7680 (/4 1920)
>[288288.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce8840]
>[288288.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce8840] width 1920 pitch 7680 (/4 1920)
>[288288.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463590]
>[288288.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463590] width 1920 pitch 7680 (/4 1920)
>[288288.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288288.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288288.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[288289.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[288289.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528c50]
>[288289.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528c50] width 1920 pitch 7680 (/4 1920)
>[288289.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[288289.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[288289.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528c50]
>[288289.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528c50] width 1920 pitch 7680 (/4 1920)
>[288289.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[288289.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[288289.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528c50]
>[288289.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528c50] width 1920 pitch 7680 (/4 1920)
>[288289.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[288289.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[288289.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528c50]
>[288289.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528c50] width 1920 pitch 7680 (/4 1920)
>[288289.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[288289.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[288289.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528c50]
>[288289.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528c50] width 1920 pitch 7680 (/4 1920)
>[288289.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[288289.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[288289.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2528c50]
>[288289.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2528c50] width 1920 pitch 7680 (/4 1920)
>[288289.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcacb0]
>[288289.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcacb0] width 1920 pitch 7680 (/4 1920)
>[288289.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc57f0]
>[288289.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc57f0] width 1920 pitch 7680 (/4 1920)
>[288296.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3917030]
>[288296.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3917030] width 1920 pitch 7680 (/4 1920)
>[288297.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9dc00]
>[288297.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9dc00] width 1920 pitch 7680 (/4 1920)
>[288297.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9ddd0]
>[288297.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9ddd0] width 1920 pitch 7680 (/4 1920)
>[288313.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d54170]
>[288313.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d54170] width 1920 pitch 7680 (/4 1920)
>[288313.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b700]
>[288313.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b700] width 1920 pitch 7680 (/4 1920)
>[288317.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1a4c0]
>[288317.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1a4c0] width 1920 pitch 7680 (/4 1920)
>[288317.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dceb0]
>[288317.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dceb0] width 1920 pitch 7680 (/4 1920)
>[288318.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c216e0]
>[288318.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c216e0] width 1920 pitch 7680 (/4 1920)
>[288318.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2331ac0]
>[288318.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2331ac0] width 1920 pitch 7680 (/4 1920)
>[288318.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b680]
>[288318.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b680] width 1920 pitch 7680 (/4 1920)
>[288318.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d54170]
>[288318.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d54170] width 1920 pitch 7680 (/4 1920)
>[288318.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288318.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288318.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2331950]
>[288318.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2331950] width 1920 pitch 7680 (/4 1920)
>[288318.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288318.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288318.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93560]
>[288318.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93560] width 1920 pitch 7680 (/4 1920)
>[288318.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288318.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288318.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93560]
>[288318.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93560] width 1920 pitch 7680 (/4 1920)
>[288318.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288318.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288318.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93560]
>[288318.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93560] width 1920 pitch 7680 (/4 1920)
>[288318.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288318.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288319.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ddff0]
>[288319.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ddff0] width 1920 pitch 7680 (/4 1920)
>[288319.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e93560]
>[288319.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e93560] width 1920 pitch 7680 (/4 1920)
>[288319.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b4e0]
>[288319.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b4e0] width 1920 pitch 7680 (/4 1920)
>[288319.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b4e0]
>[288319.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b4e0] width 1920 pitch 7680 (/4 1920)
>[288319.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[288319.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[288319.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288319.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288319.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b4e0]
>[288319.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b4e0] width 1920 pitch 7680 (/4 1920)
>[288319.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288319.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288319.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d54170]
>[288319.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d54170] width 1920 pitch 7680 (/4 1920)
>[288319.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b4e0]
>[288319.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b4e0] width 1920 pitch 7680 (/4 1920)
>[288319.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b4e0]
>[288319.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b4e0] width 1920 pitch 7680 (/4 1920)
>[288319.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d54170]
>[288319.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d54170] width 1920 pitch 7680 (/4 1920)
>[288319.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247f8e0]
>[288319.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247f8e0] width 1920 pitch 7680 (/4 1920)
>[288319.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4b4e0]
>[288319.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4b4e0] width 1920 pitch 7680 (/4 1920)
>[288319.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d54170]
>[288319.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d54170] width 1920 pitch 7680 (/4 1920)
>[288323.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dceb0]
>[288323.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dceb0] width 1920 pitch 7680 (/4 1920)
>[288323.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[288323.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[288323.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dceb0]
>[288323.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dceb0] width 1920 pitch 7680 (/4 1920)
>[288323.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[288323.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[288323.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dceb0]
>[288323.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dceb0] width 1920 pitch 7680 (/4 1920)
>[288323.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[288323.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[288323.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fd00]
>[288323.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fd00] width 1920 pitch 7680 (/4 1920)
>[288323.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[288323.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[288323.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[288323.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[288323.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbe430]
>[288323.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbe430] width 1920 pitch 7680 (/4 1920)
>[288323.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[288323.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[288323.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbe430]
>[288323.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbe430] width 1920 pitch 7680 (/4 1920)
>[288323.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[288323.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[288323.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbe430]
>[288323.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbe430] width 1920 pitch 7680 (/4 1920)
>[288323.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[288323.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[288323.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x311a0f0]
>[288323.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x311a0f0] width 1920 pitch 7680 (/4 1920)
>[288323.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def360]
>[288323.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def360] width 1920 pitch 7680 (/4 1920)
>[288323.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x311a0f0]
>[288323.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x311a0f0] width 1920 pitch 7680 (/4 1920)
>[288323.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def360]
>[288323.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def360] width 1920 pitch 7680 (/4 1920)
>[288323.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f269d0]
>[288323.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f269d0] width 1920 pitch 7680 (/4 1920)
>[288323.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def360]
>[288323.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def360] width 1920 pitch 7680 (/4 1920)
>[288323.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbe430]
>[288323.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbe430] width 1920 pitch 7680 (/4 1920)
>[288323.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[288323.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[288323.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[288323.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[288323.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7bf40]
>[288323.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7bf40] width 1920 pitch 7680 (/4 1920)
>[288323.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[288323.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[288323.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315e870]
>[288323.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315e870] width 1920 pitch 7680 (/4 1920)
>[288323.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2e40]
>[288323.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2e40] width 1920 pitch 7680 (/4 1920)
>[288323.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b387f0]
>[288323.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b387f0] width 1920 pitch 7680 (/4 1920)
>[288323.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2e40]
>[288323.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2e40] width 1920 pitch 7680 (/4 1920)
>[288323.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x311a0f0]
>[288324.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x311a0f0] width 1920 pitch 7680 (/4 1920)
>[288324.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43d00]
>[288324.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43d00] width 1920 pitch 7680 (/4 1920)
>[288324.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feb090]
>[288324.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feb090] width 1920 pitch 7680 (/4 1920)
>[288325.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea4e10]
>[288325.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea4e10] width 1920 pitch 7680 (/4 1920)
>[288381.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f88840]
>[288381.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f88840] width 1920 pitch 7680 (/4 1920)
>[288396.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f88840]
>[288396.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f88840] width 1920 pitch 7680 (/4 1920)
>[288411.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288411.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288426.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca7030]
>[288426.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca7030] width 1920 pitch 7680 (/4 1920)
>[288446.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489c50]
>[288446.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489c50] width 1920 pitch 7680 (/4 1920)
>[288446.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288447.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288447.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489c50]
>[288447.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489c50] width 1920 pitch 7680 (/4 1920)
>[288447.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288447.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288447.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489c50]
>[288447.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489c50] width 1920 pitch 7680 (/4 1920)
>[288447.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288447.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288447.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489c50]
>[288447.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489c50] width 1920 pitch 7680 (/4 1920)
>[288447.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288447.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288447.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489c50]
>[288447.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489c50] width 1920 pitch 7680 (/4 1920)
>[288447.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288447.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288447.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489c50]
>[288447.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489c50] width 1920 pitch 7680 (/4 1920)
>[288448.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288448.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288448.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288448.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288448.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288448.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288448.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288448.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288448.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288448.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288448.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288448.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288448.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288448.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288448.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288448.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288448.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288448.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288448.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288448.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288448.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288448.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288453.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288453.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288453.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288453.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288453.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288453.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288453.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288453.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288453.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288453.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288453.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288453.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288453.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288453.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288453.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288453.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288453.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288453.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288453.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288453.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288454.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288454.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288454.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288454.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288454.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288454.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288455.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288455.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288456.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288456.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288456.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288456.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288456.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[288456.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[288456.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288456.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288456.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288456.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288456.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288456.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288456.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288456.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288456.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288456.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288456.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288456.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288486.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288486.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288501.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288501.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288513.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288513.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288513.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288513.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288513.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288513.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288513.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288513.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288513.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288513.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288513.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288513.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288513.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288513.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288513.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288514.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288514.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288514.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288514.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288514.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288514.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288514.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288514.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288514.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288514.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3ac0]
>[288514.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3ac0] width 1920 pitch 7680 (/4 1920)
>[288514.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288514.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288514.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288514.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288514.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288515.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288515.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288515.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288515.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288515.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288515.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cb30]
>[288515.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cb30] width 1920 pitch 7680 (/4 1920)
>[288515.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288515.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288515.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288515.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288515.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b7a0]
>[288515.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b7a0] width 1920 pitch 7680 (/4 1920)
>[288516.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea17c0]
>[288516.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea17c0] width 1920 pitch 7680 (/4 1920)
>[288561.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cedd80]
>[288561.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cedd80] width 1920 pitch 7680 (/4 1920)
>[288576.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bc600]
>[288576.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bc600] width 1920 pitch 7680 (/4 1920)
>[288591.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d34420]
>[288591.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d34420] width 1920 pitch 7680 (/4 1920)
>[288606.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2576280]
>[288606.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2576280] width 1920 pitch 7680 (/4 1920)
>[288621.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d34420]
>[288621.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d34420] width 1920 pitch 7680 (/4 1920)
>[288636.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2576280]
>[288636.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2576280] width 1920 pitch 7680 (/4 1920)
>[288651.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dfb50]
>[288651.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dfb50] width 1920 pitch 7680 (/4 1920)
>[288666.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b81b0]
>[288666.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b81b0] width 1920 pitch 7680 (/4 1920)
>[288696.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fa99e0]
>[288696.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fa99e0] width 1920 pitch 7680 (/4 1920)
>[288711.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b81b0]
>[288711.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b81b0] width 1920 pitch 7680 (/4 1920)
>[288741.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a36b0]
>[288741.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a36b0] width 1920 pitch 7680 (/4 1920)
>[288756.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a36b0]
>[288756.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a36b0] width 1920 pitch 7680 (/4 1920)
>[288771.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a36b0]
>[288771.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a36b0] width 1920 pitch 7680 (/4 1920)
>[288816.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a36b0]
>[288816.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a36b0] width 1920 pitch 7680 (/4 1920)
>[288846.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daeed0]
>[288846.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daeed0] width 1920 pitch 7680 (/4 1920)
>[288861.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305f560]
>[288861.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305f560] width 1920 pitch 7680 (/4 1920)
>[288876.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39416c0]
>[288876.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39416c0] width 1920 pitch 7680 (/4 1920)
>[288891.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd0a20]
>[288891.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd0a20] width 1920 pitch 7680 (/4 1920)
>[288936.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0a80]
>[288936.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0a80] width 1920 pitch 7680 (/4 1920)
>[288951.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941640]
>[288951.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941640] width 1920 pitch 7680 (/4 1920)
>[288954.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d36710]
>[288954.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d36710] width 1920 pitch 7680 (/4 1920)
>[288954.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4ca0]
>[288954.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4ca0] width 1920 pitch 7680 (/4 1920)
>[288954.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a670]
>[288955.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a670] width 1920 pitch 7680 (/4 1920)
>[288955.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4ca0]
>[288955.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4ca0] width 1920 pitch 7680 (/4 1920)
>[288955.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a670]
>[288955.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a670] width 1920 pitch 7680 (/4 1920)
>[288955.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75a90]
>[288955.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75a90] width 1920 pitch 7680 (/4 1920)
>[288955.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a6a0]
>[288955.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a6a0] width 1920 pitch 7680 (/4 1920)
>[288955.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75a90]
>[288955.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75a90] width 1920 pitch 7680 (/4 1920)
>[288955.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4cf0]
>[288955.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4cf0] width 1920 pitch 7680 (/4 1920)
>[288955.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288955.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288955.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a670]
>[288955.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a670] width 1920 pitch 7680 (/4 1920)
>[288955.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288955.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288955.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288955.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288955.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a670]
>[288955.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a670] width 1920 pitch 7680 (/4 1920)
>[288955.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4cd0]
>[288955.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4cd0] width 1920 pitch 7680 (/4 1920)
>[288955.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b60]
>[288955.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b60] width 1920 pitch 7680 (/4 1920)
>[288955.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288955.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288955.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288955.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288955.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d700]
>[288955.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d700] width 1920 pitch 7680 (/4 1920)
>[288955.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b40]
>[288955.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b40] width 1920 pitch 7680 (/4 1920)
>[288955.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40b40]
>[288955.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40b40] width 1920 pitch 7680 (/4 1920)
>[288955.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57100]
>[288955.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57100] width 1920 pitch 7680 (/4 1920)
>[288955.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d6a0]
>[288955.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d6a0] width 1920 pitch 7680 (/4 1920)
>[288955.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75a90]
>[288955.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75a90] width 1920 pitch 7680 (/4 1920)
>[288955.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288956.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288956.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75a90]
>[288956.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75a90] width 1920 pitch 7680 (/4 1920)
>[288966.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75a90]
>[288966.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75a90] width 1920 pitch 7680 (/4 1920)
>[288981.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd64b0]
>[288981.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd64b0] width 1920 pitch 7680 (/4 1920)
>[288996.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75a90]
>[288996.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75a90] width 1920 pitch 7680 (/4 1920)
>[289011.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75880]
>[289011.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75880] width 1920 pitch 7680 (/4 1920)
>[289026.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4a70]
>[289026.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4a70] width 1920 pitch 7680 (/4 1920)
>[289041.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b75880]
>[289041.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b75880] width 1920 pitch 7680 (/4 1920)
>[289049.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5de60]
>[289049.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5de60] width 1920 pitch 7680 (/4 1920)
>[289049.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[289049.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[289049.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5de60]
>[289049.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5de60] width 1920 pitch 7680 (/4 1920)
>[289049.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a450]
>[289049.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a450] width 1920 pitch 7680 (/4 1920)
>[289049.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[289049.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[289049.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a450]
>[289049.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a450] width 1920 pitch 7680 (/4 1920)
>[289049.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[289049.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[289049.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a450]
>[289049.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a450] width 1920 pitch 7680 (/4 1920)
>[289049.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[289049.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[289049.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a450]
>[289049.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a450] width 1920 pitch 7680 (/4 1920)
>[289049.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[289049.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[289049.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a450]
>[289049.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a450] width 1920 pitch 7680 (/4 1920)
>[289049.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[289049.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[289050.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40016c0]
>[289050.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40016c0] width 1920 pitch 7680 (/4 1920)
>[289052.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d343c0]
>[289052.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d343c0] width 1920 pitch 7680 (/4 1920)
>[289086.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0de0]
>[289086.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0de0] width 1920 pitch 7680 (/4 1920)
>[289101.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89900]
>[289101.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89900] width 1920 pitch 7680 (/4 1920)
>[289120.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45d50]
>[289120.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45d50] width 1920 pitch 7680 (/4 1920)
>[289121.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d343c0]
>[289121.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d343c0] width 1920 pitch 7680 (/4 1920)
>[289121.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289121.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289121.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289121.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289146.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4ad0]
>[289146.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4ad0] width 1920 pitch 7680 (/4 1920)
>[289161.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289161.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289180.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289180.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289191.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea05d0]
>[289191.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea05d0] width 1920 pitch 7680 (/4 1920)
>[289266.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ddf70]
>[289266.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ddf70] width 1920 pitch 7680 (/4 1920)
>[289281.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea05d0]
>[289281.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea05d0] width 1920 pitch 7680 (/4 1920)
>[289296.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ddf70]
>[289296.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ddf70] width 1920 pitch 7680 (/4 1920)
>[289311.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea05d0]
>[289311.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea05d0] width 1920 pitch 7680 (/4 1920)
>[289356.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fed720]
>[289356.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fed720] width 1920 pitch 7680 (/4 1920)
>[289371.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea05d0]
>[289371.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea05d0] width 1920 pitch 7680 (/4 1920)
>[289581.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fed720]
>[289581.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fed720] width 1920 pitch 7680 (/4 1920)
>[289611.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea05d0]
>[289611.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea05d0] width 1920 pitch 7680 (/4 1920)
>[289661.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fabe0]
>[289661.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fabe0] width 1920 pitch 7680 (/4 1920)
>[289662.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289662.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289662.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289662.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289662.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289662.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289662.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289662.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289662.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289662.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289662.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289662.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289662.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289662.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289662.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289662.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289662.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289662.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289662.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289662.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289663.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2463530]
>[289663.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2463530] width 1920 pitch 7680 (/4 1920)
>[289663.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2489bf0]
>[289663.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2489bf0] width 1920 pitch 7680 (/4 1920)
>[289663.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc0ab0]
>[289663.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc0ab0] width 1920 pitch 7680 (/4 1920)
>[289663.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30709e0]
>[289663.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30709e0] width 1920 pitch 7680 (/4 1920)
>[289663.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc0ab0]
>[289663.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc0ab0] width 1920 pitch 7680 (/4 1920)
>[289663.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30709e0]
>[289663.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30709e0] width 1920 pitch 7680 (/4 1920)
>[289663.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc0ab0]
>[289663.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc0ab0] width 1920 pitch 7680 (/4 1920)
>[289663.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30709e0]
>[289663.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30709e0] width 1920 pitch 7680 (/4 1920)
>[289663.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc0ab0]
>[289663.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc0ab0] width 1920 pitch 7680 (/4 1920)
>[289663.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89900]
>[289663.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89900] width 1920 pitch 7680 (/4 1920)
>[289663.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc0ab0]
>[289663.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc0ab0] width 1920 pitch 7680 (/4 1920)
>[289663.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89900]
>[289663.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89900] width 1920 pitch 7680 (/4 1920)
>[289671.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99b20]
>[289671.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99b20] width 1920 pitch 7680 (/4 1920)
>[289671.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24da090]
>[289671.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24da090] width 1920 pitch 7680 (/4 1920)
>[289671.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7a3e0]
>[289671.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7a3e0] width 1920 pitch 7680 (/4 1920)
>[289691.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477bd0]
>[289691.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477bd0] width 1920 pitch 7680 (/4 1920)
>[289701.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c02b20]
>[289701.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c02b20] width 1920 pitch 7680 (/4 1920)
>[289704.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baeb30]
>[289704.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baeb30] width 1920 pitch 7680 (/4 1920)
>[289704.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baeb30]
>[289704.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baeb30] width 1920 pitch 7680 (/4 1920)
>[289704.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baeb30]
>[289704.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baeb30] width 1920 pitch 7680 (/4 1920)
>[289704.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baeb30]
>[289704.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baeb30] width 1920 pitch 7680 (/4 1920)
>[289704.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93c00]
>[289704.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93c00] width 1920 pitch 7680 (/4 1920)
>[289704.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481b90]
>[289704.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481b90] width 1920 pitch 7680 (/4 1920)
>[289704.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[289704.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[289704.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[289704.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[289704.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[289704.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[289704.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953180]
>[289704.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953180] width 1920 pitch 7680 (/4 1920)
>[289704.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f109e0]
>[289704.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f109e0] width 1920 pitch 7680 (/4 1920)
>[289704.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baeb30]
>[289704.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baeb30] width 1920 pitch 7680 (/4 1920)
>[289704.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d343c0]
>[289704.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d343c0] width 1920 pitch 7680 (/4 1920)
>[289704.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def360]
>[289704.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def360] width 1920 pitch 7680 (/4 1920)
>[289704.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f269d0]
>[289704.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f269d0] width 1920 pitch 7680 (/4 1920)
>[289704.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def360]
>[289704.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def360] width 1920 pitch 7680 (/4 1920)
>[289704.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[289704.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[289704.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2def360]
>[289704.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2def360] width 1920 pitch 7680 (/4 1920)
>[289704.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e934e0]
>[289704.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e934e0] width 1920 pitch 7680 (/4 1920)
>[289704.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7bf40]
>[289704.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7bf40] width 1920 pitch 7680 (/4 1920)
>[289704.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9c6a0]
>[289704.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9c6a0] width 1920 pitch 7680 (/4 1920)
>[289704.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30709e0]
>[289704.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30709e0] width 1920 pitch 7680 (/4 1920)
>[289704.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f10960]
>[289704.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f10960] width 1920 pitch 7680 (/4 1920)
>[289704.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289704.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289704.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289705.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289705.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289705.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289705.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289705.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289705.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289705.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289705.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289705.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289705.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289705.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289705.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289705.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289705.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289705.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289705.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289705.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289705.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289705.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289705.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289705.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289706.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289706.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[289706.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289706.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289706.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289706.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289706.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289706.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289706.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[289706.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[289706.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289706.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289716.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289716.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289941.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[289941.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[289971.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[289971.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[290107.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290107.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290107.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[290107.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[290107.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[290107.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[290107.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[290107.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[290107.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290107.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290107.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290107.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290107.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290107.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290107.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290107.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290107.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290107.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290107.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290107.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290119.420] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[290119.420] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[290119.420] (II) UnloadModule: "evdev"
>[290136.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290136.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290151.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5da40]
>[290151.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5da40] width 1920 pitch 7680 (/4 1920)
>[290211.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5da40]
>[290211.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5da40] width 1920 pitch 7680 (/4 1920)
>[290226.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5da40]
>[290226.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5da40] width 1920 pitch 7680 (/4 1920)
>[290331.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[290331.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[290346.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290346.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290451.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290451.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290466.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5da40]
>[290466.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5da40] width 1920 pitch 7680 (/4 1920)
>[290477.288] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[290477.288] (II) No input driver specified, ignoring this device.
>[290477.288] (II) This device may have been added with another device file.
>[290477.288] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[290477.288] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[290477.288] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[290477.288] 	Option "XkbRules" "evdev"
>[290477.288] 	Option "XkbModel" "evdev"
>[290477.288] 	Option "XkbLayout" "us"
>[290477.288] 	Option "_source" "server/udev"
>[290477.288] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[290477.288] 	Option "path" "/dev/input/event14"
>[290477.288] 	Option "device" "/dev/input/event14"
>[290477.288] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input46/event14"
>[290477.288] 	Option "driver" "evdev"
>[290477.288] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[290477.288] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[290477.291] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[290477.291] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[290477.291] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[290477.291] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[290477.291] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[290477.291] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[290477.291] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[290477.291] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[290477.291] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[290477.291] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input46/event14"
>[290477.291] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[290477.291] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[290477.291] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[290477.291] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[290477.291] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[290477.291] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[290481.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290481.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290498.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[290498.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[290499.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290499.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290499.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290499.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290499.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290500.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394def0]
>[290500.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394def0] width 1920 pitch 7680 (/4 1920)
>[290500.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[290500.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[290504.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a543d0]
>[290504.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a543d0] width 1920 pitch 7680 (/4 1920)
>[290507.757] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[290507.757] (II) RADEON(0): Using hsync ranges from config file
>[290507.757] (II) RADEON(0): Using vrefresh ranges from config file
>[290507.757] (II) RADEON(0): Printing DDC gathered Modelines:
>[290507.757] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[290507.757] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[290507.757] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[290507.757] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[290507.757] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[290507.757] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[290507.757] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[290507.757] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[290507.757] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[290507.757] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[290507.757] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[290507.757] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[290507.800] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[290507.800] (II) RADEON(0): Using hsync ranges from config file
>[290507.800] (II) RADEON(0): Using vrefresh ranges from config file
>[290507.800] (II) RADEON(0): Printing DDC gathered Modelines:
>[290507.800] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[290507.800] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[290507.800] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[290507.800] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[290507.800] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[290507.800] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[290507.800] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[290507.800] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[290507.800] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[290507.800] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[290507.800] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[290507.800] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[290507.843] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[290507.843] (II) RADEON(0): Using hsync ranges from config file
>[290507.843] (II) RADEON(0): Using vrefresh ranges from config file
>[290507.843] (II) RADEON(0): Printing DDC gathered Modelines:
>[290507.843] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[290507.843] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[290507.843] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[290507.843] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[290507.843] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[290507.843] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[290507.843] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[290507.843] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[290507.843] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[290507.843] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[290507.843] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[290507.843] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[290524.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddbeb0]
>[290524.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddbeb0] width 1920 pitch 7680 (/4 1920)
>[290541.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[290541.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[290556.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[290556.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[290571.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290571.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290601.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290601.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290616.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[290616.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[290646.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290646.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290676.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[290676.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[290691.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[290691.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[290706.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d893e0]
>[290706.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d893e0] width 1920 pitch 7680 (/4 1920)
>[290708.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290708.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290708.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290708.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290708.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290708.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290708.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290708.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290708.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290708.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290709.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290709.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290709.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290709.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290709.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290709.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290709.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290709.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290710.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290710.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290710.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290710.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290710.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290710.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290721.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290721.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290736.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290736.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290766.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290766.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290781.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[290781.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[290793.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1b60]
>[290793.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1b60] width 1920 pitch 7680 (/4 1920)
>[290793.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290794.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290794.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1b60]
>[290794.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1b60] width 1920 pitch 7680 (/4 1920)
>[290794.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290794.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290794.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1b60]
>[290794.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1b60] width 1920 pitch 7680 (/4 1920)
>[290794.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290794.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290794.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290794.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290794.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290795.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290795.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290795.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290795.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[290795.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[290795.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1b60]
>[290795.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1b60] width 1920 pitch 7680 (/4 1920)
>[290795.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc9a70]
>[290795.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc9a70] width 1920 pitch 7680 (/4 1920)
>[290796.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[290796.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[290796.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baeb30]
>[290796.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baeb30] width 1920 pitch 7680 (/4 1920)
>[290798.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4001350]
>[290798.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4001350] width 1920 pitch 7680 (/4 1920)
>[290798.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247ceb0]
>[290798.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247ceb0] width 1920 pitch 7680 (/4 1920)
>[290798.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4001350]
>[290798.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4001350] width 1920 pitch 7680 (/4 1920)
>[290798.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d3220]
>[290798.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d3220] width 1920 pitch 7680 (/4 1920)
>[290798.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160dc0]
>[290798.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160dc0] width 1920 pitch 7680 (/4 1920)
>[290798.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d3220]
>[290798.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d3220] width 1920 pitch 7680 (/4 1920)
>[290798.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160dc0]
>[290798.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160dc0] width 1920 pitch 7680 (/4 1920)
>[290798.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d3220]
>[290798.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d3220] width 1920 pitch 7680 (/4 1920)
>[290798.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160dc0]
>[290798.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160dc0] width 1920 pitch 7680 (/4 1920)
>[290799.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d79f70]
>[290799.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d79f70] width 1920 pitch 7680 (/4 1920)
>[290799.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc4ad0]
>[290799.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc4ad0] width 1920 pitch 7680 (/4 1920)
>[290799.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[290799.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[290799.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[290799.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[290799.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a66fb0]
>[290799.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a66fb0] width 1920 pitch 7680 (/4 1920)
>[290799.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[290799.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[290799.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a66fb0]
>[290799.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a66fb0] width 1920 pitch 7680 (/4 1920)
>[290799.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efadd0]
>[290799.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efadd0] width 1920 pitch 7680 (/4 1920)
>[290799.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a66fb0]
>[290799.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a66fb0] width 1920 pitch 7680 (/4 1920)
>[290811.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[290811.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[290826.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d343c0]
>[290826.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d343c0] width 1920 pitch 7680 (/4 1920)
>[290841.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f269d0]
>[290841.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f269d0] width 1920 pitch 7680 (/4 1920)
>[290871.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d86910]
>[290871.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d86910] width 1920 pitch 7680 (/4 1920)
>[290872.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9dc40]
>[290872.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9dc40] width 1920 pitch 7680 (/4 1920)
>[290872.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9dc40]
>[290872.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9dc40] width 1920 pitch 7680 (/4 1920)
>[290891.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33f90]
>[290891.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33f90] width 1920 pitch 7680 (/4 1920)
>[291025.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[291025.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[291025.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[291025.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[291025.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[291025.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[291025.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba570]
>[291025.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba570] width 1920 pitch 7680 (/4 1920)
>[291025.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[291025.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[291025.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba570]
>[291025.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba570] width 1920 pitch 7680 (/4 1920)
>[291025.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30edf40]
>[291025.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30edf40] width 1920 pitch 7680 (/4 1920)
>[291025.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310d960]
>[291025.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310d960] width 1920 pitch 7680 (/4 1920)
>[291027.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247edf0]
>[291027.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247edf0] width 1920 pitch 7680 (/4 1920)
>[291027.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0f50]
>[291027.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0f50] width 1920 pitch 7680 (/4 1920)
>[291027.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310d960]
>[291027.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310d960] width 1920 pitch 7680 (/4 1920)
>[291027.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0fe30]
>[291027.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0fe30] width 1920 pitch 7680 (/4 1920)
>[291027.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0f50]
>[291027.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0f50] width 1920 pitch 7680 (/4 1920)
>[291027.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0fe30]
>[291027.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0fe30] width 1920 pitch 7680 (/4 1920)
>[291027.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0f50]
>[291027.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0f50] width 1920 pitch 7680 (/4 1920)
>[291027.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0fe30]
>[291027.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0fe30] width 1920 pitch 7680 (/4 1920)
>[291027.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0f50]
>[291027.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0f50] width 1920 pitch 7680 (/4 1920)
>[291037.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[291037.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[291037.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[291037.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[291040.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[291040.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[291041.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[291041.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[291041.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fedc0]
>[291041.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fedc0] width 1920 pitch 7680 (/4 1920)
>[291041.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d893e0]
>[291041.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d893e0] width 1920 pitch 7680 (/4 1920)
>[291045.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[291045.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[291051.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[291051.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[291081.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fedc0]
>[291081.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fedc0] width 1920 pitch 7680 (/4 1920)
>[291096.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61c0]
>[291096.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61c0] width 1920 pitch 7680 (/4 1920)
>[291156.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddbeb0]
>[291156.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddbeb0] width 1920 pitch 7680 (/4 1920)
>[291291.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61c0]
>[291291.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61c0] width 1920 pitch 7680 (/4 1920)
>[291306.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[291306.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[291381.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[291381.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[291396.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61c0]
>[291396.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61c0] width 1920 pitch 7680 (/4 1920)
>[291411.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[291411.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[291456.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[291456.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[291471.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[291471.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[291486.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddbeb0]
>[291486.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddbeb0] width 1920 pitch 7680 (/4 1920)
>[291501.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[291501.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[291516.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[291516.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[291531.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[291531.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[291546.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[291546.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[291561.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d893e0]
>[291561.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d893e0] width 1920 pitch 7680 (/4 1920)
>[291576.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[291576.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[291606.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[291606.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[291621.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[291621.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[291636.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[291636.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[291651.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddbeb0]
>[291651.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddbeb0] width 1920 pitch 7680 (/4 1920)
>[291666.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[291666.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[291681.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[291681.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[291696.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb61c0]
>[291696.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb61c0] width 1920 pitch 7680 (/4 1920)
>[291726.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[291726.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[291801.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[291801.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[291816.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[291816.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[291831.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[291831.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[291846.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[291846.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[291891.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[291891.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[291906.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[291906.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[292008.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292008.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292008.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fedc0]
>[292008.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fedc0] width 1920 pitch 7680 (/4 1920)
>[292008.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292008.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292008.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[292008.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[292008.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292008.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292009.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[292009.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[292009.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292009.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292009.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292009.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292009.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292009.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292009.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2990]
>[292010.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2990] width 1920 pitch 7680 (/4 1920)
>[292010.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddbeb0]
>[292010.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddbeb0] width 1920 pitch 7680 (/4 1920)
>[292010.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2970]
>[292010.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2970] width 1920 pitch 7680 (/4 1920)
>[292010.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2970]
>[292010.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2970] width 1920 pitch 7680 (/4 1920)
>[292010.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d66180]
>[292010.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d66180] width 1920 pitch 7680 (/4 1920)
>[292010.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2970]
>[292010.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2970] width 1920 pitch 7680 (/4 1920)
>[292017.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[292017.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[292017.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477bd0]
>[292017.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477bd0] width 1920 pitch 7680 (/4 1920)
>[292017.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[292017.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[292017.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477bd0]
>[292018.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477bd0] width 1920 pitch 7680 (/4 1920)
>[292018.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[292018.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[292018.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477bd0]
>[292018.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477bd0] width 1920 pitch 7680 (/4 1920)
>[292018.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477bd0]
>[292018.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477bd0] width 1920 pitch 7680 (/4 1920)
>[292018.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[292019.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[292019.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400bbf0]
>[292019.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400bbf0] width 1920 pitch 7680 (/4 1920)
>[292021.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400bbf0]
>[292021.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400bbf0] width 1920 pitch 7680 (/4 1920)
>[292021.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[292021.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[292022.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400bbf0]
>[292022.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400bbf0] width 1920 pitch 7680 (/4 1920)
>[292022.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d66180]
>[292022.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d66180] width 1920 pitch 7680 (/4 1920)
>[292022.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[292022.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[292022.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292022.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292022.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d893e0]
>[292022.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d893e0] width 1920 pitch 7680 (/4 1920)
>[292022.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb8d50]
>[292022.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb8d50] width 1920 pitch 7680 (/4 1920)
>[292022.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d893e0]
>[292022.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d893e0] width 1920 pitch 7680 (/4 1920)
>[292041.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fedc0]
>[292041.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fedc0] width 1920 pitch 7680 (/4 1920)
>[292086.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19110]
>[292086.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19110] width 1920 pitch 7680 (/4 1920)
>[292210.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[292210.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[292251.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39399a0]
>[292251.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39399a0] width 1920 pitch 7680 (/4 1920)
>[292266.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2db70]
>[292266.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2db70] width 1920 pitch 7680 (/4 1920)
>[292476.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39399c0]
>[292476.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39399c0] width 1920 pitch 7680 (/4 1920)
>[292491.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39399c0]
>[292491.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39399c0] width 1920 pitch 7680 (/4 1920)
>[292521.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501f0]
>[292521.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501f0] width 1920 pitch 7680 (/4 1920)
>[292551.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501f0]
>[292551.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501f0] width 1920 pitch 7680 (/4 1920)
>[292566.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39399c0]
>[292566.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39399c0] width 1920 pitch 7680 (/4 1920)
>[292581.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38190]
>[292581.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38190] width 1920 pitch 7680 (/4 1920)
>[292611.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38190]
>[292611.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38190] width 1920 pitch 7680 (/4 1920)
>[292626.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501f0]
>[292626.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501f0] width 1920 pitch 7680 (/4 1920)
>[292701.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d501d0]
>[292701.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d501d0] width 1920 pitch 7680 (/4 1920)
>[292716.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2970]
>[292716.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2970] width 1920 pitch 7680 (/4 1920)
>[292731.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed2970]
>[292731.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed2970] width 1920 pitch 7680 (/4 1920)
>[292746.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd01d0]
>[292746.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd01d0] width 1920 pitch 7680 (/4 1920)
>[292896.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c719d0]
>[292896.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c719d0] width 1920 pitch 7680 (/4 1920)
>[292911.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38190]
>[292911.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38190] width 1920 pitch 7680 (/4 1920)
>[292971.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c719e0]
>[292971.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c719e0] width 1920 pitch 7680 (/4 1920)
>[292986.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f38190]
>[292986.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f38190] width 1920 pitch 7680 (/4 1920)
>[293000.210] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[293000.210] (II) RADEON(0): Using hsync ranges from config file
>[293000.210] (II) RADEON(0): Using vrefresh ranges from config file
>[293000.210] (II) RADEON(0): Printing DDC gathered Modelines:
>[293000.210] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[293000.210] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[293000.210] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[293000.210] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[293000.210] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[293000.210] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[293000.210] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[293000.210] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[293000.210] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[293000.210] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[293000.210] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[293000.210] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[293000.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c96a40]
>[293000.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c96a40] width 1920 pitch 7680 (/4 1920)
>[293000.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c96a40]
>[293000.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c96a40] width 1920 pitch 7680 (/4 1920)
>[293000.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c96a40]
>[293000.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c96a40] width 1920 pitch 7680 (/4 1920)
>[293000.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c96a40]
>[293000.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c96a40] width 1920 pitch 7680 (/4 1920)
>[293000.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293000.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293000.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293000.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293000.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293000.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293000.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293000.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293000.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293000.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293000.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293000.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293001.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[293001.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[293001.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293001.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293001.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293001.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293001.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293001.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293001.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293001.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293001.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293001.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293001.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293001.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293001.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034f60]
>[293001.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034f60] width 1920 pitch 7680 (/4 1920)
>[293001.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b510]
>[293001.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b510] width 1920 pitch 7680 (/4 1920)
>[293001.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0ea70]
>[293001.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0ea70] width 1920 pitch 7680 (/4 1920)
>[293001.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[293001.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[293001.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293001.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293001.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0eb00]
>[293001.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0eb00] width 1920 pitch 7680 (/4 1920)
>[293001.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7e1f0]
>[293001.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7e1f0] width 1920 pitch 7680 (/4 1920)
>[293001.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[293001.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[293001.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392f530]
>[293001.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392f530] width 1920 pitch 7680 (/4 1920)
>[293001.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481d30]
>[293001.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481d30] width 1920 pitch 7680 (/4 1920)
>[293001.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293002.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293002.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[293002.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[293002.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034f60]
>[293002.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034f60] width 1920 pitch 7680 (/4 1920)
>[293002.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391d6e0]
>[293002.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391d6e0] width 1920 pitch 7680 (/4 1920)
>[293002.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[293002.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[293002.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0ea70]
>[293002.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0ea70] width 1920 pitch 7680 (/4 1920)
>[293016.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c41120]
>[293016.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c41120] width 1920 pitch 7680 (/4 1920)
>[293046.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[293046.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[293061.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293061.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293121.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293121.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293136.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[293136.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[293226.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034f60]
>[293226.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034f60] width 1920 pitch 7680 (/4 1920)
>[293256.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293256.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293331.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391d6e0]
>[293331.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391d6e0] width 1920 pitch 7680 (/4 1920)
>[293361.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[293361.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[293391.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[293391.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[293406.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffffe0]
>[293406.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffffe0] width 1920 pitch 7680 (/4 1920)
>[293481.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c96a40]
>[293481.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c96a40] width 1920 pitch 7680 (/4 1920)
>[293511.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b510]
>[293511.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b510] width 1920 pitch 7680 (/4 1920)
>[293602.017] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[293602.018] (II) RADEON(0): Using hsync ranges from config file
>[293602.018] (II) RADEON(0): Using vrefresh ranges from config file
>[293602.018] (II) RADEON(0): Printing DDC gathered Modelines:
>[293602.018] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[293602.018] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[293602.018] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[293602.018] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[293602.018] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[293602.018] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[293602.018] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[293602.018] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[293602.018] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[293602.018] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[293602.018] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[293602.018] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[293640.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[293640.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[293643.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293643.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293643.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293643.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293643.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293643.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293643.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293643.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293643.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293643.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293643.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293643.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293643.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293643.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293643.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293643.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293643.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293643.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293644.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293644.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293644.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293644.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293644.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293644.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293645.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293645.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293645.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293645.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293646.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293646.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293646.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293646.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293646.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293646.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293646.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293646.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293646.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293646.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293646.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391d6e0]
>[293646.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391d6e0] width 1920 pitch 7680 (/4 1920)
>[293646.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293646.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293646.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4034f60]
>[293646.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4034f60] width 1920 pitch 7680 (/4 1920)
>[293646.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293646.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293646.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[293646.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[293646.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293646.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293646.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293646.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293646.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293646.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293646.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293646.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293646.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293646.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293646.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293646.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293646.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293646.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293646.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293646.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293646.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293646.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293647.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293647.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293647.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293647.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293647.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293647.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293647.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293647.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293647.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293647.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293647.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293647.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293647.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293647.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293647.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293647.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293647.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293647.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293647.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293647.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293647.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293647.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293648.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293648.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293648.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293648.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293648.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293648.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293648.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293648.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293648.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293648.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293648.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293648.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293648.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293648.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293648.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293648.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293648.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293648.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293649.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293649.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293649.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293649.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293649.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293649.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293649.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293649.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293649.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af2fb0]
>[293649.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af2fb0] width 1920 pitch 7680 (/4 1920)
>[293650.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293650.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293650.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[293650.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[293650.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391d6e0]
>[293650.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391d6e0] width 1920 pitch 7680 (/4 1920)
>[293650.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c41120]
>[293650.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c41120] width 1920 pitch 7680 (/4 1920)
>[293650.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293650.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293650.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c41120]
>[293650.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c41120] width 1920 pitch 7680 (/4 1920)
>[293650.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[293650.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[293650.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293650.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293650.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b510]
>[293650.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b510] width 1920 pitch 7680 (/4 1920)
>[293655.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faf780]
>[293655.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faf780] width 1920 pitch 7680 (/4 1920)
>[293655.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293655.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293655.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293655.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293655.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293655.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293655.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293655.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293655.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293655.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293655.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[293655.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[293655.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293655.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6c0e0]
>[293655.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6c0e0] width 1920 pitch 7680 (/4 1920)
>[293655.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293655.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6c0e0]
>[293655.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6c0e0] width 1920 pitch 7680 (/4 1920)
>[293655.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ba0]
>[293655.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ba0] width 1920 pitch 7680 (/4 1920)
>[293656.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb0ff0]
>[293656.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb0ff0] width 1920 pitch 7680 (/4 1920)
>[293656.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[293656.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[293656.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293656.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293656.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[293656.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[293656.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293656.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293656.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[293656.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[293656.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293656.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293656.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[293656.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[293656.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293656.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293656.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293656.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293656.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293656.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293656.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46f20]
>[293656.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46f20] width 1920 pitch 7680 (/4 1920)
>[293656.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[293656.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[293665.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6c0e0]
>[293665.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6c0e0] width 1920 pitch 7680 (/4 1920)
>[293665.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293665.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293665.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293665.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293665.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293665.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293665.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293665.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293665.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293665.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293665.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293665.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293665.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293665.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293666.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293666.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293666.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293666.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293766.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293766.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293781.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293781.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293826.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293826.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293841.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293841.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[293871.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[293871.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[293886.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4c140]
>[293886.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4c140] width 1920 pitch 7680 (/4 1920)
>[294036.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294036.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294051.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294051.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294126.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294126.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294156.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294156.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294186.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294186.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294246.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294246.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294254.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294254.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294254.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294254.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294254.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294254.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294254.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294254.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294254.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294254.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294254.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294254.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294254.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294254.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294254.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294254.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294254.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294254.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294254.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294254.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294254.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294254.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294255.187] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[294255.187] (II) RADEON(0): Using hsync ranges from config file
>[294255.187] (II) RADEON(0): Using vrefresh ranges from config file
>[294255.187] (II) RADEON(0): Printing DDC gathered Modelines:
>[294255.187] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[294255.187] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[294255.187] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[294255.187] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[294255.187] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[294255.187] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[294255.187] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[294255.187] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[294255.187] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[294255.187] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[294255.187] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[294255.187] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[294255.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294255.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294255.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294255.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294255.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294255.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294344.673] (II) RADEON(0): RADEONSaveScreen(2)
>[294344.673] (II) RADEON(0): RADEONSaveScreen(0)
>[294735.336] (II) RADEON(0): RADEONSaveScreen(1)
>[294735.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c634c0]
>[294735.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c634c0] width 1920 pitch 7680 (/4 1920)
>[294741.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294741.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294741.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294741.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294741.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294741.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294741.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294741.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294741.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294741.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294741.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294742.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294742.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294742.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294742.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294742.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294742.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294742.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294742.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294742.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294742.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294742.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294742.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294742.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294742.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294742.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294742.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294742.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294742.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294742.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294743.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294743.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294743.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294743.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294743.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294744.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294744.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294745.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294745.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294745.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294745.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294746.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294746.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294746.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294746.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294746.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddd3c0]
>[294746.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddd3c0] width 1920 pitch 7680 (/4 1920)
>[294746.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294746.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294746.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[294746.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[294746.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294746.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294746.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294746.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294746.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294746.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294748.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294748.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294748.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294748.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294748.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294748.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294748.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294748.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294748.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294748.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294748.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294748.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294748.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294748.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294748.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294748.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294748.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294748.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294748.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae5ad0]
>[294748.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae5ad0] width 1920 pitch 7680 (/4 1920)
>[294748.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d6770]
>[294748.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d6770] width 1920 pitch 7680 (/4 1920)
>[294748.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d56c50]
>[294749.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d56c50] width 1920 pitch 7680 (/4 1920)
>[294749.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcaa20]
>[294749.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcaa20] width 1920 pitch 7680 (/4 1920)
>[294749.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294749.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294749.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[294749.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[294749.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294749.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294749.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[294749.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[294749.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb43d0]
>[294749.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb43d0] width 1920 pitch 7680 (/4 1920)
>[294749.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[294749.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[294749.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2dc50]
>[294749.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2dc50] width 1920 pitch 7680 (/4 1920)
>[294750.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28350]
>[294750.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28350] width 1920 pitch 7680 (/4 1920)
>[294759.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a93800]
>[294759.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a93800] width 1920 pitch 7680 (/4 1920)
>[294760.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39db400]
>[294760.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39db400] width 1920 pitch 7680 (/4 1920)
>[294760.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9abb0]
>[294760.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9abb0] width 1920 pitch 7680 (/4 1920)
>[294765.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae7700]
>[294765.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae7700] width 1920 pitch 7680 (/4 1920)
>[294768.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73bd0]
>[294768.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73bd0] width 1920 pitch 7680 (/4 1920)
>[294768.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d3d0]
>[294768.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d3d0] width 1920 pitch 7680 (/4 1920)
>[294768.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73bd0]
>[294768.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73bd0] width 1920 pitch 7680 (/4 1920)
>[294768.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d3d0]
>[294768.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d3d0] width 1920 pitch 7680 (/4 1920)
>[294768.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73bd0]
>[294768.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73bd0] width 1920 pitch 7680 (/4 1920)
>[294768.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d3d0]
>[294768.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d3d0] width 1920 pitch 7680 (/4 1920)
>[294768.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5365840]
>[294769.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5365840] width 1920 pitch 7680 (/4 1920)
>[294769.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fa80]
>[294769.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fa80] width 1920 pitch 7680 (/4 1920)
>[294769.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5365840]
>[294769.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5365840] width 1920 pitch 7680 (/4 1920)
>[294769.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fa80]
>[294769.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fa80] width 1920 pitch 7680 (/4 1920)
>[294769.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5365840]
>[294769.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5365840] width 1920 pitch 7680 (/4 1920)
>[294769.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fa80]
>[294769.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fa80] width 1920 pitch 7680 (/4 1920)
>[294769.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d3d0]
>[294769.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d3d0] width 1920 pitch 7680 (/4 1920)
>[294769.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fa80]
>[294769.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fa80] width 1920 pitch 7680 (/4 1920)
>[294769.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d3d0]
>[294769.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d3d0] width 1920 pitch 7680 (/4 1920)
>[294769.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7fa80]
>[294769.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7fa80] width 1920 pitch 7680 (/4 1920)
>[294769.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255d3d0]
>[294769.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255d3d0] width 1920 pitch 7680 (/4 1920)
>[294769.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294769.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294769.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d51c30]
>[294769.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d51c30] width 1920 pitch 7680 (/4 1920)
>[294769.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294769.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294769.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d51c30]
>[294769.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d51c30] width 1920 pitch 7680 (/4 1920)
>[294769.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294769.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294769.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d51c30]
>[294769.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d51c30] width 1920 pitch 7680 (/4 1920)
>[294769.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294769.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294769.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294769.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294769.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294769.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294769.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294769.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294769.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294769.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294769.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294770.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294770.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294770.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294770.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294770.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294770.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294770.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294770.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294770.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294770.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a48cd0]
>[294770.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a48cd0] width 1920 pitch 7680 (/4 1920)
>[294770.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0d490]
>[294770.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0d490] width 1920 pitch 7680 (/4 1920)
>[294770.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18450]
>[294770.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18450] width 1920 pitch 7680 (/4 1920)
>[294770.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d18440]
>[294770.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d18440] width 1920 pitch 7680 (/4 1920)
>[294780.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a87a70]
>[294780.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a87a70] width 1920 pitch 7680 (/4 1920)
>[294791.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3169ad0]
>[294791.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3169ad0] width 1920 pitch 7680 (/4 1920)
>[294791.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[294791.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[294791.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3169ad0]
>[294791.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3169ad0] width 1920 pitch 7680 (/4 1920)
>[294791.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[294791.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[294791.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3169ad0]
>[294791.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3169ad0] width 1920 pitch 7680 (/4 1920)
>[294791.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[294791.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[294791.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3169ad0]
>[294791.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3169ad0] width 1920 pitch 7680 (/4 1920)
>[294791.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[294791.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[294791.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d183f0]
>[294791.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d183f0] width 1920 pitch 7680 (/4 1920)
>[294791.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[294791.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[294791.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d183f0]
>[294791.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d183f0] width 1920 pitch 7680 (/4 1920)
>[294791.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa02e0]
>[294791.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa02e0] width 1920 pitch 7680 (/4 1920)
>[294791.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d183f0]
>[294791.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d183f0] width 1920 pitch 7680 (/4 1920)
>[294791.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294791.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294791.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d183f0]
>[294791.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d183f0] width 1920 pitch 7680 (/4 1920)
>[294791.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294791.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294791.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ce0]
>[294791.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ce0] width 1920 pitch 7680 (/4 1920)
>[294793.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab3950]
>[294793.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab3950] width 1920 pitch 7680 (/4 1920)
>[294793.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f750]
>[294793.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f750] width 1920 pitch 7680 (/4 1920)
>[294793.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3dd0]
>[294793.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3dd0] width 1920 pitch 7680 (/4 1920)
>[294793.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fcf0]
>[294793.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fcf0] width 1920 pitch 7680 (/4 1920)
>[294793.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c6c0]
>[294793.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c6c0] width 1920 pitch 7680 (/4 1920)
>[294793.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ce0]
>[294793.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ce0] width 1920 pitch 7680 (/4 1920)
>[294793.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f750]
>[294793.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f750] width 1920 pitch 7680 (/4 1920)
>[294793.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab3950]
>[294793.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab3950] width 1920 pitch 7680 (/4 1920)
>[294793.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bce8a0]
>[294793.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bce8a0] width 1920 pitch 7680 (/4 1920)
>[294793.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fcf0]
>[294793.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fcf0] width 1920 pitch 7680 (/4 1920)
>[294793.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d186f0]
>[294793.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d186f0] width 1920 pitch 7680 (/4 1920)
>[294793.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c719f0]
>[294793.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c719f0] width 1920 pitch 7680 (/4 1920)
>[294793.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c6c0]
>[294793.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c6c0] width 1920 pitch 7680 (/4 1920)
>[294793.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ce0]
>[294793.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ce0] width 1920 pitch 7680 (/4 1920)
>[294793.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21dd0]
>[294793.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21dd0] width 1920 pitch 7680 (/4 1920)
>[294793.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94b30]
>[294793.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94b30] width 1920 pitch 7680 (/4 1920)
>[294793.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2cb60]
>[294793.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2cb60] width 1920 pitch 7680 (/4 1920)
>[294795.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294795.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294795.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294795.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294795.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05280]
>[294795.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05280] width 1920 pitch 7680 (/4 1920)
>[294795.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5b40]
>[294795.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5b40] width 1920 pitch 7680 (/4 1920)
>[294798.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c19190]
>[294798.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c19190] width 1920 pitch 7680 (/4 1920)
>[294798.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aab950]
>[294798.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aab950] width 1920 pitch 7680 (/4 1920)
>[294798.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aabb50]
>[294798.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aabb50] width 1920 pitch 7680 (/4 1920)
>[294818.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c68450]
>[294818.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c68450] width 1920 pitch 7680 (/4 1920)
>[294818.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b1380]
>[294818.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b1380] width 1920 pitch 7680 (/4 1920)
>[294818.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c68450]
>[294818.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c68450] width 1920 pitch 7680 (/4 1920)
>[294818.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b1380]
>[294818.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b1380] width 1920 pitch 7680 (/4 1920)
>[294818.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c68450]
>[294818.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c68450] width 1920 pitch 7680 (/4 1920)
>[294818.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b1380]
>[294818.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b1380] width 1920 pitch 7680 (/4 1920)
>[294818.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c68450]
>[294818.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c68450] width 1920 pitch 7680 (/4 1920)
>[294818.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b1380]
>[294818.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b1380] width 1920 pitch 7680 (/4 1920)
>[294818.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ab0]
>[294818.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ab0] width 1920 pitch 7680 (/4 1920)
>[294818.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faae90]
>[294818.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faae90] width 1920 pitch 7680 (/4 1920)
>[294818.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ab0]
>[294818.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ab0] width 1920 pitch 7680 (/4 1920)
>[294818.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2faae90]
>[294818.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2faae90] width 1920 pitch 7680 (/4 1920)
>[294818.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294818.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294818.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294818.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294818.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294818.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294818.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38db5b0]
>[294818.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38db5b0] width 1920 pitch 7680 (/4 1920)
>[294818.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ab0]
>[294818.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ab0] width 1920 pitch 7680 (/4 1920)
>[294819.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ab0]
>[294819.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ab0] width 1920 pitch 7680 (/4 1920)
>[294819.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294819.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294819.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b570]
>[294819.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b570] width 1920 pitch 7680 (/4 1920)
>[294819.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3ab0]
>[294819.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3ab0] width 1920 pitch 7680 (/4 1920)
>[294819.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294819.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294819.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294819.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294819.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294819.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294819.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294819.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294819.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3924860]
>[294819.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3924860] width 1920 pitch 7680 (/4 1920)
>[294819.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294819.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294821.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294821.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294821.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b570]
>[294821.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b570] width 1920 pitch 7680 (/4 1920)
>[294821.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b570]
>[294821.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b570] width 1920 pitch 7680 (/4 1920)
>[294821.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[294821.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[294821.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd3460]
>[294821.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd3460] width 1920 pitch 7680 (/4 1920)
>[294822.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e380]
>[294822.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e380] width 1920 pitch 7680 (/4 1920)
>[294822.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e2b0]
>[294822.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e2b0] width 1920 pitch 7680 (/4 1920)
>[294825.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab2700]
>[294825.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab2700] width 1920 pitch 7680 (/4 1920)
>[294828.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a7f0]
>[294828.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a7f0] width 1920 pitch 7680 (/4 1920)
>[294828.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a7f0]
>[294828.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a7f0] width 1920 pitch 7680 (/4 1920)
>[294828.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d27ea0]
>[294828.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d27ea0] width 1920 pitch 7680 (/4 1920)
>[294828.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf1e0]
>[294828.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf1e0] width 1920 pitch 7680 (/4 1920)
>[294828.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbf1e0]
>[294828.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbf1e0] width 1920 pitch 7680 (/4 1920)
>[294828.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a7f0]
>[294828.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a7f0] width 1920 pitch 7680 (/4 1920)
>[294828.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a7f0]
>[294828.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a7f0] width 1920 pitch 7680 (/4 1920)
>[294828.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294828.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392a7f0]
>[294828.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392a7f0] width 1920 pitch 7680 (/4 1920)
>[294828.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d5f40]
>[294828.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d5f40] width 1920 pitch 7680 (/4 1920)
>[294829.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b570]
>[294829.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b570] width 1920 pitch 7680 (/4 1920)
>[294829.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d6080]
>[294829.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d6080] width 1920 pitch 7680 (/4 1920)
>[294829.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5df50]
>[294829.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5df50] width 1920 pitch 7680 (/4 1920)
>[294829.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294829.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294829.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96060]
>[294829.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96060] width 1920 pitch 7680 (/4 1920)
>[294829.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294829.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294829.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5df50]
>[294829.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5df50] width 1920 pitch 7680 (/4 1920)
>[294829.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294829.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294829.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294829.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294829.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294829.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294829.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294829.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294829.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294829.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294829.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294829.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294829.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294829.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294829.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294829.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294829.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294829.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294829.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294829.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294830.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a010a0]
>[294830.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a010a0] width 1920 pitch 7680 (/4 1920)
>[294830.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294830.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294830.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8de0]
>[294830.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8de0] width 1920 pitch 7680 (/4 1920)
>[294831.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5df50]
>[294831.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5df50] width 1920 pitch 7680 (/4 1920)
>[294840.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f050]
>[294840.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f050] width 1920 pitch 7680 (/4 1920)
>[294840.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f750]
>[294840.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f750] width 1920 pitch 7680 (/4 1920)
>[294840.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9dcb0]
>[294840.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9dcb0] width 1920 pitch 7680 (/4 1920)
>[294840.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bce8a0]
>[294840.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bce8a0] width 1920 pitch 7680 (/4 1920)
>[294840.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8cfc0]
>[294840.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8cfc0] width 1920 pitch 7680 (/4 1920)
>[294840.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c719f0]
>[294840.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c719f0] width 1920 pitch 7680 (/4 1920)
>[294840.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c6c0]
>[294840.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c6c0] width 1920 pitch 7680 (/4 1920)
>[294840.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2b560]
>[294840.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2b560] width 1920 pitch 7680 (/4 1920)
>[294840.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d186f0]
>[294841.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d186f0] width 1920 pitch 7680 (/4 1920)
>[294841.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ebe0]
>[294841.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ebe0] width 1920 pitch 7680 (/4 1920)
>[294841.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2babf00]
>[294841.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2babf00] width 1920 pitch 7680 (/4 1920)
>[294841.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d22110]
>[294842.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d22110] width 1920 pitch 7680 (/4 1920)
>[294842.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7f750]
>[294842.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7f750] width 1920 pitch 7680 (/4 1920)
>[294842.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4f050]
>[294842.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4f050] width 1920 pitch 7680 (/4 1920)
>[294843.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fcf0]
>[294843.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fcf0] width 1920 pitch 7680 (/4 1920)
>[294844.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99f90]
>[294844.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99f90] width 1920 pitch 7680 (/4 1920)
>[294844.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bce8a0]
>[294844.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bce8a0] width 1920 pitch 7680 (/4 1920)
>[294844.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4b9c0]
>[294844.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4b9c0] width 1920 pitch 7680 (/4 1920)
>[294844.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294844.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294844.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4b9c0]
>[294844.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4b9c0] width 1920 pitch 7680 (/4 1920)
>[294844.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294844.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294844.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4b9c0]
>[294844.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4b9c0] width 1920 pitch 7680 (/4 1920)
>[294848.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294848.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294848.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294848.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294848.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294849.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294849.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294849.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294849.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294849.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294849.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294849.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294849.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294849.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294849.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294849.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294849.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294849.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294849.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294849.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294849.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294849.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294850.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294850.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294851.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294851.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294852.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294852.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294852.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294852.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294853.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294853.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294853.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294853.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294853.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294853.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294853.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294853.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294853.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294853.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294853.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294853.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294853.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294853.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294853.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294853.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294853.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294853.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294853.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294853.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294854.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294854.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294854.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294854.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294854.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294854.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294854.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294854.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294854.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294854.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294854.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294854.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294854.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294854.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294854.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294854.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294854.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294854.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294854.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c1b0]
>[294854.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c1b0] width 1920 pitch 7680 (/4 1920)
>[294854.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c1b0]
>[294854.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c1b0] width 1920 pitch 7680 (/4 1920)
>[294854.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294854.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294854.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294854.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294854.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c1b0]
>[294854.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c1b0] width 1920 pitch 7680 (/4 1920)
>[294854.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73c50]
>[294854.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73c50] width 1920 pitch 7680 (/4 1920)
>[294857.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294857.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294857.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294857.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294857.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294857.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294857.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294857.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294857.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294857.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294857.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294857.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294857.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294857.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294857.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294857.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294857.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294857.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294857.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294857.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294858.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294858.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294858.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c1b0]
>[294858.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c1b0] width 1920 pitch 7680 (/4 1920)
>[294858.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[294858.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[294858.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[294858.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[294858.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294858.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294858.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294858.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294858.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbbbe0]
>[294858.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbbbe0] width 1920 pitch 7680 (/4 1920)
>[294858.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294858.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294858.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9c1b0]
>[294858.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9c1b0] width 1920 pitch 7680 (/4 1920)
>[294858.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[294858.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[294860.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6b170]
>[294860.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6b170] width 1920 pitch 7680 (/4 1920)
>[294860.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac1710]
>[294860.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac1710] width 1920 pitch 7680 (/4 1920)
>[294860.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac1630]
>[294860.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac1630] width 1920 pitch 7680 (/4 1920)
>[294880.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2040]
>[294880.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2040] width 1920 pitch 7680 (/4 1920)
>[294885.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc2120]
>[294885.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc2120] width 1920 pitch 7680 (/4 1920)
>[294900.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b9b0]
>[294900.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b9b0] width 1920 pitch 7680 (/4 1920)
>[294915.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac1630]
>[294915.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac1630] width 1920 pitch 7680 (/4 1920)
>[294930.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60dc0]
>[294930.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60dc0] width 1920 pitch 7680 (/4 1920)
>[294945.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401b020]
>[294945.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401b020] width 1920 pitch 7680 (/4 1920)
>[294960.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401b020]
>[294960.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401b020] width 1920 pitch 7680 (/4 1920)
>[294975.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9e8a0]
>[294975.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9e8a0] width 1920 pitch 7680 (/4 1920)
>[294990.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571610]
>[294990.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571610] width 1920 pitch 7680 (/4 1920)
>[295005.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295005.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295020.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88a10]
>[295020.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88a10] width 1920 pitch 7680 (/4 1920)
>[295035.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295035.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295050.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295050.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295065.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295065.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295080.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295080.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295095.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295095.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295110.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295110.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295140.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bda2a0]
>[295140.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bda2a0] width 1920 pitch 7680 (/4 1920)
>[295155.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bda2a0]
>[295155.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bda2a0] width 1920 pitch 7680 (/4 1920)
>[295160.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295160.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295160.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295160.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295160.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295160.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295160.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295160.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295160.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295160.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295160.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7cbd0]
>[295160.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7cbd0] width 1920 pitch 7680 (/4 1920)
>[295160.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7cbd0]
>[295160.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7cbd0] width 1920 pitch 7680 (/4 1920)
>[295160.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7cbd0]
>[295160.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7cbd0] width 1920 pitch 7680 (/4 1920)
>[295160.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fe7d0]
>[295160.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fe7d0] width 1920 pitch 7680 (/4 1920)
>[295160.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7cbd0]
>[295160.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7cbd0] width 1920 pitch 7680 (/4 1920)
>[295161.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295161.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295161.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27ec0]
>[295161.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27ec0] width 1920 pitch 7680 (/4 1920)
>[295161.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7e550]
>[295161.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7e550] width 1920 pitch 7680 (/4 1920)
>[295161.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295161.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295161.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7e550]
>[295161.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7e550] width 1920 pitch 7680 (/4 1920)
>[295161.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4039770]
>[295161.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4039770] width 1920 pitch 7680 (/4 1920)
>[295161.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295161.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295161.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4039770]
>[295161.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4039770] width 1920 pitch 7680 (/4 1920)
>[295161.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393be10]
>[295161.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393be10] width 1920 pitch 7680 (/4 1920)
>[295161.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295161.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295161.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393be10]
>[295161.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393be10] width 1920 pitch 7680 (/4 1920)
>[295161.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295161.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295161.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393be10]
>[295161.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393be10] width 1920 pitch 7680 (/4 1920)
>[295161.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295161.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295161.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393be10]
>[295161.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393be10] width 1920 pitch 7680 (/4 1920)
>[295161.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295161.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295161.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393be10]
>[295161.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393be10] width 1920 pitch 7680 (/4 1920)
>[295163.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d58310]
>[295163.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d58310] width 1920 pitch 7680 (/4 1920)
>[295164.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec28f0]
>[295164.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec28f0] width 1920 pitch 7680 (/4 1920)
>[295164.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6c520]
>[295164.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6c520] width 1920 pitch 7680 (/4 1920)
>[295170.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92950]
>[295170.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92950] width 1920 pitch 7680 (/4 1920)
>[295200.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21a30]
>[295200.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21a30] width 1920 pitch 7680 (/4 1920)
>[295215.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310af80]
>[295215.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310af80] width 1920 pitch 7680 (/4 1920)
>[295231.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310af80]
>[295231.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310af80] width 1920 pitch 7680 (/4 1920)
>[295231.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310af80]
>[295231.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310af80] width 1920 pitch 7680 (/4 1920)
>[295231.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310af80]
>[295231.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310af80] width 1920 pitch 7680 (/4 1920)
>[295231.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310af80]
>[295231.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310af80] width 1920 pitch 7680 (/4 1920)
>[295231.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310af80]
>[295231.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310af80] width 1920 pitch 7680 (/4 1920)
>[295231.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295231.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295231.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295231.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295231.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295231.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295231.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295231.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295231.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247aee0]
>[295231.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247aee0] width 1920 pitch 7680 (/4 1920)
>[295231.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401ad70]
>[295231.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401ad70] width 1920 pitch 7680 (/4 1920)
>[295232.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295232.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295232.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295232.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295232.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d27ec0]
>[295232.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d27ec0] width 1920 pitch 7680 (/4 1920)
>[295232.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295232.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295232.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[295232.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[295232.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295232.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295232.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295232.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295232.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295232.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295232.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295232.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295232.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295232.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295232.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295232.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295232.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295232.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295232.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295232.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295232.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295233.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295233.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295233.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295233.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[295233.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[295233.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[295233.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[295233.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295233.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295233.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295233.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295233.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295233.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295233.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295233.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295233.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295233.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295233.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295233.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295233.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295233.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295233.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295233.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295233.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295233.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295234.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295234.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295234.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295234.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295234.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295234.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295234.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffda10]
>[295234.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffda10] width 1920 pitch 7680 (/4 1920)
>[295234.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295234.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295234.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffda10]
>[295234.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffda10] width 1920 pitch 7680 (/4 1920)
>[295234.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295234.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295234.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffda10]
>[295234.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffda10] width 1920 pitch 7680 (/4 1920)
>[295234.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295234.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295234.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffda10]
>[295234.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffda10] width 1920 pitch 7680 (/4 1920)
>[295234.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295234.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295234.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee0d0]
>[295234.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee0d0] width 1920 pitch 7680 (/4 1920)
>[295234.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295235.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295235.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571570]
>[295235.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571570] width 1920 pitch 7680 (/4 1920)
>[295235.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295235.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295235.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571570]
>[295235.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571570] width 1920 pitch 7680 (/4 1920)
>[295235.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295235.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295235.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571570]
>[295235.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571570] width 1920 pitch 7680 (/4 1920)
>[295235.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295235.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295235.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571570]
>[295235.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571570] width 1920 pitch 7680 (/4 1920)
>[295235.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571570]
>[295235.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571570] width 1920 pitch 7680 (/4 1920)
>[295235.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295235.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295236.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2571570]
>[295236.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2571570] width 1920 pitch 7680 (/4 1920)
>[295236.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295236.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295236.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eaf20]
>[295236.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eaf20] width 1920 pitch 7680 (/4 1920)
>[295236.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eaf20]
>[295236.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eaf20] width 1920 pitch 7680 (/4 1920)
>[295236.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eaf20]
>[295236.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eaf20] width 1920 pitch 7680 (/4 1920)
>[295236.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eaf20]
>[295236.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eaf20] width 1920 pitch 7680 (/4 1920)
>[295236.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eaf20]
>[295236.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eaf20] width 1920 pitch 7680 (/4 1920)
>[295236.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295236.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295236.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295236.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295238.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295238.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295238.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f17fc0]
>[295238.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f17fc0] width 1920 pitch 7680 (/4 1920)
>[295241.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295241.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295241.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b856b0]
>[295241.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b856b0] width 1920 pitch 7680 (/4 1920)
>[295241.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295241.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295241.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b856b0]
>[295241.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b856b0] width 1920 pitch 7680 (/4 1920)
>[295241.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295241.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295241.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295241.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295241.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9ebc0]
>[295241.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9ebc0] width 1920 pitch 7680 (/4 1920)
>[295241.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d27d90]
>[295241.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d27d90] width 1920 pitch 7680 (/4 1920)
>[295241.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb6120]
>[295241.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb6120] width 1920 pitch 7680 (/4 1920)
>[295257.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdd480]
>[295257.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdd480] width 1920 pitch 7680 (/4 1920)
>[295257.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[295257.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[295257.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2ec0]
>[295257.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2ec0] width 1920 pitch 7680 (/4 1920)
>[295257.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391bd70]
>[295257.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391bd70] width 1920 pitch 7680 (/4 1920)
>[295318.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295318.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295318.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295318.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295318.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295318.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295318.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295318.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295318.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295318.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295318.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295318.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295318.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295318.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295318.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295318.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295318.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295318.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295319.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295319.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295319.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295319.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295319.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295319.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295319.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295319.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295319.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295319.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295319.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295319.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295319.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295319.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295319.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f500]
>[295319.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f500] width 1920 pitch 7680 (/4 1920)
>[295320.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fc820]
>[295320.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fc820] width 1920 pitch 7680 (/4 1920)
>[295322.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295322.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295322.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295322.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295323.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295323.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295323.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295323.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295323.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295323.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295323.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295323.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295323.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295323.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295323.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295323.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295323.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295323.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295323.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295323.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295323.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295323.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295323.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295323.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295323.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295323.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295323.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295323.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295325.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948370]
>[295325.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948370] width 1920 pitch 7680 (/4 1920)
>[295325.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295325.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295326.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948370]
>[295326.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948370] width 1920 pitch 7680 (/4 1920)
>[295326.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295326.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295326.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948370]
>[295326.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948370] width 1920 pitch 7680 (/4 1920)
>[295326.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295326.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295326.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948370]
>[295326.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948370] width 1920 pitch 7680 (/4 1920)
>[295326.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295326.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295326.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3948370]
>[295326.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3948370] width 1920 pitch 7680 (/4 1920)
>[295326.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4320]
>[295326.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4320] width 1920 pitch 7680 (/4 1920)
>[295326.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390af60]
>[295326.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390af60] width 1920 pitch 7680 (/4 1920)
>[295326.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7c00]
>[295326.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7c00] width 1920 pitch 7680 (/4 1920)
>[295326.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390af00]
>[295326.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390af00] width 1920 pitch 7680 (/4 1920)
>[295326.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7c00]
>[295326.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7c00] width 1920 pitch 7680 (/4 1920)
>[295326.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390af00]
>[295326.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390af00] width 1920 pitch 7680 (/4 1920)
>[295326.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7c00]
>[295326.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7c00] width 1920 pitch 7680 (/4 1920)
>[295326.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390af00]
>[295326.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390af00] width 1920 pitch 7680 (/4 1920)
>[295326.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7c00]
>[295326.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7c00] width 1920 pitch 7680 (/4 1920)
>[295326.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d90fa0]
>[295326.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d90fa0] width 1920 pitch 7680 (/4 1920)
>[295327.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2330]
>[295327.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2330] width 1920 pitch 7680 (/4 1920)
>[295331.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295331.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295331.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[295331.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[295331.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295331.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295331.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[295331.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[295331.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295331.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295331.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[295331.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[295331.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295331.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295331.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[295331.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[295331.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295331.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295332.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[295332.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[295332.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295332.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295332.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d91110]
>[295332.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d91110] width 1920 pitch 7680 (/4 1920)
>[295332.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295332.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295333.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d91110]
>[295333.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d91110] width 1920 pitch 7680 (/4 1920)
>[295333.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f22f0]
>[295333.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f22f0] width 1920 pitch 7680 (/4 1920)
>[295333.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906b90]
>[295333.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906b90] width 1920 pitch 7680 (/4 1920)
>[295333.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3076220]
>[295333.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3076220] width 1920 pitch 7680 (/4 1920)
>[295333.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906b90]
>[295333.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906b90] width 1920 pitch 7680 (/4 1920)
>[295333.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3076220]
>[295333.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3076220] width 1920 pitch 7680 (/4 1920)
>[295333.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906b90]
>[295333.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906b90] width 1920 pitch 7680 (/4 1920)
>[295333.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3076220]
>[295333.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3076220] width 1920 pitch 7680 (/4 1920)
>[295333.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906b90]
>[295333.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906b90] width 1920 pitch 7680 (/4 1920)
>[295333.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3076220]
>[295333.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3076220] width 1920 pitch 7680 (/4 1920)
>[295333.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969340]
>[295333.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969340] width 1920 pitch 7680 (/4 1920)
>[295335.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4b9c0]
>[295335.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4b9c0] width 1920 pitch 7680 (/4 1920)
>[295350.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d186f0]
>[295350.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d186f0] width 1920 pitch 7680 (/4 1920)
>[295365.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a360]
>[295365.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a360] width 1920 pitch 7680 (/4 1920)
>[295380.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295380.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295395.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e2c0]
>[295395.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e2c0] width 1920 pitch 7680 (/4 1920)
>[295409.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fab20]
>[295409.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fab20] width 1920 pitch 7680 (/4 1920)
>[295409.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295409.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295409.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295409.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295409.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295409.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295409.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295409.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295409.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295409.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295409.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295409.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295409.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295409.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295409.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295409.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295409.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295409.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295410.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295410.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295410.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295410.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295410.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295410.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295410.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295410.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295410.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295410.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295410.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fab20]
>[295410.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fab20] width 1920 pitch 7680 (/4 1920)
>[295410.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295410.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295410.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fab20]
>[295411.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fab20] width 1920 pitch 7680 (/4 1920)
>[295411.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295411.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295411.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fab20]
>[295411.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fab20] width 1920 pitch 7680 (/4 1920)
>[295411.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295411.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295411.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fab20]
>[295411.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fab20] width 1920 pitch 7680 (/4 1920)
>[295411.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295411.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295425.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a8f70]
>[295425.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a8f70] width 1920 pitch 7680 (/4 1920)
>[295440.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295440.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295455.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295455.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295459.008] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[295459.008] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[295459.008] (II) UnloadModule: "evdev"
>[295470.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e2c0]
>[295470.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e2c0] width 1920 pitch 7680 (/4 1920)
>[295481.536] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[295481.536] (II) No input driver specified, ignoring this device.
>[295481.536] (II) This device may have been added with another device file.
>[295481.536] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[295481.536] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[295481.536] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[295481.536] 	Option "XkbRules" "evdev"
>[295481.536] 	Option "XkbModel" "evdev"
>[295481.536] 	Option "XkbLayout" "us"
>[295481.536] 	Option "_source" "server/udev"
>[295481.536] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[295481.536] 	Option "path" "/dev/input/event14"
>[295481.536] 	Option "device" "/dev/input/event14"
>[295481.536] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input47/event14"
>[295481.536] 	Option "driver" "evdev"
>[295481.536] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[295481.537] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[295481.537] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[295481.537] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[295481.537] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[295481.537] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[295481.537] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[295481.537] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[295481.537] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[295481.537] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[295481.537] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[295481.537] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input47/event14"
>[295481.537] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[295481.537] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[295481.537] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[295481.537] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[295481.537] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[295481.537] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[295485.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a8f70]
>[295485.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a8f70] width 1920 pitch 7680 (/4 1920)
>[295500.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295500.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295515.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310aaa0]
>[295515.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310aaa0] width 1920 pitch 7680 (/4 1920)
>[295530.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a8f70]
>[295530.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a8f70] width 1920 pitch 7680 (/4 1920)
>[295545.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3d2f0]
>[295545.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3d2f0] width 1920 pitch 7680 (/4 1920)
>[295560.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a360]
>[295560.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a360] width 1920 pitch 7680 (/4 1920)
>[295570.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295570.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295571.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9ebc0]
>[295571.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9ebc0] width 1920 pitch 7680 (/4 1920)
>[295571.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a360]
>[295571.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a360] width 1920 pitch 7680 (/4 1920)
>[295572.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9ebc0]
>[295572.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9ebc0] width 1920 pitch 7680 (/4 1920)
>[295573.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a439c0]
>[295573.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a439c0] width 1920 pitch 7680 (/4 1920)
>[295574.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295574.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295574.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae610]
>[295574.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae610] width 1920 pitch 7680 (/4 1920)
>[295582.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295582.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295582.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295582.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295582.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295582.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295582.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295582.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295582.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295582.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295582.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295582.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295582.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295582.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295582.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295583.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295583.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295583.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295583.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295583.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295583.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295583.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295583.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295583.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295584.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae650]
>[295584.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae650] width 1920 pitch 7680 (/4 1920)
>[295584.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295584.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295584.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295584.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295584.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295584.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295584.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295584.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295584.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4070]
>[295584.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4070] width 1920 pitch 7680 (/4 1920)
>[295584.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295584.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295584.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4070]
>[295584.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4070] width 1920 pitch 7680 (/4 1920)
>[295584.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295584.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295586.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4070]
>[295586.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4070] width 1920 pitch 7680 (/4 1920)
>[295587.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01100]
>[295587.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01100] width 1920 pitch 7680 (/4 1920)
>[295587.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01100]
>[295587.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01100] width 1920 pitch 7680 (/4 1920)
>[295587.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295587.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295597.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295597.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295598.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295598.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295598.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295598.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295598.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295598.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295598.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295598.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295598.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295598.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295598.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295598.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295598.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295598.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295605.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295605.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295605.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e020]
>[295605.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e020] width 1920 pitch 7680 (/4 1920)
>[295606.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295606.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295606.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295606.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295606.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933730]
>[295606.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933730] width 1920 pitch 7680 (/4 1920)
>[295607.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295607.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295607.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8bd0]
>[295607.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8bd0] width 1920 pitch 7680 (/4 1920)
>[295607.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e020]
>[295607.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e020] width 1920 pitch 7680 (/4 1920)
>[295607.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295607.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295610.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295610.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295610.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295610.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295610.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d55e90]
>[295610.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d55e90] width 1920 pitch 7680 (/4 1920)
>[295611.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933730]
>[295611.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933730] width 1920 pitch 7680 (/4 1920)
>[295611.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933730]
>[295611.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933730] width 1920 pitch 7680 (/4 1920)
>[295611.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295611.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295611.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295611.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295611.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6e020]
>[295611.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6e020] width 1920 pitch 7680 (/4 1920)
>[295615.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af1a80]
>[295615.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af1a80] width 1920 pitch 7680 (/4 1920)
>[295615.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295615.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295615.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933730]
>[295615.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933730] width 1920 pitch 7680 (/4 1920)
>[295615.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295615.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295616.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295616.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295616.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933730]
>[295616.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933730] width 1920 pitch 7680 (/4 1920)
>[295616.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028450]
>[295616.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028450] width 1920 pitch 7680 (/4 1920)
>[295616.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc0320]
>[295616.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc0320] width 1920 pitch 7680 (/4 1920)
>[295620.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1e60]
>[295620.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1e60] width 1920 pitch 7680 (/4 1920)
>[295665.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2484cd0]
>[295665.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2484cd0] width 1920 pitch 7680 (/4 1920)
>[295695.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f3e780]
>[295695.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f3e780] width 1920 pitch 7680 (/4 1920)
>[295875.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f41a50]
>[295875.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f41a50] width 1920 pitch 7680 (/4 1920)
>[295890.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9d450]
>[295890.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9d450] width 1920 pitch 7680 (/4 1920)
>[295895.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9d70]
>[295895.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9d70] width 1920 pitch 7680 (/4 1920)
>[295896.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4aaf0]
>[295896.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4aaf0] width 1920 pitch 7680 (/4 1920)
>[295896.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc590]
>[295896.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc590] width 1920 pitch 7680 (/4 1920)
>[295896.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ac00]
>[295896.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ac00] width 1920 pitch 7680 (/4 1920)
>[295897.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a68d90]
>[295897.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a68d90] width 1920 pitch 7680 (/4 1920)
>[295920.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ac00]
>[295920.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ac00] width 1920 pitch 7680 (/4 1920)
>[295965.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a36bc0]
>[295965.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a36bc0] width 1920 pitch 7680 (/4 1920)
>[295971.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4ac00]
>[295971.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4ac00] width 1920 pitch 7680 (/4 1920)
>[295971.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe8e0]
>[295971.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe8e0] width 1920 pitch 7680 (/4 1920)
>[295971.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fcca0]
>[295971.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fcca0] width 1920 pitch 7680 (/4 1920)
>[295971.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fcc20]
>[295971.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fcc20] width 1920 pitch 7680 (/4 1920)
>[295979.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165fa0]
>[295979.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165fa0] width 1920 pitch 7680 (/4 1920)
>[295979.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4cf80]
>[295979.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4cf80] width 1920 pitch 7680 (/4 1920)
>[295979.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097b40]
>[295979.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097b40] width 1920 pitch 7680 (/4 1920)
>[295980.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4cfe0]
>[295980.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4cfe0] width 1920 pitch 7680 (/4 1920)
>[295980.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53142f0]
>[295980.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53142f0] width 1920 pitch 7680 (/4 1920)
>[296025.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166000]
>[296025.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166000] width 1920 pitch 7680 (/4 1920)
>[296040.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d17840]
>[296040.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d17840] width 1920 pitch 7680 (/4 1920)
>[296042.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d71580]
>[296042.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d71580] width 1920 pitch 7680 (/4 1920)
>[296042.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4d960]
>[296042.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4d960] width 1920 pitch 7680 (/4 1920)
>[296042.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5368460]
>[296042.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5368460] width 1920 pitch 7680 (/4 1920)
>[296042.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4d960]
>[296042.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4d960] width 1920 pitch 7680 (/4 1920)
>[296055.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1ac0]
>[296055.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1ac0] width 1920 pitch 7680 (/4 1920)
>[296070.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccf110]
>[296070.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccf110] width 1920 pitch 7680 (/4 1920)
>[296082.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe8a0]
>[296082.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe8a0] width 1920 pitch 7680 (/4 1920)
>[296082.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d826a0]
>[296082.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d826a0] width 1920 pitch 7680 (/4 1920)
>[296082.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1ac0]
>[296082.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1ac0] width 1920 pitch 7680 (/4 1920)
>[296082.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d826a0]
>[296082.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d826a0] width 1920 pitch 7680 (/4 1920)
>[296100.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd7ec0]
>[296100.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd7ec0] width 1920 pitch 7680 (/4 1920)
>[296115.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53677f0]
>[296115.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53677f0] width 1920 pitch 7680 (/4 1920)
>[296119.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a0f30]
>[296119.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a0f30] width 1920 pitch 7680 (/4 1920)
>[296119.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096f30]
>[296119.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096f30] width 1920 pitch 7680 (/4 1920)
>[296119.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe2d0]
>[296119.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe2d0] width 1920 pitch 7680 (/4 1920)
>[296119.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096f30]
>[296119.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096f30] width 1920 pitch 7680 (/4 1920)
>[296144.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f41d50]
>[296144.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f41d50] width 1920 pitch 7680 (/4 1920)
>[296144.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a590]
>[296144.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a590] width 1920 pitch 7680 (/4 1920)
>[296144.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f41d50]
>[296144.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f41d50] width 1920 pitch 7680 (/4 1920)
>[296144.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301d490]
>[296144.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301d490] width 1920 pitch 7680 (/4 1920)
>[296177.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d17800]
>[296177.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d17800] width 1920 pitch 7680 (/4 1920)
>[296177.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97e10]
>[296177.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97e10] width 1920 pitch 7680 (/4 1920)
>[296177.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2b5d0]
>[296177.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2b5d0] width 1920 pitch 7680 (/4 1920)
>[296177.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97e10]
>[296177.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97e10] width 1920 pitch 7680 (/4 1920)
>[296190.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f41d10]
>[296190.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f41d10] width 1920 pitch 7680 (/4 1920)
>[296205.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69940]
>[296205.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69940] width 1920 pitch 7680 (/4 1920)
>[296213.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fcc20]
>[296213.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fcc20] width 1920 pitch 7680 (/4 1920)
>[296213.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83de0]
>[296213.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83de0] width 1920 pitch 7680 (/4 1920)
>[296213.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff360]
>[296213.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff360] width 1920 pitch 7680 (/4 1920)
>[296213.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83de0]
>[296214.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83de0] width 1920 pitch 7680 (/4 1920)
>[296231.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296231.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296231.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296231.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296231.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296231.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296231.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296231.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296231.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296231.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296231.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296231.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296231.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296231.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296231.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296232.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296232.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296232.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296232.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296232.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296232.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296232.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296232.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296232.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296232.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296232.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296232.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296232.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296232.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a41550]
>[296232.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a41550] width 1920 pitch 7680 (/4 1920)
>[296232.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69df0]
>[296232.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69df0] width 1920 pitch 7680 (/4 1920)
>[296236.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[296236.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[296236.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296236.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296236.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff760]
>[296236.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff760] width 1920 pitch 7680 (/4 1920)
>[296236.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296236.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296236.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff760]
>[296237.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff760] width 1920 pitch 7680 (/4 1920)
>[296237.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296237.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296237.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff760]
>[296237.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff760] width 1920 pitch 7680 (/4 1920)
>[296237.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296237.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296237.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf7b0]
>[296237.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf7b0] width 1920 pitch 7680 (/4 1920)
>[296237.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296237.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296237.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf7b0]
>[296237.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf7b0] width 1920 pitch 7680 (/4 1920)
>[296237.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296237.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296237.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf7b0]
>[296237.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf7b0] width 1920 pitch 7680 (/4 1920)
>[296237.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296237.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296237.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf7b0]
>[296237.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf7b0] width 1920 pitch 7680 (/4 1920)
>[296237.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e50]
>[296237.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e50] width 1920 pitch 7680 (/4 1920)
>[296237.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[296237.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[296237.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473f70]
>[296237.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473f70] width 1920 pitch 7680 (/4 1920)
>[296237.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475830]
>[296237.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475830] width 1920 pitch 7680 (/4 1920)
>[296237.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbf7b0]
>[296237.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbf7b0] width 1920 pitch 7680 (/4 1920)
>[296237.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473c90]
>[296237.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473c90] width 1920 pitch 7680 (/4 1920)
>[296237.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296237.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473c90]
>[296237.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473c90] width 1920 pitch 7680 (/4 1920)
>[296237.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296237.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473c90]
>[296237.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473c90] width 1920 pitch 7680 (/4 1920)
>[296237.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296237.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473c90]
>[296237.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473c90] width 1920 pitch 7680 (/4 1920)
>[296237.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296237.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473c90]
>[296237.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473c90] width 1920 pitch 7680 (/4 1920)
>[296237.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296237.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473c90]
>[296237.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473c90] width 1920 pitch 7680 (/4 1920)
>[296237.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296237.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296237.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296261.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcebe0]
>[296261.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcebe0] width 1920 pitch 7680 (/4 1920)
>[296261.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296261.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296261.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296261.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296261.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296261.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296261.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296261.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296261.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296261.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296261.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296261.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296261.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296261.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296262.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296262.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296262.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296262.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296262.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296262.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296262.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296262.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296262.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296262.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296263.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473150]
>[296263.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473150] width 1920 pitch 7680 (/4 1920)
>[296263.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296263.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296263.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296263.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296263.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd99f0]
>[296263.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd99f0] width 1920 pitch 7680 (/4 1920)
>[296263.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296263.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296263.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd99f0]
>[296263.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd99f0] width 1920 pitch 7680 (/4 1920)
>[296263.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296263.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296263.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd99f0]
>[296263.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd99f0] width 1920 pitch 7680 (/4 1920)
>[296268.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296268.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296268.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296268.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296268.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296268.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296268.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296268.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296268.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296268.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296268.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296268.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296268.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296268.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296268.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[296268.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[296268.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4028e20]
>[296268.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4028e20] width 1920 pitch 7680 (/4 1920)
>[296269.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9ec50]
>[296269.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9ec50] width 1920 pitch 7680 (/4 1920)
>[296269.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac40e0]
>[296269.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac40e0] width 1920 pitch 7680 (/4 1920)
>[296269.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46b30]
>[296269.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46b30] width 1920 pitch 7680 (/4 1920)
>[296269.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30be700]
>[296269.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30be700] width 1920 pitch 7680 (/4 1920)
>[296269.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35ff0]
>[296269.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35ff0] width 1920 pitch 7680 (/4 1920)
>[296269.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a36070]
>[296269.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a36070] width 1920 pitch 7680 (/4 1920)
>[296269.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9efd0]
>[296269.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9efd0] width 1920 pitch 7680 (/4 1920)
>[296269.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35ff0]
>[296269.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35ff0] width 1920 pitch 7680 (/4 1920)
>[296269.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9efd0]
>[296269.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9efd0] width 1920 pitch 7680 (/4 1920)
>[296269.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a35ff0]
>[296269.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a35ff0] width 1920 pitch 7680 (/4 1920)
>[296269.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9efd0]
>[296269.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9efd0] width 1920 pitch 7680 (/4 1920)
>[296269.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69e80]
>[296270.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69e80] width 1920 pitch 7680 (/4 1920)
>[296276.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25186d0]
>[296276.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25186d0] width 1920 pitch 7680 (/4 1920)
>[296279.942] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[296279.942] (II) RADEON(0): Using hsync ranges from config file
>[296279.942] (II) RADEON(0): Using vrefresh ranges from config file
>[296279.942] (II) RADEON(0): Printing DDC gathered Modelines:
>[296279.942] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[296279.942] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[296279.942] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[296279.942] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[296279.942] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[296279.942] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[296279.942] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[296279.942] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[296279.942] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[296279.942] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[296279.942] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[296279.942] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[296279.943] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[296279.943] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[296279.991] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[296279.991] (II) RADEON(0): Using hsync ranges from config file
>[296279.991] (II) RADEON(0): Using vrefresh ranges from config file
>[296279.991] (II) RADEON(0): Printing DDC gathered Modelines:
>[296279.991] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[296279.991] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[296279.991] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[296279.991] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[296279.991] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[296279.991] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[296279.991] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[296279.991] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[296279.991] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[296279.991] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[296279.991] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[296279.991] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[296280.036] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[296280.036] (II) RADEON(0): Using hsync ranges from config file
>[296280.036] (II) RADEON(0): Using vrefresh ranges from config file
>[296280.036] (II) RADEON(0): Printing DDC gathered Modelines:
>[296280.036] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[296280.036] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[296280.036] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[296280.036] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[296280.036] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[296280.036] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[296280.036] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[296280.036] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[296280.036] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[296280.036] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[296280.036] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[296280.036] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[296295.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296295.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296296.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296296.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296310.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9940]
>[296310.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9940] width 1920 pitch 7680 (/4 1920)
>[296325.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9940]
>[296325.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9940] width 1920 pitch 7680 (/4 1920)
>[296355.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8bf90]
>[296355.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8bf90] width 1920 pitch 7680 (/4 1920)
>[296370.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8bf90]
>[296370.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8bf90] width 1920 pitch 7680 (/4 1920)
>[296430.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9940]
>[296430.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9940] width 1920 pitch 7680 (/4 1920)
>[296445.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296445.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296460.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd9900]
>[296460.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd9900] width 1920 pitch 7680 (/4 1920)
>[296475.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296475.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296610.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d17510]
>[296610.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d17510] width 1920 pitch 7680 (/4 1920)
>[296640.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8bf90]
>[296640.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8bf90] width 1920 pitch 7680 (/4 1920)
>[296685.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8bf90]
>[296685.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8bf90] width 1920 pitch 7680 (/4 1920)
>[296700.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8bf90]
>[296700.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8bf90] width 1920 pitch 7680 (/4 1920)
>[296715.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296715.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296745.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab3740]
>[296745.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab3740] width 1920 pitch 7680 (/4 1920)
>[296760.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296760.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296775.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296775.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296790.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab3740]
>[296790.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab3740] width 1920 pitch 7680 (/4 1920)
>[296850.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fdf00]
>[296850.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fdf00] width 1920 pitch 7680 (/4 1920)
>[296865.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296865.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296895.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fdf00]
>[296895.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fdf00] width 1920 pitch 7680 (/4 1920)
>[296910.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296910.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296925.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[296925.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[296940.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[296940.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[296955.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe8d0]
>[296955.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe8d0] width 1920 pitch 7680 (/4 1920)
>[296970.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe8d0]
>[296970.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe8d0] width 1920 pitch 7680 (/4 1920)
>[296985.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[296985.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297000.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297000.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297015.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe8d0]
>[297015.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe8d0] width 1920 pitch 7680 (/4 1920)
>[297045.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297045.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297090.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe8d0]
>[297090.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe8d0] width 1920 pitch 7680 (/4 1920)
>[297105.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297105.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297120.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297120.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297135.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297135.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297150.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297150.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297165.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297165.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297195.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe910]
>[297195.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe910] width 1920 pitch 7680 (/4 1920)
>[297210.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297210.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297225.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297225.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297240.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe910]
>[297240.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe910] width 1920 pitch 7680 (/4 1920)
>[297255.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe910]
>[297255.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe910] width 1920 pitch 7680 (/4 1920)
>[297270.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297270.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297285.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297285.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297300.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297300.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297315.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297315.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297360.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297360.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297375.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297375.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297465.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297465.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297480.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69250]
>[297480.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69250] width 1920 pitch 7680 (/4 1920)
>[297495.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69250]
>[297495.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69250] width 1920 pitch 7680 (/4 1920)
>[297510.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69250]
>[297510.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69250] width 1920 pitch 7680 (/4 1920)
>[297525.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c691f0]
>[297525.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c691f0] width 1920 pitch 7680 (/4 1920)
>[297540.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe910]
>[297540.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe910] width 1920 pitch 7680 (/4 1920)
>[297570.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297570.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297615.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19480]
>[297615.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19480] width 1920 pitch 7680 (/4 1920)
>[297660.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe8d0]
>[297660.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe8d0] width 1920 pitch 7680 (/4 1920)
>[297690.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297690.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297705.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297705.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297735.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297735.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297750.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297750.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297765.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297765.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297780.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297780.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297795.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297795.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297810.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[297810.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[297825.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297825.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297855.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297855.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297900.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe3f0]
>[297900.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe3f0] width 1920 pitch 7680 (/4 1920)
>[297915.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297915.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297945.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fae6b0]
>[297945.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fae6b0] width 1920 pitch 7680 (/4 1920)
>[297960.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe3f0]
>[297960.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe3f0] width 1920 pitch 7680 (/4 1920)
>[297975.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe3f0]
>[297975.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe3f0] width 1920 pitch 7680 (/4 1920)
>[298005.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19480]
>[298005.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19480] width 1920 pitch 7680 (/4 1920)
>[298020.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[298020.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[298035.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d17510]
>[298035.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d17510] width 1920 pitch 7680 (/4 1920)
>[298080.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d17510]
>[298080.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d17510] width 1920 pitch 7680 (/4 1920)
>[298095.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[298095.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[298110.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[298110.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[298155.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[298155.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[298170.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298170.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298185.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298185.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298275.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[298275.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[298290.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[298290.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[298305.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298305.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298335.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[298335.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[298410.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298410.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298425.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298425.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298440.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298440.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298455.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[298455.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[298470.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298470.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298500.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298500.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298515.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[298515.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[298545.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[298545.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[298575.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[298575.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[298590.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298590.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298605.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[298605.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[298620.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[298620.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[298635.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[298635.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[298650.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[298650.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[298665.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[298665.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[298680.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[298680.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[298695.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[298695.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[298725.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[298725.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[298785.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298785.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298830.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298830.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298965.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298965.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298980.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[298980.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[298995.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[298995.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[299010.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[299010.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[299040.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[299040.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[299070.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[299070.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[299085.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[299085.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[299100.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[299100.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[299235.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[299235.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[299280.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[299280.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[299310.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[299310.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[299325.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[299325.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[299340.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[299340.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[299355.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[299355.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[299370.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[299370.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[299385.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[299385.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[299415.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[299415.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[299430.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[299430.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[299445.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[299445.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[299460.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[299460.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[299475.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[299475.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[299490.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[299490.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[299520.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[299520.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[299625.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[299625.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[299640.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[299640.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[299655.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[299655.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[299730.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[299730.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[299745.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[299745.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[299775.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[299775.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[299790.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[299790.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[299805.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[299805.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[299820.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[299820.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[299925.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[299925.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[299940.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[299940.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300015.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300015.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300045.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22230]
>[300045.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22230] width 1920 pitch 7680 (/4 1920)
>[300150.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[300150.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[300165.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300165.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300195.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[300195.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[300210.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[300210.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[300225.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[300225.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[300285.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[300285.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[300315.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396d160]
>[300315.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396d160] width 1920 pitch 7680 (/4 1920)
>[300375.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33260]
>[300375.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33260] width 1920 pitch 7680 (/4 1920)
>[300390.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[300390.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[300405.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e8530]
>[300405.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e8530] width 1920 pitch 7680 (/4 1920)
>[300420.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254fc10]
>[300420.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254fc10] width 1920 pitch 7680 (/4 1920)
>[300428.494] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[300428.494] (II) RADEON(0): Using hsync ranges from config file
>[300428.494] (II) RADEON(0): Using vrefresh ranges from config file
>[300428.494] (II) RADEON(0): Printing DDC gathered Modelines:
>[300428.494] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[300428.494] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[300428.494] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[300428.494] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[300428.494] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[300428.494] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[300428.494] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[300428.494] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[300428.494] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[300428.494] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[300428.494] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[300428.494] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[300428.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[300428.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[300428.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[300428.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[300428.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[300428.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[300428.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2475f90]
>[300428.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2475f90] width 1920 pitch 7680 (/4 1920)
>[300428.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300428.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300428.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300428.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300428.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300428.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300428.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a560]
>[300428.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a560] width 1920 pitch 7680 (/4 1920)
>[300428.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300428.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300428.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300428.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300429.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabf50]
>[300429.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabf50] width 1920 pitch 7680 (/4 1920)
>[300429.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300429.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300430.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f884e0]
>[300430.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f884e0] width 1920 pitch 7680 (/4 1920)
>[300432.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46f40]
>[300432.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46f40] width 1920 pitch 7680 (/4 1920)
>[300432.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[300432.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[300432.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46f40]
>[300432.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46f40] width 1920 pitch 7680 (/4 1920)
>[300432.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1ec0]
>[300432.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1ec0] width 1920 pitch 7680 (/4 1920)
>[300433.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46f40]
>[300433.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46f40] width 1920 pitch 7680 (/4 1920)
>[300434.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[300434.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[300434.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300434.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300434.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300434.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300434.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300434.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300434.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300434.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300434.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300434.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300434.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300434.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300434.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300434.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300434.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300434.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300434.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300434.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300434.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300434.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300434.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300434.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300435.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300435.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300435.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300435.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300435.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300435.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300436.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300436.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300436.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300436.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300436.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300436.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300436.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300436.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300436.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300436.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300436.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300436.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300436.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300436.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300436.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300436.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300436.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300436.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300437.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300437.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300437.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300437.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300437.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300437.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300437.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300437.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300437.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300437.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300437.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300437.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300437.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300437.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300437.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c37000]
>[300437.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c37000] width 1920 pitch 7680 (/4 1920)
>[300437.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4000f80]
>[300437.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4000f80] width 1920 pitch 7680 (/4 1920)
>[300438.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300438.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300438.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300438.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80580]
>[300438.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80580] width 1920 pitch 7680 (/4 1920)
>[300439.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a030]
>[300439.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a030] width 1920 pitch 7680 (/4 1920)
>[300439.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161780]
>[300439.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161780] width 1920 pitch 7680 (/4 1920)
>[300439.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76f70]
>[300439.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76f70] width 1920 pitch 7680 (/4 1920)
>[300439.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161780]
>[300439.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161780] width 1920 pitch 7680 (/4 1920)
>[300439.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb4840]
>[300439.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb4840] width 1920 pitch 7680 (/4 1920)
>[300439.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161780]
>[300439.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161780] width 1920 pitch 7680 (/4 1920)
>[300439.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a355c0]
>[300439.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a355c0] width 1920 pitch 7680 (/4 1920)
>[300439.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81910]
>[300439.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81910] width 1920 pitch 7680 (/4 1920)
>[300439.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5a90]
>[300439.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5a90] width 1920 pitch 7680 (/4 1920)
>[300439.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81910]
>[300439.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81910] width 1920 pitch 7680 (/4 1920)
>[300439.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81910]
>[300439.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81910] width 1920 pitch 7680 (/4 1920)
>[300439.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[300439.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[300439.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[300439.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[300439.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[300440.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[300440.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a355c0]
>[300440.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a355c0] width 1920 pitch 7680 (/4 1920)
>[300440.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[300440.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[300440.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a355c0]
>[300440.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a355c0] width 1920 pitch 7680 (/4 1920)
>[300440.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3906930]
>[300440.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3906930] width 1920 pitch 7680 (/4 1920)
>[300450.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e81910]
>[300450.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e81910] width 1920 pitch 7680 (/4 1920)
>[300465.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a355c0]
>[300465.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a355c0] width 1920 pitch 7680 (/4 1920)
>[300489.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c1e0]
>[300489.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c1e0] width 1920 pitch 7680 (/4 1920)
>[300489.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[300489.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[300489.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c1e0]
>[300489.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c1e0] width 1920 pitch 7680 (/4 1920)
>[300489.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[300489.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[300489.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c1e0]
>[300489.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c1e0] width 1920 pitch 7680 (/4 1920)
>[300489.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[300489.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[300489.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c5110]
>[300489.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c5110] width 1920 pitch 7680 (/4 1920)
>[300489.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1020]
>[300489.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1020] width 1920 pitch 7680 (/4 1920)
>[300489.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a8160]
>[300489.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a8160] width 1920 pitch 7680 (/4 1920)
>[300489.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de9c50]
>[300489.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de9c50] width 1920 pitch 7680 (/4 1920)
>[300489.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[300489.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[300489.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de9c50]
>[300489.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de9c50] width 1920 pitch 7680 (/4 1920)
>[300489.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[300489.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[300489.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de9c50]
>[300489.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de9c50] width 1920 pitch 7680 (/4 1920)
>[300489.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390ca50]
>[300489.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390ca50] width 1920 pitch 7680 (/4 1920)
>[300489.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bea0]
>[300489.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bea0] width 1920 pitch 7680 (/4 1920)
>[300489.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69b40]
>[300489.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69b40] width 1920 pitch 7680 (/4 1920)
>[300489.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bea0]
>[300489.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bea0] width 1920 pitch 7680 (/4 1920)
>[300489.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d69b40]
>[300490.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d69b40] width 1920 pitch 7680 (/4 1920)
>[300490.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[300490.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[300490.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13a70]
>[300490.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13a70] width 1920 pitch 7680 (/4 1920)
>[300490.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[300490.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[300490.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13a70]
>[300490.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13a70] width 1920 pitch 7680 (/4 1920)
>[300490.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[300490.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[300490.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13a70]
>[300490.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13a70] width 1920 pitch 7680 (/4 1920)
>[300490.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[300490.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[300490.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13a70]
>[300490.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13a70] width 1920 pitch 7680 (/4 1920)
>[300490.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[300490.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[300490.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f13a70]
>[300490.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f13a70] width 1920 pitch 7680 (/4 1920)
>[300490.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[300490.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[300555.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea0270]
>[300555.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea0270] width 1920 pitch 7680 (/4 1920)
>[300570.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca30f0]
>[300570.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca30f0] width 1920 pitch 7680 (/4 1920)
>[300675.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93cc0]
>[300675.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93cc0] width 1920 pitch 7680 (/4 1920)
>[300705.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4f390]
>[300705.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4f390] width 1920 pitch 7680 (/4 1920)
>[300773.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300773.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300773.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300773.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300773.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300774.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300774.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300774.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300774.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300774.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300774.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300774.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300774.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300775.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1a260]
>[300775.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1a260] width 1920 pitch 7680 (/4 1920)
>[300775.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[300775.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[300825.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb9160]
>[300825.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb9160] width 1920 pitch 7680 (/4 1920)
>[300840.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3933580]
>[300840.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3933580] width 1920 pitch 7680 (/4 1920)
>[300855.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcb390]
>[300855.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcb390] width 1920 pitch 7680 (/4 1920)
>[300870.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc80d0]
>[300870.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc80d0] width 1920 pitch 7680 (/4 1920)
>[300900.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[300900.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[300915.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a148d0]
>[300915.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a148d0] width 1920 pitch 7680 (/4 1920)
>[300930.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c41de0]
>[300930.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c41de0] width 1920 pitch 7680 (/4 1920)
>[300945.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f20410]
>[300945.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f20410] width 1920 pitch 7680 (/4 1920)
>[301005.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd0800]
>[301005.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd0800] width 1920 pitch 7680 (/4 1920)
>[301020.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87950]
>[301020.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87950] width 1920 pitch 7680 (/4 1920)
>[301035.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec5600]
>[301035.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec5600] width 1920 pitch 7680 (/4 1920)
>[301050.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de5cf0]
>[301050.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de5cf0] width 1920 pitch 7680 (/4 1920)
>[301065.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49980]
>[301065.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49980] width 1920 pitch 7680 (/4 1920)
>[301095.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d086b0]
>[301095.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d086b0] width 1920 pitch 7680 (/4 1920)
>[301110.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f840]
>[301110.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f840] width 1920 pitch 7680 (/4 1920)
>[301155.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9e630]
>[301155.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9e630] width 1920 pitch 7680 (/4 1920)
>[301170.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[301170.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[301225.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e3f0]
>[301225.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e3f0] width 1920 pitch 7680 (/4 1920)
>[301225.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301225.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301225.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcc100]
>[301225.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcc100] width 1920 pitch 7680 (/4 1920)
>[301226.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301226.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301226.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301226.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301226.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301227.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301227.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301227.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301227.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301227.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301227.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301227.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301227.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301227.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301227.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301227.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301227.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301227.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301227.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301227.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301227.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301227.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301227.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301227.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301227.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301227.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301227.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301227.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301228.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301228.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301228.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301228.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301228.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301228.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301228.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301228.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301228.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301228.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea60]
>[301228.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea60] width 1920 pitch 7680 (/4 1920)
>[301228.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[301228.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[301260.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479b50]
>[301260.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479b50] width 1920 pitch 7680 (/4 1920)
>[301275.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250da90]
>[301275.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250da90] width 1920 pitch 7680 (/4 1920)
>[301305.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a9b80]
>[301305.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a9b80] width 1920 pitch 7680 (/4 1920)
>[301320.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2479b50]
>[301320.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2479b50] width 1920 pitch 7680 (/4 1920)
>[301410.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c85310]
>[301410.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c85310] width 1920 pitch 7680 (/4 1920)
>[301425.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04320]
>[301425.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04320] width 1920 pitch 7680 (/4 1920)
>[301455.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04320]
>[301455.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04320] width 1920 pitch 7680 (/4 1920)
>[301470.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[301470.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[301575.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04320]
>[301575.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04320] width 1920 pitch 7680 (/4 1920)
>[301605.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[301605.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[301650.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04320]
>[301650.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04320] width 1920 pitch 7680 (/4 1920)
>[301680.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[301680.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[301710.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04320]
>[301710.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04320] width 1920 pitch 7680 (/4 1920)
>[301725.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[301725.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[301875.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04320]
>[301875.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04320] width 1920 pitch 7680 (/4 1920)
>[301890.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[301890.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[301912.479] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[301912.479] (II) RADEON(0): Using hsync ranges from config file
>[301912.479] (II) RADEON(0): Using vrefresh ranges from config file
>[301912.479] (II) RADEON(0): Printing DDC gathered Modelines:
>[301912.479] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[301912.479] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[301912.479] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[301912.479] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[301912.479] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[301912.479] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[301912.479] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[301912.479] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[301912.479] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[301912.479] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[301912.479] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[301912.479] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[302002.673] (II) RADEON(0): RADEONSaveScreen(2)
>[302002.673] (II) RADEON(0): RADEONSaveScreen(0)
>[302955.631] (II) RADEON(0): RADEONSaveScreen(1)
>[302955.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[302955.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[302966.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b70da0]
>[302966.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b70da0] width 1920 pitch 7680 (/4 1920)
>[302968.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[302968.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[302968.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4abf0]
>[302968.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4abf0] width 1920 pitch 7680 (/4 1920)
>[302968.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[302968.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[302971.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[302971.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[302971.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f57be0]
>[302971.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f57be0] width 1920 pitch 7680 (/4 1920)
>[302971.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5a8d0]
>[302971.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5a8d0] width 1920 pitch 7680 (/4 1920)
>[302971.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e270a0]
>[302971.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e270a0] width 1920 pitch 7680 (/4 1920)
>[302971.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc20b0]
>[302971.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc20b0] width 1920 pitch 7680 (/4 1920)
>[302971.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f57be0]
>[302971.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f57be0] width 1920 pitch 7680 (/4 1920)
>[302972.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[302972.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[302972.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b055f0]
>[302972.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b055f0] width 1920 pitch 7680 (/4 1920)
>[302972.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[302972.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[302973.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4b470]
>[302973.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4b470] width 1920 pitch 7680 (/4 1920)
>[302987.671] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[302987.671] (II) RADEON(0): Using hsync ranges from config file
>[302987.671] (II) RADEON(0): Using vrefresh ranges from config file
>[302987.671] (II) RADEON(0): Printing DDC gathered Modelines:
>[302987.671] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[302987.671] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[302987.671] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[302987.671] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[302987.671] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[302987.671] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[302987.671] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[302987.671] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[302987.671] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[302987.671] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[302987.671] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[302987.671] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[302987.717] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[302987.717] (II) RADEON(0): Using hsync ranges from config file
>[302987.717] (II) RADEON(0): Using vrefresh ranges from config file
>[302987.717] (II) RADEON(0): Printing DDC gathered Modelines:
>[302987.717] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[302987.717] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[302987.717] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[302987.717] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[302987.717] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[302987.717] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[302987.717] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[302987.717] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[302987.717] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[302987.717] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[302987.717] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[302987.717] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[302987.760] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[302987.760] (II) RADEON(0): Using hsync ranges from config file
>[302987.760] (II) RADEON(0): Using vrefresh ranges from config file
>[302987.760] (II) RADEON(0): Printing DDC gathered Modelines:
>[302987.760] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[302987.760] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[302987.760] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[302987.760] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[302987.760] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[302987.760] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[302987.760] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[302987.760] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[302987.760] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[302987.760] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[302987.760] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[302987.760] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[302991.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114bf0]
>[302991.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114bf0] width 1920 pitch 7680 (/4 1920)
>[303030.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303030.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303045.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edb840]
>[303045.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edb840] width 1920 pitch 7680 (/4 1920)
>[303060.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[303060.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[303075.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303075.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303090.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303090.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303195.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86a30]
>[303195.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86a30] width 1920 pitch 7680 (/4 1920)
>[303225.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2410]
>[303225.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2410] width 1920 pitch 7680 (/4 1920)
>[303240.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee2410]
>[303240.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee2410] width 1920 pitch 7680 (/4 1920)
>[303255.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86a30]
>[303255.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86a30] width 1920 pitch 7680 (/4 1920)
>[303406.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303406.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303421.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e19c0]
>[303421.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e19c0] width 1920 pitch 7680 (/4 1920)
>[303436.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303436.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303451.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303451.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303481.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[303481.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[303496.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[303496.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[303526.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[303526.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[303556.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[303556.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[303586.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[303586.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[303601.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[303601.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[303616.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39406f0]
>[303616.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39406f0] width 1920 pitch 7680 (/4 1920)
>[303661.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49280]
>[303661.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49280] width 1920 pitch 7680 (/4 1920)
>[303676.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470770]
>[303676.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470770] width 1920 pitch 7680 (/4 1920)
>[303706.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5a30]
>[303706.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5a30] width 1920 pitch 7680 (/4 1920)
>[303751.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeea10]
>[303751.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeea10] width 1920 pitch 7680 (/4 1920)
>[303781.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeea10]
>[303781.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeea10] width 1920 pitch 7680 (/4 1920)
>[303796.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efdda0]
>[303796.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efdda0] width 1920 pitch 7680 (/4 1920)
>[303871.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3966ce0]
>[303871.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3966ce0] width 1920 pitch 7680 (/4 1920)
>[303886.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3966ce0]
>[303886.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3966ce0] width 1920 pitch 7680 (/4 1920)
>[303961.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0bda0]
>[303961.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0bda0] width 1920 pitch 7680 (/4 1920)
>[304006.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0bda0]
>[304006.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0bda0] width 1920 pitch 7680 (/4 1920)
>[304141.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63340]
>[304141.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63340] width 1920 pitch 7680 (/4 1920)
>[304156.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63340]
>[304156.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63340] width 1920 pitch 7680 (/4 1920)
>[304171.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3b40]
>[304171.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3b40] width 1920 pitch 7680 (/4 1920)
>[304186.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915f30]
>[304186.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915f30] width 1920 pitch 7680 (/4 1920)
>[304261.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c5d10]
>[304261.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c5d10] width 1920 pitch 7680 (/4 1920)
>[304276.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf420]
>[304276.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf420] width 1920 pitch 7680 (/4 1920)
>[304426.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930920]
>[304426.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930920] width 1920 pitch 7680 (/4 1920)
>[304441.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[304441.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[304456.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[304456.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[304486.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5a10]
>[304486.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5a10] width 1920 pitch 7680 (/4 1920)
>[304546.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3ec20]
>[304546.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3ec20] width 1920 pitch 7680 (/4 1920)
>[304561.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930920]
>[304561.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930920] width 1920 pitch 7680 (/4 1920)
>[304576.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930920]
>[304576.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930920] width 1920 pitch 7680 (/4 1920)
>[304591.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3930920]
>[304591.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3930920] width 1920 pitch 7680 (/4 1920)
>[304696.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[304696.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[304726.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d85c0]
>[304726.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d85c0] width 1920 pitch 7680 (/4 1920)
>[304741.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[304741.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[304771.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d85c0]
>[304771.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d85c0] width 1920 pitch 7680 (/4 1920)
>[304876.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5a10]
>[304876.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5a10] width 1920 pitch 7680 (/4 1920)
>[304891.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db5a10]
>[304891.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db5a10] width 1920 pitch 7680 (/4 1920)
>[305056.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[305056.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[305071.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d52b0]
>[305071.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d52b0] width 1920 pitch 7680 (/4 1920)
>[305086.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[305086.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[305101.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f3f0]
>[305101.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f3f0] width 1920 pitch 7680 (/4 1920)
>[305116.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94ee0]
>[305116.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94ee0] width 1920 pitch 7680 (/4 1920)
>[305131.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbff0]
>[305131.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbff0] width 1920 pitch 7680 (/4 1920)
>[305221.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953d70]
>[305221.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953d70] width 1920 pitch 7680 (/4 1920)
>[305236.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf740]
>[305236.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf740] width 1920 pitch 7680 (/4 1920)
>[305251.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953d70]
>[305251.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953d70] width 1920 pitch 7680 (/4 1920)
>[305266.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953d70]
>[305266.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953d70] width 1920 pitch 7680 (/4 1920)
>[305326.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11470]
>[305326.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11470] width 1920 pitch 7680 (/4 1920)
>[305341.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[305341.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[305371.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c27a0]
>[305371.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c27a0] width 1920 pitch 7680 (/4 1920)
>[305386.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953d70]
>[305386.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953d70] width 1920 pitch 7680 (/4 1920)
>[305431.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01ed0]
>[305431.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01ed0] width 1920 pitch 7680 (/4 1920)
>[305446.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39406f0]
>[305446.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39406f0] width 1920 pitch 7680 (/4 1920)
>[305581.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953d70]
>[305581.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953d70] width 1920 pitch 7680 (/4 1920)
>[305611.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953d70]
>[305611.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953d70] width 1920 pitch 7680 (/4 1920)
>[305626.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[305626.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[305641.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c7510]
>[305641.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c7510] width 1920 pitch 7680 (/4 1920)
>[305686.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[305686.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[305701.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[305701.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[305716.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[305716.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[305731.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[305731.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[305836.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38df800]
>[305836.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38df800] width 1920 pitch 7680 (/4 1920)
>[305851.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38df800]
>[305851.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38df800] width 1920 pitch 7680 (/4 1920)
>[305941.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94ec0]
>[305941.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94ec0] width 1920 pitch 7680 (/4 1920)
>[305956.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c5d0]
>[305956.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c5d0] width 1920 pitch 7680 (/4 1920)
>[305971.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd580]
>[305971.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd580] width 1920 pitch 7680 (/4 1920)
>[305986.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd580]
>[305986.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd580] width 1920 pitch 7680 (/4 1920)
>[306106.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd580]
>[306106.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd580] width 1920 pitch 7680 (/4 1920)
>[306121.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5ca90]
>[306121.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5ca90] width 1920 pitch 7680 (/4 1920)
>[306181.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940710]
>[306181.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940710] width 1920 pitch 7680 (/4 1920)
>[306196.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940710]
>[306196.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940710] width 1920 pitch 7680 (/4 1920)
>[306211.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[306211.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[306226.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940650]
>[306226.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940650] width 1920 pitch 7680 (/4 1920)
>[306301.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01290]
>[306301.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01290] width 1920 pitch 7680 (/4 1920)
>[306316.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb4210]
>[306316.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb4210] width 1920 pitch 7680 (/4 1920)
>[306331.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f01290]
>[306331.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f01290] width 1920 pitch 7680 (/4 1920)
>[306346.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16bc0]
>[306346.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16bc0] width 1920 pitch 7680 (/4 1920)
>[306361.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aeea10]
>[306361.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aeea10] width 1920 pitch 7680 (/4 1920)
>[306376.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114c30]
>[306376.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114c30] width 1920 pitch 7680 (/4 1920)
>[306466.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f3f0]
>[306466.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f3f0] width 1920 pitch 7680 (/4 1920)
>[306481.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[306481.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[306496.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f49f30]
>[306496.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f49f30] width 1920 pitch 7680 (/4 1920)
>[306511.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbff0]
>[306511.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbff0] width 1920 pitch 7680 (/4 1920)
>[306526.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca9810]
>[306526.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca9810] width 1920 pitch 7680 (/4 1920)
>[306541.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca9810]
>[306541.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca9810] width 1920 pitch 7680 (/4 1920)
>[306556.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3be1fb0]
>[306556.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3be1fb0] width 1920 pitch 7680 (/4 1920)
>[306601.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63340]
>[306601.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63340] width 1920 pitch 7680 (/4 1920)
>[306616.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d492a0]
>[306616.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d492a0] width 1920 pitch 7680 (/4 1920)
>[306631.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d63340]
>[306631.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d63340] width 1920 pitch 7680 (/4 1920)
>[306661.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce1d30]
>[306661.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce1d30] width 1920 pitch 7680 (/4 1920)
>[306691.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce1d30]
>[306691.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce1d30] width 1920 pitch 7680 (/4 1920)
>[306706.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a07d10]
>[306706.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a07d10] width 1920 pitch 7680 (/4 1920)
>[306736.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a07d10]
>[306736.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a07d10] width 1920 pitch 7680 (/4 1920)
>[306766.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11430]
>[306766.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11430] width 1920 pitch 7680 (/4 1920)
>[306781.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd5c0]
>[306781.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd5c0] width 1920 pitch 7680 (/4 1920)
>[306796.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11430]
>[306796.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11430] width 1920 pitch 7680 (/4 1920)
>[306811.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f11430]
>[306811.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f11430] width 1920 pitch 7680 (/4 1920)
>[306826.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[306826.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[306856.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f8680]
>[306856.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f8680] width 1920 pitch 7680 (/4 1920)
>[306871.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42300]
>[306871.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42300] width 1920 pitch 7680 (/4 1920)
>[306886.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42300]
>[306886.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42300] width 1920 pitch 7680 (/4 1920)
>[306916.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbcdc0]
>[306916.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbcdc0] width 1920 pitch 7680 (/4 1920)
>[306946.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42300]
>[306946.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42300] width 1920 pitch 7680 (/4 1920)
>[306958.029] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[306958.029] (II) RADEON(0): Using hsync ranges from config file
>[306958.029] (II) RADEON(0): Using vrefresh ranges from config file
>[306958.029] (II) RADEON(0): Printing DDC gathered Modelines:
>[306958.029] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[306958.029] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[306958.029] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[306958.029] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[306958.029] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[306958.029] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[306958.029] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[306958.029] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[306958.029] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[306958.029] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[306958.029] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[306958.029] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[306958.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e270a0]
>[306958.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e270a0] width 1920 pitch 7680 (/4 1920)
>[306961.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6ba80]
>[306961.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6ba80] width 1920 pitch 7680 (/4 1920)
>[306976.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f57be0]
>[306976.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f57be0] width 1920 pitch 7680 (/4 1920)
>[306999.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aba880]
>[306999.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aba880] width 1920 pitch 7680 (/4 1920)
>[307000.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[307000.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[307000.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecd330]
>[307000.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecd330] width 1920 pitch 7680 (/4 1920)
>[307000.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307000.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307000.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307000.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307000.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307000.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307000.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307000.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307000.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307000.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307001.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307001.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307001.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307001.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307001.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307001.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307001.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307001.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307001.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307001.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307001.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eef380]
>[307001.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eef380] width 1920 pitch 7680 (/4 1920)
>[307003.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[307003.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[307003.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307003.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307003.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307003.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307003.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307003.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307003.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[307003.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[307003.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b90]
>[307003.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b90] width 1920 pitch 7680 (/4 1920)
>[307005.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307005.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307005.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307005.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307005.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307006.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307006.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307006.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307006.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307006.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[307006.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[307006.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[307006.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[307006.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d0b0]
>[307006.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d0b0] width 1920 pitch 7680 (/4 1920)
>[307006.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[307006.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[307006.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[307006.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[307006.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[307006.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[307006.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[307006.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[307006.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[307006.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[307006.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[307006.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[307006.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[307006.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[307006.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[307006.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[307006.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[307006.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[307006.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[307006.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[307009.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307009.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307009.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307009.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307009.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307009.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307009.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307009.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307009.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307009.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307009.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307009.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307009.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307009.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307009.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307009.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307009.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307009.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307009.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307009.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307009.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307010.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307010.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307010.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307010.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307010.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307010.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f16950]
>[307010.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f16950] width 1920 pitch 7680 (/4 1920)
>[307010.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4e90]
>[307010.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4e90] width 1920 pitch 7680 (/4 1920)
>[307011.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[307011.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[307011.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c16a90]
>[307011.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c16a90] width 1920 pitch 7680 (/4 1920)
>[307011.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[307011.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[307011.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c16a90]
>[307011.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c16a90] width 1920 pitch 7680 (/4 1920)
>[307011.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d020]
>[307011.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d020] width 1920 pitch 7680 (/4 1920)
>[307011.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c16a90]
>[307011.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c16a90] width 1920 pitch 7680 (/4 1920)
>[307011.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebd7f0]
>[307011.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebd7f0] width 1920 pitch 7680 (/4 1920)
>[307011.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c16a90]
>[307011.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c16a90] width 1920 pitch 7680 (/4 1920)
>[307011.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f340]
>[307011.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f340] width 1920 pitch 7680 (/4 1920)
>[307011.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c661c0]
>[307011.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c661c0] width 1920 pitch 7680 (/4 1920)
>[307011.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f340]
>[307011.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f340] width 1920 pitch 7680 (/4 1920)
>[307011.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c661c0]
>[307011.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c661c0] width 1920 pitch 7680 (/4 1920)
>[307011.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f340]
>[307011.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f340] width 1920 pitch 7680 (/4 1920)
>[307011.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c661c0]
>[307011.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c661c0] width 1920 pitch 7680 (/4 1920)
>[307011.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f340]
>[307011.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f340] width 1920 pitch 7680 (/4 1920)
>[307011.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6fd60]
>[307011.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6fd60] width 1920 pitch 7680 (/4 1920)
>[307011.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8bd0]
>[307011.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8bd0] width 1920 pitch 7680 (/4 1920)
>[307011.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306d570]
>[307011.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306d570] width 1920 pitch 7680 (/4 1920)
>[307011.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8bd0]
>[307011.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8bd0] width 1920 pitch 7680 (/4 1920)
>[307011.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e270a0]
>[307011.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e270a0] width 1920 pitch 7680 (/4 1920)
>[307011.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecd330]
>[307011.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecd330] width 1920 pitch 7680 (/4 1920)
>[307011.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e270a0]
>[307011.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e270a0] width 1920 pitch 7680 (/4 1920)
>[307011.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecd330]
>[307011.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecd330] width 1920 pitch 7680 (/4 1920)
>[307011.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e270a0]
>[307011.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e270a0] width 1920 pitch 7680 (/4 1920)
>[307011.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e270a0]
>[307011.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e270a0] width 1920 pitch 7680 (/4 1920)
>[307011.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abf450]
>[307011.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abf450] width 1920 pitch 7680 (/4 1920)
>[307011.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307011.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307011.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abf450]
>[307011.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abf450] width 1920 pitch 7680 (/4 1920)
>[307011.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307011.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307011.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abf450]
>[307011.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abf450] width 1920 pitch 7680 (/4 1920)
>[307012.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307012.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307012.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307012.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307012.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307012.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307012.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307012.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307012.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307012.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307012.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307012.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307012.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307012.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307012.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307012.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307012.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73d10]
>[307012.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73d10] width 1920 pitch 7680 (/4 1920)
>[307012.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb2760]
>[307012.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb2760] width 1920 pitch 7680 (/4 1920)
>[307018.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f33680]
>[307018.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f33680] width 1920 pitch 7680 (/4 1920)
>[307018.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d509f0]
>[307018.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d509f0] width 1920 pitch 7680 (/4 1920)
>[307018.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b940]
>[307018.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b940] width 1920 pitch 7680 (/4 1920)
>[307018.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d509f0]
>[307018.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d509f0] width 1920 pitch 7680 (/4 1920)
>[307018.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b940]
>[307018.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b940] width 1920 pitch 7680 (/4 1920)
>[307018.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d509f0]
>[307018.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d509f0] width 1920 pitch 7680 (/4 1920)
>[307018.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b940]
>[307018.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b940] width 1920 pitch 7680 (/4 1920)
>[307018.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d509f0]
>[307018.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d509f0] width 1920 pitch 7680 (/4 1920)
>[307018.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b940]
>[307018.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b940] width 1920 pitch 7680 (/4 1920)
>[307018.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d509f0]
>[307018.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d509f0] width 1920 pitch 7680 (/4 1920)
>[307018.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4b940]
>[307018.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4b940] width 1920 pitch 7680 (/4 1920)
>[307018.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6360]
>[307018.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6360] width 1920 pitch 7680 (/4 1920)
>[307018.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33650]
>[307018.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33650] width 1920 pitch 7680 (/4 1920)
>[307018.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6360]
>[307018.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6360] width 1920 pitch 7680 (/4 1920)
>[307018.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf6360]
>[307018.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf6360] width 1920 pitch 7680 (/4 1920)
>[307018.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c33650]
>[307018.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c33650] width 1920 pitch 7680 (/4 1920)
>[307023.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307023.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5360]
>[307023.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5360] width 1920 pitch 7680 (/4 1920)
>[307023.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f600]
>[307023.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f600] width 1920 pitch 7680 (/4 1920)
>[307025.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d870]
>[307025.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d870] width 1920 pitch 7680 (/4 1920)
>[307025.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307025.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307025.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30993c0]
>[307025.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30993c0] width 1920 pitch 7680 (/4 1920)
>[307025.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307025.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307025.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d870]
>[307025.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d870] width 1920 pitch 7680 (/4 1920)
>[307025.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307025.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307025.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbde10]
>[307025.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbde10] width 1920 pitch 7680 (/4 1920)
>[307025.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307025.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307025.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbde10]
>[307025.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbde10] width 1920 pitch 7680 (/4 1920)
>[307025.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307025.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307025.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbde10]
>[307025.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbde10] width 1920 pitch 7680 (/4 1920)
>[307025.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d870]
>[307025.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d870] width 1920 pitch 7680 (/4 1920)
>[307025.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbde10]
>[307025.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbde10] width 1920 pitch 7680 (/4 1920)
>[307025.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307025.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307025.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbde10]
>[307025.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbde10] width 1920 pitch 7680 (/4 1920)
>[307025.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d870]
>[307025.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d870] width 1920 pitch 7680 (/4 1920)
>[307025.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbde10]
>[307025.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbde10] width 1920 pitch 7680 (/4 1920)
>[307027.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca01a0]
>[307027.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca01a0] width 1920 pitch 7680 (/4 1920)
>[307027.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393ca40]
>[307027.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393ca40] width 1920 pitch 7680 (/4 1920)
>[307027.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d950]
>[307027.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d950] width 1920 pitch 7680 (/4 1920)
>[307027.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307027.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8c200]
>[307027.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8c200] width 1920 pitch 7680 (/4 1920)
>[307027.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce4460]
>[307027.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce4460] width 1920 pitch 7680 (/4 1920)
>[307030.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307030.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc2260]
>[307030.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc2260] width 1920 pitch 7680 (/4 1920)
>[307030.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd210]
>[307030.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd210] width 1920 pitch 7680 (/4 1920)
>[307031.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3dc70]
>[307031.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3dc70] width 1920 pitch 7680 (/4 1920)
>[307032.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307032.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea2e90]
>[307032.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea2e90] width 1920 pitch 7680 (/4 1920)
>[307032.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d09650]
>[307032.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d09650] width 1920 pitch 7680 (/4 1920)
>[307036.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8a970]
>[307036.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8a970] width 1920 pitch 7680 (/4 1920)
>[307041.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82940]
>[307041.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82940] width 1920 pitch 7680 (/4 1920)
>[307041.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307041.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307041.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82940]
>[307041.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82940] width 1920 pitch 7680 (/4 1920)
>[307041.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307042.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307042.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82940]
>[307042.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82940] width 1920 pitch 7680 (/4 1920)
>[307042.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307042.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307042.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82940]
>[307042.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82940] width 1920 pitch 7680 (/4 1920)
>[307042.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307042.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307042.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82940]
>[307042.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82940] width 1920 pitch 7680 (/4 1920)
>[307042.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307042.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307042.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e82940]
>[307042.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e82940] width 1920 pitch 7680 (/4 1920)
>[307042.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307042.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307042.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfb510]
>[307042.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfb510] width 1920 pitch 7680 (/4 1920)
>[307042.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309abb0]
>[307042.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309abb0] width 1920 pitch 7680 (/4 1920)
>[307042.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfb510]
>[307042.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfb510] width 1920 pitch 7680 (/4 1920)
>[307042.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309abb0]
>[307042.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309abb0] width 1920 pitch 7680 (/4 1920)
>[307042.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39411d0]
>[307042.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39411d0] width 1920 pitch 7680 (/4 1920)
>[307044.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c5f10]
>[307044.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c5f10] width 1920 pitch 7680 (/4 1920)
>[307044.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ceb0]
>[307044.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ceb0] width 1920 pitch 7680 (/4 1920)
>[307044.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c56220]
>[307044.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c56220] width 1920 pitch 7680 (/4 1920)
>[307044.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce6da0]
>[307044.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce6da0] width 1920 pitch 7680 (/4 1920)
>[307044.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce6da0]
>[307044.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce6da0] width 1920 pitch 7680 (/4 1920)
>[307044.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc8d0]
>[307044.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc8d0] width 1920 pitch 7680 (/4 1920)
>[307044.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc8d0]
>[307044.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc8d0] width 1920 pitch 7680 (/4 1920)
>[307044.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc8d0]
>[307044.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc8d0] width 1920 pitch 7680 (/4 1920)
>[307044.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ceb0]
>[307044.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ceb0] width 1920 pitch 7680 (/4 1920)
>[307044.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307044.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307044.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ceb0]
>[307045.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ceb0] width 1920 pitch 7680 (/4 1920)
>[307045.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307045.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307045.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403ef90]
>[307045.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403ef90] width 1920 pitch 7680 (/4 1920)
>[307045.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307045.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307045.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c5f10]
>[307045.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c5f10] width 1920 pitch 7680 (/4 1920)
>[307045.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7ba0]
>[307045.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7ba0] width 1920 pitch 7680 (/4 1920)
>[307045.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c5f10]
>[307045.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c5f10] width 1920 pitch 7680 (/4 1920)
>[307066.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8050]
>[307066.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8050] width 1920 pitch 7680 (/4 1920)
>[307139.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed560]
>[307139.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed560] width 1920 pitch 7680 (/4 1920)
>[307139.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307139.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307139.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307139.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307139.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307139.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307139.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307139.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307139.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307139.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307140.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2560d20]
>[307140.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2560d20] width 1920 pitch 7680 (/4 1920)
>[307140.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cea00]
>[307140.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cea00] width 1920 pitch 7680 (/4 1920)
>[307142.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5f1c0]
>[307142.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5f1c0] width 1920 pitch 7680 (/4 1920)
>[307142.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307142.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307142.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90c20]
>[307142.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90c20] width 1920 pitch 7680 (/4 1920)
>[307142.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307142.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307142.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90c20]
>[307142.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90c20] width 1920 pitch 7680 (/4 1920)
>[307142.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307142.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307142.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90c20]
>[307142.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90c20] width 1920 pitch 7680 (/4 1920)
>[307142.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307142.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307142.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90c20]
>[307142.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90c20] width 1920 pitch 7680 (/4 1920)
>[307142.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd46b0]
>[307142.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd46b0] width 1920 pitch 7680 (/4 1920)
>[307142.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307142.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038f10]
>[307142.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038f10] width 1920 pitch 7680 (/4 1920)
>[307142.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b57a90]
>[307142.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b57a90] width 1920 pitch 7680 (/4 1920)
>[307152.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4b2f0]
>[307152.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4b2f0] width 1920 pitch 7680 (/4 1920)
>[307152.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307152.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307152.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307152.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307152.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307153.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307153.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307153.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307153.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307153.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307153.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1aa0]
>[307153.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1aa0] width 1920 pitch 7680 (/4 1920)
>[307153.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5fa80]
>[307153.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5fa80] width 1920 pitch 7680 (/4 1920)
>[307154.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc6c0]
>[307154.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc6c0] width 1920 pitch 7680 (/4 1920)
>[307154.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda680]
>[307154.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda680] width 1920 pitch 7680 (/4 1920)
>[307154.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[307154.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[307154.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda680]
>[307154.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda680] width 1920 pitch 7680 (/4 1920)
>[307154.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[307154.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[307154.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda680]
>[307154.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda680] width 1920 pitch 7680 (/4 1920)
>[307154.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[307154.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[307154.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda680]
>[307154.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda680] width 1920 pitch 7680 (/4 1920)
>[307154.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[307154.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[307154.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda680]
>[307154.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda680] width 1920 pitch 7680 (/4 1920)
>[307154.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f57480]
>[307154.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f57480] width 1920 pitch 7680 (/4 1920)
>[307154.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3100070]
>[307154.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3100070] width 1920 pitch 7680 (/4 1920)
>[307154.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21460]
>[307154.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21460] width 1920 pitch 7680 (/4 1920)
>[307154.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3100070]
>[307154.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3100070] width 1920 pitch 7680 (/4 1920)
>[307154.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21460]
>[307154.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21460] width 1920 pitch 7680 (/4 1920)
>[307154.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cc90]
>[307154.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cc90] width 1920 pitch 7680 (/4 1920)
>[307154.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d21460]
>[307154.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d21460] width 1920 pitch 7680 (/4 1920)
>[307154.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310cc90]
>[307154.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310cc90] width 1920 pitch 7680 (/4 1920)
>[307157.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307157.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff4950]
>[307157.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff4950] width 1920 pitch 7680 (/4 1920)
>[307157.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aef9d0]
>[307157.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aef9d0] width 1920 pitch 7680 (/4 1920)
>[307162.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099880]
>[307162.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099880] width 1920 pitch 7680 (/4 1920)
>[307162.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e930]
>[307162.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e930] width 1920 pitch 7680 (/4 1920)
>[307162.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099880]
>[307162.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099880] width 1920 pitch 7680 (/4 1920)
>[307162.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e930]
>[307162.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e930] width 1920 pitch 7680 (/4 1920)
>[307162.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099880]
>[307162.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099880] width 1920 pitch 7680 (/4 1920)
>[307162.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8e930]
>[307162.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8e930] width 1920 pitch 7680 (/4 1920)
>[307162.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2630]
>[307162.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2630] width 1920 pitch 7680 (/4 1920)
>[307162.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253dca0]
>[307162.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253dca0] width 1920 pitch 7680 (/4 1920)
>[307162.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2630]
>[307162.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2630] width 1920 pitch 7680 (/4 1920)
>[307162.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253dca0]
>[307162.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253dca0] width 1920 pitch 7680 (/4 1920)
>[307162.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2630]
>[307162.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2630] width 1920 pitch 7680 (/4 1920)
>[307162.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253dca0]
>[307162.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253dca0] width 1920 pitch 7680 (/4 1920)
>[307162.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2630]
>[307162.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2630] width 1920 pitch 7680 (/4 1920)
>[307162.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253dca0]
>[307162.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253dca0] width 1920 pitch 7680 (/4 1920)
>[307162.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2630]
>[307162.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2630] width 1920 pitch 7680 (/4 1920)
>[307162.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x253dca0]
>[307162.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x253dca0] width 1920 pitch 7680 (/4 1920)
>[307162.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c2630]
>[307162.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c2630] width 1920 pitch 7680 (/4 1920)
>[307245.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307245.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307245.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307245.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3959e70]
>[307245.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3959e70] width 1920 pitch 7680 (/4 1920)
>[307246.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a5b0]
>[307246.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a5b0] width 1920 pitch 7680 (/4 1920)
>[307250.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d4d0]
>[307250.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d4d0] width 1920 pitch 7680 (/4 1920)
>[307250.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d4d0]
>[307250.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d4d0] width 1920 pitch 7680 (/4 1920)
>[307250.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d4d0]
>[307250.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d4d0] width 1920 pitch 7680 (/4 1920)
>[307250.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d4d0]
>[307250.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d4d0] width 1920 pitch 7680 (/4 1920)
>[307250.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d4d0]
>[307250.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d4d0] width 1920 pitch 7680 (/4 1920)
>[307250.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3d4d0]
>[307250.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3d4d0] width 1920 pitch 7680 (/4 1920)
>[307250.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02590]
>[307250.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02590] width 1920 pitch 7680 (/4 1920)
>[307250.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02590]
>[307250.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02590] width 1920 pitch 7680 (/4 1920)
>[307250.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307250.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02590]
>[307250.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02590] width 1920 pitch 7680 (/4 1920)
>[307250.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309aa20]
>[307250.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309aa20] width 1920 pitch 7680 (/4 1920)
>[307261.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b02590]
>[307261.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b02590] width 1920 pitch 7680 (/4 1920)
>[307306.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307306.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307336.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307336.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307396.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307396.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307426.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307426.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307441.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307441.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307456.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307456.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307486.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307486.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307501.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307501.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307516.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307516.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307546.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307546.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307606.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307606.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307621.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307621.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307666.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307666.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307681.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307681.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307696.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307696.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307726.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307726.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307756.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307756.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307771.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307771.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307786.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307786.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307816.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97fa0]
>[307816.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97fa0] width 1920 pitch 7680 (/4 1920)
>[307861.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307861.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307876.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307876.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307891.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb190]
>[307891.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb190] width 1920 pitch 7680 (/4 1920)
>[307906.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1860]
>[307906.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1860] width 1920 pitch 7680 (/4 1920)
>[307907.951] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[307907.951] (II) RADEON(0): Using hsync ranges from config file
>[307907.951] (II) RADEON(0): Using vrefresh ranges from config file
>[307907.951] (II) RADEON(0): Printing DDC gathered Modelines:
>[307907.951] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[307907.951] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[307907.951] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[307907.951] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[307907.951] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[307907.951] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[307907.951] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[307907.951] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[307907.951] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[307907.951] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[307907.951] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[307907.951] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[307907.952] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[307907.952] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[307907.952] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[307907.952] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[307998.664] (II) RADEON(0): RADEONSaveScreen(2)
>[307998.664] (II) RADEON(0): RADEONSaveScreen(0)
>[329626.182] (II) AIGLX: Suspending AIGLX clients for VT switch
>[329626.182] (II) RADEON(0): RADEONLeaveVT_KMS
>[329626.182] (II) RADEON(0): Ok, leaving now...
>[329639.118] (II) AIGLX: Resuming AIGLX clients after VT switch
>[329639.118] (II) RADEON(0): RADEONEnterVT_KMS
>[329639.163] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[329639.163] (II) RADEON(0): Using hsync ranges from config file
>[329639.163] (II) RADEON(0): Using vrefresh ranges from config file
>[329639.163] (II) RADEON(0): Printing DDC gathered Modelines:
>[329639.163] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[329639.163] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[329639.163] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[329639.163] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[329639.163] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[329639.163] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[329639.163] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[329639.163] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[329639.163] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[329639.163] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[329639.163] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[329639.163] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[329639.169] (II) RADEON(0): RADEONSaveScreen(2)
>[329639.171] (II) RADEON(0): RADEONSaveScreen(1)
>[329639.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfd20]
>[329639.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfd20] width 1920 pitch 7680 (/4 1920)
>[329702.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329702.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329703.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ee0]
>[329703.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ee0] width 1920 pitch 7680 (/4 1920)
>[329703.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329703.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329703.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329703.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329703.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329703.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329703.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329703.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329703.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329703.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329703.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329703.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329703.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329703.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329703.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329703.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329703.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329703.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329703.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329703.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329703.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329703.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329704.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329704.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329704.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28050]
>[329704.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28050] width 1920 pitch 7680 (/4 1920)
>[329704.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80470]
>[329704.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80470] width 1920 pitch 7680 (/4 1920)
>[329704.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2110]
>[329704.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2110] width 1920 pitch 7680 (/4 1920)
>[329704.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80470]
>[329704.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80470] width 1920 pitch 7680 (/4 1920)
>[329704.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2110]
>[329704.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2110] width 1920 pitch 7680 (/4 1920)
>[329704.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80470]
>[329704.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80470] width 1920 pitch 7680 (/4 1920)
>[329704.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329704.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329704.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3ee0]
>[329704.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3ee0] width 1920 pitch 7680 (/4 1920)
>[329704.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ced960]
>[329704.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ced960] width 1920 pitch 7680 (/4 1920)
>[329712.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f2110]
>[329712.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f2110] width 1920 pitch 7680 (/4 1920)
>[329712.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c83110]
>[329712.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c83110] width 1920 pitch 7680 (/4 1920)
>[329712.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d198c0]
>[329712.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d198c0] width 1920 pitch 7680 (/4 1920)
>[329732.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79450]
>[329732.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79450] width 1920 pitch 7680 (/4 1920)
>[329748.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8b70]
>[329748.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8b70] width 1920 pitch 7680 (/4 1920)
>[329748.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473530]
>[329748.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473530] width 1920 pitch 7680 (/4 1920)
>[329748.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d290c0]
>[329748.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d290c0] width 1920 pitch 7680 (/4 1920)
>[329748.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3b510]
>[329748.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3b510] width 1920 pitch 7680 (/4 1920)
>[329748.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94d70]
>[329748.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94d70] width 1920 pitch 7680 (/4 1920)
>[329759.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[329759.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[329789.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[329789.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[329819.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[329819.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[329864.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[329864.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[329924.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[329924.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[329954.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[329954.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[329969.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[329969.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[329984.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[329984.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[330059.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[330059.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[330074.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[330074.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[330119.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[330119.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[330164.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[330164.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[330179.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[330179.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[330194.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[330194.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[330314.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[330314.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[330329.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e2220]
>[330329.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e2220] width 1920 pitch 7680 (/4 1920)
>[330349.340] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[330349.340] (II) RADEON(0): Using hsync ranges from config file
>[330349.340] (II) RADEON(0): Using vrefresh ranges from config file
>[330349.340] (II) RADEON(0): Printing DDC gathered Modelines:
>[330349.340] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[330349.340] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[330349.340] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[330349.340] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[330349.340] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[330349.340] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[330349.340] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[330349.340] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[330349.340] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[330349.340] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[330349.340] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[330349.340] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[330439.665] (II) RADEON(0): RADEONSaveScreen(2)
>[330439.665] (II) RADEON(0): RADEONSaveScreen(0)
>[333441.155] (II) AIGLX: Suspending AIGLX clients for VT switch
>[333441.155] (II) RADEON(0): RADEONLeaveVT_KMS
>[333441.155] (II) RADEON(0): Ok, leaving now...
>[333454.203] (II) AIGLX: Resuming AIGLX clients after VT switch
>[333454.203] (II) RADEON(0): RADEONEnterVT_KMS
>[333454.243] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[333454.243] (II) RADEON(0): Using hsync ranges from config file
>[333454.243] (II) RADEON(0): Using vrefresh ranges from config file
>[333454.243] (II) RADEON(0): Printing DDC gathered Modelines:
>[333454.243] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[333454.243] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[333454.243] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[333454.243] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[333454.243] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[333454.243] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[333454.243] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[333454.243] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[333454.243] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[333454.243] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[333454.243] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[333454.243] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[333454.251] (II) RADEON(0): RADEONSaveScreen(2)
>[333454.251] (II) RADEON(0): RADEONSaveScreen(1)
>[333454.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099bc0]
>[333454.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099bc0] width 1920 pitch 7680 (/4 1920)
>[333455.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ad50]
>[333455.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ad50] width 1920 pitch 7680 (/4 1920)
>[333455.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[333455.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[333456.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[333456.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[333456.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333456.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333456.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea8d50]
>[333456.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea8d50] width 1920 pitch 7680 (/4 1920)
>[333456.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333456.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333456.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea8d50]
>[333456.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea8d50] width 1920 pitch 7680 (/4 1920)
>[333456.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333456.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333456.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea8d50]
>[333456.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea8d50] width 1920 pitch 7680 (/4 1920)
>[333456.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333456.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333456.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea8d50]
>[333456.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea8d50] width 1920 pitch 7680 (/4 1920)
>[333456.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333456.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333456.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea8d50]
>[333456.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea8d50] width 1920 pitch 7680 (/4 1920)
>[333456.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333456.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333456.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea8d50]
>[333456.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea8d50] width 1920 pitch 7680 (/4 1920)
>[333457.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f01940]
>[333457.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f01940] width 1920 pitch 7680 (/4 1920)
>[333457.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1860]
>[333457.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1860] width 1920 pitch 7680 (/4 1920)
>[333457.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[333457.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[333457.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a1b0]
>[333457.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a1b0] width 1920 pitch 7680 (/4 1920)
>[333457.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[333457.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[333457.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a1b0]
>[333457.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a1b0] width 1920 pitch 7680 (/4 1920)
>[333457.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac3530]
>[333457.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac3530] width 1920 pitch 7680 (/4 1920)
>[333457.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a1b0]
>[333457.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a1b0] width 1920 pitch 7680 (/4 1920)
>[333469.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c79590]
>[333469.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c79590] width 1920 pitch 7680 (/4 1920)
>[333634.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f419f0]
>[333634.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f419f0] width 1920 pitch 7680 (/4 1920)
>[333649.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310ad50]
>[333649.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310ad50] width 1920 pitch 7680 (/4 1920)
>[333701.795] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[333701.795] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[333701.795] (II) UnloadModule: "evdev"
>[333709.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbfd0]
>[333709.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbfd0] width 1920 pitch 7680 (/4 1920)
>[333724.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40365a0]
>[333724.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40365a0] width 1920 pitch 7680 (/4 1920)
>[333769.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbfd0]
>[333769.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbfd0] width 1920 pitch 7680 (/4 1920)
>[333784.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40365a0]
>[333784.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40365a0] width 1920 pitch 7680 (/4 1920)
>[333904.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40365a0]
>[333904.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40365a0] width 1920 pitch 7680 (/4 1920)
>[333919.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a6f0]
>[333919.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a6f0] width 1920 pitch 7680 (/4 1920)
>[333994.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40365a0]
>[333994.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40365a0] width 1920 pitch 7680 (/4 1920)
>[334024.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a6f0]
>[334024.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a6f0] width 1920 pitch 7680 (/4 1920)
>[334054.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40365a0]
>[334054.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40365a0] width 1920 pitch 7680 (/4 1920)
>[334069.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a6f0]
>[334069.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a6f0] width 1920 pitch 7680 (/4 1920)
>[334301.401] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[334301.402] (II) RADEON(0): Using hsync ranges from config file
>[334301.402] (II) RADEON(0): Using vrefresh ranges from config file
>[334301.402] (II) RADEON(0): Printing DDC gathered Modelines:
>[334301.402] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[334301.402] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[334301.402] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[334301.402] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[334301.402] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[334301.402] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[334301.402] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[334301.402] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[334301.402] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[334301.402] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[334301.402] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[334301.402] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[334391.655] (II) RADEON(0): RADEONSaveScreen(2)
>[334391.655] (II) RADEON(0): RADEONSaveScreen(0)
>[337393.183] (II) AIGLX: Suspending AIGLX clients for VT switch
>[337393.183] (II) RADEON(0): RADEONLeaveVT_KMS
>[337393.183] (II) RADEON(0): Ok, leaving now...
>[337406.910] (II) AIGLX: Resuming AIGLX clients after VT switch
>[337406.910] (II) RADEON(0): RADEONEnterVT_KMS
>[337406.993] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[337406.993] (II) RADEON(0): Using hsync ranges from config file
>[337406.994] (II) RADEON(0): Using vrefresh ranges from config file
>[337406.994] (II) RADEON(0): Printing DDC gathered Modelines:
>[337406.994] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[337406.994] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[337406.994] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[337406.994] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[337406.994] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[337406.994] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[337406.994] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[337406.994] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[337406.994] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[337406.994] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[337406.994] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[337406.994] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[337407.002] (II) RADEON(0): RADEONSaveScreen(2)
>[337407.002] (II) RADEON(0): RADEONSaveScreen(1)
>[337407.053] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[337407.053] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[337407.053] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[337407.053] 	Option "XkbRules" "evdev"
>[337407.053] 	Option "XkbModel" "evdev"
>[337407.053] 	Option "XkbLayout" "us"
>[337407.053] 	Option "_source" "server/udev"
>[337407.053] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[337407.053] 	Option "path" "/dev/input/event14"
>[337407.053] 	Option "device" "/dev/input/event14"
>[337407.053] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input48/event14"
>[337407.053] 	Option "driver" "evdev"
>[337407.053] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[337407.053] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[337407.072] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[337407.072] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[337407.072] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[337407.072] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[337407.072] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[337407.072] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[337407.072] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[337407.072] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[337407.072] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[337407.072] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input48/event14"
>[337407.072] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[337407.072] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[337407.072] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[337407.072] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[337407.072] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[337407.073] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[337407.074] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[337407.074] (II) No input driver specified, ignoring this device.
>[337407.074] (II) This device may have been added with another device file.
>[337407.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7ee30]
>[337407.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7ee30] width 1920 pitch 7680 (/4 1920)
>[337410.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3099bc0]
>[337410.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3099bc0] width 1920 pitch 7680 (/4 1920)
>[337410.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c85e0]
>[337410.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c85e0] width 1920 pitch 7680 (/4 1920)
>[337410.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e2c0]
>[337410.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e2c0] width 1920 pitch 7680 (/4 1920)
>[337410.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a670]
>[337410.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a670] width 1920 pitch 7680 (/4 1920)
>[337410.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e2c0]
>[337410.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e2c0] width 1920 pitch 7680 (/4 1920)
>[337410.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a670]
>[337410.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a670] width 1920 pitch 7680 (/4 1920)
>[337410.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff95f0]
>[337410.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff95f0] width 1920 pitch 7680 (/4 1920)
>[337410.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a670]
>[337410.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a670] width 1920 pitch 7680 (/4 1920)
>[337410.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7ee30]
>[337410.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7ee30] width 1920 pitch 7680 (/4 1920)
>[337411.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337411.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337411.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337411.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337411.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337411.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337412.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337412.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337412.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337412.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337413.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337413.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337413.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337413.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337413.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337413.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337413.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337413.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337413.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337413.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337413.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337413.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337414.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337414.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337414.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337414.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337414.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337414.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337414.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337414.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337414.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337414.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337414.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337414.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337414.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337414.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337414.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337414.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337414.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337414.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337416.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337416.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337416.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337416.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337417.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337417.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337417.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337417.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337417.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337417.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337417.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337417.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337417.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337417.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337417.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337417.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337417.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337417.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337417.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337417.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337417.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337417.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337418.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337418.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337418.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337418.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337418.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337418.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337418.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a56090]
>[337418.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a56090] width 1920 pitch 7680 (/4 1920)
>[337418.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c89c0]
>[337418.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c89c0] width 1920 pitch 7680 (/4 1920)
>[337418.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfd20]
>[337418.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfd20] width 1920 pitch 7680 (/4 1920)
>[337418.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cab560]
>[337418.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cab560] width 1920 pitch 7680 (/4 1920)
>[337418.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfd20]
>[337418.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfd20] width 1920 pitch 7680 (/4 1920)
>[337418.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cab560]
>[337418.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cab560] width 1920 pitch 7680 (/4 1920)
>[337418.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfd20]
>[337418.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfd20] width 1920 pitch 7680 (/4 1920)
>[337418.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cab560]
>[337418.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cab560] width 1920 pitch 7680 (/4 1920)
>[337418.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbfd20]
>[337418.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbfd20] width 1920 pitch 7680 (/4 1920)
>[337418.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd9730]
>[337419.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd9730] width 1920 pitch 7680 (/4 1920)
>[337437.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d420]
>[337437.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d420] width 1920 pitch 7680 (/4 1920)
>[337452.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[337452.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[337454.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e81b80]
>[337454.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e81b80] width 1920 pitch 7680 (/4 1920)
>[337458.871] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[337458.871] (II) RADEON(0): Using hsync ranges from config file
>[337458.871] (II) RADEON(0): Using vrefresh ranges from config file
>[337458.871] (II) RADEON(0): Printing DDC gathered Modelines:
>[337458.871] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[337458.871] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[337458.871] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[337458.871] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[337458.871] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[337458.871] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[337458.871] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[337458.871] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[337458.871] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[337458.871] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[337458.871] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[337458.871] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[337458.915] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[337458.915] (II) RADEON(0): Using hsync ranges from config file
>[337458.915] (II) RADEON(0): Using vrefresh ranges from config file
>[337458.915] (II) RADEON(0): Printing DDC gathered Modelines:
>[337458.915] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[337458.915] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[337458.915] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[337458.915] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[337458.915] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[337458.915] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[337458.915] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[337458.915] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[337458.915] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[337458.915] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[337458.915] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[337458.915] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[337458.963] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[337458.963] (II) RADEON(0): Using hsync ranges from config file
>[337458.963] (II) RADEON(0): Using vrefresh ranges from config file
>[337458.963] (II) RADEON(0): Printing DDC gathered Modelines:
>[337458.963] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[337458.963] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[337458.963] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[337458.963] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[337458.963] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[337458.963] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[337458.963] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[337458.963] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[337458.963] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[337458.963] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[337458.963] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[337458.963] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[337467.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[337467.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[337474.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e8780]
>[337474.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e8780] width 1920 pitch 7680 (/4 1920)
>[337497.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337497.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337512.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d28f50]
>[337512.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d28f50] width 1920 pitch 7680 (/4 1920)
>[337542.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[337542.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[337617.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337617.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337632.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[337632.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[337647.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337647.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337662.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337662.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337677.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[337677.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[337692.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[337692.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[337707.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[337707.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[337722.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[337722.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[337737.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[337737.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[337752.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[337752.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[337767.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[337767.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[337782.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337782.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337812.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337812.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337842.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[337842.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[337887.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[337887.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[337902.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337902.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337962.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1c250]
>[337962.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1c250] width 1920 pitch 7680 (/4 1920)
>[337977.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[337977.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[337992.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[337992.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338022.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95980]
>[338022.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95980] width 1920 pitch 7680 (/4 1920)
>[338037.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338037.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338112.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[338112.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[338127.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1c250]
>[338127.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1c250] width 1920 pitch 7680 (/4 1920)
>[338144.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[338144.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[338144.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[338144.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[338144.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[338144.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[338144.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[338144.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[338144.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338144.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338144.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[338144.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[338145.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338145.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338145.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338145.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338145.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338145.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338145.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338145.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338145.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ebbc0]
>[338145.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ebbc0] width 1920 pitch 7680 (/4 1920)
>[338146.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338146.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338146.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ff50]
>[338146.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ff50] width 1920 pitch 7680 (/4 1920)
>[338157.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6db90]
>[338157.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6db90] width 1920 pitch 7680 (/4 1920)
>[338172.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b538d0]
>[338172.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b538d0] width 1920 pitch 7680 (/4 1920)
>[338187.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69f40]
>[338187.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69f40] width 1920 pitch 7680 (/4 1920)
>[338217.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[338217.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[338232.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd3f60]
>[338232.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd3f60] width 1920 pitch 7680 (/4 1920)
>[338247.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d71900]
>[338247.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d71900] width 1920 pitch 7680 (/4 1920)
>[338262.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd3f60]
>[338262.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd3f60] width 1920 pitch 7680 (/4 1920)
>[338277.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6158db0]
>[338277.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6158db0] width 1920 pitch 7680 (/4 1920)
>[338292.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615c040]
>[338292.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615c040] width 1920 pitch 7680 (/4 1920)
>[338307.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615e5a0]
>[338307.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615e5a0] width 1920 pitch 7680 (/4 1920)
>[338322.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615bd00]
>[338322.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615bd00] width 1920 pitch 7680 (/4 1920)
>[338337.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c88e90]
>[338337.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c88e90] width 1920 pitch 7680 (/4 1920)
>[338352.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9700]
>[338352.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9700] width 1920 pitch 7680 (/4 1920)
>[338367.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5356350]
>[338367.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5356350] width 1920 pitch 7680 (/4 1920)
>[338382.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338382.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338397.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3015930]
>[338397.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3015930] width 1920 pitch 7680 (/4 1920)
>[338412.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5e200]
>[338412.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5e200] width 1920 pitch 7680 (/4 1920)
>[338427.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcfde0]
>[338427.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcfde0] width 1920 pitch 7680 (/4 1920)
>[338442.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcfde0]
>[338442.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcfde0] width 1920 pitch 7680 (/4 1920)
>[338457.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc51e0]
>[338457.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc51e0] width 1920 pitch 7680 (/4 1920)
>[338472.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[338472.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[338477.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9b270]
>[338477.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9b270] width 1920 pitch 7680 (/4 1920)
>[338478.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb120]
>[338478.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb120] width 1920 pitch 7680 (/4 1920)
>[338478.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9b270]
>[338478.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9b270] width 1920 pitch 7680 (/4 1920)
>[338487.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc51e0]
>[338487.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc51e0] width 1920 pitch 7680 (/4 1920)
>[338502.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[338502.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[338504.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965130]
>[338504.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965130] width 1920 pitch 7680 (/4 1920)
>[338504.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338504.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338504.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338504.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338504.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338504.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338504.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338504.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338504.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338504.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338504.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338504.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338504.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338504.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338504.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338505.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338505.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338505.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338505.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338505.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338505.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338505.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338505.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338505.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338505.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[338505.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[338505.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[338505.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[338507.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338507.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338507.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a719c0]
>[338507.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a719c0] width 1920 pitch 7680 (/4 1920)
>[338507.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a72e50]
>[338507.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a72e50] width 1920 pitch 7680 (/4 1920)
>[338507.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfce10]
>[338507.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfce10] width 1920 pitch 7680 (/4 1920)
>[338509.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc7b20]
>[338509.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc7b20] width 1920 pitch 7680 (/4 1920)
>[338511.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338511.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338511.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338512.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338512.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[338512.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[338512.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338512.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338517.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338517.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338529.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa27b0]
>[338529.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa27b0] width 1920 pitch 7680 (/4 1920)
>[338532.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa2780]
>[338532.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa2780] width 1920 pitch 7680 (/4 1920)
>[338535.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338535.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338535.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8870]
>[338535.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8870] width 1920 pitch 7680 (/4 1920)
>[338535.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338535.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338535.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdea0]
>[338535.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdea0] width 1920 pitch 7680 (/4 1920)
>[338535.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338535.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338535.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdea0]
>[338535.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdea0] width 1920 pitch 7680 (/4 1920)
>[338536.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8870]
>[338536.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8870] width 1920 pitch 7680 (/4 1920)
>[338536.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338536.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338536.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338536.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338536.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338536.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338536.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338537.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338537.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338537.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338537.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338537.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338537.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338537.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338537.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338537.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338537.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338538.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338538.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338538.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338538.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eed70]
>[338538.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eed70] width 1920 pitch 7680 (/4 1920)
>[338538.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b955a0]
>[338538.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b955a0] width 1920 pitch 7680 (/4 1920)
>[338538.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bae960]
>[338538.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bae960] width 1920 pitch 7680 (/4 1920)
>[338547.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36b40]
>[338547.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36b40] width 1920 pitch 7680 (/4 1920)
>[338562.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9970]
>[338562.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9970] width 1920 pitch 7680 (/4 1920)
>[338577.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0cfb0]
>[338577.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0cfb0] width 1920 pitch 7680 (/4 1920)
>[338592.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338592.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338607.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[338607.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[338622.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78f20]
>[338622.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78f20] width 1920 pitch 7680 (/4 1920)
>[338637.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[338637.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[338652.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[338652.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[338667.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338667.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338682.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338682.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338697.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[338697.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[338712.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338712.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338727.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338727.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338742.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338742.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338757.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338757.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338768.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[338768.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[338769.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338769.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338769.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[338769.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[338769.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[338769.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[338770.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[338770.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[338770.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[338770.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[338770.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf00]
>[338770.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf00] width 1920 pitch 7680 (/4 1920)
>[338770.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[338770.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[338787.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[338787.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[338817.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[338817.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[338832.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[338832.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[338847.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9960]
>[338847.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9960] width 1920 pitch 7680 (/4 1920)
>[338862.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[338862.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[338892.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9960]
>[338892.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9960] width 1920 pitch 7680 (/4 1920)
>[338997.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[338997.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[339027.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9960]
>[339027.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9960] width 1920 pitch 7680 (/4 1920)
>[339042.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9960]
>[339042.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9960] width 1920 pitch 7680 (/4 1920)
>[339057.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[339057.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[339087.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[339087.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[339102.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[339102.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[339117.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[339117.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[339132.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[339132.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[339162.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339162.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339237.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[339237.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[339252.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[339252.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[339263.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[339263.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[339264.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[339264.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[339264.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf10]
>[339264.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf10] width 1920 pitch 7680 (/4 1920)
>[339264.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[339264.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[339267.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cfad0]
>[339267.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cfad0] width 1920 pitch 7680 (/4 1920)
>[339274.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3b920]
>[339274.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3b920] width 1920 pitch 7680 (/4 1920)
>[339274.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3b8c0]
>[339274.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3b8c0] width 1920 pitch 7680 (/4 1920)
>[339274.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339274.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339274.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[339275.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[339275.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339275.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339275.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[339275.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[339275.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339275.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339275.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[339276.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[339276.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339276.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339276.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339276.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339276.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339276.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339276.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[339276.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[339276.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa27a0]
>[339276.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa27a0] width 1920 pitch 7680 (/4 1920)
>[339276.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[339276.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[339276.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa27a0]
>[339276.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa27a0] width 1920 pitch 7680 (/4 1920)
>[339282.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339282.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339297.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[339297.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[339312.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e8030]
>[339312.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e8030] width 1920 pitch 7680 (/4 1920)
>[339357.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[339357.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[339387.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa27a0]
>[339387.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa27a0] width 1920 pitch 7680 (/4 1920)
>[339402.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdda0]
>[339402.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdda0] width 1920 pitch 7680 (/4 1920)
>[339417.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[339417.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[339432.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339432.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339447.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339447.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339462.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339462.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339477.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339477.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339507.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339507.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339522.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9770]
>[339522.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9770] width 1920 pitch 7680 (/4 1920)
>[339537.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c820]
>[339537.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c820] width 1920 pitch 7680 (/4 1920)
>[339567.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339567.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339582.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339582.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339597.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[339597.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[339612.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339612.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339627.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339627.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339631.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339631.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339632.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339632.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339632.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096350]
>[339632.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096350] width 1920 pitch 7680 (/4 1920)
>[339632.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3b990]
>[339632.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3b990] width 1920 pitch 7680 (/4 1920)
>[339642.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096350]
>[339642.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096350] width 1920 pitch 7680 (/4 1920)
>[339657.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096350]
>[339657.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096350] width 1920 pitch 7680 (/4 1920)
>[339658.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096350]
>[339658.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096350] width 1920 pitch 7680 (/4 1920)
>[339658.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339658.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339658.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096350]
>[339658.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096350] width 1920 pitch 7680 (/4 1920)
>[339658.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339658.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339659.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3096350]
>[339659.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3096350] width 1920 pitch 7680 (/4 1920)
>[339659.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339659.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339659.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339659.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339659.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fee520]
>[339659.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fee520] width 1920 pitch 7680 (/4 1920)
>[339659.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339659.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339659.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339659.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339659.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339659.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339659.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339659.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339663.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dba90]
>[339663.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dba90] width 1920 pitch 7680 (/4 1920)
>[339664.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339664.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339664.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339664.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339671.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[339671.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[339671.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[339671.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[339672.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339672.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339683.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[339683.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[339683.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339683.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339683.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d150]
>[339683.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d150] width 1920 pitch 7680 (/4 1920)
>[339683.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[339684.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[339687.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfcdb0]
>[339687.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfcdb0] width 1920 pitch 7680 (/4 1920)
>[339702.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2e630]
>[339702.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2e630] width 1920 pitch 7680 (/4 1920)
>[339717.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2e630]
>[339717.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2e630] width 1920 pitch 7680 (/4 1920)
>[339727.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339727.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339727.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[339727.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[339727.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339727.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339727.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[339727.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[339762.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[339762.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[339792.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[339792.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[339822.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[339822.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[339837.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[339837.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[339851.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9e7a0]
>[339851.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9e7a0] width 1920 pitch 7680 (/4 1920)
>[339851.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339851.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339851.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339851.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339851.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[339851.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[339852.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[339852.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[339867.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[339867.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[339882.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277cc0]
>[339882.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277cc0] width 1920 pitch 7680 (/4 1920)
>[339897.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[339897.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[339904.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[339904.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[339905.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339905.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339905.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[339905.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[339905.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[339905.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[339912.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[339912.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[339927.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[339927.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[339957.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[339957.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[340002.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c820]
>[340002.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c820] width 1920 pitch 7680 (/4 1920)
>[340017.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[340017.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[340032.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c820]
>[340032.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c820] width 1920 pitch 7680 (/4 1920)
>[340047.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340047.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340062.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[340062.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[340077.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[340077.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[340107.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340107.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340122.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[340122.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[340137.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[340137.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[340152.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[340152.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[340167.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340167.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340182.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c820]
>[340182.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c820] width 1920 pitch 7680 (/4 1920)
>[340197.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[340197.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[340212.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c820]
>[340212.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c820] width 1920 pitch 7680 (/4 1920)
>[340227.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[340227.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[340242.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340242.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340257.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[340257.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[340272.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c820]
>[340272.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c820] width 1920 pitch 7680 (/4 1920)
>[340287.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[340287.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[340302.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[340302.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[340317.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[340317.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[340332.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[340332.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[340347.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309c7a0]
>[340347.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309c7a0] width 1920 pitch 7680 (/4 1920)
>[340362.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[340362.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[340377.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[340377.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[340392.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340392.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340407.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340407.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340422.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78f20]
>[340422.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78f20] width 1920 pitch 7680 (/4 1920)
>[340452.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[340452.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[340482.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340482.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340497.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340497.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340512.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[340512.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[340527.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340527.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340557.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[340557.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[340572.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340572.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340587.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340587.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340602.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340602.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340617.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340617.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340722.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[340722.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[340737.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[340737.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[340752.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[340752.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[340797.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[340797.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[340812.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340812.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340827.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[340827.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[340842.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[340842.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[340857.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[340857.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[340962.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[340962.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[340992.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[340992.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[341007.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[341007.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[341022.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[341022.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[341037.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[341037.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[341052.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[341052.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[341097.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[341097.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[341112.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[341112.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[341127.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[341127.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[341142.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[341142.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[341427.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[341427.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[341457.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[341457.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[341502.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[341502.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[341547.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[341547.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[341622.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[341622.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[341637.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[341637.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[341727.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[341727.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[341742.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[341742.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[341757.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[341757.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[341772.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[341772.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[341802.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[341802.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[341832.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[341832.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[341967.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[341967.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[341982.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[341982.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[342087.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[342087.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[342117.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342117.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342192.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[342192.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[342207.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[342207.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[342372.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[342372.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[342387.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[342387.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[342402.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[342402.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[342462.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[342462.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[342507.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[342507.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[342522.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[342522.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[342552.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342552.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342567.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[342567.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[342597.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[342597.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[342612.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[342612.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[342672.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[342672.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[342687.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5da30]
>[342687.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5da30] width 1920 pitch 7680 (/4 1920)
>[342732.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[342732.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[342762.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[342762.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[342777.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[342777.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[342792.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[342792.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[342822.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342822.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342837.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[342837.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[342882.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[342882.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[342897.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342897.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342957.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[342957.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[342972.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[342972.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[342977.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342977.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342977.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[342977.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[342977.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342977.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342977.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[342977.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[342977.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342977.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342978.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[342978.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[342978.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[342978.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[342978.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[342978.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[342978.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[342978.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[342978.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cdf20]
>[342978.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cdf20] width 1920 pitch 7680 (/4 1920)
>[342978.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0570]
>[342979.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0570] width 1920 pitch 7680 (/4 1920)
>[342987.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611d650]
>[342987.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611d650] width 1920 pitch 7680 (/4 1920)
>[343017.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535e230]
>[343017.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535e230] width 1920 pitch 7680 (/4 1920)
>[343092.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c990]
>[343092.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c990] width 1920 pitch 7680 (/4 1920)
>[343107.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535e230]
>[343107.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535e230] width 1920 pitch 7680 (/4 1920)
>[343122.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611d650]
>[343122.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611d650] width 1920 pitch 7680 (/4 1920)
>[343137.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7e0b0]
>[343137.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7e0b0] width 1920 pitch 7680 (/4 1920)
>[343152.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611d650]
>[343152.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611d650] width 1920 pitch 7680 (/4 1920)
>[343167.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c990]
>[343167.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c990] width 1920 pitch 7680 (/4 1920)
>[343170.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[343170.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[343170.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c39bc0]
>[343170.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c39bc0] width 1920 pitch 7680 (/4 1920)
>[343182.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343182.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343227.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[343227.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[343242.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[343242.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[343257.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[343257.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[343272.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[343272.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[343317.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[343317.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[343332.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[343332.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[343395.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[343395.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[343397.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[343397.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[343397.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54a70]
>[343397.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54a70] width 1920 pitch 7680 (/4 1920)
>[343397.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343397.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343397.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[343397.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[343397.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343398.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343398.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[343398.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[343398.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343398.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343398.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343398.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343398.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[343398.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[343398.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5f10]
>[343398.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5f10] width 1920 pitch 7680 (/4 1920)
>[343422.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343422.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343437.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c990]
>[343437.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c990] width 1920 pitch 7680 (/4 1920)
>[343448.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8d10]
>[343448.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8d10] width 1920 pitch 7680 (/4 1920)
>[343449.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e26a90]
>[343449.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e26a90] width 1920 pitch 7680 (/4 1920)
>[343449.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611d650]
>[343449.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611d650] width 1920 pitch 7680 (/4 1920)
>[343452.619] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[343452.619] (II) RADEON(0): Using hsync ranges from config file
>[343452.619] (II) RADEON(0): Using vrefresh ranges from config file
>[343452.619] (II) RADEON(0): Printing DDC gathered Modelines:
>[343452.619] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[343452.619] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[343452.619] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[343452.619] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[343452.619] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[343452.619] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[343452.619] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[343452.619] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[343452.619] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[343452.619] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[343452.619] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[343452.619] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[343452.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9e3d0]
>[343452.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9e3d0] width 1920 pitch 7680 (/4 1920)
>[343452.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb17f0]
>[343452.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb17f0] width 1920 pitch 7680 (/4 1920)
>[343453.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[343453.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[343454.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb17f0]
>[343454.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb17f0] width 1920 pitch 7680 (/4 1920)
>[343454.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caa460]
>[343454.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caa460] width 1920 pitch 7680 (/4 1920)
>[343455.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7d5e0]
>[343455.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7d5e0] width 1920 pitch 7680 (/4 1920)
>[343455.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab6480]
>[343456.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab6480] width 1920 pitch 7680 (/4 1920)
>[343458.681] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[343458.681] (II) RADEON(0): Using hsync ranges from config file
>[343458.681] (II) RADEON(0): Using vrefresh ranges from config file
>[343458.681] (II) RADEON(0): Printing DDC gathered Modelines:
>[343458.681] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[343458.681] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[343458.681] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[343458.681] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[343458.681] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[343458.681] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[343458.681] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[343458.681] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[343458.681] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[343458.681] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[343458.681] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[343458.681] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[343458.725] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[343458.725] (II) RADEON(0): Using hsync ranges from config file
>[343458.725] (II) RADEON(0): Using vrefresh ranges from config file
>[343458.725] (II) RADEON(0): Printing DDC gathered Modelines:
>[343458.725] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[343458.725] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[343458.725] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[343458.725] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[343458.725] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[343458.725] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[343458.725] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[343458.725] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[343458.725] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[343458.725] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[343458.725] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[343458.725] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[343458.770] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[343458.770] (II) RADEON(0): Using hsync ranges from config file
>[343458.770] (II) RADEON(0): Using vrefresh ranges from config file
>[343458.770] (II) RADEON(0): Printing DDC gathered Modelines:
>[343458.770] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[343458.770] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[343458.770] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[343458.770] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[343458.770] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[343458.770] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[343458.770] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[343458.770] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[343458.770] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[343458.770] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[343458.770] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[343458.770] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[343467.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ebf0]
>[343467.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ebf0] width 1920 pitch 7680 (/4 1920)
>[343472.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[343472.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[343482.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a6d40]
>[343482.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a6d40] width 1920 pitch 7680 (/4 1920)
>[343632.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167270]
>[343632.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167270] width 1920 pitch 7680 (/4 1920)
>[343647.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343647.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343662.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343662.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343677.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[343677.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[343707.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[343707.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[343737.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343737.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343752.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343752.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343767.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343767.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343917.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343917.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343932.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf620]
>[343932.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf620] width 1920 pitch 7680 (/4 1920)
>[343962.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[343962.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[343989.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb600]
>[343989.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb600] width 1920 pitch 7680 (/4 1920)
>[343989.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343989.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343989.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb600]
>[343989.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb600] width 1920 pitch 7680 (/4 1920)
>[343989.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343989.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343989.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb600]
>[343989.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb600] width 1920 pitch 7680 (/4 1920)
>[343989.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343989.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343989.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb600]
>[343989.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb600] width 1920 pitch 7680 (/4 1920)
>[343989.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343989.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343989.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[343989.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[343990.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb600]
>[343990.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb600] width 1920 pitch 7680 (/4 1920)
>[343990.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343990.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343990.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb600]
>[343990.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb600] width 1920 pitch 7680 (/4 1920)
>[343990.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[343990.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[343992.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd8d30]
>[343992.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd8d30] width 1920 pitch 7680 (/4 1920)
>[344007.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf620]
>[344007.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf620] width 1920 pitch 7680 (/4 1920)
>[344022.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd8d30]
>[344022.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd8d30] width 1920 pitch 7680 (/4 1920)
>[344037.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf620]
>[344037.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf620] width 1920 pitch 7680 (/4 1920)
>[344052.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167270]
>[344052.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167270] width 1920 pitch 7680 (/4 1920)
>[344082.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a6d40]
>[344082.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a6d40] width 1920 pitch 7680 (/4 1920)
>[344097.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf620]
>[344097.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf620] width 1920 pitch 7680 (/4 1920)
>[344172.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167270]
>[344172.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167270] width 1920 pitch 7680 (/4 1920)
>[344187.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a6d40]
>[344187.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a6d40] width 1920 pitch 7680 (/4 1920)
>[344277.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aaf620]
>[344277.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aaf620] width 1920 pitch 7680 (/4 1920)
>[344292.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167270]
>[344292.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167270] width 1920 pitch 7680 (/4 1920)
>[344307.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[344307.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[344352.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a6d40]
>[344352.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a6d40] width 1920 pitch 7680 (/4 1920)
>[344590.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[344590.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[344590.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167270]
>[344590.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167270] width 1920 pitch 7680 (/4 1920)
>[344590.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[344590.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[344590.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a6d40]
>[344590.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a6d40] width 1920 pitch 7680 (/4 1920)
>[344590.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611f070]
>[344590.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611f070] width 1920 pitch 7680 (/4 1920)
>[344590.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1a30]
>[344590.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1a30] width 1920 pitch 7680 (/4 1920)
>[344590.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[344590.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[344590.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611f070]
>[344590.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611f070] width 1920 pitch 7680 (/4 1920)
>[344590.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdcb30]
>[344590.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdcb30] width 1920 pitch 7680 (/4 1920)
>[344591.214] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[344591.214] (II) RADEON(0): Using hsync ranges from config file
>[344591.214] (II) RADEON(0): Using vrefresh ranges from config file
>[344591.214] (II) RADEON(0): Printing DDC gathered Modelines:
>[344591.214] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[344591.214] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[344591.214] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[344591.214] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[344591.214] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[344591.214] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[344591.214] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[344591.214] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[344591.214] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[344591.214] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[344591.214] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[344591.214] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[344680.672] (II) RADEON(0): RADEONSaveScreen(2)
>[344680.672] (II) RADEON(0): RADEONSaveScreen(0)
>[347353.455] (II) RADEON(0): RADEONSaveScreen(1)
>[348043.674] (II) RADEON(0): RADEONSaveScreen(2)
>[348043.674] (II) RADEON(0): RADEONSaveScreen(0)
>[348930.703] (II) RADEON(0): RADEONSaveScreen(1)
>[348931.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1edd0]
>[348931.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1edd0] width 1920 pitch 7680 (/4 1920)
>[348976.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[348976.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349006.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1950]
>[349006.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1950] width 1920 pitch 7680 (/4 1920)
>[349036.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349036.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349051.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349051.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349066.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349066.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349081.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1950]
>[349081.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1950] width 1920 pitch 7680 (/4 1920)
>[349096.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349096.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349111.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349111.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349126.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349126.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349141.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349141.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349156.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349156.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349171.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1950]
>[349171.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1950] width 1920 pitch 7680 (/4 1920)
>[349186.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349186.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349201.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1950]
>[349201.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1950] width 1920 pitch 7680 (/4 1920)
>[349216.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349216.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349246.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349246.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349276.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349276.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349291.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349291.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349306.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349306.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349531.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349531.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349546.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349546.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349621.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349621.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349636.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c690]
>[349636.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c690] width 1920 pitch 7680 (/4 1920)
>[349651.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349651.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349666.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da1950]
>[349666.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da1950] width 1920 pitch 7680 (/4 1920)
>[349800.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349800.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349801.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349801.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349802.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349803.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349803.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349803.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349803.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349803.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349803.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349803.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349804.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349804.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349804.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349804.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349805.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c2f0]
>[349805.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c2f0] width 1920 pitch 7680 (/4 1920)
>[349806.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349806.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349806.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349806.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349806.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349806.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349806.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349807.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349807.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349807.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349807.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65e80]
>[349807.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65e80] width 1920 pitch 7680 (/4 1920)
>[349807.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86cf0]
>[349807.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86cf0] width 1920 pitch 7680 (/4 1920)
>[349808.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86cf0]
>[349808.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86cf0] width 1920 pitch 7680 (/4 1920)
>[349813.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86cf0]
>[349813.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86cf0] width 1920 pitch 7680 (/4 1920)
>[349814.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[349814.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[349814.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86cf0]
>[349814.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86cf0] width 1920 pitch 7680 (/4 1920)
>[349951.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a86cf0]
>[349951.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a86cf0] width 1920 pitch 7680 (/4 1920)
>[349966.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d685f0]
>[349966.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d685f0] width 1920 pitch 7680 (/4 1920)
>[349981.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fef80]
>[349981.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fef80] width 1920 pitch 7680 (/4 1920)
>[349996.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536a0d0]
>[349996.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536a0d0] width 1920 pitch 7680 (/4 1920)
>[350046.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350046.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350046.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[350046.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[350046.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350046.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350046.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[350046.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[350046.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350046.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350047.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[350047.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[350047.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350047.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350047.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248f060]
>[350047.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248f060] width 1920 pitch 7680 (/4 1920)
>[350047.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350047.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350047.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350049.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350050.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9e3d0]
>[350050.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9e3d0] width 1920 pitch 7680 (/4 1920)
>[350071.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c990]
>[350071.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c990] width 1920 pitch 7680 (/4 1920)
>[350101.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c990]
>[350101.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c990] width 1920 pitch 7680 (/4 1920)
>[350116.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[350116.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[350131.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[350131.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[350146.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2120]
>[350146.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2120] width 1920 pitch 7680 (/4 1920)
>[350162.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[350162.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[350176.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30152b0]
>[350176.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30152b0] width 1920 pitch 7680 (/4 1920)
>[350221.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[350221.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[350281.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[350281.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[350296.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81380]
>[350296.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81380] width 1920 pitch 7680 (/4 1920)
>[350311.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[350311.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[350326.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[350326.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[350341.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[350341.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[350356.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[350356.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[350371.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[350371.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[350401.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[350401.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[350403.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[350403.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[350403.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[350403.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[350403.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[350403.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[350416.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[350416.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[350431.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[350431.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[350461.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[350461.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[350476.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[350476.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[350551.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[350551.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[350566.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[350566.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[350656.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[350656.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[350671.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[350671.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[350746.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[350746.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[350761.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[350761.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[350806.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[350806.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[350836.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[350836.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[350851.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[350851.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[350866.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[350866.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[350926.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[350926.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[350941.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[350941.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[351001.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[351001.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[351031.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[351031.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[351046.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[351046.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[351126.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[351126.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[351126.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[351126.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[351126.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[351126.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[351126.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[351126.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[351126.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[351126.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[351126.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[351126.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[351127.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[351127.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[351127.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351127.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351127.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[351127.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[351127.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[351127.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[351127.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[351127.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[351127.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351129.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351130.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[351130.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[351136.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351136.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351145.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[351145.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[351145.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[351145.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[351145.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[351145.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[351151.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351151.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351166.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351166.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351181.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351181.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351211.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351211.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351226.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[351226.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[351256.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[351256.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[351316.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[351316.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[351331.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351331.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351346.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[351346.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[351391.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[351391.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[351406.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[351406.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[351421.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[351421.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[351466.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[351466.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[351481.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[351481.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[351511.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[351511.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[351526.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[351526.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[351541.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[351541.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[351556.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[351556.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[351586.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[351586.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[351601.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[351601.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[351646.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[351646.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[351661.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[351661.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[351751.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[351751.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[351766.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[351766.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[351856.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[351856.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[351871.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[351871.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[351916.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[351916.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[351946.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[351946.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[351976.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[351976.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[351991.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[351991.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[352141.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[352141.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[352156.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[352156.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[352201.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[352201.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[352231.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[352231.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[352291.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[352291.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[352306.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[352306.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[352311.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[352311.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[352312.155] [mi] EQ overflowing.  Additional events will be discarded until existing events are processed.
>[352312.155] 
>[352312.155] Backtrace:
>[352312.157] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4650a6]
>[352312.157] 1: /usr/bin/Xorg (mieqEnqueue+0x26b) [0x55111b]
>[352312.157] 2: /usr/bin/Xorg (0x400000+0x48062) [0x448062]
>[352312.157] 3: /usr/lib64/xorg/modules/input/evdev_drv.so (0x7fd42aa1a000+0x60e4) [0x7fd42aa200e4]
>[352312.157] 4: /usr/bin/Xorg (0x400000+0x80557) [0x480557]
>[352312.157] 5: /usr/bin/Xorg (0x400000+0xa4730) [0x4a4730]
>[352312.157] 6: /lib64/libpthread.so.0 (0x7fd42f7d3000+0xefe0) [0x7fd42f7e1fe0]
>[352312.157] 7: /lib64/libc.so.6 (ioctl+0x7) [0x7fd42f0039a7]
>[352312.157] 8: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x31f1a03548]
>[352312.157] 9: /lib64/libdrm.so.2 (drmCommandWriteRead+0x1c) [0x31f1a057bc]
>[352312.157] 10: /lib64/libdrm_radeon.so.1 (0x7fd42db51000+0x1e29) [0x7fd42db52e29]
>[352312.157] 11: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fd42dd5b000+0xd1e6c) [0x7fd42de2ce6c]
>[352312.157] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7fd42dd5b000+0xd2d50) [0x7fd42de2dd50]
>[352312.157] 13: /lib64/libdrm.so.2 (drmHandleEvent+0x91) [0x31f1a07881]
>[352312.157] 14: /usr/bin/Xorg (WakeupHandler+0x6b) [0x43838b]
>[352312.157] 15: /usr/bin/Xorg (WaitForSomething+0x1a4) [0x462634]
>[352312.157] 16: /usr/bin/Xorg (0x400000+0x34111) [0x434111]
>[352312.157] 17: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[352312.157] 18: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x7fd42ef3b735]
>[352312.157] 19: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[352312.157] 
>[352312.157] [mi] These backtraces from mieqEnqueue may point to a culprit higher up the stack.
>[352312.157] [mi] mieq is *NOT* the cause.  It is a victim.
>[352314.086] [mi] Increasing EQ size to 512 to prevent dropped events.
>[352314.086] [mi] EQ processing has resumed after 57 dropped events.
>[352314.086] [mi] This may be caused my a misbehaving driver monopolizing the server's resources.
>[352314.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[352314.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[352314.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[352314.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[352315.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[352315.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[352315.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[352315.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[352315.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[352315.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[352316.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[352316.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[352316.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[352316.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[352316.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[352316.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[352321.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[352321.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[352331.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[352331.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[352331.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[352331.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[352331.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[352331.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[352331.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[352331.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[352366.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[352366.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[352381.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[352381.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[352411.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[352411.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[352426.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[352426.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[352485.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[352485.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[352487.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9390]
>[352487.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9390] width 1920 pitch 7680 (/4 1920)
>[352488.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fbf30]
>[352488.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fbf30] width 1920 pitch 7680 (/4 1920)
>[352502.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[352502.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[352517.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcec10]
>[352517.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcec10] width 1920 pitch 7680 (/4 1920)
>[352547.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ab80]
>[352547.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ab80] width 1920 pitch 7680 (/4 1920)
>[352577.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d85a0]
>[352577.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d85a0] width 1920 pitch 7680 (/4 1920)
>[352592.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfccd0]
>[352592.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfccd0] width 1920 pitch 7680 (/4 1920)
>[352607.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[352607.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[352622.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ab80]
>[352622.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ab80] width 1920 pitch 7680 (/4 1920)
>[352637.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d85a0]
>[352637.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d85a0] width 1920 pitch 7680 (/4 1920)
>[352652.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ab80]
>[352652.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ab80] width 1920 pitch 7680 (/4 1920)
>[352667.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[352667.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[352697.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcec10]
>[352697.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcec10] width 1920 pitch 7680 (/4 1920)
>[352772.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ab80]
>[352772.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ab80] width 1920 pitch 7680 (/4 1920)
>[352789.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ab80]
>[352789.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ab80] width 1920 pitch 7680 (/4 1920)
>[352790.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ab80]
>[352790.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ab80] width 1920 pitch 7680 (/4 1920)
>[352790.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[352790.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[352802.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[352802.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[352817.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[352817.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[352832.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[352832.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[352847.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4a10]
>[352847.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4a10] width 1920 pitch 7680 (/4 1920)
>[352862.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfccd0]
>[352862.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfccd0] width 1920 pitch 7680 (/4 1920)
>[352892.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[352892.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[352922.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[352922.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[352937.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d85a0]
>[352937.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d85a0] width 1920 pitch 7680 (/4 1920)
>[353027.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[353027.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[353042.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[353042.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[353057.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2a610]
>[353057.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2a610] width 1920 pitch 7680 (/4 1920)
>[353072.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[353072.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[353087.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353087.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353147.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[353147.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[353162.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcec10]
>[353162.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcec10] width 1920 pitch 7680 (/4 1920)
>[353327.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d850]
>[353327.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d850] width 1920 pitch 7680 (/4 1920)
>[353342.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[353342.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[353372.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d175f0]
>[353372.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d175f0] width 1920 pitch 7680 (/4 1920)
>[353402.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[353402.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[353459.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50eebc0]
>[353459.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50eebc0] width 1920 pitch 7680 (/4 1920)
>[353460.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a71900]
>[353460.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a71900] width 1920 pitch 7680 (/4 1920)
>[353461.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[353461.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[353461.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[353461.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[353462.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353462.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353462.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353462.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353463.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353464.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353465.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfccd0]
>[353465.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfccd0] width 1920 pitch 7680 (/4 1920)
>[353468.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a1e0]
>[353468.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a1e0] width 1920 pitch 7680 (/4 1920)
>[353468.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353468.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353469.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcec10]
>[353469.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcec10] width 1920 pitch 7680 (/4 1920)
>[353469.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353469.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353469.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcec10]
>[353469.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcec10] width 1920 pitch 7680 (/4 1920)
>[353469.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcec10]
>[353469.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcec10] width 1920 pitch 7680 (/4 1920)
>[353469.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353469.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353470.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[353470.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[353470.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353470.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353470.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353470.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353470.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[353470.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[353552.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[353552.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[353582.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[353582.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[353627.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353627.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353657.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353657.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353702.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[353702.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[353717.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353717.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353822.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[353822.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[353837.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353837.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353897.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353897.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353912.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[353912.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[353942.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353942.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353957.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[353957.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[353972.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[353972.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[353987.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[353987.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354032.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354032.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354047.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354047.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354107.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354107.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354122.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354122.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354227.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354227.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354272.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354272.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354287.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354287.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354302.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354302.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354317.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354317.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354332.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[354332.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354452.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354452.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354512.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354512.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354527.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[354527.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354542.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354542.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354557.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[354557.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354572.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354572.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354587.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[354587.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354602.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354602.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354617.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[354617.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354692.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354692.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354707.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[354707.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[354797.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354797.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354812.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354812.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354887.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354887.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354917.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[354917.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[354962.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354962.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[354977.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[354977.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355007.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[355007.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[355022.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355022.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355037.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355037.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355052.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355052.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355067.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355067.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355142.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355142.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355157.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355157.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355202.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355202.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355217.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355217.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355247.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355247.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355262.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355262.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355277.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355277.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355307.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355307.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355382.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[355382.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[355397.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355397.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355457.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355457.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355472.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[355472.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[355607.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355607.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355637.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355637.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355787.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4c860]
>[355787.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4c860] width 1920 pitch 7680 (/4 1920)
>[355802.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355802.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355892.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355892.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355892.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355892.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355892.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355892.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355893.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[355893.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[355893.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355893.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355893.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[355893.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[355893.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355893.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355922.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355922.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355950.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[355950.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[355950.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[355950.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[355950.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[355950.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[355950.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[355950.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356083.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7130]
>[356083.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7130] width 1920 pitch 7680 (/4 1920)
>[356083.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[356083.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[356083.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7130]
>[356083.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7130] width 1920 pitch 7680 (/4 1920)
>[356083.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[356083.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[356083.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7130]
>[356083.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7130] width 1920 pitch 7680 (/4 1920)
>[356083.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[356083.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[356083.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356083.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356084.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7130]
>[356084.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7130] width 1920 pitch 7680 (/4 1920)
>[356084.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd7130]
>[356086.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd7130] width 1920 pitch 7680 (/4 1920)
>[356086.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[356086.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[356091.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[356091.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[356091.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356091.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356091.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb60f0]
>[356091.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb60f0] width 1920 pitch 7680 (/4 1920)
>[356091.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356091.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356147.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611a2e0]
>[356147.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611a2e0] width 1920 pitch 7680 (/4 1920)
>[356162.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356162.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356237.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbbb0]
>[356237.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbbb0] width 1920 pitch 7680 (/4 1920)
>[356251.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356251.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356251.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356251.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356251.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356251.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356251.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356251.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356251.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356251.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356251.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356252.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356252.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356252.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356252.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356252.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356252.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356252.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356252.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356252.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356252.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356252.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356253.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356253.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356253.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4fb00]
>[356253.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4fb00] width 1920 pitch 7680 (/4 1920)
>[356254.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356254.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356254.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[356254.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[356254.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356254.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356255.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[356255.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[356255.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53685c0]
>[356255.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53685c0] width 1920 pitch 7680 (/4 1920)
>[356260.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356260.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356261.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356261.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356261.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee4360]
>[356261.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee4360] width 1920 pitch 7680 (/4 1920)
>[356379.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356379.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356379.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356379.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356379.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356379.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356379.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526160]
>[356379.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526160] width 1920 pitch 7680 (/4 1920)
>[356379.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356380.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356380.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526160]
>[356380.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526160] width 1920 pitch 7680 (/4 1920)
>[356380.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356380.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356380.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526160]
>[356380.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526160] width 1920 pitch 7680 (/4 1920)
>[356380.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356380.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356380.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356380.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356381.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356381.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356381.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356381.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356381.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356381.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356381.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356382.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356382.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc04d0]
>[356382.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc04d0] width 1920 pitch 7680 (/4 1920)
>[356385.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356385.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356385.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[356385.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[356385.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526160]
>[356385.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526160] width 1920 pitch 7680 (/4 1920)
>[356385.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c0c3d0]
>[356385.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c0c3d0] width 1920 pitch 7680 (/4 1920)
>[356462.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526160]
>[356462.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526160] width 1920 pitch 7680 (/4 1920)
>[356493.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e96f0]
>[356493.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e96f0] width 1920 pitch 7680 (/4 1920)
>[356497.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dc240]
>[356498.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dc240] width 1920 pitch 7680 (/4 1920)
>[356498.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356498.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356498.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dc240]
>[356498.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dc240] width 1920 pitch 7680 (/4 1920)
>[356498.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356498.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356508.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dca9e0]
>[356508.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dca9e0] width 1920 pitch 7680 (/4 1920)
>[356523.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dca9d0]
>[356523.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dca9d0] width 1920 pitch 7680 (/4 1920)
>[356538.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1c1d0]
>[356538.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1c1d0] width 1920 pitch 7680 (/4 1920)
>[356628.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356628.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356643.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356643.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356658.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[356658.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[356718.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7f850]
>[356718.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7f850] width 1920 pitch 7680 (/4 1920)
>[356733.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dc240]
>[356733.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dc240] width 1920 pitch 7680 (/4 1920)
>[356748.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[356748.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[356763.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[356763.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[356793.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[356793.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[356808.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[356808.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[356838.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[356838.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[356853.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a8260]
>[356853.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a8260] width 1920 pitch 7680 (/4 1920)
>[356898.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a8280]
>[356898.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a8280] width 1920 pitch 7680 (/4 1920)
>[356913.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0d50]
>[356913.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0d50] width 1920 pitch 7680 (/4 1920)
>[357018.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbdbb0]
>[357018.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbdbb0] width 1920 pitch 7680 (/4 1920)
>[357033.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f75e0]
>[357033.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f75e0] width 1920 pitch 7680 (/4 1920)
>[357076.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[357076.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[357076.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357076.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357076.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[357076.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[357076.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357076.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357077.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[357077.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[357077.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357077.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357077.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357077.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357078.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357078.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357078.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[357078.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[357078.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357078.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357078.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[357078.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[357079.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40245e0]
>[357079.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40245e0] width 1920 pitch 7680 (/4 1920)
>[357079.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ff70]
>[357079.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ff70] width 1920 pitch 7680 (/4 1920)
>[357116.941] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[357116.941] (II) RADEON(0): Using hsync ranges from config file
>[357116.941] (II) RADEON(0): Using vrefresh ranges from config file
>[357116.941] (II) RADEON(0): Printing DDC gathered Modelines:
>[357116.941] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[357116.941] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[357116.941] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[357116.941] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[357116.941] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[357116.941] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[357116.941] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[357116.941] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[357116.941] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[357116.941] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[357116.941] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[357116.941] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[357117.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c896f0]
>[357117.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c896f0] width 1920 pitch 7680 (/4 1920)
>[357123.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3a6e0]
>[357123.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3a6e0] width 1920 pitch 7680 (/4 1920)
>[357128.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[357128.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[357128.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e894f0]
>[357128.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e894f0] width 1920 pitch 7680 (/4 1920)
>[357128.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e620]
>[357128.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e620] width 1920 pitch 7680 (/4 1920)
>[357128.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caa460]
>[357128.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caa460] width 1920 pitch 7680 (/4 1920)
>[357130.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611e9e0]
>[357130.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611e9e0] width 1920 pitch 7680 (/4 1920)
>[357131.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248ee70]
>[357131.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248ee70] width 1920 pitch 7680 (/4 1920)
>[357131.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[357131.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[357131.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e620]
>[357131.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e620] width 1920 pitch 7680 (/4 1920)
>[357131.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d090]
>[357131.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d090] width 1920 pitch 7680 (/4 1920)
>[357131.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[357131.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[357136.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[357136.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[357136.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[357136.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[357136.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357136.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357136.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357136.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357136.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357136.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357136.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357136.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357136.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357136.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357136.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357136.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357136.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357136.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357136.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357136.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357137.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357137.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357137.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357137.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357137.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357137.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357137.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357137.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357137.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357137.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357138.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357138.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357138.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357138.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357139.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357139.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357140.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357140.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357140.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357141.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357141.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357141.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357141.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357141.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357141.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357141.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357141.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357141.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357141.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357141.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357142.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc670]
>[357142.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc670] width 1920 pitch 7680 (/4 1920)
>[357142.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357142.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357142.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357142.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3113210]
>[357142.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3113210] width 1920 pitch 7680 (/4 1920)
>[357142.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357142.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[357142.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[357142.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357142.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[357142.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[357142.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357142.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[357142.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[357142.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357142.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[357142.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[357142.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357142.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84d20]
>[357142.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84d20] width 1920 pitch 7680 (/4 1920)
>[357142.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f920]
>[357142.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f920] width 1920 pitch 7680 (/4 1920)
>[357147.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357147.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357147.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357147.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357147.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357147.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357147.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357147.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357147.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357147.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357147.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357147.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357147.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cc70]
>[357147.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cc70] width 1920 pitch 7680 (/4 1920)
>[357147.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357147.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9cc70]
>[357147.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9cc70] width 1920 pitch 7680 (/4 1920)
>[357147.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357147.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05770]
>[357149.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05770] width 1920 pitch 7680 (/4 1920)
>[357149.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05770]
>[357149.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05770] width 1920 pitch 7680 (/4 1920)
>[357149.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05770]
>[357149.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05770] width 1920 pitch 7680 (/4 1920)
>[357149.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05770]
>[357149.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05770] width 1920 pitch 7680 (/4 1920)
>[357149.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357149.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357149.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05770]
>[357149.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05770] width 1920 pitch 7680 (/4 1920)
>[357149.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357149.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357149.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d05770]
>[357149.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d05770] width 1920 pitch 7680 (/4 1920)
>[357149.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357149.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357149.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357149.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477860]
>[357149.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477860] width 1920 pitch 7680 (/4 1920)
>[357149.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a79a50]
>[357149.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a79a50] width 1920 pitch 7680 (/4 1920)
>[357152.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251cd30]
>[357152.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251cd30] width 1920 pitch 7680 (/4 1920)
>[357152.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[357152.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[357152.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277930]
>[357152.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277930] width 1920 pitch 7680 (/4 1920)
>[357152.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69f90]
>[357152.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69f90] width 1920 pitch 7680 (/4 1920)
>[357153.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[357153.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[357153.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb0c00]
>[357153.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb0c00] width 1920 pitch 7680 (/4 1920)
>[357153.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d000]
>[357153.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d000] width 1920 pitch 7680 (/4 1920)
>[357153.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1b410]
>[357153.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1b410] width 1920 pitch 7680 (/4 1920)
>[357153.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d000]
>[357153.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d000] width 1920 pitch 7680 (/4 1920)
>[357153.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[357153.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[357153.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4039ce0]
>[357153.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4039ce0] width 1920 pitch 7680 (/4 1920)
>[357153.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[357153.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[357183.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea0270]
>[357183.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea0270] width 1920 pitch 7680 (/4 1920)
>[357213.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bea0]
>[357213.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bea0] width 1920 pitch 7680 (/4 1920)
>[357228.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea0270]
>[357228.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea0270] width 1920 pitch 7680 (/4 1920)
>[357258.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bea0]
>[357258.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bea0] width 1920 pitch 7680 (/4 1920)
>[357378.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[357378.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[357393.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[357393.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[357453.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[357453.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[357468.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[357468.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[357588.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[357588.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[357633.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[357633.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[357648.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[357648.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[357663.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[357663.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[357678.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[357678.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[357693.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[357693.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[357708.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[357708.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[357723.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[357723.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[357753.952] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[357753.952] (II) RADEON(0): Using hsync ranges from config file
>[357753.952] (II) RADEON(0): Using vrefresh ranges from config file
>[357753.952] (II) RADEON(0): Printing DDC gathered Modelines:
>[357753.952] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[357753.952] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[357753.952] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[357753.952] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[357753.952] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[357753.952] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[357753.952] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[357753.952] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[357753.952] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[357753.952] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[357753.952] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[357753.952] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[357844.658] (II) RADEON(0): RADEONSaveScreen(2)
>[357844.658] (II) RADEON(0): RADEONSaveScreen(0)
>[360846.159] (II) AIGLX: Suspending AIGLX clients for VT switch
>[360846.159] (II) RADEON(0): RADEONLeaveVT_KMS
>[360846.159] (II) RADEON(0): Ok, leaving now...
>[360859.169] (II) AIGLX: Resuming AIGLX clients after VT switch
>[360859.169] (II) RADEON(0): RADEONEnterVT_KMS
>[360859.248] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[360859.248] (II) RADEON(0): Using hsync ranges from config file
>[360859.248] (II) RADEON(0): Using vrefresh ranges from config file
>[360859.248] (II) RADEON(0): Printing DDC gathered Modelines:
>[360859.248] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[360859.248] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[360859.248] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[360859.248] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[360859.248] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[360859.248] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[360859.248] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[360859.248] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[360859.248] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[360859.248] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[360859.248] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[360859.248] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[360859.257] (II) RADEON(0): RADEONSaveScreen(2)
>[360859.257] (II) RADEON(0): RADEONSaveScreen(1)
>[360859.257] (EE) evdev: PIXART USB OPTICAL MOUSE: Unable to open evdev device "/dev/input/event14".
>[360859.258] [dix] couldn't enable device 10
>[360859.258] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[360859.258] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[360859.258] (II) UnloadModule: "evdev"
>[360859.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[360859.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[360874.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[360874.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[360879.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[360879.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[360904.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[360904.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[360919.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[360919.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[360934.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[360934.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[360949.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[360949.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361069.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[361069.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[361084.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[361084.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361159.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[361159.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[361174.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[361174.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361249.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[361249.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[361279.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[361279.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361294.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[361294.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[361309.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[361309.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361369.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[361369.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[361384.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[361384.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361399.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[361399.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[361414.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f1d0]
>[361414.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f1d0] width 1920 pitch 7680 (/4 1920)
>[361459.298] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[361459.298] (II) RADEON(0): Using hsync ranges from config file
>[361459.298] (II) RADEON(0): Using vrefresh ranges from config file
>[361459.298] (II) RADEON(0): Printing DDC gathered Modelines:
>[361459.298] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[361459.298] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[361459.298] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[361459.298] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[361459.298] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[361459.298] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[361459.298] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[361459.298] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[361459.298] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[361459.298] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[361459.298] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[361459.298] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[361459.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2569aa0]
>[361459.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2569aa0] width 1920 pitch 7680 (/4 1920)
>[361549.655] (II) RADEON(0): RADEONSaveScreen(2)
>[361549.655] (II) RADEON(0): RADEONSaveScreen(0)
>[364551.164] (II) AIGLX: Suspending AIGLX clients for VT switch
>[364551.164] (II) RADEON(0): RADEONLeaveVT_KMS
>[364551.164] (II) RADEON(0): Ok, leaving now...
>[364564.213] (II) AIGLX: Resuming AIGLX clients after VT switch
>[364564.213] (II) RADEON(0): RADEONEnterVT_KMS
>[364564.253] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[364564.253] (II) RADEON(0): Using hsync ranges from config file
>[364564.253] (II) RADEON(0): Using vrefresh ranges from config file
>[364564.253] (II) RADEON(0): Printing DDC gathered Modelines:
>[364564.253] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[364564.253] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[364564.253] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[364564.253] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[364564.253] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[364564.253] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[364564.253] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[364564.253] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[364564.253] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[364564.253] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[364564.253] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[364564.253] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[364564.260] (II) RADEON(0): RADEONSaveScreen(2)
>[364564.290] (II) RADEON(0): RADEONSaveScreen(1)
>[364564.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474210]
>[364564.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474210] width 1920 pitch 7680 (/4 1920)
>[364569.518] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[364569.518] (II) No input driver specified, ignoring this device.
>[364569.518] (II) This device may have been added with another device file.
>[364569.518] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[364569.518] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[364569.518] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[364569.518] 	Option "XkbRules" "evdev"
>[364569.518] 	Option "XkbModel" "evdev"
>[364569.518] 	Option "XkbLayout" "us"
>[364569.518] 	Option "_source" "server/udev"
>[364569.518] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[364569.518] 	Option "path" "/dev/input/event14"
>[364569.518] 	Option "device" "/dev/input/event14"
>[364569.518] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input49/event14"
>[364569.518] 	Option "driver" "evdev"
>[364569.518] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[364569.518] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[364569.521] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[364569.521] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[364569.521] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[364569.521] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[364569.521] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[364569.521] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[364569.521] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[364569.521] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[364569.521] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[364569.521] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input49/event14"
>[364569.521] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[364569.521] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[364569.521] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[364569.521] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[364569.521] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[364569.521] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[364573.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[364573.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[364573.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[364573.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[364573.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[364573.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[364573.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[364573.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[364573.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[364573.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[364573.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[364573.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[364573.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[364573.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[364573.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[364573.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[364573.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[364573.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[364573.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[364573.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[364573.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[364573.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[364573.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbea0]
>[364573.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbea0] width 1920 pitch 7680 (/4 1920)
>[364574.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d49740]
>[364574.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d49740] width 1920 pitch 7680 (/4 1920)
>[364574.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[364574.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[364574.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b779e0]
>[364574.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b779e0] width 1920 pitch 7680 (/4 1920)
>[364574.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[364574.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[364574.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b779e0]
>[364574.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b779e0] width 1920 pitch 7680 (/4 1920)
>[364574.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[364574.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[364574.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b779e0]
>[364574.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b779e0] width 1920 pitch 7680 (/4 1920)
>[364574.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31540]
>[364574.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31540] width 1920 pitch 7680 (/4 1920)
>[364574.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b779e0]
>[364574.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b779e0] width 1920 pitch 7680 (/4 1920)
>[364574.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb9160]
>[364574.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb9160] width 1920 pitch 7680 (/4 1920)
>[364574.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b779e0]
>[364574.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b779e0] width 1920 pitch 7680 (/4 1920)
>[364574.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb9160]
>[364574.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb9160] width 1920 pitch 7680 (/4 1920)
>[364576.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306a0d0]
>[364576.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306a0d0] width 1920 pitch 7680 (/4 1920)
>[364579.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cef360]
>[364579.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cef360] width 1920 pitch 7680 (/4 1920)
>[364579.771] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[364579.771] (II) RADEON(0): Using hsync ranges from config file
>[364579.771] (II) RADEON(0): Using vrefresh ranges from config file
>[364579.771] (II) RADEON(0): Printing DDC gathered Modelines:
>[364579.771] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[364579.771] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[364579.771] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[364579.771] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[364579.771] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[364579.771] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[364579.771] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[364579.771] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[364579.771] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[364579.771] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[364579.771] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[364579.771] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[364579.816] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[364579.816] (II) RADEON(0): Using hsync ranges from config file
>[364579.816] (II) RADEON(0): Using vrefresh ranges from config file
>[364579.816] (II) RADEON(0): Printing DDC gathered Modelines:
>[364579.816] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[364579.817] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[364579.817] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[364579.817] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[364579.817] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[364579.817] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[364579.817] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[364579.817] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[364579.817] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[364579.817] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[364579.817] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[364579.817] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[364579.864] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[364579.864] (II) RADEON(0): Using hsync ranges from config file
>[364579.864] (II) RADEON(0): Using vrefresh ranges from config file
>[364579.864] (II) RADEON(0): Printing DDC gathered Modelines:
>[364579.864] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[364579.864] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[364579.864] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[364579.864] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[364579.864] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[364579.864] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[364579.864] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[364579.864] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[364579.864] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[364579.864] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[364579.864] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[364579.864] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[364584.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc51f0]
>[364584.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc51f0] width 1920 pitch 7680 (/4 1920)
>[364609.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25474a0]
>[364609.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25474a0] width 1920 pitch 7680 (/4 1920)
>[364639.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[364639.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[364654.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cde00]
>[364654.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cde00] width 1920 pitch 7680 (/4 1920)
>[364669.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[364669.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[364684.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd38a0]
>[364684.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd38a0] width 1920 pitch 7680 (/4 1920)
>[364699.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[364699.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[364789.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cde00]
>[364789.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cde00] width 1920 pitch 7680 (/4 1920)
>[364804.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[364804.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[364864.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[364864.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[364879.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25474a0]
>[364879.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25474a0] width 1920 pitch 7680 (/4 1920)
>[364954.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd38a0]
>[364954.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd38a0] width 1920 pitch 7680 (/4 1920)
>[364969.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cde00]
>[364969.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cde00] width 1920 pitch 7680 (/4 1920)
>[364999.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[364999.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[365029.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd38a0]
>[365029.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd38a0] width 1920 pitch 7680 (/4 1920)
>[365074.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25474a0]
>[365074.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25474a0] width 1920 pitch 7680 (/4 1920)
>[365104.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[365104.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[365164.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25474a0]
>[365164.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25474a0] width 1920 pitch 7680 (/4 1920)
>[365194.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd38a0]
>[365194.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd38a0] width 1920 pitch 7680 (/4 1920)
>[365269.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cde00]
>[365269.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cde00] width 1920 pitch 7680 (/4 1920)
>[365314.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[365314.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[365719.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[365719.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[365734.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac4cc0]
>[365734.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac4cc0] width 1920 pitch 7680 (/4 1920)
>[365749.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[365749.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[365764.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[365764.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[365944.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[365944.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[365959.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[365959.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[366004.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[366004.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[366034.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[366034.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[366079.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[366079.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[366094.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[366094.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[366106.361] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[366106.361] (II) RADEON(0): Using hsync ranges from config file
>[366106.361] (II) RADEON(0): Using vrefresh ranges from config file
>[366106.361] (II) RADEON(0): Printing DDC gathered Modelines:
>[366106.361] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[366106.361] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[366106.361] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[366106.361] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[366106.361] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[366106.361] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[366106.361] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[366106.361] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[366106.361] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[366106.361] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[366106.361] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[366106.361] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[366106.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931fe0]
>[366106.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931fe0] width 1920 pitch 7680 (/4 1920)
>[366109.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1b00]
>[366109.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1b00] width 1920 pitch 7680 (/4 1920)
>[366124.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366124.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366139.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366139.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366229.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366229.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366244.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366244.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366259.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366259.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366274.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366274.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366289.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366289.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366304.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366304.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366379.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366379.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366394.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366394.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366484.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366484.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366529.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366529.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366559.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366559.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366589.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366589.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366679.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[366679.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[366709.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472dd0]
>[366709.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472dd0] width 1920 pitch 7680 (/4 1920)
>[366710.689] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[366710.689] (II) RADEON(0): Using hsync ranges from config file
>[366710.689] (II) RADEON(0): Using vrefresh ranges from config file
>[366710.689] (II) RADEON(0): Printing DDC gathered Modelines:
>[366710.689] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[366710.689] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[366710.689] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[366710.689] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[366710.689] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[366710.689] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[366710.689] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[366710.689] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[366710.689] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[366710.689] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[366710.689] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[366710.689] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[366800.654] (II) RADEON(0): RADEONSaveScreen(2)
>[366800.654] (II) RADEON(0): RADEONSaveScreen(0)
>[368453.651] (II) RADEON(0): RADEONSaveScreen(1)
>[368453.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[368453.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[368459.902] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[368459.902] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[368459.902] (II) UnloadModule: "evdev"
>[368483.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11430]
>[368483.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11430] width 1920 pitch 7680 (/4 1920)
>[368498.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[368498.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[368558.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11430]
>[368558.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11430] width 1920 pitch 7680 (/4 1920)
>[368573.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[368573.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[368663.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11430]
>[368663.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11430] width 1920 pitch 7680 (/4 1920)
>[368678.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[368678.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[368753.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11430]
>[368753.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11430] width 1920 pitch 7680 (/4 1920)
>[368768.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[368768.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[368903.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11430]
>[368903.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11430] width 1920 pitch 7680 (/4 1920)
>[368918.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[368918.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[369008.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d11430]
>[369008.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d11430] width 1920 pitch 7680 (/4 1920)
>[369023.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[369023.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[369059.454] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[369059.454] (II) RADEON(0): Using hsync ranges from config file
>[369059.454] (II) RADEON(0): Using vrefresh ranges from config file
>[369059.454] (II) RADEON(0): Printing DDC gathered Modelines:
>[369059.454] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[369059.454] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[369059.454] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[369059.454] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[369059.454] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[369059.454] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[369059.454] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[369059.454] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[369059.454] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[369059.454] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[369059.454] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[369059.454] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[369149.673] (II) RADEON(0): RADEONSaveScreen(2)
>[369149.673] (II) RADEON(0): RADEONSaveScreen(0)
>[372151.142] (II) AIGLX: Suspending AIGLX clients for VT switch
>[372151.142] (II) RADEON(0): RADEONLeaveVT_KMS
>[372151.142] (II) RADEON(0): Ok, leaving now...
>[372164.189] (II) AIGLX: Resuming AIGLX clients after VT switch
>[372164.189] (II) RADEON(0): RADEONEnterVT_KMS
>[372164.238] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[372164.238] (II) RADEON(0): Using hsync ranges from config file
>[372164.238] (II) RADEON(0): Using vrefresh ranges from config file
>[372164.238] (II) RADEON(0): Printing DDC gathered Modelines:
>[372164.238] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[372164.238] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[372164.238] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[372164.238] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[372164.238] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[372164.238] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[372164.238] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[372164.238] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[372164.238] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[372164.238] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[372164.238] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[372164.238] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[372164.253] (II) RADEON(0): RADEONSaveScreen(2)
>[372164.275] (II) RADEON(0): RADEONSaveScreen(1)
>[372164.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfe30]
>[372164.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfe30] width 1920 pitch 7680 (/4 1920)
>[372179.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5000]
>[372179.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5000] width 1920 pitch 7680 (/4 1920)
>[372184.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[372184.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[372194.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5000]
>[372194.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5000] width 1920 pitch 7680 (/4 1920)
>[372284.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[372284.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[372299.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5000]
>[372299.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5000] width 1920 pitch 7680 (/4 1920)
>[372419.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[372419.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[372420.941] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[372420.941] (II) No input driver specified, ignoring this device.
>[372420.941] (II) This device may have been added with another device file.
>[372420.941] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[372420.941] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[372420.941] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[372420.941] 	Option "XkbRules" "evdev"
>[372420.941] 	Option "XkbModel" "evdev"
>[372420.941] 	Option "XkbLayout" "us"
>[372420.941] 	Option "_source" "server/udev"
>[372420.941] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[372420.941] 	Option "path" "/dev/input/event14"
>[372420.941] 	Option "device" "/dev/input/event14"
>[372420.941] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input50/event14"
>[372420.941] 	Option "driver" "evdev"
>[372420.941] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[372420.941] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[372420.941] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[372420.941] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[372420.941] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[372420.941] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[372420.941] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[372420.941] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[372420.941] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[372420.941] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[372420.941] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[372420.941] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input50/event14"
>[372420.941] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[372420.941] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[372420.943] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[372420.943] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[372420.943] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[372420.943] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[372425.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c6e0]
>[372425.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c6e0] width 1920 pitch 7680 (/4 1920)
>[372425.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86560]
>[372425.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86560] width 1920 pitch 7680 (/4 1920)
>[372425.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372425.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372425.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372425.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372425.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372425.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372425.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372425.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372425.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372425.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372426.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372426.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372426.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372426.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372427.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372427.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372427.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372427.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372427.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372427.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372427.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372427.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372427.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372427.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372427.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372427.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372427.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372427.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372427.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372427.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372427.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372427.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372427.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372427.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372428.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372428.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372428.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372428.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372428.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372428.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372428.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372428.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372428.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372428.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372428.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372428.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372428.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372428.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372428.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372428.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372429.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372429.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372429.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372429.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372429.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372429.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372429.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372429.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372429.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372429.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372429.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372429.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372429.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372429.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372429.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372429.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372429.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372429.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372429.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372429.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372434.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372434.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372467.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[372467.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[372468.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0a150]
>[372468.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0a150] width 1920 pitch 7680 (/4 1920)
>[372468.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[372468.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[372468.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[372468.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[372468.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[372468.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[372468.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[372468.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[372468.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[372468.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[372468.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[372468.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[372468.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[372468.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[372468.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[372468.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[372468.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[372468.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[372468.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[372468.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[372468.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[372468.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[372468.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[372468.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[372470.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402d6b0]
>[372470.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402d6b0] width 1920 pitch 7680 (/4 1920)
>[372470.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcecd0]
>[372470.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcecd0] width 1920 pitch 7680 (/4 1920)
>[372470.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[372470.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[372470.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069e40]
>[372470.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069e40] width 1920 pitch 7680 (/4 1920)
>[372470.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[372470.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[372470.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069e40]
>[372470.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069e40] width 1920 pitch 7680 (/4 1920)
>[372470.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[372470.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[372470.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069e40]
>[372470.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069e40] width 1920 pitch 7680 (/4 1920)
>[372470.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[372470.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[372470.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069e40]
>[372471.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069e40] width 1920 pitch 7680 (/4 1920)
>[372471.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[372471.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[372471.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3069e40]
>[372471.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3069e40] width 1920 pitch 7680 (/4 1920)
>[372471.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[372471.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[372471.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31132b0]
>[372471.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31132b0] width 1920 pitch 7680 (/4 1920)
>[372471.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[372471.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[372471.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31132b0]
>[372471.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31132b0] width 1920 pitch 7680 (/4 1920)
>[372471.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[372471.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[372471.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31132b0]
>[372471.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31132b0] width 1920 pitch 7680 (/4 1920)
>[372471.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[372471.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[372471.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31132b0]
>[372471.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31132b0] width 1920 pitch 7680 (/4 1920)
>[372471.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12f90]
>[372471.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12f90] width 1920 pitch 7680 (/4 1920)
>[372471.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31132b0]
>[372471.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31132b0] width 1920 pitch 7680 (/4 1920)
>[372471.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[372471.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[372471.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31132b0]
>[372471.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31132b0] width 1920 pitch 7680 (/4 1920)
>[372472.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e96890]
>[372472.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e96890] width 1920 pitch 7680 (/4 1920)
>[372473.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393b720]
>[372473.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393b720] width 1920 pitch 7680 (/4 1920)
>[372473.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d4b0]
>[372473.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d4b0] width 1920 pitch 7680 (/4 1920)
>[372473.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372473.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372473.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372473.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372473.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372473.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372473.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372473.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372473.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372473.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372473.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372473.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372473.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372473.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372473.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372473.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372473.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372473.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372473.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372473.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372473.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372473.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372473.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372473.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372474.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfb890]
>[372474.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfb890] width 1920 pitch 7680 (/4 1920)
>[372474.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[372474.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[372474.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[372474.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[372474.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965130]
>[372474.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965130] width 1920 pitch 7680 (/4 1920)
>[372474.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[372474.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[372474.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965130]
>[372474.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965130] width 1920 pitch 7680 (/4 1920)
>[372474.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[372474.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[372474.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965130]
>[372474.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965130] width 1920 pitch 7680 (/4 1920)
>[372474.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[372474.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[372474.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3965130]
>[372474.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3965130] width 1920 pitch 7680 (/4 1920)
>[372474.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04500]
>[372474.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04500] width 1920 pitch 7680 (/4 1920)
>[372474.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6ba80]
>[372474.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6ba80] width 1920 pitch 7680 (/4 1920)
>[372474.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d04500]
>[372474.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d04500] width 1920 pitch 7680 (/4 1920)
>[372478.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372478.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372478.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372478.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372478.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372478.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372478.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372478.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372478.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372478.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372478.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372479.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372479.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372479.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372479.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372479.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372479.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372479.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372479.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372479.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372479.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372479.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372479.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372479.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372479.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372479.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372479.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372479.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372479.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372479.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372479.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[372479.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[372479.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31640c0]
>[372479.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31640c0] width 1920 pitch 7680 (/4 1920)
>[372479.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45d50]
>[372479.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45d50] width 1920 pitch 7680 (/4 1920)
>[372479.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26aa0]
>[372479.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26aa0] width 1920 pitch 7680 (/4 1920)
>[372479.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45d50]
>[372479.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45d50] width 1920 pitch 7680 (/4 1920)
>[372479.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26aa0]
>[372479.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26aa0] width 1920 pitch 7680 (/4 1920)
>[372479.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45d50]
>[372480.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45d50] width 1920 pitch 7680 (/4 1920)
>[372480.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26aa0]
>[372480.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26aa0] width 1920 pitch 7680 (/4 1920)
>[372480.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45d50]
>[372480.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45d50] width 1920 pitch 7680 (/4 1920)
>[372480.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26aa0]
>[372480.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26aa0] width 1920 pitch 7680 (/4 1920)
>[372480.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[372480.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[372480.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d497f0]
>[372480.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d497f0] width 1920 pitch 7680 (/4 1920)
>[372480.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[372480.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[372480.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d497f0]
>[372480.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d497f0] width 1920 pitch 7680 (/4 1920)
>[372480.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[372480.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[372481.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6580]
>[372481.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6580] width 1920 pitch 7680 (/4 1920)
>[372489.089] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[372489.089] (II) RADEON(0): Using hsync ranges from config file
>[372489.089] (II) RADEON(0): Using vrefresh ranges from config file
>[372489.089] (II) RADEON(0): Printing DDC gathered Modelines:
>[372489.089] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[372489.090] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[372489.090] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[372489.090] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[372489.090] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[372489.090] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[372489.090] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[372489.090] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[372489.090] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[372489.090] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[372489.090] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[372489.090] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[372489.135] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[372489.135] (II) RADEON(0): Using hsync ranges from config file
>[372489.135] (II) RADEON(0): Using vrefresh ranges from config file
>[372489.135] (II) RADEON(0): Printing DDC gathered Modelines:
>[372489.135] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[372489.135] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[372489.135] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[372489.135] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[372489.135] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[372489.135] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[372489.135] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[372489.135] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[372489.135] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[372489.135] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[372489.135] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[372489.135] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[372489.179] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[372489.179] (II) RADEON(0): Using hsync ranges from config file
>[372489.179] (II) RADEON(0): Using vrefresh ranges from config file
>[372489.179] (II) RADEON(0): Printing DDC gathered Modelines:
>[372489.179] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[372489.180] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[372489.180] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[372489.180] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[372489.180] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[372489.180] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[372489.180] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[372489.180] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[372489.180] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[372489.180] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[372489.180] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[372489.180] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[372501.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4e800]
>[372501.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4e800] width 1920 pitch 7680 (/4 1920)
>[372513.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372513.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372513.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372513.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372513.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2350]
>[372513.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2350] width 1920 pitch 7680 (/4 1920)
>[372513.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372513.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372513.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2350]
>[372513.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2350] width 1920 pitch 7680 (/4 1920)
>[372513.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372513.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372513.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2350]
>[372513.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2350] width 1920 pitch 7680 (/4 1920)
>[372513.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372513.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372513.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f2350]
>[372513.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f2350] width 1920 pitch 7680 (/4 1920)
>[372513.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372513.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372513.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372513.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372514.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372514.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372514.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372514.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372514.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372514.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372514.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372514.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372514.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372514.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372514.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372514.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372514.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4b490]
>[372514.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4b490] width 1920 pitch 7680 (/4 1920)
>[372514.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372514.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372514.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372514.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372514.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25249f0]
>[372514.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25249f0] width 1920 pitch 7680 (/4 1920)
>[372514.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372514.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372514.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25249f0]
>[372514.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25249f0] width 1920 pitch 7680 (/4 1920)
>[372524.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6c670]
>[372524.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6c670] width 1920 pitch 7680 (/4 1920)
>[372539.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[372539.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[372670.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[372670.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[372670.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c110]
>[372670.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c110] width 1920 pitch 7680 (/4 1920)
>[372670.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6f50]
>[372670.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6f50] width 1920 pitch 7680 (/4 1920)
>[372670.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c110]
>[372670.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c110] width 1920 pitch 7680 (/4 1920)
>[372670.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6f50]
>[372670.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6f50] width 1920 pitch 7680 (/4 1920)
>[372670.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c110]
>[372670.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c110] width 1920 pitch 7680 (/4 1920)
>[372670.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6f50]
>[372670.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6f50] width 1920 pitch 7680 (/4 1920)
>[372670.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c110]
>[372670.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c110] width 1920 pitch 7680 (/4 1920)
>[372670.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6f50]
>[372670.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6f50] width 1920 pitch 7680 (/4 1920)
>[372670.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c110]
>[372670.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c110] width 1920 pitch 7680 (/4 1920)
>[372670.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c110]
>[372670.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c110] width 1920 pitch 7680 (/4 1920)
>[372672.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ca030]
>[372672.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ca030] width 1920 pitch 7680 (/4 1920)
>[372672.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24da520]
>[372672.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24da520] width 1920 pitch 7680 (/4 1920)
>[372672.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ca030]
>[372672.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ca030] width 1920 pitch 7680 (/4 1920)
>[372689.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6f50]
>[372689.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6f50] width 1920 pitch 7680 (/4 1920)
>[372696.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c65140]
>[372696.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c65140] width 1920 pitch 7680 (/4 1920)
>[372696.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da6f50]
>[372696.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da6f50] width 1920 pitch 7680 (/4 1920)
>[372696.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c65140]
>[372696.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c65140] width 1920 pitch 7680 (/4 1920)
>[372696.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfb410]
>[372696.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfb410] width 1920 pitch 7680 (/4 1920)
>[372696.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c65140]
>[372696.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c65140] width 1920 pitch 7680 (/4 1920)
>[372696.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfb410]
>[372696.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfb410] width 1920 pitch 7680 (/4 1920)
>[372696.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c65140]
>[372696.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c65140] width 1920 pitch 7680 (/4 1920)
>[372696.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f88580]
>[372696.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f88580] width 1920 pitch 7680 (/4 1920)
>[372696.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372696.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372696.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372696.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372696.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372696.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372696.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372696.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372696.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372696.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372696.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372696.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372696.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372696.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c9fb0]
>[372696.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c9fb0] width 1920 pitch 7680 (/4 1920)
>[372704.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3290]
>[372704.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3290] width 1920 pitch 7680 (/4 1920)
>[372719.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ff10]
>[372719.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ff10] width 1920 pitch 7680 (/4 1920)
>[372734.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[372734.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[372764.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[372764.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[372779.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[372779.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[372809.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ff10]
>[372809.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ff10] width 1920 pitch 7680 (/4 1920)
>[372839.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[372839.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[372854.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[372854.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[372884.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ff10]
>[372884.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ff10] width 1920 pitch 7680 (/4 1920)
>[372929.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[372929.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[372944.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[372944.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373064.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ff10]
>[373064.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ff10] width 1920 pitch 7680 (/4 1920)
>[373079.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373079.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373109.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2ff10]
>[373109.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2ff10] width 1920 pitch 7680 (/4 1920)
>[373124.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373124.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373169.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373169.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373184.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373184.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373312.844] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[373312.845] (II) RADEON(0): Using hsync ranges from config file
>[373312.845] (II) RADEON(0): Using vrefresh ranges from config file
>[373312.845] (II) RADEON(0): Printing DDC gathered Modelines:
>[373312.845] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[373312.845] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[373312.845] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[373312.845] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[373312.845] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[373312.845] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[373312.845] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[373312.845] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[373312.845] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[373312.845] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[373312.845] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[373312.845] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[373402.654] (II) RADEON(0): RADEONSaveScreen(2)
>[373402.654] (II) RADEON(0): RADEONSaveScreen(0)
>[373672.364] (II) RADEON(0): RADEONSaveScreen(1)
>[373672.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373672.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373677.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373677.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373677.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373677.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373677.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373677.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373677.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373677.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373677.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373677.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373677.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373677.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373677.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373677.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373677.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373677.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373677.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373677.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373678.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373678.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373678.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373678.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373678.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373678.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373678.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373678.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373678.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373678.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373678.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373678.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373678.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373678.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373678.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373678.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373678.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373678.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373678.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373678.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373678.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373678.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373687.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[373687.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[373702.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373702.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373732.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373732.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373852.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[373852.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[373867.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373867.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373942.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373942.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[373957.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[373957.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[374047.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[374047.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[374062.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[374062.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[374077.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[374077.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[374107.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[374107.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[374257.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[374257.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[374272.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[374272.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[374287.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[374287.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[374302.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[374302.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[374347.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[374347.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[374362.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[374362.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[374377.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2e00]
>[374377.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2e00] width 1920 pitch 7680 (/4 1920)
>[374407.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[374407.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[374467.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e86a00]
>[374467.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e86a00] width 1920 pitch 7680 (/4 1920)
>[374497.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4480]
>[374497.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4480] width 1920 pitch 7680 (/4 1920)
>[374617.173] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[374617.174] (II) RADEON(0): Using hsync ranges from config file
>[374617.174] (II) RADEON(0): Using vrefresh ranges from config file
>[374617.174] (II) RADEON(0): Printing DDC gathered Modelines:
>[374617.174] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[374617.174] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[374617.174] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[374617.174] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[374617.174] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[374617.174] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[374617.174] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[374617.174] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[374617.174] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[374617.174] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[374617.174] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[374617.174] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[374617.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac14b0]
>[374617.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac14b0] width 1920 pitch 7680 (/4 1920)
>[374623.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aca0e0]
>[374623.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aca0e0] width 1920 pitch 7680 (/4 1920)
>[374624.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[374624.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[374624.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caac50]
>[374624.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caac50] width 1920 pitch 7680 (/4 1920)
>[374624.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[374624.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[374627.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd6cb0]
>[374627.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd6cb0] width 1920 pitch 7680 (/4 1920)
>[374628.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2482b60]
>[374628.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2482b60] width 1920 pitch 7680 (/4 1920)
>[374628.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c04b90]
>[374628.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c04b90] width 1920 pitch 7680 (/4 1920)
>[374628.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e8a660]
>[374628.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e8a660] width 1920 pitch 7680 (/4 1920)
>[374628.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526160]
>[374628.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526160] width 1920 pitch 7680 (/4 1920)
>[374632.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254b9a0]
>[374632.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254b9a0] width 1920 pitch 7680 (/4 1920)
>[374637.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e04e20]
>[374637.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e04e20] width 1920 pitch 7680 (/4 1920)
>[374647.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e04e20]
>[374647.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e04e20] width 1920 pitch 7680 (/4 1920)
>[374652.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7c010]
>[374652.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7c010] width 1920 pitch 7680 (/4 1920)
>[374654.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f9bf0]
>[374654.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f9bf0] width 1920 pitch 7680 (/4 1920)
>[374655.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab53f0]
>[374655.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab53f0] width 1920 pitch 7680 (/4 1920)
>[374655.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9b820]
>[374655.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9b820] width 1920 pitch 7680 (/4 1920)
>[374655.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab53f0]
>[374655.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab53f0] width 1920 pitch 7680 (/4 1920)
>[374658.731] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[374658.731] (II) RADEON(0): Using hsync ranges from config file
>[374658.731] (II) RADEON(0): Using vrefresh ranges from config file
>[374658.731] (II) RADEON(0): Printing DDC gathered Modelines:
>[374658.731] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[374658.731] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[374658.731] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[374658.731] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[374658.731] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[374658.731] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[374658.731] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[374658.731] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[374658.731] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[374658.731] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[374658.731] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[374658.731] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[374658.774] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[374658.774] (II) RADEON(0): Using hsync ranges from config file
>[374658.774] (II) RADEON(0): Using vrefresh ranges from config file
>[374658.774] (II) RADEON(0): Printing DDC gathered Modelines:
>[374658.775] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[374658.775] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[374658.775] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[374658.775] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[374658.775] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[374658.775] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[374658.775] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[374658.775] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[374658.775] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[374658.775] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[374658.775] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[374658.775] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[374658.823] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[374658.823] (II) RADEON(0): Using hsync ranges from config file
>[374658.823] (II) RADEON(0): Using vrefresh ranges from config file
>[374658.823] (II) RADEON(0): Printing DDC gathered Modelines:
>[374658.823] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[374658.823] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[374658.823] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[374658.823] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[374658.823] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[374658.823] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[374658.823] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[374658.823] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[374658.823] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[374658.823] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[374658.823] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[374658.823] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[374672.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a52900]
>[374672.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a52900] width 1920 pitch 7680 (/4 1920)
>[374677.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4033210]
>[374677.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4033210] width 1920 pitch 7680 (/4 1920)
>[374692.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[374692.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[374752.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[374752.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[374782.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[374782.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[374857.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[374857.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[374887.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[374887.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[374947.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[374947.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[374962.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[374962.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[374992.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[374992.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[375007.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[375007.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[375022.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[375022.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[375052.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[375052.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[375067.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[375067.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[375082.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[375082.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[375157.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c86560]
>[375157.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c86560] width 1920 pitch 7680 (/4 1920)
>[375172.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5f340]
>[375172.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5f340] width 1920 pitch 7680 (/4 1920)
>[375262.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[375262.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[375277.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc51f0]
>[375277.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc51f0] width 1920 pitch 7680 (/4 1920)
>[375307.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[375307.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[375322.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[375322.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[375337.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[375337.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[375352.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[375352.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[375457.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[375457.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[375472.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[375472.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[375592.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[375592.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[375607.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68c20]
>[375607.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68c20] width 1920 pitch 7680 (/4 1920)
>[375622.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[375622.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[375637.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[375637.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[375652.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[375652.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[375667.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68c20]
>[375667.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68c20] width 1920 pitch 7680 (/4 1920)
>[375727.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68c20]
>[375727.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68c20] width 1920 pitch 7680 (/4 1920)
>[375742.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[375742.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[375772.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68c20]
>[375772.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68c20] width 1920 pitch 7680 (/4 1920)
>[375817.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47f90]
>[375817.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47f90] width 1920 pitch 7680 (/4 1920)
>[375832.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc51f0]
>[375832.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc51f0] width 1920 pitch 7680 (/4 1920)
>[375847.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969a90]
>[375847.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969a90] width 1920 pitch 7680 (/4 1920)
>[375922.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47f90]
>[375922.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47f90] width 1920 pitch 7680 (/4 1920)
>[375952.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc51f0]
>[375952.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc51f0] width 1920 pitch 7680 (/4 1920)
>[376012.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969a90]
>[376012.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969a90] width 1920 pitch 7680 (/4 1920)
>[376027.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969a90]
>[376027.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969a90] width 1920 pitch 7680 (/4 1920)
>[376117.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cfa1b0]
>[376117.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cfa1b0] width 1920 pitch 7680 (/4 1920)
>[376132.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f8a7a0]
>[376132.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f8a7a0] width 1920 pitch 7680 (/4 1920)
>[376207.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969a90]
>[376207.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969a90] width 1920 pitch 7680 (/4 1920)
>[376252.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[376252.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[376312.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47f90]
>[376312.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47f90] width 1920 pitch 7680 (/4 1920)
>[376327.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3078b00]
>[376327.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3078b00] width 1920 pitch 7680 (/4 1920)
>[376342.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85520]
>[376342.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85520] width 1920 pitch 7680 (/4 1920)
>[376357.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[376357.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[376446.339] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[376446.340] (II) RADEON(0): Using hsync ranges from config file
>[376446.340] (II) RADEON(0): Using vrefresh ranges from config file
>[376446.340] (II) RADEON(0): Printing DDC gathered Modelines:
>[376446.340] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[376446.340] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[376446.340] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[376446.340] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[376446.340] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[376446.340] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[376446.340] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[376446.340] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[376446.340] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[376446.340] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[376446.340] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[376446.340] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[376446.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[376446.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[376447.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[376447.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[376461.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3931fe0]
>[376461.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3931fe0] width 1920 pitch 7680 (/4 1920)
>[376462.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4007570]
>[376462.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4007570] width 1920 pitch 7680 (/4 1920)
>[376477.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[376477.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[376497.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57290]
>[376497.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57290] width 1920 pitch 7680 (/4 1920)
>[376499.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402d440]
>[376499.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402d440] width 1920 pitch 7680 (/4 1920)
>[376499.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e390]
>[376499.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e390] width 1920 pitch 7680 (/4 1920)
>[376499.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472950]
>[376499.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472950] width 1920 pitch 7680 (/4 1920)
>[376501.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d891d0]
>[376501.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d891d0] width 1920 pitch 7680 (/4 1920)
>[376505.021] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[376505.021] (II) RADEON(0): Using hsync ranges from config file
>[376505.021] (II) RADEON(0): Using vrefresh ranges from config file
>[376505.021] (II) RADEON(0): Printing DDC gathered Modelines:
>[376505.021] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[376505.021] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[376505.021] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[376505.021] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[376505.021] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[376505.021] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[376505.021] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[376505.021] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[376505.021] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[376505.021] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[376505.021] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[376505.021] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[376505.065] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[376505.065] (II) RADEON(0): Using hsync ranges from config file
>[376505.065] (II) RADEON(0): Using vrefresh ranges from config file
>[376505.065] (II) RADEON(0): Printing DDC gathered Modelines:
>[376505.065] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[376505.065] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[376505.065] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[376505.065] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[376505.065] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[376505.065] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[376505.065] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[376505.065] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[376505.065] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[376505.065] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[376505.065] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[376505.065] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[376505.109] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[376505.109] (II) RADEON(0): Using hsync ranges from config file
>[376505.109] (II) RADEON(0): Using vrefresh ranges from config file
>[376505.109] (II) RADEON(0): Printing DDC gathered Modelines:
>[376505.109] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[376505.109] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[376505.109] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[376505.109] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[376505.109] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[376505.109] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[376505.109] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[376505.109] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[376505.109] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[376505.109] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[376505.109] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[376505.109] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[376507.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd5e90]
>[376507.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd5e90] width 1920 pitch 7680 (/4 1920)
>[376521.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf8470]
>[376521.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf8470] width 1920 pitch 7680 (/4 1920)
>[376522.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535dcc0]
>[376522.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535dcc0] width 1920 pitch 7680 (/4 1920)
>[376567.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbea60]
>[376567.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbea60] width 1920 pitch 7680 (/4 1920)
>[376582.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[376582.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[376747.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[376747.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[376762.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[376762.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[376852.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309adc0]
>[376852.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309adc0] width 1920 pitch 7680 (/4 1920)
>[376867.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[376867.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[376972.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[376972.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[377002.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[377002.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[377047.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309adc0]
>[377047.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309adc0] width 1920 pitch 7680 (/4 1920)
>[377092.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309adc0]
>[377092.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309adc0] width 1920 pitch 7680 (/4 1920)
>[377137.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9580]
>[377137.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9580] width 1920 pitch 7680 (/4 1920)
>[377152.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[377152.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[377167.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaf40]
>[377167.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaf40] width 1920 pitch 7680 (/4 1920)
>[377182.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[377182.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[377257.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26e50]
>[377257.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26e50] width 1920 pitch 7680 (/4 1920)
>[377287.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[377287.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[377302.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e210]
>[377302.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e210] width 1920 pitch 7680 (/4 1920)
>[377317.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e210]
>[377317.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e210] width 1920 pitch 7680 (/4 1920)
>[377362.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[377362.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[377392.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26e50]
>[377392.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26e50] width 1920 pitch 7680 (/4 1920)
>[377467.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[377467.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[377497.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377497.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377632.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbea60]
>[377632.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbea60] width 1920 pitch 7680 (/4 1920)
>[377647.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377647.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377662.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[377662.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[377692.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbea60]
>[377692.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbea60] width 1920 pitch 7680 (/4 1920)
>[377707.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[377707.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[377722.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbea60]
>[377722.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbea60] width 1920 pitch 7680 (/4 1920)
>[377737.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[377737.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[377752.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbea60]
>[377752.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbea60] width 1920 pitch 7680 (/4 1920)
>[377842.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377842.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377857.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377857.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377887.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377887.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377902.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[377902.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[377932.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[377932.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[377947.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377947.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377962.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[377962.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[377977.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[377977.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[377992.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[377992.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[378007.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378007.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378022.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378022.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378052.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[378052.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[378067.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[378067.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[378082.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[378082.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[378097.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[378097.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[378112.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd6600]
>[378112.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd6600] width 1920 pitch 7680 (/4 1920)
>[378127.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[378127.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[378142.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378142.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378157.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378157.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378187.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3060]
>[378187.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3060] width 1920 pitch 7680 (/4 1920)
>[378202.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[378202.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[378217.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378217.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378232.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[378232.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[378262.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378262.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378277.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378277.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378292.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378292.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378307.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378307.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378337.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378337.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378352.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378352.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378367.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[378367.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[378382.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[378382.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[378397.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc1480]
>[378397.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc1480] width 1920 pitch 7680 (/4 1920)
>[378427.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378427.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378442.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[378442.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[378457.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[378457.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[378472.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[378472.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[378487.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378487.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378502.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[378502.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[378517.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378517.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378592.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378592.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378607.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378607.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378622.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[378622.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[378637.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[378637.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[378652.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[378652.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[378667.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[378667.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[378727.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[378727.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[378742.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378742.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378757.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[378757.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[378772.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[378772.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[378802.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[378802.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[378817.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378817.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378892.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378892.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378907.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378907.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378937.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[378937.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[378952.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[378952.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[379012.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[379012.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[379042.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[379042.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[379072.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[379072.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[379087.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[379087.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[379192.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[379192.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[379207.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[379207.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[379252.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[379252.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[379267.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[379267.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[379357.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[379357.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[379372.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[379372.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[379507.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[379507.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[379537.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[379537.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[379597.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[379597.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[379612.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[379612.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[379882.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c030]
>[379882.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c030] width 1920 pitch 7680 (/4 1920)
>[379897.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[379897.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[379957.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[379957.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[379972.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[379972.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[379987.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[379987.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[380137.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9580]
>[380137.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9580] width 1920 pitch 7680 (/4 1920)
>[380152.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa750]
>[380152.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa750] width 1920 pitch 7680 (/4 1920)
>[380167.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[380167.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[380182.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa750]
>[380182.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa750] width 1920 pitch 7680 (/4 1920)
>[380197.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9580]
>[380197.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9580] width 1920 pitch 7680 (/4 1920)
>[380212.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa750]
>[380212.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa750] width 1920 pitch 7680 (/4 1920)
>[380422.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[380422.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[380437.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa750]
>[380437.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa750] width 1920 pitch 7680 (/4 1920)
>[380662.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[380662.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[380677.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[380677.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[380707.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[380707.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[380722.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[380722.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[380797.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[380797.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[380812.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[380812.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[380932.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[380932.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[380947.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[380947.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381022.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381022.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381037.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381037.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381067.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381067.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381082.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381082.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381142.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[381142.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381157.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[381157.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381172.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381172.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381217.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381217.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381292.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381292.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381322.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381322.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381337.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381337.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381352.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[381352.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381457.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[381457.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381472.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[381472.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381532.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[381532.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[381547.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381547.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381607.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381607.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381637.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381637.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381682.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ee640]
>[381682.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ee640] width 1920 pitch 7680 (/4 1920)
>[381697.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062f50]
>[381697.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062f50] width 1920 pitch 7680 (/4 1920)
>[381712.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381712.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381727.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82c70]
>[381727.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82c70] width 1920 pitch 7680 (/4 1920)
>[381757.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8b080]
>[381757.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8b080] width 1920 pitch 7680 (/4 1920)
>[381817.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[381817.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[381832.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[381832.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[381847.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[381847.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[381862.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381862.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381877.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[381877.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[381892.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[381892.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[381937.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[381937.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[381952.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[381952.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[381967.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[381967.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[382057.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382057.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382087.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382087.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382237.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382237.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382252.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382252.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382282.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[382282.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[382297.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[382297.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[382312.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382312.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382327.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382327.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382357.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382357.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382372.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382372.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382417.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382417.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382432.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[382432.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[382642.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382642.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382657.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382657.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382732.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382732.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382747.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382747.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382762.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[382762.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[382777.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[382777.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[382837.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382837.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382852.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382852.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382882.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382882.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[382897.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[382897.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383017.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309adc0]
>[383017.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309adc0] width 1920 pitch 7680 (/4 1920)
>[383032.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[383032.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[383047.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383047.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383062.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26e50]
>[383062.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26e50] width 1920 pitch 7680 (/4 1920)
>[383077.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26e50]
>[383077.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26e50] width 1920 pitch 7680 (/4 1920)
>[383092.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383092.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383152.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26e50]
>[383152.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26e50] width 1920 pitch 7680 (/4 1920)
>[383167.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383167.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383257.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383257.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383272.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383272.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383302.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383302.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383317.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383317.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383332.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3060c50]
>[383332.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3060c50] width 1920 pitch 7680 (/4 1920)
>[383347.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383347.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383362.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383362.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383377.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[383377.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[383393.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[383393.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[383407.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383407.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383422.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[383422.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[383437.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f26e50]
>[383437.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f26e50] width 1920 pitch 7680 (/4 1920)
>[383557.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[383557.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[383572.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383572.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383602.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383602.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383617.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383617.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383707.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383707.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383722.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383722.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383752.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383752.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383767.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383767.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383782.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383782.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383797.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383797.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383827.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[383827.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[383842.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[383842.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[383872.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383872.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383887.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383887.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383902.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[383902.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[383932.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[383932.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[383947.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383947.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383962.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[383962.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[383992.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[383992.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[384037.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384037.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384052.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2545410]
>[384052.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2545410] width 1920 pitch 7680 (/4 1920)
>[384067.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400b060]
>[384067.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400b060] width 1920 pitch 7680 (/4 1920)
>[384082.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3112b10]
>[384082.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3112b10] width 1920 pitch 7680 (/4 1920)
>[384112.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25771e0]
>[384112.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25771e0] width 1920 pitch 7680 (/4 1920)
>[384127.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384127.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384202.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384202.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384217.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384217.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384232.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[384232.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[384247.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c030]
>[384247.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c030] width 1920 pitch 7680 (/4 1920)
>[384337.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384337.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384352.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c030]
>[384352.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c030] width 1920 pitch 7680 (/4 1920)
>[384397.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384397.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384427.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384427.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384472.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384472.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384502.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[384502.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[384532.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384532.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384547.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[384547.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[384652.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[384652.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[384667.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[384667.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[384997.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f05fd0]
>[384997.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f05fd0] width 1920 pitch 7680 (/4 1920)
>[385012.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[385012.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[385042.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbea60]
>[385042.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbea60] width 1920 pitch 7680 (/4 1920)
>[385057.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa750]
>[385057.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa750] width 1920 pitch 7680 (/4 1920)
>[385192.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5030]
>[385192.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5030] width 1920 pitch 7680 (/4 1920)
>[385207.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c21e50]
>[385207.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c21e50] width 1920 pitch 7680 (/4 1920)
>[385327.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385327.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385342.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[385342.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[385417.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385417.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385432.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5364620]
>[385432.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5364620] width 1920 pitch 7680 (/4 1920)
>[385462.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a72b0]
>[385462.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a72b0] width 1920 pitch 7680 (/4 1920)
>[385507.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385507.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385522.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385522.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385537.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[385537.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[385582.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385582.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385597.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385597.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385612.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385612.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385642.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385642.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385672.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9580]
>[385672.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9580] width 1920 pitch 7680 (/4 1920)
>[385702.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385702.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385777.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[385777.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[385792.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9580]
>[385792.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9580] width 1920 pitch 7680 (/4 1920)
>[386047.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[386047.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[386062.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b13530]
>[386062.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b13530] width 1920 pitch 7680 (/4 1920)
>[386122.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3c030]
>[386122.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3c030] width 1920 pitch 7680 (/4 1920)
>[386152.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ee640]
>[386152.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ee640] width 1920 pitch 7680 (/4 1920)
>[386167.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88100]
>[386167.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88100] width 1920 pitch 7680 (/4 1920)
>[386257.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386257.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386272.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386272.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386287.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386287.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386317.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386317.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386332.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386332.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386347.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386347.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386362.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e210]
>[386362.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e210] width 1920 pitch 7680 (/4 1920)
>[386377.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386377.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386392.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e210]
>[386392.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e210] width 1920 pitch 7680 (/4 1920)
>[386422.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386422.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386437.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386437.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386467.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7e210]
>[386467.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7e210] width 1920 pitch 7680 (/4 1920)
>[386482.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301b2d0]
>[386482.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301b2d0] width 1920 pitch 7680 (/4 1920)
>[386497.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82c70]
>[386497.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82c70] width 1920 pitch 7680 (/4 1920)
>[386512.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386512.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386572.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c2f0]
>[386572.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c2f0] width 1920 pitch 7680 (/4 1920)
>[386587.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386587.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386602.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5030]
>[386602.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5030] width 1920 pitch 7680 (/4 1920)
>[386617.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386617.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386632.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5030]
>[386632.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5030] width 1920 pitch 7680 (/4 1920)
>[386647.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5030]
>[386647.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5030] width 1920 pitch 7680 (/4 1920)
>[386662.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5030]
>[386662.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5030] width 1920 pitch 7680 (/4 1920)
>[386707.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386707.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386722.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386722.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386737.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd5030]
>[386737.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd5030] width 1920 pitch 7680 (/4 1920)
>[386752.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386752.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386767.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8b080]
>[386767.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8b080] width 1920 pitch 7680 (/4 1920)
>[386797.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386797.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386812.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386812.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386827.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386827.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386842.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386842.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386857.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386857.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386872.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386872.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386887.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386887.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386902.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535dcc0]
>[386902.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535dcc0] width 1920 pitch 7680 (/4 1920)
>[386917.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386917.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[386932.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76a40]
>[386932.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76a40] width 1920 pitch 7680 (/4 1920)
>[386962.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[386962.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[386977.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c2f0]
>[386977.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c2f0] width 1920 pitch 7680 (/4 1920)
>[386992.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941130]
>[386992.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941130] width 1920 pitch 7680 (/4 1920)
>[387002.186] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[387002.186] (II) RADEON(0): Using hsync ranges from config file
>[387002.186] (II) RADEON(0): Using vrefresh ranges from config file
>[387002.186] (II) RADEON(0): Printing DDC gathered Modelines:
>[387002.186] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[387002.186] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[387002.186] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[387002.186] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[387002.186] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[387002.186] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[387002.186] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[387002.186] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[387002.186] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[387002.186] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[387002.186] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[387002.186] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[387002.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3660]
>[387002.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3660] width 1920 pitch 7680 (/4 1920)
>[387002.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3660]
>[387002.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3660] width 1920 pitch 7680 (/4 1920)
>[387002.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3660]
>[387002.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3660] width 1920 pitch 7680 (/4 1920)
>[387002.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3660]
>[387002.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3660] width 1920 pitch 7680 (/4 1920)
>[387002.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca3660]
>[387002.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca3660] width 1920 pitch 7680 (/4 1920)
>[387002.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2e30]
>[387002.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2e30] width 1920 pitch 7680 (/4 1920)
>[387002.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387002.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387002.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2e30]
>[387002.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2e30] width 1920 pitch 7680 (/4 1920)
>[387007.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518b00]
>[387007.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518b00] width 1920 pitch 7680 (/4 1920)
>[387052.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfce10]
>[387052.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfce10] width 1920 pitch 7680 (/4 1920)
>[387067.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca0d80]
>[387067.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca0d80] width 1920 pitch 7680 (/4 1920)
>[387086.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387086.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[387086.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[387086.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52ff800]
>[387086.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52ff800] width 1920 pitch 7680 (/4 1920)
>[387097.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69150]
>[387097.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69150] width 1920 pitch 7680 (/4 1920)
>[387101.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03740]
>[387101.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03740] width 1920 pitch 7680 (/4 1920)
>[387101.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914dc0]
>[387101.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914dc0] width 1920 pitch 7680 (/4 1920)
>[387101.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024e90]
>[387101.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024e90] width 1920 pitch 7680 (/4 1920)
>[387101.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914dc0]
>[387101.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914dc0] width 1920 pitch 7680 (/4 1920)
>[387101.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024e90]
>[387101.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024e90] width 1920 pitch 7680 (/4 1920)
>[387101.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914dc0]
>[387101.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914dc0] width 1920 pitch 7680 (/4 1920)
>[387102.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024e90]
>[387102.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024e90] width 1920 pitch 7680 (/4 1920)
>[387102.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914dc0]
>[387102.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914dc0] width 1920 pitch 7680 (/4 1920)
>[387102.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024e90]
>[387102.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024e90] width 1920 pitch 7680 (/4 1920)
>[387102.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914dc0]
>[387102.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914dc0] width 1920 pitch 7680 (/4 1920)
>[387102.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024e90]
>[387102.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024e90] width 1920 pitch 7680 (/4 1920)
>[387102.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3914dc0]
>[387102.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3914dc0] width 1920 pitch 7680 (/4 1920)
>[387102.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024e90]
>[387102.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024e90] width 1920 pitch 7680 (/4 1920)
>[387112.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45400]
>[387112.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45400] width 1920 pitch 7680 (/4 1920)
>[387127.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[387127.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[387172.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[387172.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[387187.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4d70]
>[387187.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4d70] width 1920 pitch 7680 (/4 1920)
>[387202.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[387202.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[387217.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5fb0]
>[387217.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5fb0] width 1920 pitch 7680 (/4 1920)
>[387320.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[387320.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[387320.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda700]
>[387320.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda700] width 1920 pitch 7680 (/4 1920)
>[387320.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250da90]
>[387320.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250da90] width 1920 pitch 7680 (/4 1920)
>[387320.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9720]
>[387320.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9720] width 1920 pitch 7680 (/4 1920)
>[387427.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[387427.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[387442.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[387442.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[387562.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[387562.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[387577.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[387577.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[387607.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[387607.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[387622.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[387622.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[387667.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[387667.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[387697.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[387697.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[387757.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[387757.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[387772.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[387772.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[387926.515] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[387926.515] (II) RADEON(0): Using hsync ranges from config file
>[387926.515] (II) RADEON(0): Using vrefresh ranges from config file
>[387926.515] (II) RADEON(0): Printing DDC gathered Modelines:
>[387926.515] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[387926.515] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[387926.515] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[387926.515] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[387926.515] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[387926.515] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[387926.515] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[387926.515] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[387926.515] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[387926.515] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[387926.515] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[387926.515] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[388016.654] (II) RADEON(0): RADEONSaveScreen(2)
>[388016.654] (II) RADEON(0): RADEONSaveScreen(0)
>[389413.307] (II) RADEON(0): RADEONSaveScreen(1)
>[389413.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389413.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389413.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[389413.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[389413.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389413.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389413.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[389413.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[389413.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389413.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389413.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[389414.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[389414.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389414.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389414.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[389414.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[389414.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389414.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389414.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[389414.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[389414.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389414.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389414.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[389414.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[389414.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[389414.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[389414.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45400]
>[389414.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45400] width 1920 pitch 7680 (/4 1920)
>[389414.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5d5c0]
>[389414.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5d5c0] width 1920 pitch 7680 (/4 1920)
>[389414.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45400]
>[389414.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45400] width 1920 pitch 7680 (/4 1920)
>[389415.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f578b0]
>[389415.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f578b0] width 1920 pitch 7680 (/4 1920)
>[389415.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f578b0]
>[389415.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f578b0] width 1920 pitch 7680 (/4 1920)
>[389415.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f4050]
>[389415.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f4050] width 1920 pitch 7680 (/4 1920)
>[389415.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[389415.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[389415.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389415.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389415.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[389415.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[389416.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389416.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389416.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[389416.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[389416.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389416.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389416.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[389416.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[389416.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389416.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389416.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[389416.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[389416.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389416.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389416.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[389416.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[389416.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92350]
>[389416.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92350] width 1920 pitch 7680 (/4 1920)
>[389417.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4c10]
>[389417.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4c10] width 1920 pitch 7680 (/4 1920)
>[389417.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[389417.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[389417.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[389417.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[389417.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[389417.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[389417.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[389417.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[389417.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[389417.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[389417.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[389417.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[389417.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[389417.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[389417.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[389417.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[389417.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bd360]
>[389417.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bd360] width 1920 pitch 7680 (/4 1920)
>[389417.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[389417.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[389417.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252acd0]
>[389417.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252acd0] width 1920 pitch 7680 (/4 1920)
>[389417.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39c2490]
>[389417.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39c2490] width 1920 pitch 7680 (/4 1920)
>[389417.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252acd0]
>[389418.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252acd0] width 1920 pitch 7680 (/4 1920)
>[389418.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[389418.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[389418.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0be0]
>[389418.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0be0] width 1920 pitch 7680 (/4 1920)
>[389418.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[389418.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[389418.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0be0]
>[389418.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0be0] width 1920 pitch 7680 (/4 1920)
>[389418.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[389418.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[389418.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0be0]
>[389418.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0be0] width 1920 pitch 7680 (/4 1920)
>[389418.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c36110]
>[389418.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c36110] width 1920 pitch 7680 (/4 1920)
>[389418.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0be0]
>[389418.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0be0] width 1920 pitch 7680 (/4 1920)
>[389418.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x254bc30]
>[389418.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x254bc30] width 1920 pitch 7680 (/4 1920)
>[389418.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0be0]
>[389418.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0be0] width 1920 pitch 7680 (/4 1920)
>[389418.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c28fc0]
>[389418.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c28fc0] width 1920 pitch 7680 (/4 1920)
>[389422.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c437f0]
>[389422.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c437f0] width 1920 pitch 7680 (/4 1920)
>[389423.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f400]
>[389423.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f400] width 1920 pitch 7680 (/4 1920)
>[389423.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1020]
>[389423.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1020] width 1920 pitch 7680 (/4 1920)
>[389423.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec5f0]
>[389423.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec5f0] width 1920 pitch 7680 (/4 1920)
>[389435.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5fb0]
>[389435.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5fb0] width 1920 pitch 7680 (/4 1920)
>[389443.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3908fd0]
>[389443.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3908fd0] width 1920 pitch 7680 (/4 1920)
>[389455.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb47c0]
>[389455.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb47c0] width 1920 pitch 7680 (/4 1920)
>[389458.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1750]
>[389458.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1750] width 1920 pitch 7680 (/4 1920)
>[389473.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5fb0]
>[389473.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5fb0] width 1920 pitch 7680 (/4 1920)
>[389480.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17ea0]
>[389480.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17ea0] width 1920 pitch 7680 (/4 1920)
>[389480.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403f050]
>[389480.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403f050] width 1920 pitch 7680 (/4 1920)
>[389480.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403f050]
>[389480.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403f050] width 1920 pitch 7680 (/4 1920)
>[389480.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cf00]
>[389480.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cf00] width 1920 pitch 7680 (/4 1920)
>[389480.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cf00]
>[389480.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cf00] width 1920 pitch 7680 (/4 1920)
>[389480.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cf00]
>[389480.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cf00] width 1920 pitch 7680 (/4 1920)
>[389480.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cf00]
>[389480.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cf00] width 1920 pitch 7680 (/4 1920)
>[389480.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cf00]
>[389480.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cf00] width 1920 pitch 7680 (/4 1920)
>[389480.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389480.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389480.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cf00]
>[389480.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cf00] width 1920 pitch 7680 (/4 1920)
>[389488.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c4a0]
>[389488.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c4a0] width 1920 pitch 7680 (/4 1920)
>[389503.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e58c0]
>[389503.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e58c0] width 1920 pitch 7680 (/4 1920)
>[389518.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5fb0]
>[389518.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5fb0] width 1920 pitch 7680 (/4 1920)
>[389533.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb47c0]
>[389533.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb47c0] width 1920 pitch 7680 (/4 1920)
>[389548.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b8c10]
>[389548.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b8c10] width 1920 pitch 7680 (/4 1920)
>[389563.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c894c0]
>[389563.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c894c0] width 1920 pitch 7680 (/4 1920)
>[389578.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fc100]
>[389578.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fc100] width 1920 pitch 7680 (/4 1920)
>[389593.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31039d0]
>[389593.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31039d0] width 1920 pitch 7680 (/4 1920)
>[389608.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301b340]
>[389608.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301b340] width 1920 pitch 7680 (/4 1920)
>[389653.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e58c0]
>[389653.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e58c0] width 1920 pitch 7680 (/4 1920)
>[389668.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0a2a0]
>[389668.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0a2a0] width 1920 pitch 7680 (/4 1920)
>[389683.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3908fd0]
>[389683.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3908fd0] width 1920 pitch 7680 (/4 1920)
>[389713.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce6a80]
>[389713.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce6a80] width 1920 pitch 7680 (/4 1920)
>[389788.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473350]
>[389788.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473350] width 1920 pitch 7680 (/4 1920)
>[389803.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389803.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389833.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e58c0]
>[389833.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e58c0] width 1920 pitch 7680 (/4 1920)
>[389887.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13700]
>[389887.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13700] width 1920 pitch 7680 (/4 1920)
>[389887.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce6a80]
>[389887.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce6a80] width 1920 pitch 7680 (/4 1920)
>[389887.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389887.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389887.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389887.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389887.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389888.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8c30]
>[389888.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8c30] width 1920 pitch 7680 (/4 1920)
>[389888.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6b7d0]
>[389888.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6b7d0] width 1920 pitch 7680 (/4 1920)
>[389892.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ceaa0]
>[389892.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ceaa0] width 1920 pitch 7680 (/4 1920)
>[389893.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529080]
>[389893.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529080] width 1920 pitch 7680 (/4 1920)
>[389896.031] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[389896.031] (II) RADEON(0): Using hsync ranges from config file
>[389896.031] (II) RADEON(0): Using vrefresh ranges from config file
>[389896.031] (II) RADEON(0): Printing DDC gathered Modelines:
>[389896.031] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[389896.031] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[389896.031] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[389896.031] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[389896.031] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[389896.031] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[389896.031] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[389896.031] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[389896.031] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[389896.031] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[389896.031] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[389896.031] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[389896.074] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[389896.074] (II) RADEON(0): Using hsync ranges from config file
>[389896.074] (II) RADEON(0): Using vrefresh ranges from config file
>[389896.074] (II) RADEON(0): Printing DDC gathered Modelines:
>[389896.074] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[389896.074] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[389896.074] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[389896.074] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[389896.074] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[389896.074] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[389896.074] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[389896.075] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[389896.075] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[389896.075] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[389896.075] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[389896.075] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[389896.119] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[389896.119] (II) RADEON(0): Using hsync ranges from config file
>[389896.119] (II) RADEON(0): Using vrefresh ranges from config file
>[389896.119] (II) RADEON(0): Printing DDC gathered Modelines:
>[389896.119] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[389896.119] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[389896.119] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[389896.119] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[389896.119] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[389896.119] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[389896.119] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[389896.119] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[389896.119] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[389896.119] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[389896.119] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[389896.119] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[389908.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4ddd0]
>[389908.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4ddd0] width 1920 pitch 7680 (/4 1920)
>[389912.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a38ee0]
>[389912.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a38ee0] width 1920 pitch 7680 (/4 1920)
>[389938.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a930]
>[389938.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a930] width 1920 pitch 7680 (/4 1920)
>[389953.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1650]
>[389953.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1650] width 1920 pitch 7680 (/4 1920)
>[389968.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[389968.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[389983.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[389983.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[389998.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[389998.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390043.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1650]
>[390043.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1650] width 1920 pitch 7680 (/4 1920)
>[390058.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1650]
>[390058.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1650] width 1920 pitch 7680 (/4 1920)
>[390073.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390073.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390088.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b85510]
>[390088.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b85510] width 1920 pitch 7680 (/4 1920)
>[390133.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b14130]
>[390133.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b14130] width 1920 pitch 7680 (/4 1920)
>[390133.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1650]
>[390133.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1650] width 1920 pitch 7680 (/4 1920)
>[390133.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1650]
>[390133.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1650] width 1920 pitch 7680 (/4 1920)
>[390134.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390134.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390134.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1650]
>[390134.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1650] width 1920 pitch 7680 (/4 1920)
>[390136.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485ae0]
>[390136.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485ae0] width 1920 pitch 7680 (/4 1920)
>[390137.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485ab0]
>[390137.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485ab0] width 1920 pitch 7680 (/4 1920)
>[390137.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92780]
>[390137.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92780] width 1920 pitch 7680 (/4 1920)
>[390137.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fdb0]
>[390137.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fdb0] width 1920 pitch 7680 (/4 1920)
>[390137.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a489b0]
>[390137.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a489b0] width 1920 pitch 7680 (/4 1920)
>[390137.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92760]
>[390137.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92760] width 1920 pitch 7680 (/4 1920)
>[390137.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a489b0]
>[390137.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a489b0] width 1920 pitch 7680 (/4 1920)
>[390137.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92760]
>[390137.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92760] width 1920 pitch 7680 (/4 1920)
>[390137.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fdb0]
>[390137.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fdb0] width 1920 pitch 7680 (/4 1920)
>[390137.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b92760]
>[390137.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b92760] width 1920 pitch 7680 (/4 1920)
>[390137.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fdb0]
>[390137.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fdb0] width 1920 pitch 7680 (/4 1920)
>[390139.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390139.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390139.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390139.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390139.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390139.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390139.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390139.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390139.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390139.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390139.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390139.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390139.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2572430]
>[390139.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2572430] width 1920 pitch 7680 (/4 1920)
>[390139.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390139.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390143.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390143.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390143.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390143.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390143.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390143.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390143.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390143.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390143.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390143.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390143.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390143.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390143.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390143.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390143.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390143.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390143.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8a890]
>[390143.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8a890] width 1920 pitch 7680 (/4 1920)
>[390143.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390143.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390214.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[390214.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[390214.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390214.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390214.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[390214.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[390214.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390214.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390214.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390214.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390214.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390214.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390214.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390214.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390214.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390214.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390214.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390214.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390214.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390215.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390215.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[390215.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[390215.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e896d0]
>[390215.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e896d0] width 1920 pitch 7680 (/4 1920)
>[390215.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390215.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390215.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390215.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390215.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390215.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390215.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390215.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390215.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390215.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390215.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390215.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390215.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[390215.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[390215.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390215.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390215.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390215.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390216.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390216.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390216.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390216.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390216.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390216.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390216.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390216.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390216.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390216.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390216.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390216.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390216.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[390216.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[390216.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390216.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390217.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[390217.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[390217.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[390217.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[390217.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390217.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390218.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[390218.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[390218.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390218.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390218.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390218.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390219.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390219.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390219.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390219.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390219.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390219.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390219.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390219.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390219.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390219.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390219.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390219.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390219.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390219.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390219.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390220.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390220.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390220.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390220.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390220.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390226.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e896d0]
>[390226.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e896d0] width 1920 pitch 7680 (/4 1920)
>[390227.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390227.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390227.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[390227.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[390227.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[390227.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[390268.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[390268.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[390298.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390298.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390343.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390343.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390358.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390358.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390373.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390373.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390388.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390388.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390433.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390433.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390463.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390463.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390478.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390478.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390493.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390493.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390523.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e896d0]
>[390523.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e896d0] width 1920 pitch 7680 (/4 1920)
>[390538.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[390538.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[390553.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[390553.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[390673.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390673.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390688.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390688.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390718.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390718.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390733.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[390733.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[390808.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390808.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390838.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[390838.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[390898.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390898.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390913.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[390913.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[390928.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[390928.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[390943.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[390943.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[390976.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390976.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390976.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390977.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390977.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[390977.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[390977.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390977.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390977.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390977.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390977.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390977.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390977.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390977.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390977.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[390977.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[390977.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390977.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390977.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[390978.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[390979.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[390979.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391007.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391007.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391007.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391007.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391078.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[391078.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[391093.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[391093.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[391183.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391183.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391228.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391228.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391243.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391243.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391258.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391258.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391273.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391273.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391288.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391288.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391303.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391303.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391318.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391318.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391348.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[391348.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[391363.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[391363.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[391408.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391408.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391453.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391453.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391468.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391468.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391498.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391498.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391513.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[391513.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[391528.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[391528.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[391543.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[391543.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[391588.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[391588.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[391618.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[391618.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[391648.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[391648.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[391663.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[391663.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[391693.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[391693.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[391704.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391704.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391704.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391704.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391704.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391704.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391704.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391704.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391704.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391704.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391704.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391704.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391704.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[391704.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[391704.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391704.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391704.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[391704.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[391704.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[391704.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[391705.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391705.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391705.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdac70]
>[391705.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdac70] width 1920 pitch 7680 (/4 1920)
>[391705.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391705.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391705.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[391705.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[391705.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391705.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391705.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[391705.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[391705.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[391705.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[391708.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[391708.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[391708.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[391708.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[391708.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[391709.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[391709.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[391709.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[391709.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[391709.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[391709.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[391709.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[391709.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[391709.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[391709.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e896d0]
>[391709.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e896d0] width 1920 pitch 7680 (/4 1920)
>[391709.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbaf80]
>[391709.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbaf80] width 1920 pitch 7680 (/4 1920)
>[391709.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd9790]
>[391709.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd9790] width 1920 pitch 7680 (/4 1920)
>[391710.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00320]
>[391710.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00320] width 1920 pitch 7680 (/4 1920)
>[391710.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd9790]
>[391710.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd9790] width 1920 pitch 7680 (/4 1920)
>[391710.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00320]
>[391710.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00320] width 1920 pitch 7680 (/4 1920)
>[391710.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d060]
>[391710.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d060] width 1920 pitch 7680 (/4 1920)
>[391710.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d00320]
>[391710.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d00320] width 1920 pitch 7680 (/4 1920)
>[391710.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[391710.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[391712.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecfd10]
>[391712.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecfd10] width 1920 pitch 7680 (/4 1920)
>[391712.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[391712.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[391712.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecfd10]
>[391712.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecfd10] width 1920 pitch 7680 (/4 1920)
>[391712.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[391712.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[391712.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecfd10]
>[391712.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecfd10] width 1920 pitch 7680 (/4 1920)
>[391712.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[391712.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[391712.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecfd10]
>[391712.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecfd10] width 1920 pitch 7680 (/4 1920)
>[391712.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[391712.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[391712.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecfd10]
>[391712.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecfd10] width 1920 pitch 7680 (/4 1920)
>[391712.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[391712.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[391729.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd36e0]
>[391729.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd36e0] width 1920 pitch 7680 (/4 1920)
>[391738.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d274f0]
>[391738.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d274f0] width 1920 pitch 7680 (/4 1920)
>[391753.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50800]
>[391753.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50800] width 1920 pitch 7680 (/4 1920)
>[391783.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecfd10]
>[391783.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecfd10] width 1920 pitch 7680 (/4 1920)
>[391790.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dba950]
>[391790.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dba950] width 1920 pitch 7680 (/4 1920)
>[391790.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef290]
>[391790.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef290] width 1920 pitch 7680 (/4 1920)
>[391790.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103fa0]
>[391790.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103fa0] width 1920 pitch 7680 (/4 1920)
>[391790.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef290]
>[391790.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef290] width 1920 pitch 7680 (/4 1920)
>[391790.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103fa0]
>[391790.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103fa0] width 1920 pitch 7680 (/4 1920)
>[391790.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef290]
>[391790.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef290] width 1920 pitch 7680 (/4 1920)
>[391790.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103fa0]
>[391790.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103fa0] width 1920 pitch 7680 (/4 1920)
>[391790.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef290]
>[391790.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef290] width 1920 pitch 7680 (/4 1920)
>[391790.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3103fa0]
>[391790.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3103fa0] width 1920 pitch 7680 (/4 1920)
>[391794.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea6b30]
>[391794.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea6b30] width 1920 pitch 7680 (/4 1920)
>[391794.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39912e0]
>[391794.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39912e0] width 1920 pitch 7680 (/4 1920)
>[391794.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea6b30]
>[391794.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea6b30] width 1920 pitch 7680 (/4 1920)
>[391794.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39912e0]
>[391794.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39912e0] width 1920 pitch 7680 (/4 1920)
>[391794.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eca860]
>[391794.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eca860] width 1920 pitch 7680 (/4 1920)
>[391794.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485110]
>[391794.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485110] width 1920 pitch 7680 (/4 1920)
>[391794.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eee3e0]
>[391794.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eee3e0] width 1920 pitch 7680 (/4 1920)
>[391794.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485110]
>[391794.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485110] width 1920 pitch 7680 (/4 1920)
>[391794.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eee3e0]
>[391794.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eee3e0] width 1920 pitch 7680 (/4 1920)
>[391796.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d274d0]
>[391796.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d274d0] width 1920 pitch 7680 (/4 1920)
>[391796.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39912e0]
>[391796.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39912e0] width 1920 pitch 7680 (/4 1920)
>[391796.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d274d0]
>[391796.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d274d0] width 1920 pitch 7680 (/4 1920)
>[391796.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39912e0]
>[391796.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39912e0] width 1920 pitch 7680 (/4 1920)
>[391796.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d274d0]
>[391796.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d274d0] width 1920 pitch 7680 (/4 1920)
>[391796.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d274d0]
>[391796.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d274d0] width 1920 pitch 7680 (/4 1920)
>[391796.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[391796.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[391796.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d274d0]
>[391796.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d274d0] width 1920 pitch 7680 (/4 1920)
>[391796.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944a40]
>[391796.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944a40] width 1920 pitch 7680 (/4 1920)
>[391798.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[391798.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[391811.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1a80]
>[391811.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1a80] width 1920 pitch 7680 (/4 1920)
>[391811.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99910]
>[391811.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99910] width 1920 pitch 7680 (/4 1920)
>[391811.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1a80]
>[391811.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1a80] width 1920 pitch 7680 (/4 1920)
>[391811.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99910]
>[391811.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99910] width 1920 pitch 7680 (/4 1920)
>[391811.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1a80]
>[391811.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1a80] width 1920 pitch 7680 (/4 1920)
>[391811.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99910]
>[391811.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99910] width 1920 pitch 7680 (/4 1920)
>[391811.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ee1a80]
>[391811.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ee1a80] width 1920 pitch 7680 (/4 1920)
>[391811.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c99910]
>[391812.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c99910] width 1920 pitch 7680 (/4 1920)
>[391813.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb730]
>[391813.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb730] width 1920 pitch 7680 (/4 1920)
>[391813.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[391813.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[391813.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dddc30]
>[391813.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dddc30] width 1920 pitch 7680 (/4 1920)
>[391813.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[391813.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[391813.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dddc30]
>[391813.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dddc30] width 1920 pitch 7680 (/4 1920)
>[391813.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[391813.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[391813.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dddc30]
>[391813.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dddc30] width 1920 pitch 7680 (/4 1920)
>[391813.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[391813.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[391813.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dddc30]
>[391813.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dddc30] width 1920 pitch 7680 (/4 1920)
>[391828.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0ab60]
>[391828.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0ab60] width 1920 pitch 7680 (/4 1920)
>[391843.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a09750]
>[391843.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a09750] width 1920 pitch 7680 (/4 1920)
>[391873.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de410]
>[391873.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de410] width 1920 pitch 7680 (/4 1920)
>[391888.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b52980]
>[391888.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b52980] width 1920 pitch 7680 (/4 1920)
>[391900.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22510]
>[391900.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22510] width 1920 pitch 7680 (/4 1920)
>[391903.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffde0]
>[391903.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffde0] width 1920 pitch 7680 (/4 1920)
>[391933.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d373a0]
>[391933.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d373a0] width 1920 pitch 7680 (/4 1920)
>[391948.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d373a0]
>[391948.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d373a0] width 1920 pitch 7680 (/4 1920)
>[391978.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffde0]
>[391978.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffde0] width 1920 pitch 7680 (/4 1920)
>[391993.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffde0]
>[391993.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffde0] width 1920 pitch 7680 (/4 1920)
>[392008.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffde0]
>[392008.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffde0] width 1920 pitch 7680 (/4 1920)
>[392023.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d373a0]
>[392023.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d373a0] width 1920 pitch 7680 (/4 1920)
>[392113.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dffde0]
>[392113.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dffde0] width 1920 pitch 7680 (/4 1920)
>[392128.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71790]
>[392128.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71790] width 1920 pitch 7680 (/4 1920)
>[392278.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f02660]
>[392278.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f02660] width 1920 pitch 7680 (/4 1920)
>[392293.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d373a0]
>[392293.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d373a0] width 1920 pitch 7680 (/4 1920)
>[392308.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611f3e0]
>[392308.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611f3e0] width 1920 pitch 7680 (/4 1920)
>[392353.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7f8c0]
>[392353.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7f8c0] width 1920 pitch 7680 (/4 1920)
>[392368.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d51d60]
>[392368.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d51d60] width 1920 pitch 7680 (/4 1920)
>[392383.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71790]
>[392383.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71790] width 1920 pitch 7680 (/4 1920)
>[392398.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de9b70]
>[392398.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de9b70] width 1920 pitch 7680 (/4 1920)
>[392405.720] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[392405.720] (II) RADEON(0): Using hsync ranges from config file
>[392405.720] (II) RADEON(0): Using vrefresh ranges from config file
>[392405.720] (II) RADEON(0): Printing DDC gathered Modelines:
>[392405.720] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[392405.720] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[392405.720] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[392405.720] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[392405.720] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[392405.720] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[392405.720] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[392405.720] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[392405.720] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[392405.720] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[392405.720] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[392405.720] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[392405.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d71900]
>[392405.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d71900] width 1920 pitch 7680 (/4 1920)
>[392413.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d43b20]
>[392413.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d43b20] width 1920 pitch 7680 (/4 1920)
>[392428.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25289e0]
>[392428.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25289e0] width 1920 pitch 7680 (/4 1920)
>[392488.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d36050]
>[392488.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d36050] width 1920 pitch 7680 (/4 1920)
>[392503.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce46b0]
>[392503.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce46b0] width 1920 pitch 7680 (/4 1920)
>[392518.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4caadc0]
>[392518.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4caadc0] width 1920 pitch 7680 (/4 1920)
>[392563.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6f50]
>[392563.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6f50] width 1920 pitch 7680 (/4 1920)
>[392608.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdbe70]
>[392608.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdbe70] width 1920 pitch 7680 (/4 1920)
>[392623.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d13700]
>[392623.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d13700] width 1920 pitch 7680 (/4 1920)
>[392638.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec5f0]
>[392638.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec5f0] width 1920 pitch 7680 (/4 1920)
>[392653.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d2630]
>[392653.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d2630] width 1920 pitch 7680 (/4 1920)
>[392698.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1750]
>[392698.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1750] width 1920 pitch 7680 (/4 1920)
>[392728.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebbb10]
>[392728.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebbb10] width 1920 pitch 7680 (/4 1920)
>[392743.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[392743.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[392758.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[392758.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[392773.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[392773.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[392803.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcc100]
>[392803.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcc100] width 1920 pitch 7680 (/4 1920)
>[392848.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[392848.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[392863.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390b780]
>[392863.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390b780] width 1920 pitch 7680 (/4 1920)
>[392878.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb3c60]
>[392878.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb3c60] width 1920 pitch 7680 (/4 1920)
>[392908.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4036e70]
>[392908.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4036e70] width 1920 pitch 7680 (/4 1920)
>[392953.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78720]
>[392953.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78720] width 1920 pitch 7680 (/4 1920)
>[392968.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4620]
>[392968.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4620] width 1920 pitch 7680 (/4 1920)
>[392983.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3925f90]
>[392983.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3925f90] width 1920 pitch 7680 (/4 1920)
>[392998.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bf1e0]
>[392998.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bf1e0] width 1920 pitch 7680 (/4 1920)
>[393007.653] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[393007.653] (II) RADEON(0): Using hsync ranges from config file
>[393007.653] (II) RADEON(0): Using vrefresh ranges from config file
>[393007.653] (II) RADEON(0): Printing DDC gathered Modelines:
>[393007.653] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[393007.653] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[393007.653] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[393007.653] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[393007.653] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[393007.653] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[393007.653] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[393007.653] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[393007.653] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[393007.653] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[393007.653] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[393007.653] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[393013.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fc100]
>[393013.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fc100] width 1920 pitch 7680 (/4 1920)
>[393097.666] (II) RADEON(0): RADEONSaveScreen(2)
>[393097.666] (II) RADEON(0): RADEONSaveScreen(0)
>[396099.237] (II) AIGLX: Suspending AIGLX clients for VT switch
>[396099.237] (II) RADEON(0): RADEONLeaveVT_KMS
>[396099.237] (II) RADEON(0): Ok, leaving now...
>[396112.339] (II) AIGLX: Resuming AIGLX clients after VT switch
>[396112.339] (II) RADEON(0): RADEONEnterVT_KMS
>[396112.390] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[396112.390] (II) RADEON(0): Using hsync ranges from config file
>[396112.390] (II) RADEON(0): Using vrefresh ranges from config file
>[396112.390] (II) RADEON(0): Printing DDC gathered Modelines:
>[396112.390] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[396112.390] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[396112.390] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[396112.390] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[396112.390] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[396112.390] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[396112.390] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[396112.390] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[396112.390] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[396112.390] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[396112.390] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[396112.390] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[396112.398] (II) RADEON(0): RADEONSaveScreen(2)
>[396112.399] (II) RADEON(0): RADEONSaveScreen(1)
>[396112.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff3f30]
>[396112.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff3f30] width 1920 pitch 7680 (/4 1920)
>[396247.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[396247.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[396277.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[396277.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[396292.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[396292.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[396307.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[396307.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[396517.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[396517.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[396532.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[396532.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[396547.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[396547.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[396562.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[396562.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[396637.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[396637.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[396652.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[396652.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[396682.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[396682.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[396712.439] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[396712.439] (II) RADEON(0): Using hsync ranges from config file
>[396712.439] (II) RADEON(0): Using vrefresh ranges from config file
>[396712.439] (II) RADEON(0): Printing DDC gathered Modelines:
>[396712.439] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[396712.439] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[396712.439] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[396712.439] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[396712.439] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[396712.439] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[396712.439] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[396712.439] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[396712.439] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[396712.439] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[396712.439] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[396712.439] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[396712.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[396712.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[396802.654] (II) RADEON(0): RADEONSaveScreen(2)
>[396802.654] (II) RADEON(0): RADEONSaveScreen(0)
>[399804.232] (II) AIGLX: Suspending AIGLX clients for VT switch
>[399804.232] (II) RADEON(0): RADEONLeaveVT_KMS
>[399804.232] (II) RADEON(0): Ok, leaving now...
>[399817.327] (II) AIGLX: Resuming AIGLX clients after VT switch
>[399817.327] (II) RADEON(0): RADEONEnterVT_KMS
>[399817.366] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[399817.366] (II) RADEON(0): Using hsync ranges from config file
>[399817.366] (II) RADEON(0): Using vrefresh ranges from config file
>[399817.366] (II) RADEON(0): Printing DDC gathered Modelines:
>[399817.366] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[399817.366] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[399817.366] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[399817.366] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[399817.366] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[399817.366] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[399817.366] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[399817.366] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[399817.366] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[399817.366] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[399817.366] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[399817.366] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[399817.373] (II) RADEON(0): RADEONSaveScreen(2)
>[399817.375] (II) RADEON(0): RADEONSaveScreen(1)
>[399817.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d373a0]
>[399817.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d373a0] width 1920 pitch 7680 (/4 1920)
>[399823.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1020]
>[399823.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1020] width 1920 pitch 7680 (/4 1920)
>[399823.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e4e40]
>[399823.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e4e40] width 1920 pitch 7680 (/4 1920)
>[399823.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399823.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399823.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[399823.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[399823.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399823.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399823.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[399823.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[399823.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399823.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399823.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[399823.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[399823.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399823.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399823.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[399823.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[399823.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399823.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399823.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[399823.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[399824.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399824.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399824.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2c570]
>[399824.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2c570] width 1920 pitch 7680 (/4 1920)
>[399824.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6f590]
>[399824.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6f590] width 1920 pitch 7680 (/4 1920)
>[399824.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1dfe0]
>[399824.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1dfe0] width 1920 pitch 7680 (/4 1920)
>[399824.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45db0]
>[399824.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45db0] width 1920 pitch 7680 (/4 1920)
>[399824.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d3ad0]
>[399824.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d3ad0] width 1920 pitch 7680 (/4 1920)
>[399824.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45db0]
>[399824.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45db0] width 1920 pitch 7680 (/4 1920)
>[399824.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d3ad0]
>[399824.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d3ad0] width 1920 pitch 7680 (/4 1920)
>[399824.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45db0]
>[399824.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45db0] width 1920 pitch 7680 (/4 1920)
>[399824.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d3ad0]
>[399824.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d3ad0] width 1920 pitch 7680 (/4 1920)
>[399824.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45db0]
>[399824.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45db0] width 1920 pitch 7680 (/4 1920)
>[399824.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab0f70]
>[399824.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab0f70] width 1920 pitch 7680 (/4 1920)
>[399824.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83110]
>[399824.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83110] width 1920 pitch 7680 (/4 1920)
>[399824.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4990]
>[399824.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4990] width 1920 pitch 7680 (/4 1920)
>[399824.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4990]
>[399824.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4990] width 1920 pitch 7680 (/4 1920)
>[399824.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07bf0]
>[399824.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07bf0] width 1920 pitch 7680 (/4 1920)
>[399825.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4990]
>[399825.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4990] width 1920 pitch 7680 (/4 1920)
>[399831.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02b30]
>[399831.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02b30] width 1920 pitch 7680 (/4 1920)
>[399831.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f73f0]
>[399831.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f73f0] width 1920 pitch 7680 (/4 1920)
>[399831.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f73f0]
>[399831.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f73f0] width 1920 pitch 7680 (/4 1920)
>[399832.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca03d0]
>[399832.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca03d0] width 1920 pitch 7680 (/4 1920)
>[399837.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25274a0]
>[399837.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25274a0] width 1920 pitch 7680 (/4 1920)
>[399855.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c450]
>[399855.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c450] width 1920 pitch 7680 (/4 1920)
>[399855.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c3f0]
>[399855.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c3f0] width 1920 pitch 7680 (/4 1920)
>[399855.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c450]
>[399855.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c450] width 1920 pitch 7680 (/4 1920)
>[399855.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c3f0]
>[399855.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c3f0] width 1920 pitch 7680 (/4 1920)
>[399855.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c450]
>[399855.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c450] width 1920 pitch 7680 (/4 1920)
>[399855.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c3f0]
>[399855.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c3f0] width 1920 pitch 7680 (/4 1920)
>[399855.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c450]
>[399855.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c450] width 1920 pitch 7680 (/4 1920)
>[399855.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d060]
>[399855.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d060] width 1920 pitch 7680 (/4 1920)
>[399855.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399855.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399855.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d060]
>[399855.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d060] width 1920 pitch 7680 (/4 1920)
>[399855.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399855.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399855.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d060]
>[399855.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d060] width 1920 pitch 7680 (/4 1920)
>[399855.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2536ae0]
>[399855.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2536ae0] width 1920 pitch 7680 (/4 1920)
>[399855.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1a7d0]
>[399855.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1a7d0] width 1920 pitch 7680 (/4 1920)
>[399855.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[399855.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[399855.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0350]
>[399855.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0350] width 1920 pitch 7680 (/4 1920)
>[399855.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399855.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399855.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca02d0]
>[399855.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca02d0] width 1920 pitch 7680 (/4 1920)
>[399855.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399855.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399855.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca02d0]
>[399855.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca02d0] width 1920 pitch 7680 (/4 1920)
>[399855.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399855.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399855.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca02d0]
>[399855.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca02d0] width 1920 pitch 7680 (/4 1920)
>[399855.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399855.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399855.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca02d0]
>[399856.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca02d0] width 1920 pitch 7680 (/4 1920)
>[399856.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399856.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399856.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca02d0]
>[399856.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca02d0] width 1920 pitch 7680 (/4 1920)
>[399856.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399856.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399856.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca02d0]
>[399856.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca02d0] width 1920 pitch 7680 (/4 1920)
>[399857.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399857.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399857.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[399857.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[399857.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399857.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399857.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[399857.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[399857.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399857.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399857.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[399857.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[399857.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399857.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399857.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[399857.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[399857.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399857.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399857.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[399857.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[399857.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[399857.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[399857.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301b340]
>[399857.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301b340] width 1920 pitch 7680 (/4 1920)
>[399857.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17ea0]
>[399857.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17ea0] width 1920 pitch 7680 (/4 1920)
>[399867.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399867.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d94440]
>[399867.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d94440] width 1920 pitch 7680 (/4 1920)
>[399867.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b81960]
>[399867.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b81960] width 1920 pitch 7680 (/4 1920)
>[399869.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca610]
>[399869.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca610] width 1920 pitch 7680 (/4 1920)
>[399869.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca610]
>[399869.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca610] width 1920 pitch 7680 (/4 1920)
>[399869.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca610]
>[399869.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca610] width 1920 pitch 7680 (/4 1920)
>[399869.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca610]
>[399869.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca610] width 1920 pitch 7680 (/4 1920)
>[399869.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ca610]
>[399869.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ca610] width 1920 pitch 7680 (/4 1920)
>[399869.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399869.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399869.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399869.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399869.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e7ec0]
>[399869.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e7ec0] width 1920 pitch 7680 (/4 1920)
>[399869.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399869.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399874.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399874.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399874.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7b7b0]
>[399874.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7b7b0] width 1920 pitch 7680 (/4 1920)
>[399875.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e5820]
>[399875.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e5820] width 1920 pitch 7680 (/4 1920)
>[399892.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d680d0]
>[399892.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d680d0] width 1920 pitch 7680 (/4 1920)
>[399900.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1750]
>[399900.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1750] width 1920 pitch 7680 (/4 1920)
>[399900.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1750]
>[399900.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1750] width 1920 pitch 7680 (/4 1920)
>[399900.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1750]
>[399900.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1750] width 1920 pitch 7680 (/4 1920)
>[399900.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db1750]
>[399900.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db1750] width 1920 pitch 7680 (/4 1920)
>[399900.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40167e0]
>[399900.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40167e0] width 1920 pitch 7680 (/4 1920)
>[399900.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40167e0]
>[399900.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40167e0] width 1920 pitch 7680 (/4 1920)
>[399900.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40167e0]
>[399900.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40167e0] width 1920 pitch 7680 (/4 1920)
>[399900.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40167e0]
>[399900.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40167e0] width 1920 pitch 7680 (/4 1920)
>[399900.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2507d80]
>[399900.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2507d80] width 1920 pitch 7680 (/4 1920)
>[399900.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb2b70]
>[399900.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb2b70] width 1920 pitch 7680 (/4 1920)
>[399907.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8bf90]
>[399907.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8bf90] width 1920 pitch 7680 (/4 1920)
>[399922.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dacd70]
>[399922.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dacd70] width 1920 pitch 7680 (/4 1920)
>[399930.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df21f0]
>[399930.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df21f0] width 1920 pitch 7680 (/4 1920)
>[399930.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399930.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399930.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399930.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399930.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5910]
>[399930.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5910] width 1920 pitch 7680 (/4 1920)
>[399930.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399930.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399930.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5910]
>[399930.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5910] width 1920 pitch 7680 (/4 1920)
>[399930.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399930.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399930.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5910]
>[399930.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5910] width 1920 pitch 7680 (/4 1920)
>[399930.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399930.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399930.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5910]
>[399931.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5910] width 1920 pitch 7680 (/4 1920)
>[399931.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399931.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399931.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5910]
>[399931.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5910] width 1920 pitch 7680 (/4 1920)
>[399931.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49a70]
>[399931.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49a70] width 1920 pitch 7680 (/4 1920)
>[399931.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5910]
>[399931.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5910] width 1920 pitch 7680 (/4 1920)
>[399931.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919dd0]
>[399931.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919dd0] width 1920 pitch 7680 (/4 1920)
>[399931.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba1670]
>[399931.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba1670] width 1920 pitch 7680 (/4 1920)
>[399931.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26dc0]
>[399931.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26dc0] width 1920 pitch 7680 (/4 1920)
>[399931.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399931.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399931.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26dc0]
>[399931.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26dc0] width 1920 pitch 7680 (/4 1920)
>[399932.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399932.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399932.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26dc0]
>[399932.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26dc0] width 1920 pitch 7680 (/4 1920)
>[399932.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399932.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399932.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26dc0]
>[399932.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26dc0] width 1920 pitch 7680 (/4 1920)
>[399934.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26dc0]
>[399934.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26dc0] width 1920 pitch 7680 (/4 1920)
>[399934.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399934.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399935.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e10]
>[399935.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e10] width 1920 pitch 7680 (/4 1920)
>[399935.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[399935.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[399936.521] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[399936.521] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[399936.521] (II) UnloadModule: "evdev"
>[399937.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[399937.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[399952.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df23a0]
>[399952.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df23a0] width 1920 pitch 7680 (/4 1920)
>[399967.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[399967.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[399982.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[399982.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400012.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400012.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400027.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[400027.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[400042.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400042.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400057.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[400057.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[400102.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400102.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400132.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400132.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400147.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[400147.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[400222.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400222.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400223.090] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[400223.090] (II) No input driver specified, ignoring this device.
>[400223.090] (II) This device may have been added with another device file.
>[400223.091] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[400223.091] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[400223.091] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[400223.091] 	Option "XkbRules" "evdev"
>[400223.091] 	Option "XkbModel" "evdev"
>[400223.091] 	Option "XkbLayout" "us"
>[400223.091] 	Option "_source" "server/udev"
>[400223.091] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[400223.091] 	Option "path" "/dev/input/event14"
>[400223.091] 	Option "device" "/dev/input/event14"
>[400223.091] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input51/event14"
>[400223.091] 	Option "driver" "evdev"
>[400223.091] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[400223.091] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[400223.091] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[400223.091] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[400223.091] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[400223.091] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[400223.091] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[400223.091] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[400223.091] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[400223.091] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[400223.091] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[400223.091] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input51/event14"
>[400223.091] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[400223.091] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[400223.091] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[400223.091] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[400223.091] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[400223.091] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[400237.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400237.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400267.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400267.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400312.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400312.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400327.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[400327.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400342.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[400342.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400357.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400357.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400372.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400372.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400387.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400387.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400402.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400402.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400432.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400432.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400447.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df23a0]
>[400447.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df23a0] width 1920 pitch 7680 (/4 1920)
>[400462.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400462.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400537.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400537.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400552.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400552.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400567.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400567.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400582.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400582.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400612.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[400612.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400627.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400627.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400672.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78aa0]
>[400672.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78aa0] width 1920 pitch 7680 (/4 1920)
>[400687.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[400687.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400702.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[400702.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400717.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400717.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400732.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1d5f0]
>[400732.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1d5f0] width 1920 pitch 7680 (/4 1920)
>[400747.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400747.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400792.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3a050]
>[400792.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3a050] width 1920 pitch 7680 (/4 1920)
>[400807.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e85a20]
>[400807.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e85a20] width 1920 pitch 7680 (/4 1920)
>[400822.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df23a0]
>[400822.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df23a0] width 1920 pitch 7680 (/4 1920)
>[400836.584] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[400836.584] (II) RADEON(0): Using hsync ranges from config file
>[400836.584] (II) RADEON(0): Using vrefresh ranges from config file
>[400836.584] (II) RADEON(0): Printing DDC gathered Modelines:
>[400836.584] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[400836.584] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[400836.584] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[400836.584] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[400836.584] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[400836.584] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[400836.584] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[400836.584] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[400836.584] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[400836.584] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[400836.584] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[400836.584] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[400837.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba1670]
>[400837.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba1670] width 1920 pitch 7680 (/4 1920)
>[400926.653] (II) RADEON(0): RADEONSaveScreen(2)
>[400926.653] (II) RADEON(0): RADEONSaveScreen(0)
>[403033.525] (II) RADEON(0): RADEONSaveScreen(1)
>[403036.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40346e0]
>[403036.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40346e0] width 1920 pitch 7680 (/4 1920)
>[403036.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403036.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403036.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403036.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403036.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403037.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403037.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403037.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403037.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403037.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403037.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403037.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403037.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403037.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403037.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403037.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403037.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403037.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403037.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403037.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403037.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403037.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403037.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403037.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403037.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403037.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce310]
>[403037.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce310] width 1920 pitch 7680 (/4 1920)
>[403037.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403037.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70620]
>[403038.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70620] width 1920 pitch 7680 (/4 1920)
>[403038.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919dd0]
>[403038.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919dd0] width 1920 pitch 7680 (/4 1920)
>[403038.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40346e0]
>[403038.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40346e0] width 1920 pitch 7680 (/4 1920)
>[403038.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403038.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403038.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403038.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403038.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403038.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403038.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403038.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403038.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403038.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919dd0]
>[403038.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919dd0] width 1920 pitch 7680 (/4 1920)
>[403038.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70620]
>[403039.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70620] width 1920 pitch 7680 (/4 1920)
>[403039.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5990]
>[403039.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5990] width 1920 pitch 7680 (/4 1920)
>[403039.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403039.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403039.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba1670]
>[403039.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba1670] width 1920 pitch 7680 (/4 1920)
>[403039.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70620]
>[403039.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70620] width 1920 pitch 7680 (/4 1920)
>[403039.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40346e0]
>[403039.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40346e0] width 1920 pitch 7680 (/4 1920)
>[403039.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f70620]
>[403039.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f70620] width 1920 pitch 7680 (/4 1920)
>[403039.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3919dd0]
>[403039.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3919dd0] width 1920 pitch 7680 (/4 1920)
>[403039.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c14540]
>[403039.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c14540] width 1920 pitch 7680 (/4 1920)
>[403039.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d97770]
>[403039.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d97770] width 1920 pitch 7680 (/4 1920)
>[403039.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30abf30]
>[403039.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30abf30] width 1920 pitch 7680 (/4 1920)
>[403042.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f4280]
>[403042.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f4280] width 1920 pitch 7680 (/4 1920)
>[403042.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398fc30]
>[403042.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398fc30] width 1920 pitch 7680 (/4 1920)
>[403043.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398fbf0]
>[403043.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398fbf0] width 1920 pitch 7680 (/4 1920)
>[403048.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f7e00]
>[403048.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f7e00] width 1920 pitch 7680 (/4 1920)
>[403062.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5dd0]
>[403062.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5dd0] width 1920 pitch 7680 (/4 1920)
>[403063.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f7e00]
>[403063.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f7e00] width 1920 pitch 7680 (/4 1920)
>[403078.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd5b0]
>[403078.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd5b0] width 1920 pitch 7680 (/4 1920)
>[403093.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e73900]
>[403093.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e73900] width 1920 pitch 7680 (/4 1920)
>[403108.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfc490]
>[403108.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfc490] width 1920 pitch 7680 (/4 1920)
>[403123.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fadc0]
>[403123.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fadc0] width 1920 pitch 7680 (/4 1920)
>[403138.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403138.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403232.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb91e0]
>[403232.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb91e0] width 1920 pitch 7680 (/4 1920)
>[403232.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff63d0]
>[403232.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff63d0] width 1920 pitch 7680 (/4 1920)
>[403232.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb91e0]
>[403232.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb91e0] width 1920 pitch 7680 (/4 1920)
>[403232.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff63d0]
>[403233.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff63d0] width 1920 pitch 7680 (/4 1920)
>[403233.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb91e0]
>[403233.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb91e0] width 1920 pitch 7680 (/4 1920)
>[403233.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff63d0]
>[403233.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff63d0] width 1920 pitch 7680 (/4 1920)
>[403233.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb91e0]
>[403233.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb91e0] width 1920 pitch 7680 (/4 1920)
>[403233.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff63d0]
>[403233.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff63d0] width 1920 pitch 7680 (/4 1920)
>[403233.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403233.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403233.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf80]
>[403233.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf80] width 1920 pitch 7680 (/4 1920)
>[403233.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403233.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403233.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf80]
>[403233.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf80] width 1920 pitch 7680 (/4 1920)
>[403233.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403233.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403233.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf80]
>[403233.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf80] width 1920 pitch 7680 (/4 1920)
>[403233.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403233.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403233.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bbf80]
>[403233.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bbf80] width 1920 pitch 7680 (/4 1920)
>[403233.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403233.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403234.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f7e70]
>[403234.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f7e70] width 1920 pitch 7680 (/4 1920)
>[403234.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403234.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403234.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471a90]
>[403234.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471a90] width 1920 pitch 7680 (/4 1920)
>[403234.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403234.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403234.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60a50]
>[403234.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60a50] width 1920 pitch 7680 (/4 1920)
>[403234.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65f30]
>[403234.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65f30] width 1920 pitch 7680 (/4 1920)
>[403234.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403234.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403234.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65f30]
>[403234.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65f30] width 1920 pitch 7680 (/4 1920)
>[403234.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403234.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403234.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65f30]
>[403234.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65f30] width 1920 pitch 7680 (/4 1920)
>[403234.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403234.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403234.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65f30]
>[403234.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65f30] width 1920 pitch 7680 (/4 1920)
>[403234.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403234.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403234.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65f30]
>[403234.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65f30] width 1920 pitch 7680 (/4 1920)
>[403234.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403234.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403234.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d65f30]
>[403234.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d65f30] width 1920 pitch 7680 (/4 1920)
>[403234.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403234.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403235.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245c880]
>[403235.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245c880] width 1920 pitch 7680 (/4 1920)
>[403236.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394d890]
>[403236.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394d890] width 1920 pitch 7680 (/4 1920)
>[403236.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec460]
>[403236.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec460] width 1920 pitch 7680 (/4 1920)
>[403243.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901f50]
>[403243.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901f50] width 1920 pitch 7680 (/4 1920)
>[403245.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12c20]
>[403245.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12c20] width 1920 pitch 7680 (/4 1920)
>[403245.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403245.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403245.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12c20]
>[403245.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12c20] width 1920 pitch 7680 (/4 1920)
>[403245.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb91e0]
>[403245.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb91e0] width 1920 pitch 7680 (/4 1920)
>[403245.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b12c20]
>[403245.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b12c20] width 1920 pitch 7680 (/4 1920)
>[403245.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60a50]
>[403245.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60a50] width 1920 pitch 7680 (/4 1920)
>[403245.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403245.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403245.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3943020]
>[403245.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3943020] width 1920 pitch 7680 (/4 1920)
>[403245.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07bf0]
>[403245.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07bf0] width 1920 pitch 7680 (/4 1920)
>[403245.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d273b0]
>[403245.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d273b0] width 1920 pitch 7680 (/4 1920)
>[403245.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7960]
>[403245.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7960] width 1920 pitch 7680 (/4 1920)
>[403245.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403245.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403245.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471a90]
>[403245.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471a90] width 1920 pitch 7680 (/4 1920)
>[403245.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcc480]
>[403245.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcc480] width 1920 pitch 7680 (/4 1920)
>[403245.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403245.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403245.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef87d0]
>[403245.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef87d0] width 1920 pitch 7680 (/4 1920)
>[403247.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e39c90]
>[403247.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e39c90] width 1920 pitch 7680 (/4 1920)
>[403247.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3943020]
>[403247.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3943020] width 1920 pitch 7680 (/4 1920)
>[403247.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d273b0]
>[403247.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d273b0] width 1920 pitch 7680 (/4 1920)
>[403247.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471a90]
>[403247.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471a90] width 1920 pitch 7680 (/4 1920)
>[403247.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef87d0]
>[403247.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef87d0] width 1920 pitch 7680 (/4 1920)
>[403247.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6a050]
>[403247.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6a050] width 1920 pitch 7680 (/4 1920)
>[403247.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60a50]
>[403247.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60a50] width 1920 pitch 7680 (/4 1920)
>[403247.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3943020]
>[403247.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3943020] width 1920 pitch 7680 (/4 1920)
>[403247.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60a50]
>[403247.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60a50] width 1920 pitch 7680 (/4 1920)
>[403247.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3943020]
>[403247.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3943020] width 1920 pitch 7680 (/4 1920)
>[403247.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07bf0]
>[403247.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07bf0] width 1920 pitch 7680 (/4 1920)
>[403247.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d273b0]
>[403247.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d273b0] width 1920 pitch 7680 (/4 1920)
>[403247.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403247.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403247.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252b120]
>[403247.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252b120] width 1920 pitch 7680 (/4 1920)
>[403247.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98720]
>[403247.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98720] width 1920 pitch 7680 (/4 1920)
>[403273.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d620d0]
>[403273.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d620d0] width 1920 pitch 7680 (/4 1920)
>[403303.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d146b0]
>[403303.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d146b0] width 1920 pitch 7680 (/4 1920)
>[403305.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d059d0]
>[403305.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d059d0] width 1920 pitch 7680 (/4 1920)
>[403305.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b910]
>[403305.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b910] width 1920 pitch 7680 (/4 1920)
>[403305.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d059d0]
>[403305.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d059d0] width 1920 pitch 7680 (/4 1920)
>[403305.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b910]
>[403305.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b910] width 1920 pitch 7680 (/4 1920)
>[403305.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d059d0]
>[403305.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d059d0] width 1920 pitch 7680 (/4 1920)
>[403305.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8b910]
>[403306.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8b910] width 1920 pitch 7680 (/4 1920)
>[403306.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d059d0]
>[403306.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d059d0] width 1920 pitch 7680 (/4 1920)
>[403306.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ca0]
>[403306.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ca0] width 1920 pitch 7680 (/4 1920)
>[403306.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d059d0]
>[403306.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d059d0] width 1920 pitch 7680 (/4 1920)
>[403306.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ca0]
>[403306.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ca0] width 1920 pitch 7680 (/4 1920)
>[403306.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60a50]
>[403306.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60a50] width 1920 pitch 7680 (/4 1920)
>[403306.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940ca0]
>[403306.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940ca0] width 1920 pitch 7680 (/4 1920)
>[403306.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07bf0]
>[403306.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07bf0] width 1920 pitch 7680 (/4 1920)
>[403306.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7960]
>[403306.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7960] width 1920 pitch 7680 (/4 1920)
>[403306.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403306.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403306.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7960]
>[403306.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7960] width 1920 pitch 7680 (/4 1920)
>[403306.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9d5c0]
>[403306.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9d5c0] width 1920 pitch 7680 (/4 1920)
>[403307.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403307.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403307.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4890]
>[403307.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4890] width 1920 pitch 7680 (/4 1920)
>[403307.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61d10]
>[403307.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61d10] width 1920 pitch 7680 (/4 1920)
>[403307.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403307.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403307.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcc480]
>[403307.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcc480] width 1920 pitch 7680 (/4 1920)
>[403307.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403307.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403307.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef87d0]
>[403307.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef87d0] width 1920 pitch 7680 (/4 1920)
>[403307.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403307.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403307.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61d10]
>[403307.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61d10] width 1920 pitch 7680 (/4 1920)
>[403307.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403307.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403307.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61d10]
>[403307.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61d10] width 1920 pitch 7680 (/4 1920)
>[403307.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403307.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403307.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61d10]
>[403307.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61d10] width 1920 pitch 7680 (/4 1920)
>[403307.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403307.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403307.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61d10]
>[403307.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61d10] width 1920 pitch 7680 (/4 1920)
>[403307.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403307.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403307.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d61d10]
>[403307.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d61d10] width 1920 pitch 7680 (/4 1920)
>[403310.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4890]
>[403310.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4890] width 1920 pitch 7680 (/4 1920)
>[403310.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403310.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403310.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d60a50]
>[403310.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d60a50] width 1920 pitch 7680 (/4 1920)
>[403310.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[403310.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[403318.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403318.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403329.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403329.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403329.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403329.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403329.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403329.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403329.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403329.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403329.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403329.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403329.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403329.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403329.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403329.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403329.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403329.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403329.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403329.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403329.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403329.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403329.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403329.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403330.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403330.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403330.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403330.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403330.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403330.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403330.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2baf5b0]
>[403330.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2baf5b0] width 1920 pitch 7680 (/4 1920)
>[403331.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[403331.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[403331.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403332.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403332.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403332.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403332.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403332.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403332.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403332.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403332.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403332.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403332.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403332.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403332.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403332.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403332.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403332.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403332.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403332.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403332.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403332.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403332.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403332.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403332.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cd3460]
>[403332.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cd3460] width 1920 pitch 7680 (/4 1920)
>[403335.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403335.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3d3e0]
>[403335.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3d3e0] width 1920 pitch 7680 (/4 1920)
>[403335.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f10]
>[403335.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f10] width 1920 pitch 7680 (/4 1920)
>[403336.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403336.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403336.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403336.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403336.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403336.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403336.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403336.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403336.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403336.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403336.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403336.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403337.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403337.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403337.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eea0]
>[403337.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eea0] width 1920 pitch 7680 (/4 1920)
>[403337.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[403337.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[403337.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[403337.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[403337.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[403337.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[403337.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[403337.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[403337.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[403337.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[403337.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31643a0]
>[403337.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31643a0] width 1920 pitch 7680 (/4 1920)
>[403337.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[403337.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[403337.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[403337.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[403338.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e891e0]
>[403338.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e891e0] width 1920 pitch 7680 (/4 1920)
>[403338.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc2370]
>[403338.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc2370] width 1920 pitch 7680 (/4 1920)
>[403338.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24781f0]
>[403338.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24781f0] width 1920 pitch 7680 (/4 1920)
>[403339.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4740]
>[403339.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4740] width 1920 pitch 7680 (/4 1920)
>[403339.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[403339.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[403339.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c940]
>[403339.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c940] width 1920 pitch 7680 (/4 1920)
>[403340.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[403340.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[403340.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c940]
>[403340.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c940] width 1920 pitch 7680 (/4 1920)
>[403340.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[403340.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[403340.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c940]
>[403340.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c940] width 1920 pitch 7680 (/4 1920)
>[403340.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[403340.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[403340.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c940]
>[403340.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c940] width 1920 pitch 7680 (/4 1920)
>[403340.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[403340.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[403340.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c940]
>[403340.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c940] width 1920 pitch 7680 (/4 1920)
>[403340.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb1aa0]
>[403340.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb1aa0] width 1920 pitch 7680 (/4 1920)
>[403340.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e5c940]
>[403340.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e5c940] width 1920 pitch 7680 (/4 1920)
>[403340.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc2370]
>[403340.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc2370] width 1920 pitch 7680 (/4 1920)
>[403340.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[403340.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[403340.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc2370]
>[403340.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc2370] width 1920 pitch 7680 (/4 1920)
>[403340.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[403340.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[403340.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e35cf0]
>[403340.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e35cf0] width 1920 pitch 7680 (/4 1920)
>[403340.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebbb10]
>[403340.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebbb10] width 1920 pitch 7680 (/4 1920)
>[403346.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c80990]
>[403346.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c80990] width 1920 pitch 7680 (/4 1920)
>[403348.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56fa0]
>[403348.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56fa0] width 1920 pitch 7680 (/4 1920)
>[403351.938] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[403351.939] (II) RADEON(0): Using hsync ranges from config file
>[403351.939] (II) RADEON(0): Using vrefresh ranges from config file
>[403351.939] (II) RADEON(0): Printing DDC gathered Modelines:
>[403351.939] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[403351.939] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[403351.939] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[403351.939] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[403351.939] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[403351.939] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[403351.939] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[403351.939] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[403351.939] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[403351.939] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[403351.939] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[403351.939] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[403351.984] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[403351.984] (II) RADEON(0): Using hsync ranges from config file
>[403351.984] (II) RADEON(0): Using vrefresh ranges from config file
>[403351.984] (II) RADEON(0): Printing DDC gathered Modelines:
>[403351.984] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[403351.984] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[403351.984] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[403351.984] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[403351.984] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[403351.984] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[403351.984] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[403351.984] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[403351.984] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[403351.984] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[403351.984] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[403351.984] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[403352.031] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[403352.031] (II) RADEON(0): Using hsync ranges from config file
>[403352.031] (II) RADEON(0): Using vrefresh ranges from config file
>[403352.031] (II) RADEON(0): Printing DDC gathered Modelines:
>[403352.031] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[403352.031] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[403352.031] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[403352.031] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[403352.031] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[403352.031] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[403352.031] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[403352.031] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[403352.031] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[403352.031] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[403352.031] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[403352.031] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[403363.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403363.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403366.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40309f0]
>[403366.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40309f0] width 1920 pitch 7680 (/4 1920)
>[403378.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f400]
>[403378.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f400] width 1920 pitch 7680 (/4 1920)
>[403393.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403393.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403408.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403408.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403423.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403423.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403438.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4d1a0]
>[403438.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4d1a0] width 1920 pitch 7680 (/4 1920)
>[403573.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403573.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403588.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403588.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403618.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403618.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403633.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403633.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403708.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403708.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403723.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403723.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403738.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403738.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403753.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403753.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403783.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403783.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403798.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403798.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403813.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403813.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403828.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403828.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403858.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[403858.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[403873.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403873.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403888.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403888.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403918.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[403918.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[403948.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[403948.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[403963.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403963.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[403978.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[403978.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[403993.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[403993.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404008.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404008.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404023.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404023.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404053.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[404053.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[404068.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404068.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404113.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404113.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404128.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404128.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404143.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404143.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404158.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404158.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404173.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404173.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404188.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404188.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404203.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404203.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404218.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7360]
>[404218.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7360] width 1920 pitch 7680 (/4 1920)
>[404233.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404233.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404278.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404278.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404293.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404293.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404308.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404308.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404338.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404338.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404353.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404353.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404368.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a97ec0]
>[404368.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a97ec0] width 1920 pitch 7680 (/4 1920)
>[404383.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404383.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404398.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404398.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404428.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404428.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404443.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404443.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404458.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404458.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404473.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404473.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404488.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404488.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404503.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404503.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404518.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404518.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404533.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404533.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404548.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404548.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404578.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c601a0]
>[404578.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c601a0] width 1920 pitch 7680 (/4 1920)
>[404638.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404638.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404653.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[404653.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[404698.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[404698.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[404713.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[404713.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[404728.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394c040]
>[404728.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394c040] width 1920 pitch 7680 (/4 1920)
>[404743.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404743.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404773.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7360]
>[404773.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7360] width 1920 pitch 7680 (/4 1920)
>[404788.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[404788.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[404878.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404878.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[404893.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[404893.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405013.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405013.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405028.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f400]
>[405028.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f400] width 1920 pitch 7680 (/4 1920)
>[405058.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405058.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405073.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[405073.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405088.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405088.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405118.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405118.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405178.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405178.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405193.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[405193.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[405223.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[405223.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[405253.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[405253.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405268.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[405268.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[405283.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[405283.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[405433.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405433.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405478.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405478.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405508.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[405508.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405523.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f400]
>[405523.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f400] width 1920 pitch 7680 (/4 1920)
>[405538.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405538.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405553.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405553.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405598.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8f400]
>[405598.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8f400] width 1920 pitch 7680 (/4 1920)
>[405613.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[405613.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405643.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405643.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405673.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[405673.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405688.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405688.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405703.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7360]
>[405703.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7360] width 1920 pitch 7680 (/4 1920)
>[405778.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405778.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405793.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405793.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405823.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[405823.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[405853.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[405853.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[405913.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393eac0]
>[405913.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393eac0] width 1920 pitch 7680 (/4 1920)
>[405928.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7360]
>[405928.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7360] width 1920 pitch 7680 (/4 1920)
>[406123.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[406123.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[406153.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[406153.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[406183.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316bdd0]
>[406183.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316bdd0] width 1920 pitch 7680 (/4 1920)
>[406184.778] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406184.778] (II) RADEON(0): Using hsync ranges from config file
>[406184.778] (II) RADEON(0): Using vrefresh ranges from config file
>[406184.778] (II) RADEON(0): Printing DDC gathered Modelines:
>[406184.778] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406184.778] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406184.778] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406184.778] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406184.778] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406184.778] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406184.778] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406184.778] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406184.778] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406184.778] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406184.778] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406184.778] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406185.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[406185.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[406186.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02c80]
>[406186.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02c80] width 1920 pitch 7680 (/4 1920)
>[406186.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[406186.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[406186.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406186.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406186.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406186.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406186.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406186.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406186.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406186.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406186.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406186.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406186.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406186.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406186.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406186.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406186.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406186.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406186.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406186.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406186.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406186.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406187.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406187.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406187.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406187.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406187.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406187.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406187.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406187.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406188.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406188.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406190.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406190.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406191.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406191.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406191.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406191.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406192.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406192.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406193.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406193.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406193.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406193.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406193.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406193.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406193.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406193.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406193.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406193.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406193.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406193.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406193.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406193.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406193.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406193.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406193.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406193.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406193.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406193.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406193.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d144e0]
>[406193.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d144e0] width 1920 pitch 7680 (/4 1920)
>[406193.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[406193.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[406194.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406194.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406194.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406194.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406194.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406195.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406196.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b045d0]
>[406196.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b045d0] width 1920 pitch 7680 (/4 1920)
>[406196.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406196.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406196.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[406196.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[406196.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406196.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406196.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[406196.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[406196.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406196.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406196.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[406196.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[406196.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406196.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406196.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[406196.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[406196.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406196.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406196.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed3630]
>[406196.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed3630] width 1920 pitch 7680 (/4 1920)
>[406196.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[406196.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[406197.309] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406197.309] (II) RADEON(0): Using hsync ranges from config file
>[406197.309] (II) RADEON(0): Using vrefresh ranges from config file
>[406197.309] (II) RADEON(0): Printing DDC gathered Modelines:
>[406197.309] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406197.309] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406197.309] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406197.309] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406197.309] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406197.309] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406197.309] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406197.309] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406197.309] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406197.309] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406197.309] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406197.309] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406198.117] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[406198.117] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[406198.117] (II) UnloadModule: "evdev"
>[406199.103] (II) AIGLX: Suspending AIGLX clients for VT switch
>[406199.103] (II) RADEON(0): RADEONLeaveVT_KMS
>[406199.103] (II) RADEON(0): Ok, leaving now...
>[406212.188] (II) AIGLX: Resuming AIGLX clients after VT switch
>[406212.188] (II) RADEON(0): RADEONEnterVT_KMS
>[406212.233] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406212.233] (II) RADEON(0): Using hsync ranges from config file
>[406212.233] (II) RADEON(0): Using vrefresh ranges from config file
>[406212.233] (II) RADEON(0): Printing DDC gathered Modelines:
>[406212.233] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406212.233] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406212.233] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406212.233] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406212.233] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406212.233] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406212.233] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406212.233] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406212.233] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406212.233] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406212.233] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406212.233] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406212.242] (II) RADEON(0): RADEONSaveScreen(2)
>[406214.929] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[406214.929] (II) No input driver specified, ignoring this device.
>[406214.929] (II) This device may have been added with another device file.
>[406214.929] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[406214.929] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[406214.929] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[406214.929] 	Option "XkbRules" "evdev"
>[406214.929] 	Option "XkbModel" "evdev"
>[406214.929] 	Option "XkbLayout" "us"
>[406214.929] 	Option "_source" "server/udev"
>[406214.929] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[406214.929] 	Option "path" "/dev/input/event14"
>[406214.929] 	Option "device" "/dev/input/event14"
>[406214.929] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input52/event14"
>[406214.929] 	Option "driver" "evdev"
>[406214.929] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[406214.929] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[406214.932] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[406214.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[406214.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[406214.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[406214.932] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[406214.932] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[406214.932] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[406214.932] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[406214.932] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[406214.932] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input52/event14"
>[406214.932] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[406214.932] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[406214.932] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[406214.932] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[406214.932] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[406214.932] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[406222.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[406222.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[406224.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406224.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406224.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406224.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406224.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406224.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406224.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406224.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406224.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406224.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406224.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406224.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406224.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406224.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406224.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406224.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406224.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406224.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406224.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406224.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406224.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406224.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406225.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406225.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406225.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406225.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406225.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406225.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406225.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406225.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406227.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406227.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406227.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406227.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406227.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d28f0]
>[406227.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d28f0] width 1920 pitch 7680 (/4 1920)
>[406227.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[406227.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[406227.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[406227.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[406227.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[406227.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[406227.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[406227.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[406227.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[406227.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[406227.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[406227.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[406227.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[406227.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[406227.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4e040]
>[406227.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4e040] width 1920 pitch 7680 (/4 1920)
>[406227.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[406227.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[406228.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[406228.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[406228.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[406228.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[406228.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[406228.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[406228.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8470]
>[406228.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8470] width 1920 pitch 7680 (/4 1920)
>[406228.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[406228.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[406228.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8470]
>[406228.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8470] width 1920 pitch 7680 (/4 1920)
>[406228.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[406228.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[406228.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8470]
>[406228.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8470] width 1920 pitch 7680 (/4 1920)
>[406228.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[406228.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[406228.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8470]
>[406228.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8470] width 1920 pitch 7680 (/4 1920)
>[406228.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[406228.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[406228.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae8470]
>[406229.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae8470] width 1920 pitch 7680 (/4 1920)
>[406229.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[406229.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[406229.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0bfb0]
>[406229.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0bfb0] width 1920 pitch 7680 (/4 1920)
>[406229.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406229.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406229.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4037160]
>[406229.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4037160] width 1920 pitch 7680 (/4 1920)
>[406229.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406229.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406229.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4037160]
>[406229.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4037160] width 1920 pitch 7680 (/4 1920)
>[406229.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406229.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406229.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4037160]
>[406229.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4037160] width 1920 pitch 7680 (/4 1920)
>[406229.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406229.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406229.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4037160]
>[406229.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4037160] width 1920 pitch 7680 (/4 1920)
>[406229.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406229.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406229.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[406229.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[406229.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406229.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406229.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[406229.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[406230.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[406230.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[406233.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398d560]
>[406233.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398d560] width 1920 pitch 7680 (/4 1920)
>[406242.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50af030]
>[406242.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50af030] width 1920 pitch 7680 (/4 1920)
>[406252.676] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406252.676] (II) RADEON(0): Using hsync ranges from config file
>[406252.676] (II) RADEON(0): Using vrefresh ranges from config file
>[406252.676] (II) RADEON(0): Printing DDC gathered Modelines:
>[406252.676] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406252.676] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406252.676] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406252.676] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406252.676] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406252.676] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406252.676] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406252.676] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406252.676] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406252.676] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406252.676] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406252.676] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406252.721] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406252.721] (II) RADEON(0): Using hsync ranges from config file
>[406252.721] (II) RADEON(0): Using vrefresh ranges from config file
>[406252.721] (II) RADEON(0): Printing DDC gathered Modelines:
>[406252.721] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406252.721] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406252.721] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406252.721] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406252.721] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406252.721] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406252.721] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406252.721] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406252.721] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406252.721] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406252.721] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406252.721] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406252.765] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406252.765] (II) RADEON(0): Using hsync ranges from config file
>[406252.765] (II) RADEON(0): Using vrefresh ranges from config file
>[406252.765] (II) RADEON(0): Printing DDC gathered Modelines:
>[406252.765] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406252.766] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406252.766] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406252.766] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406252.766] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406252.766] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406252.766] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406252.766] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406252.766] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406252.766] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406252.766] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406252.766] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406253.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb380]
>[406253.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb380] width 1920 pitch 7680 (/4 1920)
>[406257.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e4c70]
>[406257.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e4c70] width 1920 pitch 7680 (/4 1920)
>[406272.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b331d0]
>[406272.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b331d0] width 1920 pitch 7680 (/4 1920)
>[406302.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e4c70]
>[406302.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e4c70] width 1920 pitch 7680 (/4 1920)
>[406377.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b138d0]
>[406377.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b138d0] width 1920 pitch 7680 (/4 1920)
>[406407.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[406407.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[406422.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b98570]
>[406422.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b98570] width 1920 pitch 7680 (/4 1920)
>[406437.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dde50]
>[406437.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dde50] width 1920 pitch 7680 (/4 1920)
>[406497.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dde50]
>[406497.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dde50] width 1920 pitch 7680 (/4 1920)
>[406512.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b98570]
>[406512.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b98570] width 1920 pitch 7680 (/4 1920)
>[406587.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dde50]
>[406587.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dde50] width 1920 pitch 7680 (/4 1920)
>[406602.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dde50]
>[406602.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dde50] width 1920 pitch 7680 (/4 1920)
>[406617.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d830]
>[406617.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d830] width 1920 pitch 7680 (/4 1920)
>[406632.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dde50]
>[406632.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dde50] width 1920 pitch 7680 (/4 1920)
>[406647.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d830]
>[406647.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d830] width 1920 pitch 7680 (/4 1920)
>[406662.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dde50]
>[406662.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dde50] width 1920 pitch 7680 (/4 1920)
>[406677.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d830]
>[406677.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d830] width 1920 pitch 7680 (/4 1920)
>[406707.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d830]
>[406707.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d830] width 1920 pitch 7680 (/4 1920)
>[406722.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d830]
>[406722.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d830] width 1920 pitch 7680 (/4 1920)
>[406767.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c53e80]
>[406767.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c53e80] width 1920 pitch 7680 (/4 1920)
>[406769.970] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[406769.971] (II) RADEON(0): Using hsync ranges from config file
>[406769.971] (II) RADEON(0): Using vrefresh ranges from config file
>[406769.971] (II) RADEON(0): Printing DDC gathered Modelines:
>[406769.971] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[406769.971] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[406769.971] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[406769.971] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[406769.971] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[406769.971] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[406769.971] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[406769.971] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[406769.971] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[406769.971] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[406769.971] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[406769.971] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[406770.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[406770.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[406782.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[406782.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[406797.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[406797.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[406812.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[406812.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[406842.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[406842.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[406872.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[406872.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[406902.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[406902.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[406917.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[406917.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[407067.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[407067.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[407082.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[407082.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[407157.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[407157.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[407172.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[407172.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[407262.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[407262.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[407292.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[407292.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[407307.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[407307.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[407322.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[407322.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[407352.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[407352.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[407367.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[407367.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[407451.539] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[407451.539] (II) RADEON(0): Using hsync ranges from config file
>[407451.539] (II) RADEON(0): Using vrefresh ranges from config file
>[407451.539] (II) RADEON(0): Printing DDC gathered Modelines:
>[407451.539] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[407451.539] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[407451.539] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[407451.539] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[407451.539] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[407451.539] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[407451.539] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[407451.539] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[407451.539] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[407451.539] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[407451.539] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[407451.539] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[407457.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481050]
>[407457.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481050] width 1920 pitch 7680 (/4 1920)
>[407541.653] (II) RADEON(0): RADEONSaveScreen(2)
>[407541.653] (II) RADEON(0): RADEONSaveScreen(0)
>[408105.242] (II) RADEON(0): RADEONSaveScreen(1)
>[408105.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248ee70]
>[408105.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248ee70] width 1920 pitch 7680 (/4 1920)
>[408111.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2e30]
>[408111.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2e30] width 1920 pitch 7680 (/4 1920)
>[408112.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d2820]
>[408112.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d2820] width 1920 pitch 7680 (/4 1920)
>[408112.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[408112.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[408113.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[408113.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[408113.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[408113.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[408113.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[408113.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[408113.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[408113.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[408113.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[408113.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[408113.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[408113.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[408113.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[408113.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[408113.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[408113.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[408113.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d90670]
>[408113.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d90670] width 1920 pitch 7680 (/4 1920)
>[408113.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d109c0]
>[408113.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d109c0] width 1920 pitch 7680 (/4 1920)
>[408114.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[408114.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[408114.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6c2c0]
>[408114.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6c2c0] width 1920 pitch 7680 (/4 1920)
>[408114.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[408114.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[408114.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6c2c0]
>[408114.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6c2c0] width 1920 pitch 7680 (/4 1920)
>[408114.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[408114.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[408114.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6c2c0]
>[408114.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6c2c0] width 1920 pitch 7680 (/4 1920)
>[408114.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[408114.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[408115.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8c390]
>[408115.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8c390] width 1920 pitch 7680 (/4 1920)
>[408115.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8550]
>[408115.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8550] width 1920 pitch 7680 (/4 1920)
>[408115.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8c390]
>[408115.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8c390] width 1920 pitch 7680 (/4 1920)
>[408115.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8550]
>[408115.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8550] width 1920 pitch 7680 (/4 1920)
>[408115.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8c390]
>[408115.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8c390] width 1920 pitch 7680 (/4 1920)
>[408120.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d96730]
>[408120.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d96730] width 1920 pitch 7680 (/4 1920)
>[408180.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc19a0]
>[408180.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc19a0] width 1920 pitch 7680 (/4 1920)
>[408195.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc19a0]
>[408195.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc19a0] width 1920 pitch 7680 (/4 1920)
>[408255.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d218a0]
>[408255.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d218a0] width 1920 pitch 7680 (/4 1920)
>[408270.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d02d0]
>[408270.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d02d0] width 1920 pitch 7680 (/4 1920)
>[408285.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed500]
>[408285.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed500] width 1920 pitch 7680 (/4 1920)
>[408315.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fdb4d0]
>[408315.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fdb4d0] width 1920 pitch 7680 (/4 1920)
>[408360.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eec010]
>[408360.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eec010] width 1920 pitch 7680 (/4 1920)
>[408369.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408369.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408369.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408369.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408369.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcdb10]
>[408370.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcdb10] width 1920 pitch 7680 (/4 1920)
>[408370.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408370.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408370.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408370.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408370.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408370.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408370.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408370.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408370.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408370.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408370.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408370.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408370.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408370.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408370.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408370.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408370.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408371.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408371.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408371.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408371.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408371.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408371.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408371.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408371.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408371.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408371.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408371.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408371.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408371.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408371.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408371.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408371.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408371.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408371.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[408371.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[408371.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[408371.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[408373.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbee0]
>[408373.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbee0] width 1920 pitch 7680 (/4 1920)
>[408375.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3480]
>[408375.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3480] width 1920 pitch 7680 (/4 1920)
>[408377.443] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[408377.443] (II) RADEON(0): Using hsync ranges from config file
>[408377.443] (II) RADEON(0): Using vrefresh ranges from config file
>[408377.443] (II) RADEON(0): Printing DDC gathered Modelines:
>[408377.443] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[408377.443] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[408377.443] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[408377.443] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[408377.443] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[408377.443] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[408377.443] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[408377.443] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[408377.443] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[408377.443] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[408377.443] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[408377.443] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[408377.489] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[408377.489] (II) RADEON(0): Using hsync ranges from config file
>[408377.489] (II) RADEON(0): Using vrefresh ranges from config file
>[408377.489] (II) RADEON(0): Printing DDC gathered Modelines:
>[408377.489] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[408377.489] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[408377.489] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[408377.489] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[408377.489] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[408377.489] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[408377.489] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[408377.489] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[408377.489] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[408377.489] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[408377.489] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[408377.489] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[408377.537] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[408377.537] (II) RADEON(0): Using hsync ranges from config file
>[408377.537] (II) RADEON(0): Using vrefresh ranges from config file
>[408377.537] (II) RADEON(0): Printing DDC gathered Modelines:
>[408377.537] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[408377.537] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[408377.537] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[408377.537] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[408377.537] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[408377.537] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[408377.537] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[408377.537] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[408377.537] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[408377.537] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[408377.537] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[408377.537] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[408393.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e71e0]
>[408393.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e71e0] width 1920 pitch 7680 (/4 1920)
>[408405.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408405.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408420.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408420.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408435.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408435.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408465.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408465.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408480.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408480.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408495.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408495.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408510.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408510.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408525.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408525.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408540.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408540.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408555.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408555.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408570.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408570.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408585.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408585.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408600.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408600.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408615.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408615.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408645.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408645.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408660.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408660.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408675.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408675.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408690.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408690.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408720.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408720.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408735.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408735.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408750.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408750.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408765.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408765.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408780.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408780.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408795.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408795.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408810.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408810.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408960.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408960.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408971.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408971.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408971.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408971.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408971.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408971.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408971.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408971.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408971.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408971.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408971.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408971.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408971.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408971.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408971.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408971.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408971.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408971.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408971.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408971.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408971.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408971.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408971.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408971.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408975.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408975.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408975.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408975.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408975.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408975.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408975.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408975.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408975.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408975.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408975.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408975.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408975.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408975.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408975.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408975.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408975.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408975.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408975.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408975.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408975.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408975.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408976.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408976.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408976.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408976.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408976.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408976.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408976.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408976.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408976.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408976.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408976.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408976.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408976.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408976.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408976.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408976.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408976.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408977.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408977.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408977.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408977.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[408977.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[408977.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408977.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408987.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408987.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408987.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408987.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408987.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408987.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408987.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408987.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408988.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408988.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408988.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc7f90]
>[408988.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc7f90] width 1920 pitch 7680 (/4 1920)
>[408988.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408988.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408988.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393c8e0]
>[408988.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393c8e0] width 1920 pitch 7680 (/4 1920)
>[408988.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aacd30]
>[408988.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aacd30] width 1920 pitch 7680 (/4 1920)
>[409005.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b6f80]
>[409005.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b6f80] width 1920 pitch 7680 (/4 1920)
>[409020.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fa50]
>[409020.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fa50] width 1920 pitch 7680 (/4 1920)
>[409035.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d03140]
>[409035.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d03140] width 1920 pitch 7680 (/4 1920)
>[409038.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d03140]
>[409039.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d03140] width 1920 pitch 7680 (/4 1920)
>[409039.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ddaad0]
>[409039.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ddaad0] width 1920 pitch 7680 (/4 1920)
>[409039.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409039.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409065.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8f10]
>[409065.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8f10] width 1920 pitch 7680 (/4 1920)
>[409095.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409095.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409110.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409110.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409155.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409155.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409183.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409183.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409183.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409184.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409184.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409184.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409184.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409184.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409184.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39df2c0]
>[409184.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39df2c0] width 1920 pitch 7680 (/4 1920)
>[409184.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8f10]
>[409184.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8f10] width 1920 pitch 7680 (/4 1920)
>[409184.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8f10]
>[409184.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8f10] width 1920 pitch 7680 (/4 1920)
>[409184.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409184.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409184.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409184.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409185.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409185.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409185.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409185.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409185.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8f10]
>[409185.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8f10] width 1920 pitch 7680 (/4 1920)
>[409186.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409186.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409186.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39df2c0]
>[409186.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39df2c0] width 1920 pitch 7680 (/4 1920)
>[409186.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409186.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409187.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409187.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409187.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc8f10]
>[409187.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc8f10] width 1920 pitch 7680 (/4 1920)
>[409187.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409187.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409187.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409187.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[409215.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114870]
>[409215.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114870] width 1920 pitch 7680 (/4 1920)
>[409275.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409275.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409290.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5368bb0]
>[409290.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5368bb0] width 1920 pitch 7680 (/4 1920)
>[409320.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5368bb0]
>[409320.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5368bb0] width 1920 pitch 7680 (/4 1920)
>[409335.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409335.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409380.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409380.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409395.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409395.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409425.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114870]
>[409425.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114870] width 1920 pitch 7680 (/4 1920)
>[409440.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409440.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409455.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114870]
>[409455.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114870] width 1920 pitch 7680 (/4 1920)
>[409470.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409470.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409485.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409485.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409500.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409500.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409530.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114870]
>[409530.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114870] width 1920 pitch 7680 (/4 1920)
>[409542.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114870]
>[409542.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114870] width 1920 pitch 7680 (/4 1920)
>[409543.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3957160]
>[409543.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3957160] width 1920 pitch 7680 (/4 1920)
>[409543.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409543.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409544.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409544.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409544.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409544.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409544.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114870]
>[409544.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114870] width 1920 pitch 7680 (/4 1920)
>[409544.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[409544.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[409545.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409545.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409545.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409545.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409545.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409545.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409560.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409560.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409590.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409590.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409605.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409605.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409620.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409620.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409635.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[409635.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[409650.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[409650.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[409665.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[409665.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[409692.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409692.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409692.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409692.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409692.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409692.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409692.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409692.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409692.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409692.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409692.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409692.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409692.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409692.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409693.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409693.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409693.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409693.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409693.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409693.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409693.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409693.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409695.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409695.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409695.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168780]
>[409695.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168780] width 1920 pitch 7680 (/4 1920)
>[409695.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f5e200]
>[409695.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f5e200] width 1920 pitch 7680 (/4 1920)
>[409695.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409695.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409695.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409695.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409696.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[409696.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[409696.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e7b0]
>[409696.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e7b0] width 1920 pitch 7680 (/4 1920)
>[409710.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017e10]
>[409710.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017e10] width 1920 pitch 7680 (/4 1920)
>[409725.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409725.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[409726.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409726.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[409726.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce90b0]
>[409726.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce90b0] width 1920 pitch 7680 (/4 1920)
>[409726.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bc0c10]
>[409726.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bc0c10] width 1920 pitch 7680 (/4 1920)
>[409740.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017e10]
>[409740.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017e10] width 1920 pitch 7680 (/4 1920)
>[409755.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409755.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409770.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[409770.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[409815.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[409815.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[409830.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[409830.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[409845.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409845.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409860.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409860.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[409875.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409875.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409890.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409890.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[409905.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409905.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[409935.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409935.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409950.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[409950.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[409965.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[409965.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[409995.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[409995.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[410010.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[410010.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[410025.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[410025.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[410039.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[410039.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[410039.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017e10]
>[410039.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017e10] width 1920 pitch 7680 (/4 1920)
>[410039.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[410039.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[410039.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[410039.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[410039.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[410039.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[410040.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[410040.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[410040.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[410040.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[410040.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[410040.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[410040.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017e10]
>[410040.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017e10] width 1920 pitch 7680 (/4 1920)
>[410040.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[410040.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[410041.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017e10]
>[410042.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017e10] width 1920 pitch 7680 (/4 1920)
>[410042.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7cf00]
>[410042.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7cf00] width 1920 pitch 7680 (/4 1920)
>[410055.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c1d0]
>[410055.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c1d0] width 1920 pitch 7680 (/4 1920)
>[410070.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbf700]
>[410070.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbf700] width 1920 pitch 7680 (/4 1920)
>[410085.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfd80]
>[410085.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfd80] width 1920 pitch 7680 (/4 1920)
>[410100.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f423e0]
>[410100.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f423e0] width 1920 pitch 7680 (/4 1920)
>[410115.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6b6d0]
>[410115.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6b6d0] width 1920 pitch 7680 (/4 1920)
>[410160.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd32e0]
>[410160.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd32e0] width 1920 pitch 7680 (/4 1920)
>[410175.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78340]
>[410175.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78340] width 1920 pitch 7680 (/4 1920)
>[410179.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[410179.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[410179.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[410179.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[410182.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78340]
>[410182.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78340] width 1920 pitch 7680 (/4 1920)
>[410182.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9f2c0]
>[410182.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9f2c0] width 1920 pitch 7680 (/4 1920)
>[410182.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[410182.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[410190.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9f2c0]
>[410190.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9f2c0] width 1920 pitch 7680 (/4 1920)
>[410218.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfe00]
>[410218.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfe00] width 1920 pitch 7680 (/4 1920)
>[410219.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfe00]
>[410219.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfe00] width 1920 pitch 7680 (/4 1920)
>[410219.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[410219.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[410340.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[410340.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[410355.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[410355.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[410610.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[410610.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[410625.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[410625.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[410865.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[410865.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[410880.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[410880.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[410940.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[410940.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[410955.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[410955.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[410970.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[410970.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[410985.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[410985.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411000.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411000.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411015.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411015.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411045.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411045.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411060.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411060.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[411090.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411090.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411105.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411105.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411135.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411135.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411150.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411150.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[411165.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411165.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411195.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411195.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411255.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411255.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[411300.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411300.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411315.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411315.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411330.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[411330.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[411345.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[411345.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[411375.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411375.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[411390.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411390.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411405.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411405.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411420.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411420.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411435.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411435.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[411465.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411465.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411555.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[411555.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[411570.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411570.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411600.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411600.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411615.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411615.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411630.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411630.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411645.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411645.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411660.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411660.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411675.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411675.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411690.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411690.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411705.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[411705.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[411735.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[411735.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[411765.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411765.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411780.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[411780.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[411795.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[411795.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[411810.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[411810.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[411870.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411870.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411885.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411885.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[411900.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[411900.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[411915.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[411915.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[411945.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[411945.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[411960.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[411960.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[412005.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[412005.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[412020.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412020.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412035.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412035.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412080.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412080.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412095.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412095.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412110.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412110.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412185.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412185.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412200.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412200.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412215.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412215.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412230.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412230.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412245.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412245.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412275.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412275.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412290.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412290.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412305.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412305.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412320.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[412320.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[412335.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412335.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412350.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412350.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[412365.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412365.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412380.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412380.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412425.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412425.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412470.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[412470.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[412485.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412485.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412500.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412500.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412515.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412515.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412530.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[412530.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[412545.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412545.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412560.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412560.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[412575.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412575.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[412590.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412590.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412605.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412605.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412620.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412620.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412635.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412635.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[412650.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412650.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412665.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412665.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[412725.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[412725.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[412740.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[412740.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[412875.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412875.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[412890.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412890.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412905.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412905.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412980.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[412980.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[412995.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[412995.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413055.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413055.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413070.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413070.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413100.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413100.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413115.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413115.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413145.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413145.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413160.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413160.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413175.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413175.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413190.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413190.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413205.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413205.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413220.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413220.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413235.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413235.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413250.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413250.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413265.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413265.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413280.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413280.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413310.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413310.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413325.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413325.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413445.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413445.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413475.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413475.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413490.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413490.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413505.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413505.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413550.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413550.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413565.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413565.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413580.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413580.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413610.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413610.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413625.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413625.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413655.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413655.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413670.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413670.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413685.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413685.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413700.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413700.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413715.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[413715.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[413730.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413730.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413745.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413745.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413760.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413760.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413775.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413775.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413805.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413805.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413820.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413820.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413835.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[413835.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[413850.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[413850.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[413865.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413865.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413895.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413895.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413910.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413910.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[413970.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[413970.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[413985.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[413985.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414000.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414000.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414015.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[414015.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[414030.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414030.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414075.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414075.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414090.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414090.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414105.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414105.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414120.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414120.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414150.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414150.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414165.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414165.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414180.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414180.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414195.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414195.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414210.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[414210.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[414225.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414225.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414240.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[414240.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[414270.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414270.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414315.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414315.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414330.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414330.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414360.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414360.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414375.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414375.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414390.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414390.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414405.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414405.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414420.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414420.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414435.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414435.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414450.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414450.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414480.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414480.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414495.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414495.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414510.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414510.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414525.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414525.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414540.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414540.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414555.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414555.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414570.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414570.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414585.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414585.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414600.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414600.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414615.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414615.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414630.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414630.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414660.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[414660.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[414675.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[414675.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[414690.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414690.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414705.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414705.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414735.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414735.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414750.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414750.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414765.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414765.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414780.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414780.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414795.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d698f0]
>[414795.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d698f0] width 1920 pitch 7680 (/4 1920)
>[414810.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414810.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414825.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414825.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414855.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbfda0]
>[414855.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbfda0] width 1920 pitch 7680 (/4 1920)
>[414885.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[414885.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[414915.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414915.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[414975.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[414975.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[414990.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eabdd0]
>[414990.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eabdd0] width 1920 pitch 7680 (/4 1920)
>[415020.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0e1e0]
>[415020.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0e1e0] width 1920 pitch 7680 (/4 1920)
>[415035.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78db0]
>[415035.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78db0] width 1920 pitch 7680 (/4 1920)
>[415044.550] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[415044.550] (II) RADEON(0): Using hsync ranges from config file
>[415044.550] (II) RADEON(0): Using vrefresh ranges from config file
>[415044.550] (II) RADEON(0): Printing DDC gathered Modelines:
>[415044.550] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[415044.550] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[415044.550] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[415044.550] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[415044.550] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[415044.550] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[415044.550] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[415044.550] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[415044.550] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[415044.550] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[415044.550] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[415044.550] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[415044.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[415044.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[415065.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114a20]
>[415065.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114a20] width 1920 pitch 7680 (/4 1920)
>[415080.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415080.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415091.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b680]
>[415091.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b680] width 1920 pitch 7680 (/4 1920)
>[415091.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d89200]
>[415091.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d89200] width 1920 pitch 7680 (/4 1920)
>[415092.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415092.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415092.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415092.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415092.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415092.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415092.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415092.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415092.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415092.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415092.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415092.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415092.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415092.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415092.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415092.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415092.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415092.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415093.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415093.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415093.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6c90]
>[415093.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6c90] width 1920 pitch 7680 (/4 1920)
>[415093.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415093.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415093.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e99bd0]
>[415093.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e99bd0] width 1920 pitch 7680 (/4 1920)
>[415093.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[415093.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[415093.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[415093.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[415093.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[415094.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[415094.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[415094.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[415094.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d94c0]
>[415094.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d94c0] width 1920 pitch 7680 (/4 1920)
>[415094.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[415094.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[415094.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415094.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415094.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415094.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415094.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415094.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415094.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415094.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415094.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415094.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415094.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415094.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415094.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415094.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415094.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415094.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415094.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415094.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415094.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415094.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415094.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415094.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415095.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415095.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415095.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415095.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415095.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[415095.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[415095.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016770]
>[415095.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016770] width 1920 pitch 7680 (/4 1920)
>[415095.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78340]
>[415095.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78340] width 1920 pitch 7680 (/4 1920)
>[415095.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6b740]
>[415095.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6b740] width 1920 pitch 7680 (/4 1920)
>[415095.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78340]
>[415095.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78340] width 1920 pitch 7680 (/4 1920)
>[415095.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6b740]
>[415095.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6b740] width 1920 pitch 7680 (/4 1920)
>[415095.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23d00]
>[415095.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23d00] width 1920 pitch 7680 (/4 1920)
>[415095.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[415095.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[415095.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23d00]
>[415095.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23d00] width 1920 pitch 7680 (/4 1920)
>[415095.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6a230]
>[415095.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6a230] width 1920 pitch 7680 (/4 1920)
>[415095.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23d00]
>[415095.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23d00] width 1920 pitch 7680 (/4 1920)
>[415097.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d78340]
>[415097.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d78340] width 1920 pitch 7680 (/4 1920)
>[415097.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2546960]
>[415097.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2546960] width 1920 pitch 7680 (/4 1920)
>[415097.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23d00]
>[415097.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23d00] width 1920 pitch 7680 (/4 1920)
>[415097.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d46120]
>[415097.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d46120] width 1920 pitch 7680 (/4 1920)
>[415097.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c45480]
>[415097.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c45480] width 1920 pitch 7680 (/4 1920)
>[415097.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1cee0]
>[415097.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1cee0] width 1920 pitch 7680 (/4 1920)
>[415097.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[415097.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[415097.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[415097.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[415097.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[415097.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[415097.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[415097.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[415097.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[415097.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[415097.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[415097.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[415097.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[415097.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[415110.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[415110.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[415286.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[415286.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[415286.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415286.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415286.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471330]
>[415286.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471330] width 1920 pitch 7680 (/4 1920)
>[415286.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472170]
>[415286.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472170] width 1920 pitch 7680 (/4 1920)
>[415286.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471330]
>[415286.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471330] width 1920 pitch 7680 (/4 1920)
>[415286.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472170]
>[415286.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472170] width 1920 pitch 7680 (/4 1920)
>[415286.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471330]
>[415286.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471330] width 1920 pitch 7680 (/4 1920)
>[415286.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472170]
>[415287.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472170] width 1920 pitch 7680 (/4 1920)
>[415287.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471330]
>[415287.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471330] width 1920 pitch 7680 (/4 1920)
>[415287.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472170]
>[415287.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472170] width 1920 pitch 7680 (/4 1920)
>[415287.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471330]
>[415287.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471330] width 1920 pitch 7680 (/4 1920)
>[415287.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2472170]
>[415287.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2472170] width 1920 pitch 7680 (/4 1920)
>[415287.918] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[415287.918] (II) RADEON(0): Using hsync ranges from config file
>[415287.918] (II) RADEON(0): Using vrefresh ranges from config file
>[415287.918] (II) RADEON(0): Printing DDC gathered Modelines:
>[415287.918] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[415287.918] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[415287.918] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[415287.918] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[415287.918] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[415287.918] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[415287.918] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[415287.918] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[415287.918] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[415287.918] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[415287.918] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[415287.918] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[415287.918] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[415287.918] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[415287.919] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[415287.919] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[415289.612] (II) AIGLX: Suspending AIGLX clients for VT switch
>[415289.612] (II) RADEON(0): RADEONLeaveVT_KMS
>[415289.612] (II) RADEON(0): Ok, leaving now...
>[415302.695] (II) AIGLX: Resuming AIGLX clients after VT switch
>[415302.695] (II) RADEON(0): RADEONEnterVT_KMS
>[415302.740] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[415302.740] (II) RADEON(0): Using hsync ranges from config file
>[415302.740] (II) RADEON(0): Using vrefresh ranges from config file
>[415302.740] (II) RADEON(0): Printing DDC gathered Modelines:
>[415302.740] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[415302.740] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[415302.740] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[415302.740] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[415302.740] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[415302.740] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[415302.740] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[415302.740] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[415302.740] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[415302.740] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[415302.740] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[415302.740] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[415302.747] (II) RADEON(0): RADEONSaveScreen(2)
>[415425.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[415425.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[415426.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1790]
>[415426.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1790] width 1920 pitch 7680 (/4 1920)
>[415427.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb70b0]
>[415427.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb70b0] width 1920 pitch 7680 (/4 1920)
>[415427.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a148d0]
>[415427.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a148d0] width 1920 pitch 7680 (/4 1920)
>[415427.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc720]
>[415427.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc720] width 1920 pitch 7680 (/4 1920)
>[415433.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb7cd0]
>[415433.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb7cd0] width 1920 pitch 7680 (/4 1920)
>[415436.668] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[415436.668] (II) RADEON(0): Using hsync ranges from config file
>[415436.668] (II) RADEON(0): Using vrefresh ranges from config file
>[415436.668] (II) RADEON(0): Printing DDC gathered Modelines:
>[415436.668] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[415436.668] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[415436.668] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[415436.668] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[415436.668] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[415436.668] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[415436.668] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[415436.668] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[415436.668] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[415436.668] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[415436.668] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[415436.668] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[415436.712] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[415436.712] (II) RADEON(0): Using hsync ranges from config file
>[415436.712] (II) RADEON(0): Using vrefresh ranges from config file
>[415436.712] (II) RADEON(0): Printing DDC gathered Modelines:
>[415436.712] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[415436.712] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[415436.712] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[415436.712] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[415436.712] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[415436.712] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[415436.712] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[415436.712] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[415436.712] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[415436.712] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[415436.712] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[415436.712] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[415436.760] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[415436.760] (II) RADEON(0): Using hsync ranges from config file
>[415436.760] (II) RADEON(0): Using vrefresh ranges from config file
>[415436.760] (II) RADEON(0): Printing DDC gathered Modelines:
>[415436.760] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[415436.760] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[415436.760] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[415436.760] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[415436.760] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[415436.760] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[415436.760] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[415436.760] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[415436.760] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[415436.760] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[415436.760] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[415436.760] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[415437.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247bcf0]
>[415437.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247bcf0] width 1920 pitch 7680 (/4 1920)
>[415444.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce13f0]
>[415444.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce13f0] width 1920 pitch 7680 (/4 1920)
>[415445.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415445.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415445.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccab60]
>[415445.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccab60] width 1920 pitch 7680 (/4 1920)
>[415445.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415445.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415445.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[415445.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[415445.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415445.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415445.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccab60]
>[415445.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccab60] width 1920 pitch 7680 (/4 1920)
>[415445.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415445.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415446.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[415446.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[415446.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccab60]
>[415446.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccab60] width 1920 pitch 7680 (/4 1920)
>[415446.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415446.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415446.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccab60]
>[415446.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccab60] width 1920 pitch 7680 (/4 1920)
>[415447.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415447.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415447.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3bb50]
>[415447.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3bb50] width 1920 pitch 7680 (/4 1920)
>[415447.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b2f0]
>[415447.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b2f0] width 1920 pitch 7680 (/4 1920)
>[415447.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16460]
>[415447.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16460] width 1920 pitch 7680 (/4 1920)
>[415447.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ef50]
>[415447.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ef50] width 1920 pitch 7680 (/4 1920)
>[415447.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16460]
>[415447.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16460] width 1920 pitch 7680 (/4 1920)
>[415447.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415447.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415447.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ef50]
>[415447.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ef50] width 1920 pitch 7680 (/4 1920)
>[415447.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415447.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415447.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b2f0]
>[415447.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b2f0] width 1920 pitch 7680 (/4 1920)
>[415452.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3bb50]
>[415452.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3bb50] width 1920 pitch 7680 (/4 1920)
>[415467.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[415467.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[415488.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[415488.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[415489.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c465f0]
>[415489.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c465f0] width 1920 pitch 7680 (/4 1920)
>[415489.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ccab60]
>[415489.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ccab60] width 1920 pitch 7680 (/4 1920)
>[415489.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e230]
>[415489.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e230] width 1920 pitch 7680 (/4 1920)
>[415497.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c26e60]
>[415497.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c26e60] width 1920 pitch 7680 (/4 1920)
>[415512.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95060]
>[415512.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95060] width 1920 pitch 7680 (/4 1920)
>[415527.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[415527.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[415542.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[415542.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[415587.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2ec60]
>[415587.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2ec60] width 1920 pitch 7680 (/4 1920)
>[415602.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[415602.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[415632.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415632.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415647.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[415647.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[415662.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2ec60]
>[415662.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2ec60] width 1920 pitch 7680 (/4 1920)
>[415707.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8b2f0]
>[415707.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8b2f0] width 1920 pitch 7680 (/4 1920)
>[415722.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16460]
>[415722.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16460] width 1920 pitch 7680 (/4 1920)
>[415737.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e230]
>[415737.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e230] width 1920 pitch 7680 (/4 1920)
>[415738.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87930]
>[415738.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87930] width 1920 pitch 7680 (/4 1920)
>[415738.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e230]
>[415738.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e230] width 1920 pitch 7680 (/4 1920)
>[415738.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e230]
>[415738.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e230] width 1920 pitch 7680 (/4 1920)
>[415738.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87930]
>[415738.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87930] width 1920 pitch 7680 (/4 1920)
>[415738.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e230]
>[415739.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e230] width 1920 pitch 7680 (/4 1920)
>[415739.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e230]
>[415739.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e230] width 1920 pitch 7680 (/4 1920)
>[415739.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967d70]
>[415739.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967d70] width 1920 pitch 7680 (/4 1920)
>[415739.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967d70]
>[415739.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967d70] width 1920 pitch 7680 (/4 1920)
>[415740.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87930]
>[415740.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87930] width 1920 pitch 7680 (/4 1920)
>[415752.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b6a0]
>[415752.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b6a0] width 1920 pitch 7680 (/4 1920)
>[415767.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec630]
>[415767.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec630] width 1920 pitch 7680 (/4 1920)
>[415797.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394be60]
>[415797.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394be60] width 1920 pitch 7680 (/4 1920)
>[415812.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd3800]
>[415812.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd3800] width 1920 pitch 7680 (/4 1920)
>[415827.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de320]
>[415827.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de320] width 1920 pitch 7680 (/4 1920)
>[415842.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c429b0]
>[415842.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c429b0] width 1920 pitch 7680 (/4 1920)
>[415850.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ec20]
>[415850.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ec20] width 1920 pitch 7680 (/4 1920)
>[415850.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8060]
>[415850.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8060] width 1920 pitch 7680 (/4 1920)
>[415850.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ec20]
>[415850.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ec20] width 1920 pitch 7680 (/4 1920)
>[415850.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[415850.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[415850.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa63d0]
>[415850.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa63d0] width 1920 pitch 7680 (/4 1920)
>[415850.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8060]
>[415850.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8060] width 1920 pitch 7680 (/4 1920)
>[415851.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc3480]
>[415851.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc3480] width 1920 pitch 7680 (/4 1920)
>[415851.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ec20]
>[415851.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ec20] width 1920 pitch 7680 (/4 1920)
>[415851.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc3480]
>[415851.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc3480] width 1920 pitch 7680 (/4 1920)
>[415855.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ec20]
>[415855.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ec20] width 1920 pitch 7680 (/4 1920)
>[415856.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc3480]
>[415856.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc3480] width 1920 pitch 7680 (/4 1920)
>[415856.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ec20]
>[415856.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ec20] width 1920 pitch 7680 (/4 1920)
>[415856.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc3480]
>[415856.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc3480] width 1920 pitch 7680 (/4 1920)
>[415856.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391ec20]
>[415856.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391ec20] width 1920 pitch 7680 (/4 1920)
>[415856.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f9060]
>[415856.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f9060] width 1920 pitch 7680 (/4 1920)
>[415875.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[415875.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[415876.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a50e0]
>[415876.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a50e0] width 1920 pitch 7680 (/4 1920)
>[415887.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415887.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415902.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d36220]
>[415902.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d36220] width 1920 pitch 7680 (/4 1920)
>[415917.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415917.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415932.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415932.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415947.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d36220]
>[415947.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d36220] width 1920 pitch 7680 (/4 1920)
>[415962.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a50e0]
>[415962.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a50e0] width 1920 pitch 7680 (/4 1920)
>[415977.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb7900]
>[415977.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb7900] width 1920 pitch 7680 (/4 1920)
>[415987.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415987.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415987.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415987.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415987.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415987.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415987.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415987.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415987.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415987.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415987.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415987.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415987.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415987.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415987.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415987.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415987.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415987.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415988.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415988.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415988.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415988.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415988.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415988.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415988.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415989.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415989.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415989.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415989.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415989.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415989.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415989.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415989.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415989.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415989.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[415989.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[415989.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415989.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415989.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415989.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415989.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415989.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415990.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[415990.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[415990.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415990.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415990.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[415990.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[415991.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d23d00]
>[415991.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d23d00] width 1920 pitch 7680 (/4 1920)
>[415991.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415991.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415991.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa6120]
>[415991.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa6120] width 1920 pitch 7680 (/4 1920)
>[415991.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edf210]
>[415991.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edf210] width 1920 pitch 7680 (/4 1920)
>[415991.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8060]
>[415991.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8060] width 1920 pitch 7680 (/4 1920)
>[415991.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415991.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415991.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd7b00]
>[415991.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd7b00] width 1920 pitch 7680 (/4 1920)
>[415992.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd7b00]
>[415992.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd7b00] width 1920 pitch 7680 (/4 1920)
>[415993.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd7b00]
>[415993.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd7b00] width 1920 pitch 7680 (/4 1920)
>[415993.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415993.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415993.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd7b00]
>[415993.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd7b00] width 1920 pitch 7680 (/4 1920)
>[415993.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24717b0]
>[415993.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24717b0] width 1920 pitch 7680 (/4 1920)
>[415993.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c15320]
>[415993.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c15320] width 1920 pitch 7680 (/4 1920)
>[416006.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc06c0]
>[416006.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc06c0] width 1920 pitch 7680 (/4 1920)
>[416007.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8060]
>[416007.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8060] width 1920 pitch 7680 (/4 1920)
>[416007.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8060]
>[416007.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8060] width 1920 pitch 7680 (/4 1920)
>[416007.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8060]
>[416007.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8060] width 1920 pitch 7680 (/4 1920)
>[416022.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7bd00]
>[416022.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7bd00] width 1920 pitch 7680 (/4 1920)
>[416037.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d999b0]
>[416037.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d999b0] width 1920 pitch 7680 (/4 1920)
>[416052.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b080]
>[416052.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b080] width 1920 pitch 7680 (/4 1920)
>[416067.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbc3c0]
>[416067.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbc3c0] width 1920 pitch 7680 (/4 1920)
>[416082.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9fe60]
>[416082.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9fe60] width 1920 pitch 7680 (/4 1920)
>[416097.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc1b00]
>[416097.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc1b00] width 1920 pitch 7680 (/4 1920)
>[416112.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46fe0]
>[416112.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46fe0] width 1920 pitch 7680 (/4 1920)
>[416127.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b91510]
>[416127.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b91510] width 1920 pitch 7680 (/4 1920)
>[416142.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39ce700]
>[416142.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39ce700] width 1920 pitch 7680 (/4 1920)
>[416157.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d62330]
>[416157.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d62330] width 1920 pitch 7680 (/4 1920)
>[416187.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30350]
>[416187.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30350] width 1920 pitch 7680 (/4 1920)
>[416202.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30350]
>[416202.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30350] width 1920 pitch 7680 (/4 1920)
>[416217.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc31b0]
>[416217.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc31b0] width 1920 pitch 7680 (/4 1920)
>[416247.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd8d0]
>[416247.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd8d0] width 1920 pitch 7680 (/4 1920)
>[416262.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30350]
>[416262.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30350] width 1920 pitch 7680 (/4 1920)
>[416382.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd8d0]
>[416382.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd8d0] width 1920 pitch 7680 (/4 1920)
>[416397.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c30350]
>[416397.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c30350] width 1920 pitch 7680 (/4 1920)
>[416412.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd8d0]
>[416412.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd8d0] width 1920 pitch 7680 (/4 1920)
>[416502.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[416502.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[416517.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d62330]
>[416517.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d62330] width 1920 pitch 7680 (/4 1920)
>[416547.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[416547.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[416562.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[416562.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[416592.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416592.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416604.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[416604.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[416604.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[416604.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[416604.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024350]
>[416604.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024350] width 1920 pitch 7680 (/4 1920)
>[416604.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416604.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416604.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d62330]
>[416604.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d62330] width 1920 pitch 7680 (/4 1920)
>[416604.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416604.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416604.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[416604.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[416605.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416605.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416605.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[416605.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[416605.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416605.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416605.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416605.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416605.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[416605.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[416607.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416607.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416607.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416607.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416607.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[416607.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[416608.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416608.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416609.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416609.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416609.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[416609.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[416610.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416610.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416610.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416610.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416611.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416611.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416611.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[416611.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[416611.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416611.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416611.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401d2d0]
>[416611.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401d2d0] width 1920 pitch 7680 (/4 1920)
>[416611.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edf8e0]
>[416611.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edf8e0] width 1920 pitch 7680 (/4 1920)
>[416637.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51ed0]
>[416637.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51ed0] width 1920 pitch 7680 (/4 1920)
>[416641.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c36920]
>[416641.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c36920] width 1920 pitch 7680 (/4 1920)
>[416652.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[416652.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[416772.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[416772.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[416787.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5218c30]
>[416787.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5218c30] width 1920 pitch 7680 (/4 1920)
>[416877.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4a760]
>[416877.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4a760] width 1920 pitch 7680 (/4 1920)
>[416907.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4a760]
>[416907.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4a760] width 1920 pitch 7680 (/4 1920)
>[416982.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395a760]
>[416982.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395a760] width 1920 pitch 7680 (/4 1920)
>[416997.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccdd0]
>[416997.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccdd0] width 1920 pitch 7680 (/4 1920)
>[417012.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4a760]
>[417012.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4a760] width 1920 pitch 7680 (/4 1920)
>[417042.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395a760]
>[417042.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395a760] width 1920 pitch 7680 (/4 1920)
>[417057.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4a760]
>[417057.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4a760] width 1920 pitch 7680 (/4 1920)
>[417072.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395a760]
>[417072.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395a760] width 1920 pitch 7680 (/4 1920)
>[417087.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dccdd0]
>[417087.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dccdd0] width 1920 pitch 7680 (/4 1920)
>[417117.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f4a760]
>[417117.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f4a760] width 1920 pitch 7680 (/4 1920)
>[417147.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[417147.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[417147.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dbc930]
>[417147.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dbc930] width 1920 pitch 7680 (/4 1920)
>[417148.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc730]
>[417148.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc730] width 1920 pitch 7680 (/4 1920)
>[417148.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d3e0]
>[417148.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d3e0] width 1920 pitch 7680 (/4 1920)
>[417148.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417148.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417162.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5368890]
>[417162.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5368890] width 1920 pitch 7680 (/4 1920)
>[417177.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417177.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417192.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417192.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417222.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417222.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417237.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d3e0]
>[417237.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d3e0] width 1920 pitch 7680 (/4 1920)
>[417252.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d3e0]
>[417252.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d3e0] width 1920 pitch 7680 (/4 1920)
>[417267.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d3e0]
>[417267.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d3e0] width 1920 pitch 7680 (/4 1920)
>[417282.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417282.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417357.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5368890]
>[417357.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5368890] width 1920 pitch 7680 (/4 1920)
>[417372.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417372.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417387.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417387.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417402.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417402.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417417.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae6ff0]
>[417417.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae6ff0] width 1920 pitch 7680 (/4 1920)
>[417462.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77bd0]
>[417462.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77bd0] width 1920 pitch 7680 (/4 1920)
>[417477.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22050]
>[417477.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22050] width 1920 pitch 7680 (/4 1920)
>[417492.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd90b0]
>[417492.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd90b0] width 1920 pitch 7680 (/4 1920)
>[417507.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd90b0]
>[417507.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd90b0] width 1920 pitch 7680 (/4 1920)
>[417522.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22050]
>[417522.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22050] width 1920 pitch 7680 (/4 1920)
>[417537.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22050]
>[417537.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22050] width 1920 pitch 7680 (/4 1920)
>[417552.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d410]
>[417552.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d410] width 1920 pitch 7680 (/4 1920)
>[417567.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcef40]
>[417567.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcef40] width 1920 pitch 7680 (/4 1920)
>[417597.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcef50]
>[417597.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcef50] width 1920 pitch 7680 (/4 1920)
>[417612.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83e90]
>[417612.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83e90] width 1920 pitch 7680 (/4 1920)
>[417627.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83e90]
>[417627.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83e90] width 1920 pitch 7680 (/4 1920)
>[417642.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcc80]
>[417642.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcc80] width 1920 pitch 7680 (/4 1920)
>[417657.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301c8b0]
>[417657.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301c8b0] width 1920 pitch 7680 (/4 1920)
>[417672.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57170]
>[417672.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57170] width 1920 pitch 7680 (/4 1920)
>[417702.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[417702.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[417717.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4dbf0]
>[417717.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4dbf0] width 1920 pitch 7680 (/4 1920)
>[417732.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4dbf0]
>[417732.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4dbf0] width 1920 pitch 7680 (/4 1920)
>[417747.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d4dbf0]
>[417747.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d4dbf0] width 1920 pitch 7680 (/4 1920)
>[417756.667] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[417756.667] (II) RADEON(0): Using hsync ranges from config file
>[417756.667] (II) RADEON(0): Using vrefresh ranges from config file
>[417756.667] (II) RADEON(0): Printing DDC gathered Modelines:
>[417756.667] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[417756.667] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[417756.667] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[417756.667] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[417756.667] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[417756.667] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[417756.667] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[417756.667] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[417756.667] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[417756.667] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[417756.667] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[417756.667] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[417756.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2e40]
>[417756.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2e40] width 1920 pitch 7680 (/4 1920)
>[417762.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[417762.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[417852.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[417852.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[417853.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6157fd0]
>[417853.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6157fd0] width 1920 pitch 7680 (/4 1920)
>[417854.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[417854.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[417854.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[417854.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[417854.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f29e0]
>[417854.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f29e0] width 1920 pitch 7680 (/4 1920)
>[417856.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[417856.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[417856.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[417856.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[417856.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522ca90]
>[417856.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522ca90] width 1920 pitch 7680 (/4 1920)
>[417856.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a49730]
>[417856.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a49730] width 1920 pitch 7680 (/4 1920)
>[417856.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522ca90]
>[417856.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522ca90] width 1920 pitch 7680 (/4 1920)
>[417857.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebbad0]
>[417857.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebbad0] width 1920 pitch 7680 (/4 1920)
>[417858.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e60]
>[417858.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e60] width 1920 pitch 7680 (/4 1920)
>[417858.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[417858.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[417858.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b9840]
>[417858.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b9840] width 1920 pitch 7680 (/4 1920)
>[417862.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[417862.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[417862.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[417862.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[417862.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d80a30]
>[417862.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d80a30] width 1920 pitch 7680 (/4 1920)
>[417862.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cd1080]
>[417862.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cd1080] width 1920 pitch 7680 (/4 1920)
>[417865.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edaee0]
>[417865.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edaee0] width 1920 pitch 7680 (/4 1920)
>[417865.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[417865.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[417865.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[417865.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[417865.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470c30]
>[417865.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470c30] width 1920 pitch 7680 (/4 1920)
>[417867.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[417867.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[417867.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24816f0]
>[417867.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24816f0] width 1920 pitch 7680 (/4 1920)
>[417870.464] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[417870.464] (II) RADEON(0): Using hsync ranges from config file
>[417870.464] (II) RADEON(0): Using vrefresh ranges from config file
>[417870.464] (II) RADEON(0): Printing DDC gathered Modelines:
>[417870.464] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[417870.464] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[417870.464] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[417870.464] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[417870.464] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[417870.464] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[417870.464] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[417870.464] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[417870.464] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[417870.464] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[417870.464] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[417870.464] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[417870.509] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[417870.509] (II) RADEON(0): Using hsync ranges from config file
>[417870.509] (II) RADEON(0): Using vrefresh ranges from config file
>[417870.509] (II) RADEON(0): Printing DDC gathered Modelines:
>[417870.509] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[417870.509] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[417870.509] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[417870.509] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[417870.509] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[417870.509] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[417870.509] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[417870.509] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[417870.509] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[417870.509] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[417870.509] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[417870.509] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[417870.557] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[417870.557] (II) RADEON(0): Using hsync ranges from config file
>[417870.557] (II) RADEON(0): Using vrefresh ranges from config file
>[417870.557] (II) RADEON(0): Printing DDC gathered Modelines:
>[417870.557] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[417870.557] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[417870.557] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[417870.557] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[417870.557] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[417870.557] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[417870.557] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[417870.557] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[417870.557] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[417870.557] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[417870.557] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[417870.557] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[417874.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf2e60]
>[417874.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf2e60] width 1920 pitch 7680 (/4 1920)
>[417876.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2485080]
>[417876.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2485080] width 1920 pitch 7680 (/4 1920)
>[417882.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db6860]
>[417882.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db6860] width 1920 pitch 7680 (/4 1920)
>[417939.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db6860]
>[417939.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db6860] width 1920 pitch 7680 (/4 1920)
>[417940.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4890]
>[417940.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4890] width 1920 pitch 7680 (/4 1920)
>[417940.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c45d50]
>[417940.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c45d50] width 1920 pitch 7680 (/4 1920)
>[417940.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcf820]
>[417940.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcf820] width 1920 pitch 7680 (/4 1920)
>[417957.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[417957.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[417972.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[417972.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[417986.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2debc30]
>[417986.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2debc30] width 1920 pitch 7680 (/4 1920)
>[417986.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca2160]
>[417986.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca2160] width 1920 pitch 7680 (/4 1920)
>[417986.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc25b0]
>[417986.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc25b0] width 1920 pitch 7680 (/4 1920)
>[417987.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed0850]
>[417987.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed0850] width 1920 pitch 7680 (/4 1920)
>[418051.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97980]
>[418051.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97980] width 1920 pitch 7680 (/4 1920)
>[418052.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6ae50]
>[418052.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6ae50] width 1920 pitch 7680 (/4 1920)
>[418052.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d12250]
>[418052.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d12250] width 1920 pitch 7680 (/4 1920)
>[418062.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d43e30]
>[418062.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d43e30] width 1920 pitch 7680 (/4 1920)
>[418077.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4025060]
>[418077.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4025060] width 1920 pitch 7680 (/4 1920)
>[418092.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8550]
>[418092.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8550] width 1920 pitch 7680 (/4 1920)
>[418137.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb5a0]
>[418137.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb5a0] width 1920 pitch 7680 (/4 1920)
>[418152.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcf820]
>[418152.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcf820] width 1920 pitch 7680 (/4 1920)
>[418167.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e87530]
>[418167.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e87530] width 1920 pitch 7680 (/4 1920)
>[418227.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca05d0]
>[418227.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca05d0] width 1920 pitch 7680 (/4 1920)
>[418272.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6a60]
>[418272.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6a60] width 1920 pitch 7680 (/4 1920)
>[418482.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7bd00]
>[418482.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7bd00] width 1920 pitch 7680 (/4 1920)
>[418512.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1b80]
>[418512.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1b80] width 1920 pitch 7680 (/4 1920)
>[418932.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[418932.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[418947.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d45460]
>[418947.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d45460] width 1920 pitch 7680 (/4 1920)
>[419037.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6480]
>[419037.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6480] width 1920 pitch 7680 (/4 1920)
>[419052.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6480]
>[419052.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6480] width 1920 pitch 7680 (/4 1920)
>[419097.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6480]
>[419097.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6480] width 1920 pitch 7680 (/4 1920)
>[419112.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6480]
>[419112.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6480] width 1920 pitch 7680 (/4 1920)
>[419292.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[419292.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[419307.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac6a60]
>[419307.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac6a60] width 1920 pitch 7680 (/4 1920)
>[419367.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d43e30]
>[419367.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d43e30] width 1920 pitch 7680 (/4 1920)
>[419382.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d43e30]
>[419382.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d43e30] width 1920 pitch 7680 (/4 1920)
>[419472.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c6d90]
>[419472.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c6d90] width 1920 pitch 7680 (/4 1920)
>[419487.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4025060]
>[419487.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4025060] width 1920 pitch 7680 (/4 1920)
>[419622.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8550]
>[419622.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8550] width 1920 pitch 7680 (/4 1920)
>[419636.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f650]
>[419636.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f650] width 1920 pitch 7680 (/4 1920)
>[419636.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d390]
>[419636.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d390] width 1920 pitch 7680 (/4 1920)
>[419637.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f650]
>[419637.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f650] width 1920 pitch 7680 (/4 1920)
>[419637.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d390]
>[419637.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d390] width 1920 pitch 7680 (/4 1920)
>[419637.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f650]
>[419637.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f650] width 1920 pitch 7680 (/4 1920)
>[419637.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d390]
>[419637.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d390] width 1920 pitch 7680 (/4 1920)
>[419638.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0d390]
>[419638.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0d390] width 1920 pitch 7680 (/4 1920)
>[419638.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb5a0]
>[419638.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb5a0] width 1920 pitch 7680 (/4 1920)
>[419638.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86e20]
>[419638.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86e20] width 1920 pitch 7680 (/4 1920)
>[419667.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c47f90]
>[419667.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c47f90] width 1920 pitch 7680 (/4 1920)
>[419682.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac14b0]
>[419682.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac14b0] width 1920 pitch 7680 (/4 1920)
>[419697.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac14b0]
>[419697.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac14b0] width 1920 pitch 7680 (/4 1920)
>[419712.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d21a0]
>[419712.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d21a0] width 1920 pitch 7680 (/4 1920)
>[419716.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd4890]
>[419716.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd4890] width 1920 pitch 7680 (/4 1920)
>[419716.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ef50]
>[419717.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ef50] width 1920 pitch 7680 (/4 1920)
>[419717.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d91f30]
>[419717.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d91f30] width 1920 pitch 7680 (/4 1920)
>[419717.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6a510]
>[419717.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6a510] width 1920 pitch 7680 (/4 1920)
>[419717.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce9e0]
>[419717.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce9e0] width 1920 pitch 7680 (/4 1920)
>[419717.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e04e20]
>[419717.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e04e20] width 1920 pitch 7680 (/4 1920)
>[419717.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda730]
>[419717.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda730] width 1920 pitch 7680 (/4 1920)
>[419717.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e8ad0]
>[419717.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e8ad0] width 1920 pitch 7680 (/4 1920)
>[419717.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25e00]
>[419717.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25e00] width 1920 pitch 7680 (/4 1920)
>[419717.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d764f0]
>[419717.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d764f0] width 1920 pitch 7680 (/4 1920)
>[419717.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8c990]
>[419717.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8c990] width 1920 pitch 7680 (/4 1920)
>[419718.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5174df0]
>[419718.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5174df0] width 1920 pitch 7680 (/4 1920)
>[419718.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f32d50]
>[419718.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f32d50] width 1920 pitch 7680 (/4 1920)
>[419718.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165470]
>[419718.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165470] width 1920 pitch 7680 (/4 1920)
>[419718.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165470]
>[419718.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165470] width 1920 pitch 7680 (/4 1920)
>[419718.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e5fd0]
>[419718.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e5fd0] width 1920 pitch 7680 (/4 1920)
>[419718.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c7f110]
>[419718.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c7f110] width 1920 pitch 7680 (/4 1920)
>[419718.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d543b0]
>[419718.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d543b0] width 1920 pitch 7680 (/4 1920)
>[419718.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e6f30]
>[419718.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e6f30] width 1920 pitch 7680 (/4 1920)
>[419718.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e6f30]
>[419718.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e6f30] width 1920 pitch 7680 (/4 1920)
>[419718.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54340]
>[419718.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54340] width 1920 pitch 7680 (/4 1920)
>[419718.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54240]
>[419718.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54240] width 1920 pitch 7680 (/4 1920)
>[419718.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54240]
>[419718.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54240] width 1920 pitch 7680 (/4 1920)
>[419718.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165470]
>[419718.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165470] width 1920 pitch 7680 (/4 1920)
>[419718.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165470]
>[419718.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165470] width 1920 pitch 7680 (/4 1920)
>[419718.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f32d50]
>[419718.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f32d50] width 1920 pitch 7680 (/4 1920)
>[419720.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d75fa0]
>[419720.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d75fa0] width 1920 pitch 7680 (/4 1920)
>[419720.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d75fa0]
>[419720.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d75fa0] width 1920 pitch 7680 (/4 1920)
>[419720.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f32d50]
>[419720.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f32d50] width 1920 pitch 7680 (/4 1920)
>[419720.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f32d50]
>[419720.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f32d50] width 1920 pitch 7680 (/4 1920)
>[419727.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e6060]
>[419727.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e6060] width 1920 pitch 7680 (/4 1920)
>[419729.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x311ada0]
>[419729.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x311ada0] width 1920 pitch 7680 (/4 1920)
>[419730.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x311ada0]
>[419730.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x311ada0] width 1920 pitch 7680 (/4 1920)
>[419730.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcada0]
>[419731.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcada0] width 1920 pitch 7680 (/4 1920)
>[419732.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97980]
>[419732.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97980] width 1920 pitch 7680 (/4 1920)
>[419732.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3feabc0]
>[419732.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3feabc0] width 1920 pitch 7680 (/4 1920)
>[419732.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97980]
>[419732.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97980] width 1920 pitch 7680 (/4 1920)
>[419732.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dbca0]
>[419732.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dbca0] width 1920 pitch 7680 (/4 1920)
>[419737.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a6300]
>[419737.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a6300] width 1920 pitch 7680 (/4 1920)
>[419757.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97980]
>[419757.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97980] width 1920 pitch 7680 (/4 1920)
>[419766.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97980]
>[419766.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97980] width 1920 pitch 7680 (/4 1920)
>[419787.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d823b0]
>[419787.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d823b0] width 1920 pitch 7680 (/4 1920)
>[419847.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a10380]
>[419847.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a10380] width 1920 pitch 7680 (/4 1920)
>[419862.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e38220]
>[419862.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e38220] width 1920 pitch 7680 (/4 1920)
>[419877.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[419877.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[419892.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[419892.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[419907.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46940]
>[419907.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46940] width 1920 pitch 7680 (/4 1920)
>[419912.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[419912.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[419912.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30de740]
>[419912.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30de740] width 1920 pitch 7680 (/4 1920)
>[419913.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[419913.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[419913.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30de740]
>[419913.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30de740] width 1920 pitch 7680 (/4 1920)
>[419913.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[419913.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[419913.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[419913.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[419913.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[419913.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[419913.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e9d0]
>[419913.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e9d0] width 1920 pitch 7680 (/4 1920)
>[419913.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94580]
>[419913.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94580] width 1920 pitch 7680 (/4 1920)
>[419914.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e9d0]
>[419914.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e9d0] width 1920 pitch 7680 (/4 1920)
>[419914.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94580]
>[419914.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94580] width 1920 pitch 7680 (/4 1920)
>[419914.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d92fc0]
>[419914.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d92fc0] width 1920 pitch 7680 (/4 1920)
>[419914.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94580]
>[419914.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94580] width 1920 pitch 7680 (/4 1920)
>[419914.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d92fc0]
>[419914.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d92fc0] width 1920 pitch 7680 (/4 1920)
>[419914.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94580]
>[419914.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94580] width 1920 pitch 7680 (/4 1920)
>[419914.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d92fc0]
>[419914.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d92fc0] width 1920 pitch 7680 (/4 1920)
>[419914.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94580]
>[419914.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94580] width 1920 pitch 7680 (/4 1920)
>[419922.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d92fc0]
>[419922.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d92fc0] width 1920 pitch 7680 (/4 1920)
>[419952.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5a70]
>[419952.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5a70] width 1920 pitch 7680 (/4 1920)
>[419997.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b1d0]
>[419997.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b1d0] width 1920 pitch 7680 (/4 1920)
>[420012.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420012.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420027.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b1d0]
>[420027.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b1d0] width 1920 pitch 7680 (/4 1920)
>[420042.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5a70]
>[420042.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5a70] width 1920 pitch 7680 (/4 1920)
>[420312.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db6860]
>[420312.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db6860] width 1920 pitch 7680 (/4 1920)
>[420327.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db6860]
>[420327.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db6860] width 1920 pitch 7680 (/4 1920)
>[420342.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c794d0]
>[420342.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c794d0] width 1920 pitch 7680 (/4 1920)
>[420357.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca05d0]
>[420357.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca05d0] width 1920 pitch 7680 (/4 1920)
>[420387.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d35700]
>[420387.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d35700] width 1920 pitch 7680 (/4 1920)
>[420402.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9f420]
>[420402.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9f420] width 1920 pitch 7680 (/4 1920)
>[420432.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d92fc0]
>[420432.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d92fc0] width 1920 pitch 7680 (/4 1920)
>[420447.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420447.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420462.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e9d0]
>[420462.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e9d0] width 1920 pitch 7680 (/4 1920)
>[420477.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac5a70]
>[420477.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac5a70] width 1920 pitch 7680 (/4 1920)
>[420579.542] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[420579.542] (II) RADEON(0): Using hsync ranges from config file
>[420579.542] (II) RADEON(0): Using vrefresh ranges from config file
>[420579.542] (II) RADEON(0): Printing DDC gathered Modelines:
>[420579.542] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[420579.542] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[420579.542] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[420579.542] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[420579.542] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[420579.542] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[420579.542] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[420579.542] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[420579.542] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[420579.542] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[420579.542] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[420579.542] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[420580.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2b1d0]
>[420580.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2b1d0] width 1920 pitch 7680 (/4 1920)
>[420582.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420582.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420597.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420597.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420597.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420597.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420597.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420597.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420597.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420597.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420597.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420597.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420597.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420597.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420597.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420597.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420597.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420597.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420597.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420597.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420597.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420597.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420597.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420597.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420597.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420597.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420598.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420598.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420598.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420598.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420598.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420598.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420598.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420599.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420599.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420599.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53627f0]
>[420599.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53627f0] width 1920 pitch 7680 (/4 1920)
>[420599.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420599.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420599.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420599.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420599.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a10380]
>[420599.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a10380] width 1920 pitch 7680 (/4 1920)
>[420600.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[420600.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[420600.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420601.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420601.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[420601.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[420601.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420601.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420601.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[420601.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[420601.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420601.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420601.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[420601.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[420601.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a10380]
>[420601.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a10380] width 1920 pitch 7680 (/4 1920)
>[420601.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[420601.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[420601.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a10380]
>[420601.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a10380] width 1920 pitch 7680 (/4 1920)
>[420601.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[420601.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[420601.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420601.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420601.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420601.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420601.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b680]
>[420601.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b680] width 1920 pitch 7680 (/4 1920)
>[420601.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420601.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420601.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420601.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420601.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420601.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420601.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420601.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420601.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420601.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420601.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420601.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420601.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420601.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420601.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420601.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420601.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420601.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420601.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420601.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420619.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420619.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420693.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420693.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420693.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77640]
>[420694.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77640] width 1920 pitch 7680 (/4 1920)
>[420694.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420694.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420694.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420694.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420694.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7b540]
>[420694.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7b540] width 1920 pitch 7680 (/4 1920)
>[420694.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420694.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420694.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7b540]
>[420694.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7b540] width 1920 pitch 7680 (/4 1920)
>[420694.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420694.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420694.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95670]
>[420694.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95670] width 1920 pitch 7680 (/4 1920)
>[420694.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cefb70]
>[420694.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cefb70] width 1920 pitch 7680 (/4 1920)
>[420694.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e95670]
>[420694.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e95670] width 1920 pitch 7680 (/4 1920)
>[420694.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420694.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420694.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3af40]
>[420694.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3af40] width 1920 pitch 7680 (/4 1920)
>[420694.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420694.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420694.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3af40]
>[420694.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3af40] width 1920 pitch 7680 (/4 1920)
>[420695.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d89a50]
>[420695.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d89a50] width 1920 pitch 7680 (/4 1920)
>[420695.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0a70]
>[420695.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0a70] width 1920 pitch 7680 (/4 1920)
>[420695.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301c1b0]
>[420695.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301c1b0] width 1920 pitch 7680 (/4 1920)
>[420695.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12ff0]
>[420695.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12ff0] width 1920 pitch 7680 (/4 1920)
>[420695.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e953a0]
>[420695.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e953a0] width 1920 pitch 7680 (/4 1920)
>[420695.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420695.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420695.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e953a0]
>[420695.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e953a0] width 1920 pitch 7680 (/4 1920)
>[420695.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420696.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420696.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e953a0]
>[420696.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e953a0] width 1920 pitch 7680 (/4 1920)
>[420696.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420696.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420696.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e953a0]
>[420696.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e953a0] width 1920 pitch 7680 (/4 1920)
>[420696.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420696.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420696.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e953a0]
>[420696.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e953a0] width 1920 pitch 7680 (/4 1920)
>[420696.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420696.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420696.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e953a0]
>[420696.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e953a0] width 1920 pitch 7680 (/4 1920)
>[420700.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77480]
>[420700.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77480] width 1920 pitch 7680 (/4 1920)
>[420700.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420700.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420700.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420700.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420700.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420700.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420700.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420700.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420703.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb71b0]
>[420703.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb71b0] width 1920 pitch 7680 (/4 1920)
>[420703.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420703.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420703.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420703.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420703.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420703.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420703.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420703.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420703.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420703.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420703.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420703.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420703.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420703.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420703.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420703.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420703.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420703.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420703.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420703.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420703.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420703.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420703.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420703.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420704.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420704.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420704.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420704.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420704.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420704.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420704.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420704.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420704.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420704.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420704.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420704.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420704.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30febb0]
>[420704.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30febb0] width 1920 pitch 7680 (/4 1920)
>[420704.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30febb0]
>[420704.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30febb0] width 1920 pitch 7680 (/4 1920)
>[420704.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420704.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420704.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30febb0]
>[420704.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30febb0] width 1920 pitch 7680 (/4 1920)
>[420704.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420704.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420705.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420705.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420705.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420705.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420732.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ceb0f0]
>[420732.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ceb0f0] width 1920 pitch 7680 (/4 1920)
>[420739.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420739.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420739.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420739.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420739.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420739.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420739.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420739.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420739.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420739.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420739.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420739.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420739.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420739.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420739.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420740.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420740.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420740.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420740.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[420740.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[420740.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cee660]
>[420740.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cee660] width 1920 pitch 7680 (/4 1920)
>[420740.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[420740.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[420740.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a10a80]
>[420740.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a10a80] width 1920 pitch 7680 (/4 1920)
>[420740.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[420740.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[420741.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a10a80]
>[420741.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a10a80] width 1920 pitch 7680 (/4 1920)
>[420741.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[420741.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[420741.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420741.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420741.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420741.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420741.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53627f0]
>[420741.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53627f0] width 1920 pitch 7680 (/4 1920)
>[420741.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420741.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420741.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53627f0]
>[420741.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53627f0] width 1920 pitch 7680 (/4 1920)
>[420741.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420741.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420741.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30febb0]
>[420741.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30febb0] width 1920 pitch 7680 (/4 1920)
>[420747.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420747.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420777.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[420777.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[420782.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420782.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420782.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420782.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420782.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420782.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420782.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420782.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420782.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420782.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420782.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420782.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420782.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420782.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420782.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420782.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420782.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420782.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420782.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420782.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420782.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420782.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420783.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420783.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420783.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420783.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420783.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420783.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420783.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420783.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420783.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420783.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420783.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[420783.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[420783.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[420783.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[420783.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[420783.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[420783.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[420783.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[420783.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[420783.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[420783.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[420783.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[420783.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25512f0]
>[420783.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25512f0] width 1920 pitch 7680 (/4 1920)
>[420783.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420783.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420783.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420784.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420784.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420784.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420792.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30febb0]
>[420792.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30febb0] width 1920 pitch 7680 (/4 1920)
>[420797.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[420797.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[420797.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420797.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420797.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fe840]
>[420797.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fe840] width 1920 pitch 7680 (/4 1920)
>[420797.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420797.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420797.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30febb0]
>[420797.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30febb0] width 1920 pitch 7680 (/4 1920)
>[420797.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420797.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420797.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420797.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420797.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420797.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420797.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[420797.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[420797.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420797.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420797.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f221d0]
>[420797.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f221d0] width 1920 pitch 7680 (/4 1920)
>[420797.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420797.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420797.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f221d0]
>[420797.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f221d0] width 1920 pitch 7680 (/4 1920)
>[420797.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1940]
>[420797.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1940] width 1920 pitch 7680 (/4 1920)
>[420797.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f221d0]
>[420797.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f221d0] width 1920 pitch 7680 (/4 1920)
>[420797.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1940]
>[420797.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1940] width 1920 pitch 7680 (/4 1920)
>[420797.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420798.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420798.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[420798.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[420798.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[420798.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[420798.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1af0]
>[420798.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1af0] width 1920 pitch 7680 (/4 1920)
>[420798.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[420798.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[420798.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[420798.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[420798.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[420798.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[420798.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420798.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420798.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b680]
>[420798.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b680] width 1920 pitch 7680 (/4 1920)
>[420798.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcc9b0]
>[420798.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcc9b0] width 1920 pitch 7680 (/4 1920)
>[420798.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b680]
>[420798.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b680] width 1920 pitch 7680 (/4 1920)
>[420798.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[420798.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[420798.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3b680]
>[420798.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3b680] width 1920 pitch 7680 (/4 1920)
>[420798.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[420798.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[420798.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25512f0]
>[420798.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25512f0] width 1920 pitch 7680 (/4 1920)
>[420798.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f221d0]
>[420798.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f221d0] width 1920 pitch 7680 (/4 1920)
>[420799.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420799.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420799.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[420799.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[420799.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[420799.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[420799.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420799.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420799.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[420799.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[420799.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[420799.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[420799.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e42d30]
>[420799.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e42d30] width 1920 pitch 7680 (/4 1920)
>[420799.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[420799.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[420799.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420799.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420799.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420799.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420799.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1940]
>[420799.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1940] width 1920 pitch 7680 (/4 1920)
>[420799.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[420799.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[420799.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1940]
>[420799.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1940] width 1920 pitch 7680 (/4 1920)
>[420799.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420799.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420799.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[420799.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[420799.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420799.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420799.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[420799.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[420799.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420799.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420799.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420799.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420799.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420799.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420799.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420799.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420799.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420799.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420799.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420799.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420799.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420799.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420799.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[420799.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[420799.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[420800.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[420801.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[420801.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[420807.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed4a0]
>[420807.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed4a0] width 1920 pitch 7680 (/4 1920)
>[420818.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d540f0]
>[420818.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d540f0] width 1920 pitch 7680 (/4 1920)
>[420837.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed4a0]
>[420837.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed4a0] width 1920 pitch 7680 (/4 1920)
>[420897.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[420897.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[420927.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52dc0]
>[420927.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52dc0] width 1920 pitch 7680 (/4 1920)
>[420957.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[420957.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[420987.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30de740]
>[420987.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30de740] width 1920 pitch 7680 (/4 1920)
>[421016.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421016.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421016.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421016.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421017.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421017.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421017.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421017.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421017.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421017.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421017.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421017.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421017.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421017.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421017.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421017.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421017.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421017.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421017.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421017.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421017.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421017.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421017.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421017.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421018.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421018.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421018.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421018.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421018.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421018.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421018.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421018.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421018.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421018.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421018.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421018.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421019.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31158a0]
>[421019.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31158a0] width 1920 pitch 7680 (/4 1920)
>[421019.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421019.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421020.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421020.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421020.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421020.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421020.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421020.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421020.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421020.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421020.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421020.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421020.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421020.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421020.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421020.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421020.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421020.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421020.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[421020.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[421062.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b080]
>[421062.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b080] width 1920 pitch 7680 (/4 1920)
>[421077.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421077.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421167.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421167.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421182.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487da0]
>[421182.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487da0] width 1920 pitch 7680 (/4 1920)
>[421250.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[421250.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[421251.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf69e0]
>[421251.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf69e0] width 1920 pitch 7680 (/4 1920)
>[421251.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[421251.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[421251.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941450]
>[421251.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941450] width 1920 pitch 7680 (/4 1920)
>[421254.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487570]
>[421254.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487570] width 1920 pitch 7680 (/4 1920)
>[421266.959] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[421266.959] (II) RADEON(0): Using hsync ranges from config file
>[421266.959] (II) RADEON(0): Using vrefresh ranges from config file
>[421266.959] (II) RADEON(0): Printing DDC gathered Modelines:
>[421266.959] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[421266.959] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[421266.959] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[421266.959] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[421266.959] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[421266.959] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[421266.959] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[421266.959] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[421266.959] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[421266.959] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[421266.959] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[421266.959] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[421267.001] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[421267.001] (II) RADEON(0): Using hsync ranges from config file
>[421267.001] (II) RADEON(0): Using vrefresh ranges from config file
>[421267.001] (II) RADEON(0): Printing DDC gathered Modelines:
>[421267.001] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[421267.001] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[421267.001] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[421267.001] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[421267.001] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[421267.001] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[421267.001] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[421267.001] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[421267.001] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[421267.001] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[421267.001] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[421267.001] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[421267.049] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[421267.049] (II) RADEON(0): Using hsync ranges from config file
>[421267.049] (II) RADEON(0): Using vrefresh ranges from config file
>[421267.049] (II) RADEON(0): Printing DDC gathered Modelines:
>[421267.049] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[421267.049] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[421267.049] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[421267.049] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[421267.049] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[421267.049] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[421267.049] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[421267.049] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[421267.049] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[421267.049] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[421267.049] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[421267.049] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[421272.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518550]
>[421272.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518550] width 1920 pitch 7680 (/4 1920)
>[421274.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6900]
>[421274.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6900] width 1920 pitch 7680 (/4 1920)
>[421287.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb6900]
>[421287.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb6900] width 1920 pitch 7680 (/4 1920)
>[421302.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518570]
>[421302.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518570] width 1920 pitch 7680 (/4 1920)
>[421333.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c89540]
>[421333.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c89540] width 1920 pitch 7680 (/4 1920)
>[421348.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df2a10]
>[421348.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df2a10] width 1920 pitch 7680 (/4 1920)
>[421363.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df2a10]
>[421363.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df2a10] width 1920 pitch 7680 (/4 1920)
>[421378.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c89540]
>[421378.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c89540] width 1920 pitch 7680 (/4 1920)
>[421408.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c89540]
>[421408.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c89540] width 1920 pitch 7680 (/4 1920)
>[421423.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2518560]
>[421423.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2518560] width 1920 pitch 7680 (/4 1920)
>[421498.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c89540]
>[421498.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c89540] width 1920 pitch 7680 (/4 1920)
>[421513.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c89540]
>[421513.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c89540] width 1920 pitch 7680 (/4 1920)
>[421678.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df2a10]
>[421678.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df2a10] width 1920 pitch 7680 (/4 1920)
>[421693.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394dbc0]
>[421693.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394dbc0] width 1920 pitch 7680 (/4 1920)
>[421768.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df2a50]
>[421768.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df2a50] width 1920 pitch 7680 (/4 1920)
>[421779.677] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[421779.677] (II) RADEON(0): Using hsync ranges from config file
>[421779.677] (II) RADEON(0): Using vrefresh ranges from config file
>[421779.677] (II) RADEON(0): Printing DDC gathered Modelines:
>[421779.677] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[421779.677] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[421779.677] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[421779.677] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[421779.677] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[421779.677] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[421779.677] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[421779.677] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[421779.677] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[421779.677] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[421779.677] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[421779.677] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[421779.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3941450]
>[421779.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3941450] width 1920 pitch 7680 (/4 1920)
>[421783.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52dc0]
>[421783.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52dc0] width 1920 pitch 7680 (/4 1920)
>[421783.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421783.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421783.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52dc0]
>[421783.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52dc0] width 1920 pitch 7680 (/4 1920)
>[421783.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421783.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421783.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52dc0]
>[421783.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52dc0] width 1920 pitch 7680 (/4 1920)
>[421783.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421783.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421783.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52dc0]
>[421783.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52dc0] width 1920 pitch 7680 (/4 1920)
>[421783.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421783.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421783.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421783.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421783.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421783.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421783.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421784.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421784.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421784.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421784.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e706f0]
>[421784.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e706f0] width 1920 pitch 7680 (/4 1920)
>[421784.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421784.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421784.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421784.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421784.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43fb0]
>[421784.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43fb0] width 1920 pitch 7680 (/4 1920)
>[421784.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421784.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421784.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43fb0]
>[421784.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43fb0] width 1920 pitch 7680 (/4 1920)
>[421784.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421784.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421784.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43fb0]
>[421784.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43fb0] width 1920 pitch 7680 (/4 1920)
>[421784.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421784.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421784.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43fb0]
>[421784.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43fb0] width 1920 pitch 7680 (/4 1920)
>[421790.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d4fd90]
>[421790.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d4fd90] width 1920 pitch 7680 (/4 1920)
>[421791.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31ce0]
>[421791.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31ce0] width 1920 pitch 7680 (/4 1920)
>[421791.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a631e0]
>[421791.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a631e0] width 1920 pitch 7680 (/4 1920)
>[421798.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a629d0]
>[421798.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a629d0] width 1920 pitch 7680 (/4 1920)
>[421803.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dec9e0]
>[421803.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dec9e0] width 1920 pitch 7680 (/4 1920)
>[421803.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7f20]
>[421803.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7f20] width 1920 pitch 7680 (/4 1920)
>[421803.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dec9e0]
>[421803.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dec9e0] width 1920 pitch 7680 (/4 1920)
>[421803.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7f20]
>[421803.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7f20] width 1920 pitch 7680 (/4 1920)
>[421803.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dec9e0]
>[421803.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dec9e0] width 1920 pitch 7680 (/4 1920)
>[421803.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7f20]
>[421803.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7f20] width 1920 pitch 7680 (/4 1920)
>[421803.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dec9e0]
>[421803.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dec9e0] width 1920 pitch 7680 (/4 1920)
>[421803.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7f20]
>[421803.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7f20] width 1920 pitch 7680 (/4 1920)
>[421803.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc3dd0]
>[421803.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc3dd0] width 1920 pitch 7680 (/4 1920)
>[421803.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7f20]
>[421803.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7f20] width 1920 pitch 7680 (/4 1920)
>[421803.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421803.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421803.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421803.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421803.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e40]
>[421803.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e40] width 1920 pitch 7680 (/4 1920)
>[421803.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421803.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421803.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e40]
>[421803.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e40] width 1920 pitch 7680 (/4 1920)
>[421803.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421803.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421803.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d69e40]
>[421803.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d69e40] width 1920 pitch 7680 (/4 1920)
>[421805.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b78b00]
>[421805.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b78b00] width 1920 pitch 7680 (/4 1920)
>[421805.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d380]
>[421805.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d380] width 1920 pitch 7680 (/4 1920)
>[421805.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b020]
>[421805.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b020] width 1920 pitch 7680 (/4 1920)
>[421805.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9bd20]
>[421805.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9bd20] width 1920 pitch 7680 (/4 1920)
>[421805.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ece020]
>[421805.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ece020] width 1920 pitch 7680 (/4 1920)
>[421805.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421805.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421805.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390d380]
>[421805.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390d380] width 1920 pitch 7680 (/4 1920)
>[421805.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5b020]
>[421805.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5b020] width 1920 pitch 7680 (/4 1920)
>[421805.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b78b00]
>[421805.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b78b00] width 1920 pitch 7680 (/4 1920)
>[421805.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef9410]
>[421805.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef9410] width 1920 pitch 7680 (/4 1920)
>[421805.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421805.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421805.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef9410]
>[421805.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef9410] width 1920 pitch 7680 (/4 1920)
>[421805.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421805.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421805.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef9410]
>[421805.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef9410] width 1920 pitch 7680 (/4 1920)
>[421805.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421805.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421805.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef9410]
>[421805.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef9410] width 1920 pitch 7680 (/4 1920)
>[421805.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a75d0]
>[421805.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a75d0] width 1920 pitch 7680 (/4 1920)
>[421813.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f3b0]
>[421813.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f3b0] width 1920 pitch 7680 (/4 1920)
>[421840.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e7d80]
>[421840.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e7d80] width 1920 pitch 7680 (/4 1920)
>[421840.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76200]
>[421840.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76200] width 1920 pitch 7680 (/4 1920)
>[421840.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421840.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421840.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76200]
>[421840.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76200] width 1920 pitch 7680 (/4 1920)
>[421840.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afbfe0]
>[421840.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afbfe0] width 1920 pitch 7680 (/4 1920)
>[421840.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421840.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421840.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76200]
>[421840.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76200] width 1920 pitch 7680 (/4 1920)
>[421840.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421840.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421840.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76200]
>[421840.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76200] width 1920 pitch 7680 (/4 1920)
>[421840.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421840.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421840.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76200]
>[421840.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76200] width 1920 pitch 7680 (/4 1920)
>[421840.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421840.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421840.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7dfe0]
>[421841.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7dfe0] width 1920 pitch 7680 (/4 1920)
>[421841.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421841.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421841.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7dfe0]
>[421841.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7dfe0] width 1920 pitch 7680 (/4 1920)
>[421841.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76200]
>[421841.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76200] width 1920 pitch 7680 (/4 1920)
>[421841.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421841.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421842.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421842.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421842.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[421842.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[421842.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[421842.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[421842.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421842.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421842.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[421842.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[421842.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[421842.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[421842.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[421842.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[421842.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[421842.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[421842.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[421842.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[421842.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[421842.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[421842.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[421842.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[421842.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[421842.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[421842.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[421842.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[421842.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421842.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421842.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[421842.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[421842.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[421842.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[421877.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5c60]
>[421877.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5c60] width 1920 pitch 7680 (/4 1920)
>[421877.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b0d0]
>[421877.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b0d0] width 1920 pitch 7680 (/4 1920)
>[421877.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5c60]
>[421878.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5c60] width 1920 pitch 7680 (/4 1920)
>[421878.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b0d0]
>[421878.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b0d0] width 1920 pitch 7680 (/4 1920)
>[421878.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5c60]
>[421878.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5c60] width 1920 pitch 7680 (/4 1920)
>[421878.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b1b0]
>[421878.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b1b0] width 1920 pitch 7680 (/4 1920)
>[421878.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b1b0]
>[421878.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b1b0] width 1920 pitch 7680 (/4 1920)
>[421878.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b1b0]
>[421878.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b1b0] width 1920 pitch 7680 (/4 1920)
>[421878.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b2c0]
>[421878.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b2c0] width 1920 pitch 7680 (/4 1920)
>[421878.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a62640]
>[421878.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a62640] width 1920 pitch 7680 (/4 1920)
>[421878.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b3b0]
>[421879.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b3b0] width 1920 pitch 7680 (/4 1920)
>[421879.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26590]
>[421879.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26590] width 1920 pitch 7680 (/4 1920)
>[421879.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26590]
>[421879.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26590] width 1920 pitch 7680 (/4 1920)
>[421880.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d07540]
>[421880.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d07540] width 1920 pitch 7680 (/4 1920)
>[421880.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b380]
>[421880.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b380] width 1920 pitch 7680 (/4 1920)
>[421880.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d07540]
>[421880.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d07540] width 1920 pitch 7680 (/4 1920)
>[421880.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b380]
>[421880.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b380] width 1920 pitch 7680 (/4 1920)
>[421880.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d07540]
>[421880.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d07540] width 1920 pitch 7680 (/4 1920)
>[421880.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421880.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421880.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6ec10]
>[421880.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6ec10] width 1920 pitch 7680 (/4 1920)
>[421880.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26b00]
>[421880.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26b00] width 1920 pitch 7680 (/4 1920)
>[421881.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b590]
>[421881.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b590] width 1920 pitch 7680 (/4 1920)
>[421881.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d269e0]
>[421881.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d269e0] width 1920 pitch 7680 (/4 1920)
>[421881.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a70]
>[421881.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a70] width 1920 pitch 7680 (/4 1920)
>[421881.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d269e0]
>[421881.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d269e0] width 1920 pitch 7680 (/4 1920)
>[421881.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a40]
>[421881.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a40] width 1920 pitch 7680 (/4 1920)
>[421881.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d269e0]
>[421881.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d269e0] width 1920 pitch 7680 (/4 1920)
>[421881.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a40]
>[421881.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a40] width 1920 pitch 7680 (/4 1920)
>[421881.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d269e0]
>[421881.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d269e0] width 1920 pitch 7680 (/4 1920)
>[421881.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b590]
>[421881.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b590] width 1920 pitch 7680 (/4 1920)
>[421881.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6ecc0]
>[421881.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6ecc0] width 1920 pitch 7680 (/4 1920)
>[421881.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5ab0]
>[421881.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5ab0] width 1920 pitch 7680 (/4 1920)
>[421881.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d5ab0]
>[421881.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d5ab0] width 1920 pitch 7680 (/4 1920)
>[421881.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c971a0]
>[421881.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c971a0] width 1920 pitch 7680 (/4 1920)
>[421881.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26730]
>[421881.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26730] width 1920 pitch 7680 (/4 1920)
>[421881.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421881.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421881.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a40]
>[421881.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a40] width 1920 pitch 7680 (/4 1920)
>[421881.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26a40]
>[421881.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26a40] width 1920 pitch 7680 (/4 1920)
>[421881.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268c0]
>[421881.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268c0] width 1920 pitch 7680 (/4 1920)
>[421881.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82720]
>[421881.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82720] width 1920 pitch 7680 (/4 1920)
>[421881.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6ec40]
>[421881.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6ec40] width 1920 pitch 7680 (/4 1920)
>[421881.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6ebc0]
>[421881.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6ebc0] width 1920 pitch 7680 (/4 1920)
>[421881.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26730]
>[421881.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26730] width 1920 pitch 7680 (/4 1920)
>[421881.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421881.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421881.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26730]
>[421882.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26730] width 1920 pitch 7680 (/4 1920)
>[421882.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26730]
>[421882.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26730] width 1920 pitch 7680 (/4 1920)
>[421882.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26730]
>[421882.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26730] width 1920 pitch 7680 (/4 1920)
>[421882.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb900]
>[421882.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb900] width 1920 pitch 7680 (/4 1920)
>[421882.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb900]
>[421882.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb900] width 1920 pitch 7680 (/4 1920)
>[421882.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb900]
>[421882.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb900] width 1920 pitch 7680 (/4 1920)
>[421882.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268b0]
>[421882.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268b0] width 1920 pitch 7680 (/4 1920)
>[421882.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268b0]
>[421882.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268b0] width 1920 pitch 7680 (/4 1920)
>[421882.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421882.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421882.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421882.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421882.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421882.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421882.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421882.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421882.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6eb70]
>[421882.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6eb70] width 1920 pitch 7680 (/4 1920)
>[421882.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d266d0]
>[421882.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d266d0] width 1920 pitch 7680 (/4 1920)
>[421882.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b590]
>[421882.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b590] width 1920 pitch 7680 (/4 1920)
>[421882.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421882.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421882.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421882.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421882.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421882.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421882.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421882.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421882.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421882.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421882.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421882.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421882.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b590]
>[421882.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b590] width 1920 pitch 7680 (/4 1920)
>[421882.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421882.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421882.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421882.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421882.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421882.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421882.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421882.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421882.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421882.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421882.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421882.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421883.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421883.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421883.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421883.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421883.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421883.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421883.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421883.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421883.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421883.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421883.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421883.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421883.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d26880]
>[421883.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d26880] width 1920 pitch 7680 (/4 1920)
>[421883.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d268e0]
>[421883.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d268e0] width 1920 pitch 7680 (/4 1920)
>[421884.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a440]
>[421884.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a440] width 1920 pitch 7680 (/4 1920)
>[421885.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a440]
>[421885.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a440] width 1920 pitch 7680 (/4 1920)
>[421885.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a440]
>[421885.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a440] width 1920 pitch 7680 (/4 1920)
>[421885.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d02750]
>[421885.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d02750] width 1920 pitch 7680 (/4 1920)
>[421885.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d02750]
>[421885.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d02750] width 1920 pitch 7680 (/4 1920)
>[421885.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d02750]
>[421885.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d02750] width 1920 pitch 7680 (/4 1920)
>[421885.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a440]
>[421885.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a440] width 1920 pitch 7680 (/4 1920)
>[421885.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421885.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33d50]
>[421885.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33d50] width 1920 pitch 7680 (/4 1920)
>[421885.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421885.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421937.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[421937.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[421938.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421938.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421938.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[421938.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[421938.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31621a0]
>[421938.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31621a0] width 1920 pitch 7680 (/4 1920)
>[421964.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e819d0]
>[421964.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e819d0] width 1920 pitch 7680 (/4 1920)
>[421964.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afc960]
>[421964.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afc960] width 1920 pitch 7680 (/4 1920)
>[421964.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e819d0]
>[421964.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e819d0] width 1920 pitch 7680 (/4 1920)
>[421964.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[421964.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[421964.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e819d0]
>[421964.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e819d0] width 1920 pitch 7680 (/4 1920)
>[421964.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[421964.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[421964.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d540]
>[421964.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d540] width 1920 pitch 7680 (/4 1920)
>[421964.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[421964.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[421964.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d540]
>[421964.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d540] width 1920 pitch 7680 (/4 1920)
>[421964.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d5a0]
>[421964.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d5a0] width 1920 pitch 7680 (/4 1920)
>[421964.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d540]
>[421964.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d540] width 1920 pitch 7680 (/4 1920)
>[421964.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d5a0]
>[421964.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d5a0] width 1920 pitch 7680 (/4 1920)
>[421964.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d540]
>[421964.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d540] width 1920 pitch 7680 (/4 1920)
>[421964.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d5a0]
>[421964.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d5a0] width 1920 pitch 7680 (/4 1920)
>[421964.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d540]
>[421964.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d540] width 1920 pitch 7680 (/4 1920)
>[421965.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afc8a0]
>[421965.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afc8a0] width 1920 pitch 7680 (/4 1920)
>[421965.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8e130]
>[421965.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8e130] width 1920 pitch 7680 (/4 1920)
>[421965.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0980]
>[421965.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0980] width 1920 pitch 7680 (/4 1920)
>[421965.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f462c0]
>[421965.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f462c0] width 1920 pitch 7680 (/4 1920)
>[421965.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d060]
>[421965.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d060] width 1920 pitch 7680 (/4 1920)
>[421965.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1db60]
>[421965.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1db60] width 1920 pitch 7680 (/4 1920)
>[421965.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f462c0]
>[421965.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f462c0] width 1920 pitch 7680 (/4 1920)
>[421965.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611d9f0]
>[421965.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611d9f0] width 1920 pitch 7680 (/4 1920)
>[421965.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f462c0]
>[421965.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f462c0] width 1920 pitch 7680 (/4 1920)
>[421965.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0980]
>[421965.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0980] width 1920 pitch 7680 (/4 1920)
>[421965.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db69f0]
>[421965.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db69f0] width 1920 pitch 7680 (/4 1920)
>[421965.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f462c0]
>[421965.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f462c0] width 1920 pitch 7680 (/4 1920)
>[421967.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0a00]
>[421967.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0a00] width 1920 pitch 7680 (/4 1920)
>[421967.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4874310]
>[421967.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4874310] width 1920 pitch 7680 (/4 1920)
>[421967.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4874510]
>[421967.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4874510] width 1920 pitch 7680 (/4 1920)
>[421978.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4874bd0]
>[421978.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4874bd0] width 1920 pitch 7680 (/4 1920)
>[421987.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f8980]
>[421987.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f8980] width 1920 pitch 7680 (/4 1920)
>[421993.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf1060]
>[421993.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf1060] width 1920 pitch 7680 (/4 1920)
>[422008.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fd00]
>[422008.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fd00] width 1920 pitch 7680 (/4 1920)
>[422018.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fd00]
>[422018.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fd00] width 1920 pitch 7680 (/4 1920)
>[422018.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92540]
>[422018.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92540] width 1920 pitch 7680 (/4 1920)
>[422018.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fd00]
>[422018.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fd00] width 1920 pitch 7680 (/4 1920)
>[422018.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92540]
>[422018.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92540] width 1920 pitch 7680 (/4 1920)
>[422018.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fd00]
>[422018.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fd00] width 1920 pitch 7680 (/4 1920)
>[422018.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92540]
>[422018.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92540] width 1920 pitch 7680 (/4 1920)
>[422018.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2fd00]
>[422018.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2fd00] width 1920 pitch 7680 (/4 1920)
>[422018.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92540]
>[422018.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92540] width 1920 pitch 7680 (/4 1920)
>[422018.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550860]
>[422018.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550860] width 1920 pitch 7680 (/4 1920)
>[422018.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc7ed0]
>[422018.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc7ed0] width 1920 pitch 7680 (/4 1920)
>[422018.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550860]
>[422018.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550860] width 1920 pitch 7680 (/4 1920)
>[422018.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc7ed0]
>[422018.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc7ed0] width 1920 pitch 7680 (/4 1920)
>[422018.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550860]
>[422018.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550860] width 1920 pitch 7680 (/4 1920)
>[422018.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc7ed0]
>[422018.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc7ed0] width 1920 pitch 7680 (/4 1920)
>[422018.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550860]
>[422018.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550860] width 1920 pitch 7680 (/4 1920)
>[422018.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc7ed0]
>[422018.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc7ed0] width 1920 pitch 7680 (/4 1920)
>[422018.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2550860]
>[422019.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2550860] width 1920 pitch 7680 (/4 1920)
>[422020.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0a00]
>[422020.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0a00] width 1920 pitch 7680 (/4 1920)
>[422020.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422020.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422020.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0a00]
>[422020.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0a00] width 1920 pitch 7680 (/4 1920)
>[422020.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422020.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422020.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0a00]
>[422020.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0a00] width 1920 pitch 7680 (/4 1920)
>[422020.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422020.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422020.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0a00]
>[422020.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0a00] width 1920 pitch 7680 (/4 1920)
>[422020.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422020.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422020.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0a00]
>[422020.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0a00] width 1920 pitch 7680 (/4 1920)
>[422020.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422020.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422020.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3060]
>[422021.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3060] width 1920 pitch 7680 (/4 1920)
>[422021.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422021.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422021.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3060]
>[422021.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3060] width 1920 pitch 7680 (/4 1920)
>[422021.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ae9f0]
>[422021.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ae9f0] width 1920 pitch 7680 (/4 1920)
>[422022.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30727b0]
>[422022.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30727b0] width 1920 pitch 7680 (/4 1920)
>[422022.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b29b60]
>[422022.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b29b60] width 1920 pitch 7680 (/4 1920)
>[422022.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30727b0]
>[422022.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30727b0] width 1920 pitch 7680 (/4 1920)
>[422022.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b29b60]
>[422022.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b29b60] width 1920 pitch 7680 (/4 1920)
>[422022.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30727b0]
>[422022.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30727b0] width 1920 pitch 7680 (/4 1920)
>[422022.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b29b60]
>[422022.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b29b60] width 1920 pitch 7680 (/4 1920)
>[422022.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30727b0]
>[422022.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30727b0] width 1920 pitch 7680 (/4 1920)
>[422022.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b29b60]
>[422022.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b29b60] width 1920 pitch 7680 (/4 1920)
>[422023.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30727b0]
>[422023.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30727b0] width 1920 pitch 7680 (/4 1920)
>[422053.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e81060]
>[422053.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e81060] width 1920 pitch 7680 (/4 1920)
>[422057.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422057.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422057.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422057.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422057.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422057.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422057.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422057.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422057.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422057.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422057.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422057.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422057.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422057.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422057.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422057.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422057.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422057.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422057.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422057.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422058.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422058.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422058.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422058.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422058.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422058.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422058.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422058.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422059.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422059.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422059.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422059.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422061.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422062.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422062.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422062.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422062.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422062.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422062.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422062.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422063.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422063.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422063.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422063.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422063.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422063.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422063.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422063.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422063.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422063.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422063.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422063.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422063.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb5e0]
>[422063.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb5e0] width 1920 pitch 7680 (/4 1920)
>[422063.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422063.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422063.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422063.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422064.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422064.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422064.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422064.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422064.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422064.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422064.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422064.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422064.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422064.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422065.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422065.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422065.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422065.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422065.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422065.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422065.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422065.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422065.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422065.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422065.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422065.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422065.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422065.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422065.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3060]
>[422065.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3060] width 1920 pitch 7680 (/4 1920)
>[422065.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422065.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422065.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f462c0]
>[422065.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f462c0] width 1920 pitch 7680 (/4 1920)
>[422065.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d110]
>[422065.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d110] width 1920 pitch 7680 (/4 1920)
>[422065.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3060]
>[422065.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3060] width 1920 pitch 7680 (/4 1920)
>[422065.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422065.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422066.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422066.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422066.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422066.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422066.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422066.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422066.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3060]
>[422066.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3060] width 1920 pitch 7680 (/4 1920)
>[422066.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422066.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422066.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422066.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422066.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422066.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422066.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d110]
>[422066.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d110] width 1920 pitch 7680 (/4 1920)
>[422066.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422066.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422066.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d110]
>[422066.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d110] width 1920 pitch 7680 (/4 1920)
>[422066.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422066.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422066.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d110]
>[422066.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d110] width 1920 pitch 7680 (/4 1920)
>[422067.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422067.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422067.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615d110]
>[422067.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615d110] width 1920 pitch 7680 (/4 1920)
>[422067.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422067.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422067.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422067.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422067.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422067.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422067.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db3060]
>[422067.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db3060] width 1920 pitch 7680 (/4 1920)
>[422067.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422067.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422067.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422067.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422067.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422067.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422067.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422067.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422067.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afce10]
>[422067.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afce10] width 1920 pitch 7680 (/4 1920)
>[422068.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbb1a0]
>[422068.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbb1a0] width 1920 pitch 7680 (/4 1920)
>[422070.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422070.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422070.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422070.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422070.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2f470]
>[422070.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2f470] width 1920 pitch 7680 (/4 1920)
>[422071.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422071.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422075.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422075.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422075.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e80da0]
>[422075.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e80da0] width 1920 pitch 7680 (/4 1920)
>[422075.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422075.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422075.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422075.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422113.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422113.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422120.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422120.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422120.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422120.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422121.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422121.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422121.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422121.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422121.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422121.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422121.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422121.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422128.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422128.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422158.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422158.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422173.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422173.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422188.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422188.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422193.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422193.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422193.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422193.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422193.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422193.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422193.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422193.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422193.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422193.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422193.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422193.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422193.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422193.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422193.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422193.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422193.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422193.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422193.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422193.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422193.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422193.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422193.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422193.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422195.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422195.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422195.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4e20]
>[422195.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4e20] width 1920 pitch 7680 (/4 1920)
>[422195.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422195.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422195.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4e20]
>[422195.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4e20] width 1920 pitch 7680 (/4 1920)
>[422195.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422195.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422195.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4e20]
>[422195.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4e20] width 1920 pitch 7680 (/4 1920)
>[422195.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422195.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422195.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4e20]
>[422195.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4e20] width 1920 pitch 7680 (/4 1920)
>[422195.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422195.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422195.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc4e20]
>[422195.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc4e20] width 1920 pitch 7680 (/4 1920)
>[422195.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422195.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422195.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422195.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422196.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422196.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422196.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422196.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422196.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422196.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422196.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422196.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422196.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422196.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422196.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422196.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422196.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422196.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422196.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422197.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422197.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422197.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422197.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422197.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[422197.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[422197.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422197.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422198.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422198.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422198.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422198.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422198.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422198.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422198.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422198.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422198.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422199.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422199.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422199.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422199.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422199.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422199.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422199.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422199.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422199.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422199.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422199.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422199.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422199.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422199.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cea10]
>[422199.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cea10] width 1920 pitch 7680 (/4 1920)
>[422199.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2daf5b0]
>[422199.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2daf5b0] width 1920 pitch 7680 (/4 1920)
>[422199.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422199.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422199.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422199.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422199.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422199.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422199.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422200.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422200.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422200.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422200.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422200.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422200.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422200.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422200.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422200.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422200.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422200.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422200.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422200.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422200.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422200.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422200.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422200.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422201.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95eb0]
>[422201.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95eb0] width 1920 pitch 7680 (/4 1920)
>[422201.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fccd90]
>[422201.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fccd90] width 1920 pitch 7680 (/4 1920)
>[422202.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95eb0]
>[422202.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95eb0] width 1920 pitch 7680 (/4 1920)
>[422202.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488040]
>[422202.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488040] width 1920 pitch 7680 (/4 1920)
>[422202.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd6e00]
>[422202.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd6e00] width 1920 pitch 7680 (/4 1920)
>[422202.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd6e00]
>[422202.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd6e00] width 1920 pitch 7680 (/4 1920)
>[422202.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72a10]
>[422202.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72a10] width 1920 pitch 7680 (/4 1920)
>[422202.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488040]
>[422202.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488040] width 1920 pitch 7680 (/4 1920)
>[422202.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422202.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422202.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422202.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422202.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422202.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422202.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422202.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422202.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422202.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422202.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422202.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422202.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422202.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422202.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422203.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422203.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb8f0]
>[422203.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb8f0] width 1920 pitch 7680 (/4 1920)
>[422203.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422203.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422203.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72a20]
>[422203.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72a20] width 1920 pitch 7680 (/4 1920)
>[422203.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a95ec0]
>[422203.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a95ec0] width 1920 pitch 7680 (/4 1920)
>[422205.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[422205.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[422218.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dbbc0]
>[422218.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dbbc0] width 1920 pitch 7680 (/4 1920)
>[422225.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422225.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422225.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dbbc0]
>[422225.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dbbc0] width 1920 pitch 7680 (/4 1920)
>[422225.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5178b30]
>[422225.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5178b30] width 1920 pitch 7680 (/4 1920)
>[422225.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30dbbc0]
>[422225.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30dbbc0] width 1920 pitch 7680 (/4 1920)
>[422225.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d4820]
>[422225.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d4820] width 1920 pitch 7680 (/4 1920)
>[422225.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48198b0]
>[422225.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48198b0] width 1920 pitch 7680 (/4 1920)
>[422225.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fdbb0]
>[422225.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fdbb0] width 1920 pitch 7680 (/4 1920)
>[422225.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffd10]
>[422225.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffd10] width 1920 pitch 7680 (/4 1920)
>[422225.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818b50]
>[422225.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818b50] width 1920 pitch 7680 (/4 1920)
>[422225.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffd10]
>[422225.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffd10] width 1920 pitch 7680 (/4 1920)
>[422225.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818b50]
>[422225.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818b50] width 1920 pitch 7680 (/4 1920)
>[422225.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffd10]
>[422225.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffd10] width 1920 pitch 7680 (/4 1920)
>[422225.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818b50]
>[422225.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818b50] width 1920 pitch 7680 (/4 1920)
>[422225.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffd10]
>[422225.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffd10] width 1920 pitch 7680 (/4 1920)
>[422225.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818b50]
>[422225.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818b50] width 1920 pitch 7680 (/4 1920)
>[422225.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffd10]
>[422225.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffd10] width 1920 pitch 7680 (/4 1920)
>[422225.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818b50]
>[422225.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818b50] width 1920 pitch 7680 (/4 1920)
>[422233.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fdbb0]
>[422233.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fdbb0] width 1920 pitch 7680 (/4 1920)
>[422243.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f29c50]
>[422243.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f29c50] width 1920 pitch 7680 (/4 1920)
>[422243.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562cd0]
>[422243.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562cd0] width 1920 pitch 7680 (/4 1920)
>[422243.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422243.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422243.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562cd0]
>[422243.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562cd0] width 1920 pitch 7680 (/4 1920)
>[422243.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422243.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422243.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562cd0]
>[422243.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562cd0] width 1920 pitch 7680 (/4 1920)
>[422243.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422243.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422243.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562cd0]
>[422243.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562cd0] width 1920 pitch 7680 (/4 1920)
>[422243.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562cd0]
>[422244.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562cd0] width 1920 pitch 7680 (/4 1920)
>[422244.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f29c50]
>[422244.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f29c50] width 1920 pitch 7680 (/4 1920)
>[422244.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4ee80]
>[422244.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4ee80] width 1920 pitch 7680 (/4 1920)
>[422244.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f29c50]
>[422244.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f29c50] width 1920 pitch 7680 (/4 1920)
>[422244.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f29c50]
>[422244.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f29c50] width 1920 pitch 7680 (/4 1920)
>[422244.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a3fd0]
>[422244.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a3fd0] width 1920 pitch 7680 (/4 1920)
>[422244.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562cd0]
>[422244.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562cd0] width 1920 pitch 7680 (/4 1920)
>[422244.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3f3d0]
>[422244.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3f3d0] width 1920 pitch 7680 (/4 1920)
>[422244.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3f3d0]
>[422244.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3f3d0] width 1920 pitch 7680 (/4 1920)
>[422244.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3f3d0]
>[422244.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3f3d0] width 1920 pitch 7680 (/4 1920)
>[422244.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3f3d0]
>[422244.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3f3d0] width 1920 pitch 7680 (/4 1920)
>[422244.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3f3d0]
>[422244.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3f3d0] width 1920 pitch 7680 (/4 1920)
>[422244.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40388b0]
>[422244.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40388b0] width 1920 pitch 7680 (/4 1920)
>[422244.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3f3d0]
>[422244.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3f3d0] width 1920 pitch 7680 (/4 1920)
>[422246.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9df0]
>[422246.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9df0] width 1920 pitch 7680 (/4 1920)
>[422246.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422246.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422246.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e80da0]
>[422246.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e80da0] width 1920 pitch 7680 (/4 1920)
>[422248.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422248.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422248.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422248.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422249.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422249.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422249.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422249.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422249.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b36b0]
>[422249.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b36b0] width 1920 pitch 7680 (/4 1920)
>[422249.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422249.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422249.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422249.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422249.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422249.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422249.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422249.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422249.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422249.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422249.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8130]
>[422249.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8130] width 1920 pitch 7680 (/4 1920)
>[422249.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2563390]
>[422249.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2563390] width 1920 pitch 7680 (/4 1920)
>[422249.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422249.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422253.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422253.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422253.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422253.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422253.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422253.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422253.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422253.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422253.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422253.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422253.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422253.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422253.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422253.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422253.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422253.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422253.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422253.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422253.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd3b0]
>[422253.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd3b0] width 1920 pitch 7680 (/4 1920)
>[422269.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88db0]
>[422269.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88db0] width 1920 pitch 7680 (/4 1920)
>[422269.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b299f0]
>[422269.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b299f0] width 1920 pitch 7680 (/4 1920)
>[422269.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422269.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b299f0]
>[422269.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b299f0] width 1920 pitch 7680 (/4 1920)
>[422269.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422269.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422269.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422269.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422269.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422269.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422269.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422269.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422269.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422269.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422269.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422269.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315a270]
>[422269.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315a270] width 1920 pitch 7680 (/4 1920)
>[422269.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422269.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422270.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fbb0]
>[422270.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fbb0] width 1920 pitch 7680 (/4 1920)
>[422273.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422273.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422273.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422273.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422273.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422273.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422273.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422273.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422273.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422273.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422273.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422273.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422273.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422273.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422273.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422273.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422273.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422273.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422273.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422273.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422274.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422274.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422274.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422274.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422274.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422274.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422293.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422293.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422308.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ff860]
>[422308.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ff860] width 1920 pitch 7680 (/4 1920)
>[422359.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62ad870]
>[422359.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62ad870] width 1920 pitch 7680 (/4 1920)
>[422359.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422359.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422359.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422359.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422360.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400b9e0]
>[422360.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400b9e0] width 1920 pitch 7680 (/4 1920)
>[422488.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd310]
>[422488.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd310] width 1920 pitch 7680 (/4 1920)
>[422503.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400b9e0]
>[422503.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400b9e0] width 1920 pitch 7680 (/4 1920)
>[422522.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e83ee0]
>[422522.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e83ee0] width 1920 pitch 7680 (/4 1920)
>[422522.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422522.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422522.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422522.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422522.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422522.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422522.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422522.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422522.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422522.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422522.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422522.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422522.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[422522.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[422522.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422522.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422522.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[422522.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[422522.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422522.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422522.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[422522.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[422522.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a25f70]
>[422522.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a25f70] width 1920 pitch 7680 (/4 1920)
>[422522.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[422522.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[422522.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd310]
>[422522.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd310] width 1920 pitch 7680 (/4 1920)
>[422522.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[422522.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[422522.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd310]
>[422522.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd310] width 1920 pitch 7680 (/4 1920)
>[422523.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[422523.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[422523.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddc5c0]
>[422523.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddc5c0] width 1920 pitch 7680 (/4 1920)
>[422523.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[422523.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[422523.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422523.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422523.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[422523.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[422523.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422523.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422523.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[422523.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[422524.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422524.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422524.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[422524.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[422524.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422524.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422524.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[422524.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[422524.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422524.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422524.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306fa10]
>[422524.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306fa10] width 1920 pitch 7680 (/4 1920)
>[422525.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422525.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422527.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bde60]
>[422527.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bde60] width 1920 pitch 7680 (/4 1920)
>[422527.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2430]
>[422528.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2430] width 1920 pitch 7680 (/4 1920)
>[422528.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[422528.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[422528.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[422528.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[422528.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[422528.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[422528.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[422528.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[422528.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[422528.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[422528.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68330]
>[422528.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68330] width 1920 pitch 7680 (/4 1920)
>[422528.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422528.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422528.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2160]
>[422528.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2160] width 1920 pitch 7680 (/4 1920)
>[422528.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422528.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422528.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2160]
>[422528.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2160] width 1920 pitch 7680 (/4 1920)
>[422528.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422528.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422528.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2160]
>[422528.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2160] width 1920 pitch 7680 (/4 1920)
>[422528.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422528.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422528.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2160]
>[422528.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2160] width 1920 pitch 7680 (/4 1920)
>[422529.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422529.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422529.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2160]
>[422529.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2160] width 1920 pitch 7680 (/4 1920)
>[422529.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422529.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422529.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[422529.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[422529.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7ec60]
>[422529.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7ec60] width 1920 pitch 7680 (/4 1920)
>[422529.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[422529.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[422529.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35fb0]
>[422529.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35fb0] width 1920 pitch 7680 (/4 1920)
>[422529.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[422529.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[422529.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35fb0]
>[422529.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35fb0] width 1920 pitch 7680 (/4 1920)
>[422529.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa20c0]
>[422529.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa20c0] width 1920 pitch 7680 (/4 1920)
>[422529.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35fb0]
>[422529.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35fb0] width 1920 pitch 7680 (/4 1920)
>[422529.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa20c0]
>[422529.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa20c0] width 1920 pitch 7680 (/4 1920)
>[422568.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b047e0]
>[422568.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b047e0] width 1920 pitch 7680 (/4 1920)
>[422568.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[422568.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[422568.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422568.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422568.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[422568.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[422568.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422568.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422568.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[422568.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[422568.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422568.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422568.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[422568.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[422568.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422568.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422568.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[422568.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[422569.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422569.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422569.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422569.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422569.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422569.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422570.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422570.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422570.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422570.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422570.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422570.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422570.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422570.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422570.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422570.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422570.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422570.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422570.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422570.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422570.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422570.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422570.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422570.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422571.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422571.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422571.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422571.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422571.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422571.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422572.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422572.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422572.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422572.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422572.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422572.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422572.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422572.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422572.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422572.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422572.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422572.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422572.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422572.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422572.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422572.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422572.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[422572.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[422572.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422572.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422573.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa20c0]
>[422573.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa20c0] width 1920 pitch 7680 (/4 1920)
>[422573.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[422573.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[422573.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa20c0]
>[422573.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa20c0] width 1920 pitch 7680 (/4 1920)
>[422573.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[422573.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[422573.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa20c0]
>[422573.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa20c0] width 1920 pitch 7680 (/4 1920)
>[422573.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[422573.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[422573.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa20c0]
>[422573.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa20c0] width 1920 pitch 7680 (/4 1920)
>[422573.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422573.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422573.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422573.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422573.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422573.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422573.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422573.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422573.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422573.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422573.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422573.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422573.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422573.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422573.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422573.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422573.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422573.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422573.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422573.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422574.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422574.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422574.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422574.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422574.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422574.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422574.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422574.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422574.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422574.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422574.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd4e20]
>[422574.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd4e20] width 1920 pitch 7680 (/4 1920)
>[422574.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422574.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422574.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd4e20]
>[422574.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd4e20] width 1920 pitch 7680 (/4 1920)
>[422574.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[422574.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[422574.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd4e20]
>[422574.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd4e20] width 1920 pitch 7680 (/4 1920)
>[422574.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422574.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422574.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[422574.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[422577.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7e3c0]
>[422577.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7e3c0] width 1920 pitch 7680 (/4 1920)
>[422585.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35fb0]
>[422585.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35fb0] width 1920 pitch 7680 (/4 1920)
>[422585.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[422585.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[422585.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[422585.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[422585.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[422585.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[422585.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422585.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422588.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[422588.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[422588.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[422588.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[422588.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edfd00]
>[422588.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edfd00] width 1920 pitch 7680 (/4 1920)
>[422588.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[422588.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[422607.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd070]
>[422607.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd070] width 1920 pitch 7680 (/4 1920)
>[422607.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89760]
>[422607.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89760] width 1920 pitch 7680 (/4 1920)
>[422607.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[422607.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[422607.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b84990]
>[422607.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b84990] width 1920 pitch 7680 (/4 1920)
>[422608.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f68dc0]
>[422608.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f68dc0] width 1920 pitch 7680 (/4 1920)
>[422625.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[422625.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[422625.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422625.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422625.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[422625.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[422625.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422625.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422625.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce85f0]
>[422625.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce85f0] width 1920 pitch 7680 (/4 1920)
>[422625.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[422625.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[422625.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51fb0]
>[422625.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51fb0] width 1920 pitch 7680 (/4 1920)
>[422625.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[422625.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[422625.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[422625.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[422625.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[422625.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[422625.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[422625.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[422626.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[422626.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[422626.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[422626.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[422626.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[422626.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[422626.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[422627.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[422627.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd8010]
>[422627.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd8010] width 1920 pitch 7680 (/4 1920)
>[422627.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12f10]
>[422627.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12f10] width 1920 pitch 7680 (/4 1920)
>[422627.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[422627.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[422627.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422627.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422627.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[422627.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[422627.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422627.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422627.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[422627.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[422627.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1df40]
>[422627.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1df40] width 1920 pitch 7680 (/4 1920)
>[422638.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12f10]
>[422638.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12f10] width 1920 pitch 7680 (/4 1920)
>[422639.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c2d00]
>[422639.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c2d00] width 1920 pitch 7680 (/4 1920)
>[422639.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[422639.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[422640.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[422640.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[422640.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422640.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422640.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[422640.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[422643.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422643.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422643.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422643.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422643.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422644.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[422644.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[422644.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[422644.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[422645.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422645.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[422645.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[422645.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422645.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[422645.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[422645.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422645.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[422645.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[422645.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422645.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[422645.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[422645.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422645.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[422645.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[422645.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422645.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[422645.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[422645.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d7d80]
>[422645.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d7d80] width 1920 pitch 7680 (/4 1920)
>[422646.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422646.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422646.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422646.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422646.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422647.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422647.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422647.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310fb20]
>[422647.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310fb20] width 1920 pitch 7680 (/4 1920)
>[422648.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[422648.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[422648.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422648.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422648.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422648.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422648.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422648.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422648.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422648.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422648.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422648.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422648.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422648.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422648.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422648.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422648.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422648.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422648.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[422648.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[422648.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[422648.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[422648.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3071530]
>[422648.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3071530] width 1920 pitch 7680 (/4 1920)
>[422648.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3071530]
>[422648.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3071530] width 1920 pitch 7680 (/4 1920)
>[422648.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3071530]
>[422648.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3071530] width 1920 pitch 7680 (/4 1920)
>[422648.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3071530]
>[422648.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3071530] width 1920 pitch 7680 (/4 1920)
>[422648.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422648.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422648.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422648.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422648.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422648.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422648.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422648.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422648.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422648.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422648.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422648.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422648.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422649.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce66a0]
>[422649.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce66a0] width 1920 pitch 7680 (/4 1920)
>[422649.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d8660]
>[422649.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d8660] width 1920 pitch 7680 (/4 1920)
>[422650.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fba650]
>[422650.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fba650] width 1920 pitch 7680 (/4 1920)
>[422651.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422651.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422651.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f4a0]
>[422651.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f4a0] width 1920 pitch 7680 (/4 1920)
>[422651.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422651.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422651.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422651.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422651.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422651.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422651.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422651.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422651.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422651.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422651.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422651.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615b3e0]
>[422651.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615b3e0] width 1920 pitch 7680 (/4 1920)
>[422653.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422653.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422660.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbf1b0]
>[422660.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbf1b0] width 1920 pitch 7680 (/4 1920)
>[422670.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f8850]
>[422670.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f8850] width 1920 pitch 7680 (/4 1920)
>[422695.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcb720]
>[422696.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcb720] width 1920 pitch 7680 (/4 1920)
>[422696.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516e110]
>[422696.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516e110] width 1920 pitch 7680 (/4 1920)
>[422696.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516f6e0]
>[422696.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516f6e0] width 1920 pitch 7680 (/4 1920)
>[422713.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516e3d0]
>[422713.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516e3d0] width 1920 pitch 7680 (/4 1920)
>[422716.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2970930]
>[422716.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2970930] width 1920 pitch 7680 (/4 1920)
>[422716.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c819d0]
>[422716.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c819d0] width 1920 pitch 7680 (/4 1920)
>[422716.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2970b70]
>[422716.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2970b70] width 1920 pitch 7680 (/4 1920)
>[422716.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422716.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422716.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29707e0]
>[422716.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29707e0] width 1920 pitch 7680 (/4 1920)
>[422717.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29707e0]
>[422717.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29707e0] width 1920 pitch 7680 (/4 1920)
>[422717.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d230]
>[422717.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d230] width 1920 pitch 7680 (/4 1920)
>[422718.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c9fb0]
>[422718.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c9fb0] width 1920 pitch 7680 (/4 1920)
>[422718.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66920]
>[422718.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66920] width 1920 pitch 7680 (/4 1920)
>[422718.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[422718.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[422733.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaab80]
>[422733.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaab80] width 1920 pitch 7680 (/4 1920)
>[422734.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422734.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422734.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaab80]
>[422734.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaab80] width 1920 pitch 7680 (/4 1920)
>[422734.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2870]
>[422734.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2870] width 1920 pitch 7680 (/4 1920)
>[422734.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ebce0]
>[422734.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ebce0] width 1920 pitch 7680 (/4 1920)
>[422734.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d57b40]
>[422734.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d57b40] width 1920 pitch 7680 (/4 1920)
>[422743.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d2870]
>[422743.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d2870] width 1920 pitch 7680 (/4 1920)
>[422769.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9d40]
>[422769.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9d40] width 1920 pitch 7680 (/4 1920)
>[422769.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1e200]
>[422769.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1e200] width 1920 pitch 7680 (/4 1920)
>[422770.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9d40]
>[422770.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9d40] width 1920 pitch 7680 (/4 1920)
>[422770.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95420]
>[422770.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95420] width 1920 pitch 7680 (/4 1920)
>[422770.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422770.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422770.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95420]
>[422770.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95420] width 1920 pitch 7680 (/4 1920)
>[422770.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422770.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422770.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9d40]
>[422770.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9d40] width 1920 pitch 7680 (/4 1920)
>[422770.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921610]
>[422770.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921610] width 1920 pitch 7680 (/4 1920)
>[422770.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422770.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422770.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921610]
>[422770.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921610] width 1920 pitch 7680 (/4 1920)
>[422771.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422771.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422771.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921610]
>[422771.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921610] width 1920 pitch 7680 (/4 1920)
>[422771.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422771.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422771.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3921610]
>[422771.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3921610] width 1920 pitch 7680 (/4 1920)
>[422771.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9d40]
>[422771.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9d40] width 1920 pitch 7680 (/4 1920)
>[422771.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95420]
>[422771.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95420] width 1920 pitch 7680 (/4 1920)
>[422771.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422771.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422771.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95420]
>[422771.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95420] width 1920 pitch 7680 (/4 1920)
>[422772.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422772.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422772.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b95420]
>[422772.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b95420] width 1920 pitch 7680 (/4 1920)
>[422772.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422772.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422773.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d9d40]
>[422773.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d9d40] width 1920 pitch 7680 (/4 1920)
>[422773.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422773.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422773.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaab80]
>[422773.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaab80] width 1920 pitch 7680 (/4 1920)
>[422773.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[422773.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[422773.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422773.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422773.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422773.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422773.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66920]
>[422773.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66920] width 1920 pitch 7680 (/4 1920)
>[422788.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaab80]
>[422788.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaab80] width 1920 pitch 7680 (/4 1920)
>[422802.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f569a0]
>[422802.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f569a0] width 1920 pitch 7680 (/4 1920)
>[422802.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da14e0]
>[422802.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da14e0] width 1920 pitch 7680 (/4 1920)
>[422802.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422802.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da14e0]
>[422802.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da14e0] width 1920 pitch 7680 (/4 1920)
>[422802.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422802.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e10]
>[422802.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e10] width 1920 pitch 7680 (/4 1920)
>[422802.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422802.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e10]
>[422802.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e10] width 1920 pitch 7680 (/4 1920)
>[422802.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422802.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e10]
>[422802.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e10] width 1920 pitch 7680 (/4 1920)
>[422802.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422802.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e10]
>[422802.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e10] width 1920 pitch 7680 (/4 1920)
>[422802.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422802.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e10]
>[422802.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e10] width 1920 pitch 7680 (/4 1920)
>[422802.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55e70]
>[422802.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55e70] width 1920 pitch 7680 (/4 1920)
>[422803.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536cfe0]
>[422803.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536cfe0] width 1920 pitch 7680 (/4 1920)
>[422806.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51413a0]
>[422806.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51413a0] width 1920 pitch 7680 (/4 1920)
>[422806.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f56790]
>[422806.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f56790] width 1920 pitch 7680 (/4 1920)
>[422806.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d47f0]
>[422806.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d47f0] width 1920 pitch 7680 (/4 1920)
>[422806.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513fb20]
>[422806.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513fb20] width 1920 pitch 7680 (/4 1920)
>[422807.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536cfe0]
>[422807.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536cfe0] width 1920 pitch 7680 (/4 1920)
>[422807.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513f0f0]
>[422807.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513f0f0] width 1920 pitch 7680 (/4 1920)
>[422807.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422807.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422807.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7790]
>[422807.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7790] width 1920 pitch 7680 (/4 1920)
>[422807.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422807.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7790]
>[422807.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7790] width 1920 pitch 7680 (/4 1920)
>[422807.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422807.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513f0f0]
>[422807.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513f0f0] width 1920 pitch 7680 (/4 1920)
>[422807.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422807.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513f0f0]
>[422807.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513f0f0] width 1920 pitch 7680 (/4 1920)
>[422807.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422807.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513f0f0]
>[422807.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513f0f0] width 1920 pitch 7680 (/4 1920)
>[422807.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7790]
>[422807.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7790] width 1920 pitch 7680 (/4 1920)
>[422807.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422807.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422809.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895fa0]
>[422809.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895fa0] width 1920 pitch 7680 (/4 1920)
>[422809.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422809.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422809.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422809.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422809.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422809.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422809.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c66920]
>[422809.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c66920] width 1920 pitch 7680 (/4 1920)
>[422813.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[422813.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[422813.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[422813.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[422813.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d070]
>[422813.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d070] width 1920 pitch 7680 (/4 1920)
>[422813.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[422813.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[422829.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[422829.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[422829.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eaab80]
>[422829.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eaab80] width 1920 pitch 7680 (/4 1920)
>[422829.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[422829.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[422830.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c3100]
>[422830.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c3100] width 1920 pitch 7680 (/4 1920)
>[422833.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a100]
>[422833.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a100] width 1920 pitch 7680 (/4 1920)
>[422901.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50378a0]
>[422901.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50378a0] width 1920 pitch 7680 (/4 1920)
>[422901.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50378a0]
>[422901.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50378a0] width 1920 pitch 7680 (/4 1920)
>[422902.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402bce0]
>[422902.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402bce0] width 1920 pitch 7680 (/4 1920)
>[422902.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50378a0]
>[422902.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50378a0] width 1920 pitch 7680 (/4 1920)
>[422903.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402bce0]
>[422903.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402bce0] width 1920 pitch 7680 (/4 1920)
>[422905.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f87980]
>[422905.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f87980] width 1920 pitch 7680 (/4 1920)
>[422905.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcb3e0]
>[422905.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcb3e0] width 1920 pitch 7680 (/4 1920)
>[422905.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d230]
>[422905.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d230] width 1920 pitch 7680 (/4 1920)
>[422907.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d230]
>[422907.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d230] width 1920 pitch 7680 (/4 1920)
>[422907.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbe5e0]
>[422907.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbe5e0] width 1920 pitch 7680 (/4 1920)
>[422907.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcb3e0]
>[422907.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcb3e0] width 1920 pitch 7680 (/4 1920)
>[422907.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29707e0]
>[422907.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29707e0] width 1920 pitch 7680 (/4 1920)
>[422907.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbe5e0]
>[422907.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbe5e0] width 1920 pitch 7680 (/4 1920)
>[422908.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29707e0]
>[422908.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29707e0] width 1920 pitch 7680 (/4 1920)
>[422909.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ef8c70]
>[422909.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ef8c70] width 1920 pitch 7680 (/4 1920)
>[422909.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afc7d0]
>[422909.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afc7d0] width 1920 pitch 7680 (/4 1920)
>[422909.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402bb50]
>[422909.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402bb50] width 1920 pitch 7680 (/4 1920)
>[422911.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afc7d0]
>[422911.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afc7d0] width 1920 pitch 7680 (/4 1920)
>[422911.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d230]
>[422911.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d230] width 1920 pitch 7680 (/4 1920)
>[422911.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfa50]
>[422911.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfa50] width 1920 pitch 7680 (/4 1920)
>[422938.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3158e60]
>[422938.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3158e60] width 1920 pitch 7680 (/4 1920)
>[422944.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db11e0]
>[422944.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db11e0] width 1920 pitch 7680 (/4 1920)
>[422944.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[422944.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[422944.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[422944.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[422944.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffc050]
>[422944.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffc050] width 1920 pitch 7680 (/4 1920)
>[422945.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96d10]
>[422945.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96d10] width 1920 pitch 7680 (/4 1920)
>[422945.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[422945.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[422945.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[422945.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[422945.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[422945.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[422945.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a96d10]
>[422945.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a96d10] width 1920 pitch 7680 (/4 1920)
>[422945.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[422945.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[422945.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[422945.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[422945.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[422945.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[422945.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[422945.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[422945.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[422945.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[422953.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d77ef0]
>[422953.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d77ef0] width 1920 pitch 7680 (/4 1920)
>[422968.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[422968.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[422983.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cc530]
>[422983.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cc530] width 1920 pitch 7680 (/4 1920)
>[422988.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[422988.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[422988.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7f20]
>[422988.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7f20] width 1920 pitch 7680 (/4 1920)
>[422988.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[422988.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[422988.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffc050]
>[422988.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffc050] width 1920 pitch 7680 (/4 1920)
>[423003.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b150]
>[423003.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b150] width 1920 pitch 7680 (/4 1920)
>[423003.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffc050]
>[423003.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffc050] width 1920 pitch 7680 (/4 1920)
>[423003.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c5030]
>[423003.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c5030] width 1920 pitch 7680 (/4 1920)
>[423003.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[423003.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[423013.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcb640]
>[423013.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcb640] width 1920 pitch 7680 (/4 1920)
>[423028.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f464f0]
>[423028.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f464f0] width 1920 pitch 7680 (/4 1920)
>[423039.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c5030]
>[423039.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c5030] width 1920 pitch 7680 (/4 1920)
>[423039.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52726d0]
>[423040.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52726d0] width 1920 pitch 7680 (/4 1920)
>[423040.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[423040.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[423040.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[423040.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[423040.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[423040.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[423040.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[423040.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[423040.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[423040.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[423040.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[423040.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[423040.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[423040.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[423040.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8ece0]
>[423040.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8ece0] width 1920 pitch 7680 (/4 1920)
>[423040.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[423040.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[423040.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8ece0]
>[423040.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8ece0] width 1920 pitch 7680 (/4 1920)
>[423040.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40305f0]
>[423040.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40305f0] width 1920 pitch 7680 (/4 1920)
>[423040.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8ece0]
>[423040.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8ece0] width 1920 pitch 7680 (/4 1920)
>[423043.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[423043.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[423058.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423058.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423099.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423099.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423099.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423099.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423102.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423102.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423102.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423102.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423102.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423102.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423102.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423102.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423102.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423102.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423102.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423102.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423102.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423102.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423102.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423102.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423102.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423102.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423102.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423102.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423103.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423103.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423103.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423103.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423103.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423103.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423103.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423103.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423104.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423104.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423104.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423104.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423104.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423104.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423105.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423105.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423105.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423105.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423106.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423106.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423106.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423106.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423106.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423106.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423106.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423106.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423106.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423106.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423106.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423106.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423106.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423106.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423106.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423106.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[423106.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[423106.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[423106.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[423106.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423106.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423106.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423106.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423106.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423107.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423107.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423107.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423107.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423107.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423107.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423107.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423107.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423107.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423107.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423107.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423107.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423107.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423107.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423107.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423107.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423107.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423107.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423107.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423107.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d91660]
>[423107.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d91660] width 1920 pitch 7680 (/4 1920)
>[423107.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[423107.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[423108.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423108.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423108.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423108.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[423108.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[423109.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[423109.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[423110.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf1850]
>[423110.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf1850] width 1920 pitch 7680 (/4 1920)
>[423111.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5d750]
>[423111.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5d750] width 1920 pitch 7680 (/4 1920)
>[423111.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5272440]
>[423111.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5272440] width 1920 pitch 7680 (/4 1920)
>[423111.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30787e0]
>[423111.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30787e0] width 1920 pitch 7680 (/4 1920)
>[423111.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5272440]
>[423111.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5272440] width 1920 pitch 7680 (/4 1920)
>[423111.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30787e0]
>[423111.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30787e0] width 1920 pitch 7680 (/4 1920)
>[423111.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d90090]
>[423111.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d90090] width 1920 pitch 7680 (/4 1920)
>[423111.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f9b30]
>[423111.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f9b30] width 1920 pitch 7680 (/4 1920)
>[423111.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423111.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e00]
>[423111.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e00] width 1920 pitch 7680 (/4 1920)
>[423111.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423111.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e00]
>[423111.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e00] width 1920 pitch 7680 (/4 1920)
>[423111.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3d20]
>[423111.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3d20] width 1920 pitch 7680 (/4 1920)
>[423111.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3d20]
>[423111.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3d20] width 1920 pitch 7680 (/4 1920)
>[423111.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423111.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423111.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423111.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423111.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423111.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423111.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cc85c0]
>[423111.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cc85c0] width 1920 pitch 7680 (/4 1920)
>[423130.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423130.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423298.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5178f00]
>[423298.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5178f00] width 1920 pitch 7680 (/4 1920)
>[423313.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536cfc0]
>[423313.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536cfc0] width 1920 pitch 7680 (/4 1920)
>[423343.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9f610]
>[423343.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9f610] width 1920 pitch 7680 (/4 1920)
>[423358.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3d20]
>[423358.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3d20] width 1920 pitch 7680 (/4 1920)
>[423388.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5037440]
>[423388.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5037440] width 1920 pitch 7680 (/4 1920)
>[423403.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9f610]
>[423403.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9f610] width 1920 pitch 7680 (/4 1920)
>[423463.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f8b20]
>[423463.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f8b20] width 1920 pitch 7680 (/4 1920)
>[423478.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2f10]
>[423478.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2f10] width 1920 pitch 7680 (/4 1920)
>[423628.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3927e60]
>[423628.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3927e60] width 1920 pitch 7680 (/4 1920)
>[423658.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5037440]
>[423658.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5037440] width 1920 pitch 7680 (/4 1920)
>[423730.818] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[423730.818] (II) RADEON(0): Using hsync ranges from config file
>[423730.818] (II) RADEON(0): Using vrefresh ranges from config file
>[423730.818] (II) RADEON(0): Printing DDC gathered Modelines:
>[423730.818] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[423730.818] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[423730.818] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[423730.818] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[423730.818] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[423730.818] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[423730.818] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[423730.818] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[423730.818] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[423730.818] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[423730.818] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[423730.818] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[423733.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3d20]
>[423733.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3d20] width 1920 pitch 7680 (/4 1920)
>[423820.673] (II) RADEON(0): RADEONSaveScreen(2)
>[423820.673] (II) RADEON(0): RADEONSaveScreen(0)
>[424318.196] (II) RADEON(0): RADEONSaveScreen(1)
>[424318.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9f610]
>[424318.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9f610] width 1920 pitch 7680 (/4 1920)
>[424393.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[424393.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[424408.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f86d0]
>[424408.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f86d0] width 1920 pitch 7680 (/4 1920)
>[424418.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[424418.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[424419.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b170]
>[424419.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b170] width 1920 pitch 7680 (/4 1920)
>[424419.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52dc0]
>[424419.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52dc0] width 1920 pitch 7680 (/4 1920)
>[424420.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c7f9e0]
>[424420.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c7f9e0] width 1920 pitch 7680 (/4 1920)
>[424421.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f8a0]
>[424421.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f8a0] width 1920 pitch 7680 (/4 1920)
>[424441.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[424441.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[424455.274] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[424455.274] (II) RADEON(0): Using hsync ranges from config file
>[424455.274] (II) RADEON(0): Using vrefresh ranges from config file
>[424455.274] (II) RADEON(0): Printing DDC gathered Modelines:
>[424455.274] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[424455.274] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[424455.274] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[424455.274] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[424455.274] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[424455.274] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[424455.274] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[424455.274] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[424455.274] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[424455.274] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[424455.274] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[424455.274] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[424455.320] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[424455.320] (II) RADEON(0): Using hsync ranges from config file
>[424455.320] (II) RADEON(0): Using vrefresh ranges from config file
>[424455.320] (II) RADEON(0): Printing DDC gathered Modelines:
>[424455.320] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[424455.320] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[424455.320] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[424455.320] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[424455.320] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[424455.320] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[424455.320] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[424455.320] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[424455.320] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[424455.320] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[424455.320] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[424455.320] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[424455.368] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[424455.368] (II) RADEON(0): Using hsync ranges from config file
>[424455.368] (II) RADEON(0): Using vrefresh ranges from config file
>[424455.368] (II) RADEON(0): Printing DDC gathered Modelines:
>[424455.368] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[424455.368] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[424455.368] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[424455.368] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[424455.368] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[424455.368] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[424455.368] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[424455.368] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[424455.368] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[424455.368] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[424455.368] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[424455.368] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[424483.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2537a50]
>[424483.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2537a50] width 1920 pitch 7680 (/4 1920)
>[424498.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[424498.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[424543.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afd780]
>[424543.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afd780] width 1920 pitch 7680 (/4 1920)
>[424558.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5770]
>[424558.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5770] width 1920 pitch 7680 (/4 1920)
>[424588.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[424588.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[424618.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3015190]
>[424618.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3015190] width 1920 pitch 7680 (/4 1920)
>[424723.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5770]
>[424723.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5770] width 1920 pitch 7680 (/4 1920)
>[424738.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3015080]
>[424738.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3015080] width 1920 pitch 7680 (/4 1920)
>[424768.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2537a50]
>[424768.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2537a50] width 1920 pitch 7680 (/4 1920)
>[424783.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afd7e0]
>[424783.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afd7e0] width 1920 pitch 7680 (/4 1920)
>[424798.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[424798.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[424813.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5770]
>[424813.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5770] width 1920 pitch 7680 (/4 1920)
>[424873.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5770]
>[424873.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5770] width 1920 pitch 7680 (/4 1920)
>[424888.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2537a50]
>[424888.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2537a50] width 1920 pitch 7680 (/4 1920)
>[425023.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425023.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425038.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425038.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425068.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c83590]
>[425068.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c83590] width 1920 pitch 7680 (/4 1920)
>[425083.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c83140]
>[425083.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c83140] width 1920 pitch 7680 (/4 1920)
>[425107.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9c550]
>[425107.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9c550] width 1920 pitch 7680 (/4 1920)
>[425108.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5770]
>[425108.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5770] width 1920 pitch 7680 (/4 1920)
>[425108.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d824b0]
>[425108.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d824b0] width 1920 pitch 7680 (/4 1920)
>[425108.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a458c0]
>[425108.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a458c0] width 1920 pitch 7680 (/4 1920)
>[425140.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c83140]
>[425140.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c83140] width 1920 pitch 7680 (/4 1920)
>[425140.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425140.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425140.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d02150]
>[425140.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d02150] width 1920 pitch 7680 (/4 1920)
>[425140.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425140.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425143.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f990]
>[425143.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f990] width 1920 pitch 7680 (/4 1920)
>[425158.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425158.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425203.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425203.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425218.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85d00]
>[425218.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85d00] width 1920 pitch 7680 (/4 1920)
>[425293.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425293.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425308.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425308.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425518.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85d00]
>[425518.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85d00] width 1920 pitch 7680 (/4 1920)
>[425533.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f990]
>[425533.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f990] width 1920 pitch 7680 (/4 1920)
>[425563.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425563.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425578.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425578.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425608.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425608.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425638.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85d00]
>[425638.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85d00] width 1920 pitch 7680 (/4 1920)
>[425668.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425668.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425683.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425683.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425743.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425743.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425773.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425773.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425803.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425803.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425833.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425833.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425923.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425923.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[425938.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85d00]
>[425938.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85d00] width 1920 pitch 7680 (/4 1920)
>[425953.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85d00]
>[425953.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85d00] width 1920 pitch 7680 (/4 1920)
>[425968.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f990]
>[425968.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f990] width 1920 pitch 7680 (/4 1920)
>[425983.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[425983.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[425998.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[425998.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426058.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426058.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426073.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85d00]
>[426073.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85d00] width 1920 pitch 7680 (/4 1920)
>[426133.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426133.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426148.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426148.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426298.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426298.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426313.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426313.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426343.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426343.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426358.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426358.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426373.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426373.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426388.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426388.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426433.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426433.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426478.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426478.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426568.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426568.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426583.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426583.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426658.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426658.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426673.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426673.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426778.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426778.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426793.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426793.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426808.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426808.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426823.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426823.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fe0a0]
>[426837.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fe0a0] width 1920 pitch 7680 (/4 1920)
>[426837.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426837.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fe0a0]
>[426837.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fe0a0] width 1920 pitch 7680 (/4 1920)
>[426837.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426837.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fdb80]
>[426837.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fdb80] width 1920 pitch 7680 (/4 1920)
>[426837.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426837.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fdb80]
>[426837.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fdb80] width 1920 pitch 7680 (/4 1920)
>[426837.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426837.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fdb80]
>[426837.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fdb80] width 1920 pitch 7680 (/4 1920)
>[426837.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426837.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fdb80]
>[426837.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fdb80] width 1920 pitch 7680 (/4 1920)
>[426837.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426837.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426837.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fdb80]
>[426837.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fdb80] width 1920 pitch 7680 (/4 1920)
>[426838.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fdc40]
>[426838.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fdc40] width 1920 pitch 7680 (/4 1920)
>[426843.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426843.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426843.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426843.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426843.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426843.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426843.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426843.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426843.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426843.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426843.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426843.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426843.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426843.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426843.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426843.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426843.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[426843.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[426843.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426843.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426848.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426848.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426848.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426848.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426848.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426848.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426848.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426848.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426848.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426848.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426848.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426848.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426849.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426849.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426849.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2537a50]
>[426849.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2537a50] width 1920 pitch 7680 (/4 1920)
>[426849.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426849.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426849.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2537a50]
>[426849.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2537a50] width 1920 pitch 7680 (/4 1920)
>[426849.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426849.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426850.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426850.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426850.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7fcd0]
>[426850.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7fcd0] width 1920 pitch 7680 (/4 1920)
>[426853.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516d610]
>[426853.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516d610] width 1920 pitch 7680 (/4 1920)
>[426854.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d74f0]
>[426855.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d74f0] width 1920 pitch 7680 (/4 1920)
>[426855.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cbb0]
>[426855.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cbb0] width 1920 pitch 7680 (/4 1920)
>[426855.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cbb0]
>[426855.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cbb0] width 1920 pitch 7680 (/4 1920)
>[426856.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccf240]
>[426856.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccf240] width 1920 pitch 7680 (/4 1920)
>[426857.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d38f20]
>[426857.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d38f20] width 1920 pitch 7680 (/4 1920)
>[426857.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d38f20]
>[426857.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d38f20] width 1920 pitch 7680 (/4 1920)
>[426883.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c2a0]
>[426883.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c2a0] width 1920 pitch 7680 (/4 1920)
>[426898.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486f440]
>[426898.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486f440] width 1920 pitch 7680 (/4 1920)
>[426910.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426910.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426910.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486f800]
>[426910.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486f800] width 1920 pitch 7680 (/4 1920)
>[426911.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426911.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426911.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f7f80]
>[426911.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f7f80] width 1920 pitch 7680 (/4 1920)
>[426911.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b5790]
>[426911.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b5790] width 1920 pitch 7680 (/4 1920)
>[426911.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[426911.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[426915.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f752e0]
>[426915.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f752e0] width 1920 pitch 7680 (/4 1920)
>[426915.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[426915.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[426915.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f752e0]
>[426915.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f752e0] width 1920 pitch 7680 (/4 1920)
>[426915.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[426915.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[426915.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f752e0]
>[426915.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f752e0] width 1920 pitch 7680 (/4 1920)
>[426915.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[426915.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[426915.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f752e0]
>[426915.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f752e0] width 1920 pitch 7680 (/4 1920)
>[426915.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[426915.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[426915.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b5790]
>[426915.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b5790] width 1920 pitch 7680 (/4 1920)
>[426916.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426916.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426916.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b5790]
>[426916.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b5790] width 1920 pitch 7680 (/4 1920)
>[426916.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[426916.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[426916.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426916.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426916.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[426916.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[426916.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426916.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426916.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[426916.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[426918.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168450]
>[426918.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168450] width 1920 pitch 7680 (/4 1920)
>[426919.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426919.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426919.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[426919.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[426919.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[426919.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[426919.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[426919.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[426919.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[426919.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[426919.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[426919.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[426919.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[426919.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[426919.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b5790]
>[426919.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b5790] width 1920 pitch 7680 (/4 1920)
>[426919.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426919.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426919.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6d050]
>[426919.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6d050] width 1920 pitch 7680 (/4 1920)
>[426919.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b5790]
>[426919.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b5790] width 1920 pitch 7680 (/4 1920)
>[426928.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426928.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426937.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2971090]
>[426937.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2971090] width 1920 pitch 7680 (/4 1920)
>[426943.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3168450]
>[426943.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3168450] width 1920 pitch 7680 (/4 1920)
>[426945.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[426945.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[426945.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4e8a0]
>[426945.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4e8a0] width 1920 pitch 7680 (/4 1920)
>[426945.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[426945.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[426946.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4e8a0]
>[426946.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4e8a0] width 1920 pitch 7680 (/4 1920)
>[426958.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5027db0]
>[426958.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5027db0] width 1920 pitch 7680 (/4 1920)
>[426980.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90500]
>[426980.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90500] width 1920 pitch 7680 (/4 1920)
>[426980.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[426980.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[426980.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[426980.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[426980.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[426980.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[426980.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[426980.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[426980.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[426980.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[426980.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[426980.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[426980.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[426980.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[426980.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[426980.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[426981.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd4e20]
>[426982.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd4e20] width 1920 pitch 7680 (/4 1920)
>[426982.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cd1080]
>[426982.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cd1080] width 1920 pitch 7680 (/4 1920)
>[426982.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d0830]
>[426982.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d0830] width 1920 pitch 7680 (/4 1920)
>[426982.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[426982.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[426982.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[426982.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[426988.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ee0d0]
>[426988.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ee0d0] width 1920 pitch 7680 (/4 1920)
>[427003.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b2040]
>[427003.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b2040] width 1920 pitch 7680 (/4 1920)
>[427033.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a51fb0]
>[427033.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a51fb0] width 1920 pitch 7680 (/4 1920)
>[427153.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427153.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427183.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffc050]
>[427183.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffc050] width 1920 pitch 7680 (/4 1920)
>[427213.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b047e0]
>[427213.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b047e0] width 1920 pitch 7680 (/4 1920)
>[427228.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b047e0]
>[427228.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b047e0] width 1920 pitch 7680 (/4 1920)
>[427243.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b047e0]
>[427243.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b047e0] width 1920 pitch 7680 (/4 1920)
>[427273.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[427273.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[427303.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[427303.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[427318.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8ece0]
>[427318.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8ece0] width 1920 pitch 7680 (/4 1920)
>[427378.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7260]
>[427378.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7260] width 1920 pitch 7680 (/4 1920)
>[427393.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[427393.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[427408.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[427408.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[427423.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[427423.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[427428.579] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[427428.579] (II) RADEON(0): Using hsync ranges from config file
>[427428.579] (II) RADEON(0): Using vrefresh ranges from config file
>[427428.579] (II) RADEON(0): Printing DDC gathered Modelines:
>[427428.579] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[427428.579] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[427428.579] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[427428.579] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[427428.579] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[427428.579] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[427428.579] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[427428.579] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[427428.579] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[427428.579] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[427428.579] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[427428.579] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[427428.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90500]
>[427428.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90500] width 1920 pitch 7680 (/4 1920)
>[427434.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b93830]
>[427434.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b93830] width 1920 pitch 7680 (/4 1920)
>[427436.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8ff20]
>[427436.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8ff20] width 1920 pitch 7680 (/4 1920)
>[427436.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a90500]
>[427436.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a90500] width 1920 pitch 7680 (/4 1920)
>[427436.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427436.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427436.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427436.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427436.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427436.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427436.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427436.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427436.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427436.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427437.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f77810]
>[427437.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f77810] width 1920 pitch 7680 (/4 1920)
>[427437.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[427437.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[427438.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473b70]
>[427438.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473b70] width 1920 pitch 7680 (/4 1920)
>[427439.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03c00]
>[427439.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03c00] width 1920 pitch 7680 (/4 1920)
>[427439.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edad90]
>[427439.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edad90] width 1920 pitch 7680 (/4 1920)
>[427439.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03c00]
>[427439.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03c00] width 1920 pitch 7680 (/4 1920)
>[427439.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b03c00]
>[427439.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b03c00] width 1920 pitch 7680 (/4 1920)
>[427439.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edad90]
>[427439.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edad90] width 1920 pitch 7680 (/4 1920)
>[427439.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abf7e0]
>[427439.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abf7e0] width 1920 pitch 7680 (/4 1920)
>[427439.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6ddd0]
>[427439.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6ddd0] width 1920 pitch 7680 (/4 1920)
>[427439.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97610]
>[427439.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97610] width 1920 pitch 7680 (/4 1920)
>[427439.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859ce0]
>[427439.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859ce0] width 1920 pitch 7680 (/4 1920)
>[427439.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edad90]
>[427439.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edad90] width 1920 pitch 7680 (/4 1920)
>[427439.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb7360]
>[427439.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb7360] width 1920 pitch 7680 (/4 1920)
>[427439.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abf7e0]
>[427439.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abf7e0] width 1920 pitch 7680 (/4 1920)
>[427439.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306b3c0]
>[427439.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306b3c0] width 1920 pitch 7680 (/4 1920)
>[427439.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859ce0]
>[427439.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859ce0] width 1920 pitch 7680 (/4 1920)
>[427439.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306b3c0]
>[427439.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306b3c0] width 1920 pitch 7680 (/4 1920)
>[427439.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859ce0]
>[427439.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859ce0] width 1920 pitch 7680 (/4 1920)
>[427439.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306b3c0]
>[427439.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306b3c0] width 1920 pitch 7680 (/4 1920)
>[427439.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859ce0]
>[427439.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859ce0] width 1920 pitch 7680 (/4 1920)
>[427439.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306b3c0]
>[427439.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306b3c0] width 1920 pitch 7680 (/4 1920)
>[427439.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859ce0]
>[427439.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859ce0] width 1920 pitch 7680 (/4 1920)
>[427439.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306b3c0]
>[427439.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306b3c0] width 1920 pitch 7680 (/4 1920)
>[427439.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859ce0]
>[427440.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859ce0] width 1920 pitch 7680 (/4 1920)
>[427440.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306b3c0]
>[427440.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306b3c0] width 1920 pitch 7680 (/4 1920)
>[427448.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aefd40]
>[427448.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aefd40] width 1920 pitch 7680 (/4 1920)
>[427453.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd6ad0]
>[427453.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd6ad0] width 1920 pitch 7680 (/4 1920)
>[427486.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427486.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427486.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c875e0]
>[427486.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c875e0] width 1920 pitch 7680 (/4 1920)
>[427486.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d774b0]
>[427486.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d774b0] width 1920 pitch 7680 (/4 1920)
>[427486.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d77340]
>[427486.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d77340] width 1920 pitch 7680 (/4 1920)
>[427486.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427486.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427486.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427486.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427486.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427486.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427486.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427486.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427486.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427486.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427486.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427486.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427486.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427486.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427486.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427486.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427486.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427486.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427486.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427486.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427486.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427486.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427487.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427487.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427487.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccb570]
>[427487.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccb570] width 1920 pitch 7680 (/4 1920)
>[427487.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427487.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427487.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427487.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427487.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427487.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427487.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427487.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427487.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427487.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427487.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427487.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427487.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427487.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427487.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfc6b0]
>[427487.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfc6b0] width 1920 pitch 7680 (/4 1920)
>[427487.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427487.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427487.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427487.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427487.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427487.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427488.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b3600]
>[427488.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b3600] width 1920 pitch 7680 (/4 1920)
>[427488.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1230]
>[427488.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1230] width 1920 pitch 7680 (/4 1920)
>[427488.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f4d30]
>[427488.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f4d30] width 1920 pitch 7680 (/4 1920)
>[427508.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26720]
>[427508.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26720] width 1920 pitch 7680 (/4 1920)
>[427708.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d7280]
>[427708.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d7280] width 1920 pitch 7680 (/4 1920)
>[427738.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27e60]
>[427738.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27e60] width 1920 pitch 7680 (/4 1920)
>[427815.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d5060]
>[427815.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d5060] width 1920 pitch 7680 (/4 1920)
>[427815.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d5060]
>[427815.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d5060] width 1920 pitch 7680 (/4 1920)
>[427815.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d5060]
>[427815.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d5060] width 1920 pitch 7680 (/4 1920)
>[427815.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[427815.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[427815.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[427815.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[427815.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b940]
>[427815.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b940] width 1920 pitch 7680 (/4 1920)
>[427815.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b940]
>[427815.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b940] width 1920 pitch 7680 (/4 1920)
>[427815.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b940]
>[427815.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b940] width 1920 pitch 7680 (/4 1920)
>[427815.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427815.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427815.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b940]
>[427815.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b940] width 1920 pitch 7680 (/4 1920)
>[427816.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcfb60]
>[427816.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcfb60] width 1920 pitch 7680 (/4 1920)
>[427816.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427816.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427816.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcfb60]
>[427816.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcfb60] width 1920 pitch 7680 (/4 1920)
>[427816.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[427816.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[427816.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcfb60]
>[427816.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcfb60] width 1920 pitch 7680 (/4 1920)
>[427816.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b940]
>[427816.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b940] width 1920 pitch 7680 (/4 1920)
>[427816.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcfb60]
>[427816.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcfb60] width 1920 pitch 7680 (/4 1920)
>[427816.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b660]
>[427816.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b660] width 1920 pitch 7680 (/4 1920)
>[427816.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcfb60]
>[427816.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcfb60] width 1920 pitch 7680 (/4 1920)
>[427816.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1640]
>[427816.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1640] width 1920 pitch 7680 (/4 1920)
>[427816.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcfb60]
>[427816.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcfb60] width 1920 pitch 7680 (/4 1920)
>[427816.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427816.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427816.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48708f0]
>[427816.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48708f0] width 1920 pitch 7680 (/4 1920)
>[427816.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427816.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427816.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d1700]
>[427816.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d1700] width 1920 pitch 7680 (/4 1920)
>[427816.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2c620]
>[427816.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2c620] width 1920 pitch 7680 (/4 1920)
>[427818.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3f980]
>[427818.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3f980] width 1920 pitch 7680 (/4 1920)
>[427818.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f2d0]
>[427818.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f2d0] width 1920 pitch 7680 (/4 1920)
>[427818.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[427818.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[427818.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f2d0]
>[427818.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f2d0] width 1920 pitch 7680 (/4 1920)
>[427818.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f2d0]
>[427818.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f2d0] width 1920 pitch 7680 (/4 1920)
>[427828.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255a080]
>[427828.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255a080] width 1920 pitch 7680 (/4 1920)
>[427832.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f29ce0]
>[427832.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f29ce0] width 1920 pitch 7680 (/4 1920)
>[427832.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[427832.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[427832.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[427832.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[427832.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[427832.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[427842.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[427842.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[427842.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[427842.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[427842.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256a9f0]
>[427842.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256a9f0] width 1920 pitch 7680 (/4 1920)
>[427842.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[427842.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[427842.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256a9f0]
>[427842.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256a9f0] width 1920 pitch 7680 (/4 1920)
>[427842.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[427842.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[427842.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256a9f0]
>[427842.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256a9f0] width 1920 pitch 7680 (/4 1920)
>[427842.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[427842.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[427842.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8cdb0]
>[427842.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8cdb0] width 1920 pitch 7680 (/4 1920)
>[427842.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[427842.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[427842.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[427842.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[427843.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[427843.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[427844.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427844.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427844.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427844.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427844.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427844.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427844.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427844.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427844.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427844.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427844.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427844.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427844.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427844.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427844.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427844.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427845.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427845.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427845.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427845.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427845.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427845.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427845.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427845.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427845.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427845.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427846.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427846.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427847.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427847.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427847.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427847.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427847.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4818e40]
>[427847.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4818e40] width 1920 pitch 7680 (/4 1920)
>[427850.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[427850.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[427850.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51e87a0]
>[427850.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51e87a0] width 1920 pitch 7680 (/4 1920)
>[427850.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[427850.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[427850.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[427850.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[427850.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[427850.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[427850.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[427850.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[427850.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[427850.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[427850.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[427850.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[427851.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[427851.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[427851.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427851.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427851.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427851.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427851.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427851.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427851.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427851.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427851.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427851.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427851.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427851.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427851.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427851.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427851.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427851.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427851.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427852.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427852.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427852.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427852.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427852.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427852.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427852.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427852.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427852.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427853.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427853.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427853.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427853.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427853.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427853.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427853.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427853.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427853.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427853.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427854.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427854.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427854.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427854.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427854.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427854.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427855.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427855.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427855.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427855.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427856.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427856.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427856.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427856.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427856.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427856.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427856.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427856.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427856.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427856.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427856.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427856.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427856.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427856.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427856.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427856.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427856.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427856.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427856.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[427856.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[427856.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3907e00]
>[427856.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3907e00] width 1920 pitch 7680 (/4 1920)
>[427856.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[427856.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[427856.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[427856.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[427856.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[427856.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[427856.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[427856.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[427856.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x537a910]
>[427856.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x537a910] width 1920 pitch 7680 (/4 1920)
>[427856.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b79920]
>[427856.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b79920] width 1920 pitch 7680 (/4 1920)
>[427856.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[427856.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[427856.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[427856.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[427856.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[427856.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[427918.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[427918.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[427933.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[427933.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[427963.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[427963.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[427978.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[427978.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[428023.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[428023.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[428038.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[428038.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[428053.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[428053.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[428083.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[428083.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[428098.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[428098.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[428203.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[428203.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[428218.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[428218.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[428308.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[428308.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[428323.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[428323.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[428383.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3bf20]
>[428383.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3bf20] width 1920 pitch 7680 (/4 1920)
>[428413.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1b680]
>[428413.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1b680] width 1920 pitch 7680 (/4 1920)
>[428457.310] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[428457.310] (II) RADEON(0): Using hsync ranges from config file
>[428457.310] (II) RADEON(0): Using vrefresh ranges from config file
>[428457.310] (II) RADEON(0): Printing DDC gathered Modelines:
>[428457.310] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[428457.310] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[428457.310] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[428457.310] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[428457.310] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[428457.310] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[428457.310] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[428457.310] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[428457.310] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[428457.310] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[428457.310] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[428457.310] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[428458.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[428458.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[428547.655] (II) RADEON(0): RADEONSaveScreen(2)
>[428547.655] (II) RADEON(0): RADEONSaveScreen(0)
>[453486.293] (II) RADEON(0): RADEONSaveScreen(1)
>[453486.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453486.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453486.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453486.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453486.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453486.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453486.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453486.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453486.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453486.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453490.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453490.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453490.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453490.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453491.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453491.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453491.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453491.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453491.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453491.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453491.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453491.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453491.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453491.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[453491.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[453491.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453491.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30162a0]
>[453491.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30162a0] width 1920 pitch 7680 (/4 1920)
>[453491.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[453491.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[453492.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453492.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453492.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453492.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453492.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453493.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453493.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[453493.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[453493.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31649e0]
>[453493.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31649e0] width 1920 pitch 7680 (/4 1920)
>[453493.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9720]
>[453493.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9720] width 1920 pitch 7680 (/4 1920)
>[453493.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c4e0]
>[453493.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c4e0] width 1920 pitch 7680 (/4 1920)
>[453493.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[453493.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[453493.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453493.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453493.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62db260]
>[453493.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62db260] width 1920 pitch 7680 (/4 1920)
>[453493.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453493.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453493.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[453493.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[453493.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453493.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453493.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[453493.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[453493.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[453493.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[453493.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[453493.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[453493.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[453493.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[453493.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[453494.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[453494.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[453494.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[453494.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[453494.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[453494.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[453494.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[453494.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[453494.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[453494.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[453494.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[453494.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[453494.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[453494.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc40a0]
>[453494.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc40a0] width 1920 pitch 7680 (/4 1920)
>[453494.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01990]
>[453494.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01990] width 1920 pitch 7680 (/4 1920)
>[453494.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[453494.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[453494.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01990]
>[453494.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01990] width 1920 pitch 7680 (/4 1920)
>[453494.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[453494.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[453494.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01990]
>[453494.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01990] width 1920 pitch 7680 (/4 1920)
>[453494.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[453494.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[453494.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01990]
>[453494.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01990] width 1920 pitch 7680 (/4 1920)
>[453494.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[453494.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[453501.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[453501.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[453502.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453502.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453502.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96e20]
>[453502.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96e20] width 1920 pitch 7680 (/4 1920)
>[453502.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453502.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453502.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96e20]
>[453502.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96e20] width 1920 pitch 7680 (/4 1920)
>[453502.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453502.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453502.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96e20]
>[453502.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96e20] width 1920 pitch 7680 (/4 1920)
>[453502.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453502.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453502.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96e20]
>[453502.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96e20] width 1920 pitch 7680 (/4 1920)
>[453502.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453502.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453503.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b96e20]
>[453503.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b96e20] width 1920 pitch 7680 (/4 1920)
>[453503.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[453503.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[453503.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[453503.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[453504.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[453504.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[453505.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[453505.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[453506.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453506.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453506.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cd1080]
>[453506.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cd1080] width 1920 pitch 7680 (/4 1920)
>[453510.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25323a0]
>[453510.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25323a0] width 1920 pitch 7680 (/4 1920)
>[453510.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[453510.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[453512.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f4ed60]
>[453512.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f4ed60] width 1920 pitch 7680 (/4 1920)
>[453513.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453513.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453514.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[453514.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[453514.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453514.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453514.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[453514.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[453514.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453514.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453514.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453514.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453515.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453515.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453516.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453516.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453523.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453523.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453523.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453523.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453523.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453523.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453523.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453523.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453523.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453523.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453523.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453523.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453523.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453523.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453523.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453523.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453525.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453525.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453525.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453525.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453525.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453525.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453525.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453525.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453525.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453525.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453525.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453525.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453525.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453525.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453526.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453526.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453526.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453526.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453526.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453526.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453526.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453526.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453526.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453526.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453526.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453526.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453527.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453527.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453527.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453527.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453527.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453527.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453527.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453527.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453527.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453527.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453527.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453527.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453527.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453527.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453528.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453528.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453528.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453528.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453528.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453528.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453528.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453528.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453528.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453528.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453528.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453528.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453528.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453528.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453528.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453528.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453528.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453528.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453528.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453528.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453529.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453529.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453529.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453529.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453529.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453529.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453529.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453529.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453529.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453529.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453529.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453529.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453529.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453529.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453529.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453529.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453529.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453529.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453529.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453529.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453544.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453544.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453544.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453544.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453544.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453544.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453544.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453544.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453544.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453544.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453545.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453545.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453545.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453545.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453549.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453549.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453549.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453549.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453549.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453549.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453549.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453549.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453549.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453549.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453549.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453549.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453549.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453549.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453549.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[453549.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[453549.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[453549.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[453606.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[453606.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[453608.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471130]
>[453608.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471130] width 1920 pitch 7680 (/4 1920)
>[453616.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9f610]
>[453616.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9f610] width 1920 pitch 7680 (/4 1920)
>[453621.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[453621.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[453741.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[453741.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[453756.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[453756.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[453831.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[453831.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[453891.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[453891.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[453901.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52726d0]
>[453901.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52726d0] width 1920 pitch 7680 (/4 1920)
>[453901.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[453901.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[453901.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453901.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453901.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453901.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453901.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453901.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453901.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453901.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453901.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453901.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453901.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453901.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453901.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453901.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453901.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453901.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453901.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453901.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453902.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453902.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453902.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453902.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453902.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453902.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453902.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453902.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453902.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453902.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453903.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453903.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453904.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453904.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453906.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453906.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453907.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453907.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453907.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453907.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453908.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453908.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453909.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453909.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453909.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453909.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453909.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453909.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453909.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453909.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453910.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453910.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453910.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453910.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453910.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453910.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453911.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453911.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453911.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453911.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453912.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453913.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453913.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453913.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453913.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453913.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453913.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453913.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453913.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453913.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453913.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453913.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453913.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[453913.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[453913.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[453913.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[453913.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b50a0]
>[453913.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b50a0] width 1920 pitch 7680 (/4 1920)
>[453914.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c4e0]
>[453914.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c4e0] width 1920 pitch 7680 (/4 1920)
>[453914.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f29ce0]
>[453914.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f29ce0] width 1920 pitch 7680 (/4 1920)
>[453914.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453914.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453914.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453914.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453914.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453914.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453914.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453914.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453914.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453914.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453914.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453914.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453914.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453914.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453914.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453914.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453914.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453914.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453914.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453914.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453914.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453914.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453915.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453915.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453915.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453915.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453916.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453916.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453916.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453916.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453916.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453916.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453916.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453916.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[453916.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[453916.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453916.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453916.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453916.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453916.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453916.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453916.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453916.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453916.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453916.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453916.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd3b0]
>[453917.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd3b0] width 1920 pitch 7680 (/4 1920)
>[453917.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cee700]
>[453917.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cee700] width 1920 pitch 7680 (/4 1920)
>[453917.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453917.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471890]
>[453917.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471890] width 1920 pitch 7680 (/4 1920)
>[453917.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c300]
>[453917.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c300] width 1920 pitch 7680 (/4 1920)
>[453919.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[453919.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[453919.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[453919.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[453919.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[453919.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[453919.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12f10]
>[453919.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12f10] width 1920 pitch 7680 (/4 1920)
>[453919.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[453919.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[453919.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12f10]
>[453919.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12f10] width 1920 pitch 7680 (/4 1920)
>[453919.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[453919.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[453919.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12f10]
>[453919.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12f10] width 1920 pitch 7680 (/4 1920)
>[453919.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[453919.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[453919.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d12f10]
>[453919.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d12f10] width 1920 pitch 7680 (/4 1920)
>[453919.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c1d0]
>[453919.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c1d0] width 1920 pitch 7680 (/4 1920)
>[453919.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf71b0]
>[453919.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf71b0] width 1920 pitch 7680 (/4 1920)
>[453919.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[453919.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[453919.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf71b0]
>[453919.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf71b0] width 1920 pitch 7680 (/4 1920)
>[453919.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[453919.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[453919.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf71b0]
>[453919.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf71b0] width 1920 pitch 7680 (/4 1920)
>[453919.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[453919.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[453919.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf71b0]
>[453919.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf71b0] width 1920 pitch 7680 (/4 1920)
>[453919.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3916120]
>[453919.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3916120] width 1920 pitch 7680 (/4 1920)
>[453919.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[453919.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[453919.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d157f0]
>[453919.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d157f0] width 1920 pitch 7680 (/4 1920)
>[453919.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[453919.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[453919.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f53860]
>[453919.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f53860] width 1920 pitch 7680 (/4 1920)
>[453919.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cec520]
>[453919.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cec520] width 1920 pitch 7680 (/4 1920)
>[453921.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f260a0]
>[453921.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f260a0] width 1920 pitch 7680 (/4 1920)
>[453925.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cab270]
>[453925.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cab270] width 1920 pitch 7680 (/4 1920)
>[453939.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255bd50]
>[453939.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255bd50] width 1920 pitch 7680 (/4 1920)
>[454016.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454016.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454016.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454016.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454016.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454016.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454016.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454016.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454016.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454016.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454016.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454016.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454016.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454016.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454016.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454016.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454016.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454016.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454016.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454016.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454016.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454016.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454016.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454017.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454017.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454017.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454017.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5038da0]
>[454017.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5038da0] width 1920 pitch 7680 (/4 1920)
>[454017.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[454017.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[454017.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454017.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454017.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454017.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454017.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454018.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d655f0]
>[454018.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d655f0] width 1920 pitch 7680 (/4 1920)
>[454018.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca00]
>[454018.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca00] width 1920 pitch 7680 (/4 1920)
>[454020.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5370da0]
>[454020.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5370da0] width 1920 pitch 7680 (/4 1920)
>[454020.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc6ce0]
>[454020.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc6ce0] width 1920 pitch 7680 (/4 1920)
>[454020.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc6ce0]
>[454020.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc6ce0] width 1920 pitch 7680 (/4 1920)
>[454020.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc6ce0]
>[454020.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc6ce0] width 1920 pitch 7680 (/4 1920)
>[454020.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc6ce0]
>[454020.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc6ce0] width 1920 pitch 7680 (/4 1920)
>[454020.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc6ce0]
>[454020.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc6ce0] width 1920 pitch 7680 (/4 1920)
>[454020.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24725f0]
>[454020.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24725f0] width 1920 pitch 7680 (/4 1920)
>[454020.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5370da0]
>[454020.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5370da0] width 1920 pitch 7680 (/4 1920)
>[454020.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5370da0]
>[454020.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5370da0] width 1920 pitch 7680 (/4 1920)
>[454020.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5370da0]
>[454020.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5370da0] width 1920 pitch 7680 (/4 1920)
>[454020.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248e960]
>[454020.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248e960] width 1920 pitch 7680 (/4 1920)
>[454020.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5370da0]
>[454020.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5370da0] width 1920 pitch 7680 (/4 1920)
>[454056.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7a70]
>[454056.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7a70] width 1920 pitch 7680 (/4 1920)
>[454065.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7a70]
>[454065.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7a70] width 1920 pitch 7680 (/4 1920)
>[454065.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbd40]
>[454065.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbd40] width 1920 pitch 7680 (/4 1920)
>[454065.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5177e50]
>[454065.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5177e50] width 1920 pitch 7680 (/4 1920)
>[454065.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255bd50]
>[454065.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255bd50] width 1920 pitch 7680 (/4 1920)
>[454065.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5177e50]
>[454065.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5177e50] width 1920 pitch 7680 (/4 1920)
>[454065.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255bd50]
>[454065.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255bd50] width 1920 pitch 7680 (/4 1920)
>[454065.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5177e50]
>[454065.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5177e50] width 1920 pitch 7680 (/4 1920)
>[454065.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[454065.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[454065.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5177e50]
>[454065.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5177e50] width 1920 pitch 7680 (/4 1920)
>[454065.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[454065.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[454065.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5177e50]
>[454065.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5177e50] width 1920 pitch 7680 (/4 1920)
>[454065.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[454065.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[454065.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5177e50]
>[454066.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5177e50] width 1920 pitch 7680 (/4 1920)
>[454066.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[454066.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[454066.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc6ce0]
>[454066.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc6ce0] width 1920 pitch 7680 (/4 1920)
>[454071.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[454071.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[454191.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d50a0]
>[454191.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d50a0] width 1920 pitch 7680 (/4 1920)
>[454206.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c36d0]
>[454206.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c36d0] width 1920 pitch 7680 (/4 1920)
>[454236.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5720]
>[454236.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5720] width 1920 pitch 7680 (/4 1920)
>[454251.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd0200]
>[454251.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd0200] width 1920 pitch 7680 (/4 1920)
>[454281.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[454281.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[454296.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[454296.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[454521.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7c040]
>[454521.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7c040] width 1920 pitch 7680 (/4 1920)
>[454566.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24728f0]
>[454566.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24728f0] width 1920 pitch 7680 (/4 1920)
>[454701.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b56c90]
>[454701.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b56c90] width 1920 pitch 7680 (/4 1920)
>[454716.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d54810]
>[454716.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d54810] width 1920 pitch 7680 (/4 1920)
>[454791.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7c040]
>[454791.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7c040] width 1920 pitch 7680 (/4 1920)
>[454806.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c650]
>[454806.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c650] width 1920 pitch 7680 (/4 1920)
>[454942.012] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[454942.012] (II) RADEON(0): Using hsync ranges from config file
>[454942.012] (II) RADEON(0): Using vrefresh ranges from config file
>[454942.012] (II) RADEON(0): Printing DDC gathered Modelines:
>[454942.012] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[454942.012] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[454942.012] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[454942.012] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[454942.012] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[454942.012] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[454942.012] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[454942.012] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[454942.012] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[454942.012] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[454942.012] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[454942.012] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[455032.663] (II) RADEON(0): RADEONSaveScreen(2)
>[455032.663] (II) RADEON(0): RADEONSaveScreen(0)
>[460329.993] (II) RADEON(0): RADEONSaveScreen(1)
>[460330.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4004b70]
>[460330.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4004b70] width 1920 pitch 7680 (/4 1920)
>[460375.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24726d0]
>[460375.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24726d0] width 1920 pitch 7680 (/4 1920)
>[460390.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d50a0]
>[460390.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d50a0] width 1920 pitch 7680 (/4 1920)
>[460435.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0e60]
>[460435.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0e60] width 1920 pitch 7680 (/4 1920)
>[460450.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fda980]
>[460450.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fda980] width 1920 pitch 7680 (/4 1920)
>[460510.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf71b0]
>[460510.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf71b0] width 1920 pitch 7680 (/4 1920)
>[460525.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[460525.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[460630.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d50a0]
>[460630.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d50a0] width 1920 pitch 7680 (/4 1920)
>[460660.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487570]
>[460660.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487570] width 1920 pitch 7680 (/4 1920)
>[460735.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf71b0]
>[460735.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf71b0] width 1920 pitch 7680 (/4 1920)
>[460765.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2487570]
>[460765.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2487570] width 1920 pitch 7680 (/4 1920)
>[460825.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24fb6c0]
>[460825.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24fb6c0] width 1920 pitch 7680 (/4 1920)
>[460840.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d08290]
>[460840.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d08290] width 1920 pitch 7680 (/4 1920)
>[460870.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7c040]
>[460870.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7c040] width 1920 pitch 7680 (/4 1920)
>[460885.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[460885.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[460930.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d08290]
>[460930.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d08290] width 1920 pitch 7680 (/4 1920)
>[460960.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7c040]
>[460960.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7c040] width 1920 pitch 7680 (/4 1920)
>[460962.113] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[460962.113] (II) RADEON(0): Using hsync ranges from config file
>[460962.113] (II) RADEON(0): Using vrefresh ranges from config file
>[460962.113] (II) RADEON(0): Printing DDC gathered Modelines:
>[460962.113] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[460962.113] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[460962.113] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[460962.113] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[460962.113] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[460962.113] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[460962.113] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[460962.113] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[460962.113] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[460962.113] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[460962.113] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[460962.113] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[461052.663] (II) RADEON(0): RADEONSaveScreen(2)
>[461052.663] (II) RADEON(0): RADEONSaveScreen(0)
>[461786.685] (II) RADEON(0): RADEONSaveScreen(1)
>[461786.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0e60]
>[461787.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0e60] width 1920 pitch 7680 (/4 1920)
>[461802.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d51a0]
>[461802.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d51a0] width 1920 pitch 7680 (/4 1920)
>[461877.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5720]
>[461877.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5720] width 1920 pitch 7680 (/4 1920)
>[461892.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6b630]
>[461892.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6b630] width 1920 pitch 7680 (/4 1920)
>[461907.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10130]
>[461907.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10130] width 1920 pitch 7680 (/4 1920)
>[461922.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d50a0]
>[461922.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d50a0] width 1920 pitch 7680 (/4 1920)
>[461937.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebe650]
>[461937.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebe650] width 1920 pitch 7680 (/4 1920)
>[461997.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10130]
>[461997.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10130] width 1920 pitch 7680 (/4 1920)
>[462027.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebe650]
>[462027.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebe650] width 1920 pitch 7680 (/4 1920)
>[462072.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f2d0]
>[462072.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f2d0] width 1920 pitch 7680 (/4 1920)
>[462087.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10130]
>[462087.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10130] width 1920 pitch 7680 (/4 1920)
>[462102.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d50a0]
>[462102.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d50a0] width 1920 pitch 7680 (/4 1920)
>[462117.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebe650]
>[462117.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebe650] width 1920 pitch 7680 (/4 1920)
>[462162.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7f2d0]
>[462162.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7f2d0] width 1920 pitch 7680 (/4 1920)
>[462177.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[462177.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[462222.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[462222.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[462237.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[462237.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[462252.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[462252.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[462267.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[462267.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[462282.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[462282.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[462312.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[462312.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[462327.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[462327.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[462342.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d21340]
>[462342.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d21340] width 1920 pitch 7680 (/4 1920)
>[462357.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa60c0]
>[462357.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa60c0] width 1920 pitch 7680 (/4 1920)
>[462387.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f70]
>[462387.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f70] width 1920 pitch 7680 (/4 1920)
>[462417.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[462417.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[462432.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[462432.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[462447.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f70]
>[462447.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f70] width 1920 pitch 7680 (/4 1920)
>[462462.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebe650]
>[462462.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebe650] width 1920 pitch 7680 (/4 1920)
>[462477.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[462477.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[462492.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e5720]
>[462492.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e5720] width 1920 pitch 7680 (/4 1920)
>[462507.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24728f0]
>[462507.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24728f0] width 1920 pitch 7680 (/4 1920)
>[462522.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fda980]
>[462522.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fda980] width 1920 pitch 7680 (/4 1920)
>[462537.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac0e60]
>[462537.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac0e60] width 1920 pitch 7680 (/4 1920)
>[462567.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24728f0]
>[462567.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24728f0] width 1920 pitch 7680 (/4 1920)
>[462582.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d50a0]
>[462582.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d50a0] width 1920 pitch 7680 (/4 1920)
>[462597.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[462597.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[462612.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f70]
>[462612.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f70] width 1920 pitch 7680 (/4 1920)
>[462627.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1bff0]
>[462627.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1bff0] width 1920 pitch 7680 (/4 1920)
>[462642.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[462642.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[462657.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471f70]
>[462657.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471f70] width 1920 pitch 7680 (/4 1920)
>[462671.615] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[462671.615] (II) RADEON(0): Using hsync ranges from config file
>[462671.615] (II) RADEON(0): Using vrefresh ranges from config file
>[462671.615] (II) RADEON(0): Printing DDC gathered Modelines:
>[462671.615] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[462671.615] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[462671.615] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[462671.615] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[462671.615] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[462671.615] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[462671.615] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[462671.615] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[462671.615] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[462671.615] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[462671.615] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[462671.615] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[462672.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3068110]
>[462672.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3068110] width 1920 pitch 7680 (/4 1920)
>[462761.673] (II) RADEON(0): RADEONSaveScreen(2)
>[462761.673] (II) RADEON(0): RADEONSaveScreen(0)
>[486703.811] (II) RADEON(0): RADEONSaveScreen(1)
>[486705.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24728f0]
>[486705.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24728f0] width 1920 pitch 7680 (/4 1920)
>[486764.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c36d0]
>[486764.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c36d0] width 1920 pitch 7680 (/4 1920)
>[486794.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5272f40]
>[486794.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5272f40] width 1920 pitch 7680 (/4 1920)
>[486839.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5f040]
>[486839.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5f040] width 1920 pitch 7680 (/4 1920)
>[486854.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b5af0]
>[486854.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b5af0] width 1920 pitch 7680 (/4 1920)
>[486869.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4885200]
>[486869.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4885200] width 1920 pitch 7680 (/4 1920)
>[486884.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2d7b0]
>[486884.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2d7b0] width 1920 pitch 7680 (/4 1920)
>[486929.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51409c0]
>[486929.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51409c0] width 1920 pitch 7680 (/4 1920)
>[486959.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f6170]
>[486959.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f6170] width 1920 pitch 7680 (/4 1920)
>[486989.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb9db0]
>[486989.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb9db0] width 1920 pitch 7680 (/4 1920)
>[487004.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c36d0]
>[487004.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c36d0] width 1920 pitch 7680 (/4 1920)
>[487019.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f2b10]
>[487019.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f2b10] width 1920 pitch 7680 (/4 1920)
>[487034.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314b570]
>[487034.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314b570] width 1920 pitch 7680 (/4 1920)
>[487139.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5015f10]
>[487139.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5015f10] width 1920 pitch 7680 (/4 1920)
>[487169.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bdb0f0]
>[487169.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bdb0f0] width 1920 pitch 7680 (/4 1920)
>[487334.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501e860]
>[487334.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501e860] width 1920 pitch 7680 (/4 1920)
>[487349.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbd4f0]
>[487349.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbd4f0] width 1920 pitch 7680 (/4 1920)
>[487469.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c459e0]
>[487469.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c459e0] width 1920 pitch 7680 (/4 1920)
>[487484.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d3e0]
>[487484.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d3e0] width 1920 pitch 7680 (/4 1920)
>[487514.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503bbc0]
>[487514.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503bbc0] width 1920 pitch 7680 (/4 1920)
>[487529.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503bbc0]
>[487529.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503bbc0] width 1920 pitch 7680 (/4 1920)
>[487589.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b9fa70]
>[487589.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b9fa70] width 1920 pitch 7680 (/4 1920)
>[487604.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec630]
>[487604.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec630] width 1920 pitch 7680 (/4 1920)
>[487619.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[487619.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[487664.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a380]
>[487664.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a380] width 1920 pitch 7680 (/4 1920)
>[487679.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4d0f0]
>[487679.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4d0f0] width 1920 pitch 7680 (/4 1920)
>[487754.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc0330]
>[487754.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc0330] width 1920 pitch 7680 (/4 1920)
>[487769.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70730]
>[487769.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70730] width 1920 pitch 7680 (/4 1920)
>[487784.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0aab0]
>[487784.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0aab0] width 1920 pitch 7680 (/4 1920)
>[487799.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b4bd0]
>[487799.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b4bd0] width 1920 pitch 7680 (/4 1920)
>[487814.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5b600]
>[487814.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5b600] width 1920 pitch 7680 (/4 1920)
>[487829.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481f8d0]
>[487829.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481f8d0] width 1920 pitch 7680 (/4 1920)
>[487934.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48373d0]
>[487934.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48373d0] width 1920 pitch 7680 (/4 1920)
>[487964.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503baa0]
>[487964.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503baa0] width 1920 pitch 7680 (/4 1920)
>[487979.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48373d0]
>[487979.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48373d0] width 1920 pitch 7680 (/4 1920)
>[487994.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503baa0]
>[487994.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503baa0] width 1920 pitch 7680 (/4 1920)
>[488084.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48373d0]
>[488084.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48373d0] width 1920 pitch 7680 (/4 1920)
>[488114.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503baa0]
>[488114.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503baa0] width 1920 pitch 7680 (/4 1920)
>[488234.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48373d0]
>[488234.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48373d0] width 1920 pitch 7680 (/4 1920)
>[488249.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503baa0]
>[488249.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503baa0] width 1920 pitch 7680 (/4 1920)
>[488519.299] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[488519.299] (II) RADEON(0): Using hsync ranges from config file
>[488519.299] (II) RADEON(0): Using vrefresh ranges from config file
>[488519.299] (II) RADEON(0): Printing DDC gathered Modelines:
>[488519.299] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[488519.299] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[488519.299] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[488519.299] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[488519.299] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[488519.299] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[488519.299] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[488519.299] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[488519.299] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[488519.299] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[488519.299] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[488519.299] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[488609.670] (II) RADEON(0): RADEONSaveScreen(2)
>[488609.670] (II) RADEON(0): RADEONSaveScreen(0)
>[493206.553] (II) RADEON(0): RADEONSaveScreen(1)
>[493206.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87460]
>[493206.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87460] width 1920 pitch 7680 (/4 1920)
>[493221.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3036320]
>[493221.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3036320] width 1920 pitch 7680 (/4 1920)
>[493251.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1f300]
>[493251.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1f300] width 1920 pitch 7680 (/4 1920)
>[493266.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5c20]
>[493266.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5c20] width 1920 pitch 7680 (/4 1920)
>[493326.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5017cc0]
>[493326.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5017cc0] width 1920 pitch 7680 (/4 1920)
>[493341.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489aaf0]
>[493341.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489aaf0] width 1920 pitch 7680 (/4 1920)
>[493386.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30648c0]
>[493386.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30648c0] width 1920 pitch 7680 (/4 1920)
>[493416.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d3e0]
>[493416.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d3e0] width 1920 pitch 7680 (/4 1920)
>[493489.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7a080]
>[493489.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7a080] width 1920 pitch 7680 (/4 1920)
>[493489.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7200]
>[493489.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7200] width 1920 pitch 7680 (/4 1920)
>[493489.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[493489.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[493489.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505510]
>[493489.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505510] width 1920 pitch 7680 (/4 1920)
>[493489.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[493489.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[493489.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505510]
>[493489.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505510] width 1920 pitch 7680 (/4 1920)
>[493489.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[493489.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[493489.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505510]
>[493489.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505510] width 1920 pitch 7680 (/4 1920)
>[493489.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[493489.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[493489.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505510]
>[493489.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505510] width 1920 pitch 7680 (/4 1920)
>[493489.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[493489.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[493489.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505510]
>[493489.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505510] width 1920 pitch 7680 (/4 1920)
>[493489.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1a6c0]
>[493489.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1a6c0] width 1920 pitch 7680 (/4 1920)
>[493490.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2505510]
>[493490.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2505510] width 1920 pitch 7680 (/4 1920)
>[493594.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[493594.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[493594.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1990]
>[493594.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1990] width 1920 pitch 7680 (/4 1920)
>[493594.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[493594.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[493594.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1990]
>[493594.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1990] width 1920 pitch 7680 (/4 1920)
>[493594.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[493594.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[493594.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1990]
>[493594.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1990] width 1920 pitch 7680 (/4 1920)
>[493594.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[493594.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[493594.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1990]
>[493594.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1990] width 1920 pitch 7680 (/4 1920)
>[493594.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[493594.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[493594.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1990]
>[493594.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1990] width 1920 pitch 7680 (/4 1920)
>[493594.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[493594.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[493594.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de1990]
>[493594.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de1990] width 1920 pitch 7680 (/4 1920)
>[493595.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0de60]
>[493595.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0de60] width 1920 pitch 7680 (/4 1920)
>[493596.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31615b0]
>[493596.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31615b0] width 1920 pitch 7680 (/4 1920)
>[493598.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5017450]
>[493598.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5017450] width 1920 pitch 7680 (/4 1920)
>[493598.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a24570]
>[493598.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a24570] width 1920 pitch 7680 (/4 1920)
>[493599.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a24570]
>[493599.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a24570] width 1920 pitch 7680 (/4 1920)
>[493599.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a23ff0]
>[493599.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a23ff0] width 1920 pitch 7680 (/4 1920)
>[493599.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493599.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493599.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a23ff0]
>[493599.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a23ff0] width 1920 pitch 7680 (/4 1920)
>[493599.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493599.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493599.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493599.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493599.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493599.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493599.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493599.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493599.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493599.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493599.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493599.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493599.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493599.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493599.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493599.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493599.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493599.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493600.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493600.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493600.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493600.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493600.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493600.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cb30]
>[493600.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cb30] width 1920 pitch 7680 (/4 1920)
>[493600.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493600.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493601.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493601.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493601.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493601.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493601.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493601.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493601.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493601.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493601.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493601.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493601.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493601.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493601.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493601.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493601.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493601.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493601.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493601.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493601.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493601.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493601.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493601.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493602.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493602.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493602.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493602.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493602.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493602.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493602.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493602.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493602.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[493602.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[493603.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da0280]
>[493603.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da0280] width 1920 pitch 7680 (/4 1920)
>[493603.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[493603.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[493603.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dac30]
>[493603.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dac30] width 1920 pitch 7680 (/4 1920)
>[493603.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[493603.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[493603.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dac30]
>[493603.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dac30] width 1920 pitch 7680 (/4 1920)
>[493603.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff6510]
>[493603.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff6510] width 1920 pitch 7680 (/4 1920)
>[493603.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dac30]
>[493603.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dac30] width 1920 pitch 7680 (/4 1920)
>[493603.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c7c940]
>[493603.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c7c940] width 1920 pitch 7680 (/4 1920)
>[493626.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fb5a0]
>[493626.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fb5a0] width 1920 pitch 7680 (/4 1920)
>[493701.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc0e00]
>[493701.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc0e00] width 1920 pitch 7680 (/4 1920)
>[493716.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc0e00]
>[493716.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc0e00] width 1920 pitch 7680 (/4 1920)
>[493761.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27f00]
>[493761.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27f00] width 1920 pitch 7680 (/4 1920)
>[493776.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2473300]
>[493776.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2473300] width 1920 pitch 7680 (/4 1920)
>[493926.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b1e0]
>[493926.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b1e0] width 1920 pitch 7680 (/4 1920)
>[493941.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f8a0]
>[493941.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f8a0] width 1920 pitch 7680 (/4 1920)
>[493971.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48763f0]
>[493971.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48763f0] width 1920 pitch 7680 (/4 1920)
>[493986.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b4a0]
>[493986.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b4a0] width 1920 pitch 7680 (/4 1920)
>[494016.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f08e0]
>[494016.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f08e0] width 1920 pitch 7680 (/4 1920)
>[494031.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869d50]
>[494031.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869d50] width 1920 pitch 7680 (/4 1920)
>[494112.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e3f10]
>[494112.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e3f10] width 1920 pitch 7680 (/4 1920)
>[494112.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94270]
>[494112.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94270] width 1920 pitch 7680 (/4 1920)
>[494112.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda700]
>[494112.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda700] width 1920 pitch 7680 (/4 1920)
>[494112.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c904f0]
>[494112.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c904f0] width 1920 pitch 7680 (/4 1920)
>[494112.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fefe0]
>[494112.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fefe0] width 1920 pitch 7680 (/4 1920)
>[494112.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481cab0]
>[494112.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481cab0] width 1920 pitch 7680 (/4 1920)
>[494112.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[494112.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[494112.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dac30]
>[494112.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dac30] width 1920 pitch 7680 (/4 1920)
>[494112.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248ee70]
>[494112.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248ee70] width 1920 pitch 7680 (/4 1920)
>[494112.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01810]
>[494112.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01810] width 1920 pitch 7680 (/4 1920)
>[494112.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11f00]
>[494112.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11f00] width 1920 pitch 7680 (/4 1920)
>[494112.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01810]
>[494112.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01810] width 1920 pitch 7680 (/4 1920)
>[494112.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11f00]
>[494112.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11f00] width 1920 pitch 7680 (/4 1920)
>[494112.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01810]
>[494112.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01810] width 1920 pitch 7680 (/4 1920)
>[494112.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11f00]
>[494112.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11f00] width 1920 pitch 7680 (/4 1920)
>[494112.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01810]
>[494112.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01810] width 1920 pitch 7680 (/4 1920)
>[494112.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11f00]
>[494112.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11f00] width 1920 pitch 7680 (/4 1920)
>[494112.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01810]
>[494112.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01810] width 1920 pitch 7680 (/4 1920)
>[494112.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11f00]
>[494112.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11f00] width 1920 pitch 7680 (/4 1920)
>[494112.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01810]
>[494112.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01810] width 1920 pitch 7680 (/4 1920)
>[494112.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4885330]
>[494112.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4885330] width 1920 pitch 7680 (/4 1920)
>[494113.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[494113.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[494113.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa3ef0]
>[494113.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa3ef0] width 1920 pitch 7680 (/4 1920)
>[494113.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94840]
>[494113.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94840] width 1920 pitch 7680 (/4 1920)
>[494113.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945470]
>[494113.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945470] width 1920 pitch 7680 (/4 1920)
>[494113.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830cb0]
>[494113.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830cb0] width 1920 pitch 7680 (/4 1920)
>[494113.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4833d10]
>[494113.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4833d10] width 1920 pitch 7680 (/4 1920)
>[494113.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1900]
>[494113.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1900] width 1920 pitch 7680 (/4 1920)
>[494113.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24781f0]
>[494113.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24781f0] width 1920 pitch 7680 (/4 1920)
>[494113.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbedf0]
>[494113.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbedf0] width 1920 pitch 7680 (/4 1920)
>[494113.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b91510]
>[494113.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b91510] width 1920 pitch 7680 (/4 1920)
>[494113.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944320]
>[494113.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944320] width 1920 pitch 7680 (/4 1920)
>[494113.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522c270]
>[494113.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522c270] width 1920 pitch 7680 (/4 1920)
>[494113.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016710]
>[494113.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016710] width 1920 pitch 7680 (/4 1920)
>[494113.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f19f30]
>[494113.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f19f30] width 1920 pitch 7680 (/4 1920)
>[494113.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfe30]
>[494113.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfe30] width 1920 pitch 7680 (/4 1920)
>[494113.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[494113.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[494113.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[494113.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[494113.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482e730]
>[494113.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482e730] width 1920 pitch 7680 (/4 1920)
>[494113.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f58c10]
>[494113.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f58c10] width 1920 pitch 7680 (/4 1920)
>[494113.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de320]
>[494113.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de320] width 1920 pitch 7680 (/4 1920)
>[494113.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[494113.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[494113.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501ea10]
>[494113.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501ea10] width 1920 pitch 7680 (/4 1920)
>[494113.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff06b0]
>[494113.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff06b0] width 1920 pitch 7680 (/4 1920)
>[494113.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfebe0]
>[494113.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfebe0] width 1920 pitch 7680 (/4 1920)
>[494286.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503a620]
>[494286.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503a620] width 1920 pitch 7680 (/4 1920)
>[494301.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[494301.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[494496.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[494496.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[494511.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab5a90]
>[494511.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab5a90] width 1920 pitch 7680 (/4 1920)
>[494556.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fea0]
>[494556.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fea0] width 1920 pitch 7680 (/4 1920)
>[494571.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[494571.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[494601.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503a620]
>[494601.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503a620] width 1920 pitch 7680 (/4 1920)
>[494616.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[494616.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[494721.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b060]
>[494721.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b060] width 1920 pitch 7680 (/4 1920)
>[494736.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503a620]
>[494736.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503a620] width 1920 pitch 7680 (/4 1920)
>[494781.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3fea0]
>[494781.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3fea0] width 1920 pitch 7680 (/4 1920)
>[494792.770] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[494792.770] (II) RADEON(0): Using hsync ranges from config file
>[494792.770] (II) RADEON(0): Using vrefresh ranges from config file
>[494792.770] (II) RADEON(0): Printing DDC gathered Modelines:
>[494792.770] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[494792.770] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[494792.770] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[494792.770] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[494792.770] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[494792.770] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[494792.770] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[494792.770] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[494792.770] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[494792.770] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[494792.770] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[494792.770] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[494796.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[494796.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[494882.669] (II) RADEON(0): RADEONSaveScreen(2)
>[494882.669] (II) RADEON(0): RADEONSaveScreen(0)
>[499101.940] (II) RADEON(0): RADEONSaveScreen(1)
>[499102.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40353e0]
>[499102.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40353e0] width 1920 pitch 7680 (/4 1920)
>[499117.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[499117.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[499132.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[499132.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[499147.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[499147.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[499162.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[499162.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[499207.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40353e0]
>[499207.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40353e0] width 1920 pitch 7680 (/4 1920)
>[499222.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536cca0]
>[499222.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536cca0] width 1920 pitch 7680 (/4 1920)
>[499282.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40353e0]
>[499282.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40353e0] width 1920 pitch 7680 (/4 1920)
>[499312.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886070]
>[499312.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886070] width 1920 pitch 7680 (/4 1920)
>[499387.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[499387.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[499402.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[499402.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[499432.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b060]
>[499432.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b060] width 1920 pitch 7680 (/4 1920)
>[499447.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[499447.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[499462.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b060]
>[499462.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b060] width 1920 pitch 7680 (/4 1920)
>[499477.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[499477.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[499627.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b060]
>[499627.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b060] width 1920 pitch 7680 (/4 1920)
>[499642.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[499642.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[499792.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471950]
>[499792.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471950] width 1920 pitch 7680 (/4 1920)
>[499807.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886070]
>[499807.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886070] width 1920 pitch 7680 (/4 1920)
>[499852.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[499852.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[499867.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[499867.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[499882.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ad00]
>[499882.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ad00] width 1920 pitch 7680 (/4 1920)
>[499897.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[499897.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[499927.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[499927.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[499942.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b060]
>[499942.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b060] width 1920 pitch 7680 (/4 1920)
>[500077.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[500077.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[500092.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536cca0]
>[500092.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536cca0] width 1920 pitch 7680 (/4 1920)
>[500152.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4cc90]
>[500152.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4cc90] width 1920 pitch 7680 (/4 1920)
>[500167.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536cca0]
>[500167.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536cca0] width 1920 pitch 7680 (/4 1920)
>[500240.930] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[500240.930] (II) RADEON(0): Using hsync ranges from config file
>[500240.930] (II) RADEON(0): Using vrefresh ranges from config file
>[500240.930] (II) RADEON(0): Printing DDC gathered Modelines:
>[500240.930] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[500240.930] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[500240.930] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[500240.931] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[500240.931] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[500240.931] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[500240.931] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[500240.931] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[500240.931] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[500240.931] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[500240.931] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[500240.931] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[500242.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d118a0]
>[500242.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d118a0] width 1920 pitch 7680 (/4 1920)
>[500330.668] (II) RADEON(0): RADEONSaveScreen(2)
>[500330.668] (II) RADEON(0): RADEONSaveScreen(0)
>[502309.395] (II) RADEON(0): RADEONSaveScreen(1)
>[502309.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[502309.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[502318.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5029710]
>[502318.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5029710] width 1920 pitch 7680 (/4 1920)
>[502318.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502318.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502318.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5029710]
>[502318.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5029710] width 1920 pitch 7680 (/4 1920)
>[502318.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502318.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502318.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[502318.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[502318.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d118a0]
>[502318.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d118a0] width 1920 pitch 7680 (/4 1920)
>[502318.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6cdc0]
>[502318.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6cdc0] width 1920 pitch 7680 (/4 1920)
>[502318.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502318.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502318.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6e0d0]
>[502318.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6e0d0] width 1920 pitch 7680 (/4 1920)
>[502319.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c820]
>[502319.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c820] width 1920 pitch 7680 (/4 1920)
>[502319.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[502319.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[502319.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c820]
>[502319.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c820] width 1920 pitch 7680 (/4 1920)
>[502319.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6cdc0]
>[502319.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6cdc0] width 1920 pitch 7680 (/4 1920)
>[502324.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502324.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502324.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502324.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502324.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6cdc0]
>[502324.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6cdc0] width 1920 pitch 7680 (/4 1920)
>[502324.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502324.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502324.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6cdc0]
>[502324.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6cdc0] width 1920 pitch 7680 (/4 1920)
>[502324.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502324.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502324.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6cdc0]
>[502324.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6cdc0] width 1920 pitch 7680 (/4 1920)
>[502324.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502324.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502324.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6cdc0]
>[502324.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6cdc0] width 1920 pitch 7680 (/4 1920)
>[502324.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b7370]
>[502324.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b7370] width 1920 pitch 7680 (/4 1920)
>[502339.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d5d2b0]
>[502339.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d5d2b0] width 1920 pitch 7680 (/4 1920)
>[502369.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c00]
>[502369.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c00] width 1920 pitch 7680 (/4 1920)
>[502399.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c00]
>[502399.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c00] width 1920 pitch 7680 (/4 1920)
>[502402.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77b70]
>[502402.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77b70] width 1920 pitch 7680 (/4 1920)
>[502410.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[502410.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[502410.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5029710]
>[502410.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5029710] width 1920 pitch 7680 (/4 1920)
>[502410.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[502410.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[502410.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502410.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502410.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[502410.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[502410.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502410.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502410.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[502410.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[502410.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502410.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502410.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[502411.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[502411.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502411.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502411.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502411.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502411.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502411.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502411.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502411.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502411.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502411.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502412.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf70e0]
>[502412.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf70e0] width 1920 pitch 7680 (/4 1920)
>[502413.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[502413.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[502413.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[502413.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[502413.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[502413.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[502414.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502414.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502414.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502414.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502415.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[502415.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[502415.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502415.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502415.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77b70]
>[502415.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77b70] width 1920 pitch 7680 (/4 1920)
>[502415.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502415.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502415.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77b70]
>[502415.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77b70] width 1920 pitch 7680 (/4 1920)
>[502415.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502415.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502415.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b77b70]
>[502415.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b77b70] width 1920 pitch 7680 (/4 1920)
>[502415.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[502415.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[502415.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff470]
>[502415.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff470] width 1920 pitch 7680 (/4 1920)
>[502415.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[502415.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[502415.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[502415.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[502415.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[502416.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[502416.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[502416.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[502416.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[502416.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[502416.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40f00]
>[502416.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40f00] width 1920 pitch 7680 (/4 1920)
>[502416.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[502416.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[502416.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40f00]
>[502416.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40f00] width 1920 pitch 7680 (/4 1920)
>[502416.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab570]
>[502416.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab570] width 1920 pitch 7680 (/4 1920)
>[502416.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40f00]
>[502416.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40f00] width 1920 pitch 7680 (/4 1920)
>[502416.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502416.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502416.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502416.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502416.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502416.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502416.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502416.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502416.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502416.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502416.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502416.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502416.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502417.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbf480]
>[502417.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbf480] width 1920 pitch 7680 (/4 1920)
>[502417.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbf480]
>[502417.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbf480] width 1920 pitch 7680 (/4 1920)
>[502417.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbf480]
>[502417.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbf480] width 1920 pitch 7680 (/4 1920)
>[502417.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbf480]
>[502417.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbf480] width 1920 pitch 7680 (/4 1920)
>[502417.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502417.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502417.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d68db0]
>[502417.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d68db0] width 1920 pitch 7680 (/4 1920)
>[502417.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502418.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502418.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f76500]
>[502418.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f76500] width 1920 pitch 7680 (/4 1920)
>[502418.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7a70]
>[502418.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7a70] width 1920 pitch 7680 (/4 1920)
>[502429.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c60e50]
>[502429.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c60e50] width 1920 pitch 7680 (/4 1920)
>[502435.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502435.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502435.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c80d50]
>[502435.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c80d50] width 1920 pitch 7680 (/4 1920)
>[502435.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502435.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502435.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482be20]
>[502435.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482be20] width 1920 pitch 7680 (/4 1920)
>[502435.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502435.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502435.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2d450]
>[502435.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2d450] width 1920 pitch 7680 (/4 1920)
>[502435.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502435.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502435.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2d450]
>[502435.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2d450] width 1920 pitch 7680 (/4 1920)
>[502435.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557340]
>[502435.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557340] width 1920 pitch 7680 (/4 1920)
>[502435.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502435.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502435.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb430]
>[502435.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb430] width 1920 pitch 7680 (/4 1920)
>[502436.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502436.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb430]
>[502436.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb430] width 1920 pitch 7680 (/4 1920)
>[502436.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502436.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502436.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb430]
>[502436.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb430] width 1920 pitch 7680 (/4 1920)
>[502436.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502436.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8af00]
>[502436.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8af00] width 1920 pitch 7680 (/4 1920)
>[502436.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502436.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8af00]
>[502436.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8af00] width 1920 pitch 7680 (/4 1920)
>[502436.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502436.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb430]
>[502436.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb430] width 1920 pitch 7680 (/4 1920)
>[502436.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda320]
>[502436.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda320] width 1920 pitch 7680 (/4 1920)
>[502444.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12bd0]
>[502444.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12bd0] width 1920 pitch 7680 (/4 1920)
>[502489.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fc270]
>[502489.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fc270] width 1920 pitch 7680 (/4 1920)
>[502504.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60460]
>[502504.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60460] width 1920 pitch 7680 (/4 1920)
>[502517.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60460]
>[502517.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60460] width 1920 pitch 7680 (/4 1920)
>[502517.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dc140]
>[502517.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dc140] width 1920 pitch 7680 (/4 1920)
>[502517.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485e000]
>[502517.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485e000] width 1920 pitch 7680 (/4 1920)
>[502517.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22f90]
>[502517.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22f90] width 1920 pitch 7680 (/4 1920)
>[502517.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485e000]
>[502517.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485e000] width 1920 pitch 7680 (/4 1920)
>[502517.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22f90]
>[502517.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22f90] width 1920 pitch 7680 (/4 1920)
>[502517.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ed10]
>[502517.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ed10] width 1920 pitch 7680 (/4 1920)
>[502517.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eda0]
>[502517.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eda0] width 1920 pitch 7680 (/4 1920)
>[502517.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ed10]
>[502517.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ed10] width 1920 pitch 7680 (/4 1920)
>[502517.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eda0]
>[502517.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eda0] width 1920 pitch 7680 (/4 1920)
>[502517.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ed10]
>[502517.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ed10] width 1920 pitch 7680 (/4 1920)
>[502517.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eda0]
>[502517.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eda0] width 1920 pitch 7680 (/4 1920)
>[502517.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485dee0]
>[502517.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485dee0] width 1920 pitch 7680 (/4 1920)
>[502517.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8eda0]
>[502517.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8eda0] width 1920 pitch 7680 (/4 1920)
>[502518.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfda70]
>[502518.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfda70] width 1920 pitch 7680 (/4 1920)
>[502518.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ed10]
>[502518.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ed10] width 1920 pitch 7680 (/4 1920)
>[502518.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0f330]
>[502518.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0f330] width 1920 pitch 7680 (/4 1920)
>[502518.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ed10]
>[502518.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ed10] width 1920 pitch 7680 (/4 1920)
>[502518.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ec70]
>[502518.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ec70] width 1920 pitch 7680 (/4 1920)
>[502518.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0f20]
>[502518.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0f20] width 1920 pitch 7680 (/4 1920)
>[502518.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ec70]
>[502518.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ec70] width 1920 pitch 7680 (/4 1920)
>[502518.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0f20]
>[502518.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0f20] width 1920 pitch 7680 (/4 1920)
>[502518.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ec70]
>[502518.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ec70] width 1920 pitch 7680 (/4 1920)
>[502518.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0f20]
>[502518.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0f20] width 1920 pitch 7680 (/4 1920)
>[502518.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8ec70]
>[502518.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8ec70] width 1920 pitch 7680 (/4 1920)
>[502518.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc0f20]
>[502518.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc0f20] width 1920 pitch 7680 (/4 1920)
>[502519.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff470]
>[502519.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff470] width 1920 pitch 7680 (/4 1920)
>[502519.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8f70]
>[502519.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8f70] width 1920 pitch 7680 (/4 1920)
>[502519.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[502519.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[502519.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7a7b0]
>[502519.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7a7b0] width 1920 pitch 7680 (/4 1920)
>[502519.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502519.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502519.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502519.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502519.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502519.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502519.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502519.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502519.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502519.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502519.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe590]
>[502519.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe590] width 1920 pitch 7680 (/4 1920)
>[502519.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8a700]
>[502519.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8a700] width 1920 pitch 7680 (/4 1920)
>[502519.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40f00]
>[502519.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40f00] width 1920 pitch 7680 (/4 1920)
>[502519.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[502519.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[502519.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40f00]
>[502519.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40f00] width 1920 pitch 7680 (/4 1920)
>[502519.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[502519.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[502519.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40f00]
>[502519.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40f00] width 1920 pitch 7680 (/4 1920)
>[502519.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[502519.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[502519.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[502519.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[502519.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[502519.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[502519.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502519.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502519.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[502519.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[502520.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff470]
>[502520.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff470] width 1920 pitch 7680 (/4 1920)
>[502520.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[502520.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[502520.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502520.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502520.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[502520.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[502520.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3a960]
>[502520.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3a960] width 1920 pitch 7680 (/4 1920)
>[502520.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[502520.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[502520.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c3a960]
>[502520.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c3a960] width 1920 pitch 7680 (/4 1920)
>[502520.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[502520.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[502520.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[502520.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[502520.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd08b0]
>[502520.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd08b0] width 1920 pitch 7680 (/4 1920)
>[502520.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[502520.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[502520.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd08b0]
>[502520.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd08b0] width 1920 pitch 7680 (/4 1920)
>[502520.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf3fc0]
>[502520.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf3fc0] width 1920 pitch 7680 (/4 1920)
>[502520.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd08b0]
>[502520.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd08b0] width 1920 pitch 7680 (/4 1920)
>[502520.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502520.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502520.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502520.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502520.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502520.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502520.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502520.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502520.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502520.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502520.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8f70]
>[502520.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8f70] width 1920 pitch 7680 (/4 1920)
>[502520.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8f70]
>[502520.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8f70] width 1920 pitch 7680 (/4 1920)
>[502520.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8f70]
>[502520.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8f70] width 1920 pitch 7680 (/4 1920)
>[502520.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[502520.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[502520.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[502520.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[502520.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[502520.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[502520.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502520.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502520.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502520.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502520.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502521.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[502521.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[502521.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502521.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502521.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[502521.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[502521.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502521.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502521.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[502521.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[502521.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502521.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502521.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[502521.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[502521.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502521.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502521.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[502521.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[502521.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[502521.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[502521.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502521.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502521.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502521.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502521.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[502521.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[502521.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502521.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502521.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502521.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502521.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502521.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502521.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502521.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502521.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502521.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502521.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2551a90]
>[502521.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2551a90] width 1920 pitch 7680 (/4 1920)
>[502521.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[502521.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[502521.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[502521.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[502521.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a54eb0]
>[502521.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a54eb0] width 1920 pitch 7680 (/4 1920)
>[502521.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502521.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502521.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502521.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502521.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502521.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502521.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502521.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502522.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502522.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502522.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502522.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502522.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf70e0]
>[502522.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf70e0] width 1920 pitch 7680 (/4 1920)
>[502522.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502522.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502522.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf70e0]
>[502522.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf70e0] width 1920 pitch 7680 (/4 1920)
>[502522.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502522.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502522.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf70e0]
>[502522.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf70e0] width 1920 pitch 7680 (/4 1920)
>[502522.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[502522.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[502522.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd08b0]
>[502522.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd08b0] width 1920 pitch 7680 (/4 1920)
>[502522.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[502522.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[502522.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502522.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502522.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[502522.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[502522.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e940]
>[502522.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e940] width 1920 pitch 7680 (/4 1920)
>[502522.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502522.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502522.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f06380]
>[502522.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f06380] width 1920 pitch 7680 (/4 1920)
>[502522.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33170]
>[502522.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33170] width 1920 pitch 7680 (/4 1920)
>[502522.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502522.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502522.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502522.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502522.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502522.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502522.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502522.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502522.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502522.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502522.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502522.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502522.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502522.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502522.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502522.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502522.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502522.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502522.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502522.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502522.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502522.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502522.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd08b0]
>[502522.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd08b0] width 1920 pitch 7680 (/4 1920)
>[502522.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[502522.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[502523.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502523.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502523.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af6d80]
>[502523.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af6d80] width 1920 pitch 7680 (/4 1920)
>[502523.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502523.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502523.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[502523.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[502523.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[502523.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[502523.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[502523.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[502523.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[502523.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[502523.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[502523.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[502524.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcd8f0]
>[502524.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcd8f0] width 1920 pitch 7680 (/4 1920)
>[502524.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[502524.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[502524.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c33170]
>[502525.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c33170] width 1920 pitch 7680 (/4 1920)
>[502525.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a6c0]
>[502525.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a6c0] width 1920 pitch 7680 (/4 1920)
>[502525.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19e30]
>[502525.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19e30] width 1920 pitch 7680 (/4 1920)
>[502525.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502525.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502525.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502525.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502525.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502526.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1270]
>[502526.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1270] width 1920 pitch 7680 (/4 1920)
>[502526.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[502526.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[502527.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fddd0]
>[502527.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fddd0] width 1920 pitch 7680 (/4 1920)
>[502527.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502527.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502527.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502527.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502527.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502527.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502527.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502527.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502527.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502528.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502528.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502528.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502528.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502528.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502528.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502528.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502528.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502528.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502528.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502528.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502528.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502528.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502531.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502531.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502531.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502531.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502531.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fddd0]
>[502531.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fddd0] width 1920 pitch 7680 (/4 1920)
>[502531.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502531.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502534.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502534.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502579.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[502579.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[502609.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502609.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502654.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fddd0]
>[502654.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fddd0] width 1920 pitch 7680 (/4 1920)
>[502669.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502669.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502684.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502684.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502699.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502699.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502714.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fcb0]
>[502714.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fcb0] width 1920 pitch 7680 (/4 1920)
>[502729.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502729.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502774.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a370]
>[502774.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a370] width 1920 pitch 7680 (/4 1920)
>[502789.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481c960]
>[502789.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481c960] width 1920 pitch 7680 (/4 1920)
>[502864.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502864.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[502879.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e35510]
>[502879.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e35510] width 1920 pitch 7680 (/4 1920)
>[502909.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[502909.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[502939.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522c140]
>[502939.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522c140] width 1920 pitch 7680 (/4 1920)
>[502984.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x305fcb0]
>[502984.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x305fcb0] width 1920 pitch 7680 (/4 1920)
>[502999.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[502999.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[503089.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522c140]
>[503089.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522c140] width 1920 pitch 7680 (/4 1920)
>[503104.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e35510]
>[503104.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e35510] width 1920 pitch 7680 (/4 1920)
>[503133.451] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[503133.451] (II) RADEON(0): Using hsync ranges from config file
>[503133.451] (II) RADEON(0): Using vrefresh ranges from config file
>[503133.451] (II) RADEON(0): Printing DDC gathered Modelines:
>[503133.451] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[503133.451] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[503133.451] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[503133.451] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[503133.451] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[503133.451] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[503133.451] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[503133.451] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[503133.451] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[503133.451] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[503133.451] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[503133.451] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[503175.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfef70]
>[503175.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfef70] width 1920 pitch 7680 (/4 1920)
>[503179.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e98820]
>[503179.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e98820] width 1920 pitch 7680 (/4 1920)
>[503182.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[503182.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[503185.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e98820]
>[503185.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e98820] width 1920 pitch 7680 (/4 1920)
>[503185.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53580f0]
>[503185.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53580f0] width 1920 pitch 7680 (/4 1920)
>[503185.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[503185.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[503194.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e70f0]
>[503194.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e70f0] width 1920 pitch 7680 (/4 1920)
>[503224.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3156b50]
>[503224.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3156b50] width 1920 pitch 7680 (/4 1920)
>[503284.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503be60]
>[503284.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503be60] width 1920 pitch 7680 (/4 1920)
>[503299.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474a50]
>[503299.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474a50] width 1920 pitch 7680 (/4 1920)
>[503329.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[503329.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[503344.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53580f0]
>[503344.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53580f0] width 1920 pitch 7680 (/4 1920)
>[503434.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503be60]
>[503434.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503be60] width 1920 pitch 7680 (/4 1920)
>[503449.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b740]
>[503449.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b740] width 1920 pitch 7680 (/4 1920)
>[503524.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53580f0]
>[503524.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53580f0] width 1920 pitch 7680 (/4 1920)
>[503539.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2474270]
>[503539.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2474270] width 1920 pitch 7680 (/4 1920)
>[503556.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4898b00]
>[503556.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4898b00] width 1920 pitch 7680 (/4 1920)
>[503569.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b58d0]
>[503569.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b58d0] width 1920 pitch 7680 (/4 1920)
>[503576.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503576.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503584.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503584.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503614.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[503614.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[503629.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[503629.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[503689.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b58d0]
>[503689.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b58d0] width 1920 pitch 7680 (/4 1920)
>[503704.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b58d0]
>[503704.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b58d0] width 1920 pitch 7680 (/4 1920)
>[503719.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b58d0]
>[503719.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b58d0] width 1920 pitch 7680 (/4 1920)
>[503734.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25180d0]
>[503734.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25180d0] width 1920 pitch 7680 (/4 1920)
>[503749.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[503749.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[503764.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25180d0]
>[503764.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25180d0] width 1920 pitch 7680 (/4 1920)
>[503794.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f04fe0]
>[503794.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f04fe0] width 1920 pitch 7680 (/4 1920)
>[503809.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fd230]
>[503809.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fd230] width 1920 pitch 7680 (/4 1920)
>[503847.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503847.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503847.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503847.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503847.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503849.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a127d0]
>[503849.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a127d0] width 1920 pitch 7680 (/4 1920)
>[503849.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503849.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503849.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a127d0]
>[503849.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a127d0] width 1920 pitch 7680 (/4 1920)
>[503849.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503849.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503849.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a127d0]
>[503849.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a127d0] width 1920 pitch 7680 (/4 1920)
>[503849.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503849.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503849.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a127d0]
>[503849.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a127d0] width 1920 pitch 7680 (/4 1920)
>[503849.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503849.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503849.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a12910]
>[503849.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a12910] width 1920 pitch 7680 (/4 1920)
>[503850.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503850.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503850.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503850.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503850.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503850.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503850.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503850.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503851.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503851.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503851.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503851.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503851.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503851.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503851.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503851.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503851.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503851.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503851.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503852.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503852.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503852.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503852.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503852.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503852.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503852.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503852.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503852.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503852.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503852.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503852.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503852.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503852.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503852.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503852.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503852.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503853.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503853.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503853.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503853.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503853.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503853.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503853.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503853.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503853.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503853.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503853.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503853.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503853.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503853.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503853.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503853.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503853.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503853.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503853.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503853.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503853.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503853.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503856.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3420]
>[503856.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3420] width 1920 pitch 7680 (/4 1920)
>[503856.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1390]
>[503856.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1390] width 1920 pitch 7680 (/4 1920)
>[503856.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27520]
>[503856.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27520] width 1920 pitch 7680 (/4 1920)
>[503856.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27520]
>[503856.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27520] width 1920 pitch 7680 (/4 1920)
>[503856.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27520]
>[503856.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27520] width 1920 pitch 7680 (/4 1920)
>[503856.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27520]
>[503856.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27520] width 1920 pitch 7680 (/4 1920)
>[503856.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503856.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e277f0]
>[503856.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e277f0] width 1920 pitch 7680 (/4 1920)
>[503856.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503856.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e277f0]
>[503856.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e277f0] width 1920 pitch 7680 (/4 1920)
>[503856.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503856.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e277f0]
>[503856.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e277f0] width 1920 pitch 7680 (/4 1920)
>[503856.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503856.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e277f0]
>[503856.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e277f0] width 1920 pitch 7680 (/4 1920)
>[503856.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503856.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e277f0]
>[503856.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e277f0] width 1920 pitch 7680 (/4 1920)
>[503856.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503856.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e277f0]
>[503856.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e277f0] width 1920 pitch 7680 (/4 1920)
>[503856.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69240]
>[503856.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69240] width 1920 pitch 7680 (/4 1920)
>[503857.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1390]
>[503857.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1390] width 1920 pitch 7680 (/4 1920)
>[503857.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed78c0]
>[503857.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed78c0] width 1920 pitch 7680 (/4 1920)
>[503857.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1390]
>[503857.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1390] width 1920 pitch 7680 (/4 1920)
>[503857.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed78c0]
>[503857.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed78c0] width 1920 pitch 7680 (/4 1920)
>[503857.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1390]
>[503857.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1390] width 1920 pitch 7680 (/4 1920)
>[503857.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed78c0]
>[503857.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed78c0] width 1920 pitch 7680 (/4 1920)
>[503857.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1390]
>[503857.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1390] width 1920 pitch 7680 (/4 1920)
>[503857.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed78c0]
>[503857.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed78c0] width 1920 pitch 7680 (/4 1920)
>[503857.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed1390]
>[503857.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed1390] width 1920 pitch 7680 (/4 1920)
>[503857.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed78c0]
>[503857.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed78c0] width 1920 pitch 7680 (/4 1920)
>[503857.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4815c20]
>[503857.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4815c20] width 1920 pitch 7680 (/4 1920)
>[503857.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed78c0]
>[503857.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed78c0] width 1920 pitch 7680 (/4 1920)
>[503857.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4868f00]
>[503857.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4868f00] width 1920 pitch 7680 (/4 1920)
>[503857.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f771a0]
>[503857.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f771a0] width 1920 pitch 7680 (/4 1920)
>[503857.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4868f00]
>[503857.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4868f00] width 1920 pitch 7680 (/4 1920)
>[503857.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f771a0]
>[503857.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f771a0] width 1920 pitch 7680 (/4 1920)
>[503857.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4868f00]
>[503857.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4868f00] width 1920 pitch 7680 (/4 1920)
>[503857.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f771a0]
>[503857.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f771a0] width 1920 pitch 7680 (/4 1920)
>[503857.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4868f00]
>[503857.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4868f00] width 1920 pitch 7680 (/4 1920)
>[503857.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f771a0]
>[503857.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f771a0] width 1920 pitch 7680 (/4 1920)
>[503857.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4868f00]
>[503857.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4868f00] width 1920 pitch 7680 (/4 1920)
>[503857.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f771a0]
>[503857.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f771a0] width 1920 pitch 7680 (/4 1920)
>[503857.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4868f00]
>[503857.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4868f00] width 1920 pitch 7680 (/4 1920)
>[503857.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920790]
>[503857.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920790] width 1920 pitch 7680 (/4 1920)
>[503857.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27520]
>[503857.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27520] width 1920 pitch 7680 (/4 1920)
>[503857.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920790]
>[503857.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920790] width 1920 pitch 7680 (/4 1920)
>[503857.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df62b0]
>[503857.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df62b0] width 1920 pitch 7680 (/4 1920)
>[503857.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x488b270]
>[503857.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x488b270] width 1920 pitch 7680 (/4 1920)
>[503857.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3920790]
>[503857.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3920790] width 1920 pitch 7680 (/4 1920)
>[503857.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503857.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503858.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39cf820]
>[503858.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39cf820] width 1920 pitch 7680 (/4 1920)
>[503858.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df62b0]
>[503858.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df62b0] width 1920 pitch 7680 (/4 1920)
>[503869.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[503869.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[503879.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e960]
>[503879.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e960] width 1920 pitch 7680 (/4 1920)
>[503879.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39118b0]
>[503879.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39118b0] width 1920 pitch 7680 (/4 1920)
>[503879.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[503879.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[503879.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39118b0]
>[503879.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39118b0] width 1920 pitch 7680 (/4 1920)
>[503879.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[503879.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[503879.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39118b0]
>[503879.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39118b0] width 1920 pitch 7680 (/4 1920)
>[503879.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[503879.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[503879.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39118b0]
>[503879.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39118b0] width 1920 pitch 7680 (/4 1920)
>[503879.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[503879.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[503879.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39118b0]
>[503879.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39118b0] width 1920 pitch 7680 (/4 1920)
>[503879.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[503879.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[503879.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39118b0]
>[503879.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39118b0] width 1920 pitch 7680 (/4 1920)
>[503879.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca52b0]
>[503879.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca52b0] width 1920 pitch 7680 (/4 1920)
>[503879.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[503879.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[503879.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503879.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503879.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[503879.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[503879.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503879.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503879.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[503879.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[503879.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503879.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503879.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[503879.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[503879.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503879.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503879.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[503880.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[503880.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503880.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503880.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff470]
>[503880.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff470] width 1920 pitch 7680 (/4 1920)
>[503880.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503880.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503880.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c835f0]
>[503880.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c835f0] width 1920 pitch 7680 (/4 1920)
>[503880.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[503880.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[503881.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[503881.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[503881.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[503881.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[503881.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[503881.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[503881.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[503881.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[503881.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[503881.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[503881.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[503881.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[503881.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[503881.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[503881.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[503881.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[503881.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40230b0]
>[503881.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40230b0] width 1920 pitch 7680 (/4 1920)
>[503881.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f06380]
>[503881.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f06380] width 1920 pitch 7680 (/4 1920)
>[503884.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae1930]
>[503884.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae1930] width 1920 pitch 7680 (/4 1920)
>[503899.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5357630]
>[503899.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5357630] width 1920 pitch 7680 (/4 1920)
>[503914.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[503914.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[503929.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017700]
>[503929.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017700] width 1920 pitch 7680 (/4 1920)
>[503944.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a6d80]
>[503944.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a6d80] width 1920 pitch 7680 (/4 1920)
>[503980.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b9c0]
>[503980.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b9c0] width 1920 pitch 7680 (/4 1920)
>[503980.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310b9e0]
>[503980.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310b9e0] width 1920 pitch 7680 (/4 1920)
>[503980.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5175bc0]
>[503980.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5175bc0] width 1920 pitch 7680 (/4 1920)
>[503980.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310b9e0]
>[503980.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310b9e0] width 1920 pitch 7680 (/4 1920)
>[503980.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5175bc0]
>[503980.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5175bc0] width 1920 pitch 7680 (/4 1920)
>[503980.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310b9e0]
>[503980.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310b9e0] width 1920 pitch 7680 (/4 1920)
>[503980.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5175bc0]
>[503980.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5175bc0] width 1920 pitch 7680 (/4 1920)
>[503980.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310b9e0]
>[503980.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310b9e0] width 1920 pitch 7680 (/4 1920)
>[503980.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbef20]
>[503980.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbef20] width 1920 pitch 7680 (/4 1920)
>[503980.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c170]
>[503980.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c170] width 1920 pitch 7680 (/4 1920)
>[503980.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[503980.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[503985.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[503985.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[503985.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9ed40]
>[503985.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9ed40] width 1920 pitch 7680 (/4 1920)
>[503985.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a0270]
>[503985.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a0270] width 1920 pitch 7680 (/4 1920)
>[503985.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d1c230]
>[503985.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d1c230] width 1920 pitch 7680 (/4 1920)
>[503986.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8ad0]
>[503986.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8ad0] width 1920 pitch 7680 (/4 1920)
>[503986.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80120]
>[503986.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80120] width 1920 pitch 7680 (/4 1920)
>[503986.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be110]
>[503986.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be110] width 1920 pitch 7680 (/4 1920)
>[503986.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d5f80]
>[503986.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d5f80] width 1920 pitch 7680 (/4 1920)
>[503986.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dbef20]
>[503986.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dbef20] width 1920 pitch 7680 (/4 1920)
>[503986.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9ed40]
>[503986.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9ed40] width 1920 pitch 7680 (/4 1920)
>[503986.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dfd200]
>[503986.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dfd200] width 1920 pitch 7680 (/4 1920)
>[503986.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9ed40]
>[503986.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9ed40] width 1920 pitch 7680 (/4 1920)
>[503986.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12710]
>[503986.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12710] width 1920 pitch 7680 (/4 1920)
>[503986.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9ed40]
>[503987.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9ed40] width 1920 pitch 7680 (/4 1920)
>[503987.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12710]
>[503987.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12710] width 1920 pitch 7680 (/4 1920)
>[503987.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b9c0]
>[503987.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b9c0] width 1920 pitch 7680 (/4 1920)
>[503987.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f12710]
>[503987.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f12710] width 1920 pitch 7680 (/4 1920)
>[503987.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310b9e0]
>[503987.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310b9e0] width 1920 pitch 7680 (/4 1920)
>[503987.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80120]
>[503987.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80120] width 1920 pitch 7680 (/4 1920)
>[503987.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8ad0]
>[503987.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8ad0] width 1920 pitch 7680 (/4 1920)
>[503987.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80120]
>[503987.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80120] width 1920 pitch 7680 (/4 1920)
>[503987.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8ad0]
>[503987.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8ad0] width 1920 pitch 7680 (/4 1920)
>[503987.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80120]
>[503988.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80120] width 1920 pitch 7680 (/4 1920)
>[503988.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8ad0]
>[503988.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8ad0] width 1920 pitch 7680 (/4 1920)
>[503988.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80120]
>[503988.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80120] width 1920 pitch 7680 (/4 1920)
>[503988.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc8ad0]
>[503988.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc8ad0] width 1920 pitch 7680 (/4 1920)
>[503992.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa270]
>[503992.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa270] width 1920 pitch 7680 (/4 1920)
>[504002.874] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[504002.874] (II) RADEON(0): Using hsync ranges from config file
>[504002.874] (II) RADEON(0): Using vrefresh ranges from config file
>[504002.874] (II) RADEON(0): Printing DDC gathered Modelines:
>[504002.874] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[504002.874] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[504002.874] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[504002.874] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[504002.874] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[504002.874] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[504002.874] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[504002.874] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[504002.874] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[504002.874] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[504002.874] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[504002.874] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[504002.918] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[504002.918] (II) RADEON(0): Using hsync ranges from config file
>[504002.918] (II) RADEON(0): Using vrefresh ranges from config file
>[504002.918] (II) RADEON(0): Printing DDC gathered Modelines:
>[504002.918] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[504002.918] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[504002.918] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[504002.918] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[504002.918] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[504002.918] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[504002.918] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[504002.918] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[504002.918] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[504002.918] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[504002.918] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[504002.918] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[504002.963] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[504002.963] (II) RADEON(0): Using hsync ranges from config file
>[504002.963] (II) RADEON(0): Using vrefresh ranges from config file
>[504002.963] (II) RADEON(0): Printing DDC gathered Modelines:
>[504002.963] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[504002.963] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[504002.963] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[504002.963] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[504002.963] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[504002.963] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[504002.963] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[504002.963] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[504002.963] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[504002.963] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[504002.963] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[504002.963] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[504012.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[504012.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[504034.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[504034.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[504049.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504049.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504064.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504064.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504109.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504109.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504124.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504124.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504139.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[504139.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[504154.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504154.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504169.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504169.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504184.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504184.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504199.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504199.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504244.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504244.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504259.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[504259.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[504274.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504274.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504289.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504289.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504304.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504304.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504319.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504319.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504349.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504349.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504379.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504379.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504409.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504409.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504439.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504439.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504454.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504454.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504544.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504544.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504559.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[504559.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[504814.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504814.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[504829.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[504829.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[504889.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504889.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504919.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[504919.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[504979.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[504979.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[504994.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[504994.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[505069.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[505069.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[505079.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[505079.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[505079.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[505079.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[505079.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[505079.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[505079.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[505079.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[505079.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[505079.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[505080.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[505081.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[505081.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[505081.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[505081.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[505081.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[505082.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9b9c0]
>[505082.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9b9c0] width 1920 pitch 7680 (/4 1920)
>[505082.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e891e0]
>[505082.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e891e0] width 1920 pitch 7680 (/4 1920)
>[505082.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[505082.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[505082.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[505082.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[505082.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbe390]
>[505082.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbe390] width 1920 pitch 7680 (/4 1920)
>[505082.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[505082.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[505084.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a6d80]
>[505084.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a6d80] width 1920 pitch 7680 (/4 1920)
>[505129.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4824e30]
>[505129.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4824e30] width 1920 pitch 7680 (/4 1920)
>[505144.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7620]
>[505144.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7620] width 1920 pitch 7680 (/4 1920)
>[505159.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[505159.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[505174.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953eb0]
>[505174.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953eb0] width 1920 pitch 7680 (/4 1920)
>[505204.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b66a0]
>[505204.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b66a0] width 1920 pitch 7680 (/4 1920)
>[505263.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f8c0]
>[505263.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f8c0] width 1920 pitch 7680 (/4 1920)
>[505263.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[505263.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[505263.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f8c0]
>[505263.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f8c0] width 1920 pitch 7680 (/4 1920)
>[505263.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[505263.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[505263.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[505264.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[505264.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[505264.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[505264.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[505264.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[505264.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[505264.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[505264.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[505264.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[505264.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[505264.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[505264.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[505264.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[505264.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[505264.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[505264.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7620]
>[505264.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7620] width 1920 pitch 7680 (/4 1920)
>[505309.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50237d0]
>[505309.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50237d0] width 1920 pitch 7680 (/4 1920)
>[505354.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403dd90]
>[505354.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403dd90] width 1920 pitch 7680 (/4 1920)
>[505369.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505369.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505384.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8cdb0]
>[505384.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8cdb0] width 1920 pitch 7680 (/4 1920)
>[505399.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3fe0]
>[505399.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3fe0] width 1920 pitch 7680 (/4 1920)
>[505414.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[505414.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[505429.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e25970]
>[505429.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e25970] width 1920 pitch 7680 (/4 1920)
>[505444.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7620]
>[505444.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7620] width 1920 pitch 7680 (/4 1920)
>[505474.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505474.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505489.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[505489.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[505504.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505504.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505534.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[505534.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[505549.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[505549.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[505579.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a270]
>[505579.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a270] width 1920 pitch 7680 (/4 1920)
>[505594.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb3fe0]
>[505594.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb3fe0] width 1920 pitch 7680 (/4 1920)
>[505609.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69e30]
>[505609.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69e30] width 1920 pitch 7680 (/4 1920)
>[505639.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1a40]
>[505639.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1a40] width 1920 pitch 7680 (/4 1920)
>[505684.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[505684.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[505699.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6300]
>[505699.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6300] width 1920 pitch 7680 (/4 1920)
>[505729.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1a40]
>[505729.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1a40] width 1920 pitch 7680 (/4 1920)
>[505759.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e25970]
>[505759.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e25970] width 1920 pitch 7680 (/4 1920)
>[505774.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f2b0]
>[505774.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f2b0] width 1920 pitch 7680 (/4 1920)
>[505789.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953eb0]
>[505789.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953eb0] width 1920 pitch 7680 (/4 1920)
>[505804.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f2b0]
>[505804.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f2b0] width 1920 pitch 7680 (/4 1920)
>[505819.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[505819.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[505849.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505849.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505864.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[505864.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[505879.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7cdf0]
>[505879.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7cdf0] width 1920 pitch 7680 (/4 1920)
>[505894.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4007530]
>[505894.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4007530] width 1920 pitch 7680 (/4 1920)
>[505918.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505918.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505918.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3330]
>[505918.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3330] width 1920 pitch 7680 (/4 1920)
>[505919.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505919.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505919.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505919.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505924.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505924.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505924.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505924.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505924.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505924.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505924.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505924.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505924.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505924.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505924.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505924.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505925.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505925.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505925.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505925.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505925.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505925.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505925.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505925.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505925.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505925.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505925.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505926.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505926.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[505926.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[505926.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505926.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505954.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505954.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[505999.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[505999.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[506014.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[506014.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[506044.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[506044.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[506089.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f869a0]
>[506089.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f869a0] width 1920 pitch 7680 (/4 1920)
>[506104.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[506104.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[506119.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[506119.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[506164.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f04f90]
>[506164.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f04f90] width 1920 pitch 7680 (/4 1920)
>[506179.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[506179.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[506194.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb450]
>[506194.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb450] width 1920 pitch 7680 (/4 1920)
>[506224.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f498f0]
>[506224.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f498f0] width 1920 pitch 7680 (/4 1920)
>[506225.334] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[506225.334] (II) RADEON(0): Using hsync ranges from config file
>[506225.334] (II) RADEON(0): Using vrefresh ranges from config file
>[506225.334] (II) RADEON(0): Printing DDC gathered Modelines:
>[506225.334] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[506225.334] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[506225.334] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[506225.334] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[506225.334] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[506225.334] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[506225.334] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[506225.334] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[506225.334] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[506225.334] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[506225.334] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[506225.334] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[506225.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb21e0]
>[506225.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb21e0] width 1920 pitch 7680 (/4 1920)
>[506239.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a270]
>[506239.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a270] width 1920 pitch 7680 (/4 1920)
>[506239.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a270]
>[506239.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a270] width 1920 pitch 7680 (/4 1920)
>[506239.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a270]
>[506239.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a270] width 1920 pitch 7680 (/4 1920)
>[506239.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x236a270]
>[506239.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x236a270] width 1920 pitch 7680 (/4 1920)
>[506239.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[506239.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[506239.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[506239.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[506239.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[506239.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[506239.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506239.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506239.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3be90]
>[506239.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3be90] width 1920 pitch 7680 (/4 1920)
>[506239.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc11b0]
>[506239.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc11b0] width 1920 pitch 7680 (/4 1920)
>[506254.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486b6e0]
>[506254.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486b6e0] width 1920 pitch 7680 (/4 1920)
>[506262.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251a320]
>[506262.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251a320] width 1920 pitch 7680 (/4 1920)
>[506262.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506262.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506262.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506262.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506262.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506262.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506262.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506262.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506262.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506262.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506262.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[506262.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[506262.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[506262.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[506262.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[506262.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[506265.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfef70]
>[506265.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfef70] width 1920 pitch 7680 (/4 1920)
>[506265.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bea0]
>[506265.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bea0] width 1920 pitch 7680 (/4 1920)
>[506265.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506265.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506265.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc11b0]
>[506265.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc11b0] width 1920 pitch 7680 (/4 1920)
>[506265.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50237d0]
>[506265.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50237d0] width 1920 pitch 7680 (/4 1920)
>[506265.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc11b0]
>[506265.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc11b0] width 1920 pitch 7680 (/4 1920)
>[506265.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506265.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506265.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc11b0]
>[506265.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc11b0] width 1920 pitch 7680 (/4 1920)
>[506265.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506265.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506265.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc11b0]
>[506265.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc11b0] width 1920 pitch 7680 (/4 1920)
>[506265.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506265.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506266.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22e00]
>[506266.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22e00] width 1920 pitch 7680 (/4 1920)
>[506266.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[506266.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[506266.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22e00]
>[506266.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22e00] width 1920 pitch 7680 (/4 1920)
>[506266.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[506266.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[506268.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a0270]
>[506268.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a0270] width 1920 pitch 7680 (/4 1920)
>[506268.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a01790]
>[506268.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a01790] width 1920 pitch 7680 (/4 1920)
>[506268.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a3fd0]
>[506268.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a3fd0] width 1920 pitch 7680 (/4 1920)
>[506271.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[506271.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[506271.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506271.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506271.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[506271.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[506271.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506272.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506272.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[506272.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[506272.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506272.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506272.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a5b0]
>[506272.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a5b0] width 1920 pitch 7680 (/4 1920)
>[506272.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251bf60]
>[506272.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251bf60] width 1920 pitch 7680 (/4 1920)
>[506272.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e8aa0]
>[506272.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e8aa0] width 1920 pitch 7680 (/4 1920)
>[506272.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f22e00]
>[506272.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f22e00] width 1920 pitch 7680 (/4 1920)
>[506272.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3953eb0]
>[506272.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3953eb0] width 1920 pitch 7680 (/4 1920)
>[506272.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[506272.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[506272.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[506272.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[506272.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[506272.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[506272.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[506272.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[506272.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[506272.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[506272.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506272.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506272.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316b580]
>[506272.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316b580] width 1920 pitch 7680 (/4 1920)
>[506273.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506273.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506273.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316b580]
>[506273.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316b580] width 1920 pitch 7680 (/4 1920)
>[506273.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506273.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506273.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316b580]
>[506273.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316b580] width 1920 pitch 7680 (/4 1920)
>[506273.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506273.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506273.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316b580]
>[506273.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316b580] width 1920 pitch 7680 (/4 1920)
>[506273.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506273.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506275.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd87a0]
>[506275.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd87a0] width 1920 pitch 7680 (/4 1920)
>[506275.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[506275.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[506275.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd87a0]
>[506275.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd87a0] width 1920 pitch 7680 (/4 1920)
>[506275.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[506275.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[506275.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd87a0]
>[506275.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd87a0] width 1920 pitch 7680 (/4 1920)
>[506275.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[506275.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[506275.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd87a0]
>[506275.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd87a0] width 1920 pitch 7680 (/4 1920)
>[506275.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[506275.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[506275.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39159b0]
>[506275.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39159b0] width 1920 pitch 7680 (/4 1920)
>[506275.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a042a0]
>[506275.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a042a0] width 1920 pitch 7680 (/4 1920)
>[506275.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c72210]
>[506275.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c72210] width 1920 pitch 7680 (/4 1920)
>[506275.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5f8c0]
>[506275.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5f8c0] width 1920 pitch 7680 (/4 1920)
>[506275.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfc1e0]
>[506275.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfc1e0] width 1920 pitch 7680 (/4 1920)
>[506275.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aadf00]
>[506275.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aadf00] width 1920 pitch 7680 (/4 1920)
>[506275.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be110]
>[506275.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be110] width 1920 pitch 7680 (/4 1920)
>[506275.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1a40]
>[506275.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1a40] width 1920 pitch 7680 (/4 1920)
>[506275.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38be110]
>[506275.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38be110] width 1920 pitch 7680 (/4 1920)
>[506275.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1a40]
>[506275.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1a40] width 1920 pitch 7680 (/4 1920)
>[506275.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf1b0]
>[506275.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf1b0] width 1920 pitch 7680 (/4 1920)
>[506275.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912c50]
>[506275.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912c50] width 1920 pitch 7680 (/4 1920)
>[506275.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c10130]
>[506275.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c10130] width 1920 pitch 7680 (/4 1920)
>[506275.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3912c50]
>[506275.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3912c50] width 1920 pitch 7680 (/4 1920)
>[506276.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[506276.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[506276.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[506276.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[506276.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[506276.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[506276.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[506276.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[506276.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[506276.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[506276.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[506276.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[506276.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[506276.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[506276.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[506276.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[506276.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[506276.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[506276.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[506276.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[506276.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[506276.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[506276.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3e40]
>[506277.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3e40] width 1920 pitch 7680 (/4 1920)
>[506277.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b5ac0]
>[506277.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b5ac0] width 1920 pitch 7680 (/4 1920)
>[506284.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506284.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506285.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[506285.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[506285.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506285.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506285.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506285.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506295.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29700]
>[506295.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29700] width 1920 pitch 7680 (/4 1920)
>[506329.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[506329.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[506344.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f54bf0]
>[506344.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f54bf0] width 1920 pitch 7680 (/4 1920)
>[506449.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[506449.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[506464.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506464.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506473.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fd240]
>[506473.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fd240] width 1920 pitch 7680 (/4 1920)
>[506473.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506473.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506473.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fd240]
>[506473.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fd240] width 1920 pitch 7680 (/4 1920)
>[506473.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[506473.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[506473.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[506473.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[506473.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[506473.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[506473.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcdb10]
>[506473.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcdb10] width 1920 pitch 7680 (/4 1920)
>[506473.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[506473.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[506473.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506473.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506473.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[506473.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[506473.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506473.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506473.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[506473.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[506473.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b740]
>[506473.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b740] width 1920 pitch 7680 (/4 1920)
>[506473.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4040]
>[506473.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4040] width 1920 pitch 7680 (/4 1920)
>[506474.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbb7c0]
>[506474.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbb7c0] width 1920 pitch 7680 (/4 1920)
>[506474.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[506474.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[506474.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8fb70]
>[506474.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8fb70] width 1920 pitch 7680 (/4 1920)
>[506474.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b220]
>[506474.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b220] width 1920 pitch 7680 (/4 1920)
>[506474.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f540]
>[506474.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f540] width 1920 pitch 7680 (/4 1920)
>[506474.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b220]
>[506474.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b220] width 1920 pitch 7680 (/4 1920)
>[506475.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506475.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506475.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[506475.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[506475.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506475.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506475.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[506475.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[506475.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506475.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506475.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[506475.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[506475.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506475.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506475.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[506475.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[506475.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506475.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506475.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[506475.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[506475.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954dd0]
>[506475.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954dd0] width 1920 pitch 7680 (/4 1920)
>[506475.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fd240]
>[506475.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fd240] width 1920 pitch 7680 (/4 1920)
>[506475.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcdb10]
>[506475.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcdb10] width 1920 pitch 7680 (/4 1920)
>[506475.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[506475.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[506475.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[506475.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[506475.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c3b0]
>[506475.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c3b0] width 1920 pitch 7680 (/4 1920)
>[506476.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b6fe0]
>[506476.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b6fe0] width 1920 pitch 7680 (/4 1920)
>[506484.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed6240]
>[506484.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed6240] width 1920 pitch 7680 (/4 1920)
>[506484.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39381a0]
>[506484.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39381a0] width 1920 pitch 7680 (/4 1920)
>[506484.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39381a0]
>[506484.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39381a0] width 1920 pitch 7680 (/4 1920)
>[506484.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394ad20]
>[506484.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394ad20] width 1920 pitch 7680 (/4 1920)
>[506494.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3945890]
>[506494.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3945890] width 1920 pitch 7680 (/4 1920)
>[506496.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3967580]
>[506496.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3967580] width 1920 pitch 7680 (/4 1920)
>[506509.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbddf0]
>[506509.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbddf0] width 1920 pitch 7680 (/4 1920)
>[506524.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce900]
>[506524.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce900] width 1920 pitch 7680 (/4 1920)
>[506538.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[506538.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[506539.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[506539.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[506539.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd2450]
>[506539.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd2450] width 1920 pitch 7680 (/4 1920)
>[506539.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c94a00]
>[506539.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c94a00] width 1920 pitch 7680 (/4 1920)
>[506554.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3161190]
>[506554.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3161190] width 1920 pitch 7680 (/4 1920)
>[506581.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[506581.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[506584.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[506584.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[506584.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ce900]
>[506584.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ce900] width 1920 pitch 7680 (/4 1920)
>[506584.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[506584.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[506584.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0d8b0]
>[506584.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0d8b0] width 1920 pitch 7680 (/4 1920)
>[506591.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[506591.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[506595.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[506595.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[506595.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[506595.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[506595.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0d8b0]
>[506595.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0d8b0] width 1920 pitch 7680 (/4 1920)
>[506599.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[506599.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[506614.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03060]
>[506614.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03060] width 1920 pitch 7680 (/4 1920)
>[506644.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc6c30]
>[506644.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc6c30] width 1920 pitch 7680 (/4 1920)
>[506659.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03060]
>[506659.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03060] width 1920 pitch 7680 (/4 1920)
>[506674.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[506674.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[506689.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[506689.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[506704.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[506704.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[506716.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf270]
>[506716.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf270] width 1920 pitch 7680 (/4 1920)
>[506719.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611ce10]
>[506719.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611ce10] width 1920 pitch 7680 (/4 1920)
>[506734.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1baf0]
>[506734.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1baf0] width 1920 pitch 7680 (/4 1920)
>[506734.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dd880]
>[506734.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dd880] width 1920 pitch 7680 (/4 1920)
>[506734.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1baf0]
>[506734.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1baf0] width 1920 pitch 7680 (/4 1920)
>[506735.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dd880]
>[506735.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dd880] width 1920 pitch 7680 (/4 1920)
>[506736.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4857280]
>[506736.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4857280] width 1920 pitch 7680 (/4 1920)
>[506749.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5087370]
>[506749.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5087370] width 1920 pitch 7680 (/4 1920)
>[506809.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506809.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506809.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506809.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506809.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506809.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506809.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506809.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506809.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506809.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506809.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506809.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506809.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506809.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506809.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506809.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506809.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506809.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506809.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506809.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506809.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506809.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506810.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506810.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506811.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506811.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506811.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506811.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506811.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506811.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506811.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bbe80]
>[506811.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bbe80] width 1920 pitch 7680 (/4 1920)
>[506811.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50334f0]
>[506811.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50334f0] width 1920 pitch 7680 (/4 1920)
>[506816.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a22c0]
>[506816.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a22c0] width 1920 pitch 7680 (/4 1920)
>[506816.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a22c0]
>[506816.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a22c0] width 1920 pitch 7680 (/4 1920)
>[506816.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a22c0]
>[506816.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a22c0] width 1920 pitch 7680 (/4 1920)
>[506816.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a22c0]
>[506816.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a22c0] width 1920 pitch 7680 (/4 1920)
>[506816.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a1d80]
>[506816.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a1d80] width 1920 pitch 7680 (/4 1920)
>[506816.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b8230]
>[506816.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b8230] width 1920 pitch 7680 (/4 1920)
>[506816.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a1d80]
>[506816.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a1d80] width 1920 pitch 7680 (/4 1920)
>[506816.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28279e0]
>[506816.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28279e0] width 1920 pitch 7680 (/4 1920)
>[506816.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5033030]
>[506816.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5033030] width 1920 pitch 7680 (/4 1920)
>[506824.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d1a30]
>[506824.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d1a30] width 1920 pitch 7680 (/4 1920)
>[506825.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cab60]
>[506825.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cab60] width 1920 pitch 7680 (/4 1920)
>[506825.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b7d50]
>[506825.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b7d50] width 1920 pitch 7680 (/4 1920)
>[506825.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b7c70]
>[506825.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b7c70] width 1920 pitch 7680 (/4 1920)
>[506825.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509fea0]
>[506825.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509fea0] width 1920 pitch 7680 (/4 1920)
>[506830.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5690]
>[506830.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5690] width 1920 pitch 7680 (/4 1920)
>[506830.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbddf0]
>[506830.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbddf0] width 1920 pitch 7680 (/4 1920)
>[506830.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b7ec0]
>[506830.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b7ec0] width 1920 pitch 7680 (/4 1920)
>[506830.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbddf0]
>[506830.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbddf0] width 1920 pitch 7680 (/4 1920)
>[506834.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c100]
>[506834.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c100] width 1920 pitch 7680 (/4 1920)
>[506834.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4842140]
>[506834.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4842140] width 1920 pitch 7680 (/4 1920)
>[506834.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7ab0]
>[506834.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7ab0] width 1920 pitch 7680 (/4 1920)
>[506834.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48421c0]
>[506834.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48421c0] width 1920 pitch 7680 (/4 1920)
>[506835.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859250]
>[506835.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859250] width 1920 pitch 7680 (/4 1920)
>[506835.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb3c0]
>[506835.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb3c0] width 1920 pitch 7680 (/4 1920)
>[506835.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5096c20]
>[506835.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5096c20] width 1920 pitch 7680 (/4 1920)
>[506835.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dd4a0]
>[506835.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dd4a0] width 1920 pitch 7680 (/4 1920)
>[506836.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b420]
>[506836.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b420] width 1920 pitch 7680 (/4 1920)
>[506858.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7b80]
>[506858.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7b80] width 1920 pitch 7680 (/4 1920)
>[506858.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a5070]
>[506858.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a5070] width 1920 pitch 7680 (/4 1920)
>[506858.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7b80]
>[506858.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7b80] width 1920 pitch 7680 (/4 1920)
>[506858.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ec770]
>[506858.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ec770] width 1920 pitch 7680 (/4 1920)
>[506861.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5026180]
>[506861.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5026180] width 1920 pitch 7680 (/4 1920)
>[506866.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a2060]
>[506866.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a2060] width 1920 pitch 7680 (/4 1920)
>[506867.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5025bd0]
>[506867.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5025bd0] width 1920 pitch 7680 (/4 1920)
>[506867.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da6f0]
>[506867.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da6f0] width 1920 pitch 7680 (/4 1920)
>[506867.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481f570]
>[506867.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481f570] width 1920 pitch 7680 (/4 1920)
>[506872.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509df40]
>[506872.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509df40] width 1920 pitch 7680 (/4 1920)
>[506872.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf0e0]
>[506872.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf0e0] width 1920 pitch 7680 (/4 1920)
>[506872.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3d60]
>[506872.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3d60] width 1920 pitch 7680 (/4 1920)
>[506872.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bf0e0]
>[506872.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bf0e0] width 1920 pitch 7680 (/4 1920)
>[506873.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dd4a0]
>[506873.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dd4a0] width 1920 pitch 7680 (/4 1920)
>[506873.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4842340]
>[506873.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4842340] width 1920 pitch 7680 (/4 1920)
>[506873.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dd4a0]
>[506873.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dd4a0] width 1920 pitch 7680 (/4 1920)
>[506873.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4842340]
>[506873.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4842340] width 1920 pitch 7680 (/4 1920)
>[506876.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28cab60]
>[506876.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28cab60] width 1920 pitch 7680 (/4 1920)
>[506882.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7720]
>[506882.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7720] width 1920 pitch 7680 (/4 1920)
>[506882.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a2060]
>[506882.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a2060] width 1920 pitch 7680 (/4 1920)
>[506882.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4842340]
>[506882.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4842340] width 1920 pitch 7680 (/4 1920)
>[506882.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a2060]
>[506882.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a2060] width 1920 pitch 7680 (/4 1920)
>[506889.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7720]
>[506889.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7720] width 1920 pitch 7680 (/4 1920)
>[506892.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7720]
>[506892.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7720] width 1920 pitch 7680 (/4 1920)
>[506892.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7720]
>[506892.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7720] width 1920 pitch 7680 (/4 1920)
>[506892.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1bd30]
>[506892.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1bd30] width 1920 pitch 7680 (/4 1920)
>[506892.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7720]
>[506892.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7720] width 1920 pitch 7680 (/4 1920)
>[506899.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4d40]
>[506899.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4d40] width 1920 pitch 7680 (/4 1920)
>[506902.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c63e0]
>[506902.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c63e0] width 1920 pitch 7680 (/4 1920)
>[506907.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1bd30]
>[506907.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1bd30] width 1920 pitch 7680 (/4 1920)
>[506907.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859250]
>[506907.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859250] width 1920 pitch 7680 (/4 1920)
>[506907.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3a70]
>[506907.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3a70] width 1920 pitch 7680 (/4 1920)
>[506907.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b220]
>[506907.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b220] width 1920 pitch 7680 (/4 1920)
>[506913.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5096420]
>[506913.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5096420] width 1920 pitch 7680 (/4 1920)
>[506913.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509c230]
>[506913.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509c230] width 1920 pitch 7680 (/4 1920)
>[506913.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481db10]
>[506913.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481db10] width 1920 pitch 7680 (/4 1920)
>[506914.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f039d0]
>[506914.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f039d0] width 1920 pitch 7680 (/4 1920)
>[506914.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df220]
>[506914.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df220] width 1920 pitch 7680 (/4 1920)
>[506929.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x47bcd60]
>[506929.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x47bcd60] width 1920 pitch 7680 (/4 1920)
>[506930.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859250]
>[506930.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859250] width 1920 pitch 7680 (/4 1920)
>[506936.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4858bb0]
>[506936.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4858bb0] width 1920 pitch 7680 (/4 1920)
>[506937.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a2c80]
>[506937.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a2c80] width 1920 pitch 7680 (/4 1920)
>[506937.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03c70]
>[506937.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03c70] width 1920 pitch 7680 (/4 1920)
>[506937.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c810]
>[506937.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c810] width 1920 pitch 7680 (/4 1920)
>[506942.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da380]
>[506942.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da380] width 1920 pitch 7680 (/4 1920)
>[506944.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03c70]
>[506944.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03c70] width 1920 pitch 7680 (/4 1920)
>[506948.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03c70]
>[506948.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03c70] width 1920 pitch 7680 (/4 1920)
>[506948.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50305b0]
>[506948.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50305b0] width 1920 pitch 7680 (/4 1920)
>[506948.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030660]
>[506948.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030660] width 1920 pitch 7680 (/4 1920)
>[506949.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50305b0]
>[506949.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50305b0] width 1920 pitch 7680 (/4 1920)
>[506962.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5084e60]
>[506962.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5084e60] width 1920 pitch 7680 (/4 1920)
>[506962.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0e40]
>[506962.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0e40] width 1920 pitch 7680 (/4 1920)
>[506962.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e8410]
>[506962.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e8410] width 1920 pitch 7680 (/4 1920)
>[506962.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0e40]
>[506962.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0e40] width 1920 pitch 7680 (/4 1920)
>[506969.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc590]
>[506969.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc590] width 1920 pitch 7680 (/4 1920)
>[506969.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032ff0]
>[506969.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032ff0] width 1920 pitch 7680 (/4 1920)
>[506969.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc590]
>[506969.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc590] width 1920 pitch 7680 (/4 1920)
>[506969.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc590]
>[506969.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc590] width 1920 pitch 7680 (/4 1920)
>[506978.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b450]
>[506978.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b450] width 1920 pitch 7680 (/4 1920)
>[506986.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b450]
>[506986.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b450] width 1920 pitch 7680 (/4 1920)
>[506986.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b450]
>[506986.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b450] width 1920 pitch 7680 (/4 1920)
>[506986.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a1000]
>[506986.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a1000] width 1920 pitch 7680 (/4 1920)
>[506986.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032ff0]
>[506987.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032ff0] width 1920 pitch 7680 (/4 1920)
>[506997.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dcd00]
>[506997.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dcd00] width 1920 pitch 7680 (/4 1920)
>[506997.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030110]
>[506997.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030110] width 1920 pitch 7680 (/4 1920)
>[506997.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dcd00]
>[506997.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dcd00] width 1920 pitch 7680 (/4 1920)
>[506997.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030110]
>[506997.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030110] width 1920 pitch 7680 (/4 1920)
>[507022.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ea2d0]
>[507022.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ea2d0] width 1920 pitch 7680 (/4 1920)
>[507022.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c2a0]
>[507022.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c2a0] width 1920 pitch 7680 (/4 1920)
>[507022.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c0d0]
>[507022.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c0d0] width 1920 pitch 7680 (/4 1920)
>[507022.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c0d0]
>[507022.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c0d0] width 1920 pitch 7680 (/4 1920)
>[507023.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b80e0]
>[507023.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b80e0] width 1920 pitch 7680 (/4 1920)
>[507030.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509db30]
>[507030.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509db30] width 1920 pitch 7680 (/4 1920)
>[507030.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5033d40]
>[507030.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5033d40] width 1920 pitch 7680 (/4 1920)
>[507030.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0bfe0]
>[507030.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0bfe0] width 1920 pitch 7680 (/4 1920)
>[507030.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c090]
>[507030.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c090] width 1920 pitch 7680 (/4 1920)
>[507054.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826ee0]
>[507054.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826ee0] width 1920 pitch 7680 (/4 1920)
>[507058.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032d90]
>[507058.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032d90] width 1920 pitch 7680 (/4 1920)
>[507058.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4888680]
>[507058.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4888680] width 1920 pitch 7680 (/4 1920)
>[507058.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032b40]
>[507058.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032b40] width 1920 pitch 7680 (/4 1920)
>[507059.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4888680]
>[507059.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4888680] width 1920 pitch 7680 (/4 1920)
>[507060.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4888680]
>[507060.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4888680] width 1920 pitch 7680 (/4 1920)
>[507060.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4888680]
>[507060.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4888680] width 1920 pitch 7680 (/4 1920)
>[507060.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c0750]
>[507060.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c0750] width 1920 pitch 7680 (/4 1920)
>[507061.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78600]
>[507061.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78600] width 1920 pitch 7680 (/4 1920)
>[507064.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b370]
>[507064.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b370] width 1920 pitch 7680 (/4 1920)
>[507076.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827a60]
>[507076.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827a60] width 1920 pitch 7680 (/4 1920)
>[507077.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b370]
>[507077.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b370] width 1920 pitch 7680 (/4 1920)
>[507077.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5032b40]
>[507077.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5032b40] width 1920 pitch 7680 (/4 1920)
>[507077.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dcd00]
>[507077.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dcd00] width 1920 pitch 7680 (/4 1920)
>[507079.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dcd00]
>[507079.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dcd00] width 1920 pitch 7680 (/4 1920)
>[507102.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2822850]
>[507102.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2822850] width 1920 pitch 7680 (/4 1920)
>[507102.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4c30]
>[507102.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4c30] width 1920 pitch 7680 (/4 1920)
>[507102.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097250]
>[507102.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097250] width 1920 pitch 7680 (/4 1920)
>[507102.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4c30]
>[507102.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4c30] width 1920 pitch 7680 (/4 1920)
>[507117.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086870]
>[507117.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086870] width 1920 pitch 7680 (/4 1920)
>[507129.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481f450]
>[507129.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481f450] width 1920 pitch 7680 (/4 1920)
>[507129.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b7bb0]
>[507129.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b7bb0] width 1920 pitch 7680 (/4 1920)
>[507129.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a49b0]
>[507129.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a49b0] width 1920 pitch 7680 (/4 1920)
>[507129.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b7bb0]
>[507129.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b7bb0] width 1920 pitch 7680 (/4 1920)
>[507141.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4c70]
>[507141.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4c70] width 1920 pitch 7680 (/4 1920)
>[507141.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d18b0]
>[507141.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d18b0] width 1920 pitch 7680 (/4 1920)
>[507141.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b7bb0]
>[507141.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b7bb0] width 1920 pitch 7680 (/4 1920)
>[507142.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b390]
>[507142.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b390] width 1920 pitch 7680 (/4 1920)
>[507147.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d18b0]
>[507147.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d18b0] width 1920 pitch 7680 (/4 1920)
>[507147.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4c30]
>[507147.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4c30] width 1920 pitch 7680 (/4 1920)
>[507147.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5098490]
>[507147.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5098490] width 1920 pitch 7680 (/4 1920)
>[507147.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0b950]
>[507147.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0b950] width 1920 pitch 7680 (/4 1920)
>[507155.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611b910]
>[507155.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611b910] width 1920 pitch 7680 (/4 1920)
>[507162.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611b920]
>[507162.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611b920] width 1920 pitch 7680 (/4 1920)
>[507162.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502aa40]
>[507163.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502aa40] width 1920 pitch 7680 (/4 1920)
>[507163.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611af80]
>[507163.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611af80] width 1920 pitch 7680 (/4 1920)
>[507163.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502aa40]
>[507163.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502aa40] width 1920 pitch 7680 (/4 1920)
>[507169.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d9a10]
>[507169.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d9a10] width 1920 pitch 7680 (/4 1920)
>[507184.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4860590]
>[507184.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4860590] width 1920 pitch 7680 (/4 1920)
>[507215.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d16c0]
>[507215.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d16c0] width 1920 pitch 7680 (/4 1920)
>[507222.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5033d40]
>[507222.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5033d40] width 1920 pitch 7680 (/4 1920)
>[507222.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5033d40]
>[507222.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5033d40] width 1920 pitch 7680 (/4 1920)
>[507222.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507222.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507222.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b1a0]
>[507222.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b1a0] width 1920 pitch 7680 (/4 1920)
>[507230.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29db960]
>[507230.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29db960] width 1920 pitch 7680 (/4 1920)
>[507230.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4841510]
>[507230.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4841510] width 1920 pitch 7680 (/4 1920)
>[507231.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d2770]
>[507231.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d2770] width 1920 pitch 7680 (/4 1920)
>[507231.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4841510]
>[507231.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4841510] width 1920 pitch 7680 (/4 1920)
>[507231.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50966a0]
>[507231.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50966a0] width 1920 pitch 7680 (/4 1920)
>[507231.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5098d20]
>[507231.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5098d20] width 1920 pitch 7680 (/4 1920)
>[507231.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50966a0]
>[507231.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50966a0] width 1920 pitch 7680 (/4 1920)
>[507231.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ea220]
>[507232.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ea220] width 1920 pitch 7680 (/4 1920)
>[507232.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095c50]
>[507232.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095c50] width 1920 pitch 7680 (/4 1920)
>[507233.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095c50]
>[507233.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095c50] width 1920 pitch 7680 (/4 1920)
>[507233.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831890]
>[507233.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831890] width 1920 pitch 7680 (/4 1920)
>[507233.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095c50]
>[507233.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095c50] width 1920 pitch 7680 (/4 1920)
>[507235.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509d0a0]
>[507235.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509d0a0] width 1920 pitch 7680 (/4 1920)
>[507235.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9eb10]
>[507235.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9eb10] width 1920 pitch 7680 (/4 1920)
>[507235.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e44e0]
>[507235.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e44e0] width 1920 pitch 7680 (/4 1920)
>[507235.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9eb10]
>[507235.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9eb10] width 1920 pitch 7680 (/4 1920)
>[507237.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cf510]
>[507237.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cf510] width 1920 pitch 7680 (/4 1920)
>[507237.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507237.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485b200]
>[507237.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485b200] width 1920 pitch 7680 (/4 1920)
>[507237.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507237.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507251.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507251.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507251.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507251.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507251.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507251.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507251.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507251.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507251.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507251.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507251.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[507251.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[507251.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507251.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507251.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507251.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507251.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507251.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507251.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[507251.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[507251.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507252.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507287.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160ec0]
>[507287.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160ec0] width 1920 pitch 7680 (/4 1920)
>[507293.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485fb50]
>[507293.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485fb50] width 1920 pitch 7680 (/4 1920)
>[507293.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5033620]
>[507293.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5033620] width 1920 pitch 7680 (/4 1920)
>[507293.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5033620]
>[507293.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5033620] width 1920 pitch 7680 (/4 1920)
>[507293.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507293.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507298.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507298.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507299.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78500]
>[507299.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78500] width 1920 pitch 7680 (/4 1920)
>[507299.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507299.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507300.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78500]
>[507300.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78500] width 1920 pitch 7680 (/4 1920)
>[507300.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3160f80]
>[507300.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3160f80] width 1920 pitch 7680 (/4 1920)
>[507300.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4cb0]
>[507300.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4cb0] width 1920 pitch 7680 (/4 1920)
>[507300.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[507300.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[507300.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c78500]
>[507300.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c78500] width 1920 pitch 7680 (/4 1920)
>[507303.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0cb30]
>[507303.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0cb30] width 1920 pitch 7680 (/4 1920)
>[507319.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ad1d0]
>[507319.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ad1d0] width 1920 pitch 7680 (/4 1920)
>[507323.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e05e0]
>[507323.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e05e0] width 1920 pitch 7680 (/4 1920)
>[507341.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0760]
>[507341.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0760] width 1920 pitch 7680 (/4 1920)
>[507341.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083400]
>[507341.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083400] width 1920 pitch 7680 (/4 1920)
>[507341.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03b30]
>[507341.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03b30] width 1920 pitch 7680 (/4 1920)
>[507342.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5099240]
>[507342.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5099240] width 1920 pitch 7680 (/4 1920)
>[507349.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502a790]
>[507349.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502a790] width 1920 pitch 7680 (/4 1920)
>[507364.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ec7f0]
>[507364.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ec7f0] width 1920 pitch 7680 (/4 1920)
>[507379.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c6f90]
>[507379.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c6f90] width 1920 pitch 7680 (/4 1920)
>[507433.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f043b0]
>[507433.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f043b0] width 1920 pitch 7680 (/4 1920)
>[507455.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f043b0]
>[507455.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f043b0] width 1920 pitch 7680 (/4 1920)
>[507455.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d29e00]
>[507455.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d29e00] width 1920 pitch 7680 (/4 1920)
>[507455.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[507455.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[507457.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083400]
>[507457.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083400] width 1920 pitch 7680 (/4 1920)
>[507457.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[507457.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[507457.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ad1d0]
>[507457.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ad1d0] width 1920 pitch 7680 (/4 1920)
>[507457.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[507457.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[507457.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd0da0]
>[507457.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd0da0] width 1920 pitch 7680 (/4 1920)
>[507459.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd0da0]
>[507459.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd0da0] width 1920 pitch 7680 (/4 1920)
>[507459.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd0da0]
>[507459.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd0da0] width 1920 pitch 7680 (/4 1920)
>[507459.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60760]
>[507459.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60760] width 1920 pitch 7680 (/4 1920)
>[507472.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[507472.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[507472.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49df9f0]
>[507472.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49df9f0] width 1920 pitch 7680 (/4 1920)
>[507472.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2841610]
>[507472.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2841610] width 1920 pitch 7680 (/4 1920)
>[507492.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d1c0]
>[507492.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d1c0] width 1920 pitch 7680 (/4 1920)
>[507514.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297f7f0]
>[507514.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297f7f0] width 1920 pitch 7680 (/4 1920)
>[507529.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48773e0]
>[507529.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48773e0] width 1920 pitch 7680 (/4 1920)
>[507589.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc4550]
>[507589.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc4550] width 1920 pitch 7680 (/4 1920)
>[507604.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a9200]
>[507604.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a9200] width 1920 pitch 7680 (/4 1920)
>[507619.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881df0]
>[507619.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881df0] width 1920 pitch 7680 (/4 1920)
>[507769.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a232e0]
>[507769.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a232e0] width 1920 pitch 7680 (/4 1920)
>[507799.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297eb40]
>[507799.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297eb40] width 1920 pitch 7680 (/4 1920)
>[507829.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067c60]
>[507829.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067c60] width 1920 pitch 7680 (/4 1920)
>[507844.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297f170]
>[507844.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297f170] width 1920 pitch 7680 (/4 1920)
>[507874.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998e70]
>[507874.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998e70] width 1920 pitch 7680 (/4 1920)
>[507889.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998e10]
>[507889.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998e10] width 1920 pitch 7680 (/4 1920)
>[507919.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998e10]
>[507919.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998e10] width 1920 pitch 7680 (/4 1920)
>[507934.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29997d0]
>[507934.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29997d0] width 1920 pitch 7680 (/4 1920)
>[507949.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2998e10]
>[507949.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2998e10] width 1920 pitch 7680 (/4 1920)
>[507964.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29997d0]
>[507964.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29997d0] width 1920 pitch 7680 (/4 1920)
>[507979.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29997d0]
>[507979.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29997d0] width 1920 pitch 7680 (/4 1920)
>[508009.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29992a0]
>[508009.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29992a0] width 1920 pitch 7680 (/4 1920)
>[508069.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2996e70]
>[508069.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2996e70] width 1920 pitch 7680 (/4 1920)
>[508084.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5141690]
>[508084.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5141690] width 1920 pitch 7680 (/4 1920)
>[508099.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5067ac0]
>[508099.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5067ac0] width 1920 pitch 7680 (/4 1920)
>[508114.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2811140]
>[508114.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2811140] width 1920 pitch 7680 (/4 1920)
>[508189.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2812a10]
>[508189.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2812a10] width 1920 pitch 7680 (/4 1920)
>[508204.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2812ee0]
>[508204.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2812ee0] width 1920 pitch 7680 (/4 1920)
>[508249.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2811bb0]
>[508249.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2811bb0] width 1920 pitch 7680 (/4 1920)
>[508264.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2810dc0]
>[508264.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2810dc0] width 1920 pitch 7680 (/4 1920)
>[508309.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2812910]
>[508309.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2812910] width 1920 pitch 7680 (/4 1920)
>[508324.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2810dc0]
>[508324.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2810dc0] width 1920 pitch 7680 (/4 1920)
>[508369.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2813270]
>[508369.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2813270] width 1920 pitch 7680 (/4 1920)
>[508384.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2813270]
>[508384.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2813270] width 1920 pitch 7680 (/4 1920)
>[508519.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2810dc0]
>[508519.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2810dc0] width 1920 pitch 7680 (/4 1920)
>[508534.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2810dc0]
>[508534.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2810dc0] width 1920 pitch 7680 (/4 1920)
>[508549.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2812910]
>[508549.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2812910] width 1920 pitch 7680 (/4 1920)
>[508564.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29967b0]
>[508564.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29967b0] width 1920 pitch 7680 (/4 1920)
>[508684.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2813a00]
>[508684.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2813a00] width 1920 pitch 7680 (/4 1920)
>[508699.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2813eb0]
>[508699.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2813eb0] width 1920 pitch 7680 (/4 1920)
>[508744.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2813d30]
>[508744.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2813d30] width 1920 pitch 7680 (/4 1920)
>[508759.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2813cd0]
>[508759.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2813cd0] width 1920 pitch 7680 (/4 1920)
>[508774.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506a3a0]
>[508774.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506a3a0] width 1920 pitch 7680 (/4 1920)
>[508789.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506a610]
>[508789.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506a610] width 1920 pitch 7680 (/4 1920)
>[508879.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296cc40]
>[508879.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296cc40] width 1920 pitch 7680 (/4 1920)
>[508939.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5069f10]
>[508939.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5069f10] width 1920 pitch 7680 (/4 1920)
>[508969.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506abd0]
>[508969.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506abd0] width 1920 pitch 7680 (/4 1920)
>[509014.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832e30]
>[509014.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832e30] width 1920 pitch 7680 (/4 1920)
>[509016.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834970]
>[509016.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834970] width 1920 pitch 7680 (/4 1920)
>[509016.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28374b0]
>[509016.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28374b0] width 1920 pitch 7680 (/4 1920)
>[509016.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d81f0]
>[509016.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d81f0] width 1920 pitch 7680 (/4 1920)
>[509016.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296f2a0]
>[509016.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296f2a0] width 1920 pitch 7680 (/4 1920)
>[509016.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2833120]
>[509016.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2833120] width 1920 pitch 7680 (/4 1920)
>[509016.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5069de0]
>[509016.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5069de0] width 1920 pitch 7680 (/4 1920)
>[509016.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28374b0]
>[509016.487] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28374b0] width 1920 pitch 7680 (/4 1920)
>[509016.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5069de0]
>[509016.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5069de0] width 1920 pitch 7680 (/4 1920)
>[509016.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28374b0]
>[509016.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28374b0] width 1920 pitch 7680 (/4 1920)
>[509016.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5069de0]
>[509016.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5069de0] width 1920 pitch 7680 (/4 1920)
>[509016.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283e040]
>[509016.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283e040] width 1920 pitch 7680 (/4 1920)
>[509016.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94700]
>[509016.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94700] width 1920 pitch 7680 (/4 1920)
>[509016.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509016.587] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509016.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509016.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509016.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94700]
>[509016.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94700] width 1920 pitch 7680 (/4 1920)
>[509016.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509016.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509016.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60760]
>[509016.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60760] width 1920 pitch 7680 (/4 1920)
>[509016.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509017.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509017.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60760]
>[509017.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60760] width 1920 pitch 7680 (/4 1920)
>[509017.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f720]
>[509017.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f720] width 1920 pitch 7680 (/4 1920)
>[509017.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f720]
>[509017.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f720] width 1920 pitch 7680 (/4 1920)
>[509017.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509017.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509017.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60760]
>[509017.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60760] width 1920 pitch 7680 (/4 1920)
>[509017.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509017.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509017.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f720]
>[509017.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f720] width 1920 pitch 7680 (/4 1920)
>[509017.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509017.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509017.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60760]
>[509017.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60760] width 1920 pitch 7680 (/4 1920)
>[509017.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509017.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509017.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f720]
>[509017.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f720] width 1920 pitch 7680 (/4 1920)
>[509017.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0a7a0]
>[509017.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0a7a0] width 1920 pitch 7680 (/4 1920)
>[509017.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b60760]
>[509017.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b60760] width 1920 pitch 7680 (/4 1920)
>[509025.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[509025.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[509027.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48709f0]
>[509027.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48709f0] width 1920 pitch 7680 (/4 1920)
>[509027.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d82400]
>[509027.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d82400] width 1920 pitch 7680 (/4 1920)
>[509028.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48709f0]
>[509028.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48709f0] width 1920 pitch 7680 (/4 1920)
>[509029.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc7e0]
>[509029.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc7e0] width 1920 pitch 7680 (/4 1920)
>[509029.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[509029.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[509029.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc7e0]
>[509029.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc7e0] width 1920 pitch 7680 (/4 1920)
>[509029.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[509029.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[509029.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc7e0]
>[509029.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc7e0] width 1920 pitch 7680 (/4 1920)
>[509029.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[509029.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[509029.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dc7e0]
>[509029.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dc7e0] width 1920 pitch 7680 (/4 1920)
>[509029.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[509029.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[509029.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dbb40]
>[509029.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dbb40] width 1920 pitch 7680 (/4 1920)
>[509029.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dbb40]
>[509029.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dbb40] width 1920 pitch 7680 (/4 1920)
>[509029.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51db9f0]
>[509029.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51db9f0] width 1920 pitch 7680 (/4 1920)
>[509029.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[509029.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[509029.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dbb50]
>[509029.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dbb50] width 1920 pitch 7680 (/4 1920)
>[509029.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a930]
>[509029.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a930] width 1920 pitch 7680 (/4 1920)
>[509034.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509034.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[509034.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[509034.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5095be0]
>[509034.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5095be0] width 1920 pitch 7680 (/4 1920)
>[509036.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6e60]
>[509036.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6e60] width 1920 pitch 7680 (/4 1920)
>[509044.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4857a30]
>[509044.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4857a30] width 1920 pitch 7680 (/4 1920)
>[509104.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d90]
>[509104.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d90] width 1920 pitch 7680 (/4 1920)
>[509104.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4023990]
>[509104.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4023990] width 1920 pitch 7680 (/4 1920)
>[509104.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d90]
>[509104.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d90] width 1920 pitch 7680 (/4 1920)
>[509104.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4023990]
>[509104.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4023990] width 1920 pitch 7680 (/4 1920)
>[509104.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d90]
>[509104.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d90] width 1920 pitch 7680 (/4 1920)
>[509104.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x47bb8c0]
>[509104.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x47bb8c0] width 1920 pitch 7680 (/4 1920)
>[509108.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509108.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2d50]
>[509108.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2d50] width 1920 pitch 7680 (/4 1920)
>[509108.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7960]
>[509108.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7960] width 1920 pitch 7680 (/4 1920)
>[509113.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509113.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d26000]
>[509113.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d26000] width 1920 pitch 7680 (/4 1920)
>[509113.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283d9c0]
>[509113.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283d9c0] width 1920 pitch 7680 (/4 1920)
>[509115.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4a40]
>[509115.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4a40] width 1920 pitch 7680 (/4 1920)
>[509115.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4a40]
>[509115.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4a40] width 1920 pitch 7680 (/4 1920)
>[509115.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4a40]
>[509115.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4a40] width 1920 pitch 7680 (/4 1920)
>[509115.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e2c0]
>[509115.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e2c0] width 1920 pitch 7680 (/4 1920)
>[509115.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e2c0]
>[509115.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e2c0] width 1920 pitch 7680 (/4 1920)
>[509115.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e2c0]
>[509115.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e2c0] width 1920 pitch 7680 (/4 1920)
>[509115.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e7d40]
>[509115.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e7d40] width 1920 pitch 7680 (/4 1920)
>[509115.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cc90]
>[509115.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cc90] width 1920 pitch 7680 (/4 1920)
>[509115.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509115.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cc90]
>[509115.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cc90] width 1920 pitch 7680 (/4 1920)
>[509115.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507cd90]
>[509115.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507cd90] width 1920 pitch 7680 (/4 1920)
>[509130.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2835ae0]
>[509130.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2835ae0] width 1920 pitch 7680 (/4 1920)
>[509133.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509133.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509133.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509134.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509134.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509134.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509134.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509134.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509202.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509202.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509202.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509202.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509202.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509202.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509202.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509202.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509202.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509202.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509202.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509202.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509202.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509202.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509202.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509202.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509202.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509202.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509203.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509203.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509203.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509203.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509203.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509203.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509203.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509203.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509203.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509203.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509203.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509203.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509203.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509203.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509204.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509204.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509204.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509204.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509204.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509204.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509205.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509205.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509206.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509206.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509206.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827600]
>[509206.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827600] width 1920 pitch 7680 (/4 1920)
>[509206.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826950]
>[509206.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826950] width 1920 pitch 7680 (/4 1920)
>[509206.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bdb90]
>[509206.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bdb90] width 1920 pitch 7680 (/4 1920)
>[509206.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509206.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509206.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bdb90]
>[509206.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bdb90] width 1920 pitch 7680 (/4 1920)
>[509206.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509206.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509206.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bdb90]
>[509206.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bdb90] width 1920 pitch 7680 (/4 1920)
>[509206.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509206.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509206.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bdb90]
>[509206.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bdb90] width 1920 pitch 7680 (/4 1920)
>[509206.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39475f0]
>[509206.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39475f0] width 1920 pitch 7680 (/4 1920)
>[509207.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1620]
>[509207.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1620] width 1920 pitch 7680 (/4 1920)
>[509207.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d87de0]
>[509207.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d87de0] width 1920 pitch 7680 (/4 1920)
>[509207.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4fc0]
>[509207.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4fc0] width 1920 pitch 7680 (/4 1920)
>[509208.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39475f0]
>[509208.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39475f0] width 1920 pitch 7680 (/4 1920)
>[509209.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[509209.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[509209.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c070]
>[509209.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c070] width 1920 pitch 7680 (/4 1920)
>[509209.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03280]
>[509209.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03280] width 1920 pitch 7680 (/4 1920)
>[509209.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ee50]
>[509209.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ee50] width 1920 pitch 7680 (/4 1920)
>[509209.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca1620]
>[509209.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca1620] width 1920 pitch 7680 (/4 1920)
>[509209.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c4ee50]
>[509209.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c4ee50] width 1920 pitch 7680 (/4 1920)
>[509210.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4fc0]
>[509210.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4fc0] width 1920 pitch 7680 (/4 1920)
>[509210.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509210.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509210.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[509210.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[509210.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509210.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509210.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[509210.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[509210.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509210.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509210.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[509210.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[509210.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39475f0]
>[509210.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39475f0] width 1920 pitch 7680 (/4 1920)
>[509210.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1c2c0]
>[509210.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1c2c0] width 1920 pitch 7680 (/4 1920)
>[509210.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d87de0]
>[509210.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d87de0] width 1920 pitch 7680 (/4 1920)
>[509224.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c010]
>[509224.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c010] width 1920 pitch 7680 (/4 1920)
>[509239.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c010]
>[509239.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c010] width 1920 pitch 7680 (/4 1920)
>[509329.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c010]
>[509329.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c010] width 1920 pitch 7680 (/4 1920)
>[509344.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509344.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509389.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509389.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509404.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509404.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509419.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509419.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509434.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509434.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509461.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c010]
>[509461.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c010] width 1920 pitch 7680 (/4 1920)
>[509461.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c010]
>[509461.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c010] width 1920 pitch 7680 (/4 1920)
>[509461.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509461.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509461.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509461.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509479.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07e50]
>[509479.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07e50] width 1920 pitch 7680 (/4 1920)
>[509481.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509481.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509481.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509481.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509481.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509481.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509481.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07e50]
>[509481.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07e50] width 1920 pitch 7680 (/4 1920)
>[509494.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509494.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509524.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509524.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509539.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07e50]
>[509539.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07e50] width 1920 pitch 7680 (/4 1920)
>[509554.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509554.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509569.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509569.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509584.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509584.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509614.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509614.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509629.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f07e50]
>[509629.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f07e50] width 1920 pitch 7680 (/4 1920)
>[509674.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509674.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509689.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509689.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509704.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509704.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509719.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509719.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509734.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fda960]
>[509734.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fda960] width 1920 pitch 7680 (/4 1920)
>[509794.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fda960]
>[509794.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fda960] width 1920 pitch 7680 (/4 1920)
>[509809.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509809.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509839.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509839.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509854.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509854.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509914.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509914.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[509959.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fda960]
>[509959.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fda960] width 1920 pitch 7680 (/4 1920)
>[509974.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[509974.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[509989.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[509989.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[510004.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fda960]
>[510004.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fda960] width 1920 pitch 7680 (/4 1920)
>[510019.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[510019.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[510034.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f18740]
>[510034.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f18740] width 1920 pitch 7680 (/4 1920)
>[510049.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6f70]
>[510049.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6f70] width 1920 pitch 7680 (/4 1920)
>[510081.834] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[510081.834] (II) RADEON(0): Using hsync ranges from config file
>[510081.834] (II) RADEON(0): Using vrefresh ranges from config file
>[510081.834] (II) RADEON(0): Printing DDC gathered Modelines:
>[510081.834] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[510081.834] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[510081.834] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[510081.834] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[510081.834] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[510081.834] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[510081.834] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[510081.834] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[510081.834] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[510081.834] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[510081.834] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[510081.834] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[510171.673] (II) RADEON(0): RADEONSaveScreen(2)
>[510171.673] (II) RADEON(0): RADEONSaveScreen(0)
>[510282.638] (II) RADEON(0): RADEONSaveScreen(1)
>[510283.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510283.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510297.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826990]
>[510297.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826990] width 1920 pitch 7680 (/4 1920)
>[510312.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510312.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510342.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510342.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510357.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510357.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510372.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510372.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510387.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510387.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510537.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510537.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510552.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510552.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510582.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510582.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510597.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510597.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510627.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510627.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510642.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510642.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510657.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510657.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510672.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510672.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510687.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510687.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510702.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507ca50]
>[510702.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507ca50] width 1920 pitch 7680 (/4 1920)
>[510717.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509e670]
>[510717.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509e670] width 1920 pitch 7680 (/4 1920)
>[510732.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a6b790]
>[510732.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a6b790] width 1920 pitch 7680 (/4 1920)
>[510747.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a882f0]
>[510747.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a882f0] width 1920 pitch 7680 (/4 1920)
>[510762.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdc1e0]
>[510762.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdc1e0] width 1920 pitch 7680 (/4 1920)
>[510777.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3290]
>[510777.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3290] width 1920 pitch 7680 (/4 1920)
>[510792.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c73e0]
>[510792.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c73e0] width 1920 pitch 7680 (/4 1920)
>[510807.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eab410]
>[510807.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eab410] width 1920 pitch 7680 (/4 1920)
>[510822.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d2760]
>[510822.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d2760] width 1920 pitch 7680 (/4 1920)
>[510837.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f65c0]
>[510837.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f65c0] width 1920 pitch 7680 (/4 1920)
>[510883.311] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[510883.311] (II) RADEON(0): Using hsync ranges from config file
>[510883.311] (II) RADEON(0): Using vrefresh ranges from config file
>[510883.311] (II) RADEON(0): Printing DDC gathered Modelines:
>[510883.311] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[510883.311] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[510883.311] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[510883.311] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[510883.311] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[510883.311] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[510883.311] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[510883.311] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[510883.311] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[510883.311] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[510883.311] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[510883.311] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[510973.654] (II) RADEON(0): RADEONSaveScreen(2)
>[510973.654] (II) RADEON(0): RADEONSaveScreen(0)
>[512906.202] (II) RADEON(0): RADEONSaveScreen(1)
>[512914.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[512914.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[512936.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8f20]
>[512936.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8f20] width 1920 pitch 7680 (/4 1920)
>[512951.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a14930]
>[512951.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a14930] width 1920 pitch 7680 (/4 1920)
>[513041.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3911e10]
>[513041.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3911e10] width 1920 pitch 7680 (/4 1920)
>[513056.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a13880]
>[513056.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a13880] width 1920 pitch 7680 (/4 1920)
>[513086.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a29c0]
>[513086.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a29c0] width 1920 pitch 7680 (/4 1920)
>[513131.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d4410]
>[513131.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d4410] width 1920 pitch 7680 (/4 1920)
>[513146.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[513146.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[513176.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0f0]
>[513176.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0f0] width 1920 pitch 7680 (/4 1920)
>[513191.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a29c0]
>[513191.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a29c0] width 1920 pitch 7680 (/4 1920)
>[513206.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486d8a0]
>[513206.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486d8a0] width 1920 pitch 7680 (/4 1920)
>[513221.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918a50]
>[513221.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918a50] width 1920 pitch 7680 (/4 1920)
>[513236.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b85e80]
>[513236.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b85e80] width 1920 pitch 7680 (/4 1920)
>[513251.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486d8a0]
>[513251.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486d8a0] width 1920 pitch 7680 (/4 1920)
>[513326.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a13880]
>[513326.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a13880] width 1920 pitch 7680 (/4 1920)
>[513341.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d4410]
>[513341.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d4410] width 1920 pitch 7680 (/4 1920)
>[513491.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a29c0]
>[513491.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a29c0] width 1920 pitch 7680 (/4 1920)
>[513506.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4f20]
>[513506.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4f20] width 1920 pitch 7680 (/4 1920)
>[513521.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247cbb0]
>[513521.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247cbb0] width 1920 pitch 7680 (/4 1920)
>[513536.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247cbb0]
>[513536.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247cbb0] width 1920 pitch 7680 (/4 1920)
>[513551.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086960]
>[513551.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086960] width 1920 pitch 7680 (/4 1920)
>[513581.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486d8a0]
>[513581.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486d8a0] width 1920 pitch 7680 (/4 1920)
>[513596.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x395aac0]
>[513596.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x395aac0] width 1920 pitch 7680 (/4 1920)
>[513611.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3911e10]
>[513611.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3911e10] width 1920 pitch 7680 (/4 1920)
>[513626.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486d8a0]
>[513626.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486d8a0] width 1920 pitch 7680 (/4 1920)
>[513641.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[513641.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[513686.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a13880]
>[513686.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a13880] width 1920 pitch 7680 (/4 1920)
>[513716.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3911e10]
>[513716.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3911e10] width 1920 pitch 7680 (/4 1920)
>[513761.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce8f20]
>[513761.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce8f20] width 1920 pitch 7680 (/4 1920)
>[513776.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a29c0]
>[513776.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a29c0] width 1920 pitch 7680 (/4 1920)
>[513806.462] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[513806.462] (II) RADEON(0): Using hsync ranges from config file
>[513806.462] (II) RADEON(0): Using vrefresh ranges from config file
>[513806.462] (II) RADEON(0): Printing DDC gathered Modelines:
>[513806.462] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[513806.462] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[513806.462] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[513806.462] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[513806.462] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[513806.462] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[513806.462] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[513806.462] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[513806.462] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[513806.462] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[513806.462] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[513806.462] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[513896.673] (II) RADEON(0): RADEONSaveScreen(2)
>[513896.673] (II) RADEON(0): RADEONSaveScreen(0)
>[521108.773] (II) RADEON(0): RADEONSaveScreen(1)
>[521109.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a29c0]
>[521109.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a29c0] width 1920 pitch 7680 (/4 1920)
>[521115.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486d8a0]
>[521115.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486d8a0] width 1920 pitch 7680 (/4 1920)
>[521115.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521115.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521115.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[521115.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[521116.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521116.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521116.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521116.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521116.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521116.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521116.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521116.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521116.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521116.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521116.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521116.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521116.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521116.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521116.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521116.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521116.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521116.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521116.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5085df0]
>[521116.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5085df0] width 1920 pitch 7680 (/4 1920)
>[521116.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[521117.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[521117.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a947b0]
>[521117.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a947b0] width 1920 pitch 7680 (/4 1920)
>[521117.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521117.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521117.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486d8a0]
>[521118.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486d8a0] width 1920 pitch 7680 (/4 1920)
>[521118.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[521118.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[521118.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a947b0]
>[521118.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a947b0] width 1920 pitch 7680 (/4 1920)
>[521118.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521118.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521119.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521119.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521119.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf1b0]
>[521119.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf1b0] width 1920 pitch 7680 (/4 1920)
>[521119.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521119.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521119.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf1b0]
>[521119.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf1b0] width 1920 pitch 7680 (/4 1920)
>[521119.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521119.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521119.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf1b0]
>[521119.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf1b0] width 1920 pitch 7680 (/4 1920)
>[521119.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca2b60]
>[521119.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca2b60] width 1920 pitch 7680 (/4 1920)
>[521119.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ddf1b0]
>[521119.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ddf1b0] width 1920 pitch 7680 (/4 1920)
>[521119.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38f1830]
>[521119.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38f1830] width 1920 pitch 7680 (/4 1920)
>[521184.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d21e0]
>[521184.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d21e0] width 1920 pitch 7680 (/4 1920)
>[521195.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fca130]
>[521195.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fca130] width 1920 pitch 7680 (/4 1920)
>[521195.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d2380]
>[521195.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d2380] width 1920 pitch 7680 (/4 1920)
>[521195.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fca130]
>[521195.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fca130] width 1920 pitch 7680 (/4 1920)
>[521195.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d2380]
>[521195.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d2380] width 1920 pitch 7680 (/4 1920)
>[521195.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d2160]
>[521195.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d2160] width 1920 pitch 7680 (/4 1920)
>[521195.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28357b0]
>[521195.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28357b0] width 1920 pitch 7680 (/4 1920)
>[521195.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840e60]
>[521195.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840e60] width 1920 pitch 7680 (/4 1920)
>[521195.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502f4c0]
>[521195.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502f4c0] width 1920 pitch 7680 (/4 1920)
>[521195.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9c20]
>[521195.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9c20] width 1920 pitch 7680 (/4 1920)
>[521195.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9c20]
>[521195.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9c20] width 1920 pitch 7680 (/4 1920)
>[521195.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9e60]
>[521195.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9e60] width 1920 pitch 7680 (/4 1920)
>[521195.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502f4c0]
>[521195.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502f4c0] width 1920 pitch 7680 (/4 1920)
>[521195.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9e60]
>[521195.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9e60] width 1920 pitch 7680 (/4 1920)
>[521195.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502f4c0]
>[521195.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502f4c0] width 1920 pitch 7680 (/4 1920)
>[521196.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fb9e60]
>[521196.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fb9e60] width 1920 pitch 7680 (/4 1920)
>[521196.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502f4c0]
>[521196.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502f4c0] width 1920 pitch 7680 (/4 1920)
>[521196.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d9fd0]
>[521196.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d9fd0] width 1920 pitch 7680 (/4 1920)
>[521196.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502f4c0]
>[521196.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502f4c0] width 1920 pitch 7680 (/4 1920)
>[521196.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d460]
>[521196.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d460] width 1920 pitch 7680 (/4 1920)
>[521196.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2985b90]
>[521196.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2985b90] width 1920 pitch 7680 (/4 1920)
>[521196.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25507a0]
>[521196.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25507a0] width 1920 pitch 7680 (/4 1920)
>[521196.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d460]
>[521196.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d460] width 1920 pitch 7680 (/4 1920)
>[521197.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d08b0]
>[521197.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d08b0] width 1920 pitch 7680 (/4 1920)
>[521197.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0850]
>[521197.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0850] width 1920 pitch 7680 (/4 1920)
>[521197.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0b30]
>[521197.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0b30] width 1920 pitch 7680 (/4 1920)
>[521197.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0900]
>[521197.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0900] width 1920 pitch 7680 (/4 1920)
>[521197.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6cc0]
>[521197.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6cc0] width 1920 pitch 7680 (/4 1920)
>[521197.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48423d0]
>[521197.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48423d0] width 1920 pitch 7680 (/4 1920)
>[521197.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6c60]
>[521197.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6c60] width 1920 pitch 7680 (/4 1920)
>[521197.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2890]
>[521197.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2890] width 1920 pitch 7680 (/4 1920)
>[521197.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2830]
>[521197.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2830] width 1920 pitch 7680 (/4 1920)
>[521197.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c27d0]
>[521197.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c27d0] width 1920 pitch 7680 (/4 1920)
>[521197.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5145510]
>[521197.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5145510] width 1920 pitch 7680 (/4 1920)
>[521197.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a080f0]
>[521197.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a080f0] width 1920 pitch 7680 (/4 1920)
>[521197.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a082f0]
>[521197.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a082f0] width 1920 pitch 7680 (/4 1920)
>[521197.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a080f0]
>[521197.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a080f0] width 1920 pitch 7680 (/4 1920)
>[521197.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a082c0]
>[521197.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a082c0] width 1920 pitch 7680 (/4 1920)
>[521197.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a080f0]
>[521197.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a080f0] width 1920 pitch 7680 (/4 1920)
>[521197.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a08170]
>[521197.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a08170] width 1920 pitch 7680 (/4 1920)
>[521197.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a080f0]
>[521197.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a080f0] width 1920 pitch 7680 (/4 1920)
>[521197.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef5a0]
>[521197.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef5a0] width 1920 pitch 7680 (/4 1920)
>[521197.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a080f0]
>[521197.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a080f0] width 1920 pitch 7680 (/4 1920)
>[521197.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503acb0]
>[521197.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503acb0] width 1920 pitch 7680 (/4 1920)
>[521197.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6e250]
>[521197.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6e250] width 1920 pitch 7680 (/4 1920)
>[521197.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5275f90]
>[521197.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5275f90] width 1920 pitch 7680 (/4 1920)
>[521197.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52761c0]
>[521197.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52761c0] width 1920 pitch 7680 (/4 1920)
>[521199.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611c180]
>[521199.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611c180] width 1920 pitch 7680 (/4 1920)
>[521229.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505ad00]
>[521229.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505ad00] width 1920 pitch 7680 (/4 1920)
>[521244.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1a580]
>[521244.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1a580] width 1920 pitch 7680 (/4 1920)
>[521289.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2822740]
>[521289.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2822740] width 1920 pitch 7680 (/4 1920)
>[521319.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8b270]
>[521319.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8b270] width 1920 pitch 7680 (/4 1920)
>[521364.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa320]
>[521364.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa320] width 1920 pitch 7680 (/4 1920)
>[521379.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535cf00]
>[521379.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535cf00] width 1920 pitch 7680 (/4 1920)
>[521394.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bac400]
>[521394.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bac400] width 1920 pitch 7680 (/4 1920)
>[521409.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02d80]
>[521409.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02d80] width 1920 pitch 7680 (/4 1920)
>[521424.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521424.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521439.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4a80]
>[521439.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4a80] width 1920 pitch 7680 (/4 1920)
>[521469.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af0d10]
>[521469.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af0d10] width 1920 pitch 7680 (/4 1920)
>[521484.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc3570]
>[521484.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc3570] width 1920 pitch 7680 (/4 1920)
>[521514.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cadf0]
>[521514.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cadf0] width 1920 pitch 7680 (/4 1920)
>[521529.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5094910]
>[521529.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5094910] width 1920 pitch 7680 (/4 1920)
>[521559.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30606f0]
>[521559.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30606f0] width 1920 pitch 7680 (/4 1920)
>[521574.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f59e30]
>[521574.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f59e30] width 1920 pitch 7680 (/4 1920)
>[521584.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501cf60]
>[521584.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501cf60] width 1920 pitch 7680 (/4 1920)
>[521586.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cadf0]
>[521586.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cadf0] width 1920 pitch 7680 (/4 1920)
>[521586.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebcf20]
>[521586.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebcf20] width 1920 pitch 7680 (/4 1920)
>[521586.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521586.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521586.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebcf20]
>[521586.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebcf20] width 1920 pitch 7680 (/4 1920)
>[521586.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521586.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521586.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebcf20]
>[521586.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebcf20] width 1920 pitch 7680 (/4 1920)
>[521586.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521586.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521586.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebcf20]
>[521586.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebcf20] width 1920 pitch 7680 (/4 1920)
>[521586.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521586.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521586.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebcf20]
>[521586.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebcf20] width 1920 pitch 7680 (/4 1920)
>[521586.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521586.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521586.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebcf20]
>[521586.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebcf20] width 1920 pitch 7680 (/4 1920)
>[521591.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e9c0]
>[521591.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e9c0] width 1920 pitch 7680 (/4 1920)
>[521594.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bac400]
>[521594.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bac400] width 1920 pitch 7680 (/4 1920)
>[521594.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521594.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521594.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521594.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521594.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521594.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521594.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[521594.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[521594.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de68d0]
>[521594.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de68d0] width 1920 pitch 7680 (/4 1920)
>[521619.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a4b0]
>[521619.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a4b0] width 1920 pitch 7680 (/4 1920)
>[521634.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b9e20]
>[521634.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b9e20] width 1920 pitch 7680 (/4 1920)
>[521649.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53581e0]
>[521649.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53581e0] width 1920 pitch 7680 (/4 1920)
>[521679.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5d2a0]
>[521679.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5d2a0] width 1920 pitch 7680 (/4 1920)
>[521694.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50613f0]
>[521694.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50613f0] width 1920 pitch 7680 (/4 1920)
>[521904.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6ffe0]
>[521904.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6ffe0] width 1920 pitch 7680 (/4 1920)
>[521934.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c429b0]
>[521934.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c429b0] width 1920 pitch 7680 (/4 1920)
>[522009.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6c150]
>[522009.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6c150] width 1920 pitch 7680 (/4 1920)
>[522024.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1b570]
>[522024.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1b570] width 1920 pitch 7680 (/4 1920)
>[522174.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c75a0]
>[522174.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c75a0] width 1920 pitch 7680 (/4 1920)
>[522189.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d85e0]
>[522189.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d85e0] width 1920 pitch 7680 (/4 1920)
>[522204.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cadf0]
>[522204.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cadf0] width 1920 pitch 7680 (/4 1920)
>[522219.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af0d10]
>[522219.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af0d10] width 1920 pitch 7680 (/4 1920)
>[522249.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af0d10]
>[522249.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af0d10] width 1920 pitch 7680 (/4 1920)
>[522264.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[522264.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[522279.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d0920]
>[522279.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d0920] width 1920 pitch 7680 (/4 1920)
>[522294.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d0920]
>[522294.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d0920] width 1920 pitch 7680 (/4 1920)
>[522309.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38de320]
>[522309.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38de320] width 1920 pitch 7680 (/4 1920)
>[522324.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d78a0]
>[522324.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d78a0] width 1920 pitch 7680 (/4 1920)
>[522339.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e077c0]
>[522339.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e077c0] width 1920 pitch 7680 (/4 1920)
>[522369.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94270]
>[522369.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94270] width 1920 pitch 7680 (/4 1920)
>[522384.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[522384.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[522399.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465830]
>[522399.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465830] width 1920 pitch 7680 (/4 1920)
>[522426.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[522426.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[522426.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9c90]
>[522426.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9c90] width 1920 pitch 7680 (/4 1920)
>[522426.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b360]
>[522426.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b360] width 1920 pitch 7680 (/4 1920)
>[522426.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9c90]
>[522427.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9c90] width 1920 pitch 7680 (/4 1920)
>[522427.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b360]
>[522427.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b360] width 1920 pitch 7680 (/4 1920)
>[522427.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9c90]
>[522427.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9c90] width 1920 pitch 7680 (/4 1920)
>[522427.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b360]
>[522427.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b360] width 1920 pitch 7680 (/4 1920)
>[522427.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9c90]
>[522427.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9c90] width 1920 pitch 7680 (/4 1920)
>[522427.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b360]
>[522427.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b360] width 1920 pitch 7680 (/4 1920)
>[522427.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9c90]
>[522427.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9c90] width 1920 pitch 7680 (/4 1920)
>[522427.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b360]
>[522427.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b360] width 1920 pitch 7680 (/4 1920)
>[522427.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd9c90]
>[522428.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd9c90] width 1920 pitch 7680 (/4 1920)
>[522428.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b360]
>[522428.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b360] width 1920 pitch 7680 (/4 1920)
>[522428.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d35810]
>[522428.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d35810] width 1920 pitch 7680 (/4 1920)
>[522428.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cab730]
>[522428.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cab730] width 1920 pitch 7680 (/4 1920)
>[522428.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d35810]
>[522428.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d35810] width 1920 pitch 7680 (/4 1920)
>[522428.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cab730]
>[522428.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cab730] width 1920 pitch 7680 (/4 1920)
>[522428.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d35810]
>[522428.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d35810] width 1920 pitch 7680 (/4 1920)
>[522428.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4cab730]
>[522428.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4cab730] width 1920 pitch 7680 (/4 1920)
>[522428.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d35810]
>[522428.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d35810] width 1920 pitch 7680 (/4 1920)
>[522428.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80f60]
>[522428.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80f60] width 1920 pitch 7680 (/4 1920)
>[522434.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df62b0]
>[522434.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df62b0] width 1920 pitch 7680 (/4 1920)
>[522434.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522434.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522434.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522434.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522434.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522434.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522434.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522434.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522434.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522434.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522434.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522434.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522434.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522434.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522434.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522434.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522434.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522434.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522434.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522434.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522435.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522435.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522435.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522435.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522436.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522436.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522436.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[522436.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[522437.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[522437.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[522437.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da15f0]
>[522437.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da15f0] width 1920 pitch 7680 (/4 1920)
>[522437.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f73a30]
>[522437.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f73a30] width 1920 pitch 7680 (/4 1920)
>[522437.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98e90]
>[522437.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98e90] width 1920 pitch 7680 (/4 1920)
>[522437.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f73a30]
>[522437.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f73a30] width 1920 pitch 7680 (/4 1920)
>[522437.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98e90]
>[522437.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98e90] width 1920 pitch 7680 (/4 1920)
>[522437.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f73a30]
>[522437.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f73a30] width 1920 pitch 7680 (/4 1920)
>[522437.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98e90]
>[522437.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98e90] width 1920 pitch 7680 (/4 1920)
>[522437.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ba70]
>[522437.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ba70] width 1920 pitch 7680 (/4 1920)
>[522441.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a5bbf0]
>[522441.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a5bbf0] width 1920 pitch 7680 (/4 1920)
>[522441.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ee0d0]
>[522441.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ee0d0] width 1920 pitch 7680 (/4 1920)
>[522442.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[522442.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[522442.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[522442.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[522442.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[522442.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[522442.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[522442.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[522442.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[522442.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[522442.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[522442.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[522442.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[522442.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[522442.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2330c70]
>[522442.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2330c70] width 1920 pitch 7680 (/4 1920)
>[522442.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[522442.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[522442.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca590]
>[522442.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca590] width 1920 pitch 7680 (/4 1920)
>[522443.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dab720]
>[522443.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dab720] width 1920 pitch 7680 (/4 1920)
>[522443.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb1b40]
>[522443.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb1b40] width 1920 pitch 7680 (/4 1920)
>[522443.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dab720]
>[522443.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dab720] width 1920 pitch 7680 (/4 1920)
>[522443.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb1b40]
>[522443.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb1b40] width 1920 pitch 7680 (/4 1920)
>[522443.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dab720]
>[522443.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dab720] width 1920 pitch 7680 (/4 1920)
>[522443.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb1b40]
>[522443.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb1b40] width 1920 pitch 7680 (/4 1920)
>[522443.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dab720]
>[522443.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dab720] width 1920 pitch 7680 (/4 1920)
>[522443.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944320]
>[522443.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944320] width 1920 pitch 7680 (/4 1920)
>[522444.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80f60]
>[522444.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80f60] width 1920 pitch 7680 (/4 1920)
>[522445.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[522445.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[522445.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[522445.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[522445.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[522445.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[522445.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[522445.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[522445.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[522445.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[522445.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[522445.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[522445.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[522445.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[522445.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[522445.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[522445.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[522445.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[522446.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[522446.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[522446.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe000]
>[522446.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe000] width 1920 pitch 7680 (/4 1920)
>[522446.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250da90]
>[522446.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250da90] width 1920 pitch 7680 (/4 1920)
>[522446.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe000]
>[522446.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe000] width 1920 pitch 7680 (/4 1920)
>[522446.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250da90]
>[522446.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250da90] width 1920 pitch 7680 (/4 1920)
>[522446.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe000]
>[522446.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe000] width 1920 pitch 7680 (/4 1920)
>[522446.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250da90]
>[522446.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250da90] width 1920 pitch 7680 (/4 1920)
>[522446.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe000]
>[522446.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe000] width 1920 pitch 7680 (/4 1920)
>[522446.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250da90]
>[522446.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250da90] width 1920 pitch 7680 (/4 1920)
>[522468.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0440]
>[522468.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0440] width 1920 pitch 7680 (/4 1920)
>[522468.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[522468.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[522519.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d4b0]
>[522519.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d4b0] width 1920 pitch 7680 (/4 1920)
>[522534.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d4b0]
>[522534.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d4b0] width 1920 pitch 7680 (/4 1920)
>[522549.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d4b0]
>[522549.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d4b0] width 1920 pitch 7680 (/4 1920)
>[522594.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d212c0]
>[522594.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d212c0] width 1920 pitch 7680 (/4 1920)
>[522624.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d212c0]
>[522624.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d212c0] width 1920 pitch 7680 (/4 1920)
>[522639.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d212c0]
>[522639.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d212c0] width 1920 pitch 7680 (/4 1920)
>[522729.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f93f0]
>[522729.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f93f0] width 1920 pitch 7680 (/4 1920)
>[522744.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d212c0]
>[522744.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d212c0] width 1920 pitch 7680 (/4 1920)
>[522834.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d4b0]
>[522834.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d4b0] width 1920 pitch 7680 (/4 1920)
>[522849.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d4b0]
>[522849.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d4b0] width 1920 pitch 7680 (/4 1920)
>[522894.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f93f0]
>[522894.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f93f0] width 1920 pitch 7680 (/4 1920)
>[522909.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6d4b0]
>[522909.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6d4b0] width 1920 pitch 7680 (/4 1920)
>[522924.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f93f0]
>[522924.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f93f0] width 1920 pitch 7680 (/4 1920)
>[522939.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f93f0]
>[522939.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f93f0] width 1920 pitch 7680 (/4 1920)
>[523069.063] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[523069.063] (II) RADEON(0): Using hsync ranges from config file
>[523069.063] (II) RADEON(0): Using vrefresh ranges from config file
>[523069.063] (II) RADEON(0): Printing DDC gathered Modelines:
>[523069.063] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[523069.063] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[523069.063] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[523069.063] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[523069.063] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[523069.063] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[523069.063] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[523069.063] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[523069.063] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[523069.063] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[523069.063] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[523069.063] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[523159.659] (II) RADEON(0): RADEONSaveScreen(2)
>[523159.659] (II) RADEON(0): RADEONSaveScreen(0)
>[540891.006] (II) RADEON(0): RADEONSaveScreen(1)
>[540891.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f93f0]
>[540891.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f93f0] width 1920 pitch 7680 (/4 1920)
>[540906.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c3d40]
>[540906.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c3d40] width 1920 pitch 7680 (/4 1920)
>[540921.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a176e0]
>[540921.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a176e0] width 1920 pitch 7680 (/4 1920)
>[540996.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4bf70]
>[540996.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4bf70] width 1920 pitch 7680 (/4 1920)
>[541011.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba590]
>[541011.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba590] width 1920 pitch 7680 (/4 1920)
>[541161.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24781f0]
>[541161.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24781f0] width 1920 pitch 7680 (/4 1920)
>[541176.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6840]
>[541176.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6840] width 1920 pitch 7680 (/4 1920)
>[541191.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019ab0]
>[541191.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019ab0] width 1920 pitch 7680 (/4 1920)
>[541206.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[541206.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[541210.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c150]
>[541210.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c150] width 1920 pitch 7680 (/4 1920)
>[541210.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541210.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541210.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c150]
>[541210.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c150] width 1920 pitch 7680 (/4 1920)
>[541210.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541210.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541210.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c150]
>[541210.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c150] width 1920 pitch 7680 (/4 1920)
>[541210.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541210.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541210.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c150]
>[541210.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c150] width 1920 pitch 7680 (/4 1920)
>[541211.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541211.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541211.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c150]
>[541211.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c150] width 1920 pitch 7680 (/4 1920)
>[541211.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541211.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541211.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d832b0]
>[541211.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d832b0] width 1920 pitch 7680 (/4 1920)
>[541211.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541211.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541211.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7fc40]
>[541211.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7fc40] width 1920 pitch 7680 (/4 1920)
>[541212.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541212.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541213.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2fc0]
>[541213.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2fc0] width 1920 pitch 7680 (/4 1920)
>[541214.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541214.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541214.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d832b0]
>[541214.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d832b0] width 1920 pitch 7680 (/4 1920)
>[541214.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541214.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541214.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d832b0]
>[541214.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d832b0] width 1920 pitch 7680 (/4 1920)
>[541214.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541214.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541214.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d832b0]
>[541214.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d832b0] width 1920 pitch 7680 (/4 1920)
>[541214.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa43b0]
>[541214.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa43b0] width 1920 pitch 7680 (/4 1920)
>[541214.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d832b0]
>[541214.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d832b0] width 1920 pitch 7680 (/4 1920)
>[541214.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87930]
>[541214.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87930] width 1920 pitch 7680 (/4 1920)
>[541221.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87930]
>[541221.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87930] width 1920 pitch 7680 (/4 1920)
>[541251.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24781f0]
>[541251.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24781f0] width 1920 pitch 7680 (/4 1920)
>[541281.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2fc0]
>[541281.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2fc0] width 1920 pitch 7680 (/4 1920)
>[541296.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[541296.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[541386.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c150]
>[541386.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c150] width 1920 pitch 7680 (/4 1920)
>[541401.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[541401.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[541536.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1a480]
>[541536.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1a480] width 1920 pitch 7680 (/4 1920)
>[541551.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbd40]
>[541551.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbd40] width 1920 pitch 7680 (/4 1920)
>[541686.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2920]
>[541686.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2920] width 1920 pitch 7680 (/4 1920)
>[541716.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a176e0]
>[541716.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a176e0] width 1920 pitch 7680 (/4 1920)
>[541816.670] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[541816.670] (II) RADEON(0): Using hsync ranges from config file
>[541816.670] (II) RADEON(0): Using vrefresh ranges from config file
>[541816.670] (II) RADEON(0): Printing DDC gathered Modelines:
>[541816.670] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[541816.670] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[541816.670] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[541816.670] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[541816.670] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[541816.670] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[541816.670] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[541816.670] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[541816.670] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[541816.670] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[541816.670] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[541816.670] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[541906.656] (II) RADEON(0): RADEONSaveScreen(2)
>[541906.656] (II) RADEON(0): RADEONSaveScreen(0)
>[542986.000] (II) RADEON(0): RADEONSaveScreen(1)
>[543676.657] (II) RADEON(0): RADEONSaveScreen(2)
>[543676.657] (II) RADEON(0): RADEONSaveScreen(0)
>[545036.842] (II) RADEON(0): RADEONSaveScreen(1)
>[545037.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a17600]
>[545037.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a17600] width 1920 pitch 7680 (/4 1920)
>[545082.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd55a0]
>[545082.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd55a0] width 1920 pitch 7680 (/4 1920)
>[545097.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502a520]
>[545097.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502a520] width 1920 pitch 7680 (/4 1920)
>[545232.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11470]
>[545232.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11470] width 1920 pitch 7680 (/4 1920)
>[545247.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e98400]
>[545247.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e98400] width 1920 pitch 7680 (/4 1920)
>[545427.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a11470]
>[545427.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a11470] width 1920 pitch 7680 (/4 1920)
>[545442.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d530]
>[545442.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d530] width 1920 pitch 7680 (/4 1920)
>[545773.515] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[545773.515] (II) RADEON(0): Using hsync ranges from config file
>[545773.515] (II) RADEON(0): Using vrefresh ranges from config file
>[545773.515] (II) RADEON(0): Printing DDC gathered Modelines:
>[545773.515] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[545773.515] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[545773.515] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[545773.515] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[545773.515] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[545773.515] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[545773.515] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[545773.515] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[545773.515] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[545773.515] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[545773.515] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[545773.515] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[545862.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4899670]
>[545862.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4899670] width 1920 pitch 7680 (/4 1920)
>[545877.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4882380]
>[545877.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4882380] width 1920 pitch 7680 (/4 1920)
>[545892.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e0530]
>[545892.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e0530] width 1920 pitch 7680 (/4 1920)
>[545907.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa1b0]
>[545907.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa1b0] width 1920 pitch 7680 (/4 1920)
>[545922.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e9680]
>[545922.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e9680] width 1920 pitch 7680 (/4 1920)
>[545997.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c800]
>[545997.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c800] width 1920 pitch 7680 (/4 1920)
>[546012.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bd9b0]
>[546012.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bd9b0] width 1920 pitch 7680 (/4 1920)
>[546087.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485f820]
>[546087.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485f820] width 1920 pitch 7680 (/4 1920)
>[546102.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485f820]
>[546102.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485f820] width 1920 pitch 7680 (/4 1920)
>[546117.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3970]
>[546117.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3970] width 1920 pitch 7680 (/4 1920)
>[546147.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c0f0]
>[546147.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c0f0] width 1920 pitch 7680 (/4 1920)
>[546177.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8c0f0]
>[546177.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8c0f0] width 1920 pitch 7680 (/4 1920)
>[546192.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdf70]
>[546192.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdf70] width 1920 pitch 7680 (/4 1920)
>[546228.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d59f30]
>[546228.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d59f30] width 1920 pitch 7680 (/4 1920)
>[546228.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75e60]
>[546228.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75e60] width 1920 pitch 7680 (/4 1920)
>[546228.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c800]
>[546228.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c800] width 1920 pitch 7680 (/4 1920)
>[546228.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae220]
>[546228.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae220] width 1920 pitch 7680 (/4 1920)
>[546228.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310d050]
>[546228.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310d050] width 1920 pitch 7680 (/4 1920)
>[546228.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d59f30]
>[546228.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d59f30] width 1920 pitch 7680 (/4 1920)
>[546228.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75e60]
>[546228.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75e60] width 1920 pitch 7680 (/4 1920)
>[546228.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4c800]
>[546228.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4c800] width 1920 pitch 7680 (/4 1920)
>[546228.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae220]
>[546228.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae220] width 1920 pitch 7680 (/4 1920)
>[546228.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5d530]
>[546228.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5d530] width 1920 pitch 7680 (/4 1920)
>[546228.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306f7d0]
>[546228.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306f7d0] width 1920 pitch 7680 (/4 1920)
>[546228.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75e60]
>[546228.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75e60] width 1920 pitch 7680 (/4 1920)
>[546228.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529ec0]
>[546228.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529ec0] width 1920 pitch 7680 (/4 1920)
>[546228.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75e60]
>[546228.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75e60] width 1920 pitch 7680 (/4 1920)
>[546228.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae220]
>[546228.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae220] width 1920 pitch 7680 (/4 1920)
>[546228.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d59f30]
>[546228.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d59f30] width 1920 pitch 7680 (/4 1920)
>[546228.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306f7d0]
>[546228.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306f7d0] width 1920 pitch 7680 (/4 1920)
>[546228.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aae220]
>[546228.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aae220] width 1920 pitch 7680 (/4 1920)
>[546229.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895440]
>[546229.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895440] width 1920 pitch 7680 (/4 1920)
>[546229.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75e60]
>[546229.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75e60] width 1920 pitch 7680 (/4 1920)
>[546229.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d74ff0]
>[546229.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d74ff0] width 1920 pitch 7680 (/4 1920)
>[546229.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546229.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546229.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4895440]
>[546229.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4895440] width 1920 pitch 7680 (/4 1920)
>[546229.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x306f7d0]
>[546229.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x306f7d0] width 1920 pitch 7680 (/4 1920)
>[546229.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d59f30]
>[546229.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d59f30] width 1920 pitch 7680 (/4 1920)
>[546229.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2529ec0]
>[546229.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2529ec0] width 1920 pitch 7680 (/4 1920)
>[546229.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e75e60]
>[546229.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e75e60] width 1920 pitch 7680 (/4 1920)
>[546229.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546229.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546229.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546229.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546229.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546229.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546229.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546229.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546229.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546229.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546229.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546229.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546229.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546229.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546229.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546229.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546229.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546229.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546229.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546229.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546229.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546230.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546230.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546230.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546230.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0afb0]
>[546230.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0afb0] width 1920 pitch 7680 (/4 1920)
>[546230.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[546230.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[546252.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90b80]
>[546252.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90b80] width 1920 pitch 7680 (/4 1920)
>[546267.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90b80]
>[546267.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90b80] width 1920 pitch 7680 (/4 1920)
>[546462.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c90b80]
>[546462.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c90b80] width 1920 pitch 7680 (/4 1920)
>[546477.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48993f0]
>[546477.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48993f0] width 1920 pitch 7680 (/4 1920)
>[546627.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d47660]
>[546627.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d47660] width 1920 pitch 7680 (/4 1920)
>[546642.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fc270]
>[546642.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fc270] width 1920 pitch 7680 (/4 1920)
>[546733.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c7eaf0]
>[546733.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c7eaf0] width 1920 pitch 7680 (/4 1920)
>[546733.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d2b0]
>[546733.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d2b0] width 1920 pitch 7680 (/4 1920)
>[546733.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50afaa0]
>[546733.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50afaa0] width 1920 pitch 7680 (/4 1920)
>[546733.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9d2b0]
>[546733.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9d2b0] width 1920 pitch 7680 (/4 1920)
>[546734.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508f780]
>[546734.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508f780] width 1920 pitch 7680 (/4 1920)
>[546734.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277e30]
>[546734.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277e30] width 1920 pitch 7680 (/4 1920)
>[546754.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fda980]
>[546754.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fda980] width 1920 pitch 7680 (/4 1920)
>[546762.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcf80]
>[546762.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcf80] width 1920 pitch 7680 (/4 1920)
>[546777.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522c270]
>[546777.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522c270] width 1920 pitch 7680 (/4 1920)
>[546792.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff990]
>[546792.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff990] width 1920 pitch 7680 (/4 1920)
>[546805.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[546805.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[546805.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50769a0]
>[546805.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50769a0] width 1920 pitch 7680 (/4 1920)
>[546805.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[546805.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[546805.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50769a0]
>[546805.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50769a0] width 1920 pitch 7680 (/4 1920)
>[546805.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[546805.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[546805.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50769a0]
>[546805.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50769a0] width 1920 pitch 7680 (/4 1920)
>[546805.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[546805.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[546805.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50769a0]
>[546805.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50769a0] width 1920 pitch 7680 (/4 1920)
>[546805.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[546805.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[546805.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29affc0]
>[546805.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29affc0] width 1920 pitch 7680 (/4 1920)
>[546805.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[546805.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[546805.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3927830]
>[546805.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3927830] width 1920 pitch 7680 (/4 1920)
>[546805.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937080]
>[546805.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937080] width 1920 pitch 7680 (/4 1920)
>[546805.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501c900]
>[546805.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501c900] width 1920 pitch 7680 (/4 1920)
>[546807.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecae70]
>[546807.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecae70] width 1920 pitch 7680 (/4 1920)
>[546837.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[546837.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[546852.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a0c0]
>[546852.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a0c0] width 1920 pitch 7680 (/4 1920)
>[546867.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ea3b10]
>[546867.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ea3b10] width 1920 pitch 7680 (/4 1920)
>[546912.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293a900]
>[546912.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293a900] width 1920 pitch 7680 (/4 1920)
>[546934.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f33dc0]
>[546934.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f33dc0] width 1920 pitch 7680 (/4 1920)
>[546934.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24720b0]
>[546934.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24720b0] width 1920 pitch 7680 (/4 1920)
>[546935.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f86d0]
>[546935.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f86d0] width 1920 pitch 7680 (/4 1920)
>[546935.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[546935.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[546957.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d2f20]
>[546957.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d2f20] width 1920 pitch 7680 (/4 1920)
>[546972.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[546972.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[546987.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e8790]
>[546987.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e8790] width 1920 pitch 7680 (/4 1920)
>[546989.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[546989.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[546989.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fae0]
>[546989.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fae0] width 1920 pitch 7680 (/4 1920)
>[546989.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a67e20]
>[546989.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a67e20] width 1920 pitch 7680 (/4 1920)
>[546989.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3fae0]
>[546989.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3fae0] width 1920 pitch 7680 (/4 1920)
>[547002.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0]
>[547002.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1920 pitch 7680 (/4 1920)
>[547077.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x522cc90]
>[547077.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x522cc90] width 1920 pitch 7680 (/4 1920)
>[547107.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471130]
>[547107.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471130] width 1920 pitch 7680 (/4 1920)
>[547122.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5064f00]
>[547122.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5064f00] width 1920 pitch 7680 (/4 1920)
>[547137.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8b100]
>[547137.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8b100] width 1920 pitch 7680 (/4 1920)
>[547317.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cfb0]
>[547317.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cfb0] width 1920 pitch 7680 (/4 1920)
>[547332.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8b4c0]
>[547332.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8b4c0] width 1920 pitch 7680 (/4 1920)
>[547407.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401fcb0]
>[547407.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401fcb0] width 1920 pitch 7680 (/4 1920)
>[547422.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce3a30]
>[547422.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce3a30] width 1920 pitch 7680 (/4 1920)
>[547632.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4870710]
>[547632.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4870710] width 1920 pitch 7680 (/4 1920)
>[547647.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e390]
>[547647.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e390] width 1920 pitch 7680 (/4 1920)
>[547662.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611b040]
>[547662.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611b040] width 1920 pitch 7680 (/4 1920)
>[547677.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2557360]
>[547677.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2557360] width 1920 pitch 7680 (/4 1920)
>[547737.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[547737.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[547752.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bb8c0]
>[547752.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bb8c0] width 1920 pitch 7680 (/4 1920)
>[547767.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c660]
>[547767.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c660] width 1920 pitch 7680 (/4 1920)
>[547782.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38b6ca0]
>[547782.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38b6ca0] width 1920 pitch 7680 (/4 1920)
>[547842.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfe30]
>[547842.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfe30] width 1920 pitch 7680 (/4 1920)
>[547857.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4e70]
>[547857.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4e70] width 1920 pitch 7680 (/4 1920)
>[547917.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b51880]
>[547917.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b51880] width 1920 pitch 7680 (/4 1920)
>[547947.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1d90]
>[547947.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1d90] width 1920 pitch 7680 (/4 1920)
>[548037.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[548037.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[548052.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24781f0]
>[548052.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24781f0] width 1920 pitch 7680 (/4 1920)
>[548187.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcf150]
>[548187.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcf150] width 1920 pitch 7680 (/4 1920)
>[548217.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1d90]
>[548217.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1d90] width 1920 pitch 7680 (/4 1920)
>[548367.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48749f0]
>[548367.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48749f0] width 1920 pitch 7680 (/4 1920)
>[548397.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4036d40]
>[548397.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4036d40] width 1920 pitch 7680 (/4 1920)
>[548457.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea36b0]
>[548457.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea36b0] width 1920 pitch 7680 (/4 1920)
>[548487.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29bb8c0]
>[548487.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29bb8c0] width 1920 pitch 7680 (/4 1920)
>[548562.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdf70]
>[548562.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdf70] width 1920 pitch 7680 (/4 1920)
>[548577.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d542a0]
>[548577.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d542a0] width 1920 pitch 7680 (/4 1920)
>[548607.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50652d0]
>[548607.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50652d0] width 1920 pitch 7680 (/4 1920)
>[548622.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fbc10]
>[548622.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fbc10] width 1920 pitch 7680 (/4 1920)
>[548641.170] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[548641.170] (II) RADEON(0): Using hsync ranges from config file
>[548641.170] (II) RADEON(0): Using vrefresh ranges from config file
>[548641.170] (II) RADEON(0): Printing DDC gathered Modelines:
>[548641.170] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[548641.170] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[548641.170] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[548641.170] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[548641.170] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[548641.170] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[548641.170] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[548641.170] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[548641.170] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[548641.170] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[548641.170] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[548641.170] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[548731.672] (II) RADEON(0): RADEONSaveScreen(2)
>[548731.672] (II) RADEON(0): RADEONSaveScreen(0)
>[551548.267] (II) RADEON(0): RADEONSaveScreen(1)
>[551549.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d0920]
>[551549.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d0920] width 1920 pitch 7680 (/4 1920)
>[551565.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551565.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551565.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551565.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551565.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551565.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551565.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551565.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551566.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551566.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551566.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551566.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551566.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551566.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551566.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551566.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551566.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551566.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551566.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551566.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551567.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551567.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551567.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551567.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551567.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551567.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551567.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551567.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551567.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551567.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551567.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551567.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551567.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551568.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551568.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551568.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551568.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48857f0]
>[551568.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48857f0] width 1920 pitch 7680 (/4 1920)
>[551653.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d64b0]
>[551653.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d64b0] width 1920 pitch 7680 (/4 1920)
>[551668.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d17020]
>[551668.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d17020] width 1920 pitch 7680 (/4 1920)
>[551698.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39576f0]
>[551698.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39576f0] width 1920 pitch 7680 (/4 1920)
>[551713.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76050]
>[551713.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76050] width 1920 pitch 7680 (/4 1920)
>[551728.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53629c0]
>[551728.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53629c0] width 1920 pitch 7680 (/4 1920)
>[551743.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53629c0]
>[551743.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53629c0] width 1920 pitch 7680 (/4 1920)
>[551758.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4862fc0]
>[551758.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4862fc0] width 1920 pitch 7680 (/4 1920)
>[551773.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c87930]
>[551773.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c87930] width 1920 pitch 7680 (/4 1920)
>[551788.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc6300]
>[551788.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc6300] width 1920 pitch 7680 (/4 1920)
>[551803.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b73f0]
>[551803.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b73f0] width 1920 pitch 7680 (/4 1920)
>[551818.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecd550]
>[551818.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecd550] width 1920 pitch 7680 (/4 1920)
>[551833.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed0300]
>[551833.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed0300] width 1920 pitch 7680 (/4 1920)
>[551893.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481c3c0]
>[551893.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481c3c0] width 1920 pitch 7680 (/4 1920)
>[551923.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2200170]
>[551923.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2200170] width 1920 pitch 7680 (/4 1920)
>[551953.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71d50]
>[551953.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71d50] width 1920 pitch 7680 (/4 1920)
>[551968.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbda30]
>[551968.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbda30] width 1920 pitch 7680 (/4 1920)
>[551983.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4cdf0]
>[551983.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4cdf0] width 1920 pitch 7680 (/4 1920)
>[552028.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a090d0]
>[552028.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a090d0] width 1920 pitch 7680 (/4 1920)
>[552043.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4cdf0]
>[552043.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4cdf0] width 1920 pitch 7680 (/4 1920)
>[552058.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2200170]
>[552058.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2200170] width 1920 pitch 7680 (/4 1920)
>[552073.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbedf0]
>[552073.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbedf0] width 1920 pitch 7680 (/4 1920)
>[552088.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50998f0]
>[552088.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50998f0] width 1920 pitch 7680 (/4 1920)
>[552103.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8d310]
>[552103.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8d310] width 1920 pitch 7680 (/4 1920)
>[552148.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a380]
>[552148.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a380] width 1920 pitch 7680 (/4 1920)
>[552163.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf70e0]
>[552163.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf70e0] width 1920 pitch 7680 (/4 1920)
>[552178.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[552178.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[552193.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[552193.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[552208.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509d8a0]
>[552208.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509d8a0] width 1920 pitch 7680 (/4 1920)
>[552223.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba640]
>[552223.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba640] width 1920 pitch 7680 (/4 1920)
>[552238.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48849d0]
>[552238.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48849d0] width 1920 pitch 7680 (/4 1920)
>[552253.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48eedd0]
>[552253.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48eedd0] width 1920 pitch 7680 (/4 1920)
>[552268.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd9770]
>[552268.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd9770] width 1920 pitch 7680 (/4 1920)
>[552283.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfe30]
>[552283.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfe30] width 1920 pitch 7680 (/4 1920)
>[552298.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4d90]
>[552298.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4d90] width 1920 pitch 7680 (/4 1920)
>[552313.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5093d90]
>[552313.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5093d90] width 1920 pitch 7680 (/4 1920)
>[552343.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a21a40]
>[552343.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a21a40] width 1920 pitch 7680 (/4 1920)
>[552358.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fbc10]
>[552358.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fbc10] width 1920 pitch 7680 (/4 1920)
>[552388.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfe30]
>[552388.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfe30] width 1920 pitch 7680 (/4 1920)
>[552403.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae4d90]
>[552403.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae4d90] width 1920 pitch 7680 (/4 1920)
>[552418.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efd10]
>[552418.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efd10] width 1920 pitch 7680 (/4 1920)
>[552463.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb3a00]
>[552463.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb3a00] width 1920 pitch 7680 (/4 1920)
>[552478.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dd0580]
>[552478.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dd0580] width 1920 pitch 7680 (/4 1920)
>[552583.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8a0c0]
>[552583.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8a0c0] width 1920 pitch 7680 (/4 1920)
>[552598.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15550]
>[552598.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15550] width 1920 pitch 7680 (/4 1920)
>[552613.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[552613.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[552622.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a15550]
>[552622.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a15550] width 1920 pitch 7680 (/4 1920)
>[552622.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501ea10]
>[552622.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501ea10] width 1920 pitch 7680 (/4 1920)
>[552628.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0e770]
>[552628.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0e770] width 1920 pitch 7680 (/4 1920)
>[552643.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4925c70]
>[552643.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4925c70] width 1920 pitch 7680 (/4 1920)
>[552688.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8c90]
>[552688.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8c90] width 1920 pitch 7680 (/4 1920)
>[552703.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0ee40]
>[552703.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0ee40] width 1920 pitch 7680 (/4 1920)
>[552733.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25664c0]
>[552733.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25664c0] width 1920 pitch 7680 (/4 1920)
>[552759.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[552759.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[552759.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b4600]
>[552759.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b4600] width 1920 pitch 7680 (/4 1920)
>[552759.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[552759.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[552759.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c7eaf0]
>[552759.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c7eaf0] width 1920 pitch 7680 (/4 1920)
>[552759.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930940]
>[552759.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930940] width 1920 pitch 7680 (/4 1920)
>[552759.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2831020]
>[552759.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2831020] width 1920 pitch 7680 (/4 1920)
>[552759.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5a50]
>[552759.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5a50] width 1920 pitch 7680 (/4 1920)
>[552759.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa1b0]
>[552759.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa1b0] width 1920 pitch 7680 (/4 1920)
>[552759.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50230f0]
>[552759.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50230f0] width 1920 pitch 7680 (/4 1920)
>[552759.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x298dbc0]
>[552759.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x298dbc0] width 1920 pitch 7680 (/4 1920)
>[552759.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9eb80]
>[552759.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9eb80] width 1920 pitch 7680 (/4 1920)
>[552759.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb9560]
>[552759.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb9560] width 1920 pitch 7680 (/4 1920)
>[552759.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0ee40]
>[552759.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0ee40] width 1920 pitch 7680 (/4 1920)
>[552759.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb9560]
>[552759.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb9560] width 1920 pitch 7680 (/4 1920)
>[552759.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0ee40]
>[552759.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0ee40] width 1920 pitch 7680 (/4 1920)
>[552759.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cb9560]
>[552759.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cb9560] width 1920 pitch 7680 (/4 1920)
>[552759.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0ee40]
>[552759.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0ee40] width 1920 pitch 7680 (/4 1920)
>[552759.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[552759.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[552759.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48336e0]
>[552759.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48336e0] width 1920 pitch 7680 (/4 1920)
>[552759.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[552759.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[552759.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48336e0]
>[552759.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48336e0] width 1920 pitch 7680 (/4 1920)
>[552759.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[552759.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[552759.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48336e0]
>[552759.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48336e0] width 1920 pitch 7680 (/4 1920)
>[552759.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[552759.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[552759.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48336e0]
>[552759.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48336e0] width 1920 pitch 7680 (/4 1920)
>[552759.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[552759.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[552759.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48336e0]
>[552760.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48336e0] width 1920 pitch 7680 (/4 1920)
>[552760.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[552760.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[552760.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552760.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008bc0]
>[552760.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008bc0] width 1920 pitch 7680 (/4 1920)
>[552760.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1850]
>[552760.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1850] width 1920 pitch 7680 (/4 1920)
>[552778.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x298dbc0]
>[552778.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x298dbc0] width 1920 pitch 7680 (/4 1920)
>[552793.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd22f0]
>[552793.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd22f0] width 1920 pitch 7680 (/4 1920)
>[552823.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[552823.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[552838.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062670]
>[552838.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062670] width 1920 pitch 7680 (/4 1920)
>[552853.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062670]
>[552853.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062670] width 1920 pitch 7680 (/4 1920)
>[552898.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d77e0]
>[552898.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d77e0] width 1920 pitch 7680 (/4 1920)
>[552913.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d77e0]
>[552913.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d77e0] width 1920 pitch 7680 (/4 1920)
>[552928.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x396a080]
>[552928.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x396a080] width 1920 pitch 7680 (/4 1920)
>[552958.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e9e5b0]
>[552958.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e9e5b0] width 1920 pitch 7680 (/4 1920)
>[553018.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628d970]
>[553018.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628d970] width 1920 pitch 7680 (/4 1920)
>[553033.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94b10]
>[553033.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94b10] width 1920 pitch 7680 (/4 1920)
>[553063.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29829c0]
>[553063.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29829c0] width 1920 pitch 7680 (/4 1920)
>[553078.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504d8c0]
>[553078.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504d8c0] width 1920 pitch 7680 (/4 1920)
>[553108.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5041a80]
>[553108.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5041a80] width 1920 pitch 7680 (/4 1920)
>[553138.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4987800]
>[553138.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4987800] width 1920 pitch 7680 (/4 1920)
>[553153.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bf99a0]
>[553153.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bf99a0] width 1920 pitch 7680 (/4 1920)
>[553213.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3f780]
>[553213.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3f780] width 1920 pitch 7680 (/4 1920)
>[553228.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29826e0]
>[553228.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29826e0] width 1920 pitch 7680 (/4 1920)
>[553258.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bf99a0]
>[553258.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bf99a0] width 1920 pitch 7680 (/4 1920)
>[553273.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4986e10]
>[553273.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4986e10] width 1920 pitch 7680 (/4 1920)
>[553393.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fdcfd0]
>[553393.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fdcfd0] width 1920 pitch 7680 (/4 1920)
>[553408.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61edf80]
>[553408.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61edf80] width 1920 pitch 7680 (/4 1920)
>[553438.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bd8a0]
>[553438.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bd8a0] width 1920 pitch 7680 (/4 1920)
>[553453.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[553453.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[553483.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d7770]
>[553483.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d7770] width 1920 pitch 7680 (/4 1920)
>[553498.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49110c0]
>[553498.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49110c0] width 1920 pitch 7680 (/4 1920)
>[553528.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[553528.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[553543.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500f4f0]
>[553543.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500f4f0] width 1920 pitch 7680 (/4 1920)
>[553618.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49110c0]
>[553618.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49110c0] width 1920 pitch 7680 (/4 1920)
>[553633.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f1a20]
>[553633.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f1a20] width 1920 pitch 7680 (/4 1920)
>[553648.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500f4f0]
>[553648.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500f4f0] width 1920 pitch 7680 (/4 1920)
>[553663.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[553663.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[553693.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[553693.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[553708.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49107d0]
>[553708.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49107d0] width 1920 pitch 7680 (/4 1920)
>[553723.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503a720]
>[553723.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503a720] width 1920 pitch 7680 (/4 1920)
>[553738.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508c380]
>[553738.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508c380] width 1920 pitch 7680 (/4 1920)
>[553753.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f1a20]
>[553753.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f1a20] width 1920 pitch 7680 (/4 1920)
>[553783.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd5e80]
>[553783.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd5e80] width 1920 pitch 7680 (/4 1920)
>[553843.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503a720]
>[553843.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503a720] width 1920 pitch 7680 (/4 1920)
>[553858.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508c380]
>[553858.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508c380] width 1920 pitch 7680 (/4 1920)
>[553873.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f1a20]
>[553873.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f1a20] width 1920 pitch 7680 (/4 1920)
>[553888.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49110c0]
>[553888.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49110c0] width 1920 pitch 7680 (/4 1920)
>[553903.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd5e80]
>[553903.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd5e80] width 1920 pitch 7680 (/4 1920)
>[553918.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500f4f0]
>[553918.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500f4f0] width 1920 pitch 7680 (/4 1920)
>[553933.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[553933.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[553963.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508c380]
>[553963.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508c380] width 1920 pitch 7680 (/4 1920)
>[553993.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bd5e80]
>[553993.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bd5e80] width 1920 pitch 7680 (/4 1920)
>[554008.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f1a20]
>[554008.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f1a20] width 1920 pitch 7680 (/4 1920)
>[554023.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500f4f0]
>[554023.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500f4f0] width 1920 pitch 7680 (/4 1920)
>[554038.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[554038.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[554053.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503a720]
>[554053.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503a720] width 1920 pitch 7680 (/4 1920)
>[554068.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[554068.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[554090.906] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[554090.906] (II) RADEON(0): Using hsync ranges from config file
>[554090.906] (II) RADEON(0): Using vrefresh ranges from config file
>[554090.906] (II) RADEON(0): Printing DDC gathered Modelines:
>[554090.906] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[554090.906] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[554090.906] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[554090.906] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[554090.906] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[554090.906] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[554090.906] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[554090.906] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[554090.906] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[554090.906] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[554090.906] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[554090.906] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[554098.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[554098.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[554180.654] (II) RADEON(0): RADEONSaveScreen(2)
>[554180.654] (II) RADEON(0): RADEONSaveScreen(0)
>[558549.057] (II) RADEON(0): RADEONSaveScreen(1)
>[558549.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558549.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558551.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558551.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558551.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558551.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558551.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558552.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558552.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558552.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558552.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558552.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558552.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558552.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558552.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558552.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558552.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558552.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac5a0]
>[558552.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac5a0] width 1920 pitch 7680 (/4 1920)
>[558552.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611b040]
>[558552.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611b040] width 1920 pitch 7680 (/4 1920)
>[558552.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[558552.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[558552.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4896080]
>[558552.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4896080] width 1920 pitch 7680 (/4 1920)
>[558552.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558552.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558552.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558552.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558552.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558552.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558552.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558552.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558552.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f06a0]
>[558552.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f06a0] width 1920 pitch 7680 (/4 1920)
>[558552.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29859e0]
>[558552.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29859e0] width 1920 pitch 7680 (/4 1920)
>[558564.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6247930]
>[558564.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6247930] width 1920 pitch 7680 (/4 1920)
>[558594.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2974230]
>[558594.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2974230] width 1920 pitch 7680 (/4 1920)
>[558654.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c1480]
>[558654.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c1480] width 1920 pitch 7680 (/4 1920)
>[558669.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2831740]
>[558669.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2831740] width 1920 pitch 7680 (/4 1920)
>[558682.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[558682.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[558682.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d4c50]
>[558682.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d4c50] width 1920 pitch 7680 (/4 1920)
>[558682.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[558682.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[558682.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d4c50]
>[558682.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d4c50] width 1920 pitch 7680 (/4 1920)
>[558682.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[558682.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[558682.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8790]
>[558682.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8790] width 1920 pitch 7680 (/4 1920)
>[558682.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[558682.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[558682.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5098100]
>[558682.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5098100] width 1920 pitch 7680 (/4 1920)
>[558682.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[558682.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[558682.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29720a0]
>[558682.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29720a0] width 1920 pitch 7680 (/4 1920)
>[558682.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[558682.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[558682.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1030]
>[558682.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1030] width 1920 pitch 7680 (/4 1920)
>[558682.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dd0580]
>[558682.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dd0580] width 1920 pitch 7680 (/4 1920)
>[558682.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1030]
>[558682.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1030] width 1920 pitch 7680 (/4 1920)
>[558682.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dd0580]
>[558682.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dd0580] width 1920 pitch 7680 (/4 1920)
>[558682.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1030]
>[558682.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1030] width 1920 pitch 7680 (/4 1920)
>[558682.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dd0580]
>[558682.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dd0580] width 1920 pitch 7680 (/4 1920)
>[558682.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1030]
>[558682.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1030] width 1920 pitch 7680 (/4 1920)
>[558682.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dd0580]
>[558682.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dd0580] width 1920 pitch 7680 (/4 1920)
>[558682.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f1030]
>[558682.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f1030] width 1920 pitch 7680 (/4 1920)
>[558682.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dd0580]
>[558682.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dd0580] width 1920 pitch 7680 (/4 1920)
>[558682.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502d3d0]
>[558682.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502d3d0] width 1920 pitch 7680 (/4 1920)
>[558683.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c5030]
>[558683.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c5030] width 1920 pitch 7680 (/4 1920)
>[558683.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[558683.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[558683.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c9eda0]
>[558683.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c9eda0] width 1920 pitch 7680 (/4 1920)
>[558683.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6cf80]
>[558683.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6cf80] width 1920 pitch 7680 (/4 1920)
>[558683.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0ece0]
>[558683.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0ece0] width 1920 pitch 7680 (/4 1920)
>[558683.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe8380]
>[558683.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe8380] width 1920 pitch 7680 (/4 1920)
>[558683.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2936f40]
>[558683.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2936f40] width 1920 pitch 7680 (/4 1920)
>[558683.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed8790]
>[558683.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed8790] width 1920 pitch 7680 (/4 1920)
>[558683.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2936f40]
>[558683.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2936f40] width 1920 pitch 7680 (/4 1920)
>[558683.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5025da0]
>[558683.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5025da0] width 1920 pitch 7680 (/4 1920)
>[558683.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[558683.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[558683.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[558683.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[558683.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[558683.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[558683.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[558683.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[558683.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[558683.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[558683.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[558683.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[558683.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869690]
>[558683.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869690] width 1920 pitch 7680 (/4 1920)
>[558683.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b68a0]
>[558683.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b68a0] width 1920 pitch 7680 (/4 1920)
>[558774.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7470]
>[558774.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7470] width 1920 pitch 7680 (/4 1920)
>[558789.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535bcb0]
>[558789.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535bcb0] width 1920 pitch 7680 (/4 1920)
>[558819.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b88ff0]
>[558819.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b88ff0] width 1920 pitch 7680 (/4 1920)
>[558834.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f73e0]
>[558834.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f73e0] width 1920 pitch 7680 (/4 1920)
>[558864.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501b3c0]
>[558864.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501b3c0] width 1920 pitch 7680 (/4 1920)
>[558879.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5052580]
>[558879.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5052580] width 1920 pitch 7680 (/4 1920)
>[558969.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492a240]
>[558969.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492a240] width 1920 pitch 7680 (/4 1920)
>[558984.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48336e0]
>[558984.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48336e0] width 1920 pitch 7680 (/4 1920)
>[559074.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6b660]
>[559074.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6b660] width 1920 pitch 7680 (/4 1920)
>[559089.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28356a0]
>[559089.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28356a0] width 1920 pitch 7680 (/4 1920)
>[559179.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6d20]
>[559179.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6d20] width 1920 pitch 7680 (/4 1920)
>[559209.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f21af0]
>[559209.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f21af0] width 1920 pitch 7680 (/4 1920)
>[559404.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5145450]
>[559404.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5145450] width 1920 pitch 7680 (/4 1920)
>[559419.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481a1a0]
>[559419.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481a1a0] width 1920 pitch 7680 (/4 1920)
>[559464.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2967440]
>[559464.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2967440] width 1920 pitch 7680 (/4 1920)
>[559494.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd5ce0]
>[559494.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd5ce0] width 1920 pitch 7680 (/4 1920)
>[559569.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ef9e0]
>[559569.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ef9e0] width 1920 pitch 7680 (/4 1920)
>[559584.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932cc0]
>[559584.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932cc0] width 1920 pitch 7680 (/4 1920)
>[559593.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8fe40]
>[559593.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8fe40] width 1920 pitch 7680 (/4 1920)
>[559593.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504e390]
>[559593.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504e390] width 1920 pitch 7680 (/4 1920)
>[559593.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559593.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559593.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559593.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559593.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559593.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559593.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559593.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559593.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559593.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559593.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559593.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559594.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559594.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559594.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559594.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559594.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559594.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559594.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559595.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559595.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559595.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559595.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559595.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559596.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559596.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559596.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559596.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559596.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559596.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559596.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d11300]
>[559596.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d11300] width 1920 pitch 7680 (/4 1920)
>[559596.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b5b10]
>[559596.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b5b10] width 1920 pitch 7680 (/4 1920)
>[559596.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bbd0]
>[559596.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bbd0] width 1920 pitch 7680 (/4 1920)
>[559599.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b16c0]
>[559599.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b16c0] width 1920 pitch 7680 (/4 1920)
>[559629.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed9270]
>[559629.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed9270] width 1920 pitch 7680 (/4 1920)
>[559644.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48ee840]
>[559644.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48ee840] width 1920 pitch 7680 (/4 1920)
>[559659.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f43590]
>[559659.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f43590] width 1920 pitch 7680 (/4 1920)
>[559689.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5051ad0]
>[559689.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5051ad0] width 1920 pitch 7680 (/4 1920)
>[559719.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49763c0]
>[559719.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49763c0] width 1920 pitch 7680 (/4 1920)
>[559749.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6e230]
>[559749.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6e230] width 1920 pitch 7680 (/4 1920)
>[559764.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d00a0]
>[559764.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d00a0] width 1920 pitch 7680 (/4 1920)
>[559914.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490f090]
>[559914.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490f090] width 1920 pitch 7680 (/4 1920)
>[559944.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309ef80]
>[559944.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309ef80] width 1920 pitch 7680 (/4 1920)
>[559989.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48fb7a0]
>[559989.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48fb7a0] width 1920 pitch 7680 (/4 1920)
>[560004.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289dd10]
>[560004.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289dd10] width 1920 pitch 7680 (/4 1920)
>[560094.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49104f0]
>[560094.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49104f0] width 1920 pitch 7680 (/4 1920)
>[560109.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fe50]
>[560109.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fe50] width 1920 pitch 7680 (/4 1920)
>[560139.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011f00]
>[560139.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011f00] width 1920 pitch 7680 (/4 1920)
>[560154.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011f00]
>[560154.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011f00] width 1920 pitch 7680 (/4 1920)
>[560309.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560309.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560309.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560309.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560310.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560310.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560310.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560310.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560319.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560319.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560334.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560334.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560439.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560439.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560469.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560469.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560484.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560484.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560499.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560499.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560514.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560514.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560529.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560529.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560544.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560544.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560559.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560559.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560574.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560574.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560604.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5035bc0]
>[560604.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5035bc0] width 1920 pitch 7680 (/4 1920)
>[560619.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4828640]
>[560619.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4828640] width 1920 pitch 7680 (/4 1920)
>[560844.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834ec0]
>[560844.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834ec0] width 1920 pitch 7680 (/4 1920)
>[560859.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5145450]
>[560859.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5145450] width 1920 pitch 7680 (/4 1920)
>[560889.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6224860]
>[560889.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6224860] width 1920 pitch 7680 (/4 1920)
>[560904.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fc680]
>[560904.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fc680] width 1920 pitch 7680 (/4 1920)
>[560964.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa1b0]
>[560964.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa1b0] width 1920 pitch 7680 (/4 1920)
>[560979.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62518e0]
>[560979.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62518e0] width 1920 pitch 7680 (/4 1920)
>[561189.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a91e0]
>[561189.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a91e0] width 1920 pitch 7680 (/4 1920)
>[561204.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6d70]
>[561204.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6d70] width 1920 pitch 7680 (/4 1920)
>[561234.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ed9270]
>[561234.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ed9270] width 1920 pitch 7680 (/4 1920)
>[561249.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055930]
>[561249.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055930] width 1920 pitch 7680 (/4 1920)
>[561309.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402ca40]
>[561309.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402ca40] width 1920 pitch 7680 (/4 1920)
>[561324.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509b190]
>[561324.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509b190] width 1920 pitch 7680 (/4 1920)
>[561414.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcb100]
>[561414.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcb100] width 1920 pitch 7680 (/4 1920)
>[561429.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5013630]
>[561429.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5013630] width 1920 pitch 7680 (/4 1920)
>[561474.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505bd70]
>[561474.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505bd70] width 1920 pitch 7680 (/4 1920)
>[561489.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94840]
>[561489.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94840] width 1920 pitch 7680 (/4 1920)
>[561494.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505bd70]
>[561495.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505bd70] width 1920 pitch 7680 (/4 1920)
>[561495.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49742d0]
>[561495.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49742d0] width 1920 pitch 7680 (/4 1920)
>[561495.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561495.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561495.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49742d0]
>[561495.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49742d0] width 1920 pitch 7680 (/4 1920)
>[561495.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561495.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561495.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501b3c0]
>[561495.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501b3c0] width 1920 pitch 7680 (/4 1920)
>[561495.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561495.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561495.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501b3c0]
>[561495.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501b3c0] width 1920 pitch 7680 (/4 1920)
>[561495.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561495.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561495.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501b3c0]
>[561495.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501b3c0] width 1920 pitch 7680 (/4 1920)
>[561495.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561495.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561495.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501b3c0]
>[561495.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501b3c0] width 1920 pitch 7680 (/4 1920)
>[561495.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561495.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561495.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501b3c0]
>[561495.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501b3c0] width 1920 pitch 7680 (/4 1920)
>[561594.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2840040]
>[561594.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2840040] width 1920 pitch 7680 (/4 1920)
>[561609.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28222e0]
>[561609.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28222e0] width 1920 pitch 7680 (/4 1920)
>[561669.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4902c60]
>[561669.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4902c60] width 1920 pitch 7680 (/4 1920)
>[561684.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef000]
>[561684.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef000] width 1920 pitch 7680 (/4 1920)
>[561789.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc340]
>[561789.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc340] width 1920 pitch 7680 (/4 1920)
>[561819.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c4740]
>[561819.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c4740] width 1920 pitch 7680 (/4 1920)
>[561888.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[561888.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[561888.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[561888.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[561888.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[561888.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[561888.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[561888.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[561888.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[561888.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[561888.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[561888.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[561888.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c130]
>[561888.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c130] width 1920 pitch 7680 (/4 1920)
>[561888.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[561888.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[561889.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97570]
>[561889.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97570] width 1920 pitch 7680 (/4 1920)
>[561889.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[561889.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[561889.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97570]
>[561889.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97570] width 1920 pitch 7680 (/4 1920)
>[561889.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[561889.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[561889.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97570]
>[561889.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97570] width 1920 pitch 7680 (/4 1920)
>[561889.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[561889.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[561889.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97570]
>[561889.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97570] width 1920 pitch 7680 (/4 1920)
>[561889.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561889.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[561889.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[561889.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e84e70]
>[561889.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e84e70] width 1920 pitch 7680 (/4 1920)
>[561894.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x390f1c0]
>[561894.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x390f1c0] width 1920 pitch 7680 (/4 1920)
>[561924.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[561924.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[561999.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa1b0]
>[561999.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa1b0] width 1920 pitch 7680 (/4 1920)
>[562014.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0ee40]
>[562014.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0ee40] width 1920 pitch 7680 (/4 1920)
>[562134.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[562134.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[562149.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b935d0]
>[562149.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b935d0] width 1920 pitch 7680 (/4 1920)
>[562179.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a00c0]
>[562179.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a00c0] width 1920 pitch 7680 (/4 1920)
>[562194.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4827080]
>[562194.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4827080] width 1920 pitch 7680 (/4 1920)
>[562231.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499c620]
>[562231.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499c620] width 1920 pitch 7680 (/4 1920)
>[562231.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d03760]
>[562231.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d03760] width 1920 pitch 7680 (/4 1920)
>[562374.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc340]
>[562374.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc340] width 1920 pitch 7680 (/4 1920)
>[562419.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500f170]
>[562419.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500f170] width 1920 pitch 7680 (/4 1920)
>[562449.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29354e0]
>[562449.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29354e0] width 1920 pitch 7680 (/4 1920)
>[562464.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fba10]
>[562464.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fba10] width 1920 pitch 7680 (/4 1920)
>[562509.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488c20]
>[562509.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488c20] width 1920 pitch 7680 (/4 1920)
>[562524.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b86400]
>[562524.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b86400] width 1920 pitch 7680 (/4 1920)
>[562614.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7b40]
>[562614.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7b40] width 1920 pitch 7680 (/4 1920)
>[562629.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838bb0]
>[562629.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838bb0] width 1920 pitch 7680 (/4 1920)
>[562779.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[562779.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[562794.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[562794.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[562824.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dad10]
>[562824.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dad10] width 1920 pitch 7680 (/4 1920)
>[562839.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d8b0]
>[562839.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d8b0] width 1920 pitch 7680 (/4 1920)
>[562886.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562886.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562886.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6b2e0]
>[562886.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6b2e0] width 1920 pitch 7680 (/4 1920)
>[562886.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562886.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562886.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562886.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562886.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562886.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562886.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562886.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562886.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562886.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562886.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562886.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562886.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562886.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562886.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562886.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562886.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562886.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562887.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562887.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562887.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562887.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562887.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562887.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562887.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562887.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562887.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562887.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562887.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562887.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562887.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562887.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562887.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562887.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562887.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562887.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562887.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562887.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562887.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562887.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562888.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562888.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562888.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562888.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562889.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562889.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562889.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562889.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562889.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562889.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562889.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562889.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562889.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562889.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562889.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562889.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562889.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562889.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562889.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[562893.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091690]
>[562893.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091690] width 1920 pitch 7680 (/4 1920)
>[562893.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d63e40]
>[562893.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d63e40] width 1920 pitch 7680 (/4 1920)
>[562893.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091690]
>[562893.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091690] width 1920 pitch 7680 (/4 1920)
>[562893.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d63e40]
>[562893.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d63e40] width 1920 pitch 7680 (/4 1920)
>[562893.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091690]
>[562893.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091690] width 1920 pitch 7680 (/4 1920)
>[562893.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d63e40]
>[562893.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d63e40] width 1920 pitch 7680 (/4 1920)
>[562893.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091690]
>[562893.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091690] width 1920 pitch 7680 (/4 1920)
>[562893.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d63e40]
>[562893.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d63e40] width 1920 pitch 7680 (/4 1920)
>[562893.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091690]
>[562893.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091690] width 1920 pitch 7680 (/4 1920)
>[562893.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d63e40]
>[562893.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d63e40] width 1920 pitch 7680 (/4 1920)
>[562893.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091690]
>[562893.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091690] width 1920 pitch 7680 (/4 1920)
>[562944.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826ec0]
>[562944.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826ec0] width 1920 pitch 7680 (/4 1920)
>[562959.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[562959.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[563019.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2526d90]
>[563019.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2526d90] width 1920 pitch 7680 (/4 1920)
>[563064.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[563064.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[563124.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7d490]
>[563124.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7d490] width 1920 pitch 7680 (/4 1920)
>[563139.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4974a60]
>[563139.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4974a60] width 1920 pitch 7680 (/4 1920)
>[563199.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4974a60]
>[563199.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4974a60] width 1920 pitch 7680 (/4 1920)
>[563214.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492a4e0]
>[563214.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492a4e0] width 1920 pitch 7680 (/4 1920)
>[563229.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294ebf0]
>[563229.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294ebf0] width 1920 pitch 7680 (/4 1920)
>[563244.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a2da0]
>[563244.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a2da0] width 1920 pitch 7680 (/4 1920)
>[563589.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b3a320]
>[563589.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b3a320] width 1920 pitch 7680 (/4 1920)
>[563604.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f703c0]
>[563604.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f703c0] width 1920 pitch 7680 (/4 1920)
>[563709.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76130]
>[563709.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76130] width 1920 pitch 7680 (/4 1920)
>[563724.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d3e200]
>[563724.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d3e200] width 1920 pitch 7680 (/4 1920)
>[563739.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x629b2c0]
>[563739.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x629b2c0] width 1920 pitch 7680 (/4 1920)
>[563754.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294c160]
>[563754.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294c160] width 1920 pitch 7680 (/4 1920)
>[563784.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[563784.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[563799.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[563799.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[563934.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b5a00]
>[563934.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b5a00] width 1920 pitch 7680 (/4 1920)
>[563949.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6e5d0]
>[563949.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6e5d0] width 1920 pitch 7680 (/4 1920)
>[564009.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x629b2c0]
>[564009.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x629b2c0] width 1920 pitch 7680 (/4 1920)
>[564024.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4630]
>[564024.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4630] width 1920 pitch 7680 (/4 1920)
>[564102.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc580]
>[564102.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc580] width 1920 pitch 7680 (/4 1920)
>[564102.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564102.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564103.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[564103.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[564103.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564103.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564103.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564103.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564103.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564103.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564103.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564103.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564103.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564103.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564103.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564103.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564103.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564103.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564104.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564104.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564104.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564104.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564105.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564105.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564105.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564105.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564105.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564105.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564105.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564105.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564105.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564105.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564105.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef270]
>[564105.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef270] width 1920 pitch 7680 (/4 1920)
>[564105.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d770e0]
>[564105.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d770e0] width 1920 pitch 7680 (/4 1920)
>[564159.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082e50]
>[564159.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082e50] width 1920 pitch 7680 (/4 1920)
>[564174.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082e50]
>[564174.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082e50] width 1920 pitch 7680 (/4 1920)
>[564189.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76130]
>[564189.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76130] width 1920 pitch 7680 (/4 1920)
>[564204.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7fa0]
>[564204.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7fa0] width 1920 pitch 7680 (/4 1920)
>[564292.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49bfc00]
>[564292.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49bfc00] width 1920 pitch 7680 (/4 1920)
>[564292.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[564292.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[564292.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564292.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564364.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564364.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564364.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5015a60]
>[564364.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5015a60] width 1920 pitch 7680 (/4 1920)
>[564364.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564364.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564364.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5015a60]
>[564364.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5015a60] width 1920 pitch 7680 (/4 1920)
>[564364.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564364.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564364.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[564364.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[564364.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564364.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564364.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[564364.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[564364.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564365.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564365.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7fa0]
>[564365.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7fa0] width 1920 pitch 7680 (/4 1920)
>[564365.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f329a0]
>[564365.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f329a0] width 1920 pitch 7680 (/4 1920)
>[564367.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a00c0]
>[564367.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a00c0] width 1920 pitch 7680 (/4 1920)
>[564367.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564367.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564367.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a23450]
>[564367.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a23450] width 1920 pitch 7680 (/4 1920)
>[564367.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564367.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564367.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a23450]
>[564367.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a23450] width 1920 pitch 7680 (/4 1920)
>[564367.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564367.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564367.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49bfc00]
>[564367.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49bfc00] width 1920 pitch 7680 (/4 1920)
>[564367.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564367.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564367.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49bfc00]
>[564367.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49bfc00] width 1920 pitch 7680 (/4 1920)
>[564579.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a00c0]
>[564579.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a00c0] width 1920 pitch 7680 (/4 1920)
>[564589.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e170]
>[564589.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e170] width 1920 pitch 7680 (/4 1920)
>[564589.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2936f40]
>[564589.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2936f40] width 1920 pitch 7680 (/4 1920)
>[564589.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e170]
>[564589.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e170] width 1920 pitch 7680 (/4 1920)
>[564589.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2936f40]
>[564589.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2936f40] width 1920 pitch 7680 (/4 1920)
>[564589.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f7a0]
>[564589.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f7a0] width 1920 pitch 7680 (/4 1920)
>[564589.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2936f40]
>[564589.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2936f40] width 1920 pitch 7680 (/4 1920)
>[564589.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc580]
>[564589.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc580] width 1920 pitch 7680 (/4 1920)
>[564589.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2936f40]
>[564589.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2936f40] width 1920 pitch 7680 (/4 1920)
>[564589.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc580]
>[564589.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc580] width 1920 pitch 7680 (/4 1920)
>[564589.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f703c0]
>[564589.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f703c0] width 1920 pitch 7680 (/4 1920)
>[564589.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7fa0]
>[564589.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7fa0] width 1920 pitch 7680 (/4 1920)
>[564591.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082e50]
>[564591.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082e50] width 1920 pitch 7680 (/4 1920)
>[564591.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebc5a0]
>[564591.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebc5a0] width 1920 pitch 7680 (/4 1920)
>[564591.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[564591.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[564591.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564591.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564591.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[564591.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[564591.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49bfc00]
>[564591.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49bfc00] width 1920 pitch 7680 (/4 1920)
>[564591.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[564591.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[564591.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49bfc00]
>[564591.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49bfc00] width 1920 pitch 7680 (/4 1920)
>[564591.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a23450]
>[564591.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a23450] width 1920 pitch 7680 (/4 1920)
>[564591.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49bfc00]
>[564591.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49bfc00] width 1920 pitch 7680 (/4 1920)
>[564591.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfe3d0]
>[564591.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfe3d0] width 1920 pitch 7680 (/4 1920)
>[564594.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564594.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564639.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40067d0]
>[564639.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40067d0] width 1920 pitch 7680 (/4 1920)
>[564669.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a94840]
>[564669.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a94840] width 1920 pitch 7680 (/4 1920)
>[564774.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7f7e0]
>[564774.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7f7e0] width 1920 pitch 7680 (/4 1920)
>[564789.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295bf00]
>[564789.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295bf00] width 1920 pitch 7680 (/4 1920)
>[564804.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628cae0]
>[564804.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628cae0] width 1920 pitch 7680 (/4 1920)
>[564819.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082e50]
>[564819.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082e50] width 1920 pitch 7680 (/4 1920)
>[564894.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02d80]
>[564894.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02d80] width 1920 pitch 7680 (/4 1920)
>[564924.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d5080]
>[564924.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d5080] width 1920 pitch 7680 (/4 1920)
>[564984.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5015a60]
>[564984.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5015a60] width 1920 pitch 7680 (/4 1920)
>[564999.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488c20]
>[564999.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488c20] width 1920 pitch 7680 (/4 1920)
>[565044.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d42a0]
>[565044.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d42a0] width 1920 pitch 7680 (/4 1920)
>[565059.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2610]
>[565059.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2610] width 1920 pitch 7680 (/4 1920)
>[565089.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da2920]
>[565089.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da2920] width 1920 pitch 7680 (/4 1920)
>[565119.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb93f0]
>[565119.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb93f0] width 1920 pitch 7680 (/4 1920)
>[565194.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501a310]
>[565194.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501a310] width 1920 pitch 7680 (/4 1920)
>[565209.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a23450]
>[565209.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a23450] width 1920 pitch 7680 (/4 1920)
>[565479.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a380]
>[565479.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a380] width 1920 pitch 7680 (/4 1920)
>[565494.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30e8e90]
>[565494.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30e8e90] width 1920 pitch 7680 (/4 1920)
>[565569.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa0ce0]
>[565569.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa0ce0] width 1920 pitch 7680 (/4 1920)
>[565584.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2544680]
>[565584.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2544680] width 1920 pitch 7680 (/4 1920)
>[565674.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4860]
>[565674.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4860] width 1920 pitch 7680 (/4 1920)
>[565689.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b08f0]
>[565689.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b08f0] width 1920 pitch 7680 (/4 1920)
>[565719.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e390]
>[565719.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e390] width 1920 pitch 7680 (/4 1920)
>[565734.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f087b0]
>[565734.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f087b0] width 1920 pitch 7680 (/4 1920)
>[565794.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f329a0]
>[565794.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f329a0] width 1920 pitch 7680 (/4 1920)
>[565809.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f513f0]
>[565809.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f513f0] width 1920 pitch 7680 (/4 1920)
>[565884.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29babe0]
>[565884.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29babe0] width 1920 pitch 7680 (/4 1920)
>[565899.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24774a0]
>[565899.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24774a0] width 1920 pitch 7680 (/4 1920)
>[565914.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e36f40]
>[565914.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e36f40] width 1920 pitch 7680 (/4 1920)
>[565929.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888d20]
>[565929.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888d20] width 1920 pitch 7680 (/4 1920)
>[565944.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b6cd0]
>[565944.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b6cd0] width 1920 pitch 7680 (/4 1920)
>[565959.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[565959.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[566004.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3954d10]
>[566004.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3954d10] width 1920 pitch 7680 (/4 1920)
>[566019.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab000]
>[566019.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab000] width 1920 pitch 7680 (/4 1920)
>[566049.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53675e0]
>[566049.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53675e0] width 1920 pitch 7680 (/4 1920)
>[566064.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e010]
>[566064.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e010] width 1920 pitch 7680 (/4 1920)
>[566154.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6296710]
>[566154.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6296710] width 1920 pitch 7680 (/4 1920)
>[566169.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[566169.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[566229.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500ffe0]
>[566229.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500ffe0] width 1920 pitch 7680 (/4 1920)
>[566244.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[566244.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[566334.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502a520]
>[566334.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502a520] width 1920 pitch 7680 (/4 1920)
>[566349.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20330]
>[566349.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20330] width 1920 pitch 7680 (/4 1920)
>[566364.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5029710]
>[566364.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5029710] width 1920 pitch 7680 (/4 1920)
>[566379.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc2d0]
>[566379.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc2d0] width 1920 pitch 7680 (/4 1920)
>[566399.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[566399.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[566399.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[566399.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[566399.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[566399.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[566399.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[566399.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[566399.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[566399.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[566399.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[566399.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[566399.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[566399.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[566399.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22c90]
>[566399.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22c90] width 1920 pitch 7680 (/4 1920)
>[566399.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d69020]
>[566399.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d69020] width 1920 pitch 7680 (/4 1920)
>[566399.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30745d0]
>[566399.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30745d0] width 1920 pitch 7680 (/4 1920)
>[566399.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f513f0]
>[566399.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f513f0] width 1920 pitch 7680 (/4 1920)
>[566399.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa66d0]
>[566399.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa66d0] width 1920 pitch 7680 (/4 1920)
>[566399.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[566399.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[566399.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa66d0]
>[566399.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa66d0] width 1920 pitch 7680 (/4 1920)
>[566399.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b8bf60]
>[566399.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b8bf60] width 1920 pitch 7680 (/4 1920)
>[566399.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa66d0]
>[566399.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa66d0] width 1920 pitch 7680 (/4 1920)
>[566399.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc2d0]
>[566399.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc2d0] width 1920 pitch 7680 (/4 1920)
>[566399.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b79b20]
>[566399.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b79b20] width 1920 pitch 7680 (/4 1920)
>[566399.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc580]
>[566399.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc580] width 1920 pitch 7680 (/4 1920)
>[566399.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fab000]
>[566399.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fab000] width 1920 pitch 7680 (/4 1920)
>[566399.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5021ed0]
>[566399.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5021ed0] width 1920 pitch 7680 (/4 1920)
>[566399.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e010]
>[566399.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e010] width 1920 pitch 7680 (/4 1920)
>[566399.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7b40]
>[566399.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7b40] width 1920 pitch 7680 (/4 1920)
>[566399.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52feba0]
>[566399.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52feba0] width 1920 pitch 7680 (/4 1920)
>[566399.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e950]
>[566400.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e950] width 1920 pitch 7680 (/4 1920)
>[566400.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52feba0]
>[566400.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52feba0] width 1920 pitch 7680 (/4 1920)
>[566400.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0]
>[566400.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1920 pitch 7680 (/4 1920)
>[566400.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a380]
>[566400.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a380] width 1920 pitch 7680 (/4 1920)
>[566400.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0]
>[566400.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1920 pitch 7680 (/4 1920)
>[566400.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622b9c0]
>[566400.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622b9c0] width 1920 pitch 7680 (/4 1920)
>[566400.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0]
>[566400.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1920 pitch 7680 (/4 1920)
>[566400.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[566400.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[566400.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[566400.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[566400.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[566400.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[566400.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[566400.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[566400.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f087b0]
>[566400.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f087b0] width 1920 pitch 7680 (/4 1920)
>[566400.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[566400.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[566400.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f087b0]
>[566400.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f087b0] width 1920 pitch 7680 (/4 1920)
>[566400.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15580]
>[566400.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15580] width 1920 pitch 7680 (/4 1920)
>[566400.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f087b0]
>[566400.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f087b0] width 1920 pitch 7680 (/4 1920)
>[566409.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c8210]
>[566409.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c8210] width 1920 pitch 7680 (/4 1920)
>[566424.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22c90]
>[566424.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22c90] width 1920 pitch 7680 (/4 1920)
>[566454.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49deba0]
>[566454.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49deba0] width 1920 pitch 7680 (/4 1920)
>[566469.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[566469.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[566514.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5045910]
>[566514.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5045910] width 1920 pitch 7680 (/4 1920)
>[566544.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4857bc0]
>[566544.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4857bc0] width 1920 pitch 7680 (/4 1920)
>[566571.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7b6e0]
>[566571.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7b6e0] width 1920 pitch 7680 (/4 1920)
>[566572.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48ed760]
>[566572.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48ed760] width 1920 pitch 7680 (/4 1920)
>[566574.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f40a50]
>[566574.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f40a50] width 1920 pitch 7680 (/4 1920)
>[566589.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48ed9d0]
>[566589.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48ed9d0] width 1920 pitch 7680 (/4 1920)
>[566634.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4bf0]
>[566634.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4bf0] width 1920 pitch 7680 (/4 1920)
>[566649.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db4bf0]
>[566649.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db4bf0] width 1920 pitch 7680 (/4 1920)
>[566679.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dda2f0]
>[566679.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dda2f0] width 1920 pitch 7680 (/4 1920)
>[566694.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dda2f0]
>[566694.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dda2f0] width 1920 pitch 7680 (/4 1920)
>[566739.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930910]
>[566739.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930910] width 1920 pitch 7680 (/4 1920)
>[566769.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8180]
>[566769.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8180] width 1920 pitch 7680 (/4 1920)
>[566784.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f1330]
>[566784.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f1330] width 1920 pitch 7680 (/4 1920)
>[566799.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48561c0]
>[566799.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48561c0] width 1920 pitch 7680 (/4 1920)
>[566814.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8180]
>[566814.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8180] width 1920 pitch 7680 (/4 1920)
>[566844.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dda2f0]
>[566844.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dda2f0] width 1920 pitch 7680 (/4 1920)
>[566859.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8180]
>[566859.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8180] width 1920 pitch 7680 (/4 1920)
>[566874.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c0b20]
>[566874.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c0b20] width 1920 pitch 7680 (/4 1920)
>[566889.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dda2f0]
>[566889.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dda2f0] width 1920 pitch 7680 (/4 1920)
>[566904.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd8180]
>[566904.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd8180] width 1920 pitch 7680 (/4 1920)
>[567084.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930910]
>[567084.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930910] width 1920 pitch 7680 (/4 1920)
>[567099.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde0a0]
>[567099.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde0a0] width 1920 pitch 7680 (/4 1920)
>[567274.954] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[567274.954] (II) RADEON(0): Using hsync ranges from config file
>[567274.954] (II) RADEON(0): Using vrefresh ranges from config file
>[567274.954] (II) RADEON(0): Printing DDC gathered Modelines:
>[567274.954] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[567274.954] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[567274.954] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[567274.954] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[567274.954] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[567274.954] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[567274.954] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[567274.954] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[567274.954] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[567274.954] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[567274.954] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[567274.954] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[567365.672] (II) RADEON(0): RADEONSaveScreen(2)
>[567365.672] (II) RADEON(0): RADEONSaveScreen(0)
>[570855.866] (II) RADEON(0): RADEONSaveScreen(1)
>[570856.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04350]
>[570856.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04350] width 1920 pitch 7680 (/4 1920)
>[570972.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffa450]
>[570972.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffa450] width 1920 pitch 7680 (/4 1920)
>[570972.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe2550]
>[570972.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe2550] width 1920 pitch 7680 (/4 1920)
>[570972.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4905410]
>[570972.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4905410] width 1920 pitch 7680 (/4 1920)
>[570972.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6b500]
>[570972.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6b500] width 1920 pitch 7680 (/4 1920)
>[570973.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b8d170]
>[570973.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b8d170] width 1920 pitch 7680 (/4 1920)
>[570973.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a3ec0]
>[570973.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a3ec0] width 1920 pitch 7680 (/4 1920)
>[570973.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffa450]
>[570973.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffa450] width 1920 pitch 7680 (/4 1920)
>[570973.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b8d170]
>[570973.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b8d170] width 1920 pitch 7680 (/4 1920)
>[570973.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04350]
>[570973.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04350] width 1920 pitch 7680 (/4 1920)
>[570973.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481bba0]
>[570973.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481bba0] width 1920 pitch 7680 (/4 1920)
>[570973.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42780]
>[570973.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42780] width 1920 pitch 7680 (/4 1920)
>[570973.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256aaf0]
>[570974.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256aaf0] width 1920 pitch 7680 (/4 1920)
>[570974.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fc0f0]
>[570974.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fc0f0] width 1920 pitch 7680 (/4 1920)
>[570974.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256aaf0]
>[570974.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256aaf0] width 1920 pitch 7680 (/4 1920)
>[570975.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f04350]
>[570975.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f04350] width 1920 pitch 7680 (/4 1920)
>[570975.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe2550]
>[570975.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe2550] width 1920 pitch 7680 (/4 1920)
>[570975.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c42780]
>[570975.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c42780] width 1920 pitch 7680 (/4 1920)
>[570975.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4905410]
>[570975.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4905410] width 1920 pitch 7680 (/4 1920)
>[570975.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6b500]
>[570975.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6b500] width 1920 pitch 7680 (/4 1920)
>[570975.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b8d170]
>[570975.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b8d170] width 1920 pitch 7680 (/4 1920)
>[571006.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628d6e0]
>[571006.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628d6e0] width 1920 pitch 7680 (/4 1920)
>[571021.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[571021.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[571081.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b89220]
>[571081.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b89220] width 1920 pitch 7680 (/4 1920)
>[571111.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x621d9d0]
>[571111.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x621d9d0] width 1920 pitch 7680 (/4 1920)
>[571126.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e8680]
>[571126.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e8680] width 1920 pitch 7680 (/4 1920)
>[571141.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x491c8f0]
>[571141.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x491c8f0] width 1920 pitch 7680 (/4 1920)
>[571201.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a91290]
>[571201.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a91290] width 1920 pitch 7680 (/4 1920)
>[571216.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49849d0]
>[571216.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49849d0] width 1920 pitch 7680 (/4 1920)
>[571411.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c0f0]
>[571411.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c0f0] width 1920 pitch 7680 (/4 1920)
>[571426.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082e50]
>[571426.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082e50] width 1920 pitch 7680 (/4 1920)
>[571591.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[571591.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[571606.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50545c0]
>[571606.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50545c0] width 1920 pitch 7680 (/4 1920)
>[571651.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c0f0]
>[571651.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c0f0] width 1920 pitch 7680 (/4 1920)
>[571666.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[571666.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[571711.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c3db0]
>[571711.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c3db0] width 1920 pitch 7680 (/4 1920)
>[571741.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[571741.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[571771.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50545c0]
>[571771.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50545c0] width 1920 pitch 7680 (/4 1920)
>[571786.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53675e0]
>[571786.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53675e0] width 1920 pitch 7680 (/4 1920)
>[571816.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[571816.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[571831.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50545c0]
>[571831.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50545c0] width 1920 pitch 7680 (/4 1920)
>[571861.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c0f0]
>[571861.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c0f0] width 1920 pitch 7680 (/4 1920)
>[571876.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[571876.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[571929.856] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[571929.856] (II) RADEON(0): Using hsync ranges from config file
>[571929.856] (II) RADEON(0): Using vrefresh ranges from config file
>[571929.856] (II) RADEON(0): Printing DDC gathered Modelines:
>[571929.856] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[571929.856] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[571929.856] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[571929.856] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[571929.856] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[571929.856] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[571929.856] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[571929.856] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[571929.856] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[571929.856] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[571929.856] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[571929.856] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[572019.671] (II) RADEON(0): RADEONSaveScreen(2)
>[572019.671] (II) RADEON(0): RADEONSaveScreen(0)
>[572306.335] (II) RADEON(0): RADEONSaveScreen(1)
>[572306.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502c0f0]
>[572306.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502c0f0] width 1920 pitch 7680 (/4 1920)
>[572342.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a950]
>[572342.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a950] width 1920 pitch 7680 (/4 1920)
>[572345.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e00d0]
>[572345.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e00d0] width 1920 pitch 7680 (/4 1920)
>[572381.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f6b0]
>[572381.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f6b0] width 1920 pitch 7680 (/4 1920)
>[572396.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x53675e0]
>[572396.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x53675e0] width 1920 pitch 7680 (/4 1920)
>[572426.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2823ce0]
>[572426.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2823ce0] width 1920 pitch 7680 (/4 1920)
>[572441.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c4f010]
>[572441.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c4f010] width 1920 pitch 7680 (/4 1920)
>[572456.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5053a90]
>[572456.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5053a90] width 1920 pitch 7680 (/4 1920)
>[572471.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283b6a0]
>[572471.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283b6a0] width 1920 pitch 7680 (/4 1920)
>[572591.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5099890]
>[572591.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5099890] width 1920 pitch 7680 (/4 1920)
>[572606.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49763c0]
>[572606.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49763c0] width 1920 pitch 7680 (/4 1920)
>[572621.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dff470]
>[572621.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dff470] width 1920 pitch 7680 (/4 1920)
>[572636.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2d660]
>[572636.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2d660] width 1920 pitch 7680 (/4 1920)
>[572786.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b79b20]
>[572786.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b79b20] width 1920 pitch 7680 (/4 1920)
>[572801.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5028e20]
>[572801.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5028e20] width 1920 pitch 7680 (/4 1920)
>[572831.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dfe50]
>[572831.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dfe50] width 1920 pitch 7680 (/4 1920)
>[572846.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35490]
>[572846.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35490] width 1920 pitch 7680 (/4 1920)
>[572906.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[572906.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[572951.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd5fc0]
>[572951.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd5fc0] width 1920 pitch 7680 (/4 1920)
>[573011.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573011.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573026.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x47bd250]
>[573026.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x47bd250] width 1920 pitch 7680 (/4 1920)
>[573176.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x47bd250]
>[573176.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x47bd250] width 1920 pitch 7680 (/4 1920)
>[573191.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1fc60]
>[573191.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1fc60] width 1920 pitch 7680 (/4 1920)
>[573236.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4926210]
>[573236.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4926210] width 1920 pitch 7680 (/4 1920)
>[573251.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a580]
>[573251.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a580] width 1920 pitch 7680 (/4 1920)
>[573391.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573391.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573391.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573391.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573391.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573391.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573391.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573391.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573391.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573391.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573391.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573391.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573391.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573391.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573391.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573391.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573391.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573391.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573391.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573391.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573395.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573395.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573395.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573395.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573395.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573395.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573395.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573395.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573395.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573395.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573395.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573395.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573395.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573395.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573395.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573395.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573395.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573395.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573395.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065c40]
>[573395.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065c40] width 1920 pitch 7680 (/4 1920)
>[573396.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3156d60]
>[573396.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3156d60] width 1920 pitch 7680 (/4 1920)
>[573396.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32bf0]
>[573396.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32bf0] width 1920 pitch 7680 (/4 1920)
>[573396.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[573396.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[573396.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573396.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573396.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e34970]
>[573396.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e34970] width 1920 pitch 7680 (/4 1920)
>[573396.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[573396.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[573396.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7c400]
>[573396.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7c400] width 1920 pitch 7680 (/4 1920)
>[573396.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[573396.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[573396.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7c400]
>[573396.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7c400] width 1920 pitch 7680 (/4 1920)
>[573396.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[573396.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[573396.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2823ce0]
>[573396.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2823ce0] width 1920 pitch 7680 (/4 1920)
>[573396.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[573396.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[573396.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2823ce0]
>[573396.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2823ce0] width 1920 pitch 7680 (/4 1920)
>[573401.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a580]
>[573401.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a580] width 1920 pitch 7680 (/4 1920)
>[573416.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3156d60]
>[573416.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3156d60] width 1920 pitch 7680 (/4 1920)
>[573420.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573420.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573420.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc51d0]
>[573420.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc51d0] width 1920 pitch 7680 (/4 1920)
>[573420.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52733c0]
>[573420.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52733c0] width 1920 pitch 7680 (/4 1920)
>[573420.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[573420.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[573420.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573420.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573420.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[573421.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[573421.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573421.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573421.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[573421.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[573421.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573421.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573422.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[573422.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[573422.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573422.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573422.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[573422.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[573422.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573422.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573422.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[573422.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[573422.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7bf70]
>[573422.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7bf70] width 1920 pitch 7680 (/4 1920)
>[573422.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[573422.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[573425.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f75f30]
>[573425.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f75f30] width 1920 pitch 7680 (/4 1920)
>[573431.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6291860]
>[573431.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6291860] width 1920 pitch 7680 (/4 1920)
>[573437.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499d680]
>[573437.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499d680] width 1920 pitch 7680 (/4 1920)
>[573437.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500eb10]
>[573437.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500eb10] width 1920 pitch 7680 (/4 1920)
>[573437.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24f7bb0]
>[573437.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24f7bb0] width 1920 pitch 7680 (/4 1920)
>[573438.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289be70]
>[573438.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289be70] width 1920 pitch 7680 (/4 1920)
>[573438.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2931d90]
>[573438.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2931d90] width 1920 pitch 7680 (/4 1920)
>[573438.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49856d0]
>[573438.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49856d0] width 1920 pitch 7680 (/4 1920)
>[573438.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab3b30]
>[573438.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab3b30] width 1920 pitch 7680 (/4 1920)
>[573438.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c0a90]
>[573438.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c0a90] width 1920 pitch 7680 (/4 1920)
>[573438.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c0a90]
>[573438.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c0a90] width 1920 pitch 7680 (/4 1920)
>[573438.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6291930]
>[573438.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6291930] width 1920 pitch 7680 (/4 1920)
>[573438.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c0a90]
>[573438.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c0a90] width 1920 pitch 7680 (/4 1920)
>[573438.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6291930]
>[573438.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6291930] width 1920 pitch 7680 (/4 1920)
>[573446.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc0cb0]
>[573446.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc0cb0] width 1920 pitch 7680 (/4 1920)
>[573448.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6fa50]
>[573448.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6fa50] width 1920 pitch 7680 (/4 1920)
>[573448.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30cc650]
>[573448.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30cc650] width 1920 pitch 7680 (/4 1920)
>[573448.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492ee10]
>[573448.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492ee10] width 1920 pitch 7680 (/4 1920)
>[573448.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5053e30]
>[573448.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5053e30] width 1920 pitch 7680 (/4 1920)
>[573451.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6fa50]
>[573451.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6fa50] width 1920 pitch 7680 (/4 1920)
>[573451.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x621e8d0]
>[573451.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x621e8d0] width 1920 pitch 7680 (/4 1920)
>[573451.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6fa50]
>[573451.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6fa50] width 1920 pitch 7680 (/4 1920)
>[573451.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49856d0]
>[573451.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49856d0] width 1920 pitch 7680 (/4 1920)
>[573451.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e269b0]
>[573451.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e269b0] width 1920 pitch 7680 (/4 1920)
>[573461.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c7eaf0]
>[573461.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c7eaf0] width 1920 pitch 7680 (/4 1920)
>[573476.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2823ce0]
>[573476.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2823ce0] width 1920 pitch 7680 (/4 1920)
>[573482.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4926210]
>[573482.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4926210] width 1920 pitch 7680 (/4 1920)
>[573482.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3156d60]
>[573482.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3156d60] width 1920 pitch 7680 (/4 1920)
>[573482.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6232560]
>[573482.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6232560] width 1920 pitch 7680 (/4 1920)
>[573482.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503e2c0]
>[573482.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503e2c0] width 1920 pitch 7680 (/4 1920)
>[573501.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab6980]
>[573501.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab6980] width 1920 pitch 7680 (/4 1920)
>[573501.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c330]
>[573501.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c330] width 1920 pitch 7680 (/4 1920)
>[573501.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab6980]
>[573501.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab6980] width 1920 pitch 7680 (/4 1920)
>[573501.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5020700]
>[573501.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5020700] width 1920 pitch 7680 (/4 1920)
>[573701.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea50a0]
>[573701.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea50a0] width 1920 pitch 7680 (/4 1920)
>[573716.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889000]
>[573716.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889000] width 1920 pitch 7680 (/4 1920)
>[573836.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a8b4c0]
>[573836.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a8b4c0] width 1920 pitch 7680 (/4 1920)
>[573851.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13080]
>[573851.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13080] width 1920 pitch 7680 (/4 1920)
>[573866.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[573866.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[573881.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13080]
>[573881.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13080] width 1920 pitch 7680 (/4 1920)
>[573926.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488680]
>[573926.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488680] width 1920 pitch 7680 (/4 1920)
>[573941.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[573941.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[574106.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5065170]
>[574106.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5065170] width 1920 pitch 7680 (/4 1920)
>[574121.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51dac30]
>[574121.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51dac30] width 1920 pitch 7680 (/4 1920)
>[574301.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cc60]
>[574301.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cc60] width 1920 pitch 7680 (/4 1920)
>[574316.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd6e70]
>[574316.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd6e70] width 1920 pitch 7680 (/4 1920)
>[574406.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[574406.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[574421.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb9450]
>[574421.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb9450] width 1920 pitch 7680 (/4 1920)
>[574466.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d040]
>[574466.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d040] width 1920 pitch 7680 (/4 1920)
>[574481.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62aa0a0]
>[574481.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62aa0a0] width 1920 pitch 7680 (/4 1920)
>[574539.323] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[574539.323] (II) RADEON(0): Using hsync ranges from config file
>[574539.323] (II) RADEON(0): Using vrefresh ranges from config file
>[574539.323] (II) RADEON(0): Printing DDC gathered Modelines:
>[574539.323] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[574539.323] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[574539.323] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[574539.323] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[574539.323] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[574539.323] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[574539.323] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[574539.323] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[574539.323] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[574539.323] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[574539.323] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[574539.323] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[574629.655] (II) RADEON(0): RADEONSaveScreen(2)
>[574629.655] (II) RADEON(0): RADEONSaveScreen(0)
>[575188.857] (II) RADEON(0): RADEONSaveScreen(1)
>[575189.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b84770]
>[575189.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b84770] width 1920 pitch 7680 (/4 1920)
>[575219.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c330]
>[575219.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c330] width 1920 pitch 7680 (/4 1920)
>[575234.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebacf0]
>[575234.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebacf0] width 1920 pitch 7680 (/4 1920)
>[575279.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d075a0]
>[575279.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d075a0] width 1920 pitch 7680 (/4 1920)
>[575294.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac14b0]
>[575294.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac14b0] width 1920 pitch 7680 (/4 1920)
>[575384.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac14b0]
>[575384.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac14b0] width 1920 pitch 7680 (/4 1920)
>[575399.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0d8f0]
>[575399.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0d8f0] width 1920 pitch 7680 (/4 1920)
>[575474.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8df0]
>[575474.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8df0] width 1920 pitch 7680 (/4 1920)
>[575489.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d075a0]
>[575489.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d075a0] width 1920 pitch 7680 (/4 1920)
>[575564.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f44bd0]
>[575564.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f44bd0] width 1920 pitch 7680 (/4 1920)
>[575579.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4985270]
>[575579.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4985270] width 1920 pitch 7680 (/4 1920)
>[575669.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4985270]
>[575669.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4985270] width 1920 pitch 7680 (/4 1920)
>[575684.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8df0]
>[575684.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8df0] width 1920 pitch 7680 (/4 1920)
>[575729.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62518e0]
>[575729.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62518e0] width 1920 pitch 7680 (/4 1920)
>[575744.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52733c0]
>[575744.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52733c0] width 1920 pitch 7680 (/4 1920)
>[575894.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cc60]
>[575894.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cc60] width 1920 pitch 7680 (/4 1920)
>[575924.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c53a0]
>[575924.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c53a0] width 1920 pitch 7680 (/4 1920)
>[575939.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac14b0]
>[575939.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac14b0] width 1920 pitch 7680 (/4 1920)
>[575954.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3156d60]
>[575954.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3156d60] width 1920 pitch 7680 (/4 1920)
>[575969.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1c2a0]
>[575969.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1c2a0] width 1920 pitch 7680 (/4 1920)
>[575984.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[575984.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[576014.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6293150]
>[576014.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6293150] width 1920 pitch 7680 (/4 1920)
>[576029.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5da20]
>[576029.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5da20] width 1920 pitch 7680 (/4 1920)
>[576059.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888260]
>[576059.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888260] width 1920 pitch 7680 (/4 1920)
>[576074.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[576074.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[576089.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[576089.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[576104.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[576104.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[576119.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2488c20]
>[576119.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2488c20] width 1920 pitch 7680 (/4 1920)
>[576134.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30310f0]
>[576134.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30310f0] width 1920 pitch 7680 (/4 1920)
>[576149.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e6ad0]
>[576149.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e6ad0] width 1920 pitch 7680 (/4 1920)
>[576179.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b4600]
>[576179.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b4600] width 1920 pitch 7680 (/4 1920)
>[576239.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30af8e0]
>[576239.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30af8e0] width 1920 pitch 7680 (/4 1920)
>[576254.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48681a0]
>[576254.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48681a0] width 1920 pitch 7680 (/4 1920)
>[576269.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[576269.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[576284.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5a30]
>[576284.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5a30] width 1920 pitch 7680 (/4 1920)
>[576314.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7e90]
>[576314.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7e90] width 1920 pitch 7680 (/4 1920)
>[576329.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[576329.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[576344.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506c9f0]
>[576344.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506c9f0] width 1920 pitch 7680 (/4 1920)
>[576345.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55890]
>[576345.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55890] width 1920 pitch 7680 (/4 1920)
>[576345.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2b8a0]
>[576345.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2b8a0] width 1920 pitch 7680 (/4 1920)
>[576345.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55890]
>[576345.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55890] width 1920 pitch 7680 (/4 1920)
>[576345.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2b8a0]
>[576345.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2b8a0] width 1920 pitch 7680 (/4 1920)
>[576345.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55890]
>[576345.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55890] width 1920 pitch 7680 (/4 1920)
>[576345.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2b8a0]
>[576345.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2b8a0] width 1920 pitch 7680 (/4 1920)
>[576345.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[576345.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[576345.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa190]
>[576345.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa190] width 1920 pitch 7680 (/4 1920)
>[576345.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[576345.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[576345.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa190]
>[576345.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa190] width 1920 pitch 7680 (/4 1920)
>[576345.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[576345.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[576346.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2d660]
>[576346.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2d660] width 1920 pitch 7680 (/4 1920)
>[576348.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c7e90]
>[576348.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c7e90] width 1920 pitch 7680 (/4 1920)
>[576348.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[576348.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[576348.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d8d60]
>[576348.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d8d60] width 1920 pitch 7680 (/4 1920)
>[576348.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[576348.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[576348.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d8d60]
>[576348.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d8d60] width 1920 pitch 7680 (/4 1920)
>[576348.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[576348.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[576348.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d8d60]
>[576348.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d8d60] width 1920 pitch 7680 (/4 1920)
>[576348.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[576348.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[576348.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402a380]
>[576348.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402a380] width 1920 pitch 7680 (/4 1920)
>[576348.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[576348.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[576359.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3167be0]
>[576359.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3167be0] width 1920 pitch 7680 (/4 1920)
>[576374.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b5da70]
>[576374.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b5da70] width 1920 pitch 7680 (/4 1920)
>[576389.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6234760]
>[576389.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6234760] width 1920 pitch 7680 (/4 1920)
>[576402.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576402.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576402.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576402.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576402.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576402.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576402.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576402.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576402.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576402.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576402.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576402.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576402.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576402.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576402.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576402.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576402.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576402.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576402.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576402.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576402.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576402.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576402.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576402.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576404.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08240]
>[576404.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08240] width 1920 pitch 7680 (/4 1920)
>[576410.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa5b20]
>[576410.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa5b20] width 1920 pitch 7680 (/4 1920)
>[576410.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[576410.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[576410.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[576410.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[576410.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f7940]
>[576410.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f7940] width 1920 pitch 7680 (/4 1920)
>[576410.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[576410.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[576410.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f7940]
>[576410.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f7940] width 1920 pitch 7680 (/4 1920)
>[576410.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[576410.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[576410.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f7940]
>[576410.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f7940] width 1920 pitch 7680 (/4 1920)
>[576410.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[576410.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[576410.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f7940]
>[576410.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f7940] width 1920 pitch 7680 (/4 1920)
>[576410.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[576410.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[576419.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8a70]
>[576419.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8a70] width 1920 pitch 7680 (/4 1920)
>[576509.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62934b0]
>[576509.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62934b0] width 1920 pitch 7680 (/4 1920)
>[576524.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[576524.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[576554.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[576554.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[576569.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2b8a0]
>[576569.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2b8a0] width 1920 pitch 7680 (/4 1920)
>[576659.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ac8a70]
>[576659.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ac8a70] width 1920 pitch 7680 (/4 1920)
>[576674.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[576674.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[576689.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fa190]
>[576689.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fa190] width 1920 pitch 7680 (/4 1920)
>[576704.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[576704.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[576719.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[576719.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[576734.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c5c0]
>[576734.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c5c0] width 1920 pitch 7680 (/4 1920)
>[576779.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[576779.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[576809.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091670]
>[576809.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091670] width 1920 pitch 7680 (/4 1920)
>[576854.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f5500]
>[576854.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f5500] width 1920 pitch 7680 (/4 1920)
>[576869.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[576869.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[576884.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fede0]
>[576884.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fede0] width 1920 pitch 7680 (/4 1920)
>[576914.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28575f0]
>[576914.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28575f0] width 1920 pitch 7680 (/4 1920)
>[577028.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6240a00]
>[577028.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6240a00] width 1920 pitch 7680 (/4 1920)
>[577028.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50994b0]
>[577028.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50994b0] width 1920 pitch 7680 (/4 1920)
>[577028.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[577028.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[577028.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577028.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577028.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[577028.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[577028.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577028.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577028.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[577028.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[577028.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577028.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577028.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[577028.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[577028.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[577029.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[577029.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[577029.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[577064.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577064.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577064.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577064.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[577064.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[577065.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091670]
>[577065.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091670] width 1920 pitch 7680 (/4 1920)
>[577065.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[577065.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[577065.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[577065.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[577065.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[577065.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[577065.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[577065.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[577065.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5ef70]
>[577065.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5ef70] width 1920 pitch 7680 (/4 1920)
>[577065.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30efa20]
>[577065.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30efa20] width 1920 pitch 7680 (/4 1920)
>[577065.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f5500]
>[577065.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f5500] width 1920 pitch 7680 (/4 1920)
>[577065.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[577065.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[577065.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[577065.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[577065.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[577065.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[577065.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577065.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b76730]
>[577065.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b76730] width 1920 pitch 7680 (/4 1920)
>[577065.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497bff0]
>[577065.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497bff0] width 1920 pitch 7680 (/4 1920)
>[577094.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2460]
>[577094.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2460] width 1920 pitch 7680 (/4 1920)
>[577109.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a13580]
>[577109.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a13580] width 1920 pitch 7680 (/4 1920)
>[577139.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x498f700]
>[577139.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x498f700] width 1920 pitch 7680 (/4 1920)
>[577169.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6234760]
>[577169.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6234760] width 1920 pitch 7680 (/4 1920)
>[577319.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5ef70]
>[577319.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5ef70] width 1920 pitch 7680 (/4 1920)
>[577334.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ada50]
>[577334.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ada50] width 1920 pitch 7680 (/4 1920)
>[577349.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[577349.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[577364.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[577364.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[577379.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5ef70]
>[577379.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5ef70] width 1920 pitch 7680 (/4 1920)
>[577409.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[577409.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[577439.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ada50]
>[577439.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ada50] width 1920 pitch 7680 (/4 1920)
>[577454.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e8150]
>[577454.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e8150] width 1920 pitch 7680 (/4 1920)
>[577514.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebde80]
>[577514.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebde80] width 1920 pitch 7680 (/4 1920)
>[577529.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[577529.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[577544.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ebde80]
>[577544.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ebde80] width 1920 pitch 7680 (/4 1920)
>[577559.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[577559.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[577574.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2967270]
>[577574.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2967270] width 1920 pitch 7680 (/4 1920)
>[577589.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[577589.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[577604.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd8980]
>[577604.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd8980] width 1920 pitch 7680 (/4 1920)
>[577694.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[577694.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[577709.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x629a780]
>[577709.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x629a780] width 1920 pitch 7680 (/4 1920)
>[577754.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6242fc0]
>[577754.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6242fc0] width 1920 pitch 7680 (/4 1920)
>[577769.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[577769.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[577904.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2d440]
>[577904.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2d440] width 1920 pitch 7680 (/4 1920)
>[577934.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c77d0]
>[577934.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c77d0] width 1920 pitch 7680 (/4 1920)
>[578024.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950b30]
>[578024.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950b30] width 1920 pitch 7680 (/4 1920)
>[578054.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[578054.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[578084.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5ef70]
>[578084.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5ef70] width 1920 pitch 7680 (/4 1920)
>[578099.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505f420]
>[578099.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505f420] width 1920 pitch 7680 (/4 1920)
>[578129.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4858e50]
>[578129.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4858e50] width 1920 pitch 7680 (/4 1920)
>[578144.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[578144.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[578204.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f55890]
>[578204.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f55890] width 1920 pitch 7680 (/4 1920)
>[578219.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[578219.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[578249.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[578249.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[578279.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce61b0]
>[578279.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce61b0] width 1920 pitch 7680 (/4 1920)
>[578354.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[578354.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[578384.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2d440]
>[578384.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2d440] width 1920 pitch 7680 (/4 1920)
>[578414.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c77d0]
>[578414.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c77d0] width 1920 pitch 7680 (/4 1920)
>[578444.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[578444.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[578699.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4858e50]
>[578699.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4858e50] width 1920 pitch 7680 (/4 1920)
>[578714.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[578714.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[578744.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6242fc0]
>[578744.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6242fc0] width 1920 pitch 7680 (/4 1920)
>[578748.161] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[578748.161] (II) RADEON(0): Using hsync ranges from config file
>[578748.161] (II) RADEON(0): Using vrefresh ranges from config file
>[578748.161] (II) RADEON(0): Printing DDC gathered Modelines:
>[578748.161] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[578748.161] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[578748.161] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[578748.161] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[578748.161] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[578748.161] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[578748.161] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[578748.161] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[578748.161] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[578748.161] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[578748.161] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[578748.161] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[578838.654] (II) RADEON(0): RADEONSaveScreen(2)
>[578838.654] (II) RADEON(0): RADEONSaveScreen(0)
>[580516.655] (II) RADEON(0): RADEONSaveScreen(1)
>[581206.663] (II) RADEON(0): RADEONSaveScreen(2)
>[581206.663] (II) RADEON(0): RADEONSaveScreen(0)
>[586430.637] (II) RADEON(0): RADEONSaveScreen(1)
>[586430.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce61b0]
>[586430.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce61b0] width 1920 pitch 7680 (/4 1920)
>[586431.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586431.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586431.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf51a0]
>[586431.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf51a0] width 1920 pitch 7680 (/4 1920)
>[586431.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ce61b0]
>[586431.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ce61b0] width 1920 pitch 7680 (/4 1920)
>[586431.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[586431.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[586431.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4900ec0]
>[586431.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4900ec0] width 1920 pitch 7680 (/4 1920)
>[586431.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5ef70]
>[586431.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5ef70] width 1920 pitch 7680 (/4 1920)
>[586431.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950b30]
>[586431.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950b30] width 1920 pitch 7680 (/4 1920)
>[586431.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d8d60]
>[586431.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d8d60] width 1920 pitch 7680 (/4 1920)
>[586431.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fede0]
>[586431.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fede0] width 1920 pitch 7680 (/4 1920)
>[586431.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[586431.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[586431.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fede0]
>[586431.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fede0] width 1920 pitch 7680 (/4 1920)
>[586431.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[586431.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[586445.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[586445.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[586449.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586449.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586450.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[586450.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[586450.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[586450.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[586450.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[586450.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[586451.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2d440]
>[586451.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2d440] width 1920 pitch 7680 (/4 1920)
>[586452.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26250]
>[586452.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26250] width 1920 pitch 7680 (/4 1920)
>[586452.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c8270]
>[586452.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c8270] width 1920 pitch 7680 (/4 1920)
>[586452.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[586452.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[586453.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586453.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586453.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586453.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586453.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586453.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586453.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586453.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586453.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586453.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586453.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586453.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586453.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586453.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586453.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586453.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586453.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586453.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586453.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586453.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586453.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586453.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586453.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586453.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586453.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586453.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586453.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586453.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586453.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586454.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586454.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586454.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586454.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586454.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586454.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586454.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586454.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586454.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586454.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2325da0]
>[586454.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2325da0] width 1920 pitch 7680 (/4 1920)
>[586454.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586454.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586454.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586454.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586454.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586454.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586454.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586454.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586454.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5053a90]
>[586454.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5053a90] width 1920 pitch 7680 (/4 1920)
>[586454.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586454.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586454.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5053a90]
>[586454.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5053a90] width 1920 pitch 7680 (/4 1920)
>[586456.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5053a90]
>[586457.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5053a90] width 1920 pitch 7680 (/4 1920)
>[586457.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bd60]
>[586457.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bd60] width 1920 pitch 7680 (/4 1920)
>[586457.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6dd60]
>[586457.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6dd60] width 1920 pitch 7680 (/4 1920)
>[586460.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a8e0]
>[586460.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a8e0] width 1920 pitch 7680 (/4 1920)
>[586477.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a330]
>[586477.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a330] width 1920 pitch 7680 (/4 1920)
>[586490.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d5e0b0]
>[586490.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d5e0b0] width 1920 pitch 7680 (/4 1920)
>[586505.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826a60]
>[586505.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826a60] width 1920 pitch 7680 (/4 1920)
>[586510.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea9540]
>[586510.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea9540] width 1920 pitch 7680 (/4 1920)
>[586510.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03760]
>[586511.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03760] width 1920 pitch 7680 (/4 1920)
>[586511.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2826a60]
>[586511.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2826a60] width 1920 pitch 7680 (/4 1920)
>[586511.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508cc00]
>[586511.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508cc00] width 1920 pitch 7680 (/4 1920)
>[586511.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cce30]
>[586511.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cce30] width 1920 pitch 7680 (/4 1920)
>[586511.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea9540]
>[586511.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea9540] width 1920 pitch 7680 (/4 1920)
>[586511.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cce30]
>[586511.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cce30] width 1920 pitch 7680 (/4 1920)
>[586511.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea9540]
>[586511.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea9540] width 1920 pitch 7680 (/4 1920)
>[586511.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51450c0]
>[586511.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51450c0] width 1920 pitch 7680 (/4 1920)
>[586511.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea9540]
>[586511.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea9540] width 1920 pitch 7680 (/4 1920)
>[586511.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586511.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586511.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ea9540]
>[586511.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ea9540] width 1920 pitch 7680 (/4 1920)
>[586511.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586511.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586511.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2d440]
>[586511.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2d440] width 1920 pitch 7680 (/4 1920)
>[586511.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4f6b0]
>[586511.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4f6b0] width 1920 pitch 7680 (/4 1920)
>[586511.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2d440]
>[586511.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2d440] width 1920 pitch 7680 (/4 1920)
>[586511.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950b30]
>[586511.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950b30] width 1920 pitch 7680 (/4 1920)
>[586513.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6de30]
>[586513.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6de30] width 1920 pitch 7680 (/4 1920)
>[586513.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f2d440]
>[586513.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f2d440] width 1920 pitch 7680 (/4 1920)
>[586513.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2975530]
>[586513.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2975530] width 1920 pitch 7680 (/4 1920)
>[586513.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586513.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586513.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586513.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586513.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586513.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586513.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623a1b0]
>[586513.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623a1b0] width 1920 pitch 7680 (/4 1920)
>[586513.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6bcb0]
>[586513.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6bcb0] width 1920 pitch 7680 (/4 1920)
>[586514.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586514.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586514.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f03760]
>[586515.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f03760] width 1920 pitch 7680 (/4 1920)
>[586515.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611abf0]
>[586515.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611abf0] width 1920 pitch 7680 (/4 1920)
>[586520.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7acb0]
>[586520.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7acb0] width 1920 pitch 7680 (/4 1920)
>[586565.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25d20]
>[586565.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25d20] width 1920 pitch 7680 (/4 1920)
>[586568.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49815c0]
>[586568.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49815c0] width 1920 pitch 7680 (/4 1920)
>[586568.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecf20]
>[586568.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecf20] width 1920 pitch 7680 (/4 1920)
>[586568.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25d20]
>[586568.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25d20] width 1920 pitch 7680 (/4 1920)
>[586568.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecf20]
>[586568.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecf20] width 1920 pitch 7680 (/4 1920)
>[586568.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062d50]
>[586568.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062d50] width 1920 pitch 7680 (/4 1920)
>[586568.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c4880]
>[586568.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c4880] width 1920 pitch 7680 (/4 1920)
>[586568.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49815c0]
>[586568.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49815c0] width 1920 pitch 7680 (/4 1920)
>[586568.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28155b0]
>[586568.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28155b0] width 1920 pitch 7680 (/4 1920)
>[586568.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecf20]
>[586568.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecf20] width 1920 pitch 7680 (/4 1920)
>[586568.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062d50]
>[586568.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062d50] width 1920 pitch 7680 (/4 1920)
>[586568.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c4880]
>[586568.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c4880] width 1920 pitch 7680 (/4 1920)
>[586568.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ecf20]
>[586568.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ecf20] width 1920 pitch 7680 (/4 1920)
>[586569.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5051ec0]
>[586569.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5051ec0] width 1920 pitch 7680 (/4 1920)
>[586569.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5051e60]
>[586569.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5051e60] width 1920 pitch 7680 (/4 1920)
>[586569.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49815c0]
>[586569.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49815c0] width 1920 pitch 7680 (/4 1920)
>[586569.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0f60]
>[586569.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0f60] width 1920 pitch 7680 (/4 1920)
>[586569.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486dd50]
>[586569.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486dd50] width 1920 pitch 7680 (/4 1920)
>[586569.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a0f60]
>[586569.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a0f60] width 1920 pitch 7680 (/4 1920)
>[586569.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dff70]
>[586569.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dff70] width 1920 pitch 7680 (/4 1920)
>[586569.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dff70]
>[586569.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dff70] width 1920 pitch 7680 (/4 1920)
>[586569.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e13c0]
>[586569.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e13c0] width 1920 pitch 7680 (/4 1920)
>[586569.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dff70]
>[586569.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dff70] width 1920 pitch 7680 (/4 1920)
>[586569.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507dc30]
>[586569.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507dc30] width 1920 pitch 7680 (/4 1920)
>[586569.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1af0]
>[586569.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1af0] width 1920 pitch 7680 (/4 1920)
>[586569.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1a970]
>[586569.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1a970] width 1920 pitch 7680 (/4 1920)
>[586589.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a7ff0]
>[586589.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a7ff0] width 1920 pitch 7680 (/4 1920)
>[586610.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294a5a0]
>[586610.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294a5a0] width 1920 pitch 7680 (/4 1920)
>[586626.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f2c0]
>[586626.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f2c0] width 1920 pitch 7680 (/4 1920)
>[586626.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdf930]
>[586626.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdf930] width 1920 pitch 7680 (/4 1920)
>[586626.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f2c0]
>[586626.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f2c0] width 1920 pitch 7680 (/4 1920)
>[586626.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a7ff0]
>[586626.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a7ff0] width 1920 pitch 7680 (/4 1920)
>[586626.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586626.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586626.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5740]
>[586626.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5740] width 1920 pitch 7680 (/4 1920)
>[586626.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586626.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586626.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5740]
>[586626.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5740] width 1920 pitch 7680 (/4 1920)
>[586626.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586626.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586626.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a7ff0]
>[586626.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a7ff0] width 1920 pitch 7680 (/4 1920)
>[586626.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bd650]
>[586626.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bd650] width 1920 pitch 7680 (/4 1920)
>[586626.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdf930]
>[586626.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdf930] width 1920 pitch 7680 (/4 1920)
>[586640.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586640.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586648.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdf930]
>[586648.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdf930] width 1920 pitch 7680 (/4 1920)
>[586648.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586648.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586648.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4900ec0]
>[586648.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4900ec0] width 1920 pitch 7680 (/4 1920)
>[586648.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586648.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586648.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586648.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586650.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[586650.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[586650.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fede0]
>[586650.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fede0] width 1920 pitch 7680 (/4 1920)
>[586650.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f73a0]
>[586650.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f73a0] width 1920 pitch 7680 (/4 1920)
>[586650.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6242fc0]
>[586650.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6242fc0] width 1920 pitch 7680 (/4 1920)
>[586650.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f73a0]
>[586650.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f73a0] width 1920 pitch 7680 (/4 1920)
>[586650.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6242fc0]
>[586650.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6242fc0] width 1920 pitch 7680 (/4 1920)
>[586650.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f73a0]
>[586650.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f73a0] width 1920 pitch 7680 (/4 1920)
>[586650.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6242fc0]
>[586650.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6242fc0] width 1920 pitch 7680 (/4 1920)
>[586651.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f200]
>[586651.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f200] width 1920 pitch 7680 (/4 1920)
>[586651.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ddb0]
>[586651.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ddb0] width 1920 pitch 7680 (/4 1920)
>[586651.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f200]
>[586651.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f200] width 1920 pitch 7680 (/4 1920)
>[586651.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ddb0]
>[586651.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ddb0] width 1920 pitch 7680 (/4 1920)
>[586652.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[586652.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[586652.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d8d60]
>[586652.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d8d60] width 1920 pitch 7680 (/4 1920)
>[586652.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972cd0]
>[586652.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972cd0] width 1920 pitch 7680 (/4 1920)
>[586653.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1a20]
>[586653.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1a20] width 1920 pitch 7680 (/4 1920)
>[586653.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586653.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586653.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[586653.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[586653.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586653.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586653.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3d40]
>[586653.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3d40] width 1920 pitch 7680 (/4 1920)
>[586653.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6de30]
>[586653.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6de30] width 1920 pitch 7680 (/4 1920)
>[586655.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504f200]
>[586655.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504f200] width 1920 pitch 7680 (/4 1920)
>[586670.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2975530]
>[586670.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2975530] width 1920 pitch 7680 (/4 1920)
>[586710.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ddb0]
>[586710.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ddb0] width 1920 pitch 7680 (/4 1920)
>[586711.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586711.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586711.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6ddb0]
>[586711.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6ddb0] width 1920 pitch 7680 (/4 1920)
>[586712.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586712.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586723.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[586724.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[586726.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[586726.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[586726.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9c210]
>[586726.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9c210] width 1920 pitch 7680 (/4 1920)
>[586726.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ffa620]
>[586726.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ffa620] width 1920 pitch 7680 (/4 1920)
>[586736.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3918a30]
>[586736.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3918a30] width 1920 pitch 7680 (/4 1920)
>[586736.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[586736.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[586736.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1750]
>[586736.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1750] width 1920 pitch 7680 (/4 1920)
>[586736.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec4120]
>[586736.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec4120] width 1920 pitch 7680 (/4 1920)
>[586736.780] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd1750]
>[586736.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd1750] width 1920 pitch 7680 (/4 1920)
>[586736.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8cf0]
>[586736.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8cf0] width 1920 pitch 7680 (/4 1920)
>[586736.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470380]
>[586736.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470380] width 1920 pitch 7680 (/4 1920)
>[586736.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b047e0]
>[586736.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b047e0] width 1920 pitch 7680 (/4 1920)
>[586736.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c76e40]
>[586736.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c76e40] width 1920 pitch 7680 (/4 1920)
>[586759.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aca220]
>[586759.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aca220] width 1920 pitch 7680 (/4 1920)
>[586759.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486ea10]
>[586759.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486ea10] width 1920 pitch 7680 (/4 1920)
>[586759.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586759.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586759.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486ea10]
>[586759.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486ea10] width 1920 pitch 7680 (/4 1920)
>[586759.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[586759.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[586759.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486ea10]
>[586759.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486ea10] width 1920 pitch 7680 (/4 1920)
>[586759.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c69f40]
>[586759.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c69f40] width 1920 pitch 7680 (/4 1920)
>[586759.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd6e00]
>[586759.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd6e00] width 1920 pitch 7680 (/4 1920)
>[586759.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4020340]
>[586759.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4020340] width 1920 pitch 7680 (/4 1920)
>[586759.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da15f0]
>[586759.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da15f0] width 1920 pitch 7680 (/4 1920)
>[586775.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c840a0]
>[586775.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c840a0] width 1920 pitch 7680 (/4 1920)
>[586781.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c1960]
>[586781.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c1960] width 1920 pitch 7680 (/4 1920)
>[586781.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5146270]
>[586781.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5146270] width 1920 pitch 7680 (/4 1920)
>[586781.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5a50]
>[586781.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5a50] width 1920 pitch 7680 (/4 1920)
>[586781.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5146270]
>[586781.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5146270] width 1920 pitch 7680 (/4 1920)
>[586782.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8c4d0]
>[586782.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8c4d0] width 1920 pitch 7680 (/4 1920)
>[586782.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[586782.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[586782.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[586782.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[586782.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7ffe0]
>[586782.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7ffe0] width 1920 pitch 7680 (/4 1920)
>[586782.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2502e80]
>[586782.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2502e80] width 1920 pitch 7680 (/4 1920)
>[586790.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0750]
>[586790.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0750] width 1920 pitch 7680 (/4 1920)
>[586820.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca5a50]
>[586820.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca5a50] width 1920 pitch 7680 (/4 1920)
>[586835.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f06380]
>[586835.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f06380] width 1920 pitch 7680 (/4 1920)
>[586870.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3060]
>[586870.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3060] width 1920 pitch 7680 (/4 1920)
>[586870.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857030]
>[586870.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857030] width 1920 pitch 7680 (/4 1920)
>[586870.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3060]
>[586870.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3060] width 1920 pitch 7680 (/4 1920)
>[586870.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2857030]
>[586870.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2857030] width 1920 pitch 7680 (/4 1920)
>[586870.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3060]
>[586870.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3060] width 1920 pitch 7680 (/4 1920)
>[586870.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f875d0]
>[586870.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f875d0] width 1920 pitch 7680 (/4 1920)
>[586870.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3060]
>[586870.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3060] width 1920 pitch 7680 (/4 1920)
>[586870.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05660]
>[586870.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05660] width 1920 pitch 7680 (/4 1920)
>[586871.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec3060]
>[586871.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec3060] width 1920 pitch 7680 (/4 1920)
>[586871.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05660]
>[586871.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05660] width 1920 pitch 7680 (/4 1920)
>[586871.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6119c20]
>[586871.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6119c20] width 1920 pitch 7680 (/4 1920)
>[586871.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e05660]
>[586871.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e05660] width 1920 pitch 7680 (/4 1920)
>[586872.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cd80]
>[586872.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cd80] width 1920 pitch 7680 (/4 1920)
>[586872.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2835090]
>[586872.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2835090] width 1920 pitch 7680 (/4 1920)
>[586872.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cd80]
>[586873.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cd80] width 1920 pitch 7680 (/4 1920)
>[586873.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2835090]
>[586873.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2835090] width 1920 pitch 7680 (/4 1920)
>[586873.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cd80]
>[586873.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cd80] width 1920 pitch 7680 (/4 1920)
>[586873.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2835090]
>[586873.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2835090] width 1920 pitch 7680 (/4 1920)
>[586873.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x502cd80]
>[586873.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x502cd80] width 1920 pitch 7680 (/4 1920)
>[586874.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c5440]
>[586874.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c5440] width 1920 pitch 7680 (/4 1920)
>[586879.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48fc1a0]
>[586879.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48fc1a0] width 1920 pitch 7680 (/4 1920)
>[586879.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834eb0]
>[586879.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834eb0] width 1920 pitch 7680 (/4 1920)
>[586879.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be1870]
>[586879.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be1870] width 1920 pitch 7680 (/4 1920)
>[586879.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294aad0]
>[586879.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294aad0] width 1920 pitch 7680 (/4 1920)
>[586879.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834eb0]
>[586879.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834eb0] width 1920 pitch 7680 (/4 1920)
>[586880.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6119c00]
>[586880.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6119c00] width 1920 pitch 7680 (/4 1920)
>[586880.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586880.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586880.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586880.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586880.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586881.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586881.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586881.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586881.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586881.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586881.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586881.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586881.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586881.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586881.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586881.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586881.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586881.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586881.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586881.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586881.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586882.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586882.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586882.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586882.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c790]
>[586882.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c790] width 1920 pitch 7680 (/4 1920)
>[586882.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586882.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586883.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586883.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586883.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6119c00]
>[586883.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6119c00] width 1920 pitch 7680 (/4 1920)
>[586884.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c790]
>[586884.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c790] width 1920 pitch 7680 (/4 1920)
>[586885.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6119c00]
>[586885.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6119c00] width 1920 pitch 7680 (/4 1920)
>[586885.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586885.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586887.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6119c00]
>[586887.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6119c00] width 1920 pitch 7680 (/4 1920)
>[586887.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586887.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586887.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c790]
>[586887.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c790] width 1920 pitch 7680 (/4 1920)
>[586887.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586887.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586887.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c790]
>[586887.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c790] width 1920 pitch 7680 (/4 1920)
>[586887.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586887.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586887.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316c790]
>[586887.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316c790] width 1920 pitch 7680 (/4 1920)
>[586887.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586887.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586887.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586887.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586888.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586888.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586888.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586888.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586888.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[586888.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[586888.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a9b0]
>[586888.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a9b0] width 1920 pitch 7680 (/4 1920)
>[586888.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[586888.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[586888.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a9b0]
>[586888.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a9b0] width 1920 pitch 7680 (/4 1920)
>[586888.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586888.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586888.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a9b0]
>[586888.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a9b0] width 1920 pitch 7680 (/4 1920)
>[586889.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[586889.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[586889.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586889.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586889.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[586889.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[586889.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586889.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586889.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[586889.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[586889.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586889.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586889.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[586889.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[586889.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a9b0]
>[586889.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a9b0] width 1920 pitch 7680 (/4 1920)
>[586889.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586889.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586889.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a9b0]
>[586889.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a9b0] width 1920 pitch 7680 (/4 1920)
>[586889.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586889.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586895.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a3b0]
>[586895.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a3b0] width 1920 pitch 7680 (/4 1920)
>[586955.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[586955.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[586970.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[586970.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587045.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587045.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587060.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5170500]
>[587060.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5170500] width 1920 pitch 7680 (/4 1920)
>[587170.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a9b0]
>[587170.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a9b0] width 1920 pitch 7680 (/4 1920)
>[587172.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[587172.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[587172.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[587172.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[587172.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587172.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587172.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587172.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587172.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a3b0]
>[587172.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a3b0] width 1920 pitch 7680 (/4 1920)
>[587172.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587172.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587173.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a3b0]
>[587173.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a3b0] width 1920 pitch 7680 (/4 1920)
>[587173.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587173.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587173.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587173.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587173.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587173.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587173.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587173.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587173.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587173.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587174.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5058030]
>[587174.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5058030] width 1920 pitch 7680 (/4 1920)
>[587174.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587174.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587174.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6202020]
>[587174.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6202020] width 1920 pitch 7680 (/4 1920)
>[587174.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[587174.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[587174.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6202020]
>[587174.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6202020] width 1920 pitch 7680 (/4 1920)
>[587174.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[587174.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[587174.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6202020]
>[587174.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6202020] width 1920 pitch 7680 (/4 1920)
>[587174.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[587174.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[587176.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a3b0]
>[587176.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a3b0] width 1920 pitch 7680 (/4 1920)
>[587178.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6251560]
>[587178.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6251560] width 1920 pitch 7680 (/4 1920)
>[587178.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d3ce0]
>[587178.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d3ce0] width 1920 pitch 7680 (/4 1920)
>[587180.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d3b10]
>[587180.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d3b10] width 1920 pitch 7680 (/4 1920)
>[587195.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927b90]
>[587195.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927b90] width 1920 pitch 7680 (/4 1920)
>[587197.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927b90]
>[587197.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927b90] width 1920 pitch 7680 (/4 1920)
>[587208.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c4b90]
>[587208.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c4b90] width 1920 pitch 7680 (/4 1920)
>[587208.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c4b90]
>[587208.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c4b90] width 1920 pitch 7680 (/4 1920)
>[587208.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c4b90]
>[587208.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c4b90] width 1920 pitch 7680 (/4 1920)
>[587208.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c4b90]
>[587208.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c4b90] width 1920 pitch 7680 (/4 1920)
>[587208.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c4b90]
>[587208.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c4b90] width 1920 pitch 7680 (/4 1920)
>[587208.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c4b90]
>[587208.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c4b90] width 1920 pitch 7680 (/4 1920)
>[587208.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed9d0]
>[587208.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed9d0] width 1920 pitch 7680 (/4 1920)
>[587208.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed9d0]
>[587208.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed9d0] width 1920 pitch 7680 (/4 1920)
>[587208.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b3f0]
>[587208.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b3f0] width 1920 pitch 7680 (/4 1920)
>[587208.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f600]
>[587208.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f600] width 1920 pitch 7680 (/4 1920)
>[587208.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ed9d0]
>[587208.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ed9d0] width 1920 pitch 7680 (/4 1920)
>[587208.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd0bd0]
>[587208.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd0bd0] width 1920 pitch 7680 (/4 1920)
>[587208.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587208.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587208.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587208.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587208.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587208.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587208.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587208.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587208.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587208.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587208.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587208.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587208.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587208.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587208.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587208.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587208.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587208.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587208.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e4de0]
>[587208.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e4de0] width 1920 pitch 7680 (/4 1920)
>[587208.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd5dd0]
>[587208.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd5dd0] width 1920 pitch 7680 (/4 1920)
>[587210.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832910]
>[587210.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832910] width 1920 pitch 7680 (/4 1920)
>[587225.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0fb30]
>[587225.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0fb30] width 1920 pitch 7680 (/4 1920)
>[587255.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927c80]
>[587255.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927c80] width 1920 pitch 7680 (/4 1920)
>[587360.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc76d0]
>[587360.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc76d0] width 1920 pitch 7680 (/4 1920)
>[587375.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cc0d0]
>[587375.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cc0d0] width 1920 pitch 7680 (/4 1920)
>[587405.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6202020]
>[587405.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6202020] width 1920 pitch 7680 (/4 1920)
>[587435.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc76d0]
>[587435.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc76d0] width 1920 pitch 7680 (/4 1920)
>[587465.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587465.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587480.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6202020]
>[587480.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6202020] width 1920 pitch 7680 (/4 1920)
>[587495.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587495.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587525.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587525.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587570.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927c80]
>[587570.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927c80] width 1920 pitch 7680 (/4 1920)
>[587585.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a3b0]
>[587585.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a3b0] width 1920 pitch 7680 (/4 1920)
>[587705.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927c80]
>[587705.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927c80] width 1920 pitch 7680 (/4 1920)
>[587720.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a3b0]
>[587720.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a3b0] width 1920 pitch 7680 (/4 1920)
>[587765.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x516cc10]
>[587765.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x516cc10] width 1920 pitch 7680 (/4 1920)
>[587795.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec460]
>[587795.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec460] width 1920 pitch 7680 (/4 1920)
>[587808.823] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[587808.823] (II) RADEON(0): Using hsync ranges from config file
>[587808.823] (II) RADEON(0): Using vrefresh ranges from config file
>[587808.823] (II) RADEON(0): Printing DDC gathered Modelines:
>[587808.823] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[587808.823] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[587808.823] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[587808.823] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[587808.823] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[587808.823] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[587808.823] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[587808.823] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[587808.823] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[587808.823] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[587808.823] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[587808.823] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[587898.659] (II) RADEON(0): RADEONSaveScreen(2)
>[587898.659] (II) RADEON(0): RADEONSaveScreen(0)
>[588806.361] (II) RADEON(0): RADEONSaveScreen(1)
>[588812.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927bf0]
>[588812.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927bf0] width 1920 pitch 7680 (/4 1920)
>[588813.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e330]
>[588813.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e330] width 1920 pitch 7680 (/4 1920)
>[588813.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50afaa0]
>[588813.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50afaa0] width 1920 pitch 7680 (/4 1920)
>[588813.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830010]
>[588813.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830010] width 1920 pitch 7680 (/4 1920)
>[588813.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4904a80]
>[588813.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4904a80] width 1920 pitch 7680 (/4 1920)
>[588813.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501c900]
>[588813.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501c900] width 1920 pitch 7680 (/4 1920)
>[588813.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff59c0]
>[588813.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff59c0] width 1920 pitch 7680 (/4 1920)
>[588813.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x315dcf0]
>[588813.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x315dcf0] width 1920 pitch 7680 (/4 1920)
>[588814.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b380]
>[588814.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b380] width 1920 pitch 7680 (/4 1920)
>[588814.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f749a0]
>[588814.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f749a0] width 1920 pitch 7680 (/4 1920)
>[588814.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff59c0]
>[588814.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff59c0] width 1920 pitch 7680 (/4 1920)
>[588815.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830010]
>[588815.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830010] width 1920 pitch 7680 (/4 1920)
>[588815.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b83050]
>[588815.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b83050] width 1920 pitch 7680 (/4 1920)
>[588815.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f749a0]
>[588815.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f749a0] width 1920 pitch 7680 (/4 1920)
>[588815.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b380]
>[588815.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b380] width 1920 pitch 7680 (/4 1920)
>[588815.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834a40]
>[588815.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834a40] width 1920 pitch 7680 (/4 1920)
>[588816.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff59c0]
>[588816.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff59c0] width 1920 pitch 7680 (/4 1920)
>[588816.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830010]
>[588816.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830010] width 1920 pitch 7680 (/4 1920)
>[588816.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4904a80]
>[588816.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4904a80] width 1920 pitch 7680 (/4 1920)
>[588816.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff59c0]
>[588816.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff59c0] width 1920 pitch 7680 (/4 1920)
>[588816.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834a40]
>[588816.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834a40] width 1920 pitch 7680 (/4 1920)
>[588816.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b380]
>[588816.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b380] width 1920 pitch 7680 (/4 1920)
>[588816.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b380]
>[588816.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b380] width 1920 pitch 7680 (/4 1920)
>[588816.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834a40]
>[588816.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834a40] width 1920 pitch 7680 (/4 1920)
>[588817.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff59c0]
>[588817.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff59c0] width 1920 pitch 7680 (/4 1920)
>[588817.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4904a80]
>[588817.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4904a80] width 1920 pitch 7680 (/4 1920)
>[588817.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830010]
>[588817.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830010] width 1920 pitch 7680 (/4 1920)
>[588817.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b83050]
>[588817.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b83050] width 1920 pitch 7680 (/4 1920)
>[588817.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f749a0]
>[588817.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f749a0] width 1920 pitch 7680 (/4 1920)
>[588817.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501c900]
>[588817.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501c900] width 1920 pitch 7680 (/4 1920)
>[588817.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e330]
>[588817.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e330] width 1920 pitch 7680 (/4 1920)
>[588818.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830010]
>[588818.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830010] width 1920 pitch 7680 (/4 1920)
>[588818.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff59c0]
>[588818.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff59c0] width 1920 pitch 7680 (/4 1920)
>[588818.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b380]
>[588818.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b380] width 1920 pitch 7680 (/4 1920)
>[588818.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830010]
>[588818.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830010] width 1920 pitch 7680 (/4 1920)
>[588818.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f749a0]
>[588818.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f749a0] width 1920 pitch 7680 (/4 1920)
>[588818.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4821fb0]
>[588818.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4821fb0] width 1920 pitch 7680 (/4 1920)
>[588821.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501c900]
>[588821.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501c900] width 1920 pitch 7680 (/4 1920)
>[588866.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6292c10]
>[588866.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6292c10] width 1920 pitch 7680 (/4 1920)
>[588881.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ce3a0]
>[588881.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ce3a0] width 1920 pitch 7680 (/4 1920)
>[588926.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d250]
>[588926.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d250] width 1920 pitch 7680 (/4 1920)
>[588941.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a9990]
>[588941.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a9990] width 1920 pitch 7680 (/4 1920)
>[588986.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b762a0]
>[588986.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b762a0] width 1920 pitch 7680 (/4 1920)
>[589001.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501bff0]
>[589001.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501bff0] width 1920 pitch 7680 (/4 1920)
>[589061.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500b130]
>[589061.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500b130] width 1920 pitch 7680 (/4 1920)
>[589076.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589076.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589128.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589128.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589128.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589128.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589128.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589128.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589128.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589128.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589128.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589128.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589128.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589128.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589129.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[589129.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[589129.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589129.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589129.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[589129.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[589129.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589129.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589130.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589130.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589131.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589131.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589133.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[589133.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[589133.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589133.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589134.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[589134.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[589134.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589134.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589135.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589135.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589135.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589135.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589135.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[589136.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[589136.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589136.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589136.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589137.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589137.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589137.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589137.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589137.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589137.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fda20]
>[589137.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fda20] width 1920 pitch 7680 (/4 1920)
>[589137.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589138.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589138.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366710]
>[589138.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366710] width 1920 pitch 7680 (/4 1920)
>[589138.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589138.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589138.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366710]
>[589138.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366710] width 1920 pitch 7680 (/4 1920)
>[589138.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d460]
>[589138.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d460] width 1920 pitch 7680 (/4 1920)
>[589138.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366710]
>[589138.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366710] width 1920 pitch 7680 (/4 1920)
>[589185.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7bcd0]
>[589185.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7bcd0] width 1920 pitch 7680 (/4 1920)
>[589185.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589185.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589185.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a030]
>[589185.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a030] width 1920 pitch 7680 (/4 1920)
>[589185.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589185.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589185.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a030]
>[589185.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a030] width 1920 pitch 7680 (/4 1920)
>[589185.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589185.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589185.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8d3c0]
>[589185.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8d3c0] width 1920 pitch 7680 (/4 1920)
>[589186.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6159fe0]
>[589186.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6159fe0] width 1920 pitch 7680 (/4 1920)
>[589186.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589186.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589186.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6159fe0]
>[589186.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6159fe0] width 1920 pitch 7680 (/4 1920)
>[589186.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589186.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589186.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6159fe0]
>[589186.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6159fe0] width 1920 pitch 7680 (/4 1920)
>[589186.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6159fe0]
>[589187.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6159fe0] width 1920 pitch 7680 (/4 1920)
>[589187.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402cb00]
>[589187.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402cb00] width 1920 pitch 7680 (/4 1920)
>[589188.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513f650]
>[589188.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513f650] width 1920 pitch 7680 (/4 1920)
>[589188.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589188.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589188.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589188.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589188.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589188.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589188.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589188.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589188.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589188.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589238.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589238.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589238.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589238.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589238.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589238.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589238.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589238.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589238.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589238.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589238.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589238.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589238.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589238.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589239.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589239.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589239.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589239.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589239.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589239.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589239.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589239.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589240.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589240.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589240.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589240.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589240.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8340]
>[589240.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8340] width 1920 pitch 7680 (/4 1920)
>[589240.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9c770]
>[589240.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9c770] width 1920 pitch 7680 (/4 1920)
>[589240.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5e80]
>[589240.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5e80] width 1920 pitch 7680 (/4 1920)
>[589240.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae430]
>[589240.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae430] width 1920 pitch 7680 (/4 1920)
>[589241.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae430]
>[589241.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae430] width 1920 pitch 7680 (/4 1920)
>[589241.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5e80]
>[589241.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5e80] width 1920 pitch 7680 (/4 1920)
>[589241.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae430]
>[589241.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae430] width 1920 pitch 7680 (/4 1920)
>[589241.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5e80]
>[589241.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5e80] width 1920 pitch 7680 (/4 1920)
>[589241.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae430]
>[589241.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae430] width 1920 pitch 7680 (/4 1920)
>[589250.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589250.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589256.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589256.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589277.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589277.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589277.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2400]
>[589277.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2400] width 1920 pitch 7680 (/4 1920)
>[589277.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589277.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589277.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2400]
>[589277.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2400] width 1920 pitch 7680 (/4 1920)
>[589277.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589277.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589277.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2400]
>[589277.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2400] width 1920 pitch 7680 (/4 1920)
>[589277.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589277.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589278.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589278.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589278.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589278.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589278.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589278.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589278.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589278.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589278.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589278.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589278.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589278.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589278.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589278.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589278.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589278.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589278.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589278.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589278.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589278.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589278.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589278.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589278.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[589278.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[589278.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589278.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589279.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589279.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589279.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499ab70]
>[589279.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499ab70] width 1920 pitch 7680 (/4 1920)
>[589280.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2400]
>[589280.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2400] width 1920 pitch 7680 (/4 1920)
>[589281.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dfd10]
>[589281.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dfd10] width 1920 pitch 7680 (/4 1920)
>[589281.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499ab70]
>[589281.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499ab70] width 1920 pitch 7680 (/4 1920)
>[589281.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dfd10]
>[589281.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dfd10] width 1920 pitch 7680 (/4 1920)
>[589281.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499ab70]
>[589281.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499ab70] width 1920 pitch 7680 (/4 1920)
>[589281.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dfd10]
>[589281.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dfd10] width 1920 pitch 7680 (/4 1920)
>[589281.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499ab70]
>[589281.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499ab70] width 1920 pitch 7680 (/4 1920)
>[589281.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dfd10]
>[589281.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dfd10] width 1920 pitch 7680 (/4 1920)
>[589281.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24850]
>[589281.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24850] width 1920 pitch 7680 (/4 1920)
>[589281.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589281.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589282.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589282.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589282.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589282.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589285.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589285.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589285.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48431b0]
>[589285.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48431b0] width 1920 pitch 7680 (/4 1920)
>[589285.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a84200]
>[589285.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a84200] width 1920 pitch 7680 (/4 1920)
>[589285.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48431b0]
>[589285.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48431b0] width 1920 pitch 7680 (/4 1920)
>[589286.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38dfd10]
>[589286.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38dfd10] width 1920 pitch 7680 (/4 1920)
>[589286.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4997820]
>[589286.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4997820] width 1920 pitch 7680 (/4 1920)
>[589286.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842e10]
>[589286.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842e10] width 1920 pitch 7680 (/4 1920)
>[589286.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4997820]
>[589286.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4997820] width 1920 pitch 7680 (/4 1920)
>[589286.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842e10]
>[589286.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842e10] width 1920 pitch 7680 (/4 1920)
>[589286.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd3bb0]
>[589286.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd3bb0] width 1920 pitch 7680 (/4 1920)
>[589286.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842e10]
>[589286.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842e10] width 1920 pitch 7680 (/4 1920)
>[589286.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842900]
>[589286.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842900] width 1920 pitch 7680 (/4 1920)
>[589291.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a10380]
>[589291.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a10380] width 1920 pitch 7680 (/4 1920)
>[589291.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d6d10]
>[589291.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d6d10] width 1920 pitch 7680 (/4 1920)
>[589301.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4836270]
>[589301.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4836270] width 1920 pitch 7680 (/4 1920)
>[589311.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832800]
>[589311.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832800] width 1920 pitch 7680 (/4 1920)
>[589376.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1470]
>[589376.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1470] width 1920 pitch 7680 (/4 1920)
>[589391.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589391.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589406.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe2eb0]
>[589406.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe2eb0] width 1920 pitch 7680 (/4 1920)
>[589412.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1470]
>[589412.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1470] width 1920 pitch 7680 (/4 1920)
>[589413.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1470]
>[589413.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1470] width 1920 pitch 7680 (/4 1920)
>[589413.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589413.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589413.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b1470]
>[589413.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b1470] width 1920 pitch 7680 (/4 1920)
>[589414.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589414.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589414.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589414.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589414.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4620]
>[589414.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4620] width 1920 pitch 7680 (/4 1920)
>[589415.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589415.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589417.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589417.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589417.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589417.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589417.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589417.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589417.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589417.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589421.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589421.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589421.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x621e910]
>[589421.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x621e910] width 1920 pitch 7680 (/4 1920)
>[589423.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589423.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589423.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589423.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589423.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589423.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589424.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589424.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589425.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6bd90]
>[589425.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6bd90] width 1920 pitch 7680 (/4 1920)
>[589425.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589425.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589425.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6bd90]
>[589425.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6bd90] width 1920 pitch 7680 (/4 1920)
>[589426.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589426.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589426.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589426.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589426.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01410]
>[589426.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01410] width 1920 pitch 7680 (/4 1920)
>[589426.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589426.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589427.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589427.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589428.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589428.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589428.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589428.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589428.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fee4b0]
>[589428.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fee4b0] width 1920 pitch 7680 (/4 1920)
>[589433.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[589433.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[589436.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c01410]
>[589436.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c01410] width 1920 pitch 7680 (/4 1920)
>[589436.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589436.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589436.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589436.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589508.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1e70]
>[589508.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1e70] width 1920 pitch 7680 (/4 1920)
>[589509.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589509.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589509.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1e70]
>[589509.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1e70] width 1920 pitch 7680 (/4 1920)
>[589509.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589509.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589616.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6286cf0]
>[589616.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6286cf0] width 1920 pitch 7680 (/4 1920)
>[589617.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d7ff0]
>[589617.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d7ff0] width 1920 pitch 7680 (/4 1920)
>[589617.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589617.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589617.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d7ff0]
>[589617.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d7ff0] width 1920 pitch 7680 (/4 1920)
>[589617.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589617.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589631.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f588f0]
>[589631.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f588f0] width 1920 pitch 7680 (/4 1920)
>[589653.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589653.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589653.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589654.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589654.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589654.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589654.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589654.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589654.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b6760]
>[589654.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b6760] width 1920 pitch 7680 (/4 1920)
>[589654.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62318c0]
>[589654.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62318c0] width 1920 pitch 7680 (/4 1920)
>[589655.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2400]
>[589655.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2400] width 1920 pitch 7680 (/4 1920)
>[589656.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e88650]
>[589656.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e88650] width 1920 pitch 7680 (/4 1920)
>[589656.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d680]
>[589656.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d680] width 1920 pitch 7680 (/4 1920)
>[589656.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bc610]
>[589656.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bc610] width 1920 pitch 7680 (/4 1920)
>[589657.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x621e970]
>[589657.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x621e970] width 1920 pitch 7680 (/4 1920)
>[589657.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ef610]
>[589657.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ef610] width 1920 pitch 7680 (/4 1920)
>[589657.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x621e970]
>[589657.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x621e970] width 1920 pitch 7680 (/4 1920)
>[589665.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48431b0]
>[589665.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48431b0] width 1920 pitch 7680 (/4 1920)
>[589666.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48431b0]
>[589666.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48431b0] width 1920 pitch 7680 (/4 1920)
>[589666.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x488b3d0]
>[589666.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x488b3d0] width 1920 pitch 7680 (/4 1920)
>[589667.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c0850]
>[589667.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c0850] width 1920 pitch 7680 (/4 1920)
>[589669.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c9fd0]
>[589669.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c9fd0] width 1920 pitch 7680 (/4 1920)
>[589669.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c96670]
>[589669.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c96670] width 1920 pitch 7680 (/4 1920)
>[589669.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288acd0]
>[589669.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288acd0] width 1920 pitch 7680 (/4 1920)
>[589674.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ae0d0]
>[589674.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ae0d0] width 1920 pitch 7680 (/4 1920)
>[589706.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c87f00]
>[589706.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c87f00] width 1920 pitch 7680 (/4 1920)
>[589707.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28a4d00]
>[589707.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28a4d00] width 1920 pitch 7680 (/4 1920)
>[589707.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485eae0]
>[589707.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485eae0] width 1920 pitch 7680 (/4 1920)
>[589707.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3910]
>[589707.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3910] width 1920 pitch 7680 (/4 1920)
>[589711.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3910]
>[589711.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3910] width 1920 pitch 7680 (/4 1920)
>[589711.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031690]
>[589711.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031690] width 1920 pitch 7680 (/4 1920)
>[589711.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031690]
>[589711.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031690] width 1920 pitch 7680 (/4 1920)
>[589711.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031690]
>[589711.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031690] width 1920 pitch 7680 (/4 1920)
>[589716.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c87f00]
>[589716.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c87f00] width 1920 pitch 7680 (/4 1920)
>[589717.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3910]
>[589717.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3910] width 1920 pitch 7680 (/4 1920)
>[589717.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c87f00]
>[589717.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c87f00] width 1920 pitch 7680 (/4 1920)
>[589717.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b2400]
>[589717.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b2400] width 1920 pitch 7680 (/4 1920)
>[589732.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d6b60]
>[589732.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d6b60] width 1920 pitch 7680 (/4 1920)
>[589732.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[589732.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[589732.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62aa740]
>[589732.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62aa740] width 1920 pitch 7680 (/4 1920)
>[589732.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8cf0]
>[589732.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8cf0] width 1920 pitch 7680 (/4 1920)
>[589732.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5146270]
>[589732.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5146270] width 1920 pitch 7680 (/4 1920)
>[589732.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[589732.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[589732.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[589732.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[589732.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8cf0]
>[589732.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8cf0] width 1920 pitch 7680 (/4 1920)
>[589732.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef500]
>[589732.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef500] width 1920 pitch 7680 (/4 1920)
>[589732.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f71a0]
>[589732.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f71a0] width 1920 pitch 7680 (/4 1920)
>[589733.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[589733.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[589733.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d3c5c0]
>[589733.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d3c5c0] width 1920 pitch 7680 (/4 1920)
>[589733.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8b90]
>[589733.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8b90] width 1920 pitch 7680 (/4 1920)
>[589734.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[589734.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[589763.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62aa740]
>[589763.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62aa740] width 1920 pitch 7680 (/4 1920)
>[589763.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8cf0]
>[589763.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8cf0] width 1920 pitch 7680 (/4 1920)
>[589763.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62aa740]
>[589763.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62aa740] width 1920 pitch 7680 (/4 1920)
>[589763.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2834740]
>[589763.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2834740] width 1920 pitch 7680 (/4 1920)
>[589763.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[589763.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[589766.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2568380]
>[589766.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2568380] width 1920 pitch 7680 (/4 1920)
>[589770.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086c40]
>[589770.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086c40] width 1920 pitch 7680 (/4 1920)
>[589771.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589771.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589771.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589771.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589771.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589771.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589781.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589781.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589783.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589783.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589805.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589805.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589806.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589807.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589807.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589807.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589807.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589807.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589816.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589816.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589816.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589816.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589816.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589816.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589816.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589816.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589816.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589816.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589816.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589816.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589816.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589816.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589816.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589816.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589816.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589816.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589816.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589816.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589816.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589816.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589816.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589816.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589816.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589816.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589816.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589816.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589816.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589816.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589816.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589817.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[589817.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[589818.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932900]
>[589818.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932900] width 1920 pitch 7680 (/4 1920)
>[589818.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49159b0]
>[589818.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49159b0] width 1920 pitch 7680 (/4 1920)
>[589818.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3063660]
>[589818.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3063660] width 1920 pitch 7680 (/4 1920)
>[589818.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49159b0]
>[589818.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49159b0] width 1920 pitch 7680 (/4 1920)
>[589818.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477370]
>[589818.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477370] width 1920 pitch 7680 (/4 1920)
>[589818.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314c210]
>[589818.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314c210] width 1920 pitch 7680 (/4 1920)
>[589818.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932900]
>[589818.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932900] width 1920 pitch 7680 (/4 1920)
>[589818.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27570]
>[589818.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27570] width 1920 pitch 7680 (/4 1920)
>[589818.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e27570]
>[589818.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e27570] width 1920 pitch 7680 (/4 1920)
>[589818.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfae60]
>[589818.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfae60] width 1920 pitch 7680 (/4 1920)
>[589818.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589818.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589818.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fd000]
>[589818.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fd000] width 1920 pitch 7680 (/4 1920)
>[589818.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589818.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589818.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fd000]
>[589818.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fd000] width 1920 pitch 7680 (/4 1920)
>[589818.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589818.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589818.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fd000]
>[589818.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fd000] width 1920 pitch 7680 (/4 1920)
>[589818.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589818.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589818.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fd000]
>[589818.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fd000] width 1920 pitch 7680 (/4 1920)
>[589818.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589818.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589825.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589825.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589825.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589825.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589825.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589825.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589825.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589825.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589831.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589831.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589837.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589837.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589846.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589846.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589848.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589848.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589848.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a217a0]
>[589848.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a217a0] width 1920 pitch 7680 (/4 1920)
>[589848.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4be0]
>[589848.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4be0] width 1920 pitch 7680 (/4 1920)
>[589849.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3908030]
>[589849.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3908030] width 1920 pitch 7680 (/4 1920)
>[589855.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589855.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589855.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888cc0]
>[589855.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888cc0] width 1920 pitch 7680 (/4 1920)
>[589855.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589855.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589855.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589855.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589855.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589855.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589855.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589855.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589855.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589855.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589855.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589855.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589855.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589855.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589855.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589855.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589855.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589855.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589855.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589855.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589855.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589855.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589856.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589856.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589856.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589856.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589856.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922a50]
>[589856.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922a50] width 1920 pitch 7680 (/4 1920)
>[589856.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589856.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589856.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922a50]
>[589856.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922a50] width 1920 pitch 7680 (/4 1920)
>[589856.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589856.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589856.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589856.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589856.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589856.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589856.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589856.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589856.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589856.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589856.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589856.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589856.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589856.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589856.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589856.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589856.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589856.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589857.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589857.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589857.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589857.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589857.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589857.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589857.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589857.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589857.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589857.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589857.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589857.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589857.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589857.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589857.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589857.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589857.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589857.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589857.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589857.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589857.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589857.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589857.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589858.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589858.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589858.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589858.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589858.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589858.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589858.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589858.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589858.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589858.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589858.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589858.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589858.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589858.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589858.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589858.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589858.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589858.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589858.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589858.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922a50]
>[589858.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922a50] width 1920 pitch 7680 (/4 1920)
>[589858.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589858.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589858.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922a50]
>[589859.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922a50] width 1920 pitch 7680 (/4 1920)
>[589859.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589859.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589859.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589859.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589859.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888cc0]
>[589859.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888cc0] width 1920 pitch 7680 (/4 1920)
>[589859.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888cc0]
>[589859.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888cc0] width 1920 pitch 7680 (/4 1920)
>[589859.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888cc0]
>[589859.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888cc0] width 1920 pitch 7680 (/4 1920)
>[589859.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888cc0]
>[589859.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888cc0] width 1920 pitch 7680 (/4 1920)
>[589859.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888cc0]
>[589859.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888cc0] width 1920 pitch 7680 (/4 1920)
>[589859.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589859.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589859.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922a50]
>[589859.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922a50] width 1920 pitch 7680 (/4 1920)
>[589859.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f4430]
>[589859.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f4430] width 1920 pitch 7680 (/4 1920)
>[589859.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589859.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589859.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589859.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589859.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589859.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589859.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589859.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589859.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589859.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589859.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589859.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589859.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589859.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589859.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589859.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589859.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589859.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589859.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589859.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589859.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589859.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589859.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589859.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589861.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819110]
>[589861.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819110] width 1920 pitch 7680 (/4 1920)
>[589876.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49154d0]
>[589876.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49154d0] width 1920 pitch 7680 (/4 1920)
>[589882.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a330]
>[589882.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a330] width 1920 pitch 7680 (/4 1920)
>[589883.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589883.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589883.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[589883.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[589883.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589883.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589883.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffab00]
>[589883.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffab00] width 1920 pitch 7680 (/4 1920)
>[589884.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589884.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589884.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589884.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589884.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589884.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589884.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589884.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589884.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589884.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589884.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589884.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589885.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589885.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589888.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589888.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589890.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589890.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589890.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c20290]
>[589890.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c20290] width 1920 pitch 7680 (/4 1920)
>[589890.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589890.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589891.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589891.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589892.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589892.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589893.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589893.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589893.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7a490]
>[589893.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7a490] width 1920 pitch 7680 (/4 1920)
>[589893.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281a860]
>[589893.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281a860] width 1920 pitch 7680 (/4 1920)
>[589906.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c7150]
>[589906.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c7150] width 1920 pitch 7680 (/4 1920)
>[589921.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017c30]
>[589921.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017c30] width 1920 pitch 7680 (/4 1920)
>[589996.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938610]
>[589996.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938610] width 1920 pitch 7680 (/4 1920)
>[590011.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4991d30]
>[590011.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4991d30] width 1920 pitch 7680 (/4 1920)
>[590026.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8d430]
>[590026.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8d430] width 1920 pitch 7680 (/4 1920)
>[590056.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083140]
>[590056.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083140] width 1920 pitch 7680 (/4 1920)
>[590071.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b58d0]
>[590071.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b58d0] width 1920 pitch 7680 (/4 1920)
>[590101.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9c360]
>[590101.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9c360] width 1920 pitch 7680 (/4 1920)
>[590116.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73c60]
>[590116.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73c60] width 1920 pitch 7680 (/4 1920)
>[590146.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46950]
>[590146.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46950] width 1920 pitch 7680 (/4 1920)
>[590176.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46950]
>[590176.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46950] width 1920 pitch 7680 (/4 1920)
>[590251.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46950]
>[590251.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46950] width 1920 pitch 7680 (/4 1920)
>[590266.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eab1d0]
>[590266.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eab1d0] width 1920 pitch 7680 (/4 1920)
>[590341.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6b2e0]
>[590341.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6b2e0] width 1920 pitch 7680 (/4 1920)
>[590356.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5e0]
>[590356.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5e0] width 1920 pitch 7680 (/4 1920)
>[590371.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d50850]
>[590371.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d50850] width 1920 pitch 7680 (/4 1920)
>[590401.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[590401.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[590431.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2982bb0]
>[590431.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2982bb0] width 1920 pitch 7680 (/4 1920)
>[590446.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[590446.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[590476.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d97570]
>[590476.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d97570] width 1920 pitch 7680 (/4 1920)
>[590506.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a176e0]
>[590506.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a176e0] width 1920 pitch 7680 (/4 1920)
>[590521.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e6ad0]
>[590521.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e6ad0] width 1920 pitch 7680 (/4 1920)
>[590536.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a176e0]
>[590536.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a176e0] width 1920 pitch 7680 (/4 1920)
>[590596.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cb0e0]
>[590596.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cb0e0] width 1920 pitch 7680 (/4 1920)
>[590611.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6b2e0]
>[590611.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6b2e0] width 1920 pitch 7680 (/4 1920)
>[590626.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fcc60]
>[590626.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fcc60] width 1920 pitch 7680 (/4 1920)
>[590641.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d990]
>[590641.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d990] width 1920 pitch 7680 (/4 1920)
>[590684.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[590684.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[590684.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d728b0]
>[590684.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d728b0] width 1920 pitch 7680 (/4 1920)
>[590684.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[590684.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[590684.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe94e0]
>[590684.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe94e0] width 1920 pitch 7680 (/4 1920)
>[590684.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[590684.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[590684.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f28b0]
>[590684.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f28b0] width 1920 pitch 7680 (/4 1920)
>[590684.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[590684.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[590684.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f28b0]
>[590684.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f28b0] width 1920 pitch 7680 (/4 1920)
>[590685.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[590685.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[590685.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f28b0]
>[590685.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f28b0] width 1920 pitch 7680 (/4 1920)
>[590685.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[590685.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[590685.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f28b0]
>[590685.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f28b0] width 1920 pitch 7680 (/4 1920)
>[590685.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[590685.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[590699.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cb0e0]
>[590699.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cb0e0] width 1920 pitch 7680 (/4 1920)
>[590699.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82fb0]
>[590699.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82fb0] width 1920 pitch 7680 (/4 1920)
>[590699.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cb0e0]
>[590700.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cb0e0] width 1920 pitch 7680 (/4 1920)
>[590700.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52733c0]
>[590700.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52733c0] width 1920 pitch 7680 (/4 1920)
>[590700.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffaf0]
>[590700.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffaf0] width 1920 pitch 7680 (/4 1920)
>[590700.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52733c0]
>[590700.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52733c0] width 1920 pitch 7680 (/4 1920)
>[590700.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cffaf0]
>[590700.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cffaf0] width 1920 pitch 7680 (/4 1920)
>[590700.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe94e0]
>[590700.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe94e0] width 1920 pitch 7680 (/4 1920)
>[590705.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[590705.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[590705.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888a50]
>[590705.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888a50] width 1920 pitch 7680 (/4 1920)
>[590706.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590706.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590706.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590706.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590706.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590706.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590706.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590706.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590706.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590706.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590706.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590706.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590706.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590706.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590706.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590706.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590706.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590706.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590707.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590707.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590707.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590707.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590707.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590707.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590707.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b74f0]
>[590708.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b74f0] width 1920 pitch 7680 (/4 1920)
>[590708.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590708.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590708.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590709.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590709.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62d52c0]
>[590709.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62d52c0] width 1920 pitch 7680 (/4 1920)
>[590709.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4872ca0]
>[590709.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4872ca0] width 1920 pitch 7680 (/4 1920)
>[590709.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[590709.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[590709.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4872ca0]
>[590709.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4872ca0] width 1920 pitch 7680 (/4 1920)
>[590709.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[590709.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[590728.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590728.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590728.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590728.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590728.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590728.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590728.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590728.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590728.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590728.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590746.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[590746.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[590761.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0c010]
>[590761.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0c010] width 1920 pitch 7680 (/4 1920)
>[590807.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[590807.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[590807.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06a80]
>[590807.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06a80] width 1920 pitch 7680 (/4 1920)
>[590807.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[590807.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[590807.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06a80]
>[590807.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06a80] width 1920 pitch 7680 (/4 1920)
>[590807.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[590807.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[590807.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06a80]
>[590807.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06a80] width 1920 pitch 7680 (/4 1920)
>[590807.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[590807.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[590807.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06a80]
>[590807.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06a80] width 1920 pitch 7680 (/4 1920)
>[590807.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[590807.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[590807.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06a80]
>[590807.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06a80] width 1920 pitch 7680 (/4 1920)
>[590807.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[590807.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[590808.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f06a80]
>[590808.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f06a80] width 1920 pitch 7680 (/4 1920)
>[590808.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dda700]
>[590808.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dda700] width 1920 pitch 7680 (/4 1920)
>[590809.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[590809.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[590809.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[590809.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[590809.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[590809.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[590809.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[590809.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[590809.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[590809.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[590809.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[590809.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[590809.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[590809.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[590809.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[590809.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[590809.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[590809.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[590809.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc9fd0]
>[590809.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc9fd0] width 1920 pitch 7680 (/4 1920)
>[590809.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ef600]
>[590809.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ef600] width 1920 pitch 7680 (/4 1920)
>[590829.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3032870]
>[590829.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3032870] width 1920 pitch 7680 (/4 1920)
>[590836.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3032870]
>[590836.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3032870] width 1920 pitch 7680 (/4 1920)
>[590866.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fef0]
>[590866.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fef0] width 1920 pitch 7680 (/4 1920)
>[590888.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bf9a80]
>[590888.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bf9a80] width 1920 pitch 7680 (/4 1920)
>[590888.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[590888.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[590888.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[590888.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[590888.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[590889.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[590889.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[590889.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[590889.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[590889.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[590889.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[590889.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[590889.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[590889.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[590889.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[590889.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[590889.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[590889.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[590889.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[590889.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[590889.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[590889.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[590889.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[590889.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[590889.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[590889.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[590891.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[590891.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[590893.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1e50]
>[590893.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1e50] width 1920 pitch 7680 (/4 1920)
>[590893.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d667b0]
>[590893.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d667b0] width 1920 pitch 7680 (/4 1920)
>[590894.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[590894.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[590895.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[590895.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[590895.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe8e50]
>[590895.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe8e50] width 1920 pitch 7680 (/4 1920)
>[590895.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a5310]
>[590895.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a5310] width 1920 pitch 7680 (/4 1920)
>[590898.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fda30]
>[590898.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fda30] width 1920 pitch 7680 (/4 1920)
>[590898.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ff30]
>[590898.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ff30] width 1920 pitch 7680 (/4 1920)
>[590898.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fb9d0]
>[590898.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fb9d0] width 1920 pitch 7680 (/4 1920)
>[590899.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fe50]
>[590899.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fe50] width 1920 pitch 7680 (/4 1920)
>[590899.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fe50]
>[590899.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fe50] width 1920 pitch 7680 (/4 1920)
>[590900.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7f620]
>[590900.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7f620] width 1920 pitch 7680 (/4 1920)
>[590904.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a0f6d0]
>[590904.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a0f6d0] width 1920 pitch 7680 (/4 1920)
>[590904.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6c4b0]
>[590904.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6c4b0] width 1920 pitch 7680 (/4 1920)
>[590905.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7f620]
>[590905.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7f620] width 1920 pitch 7680 (/4 1920)
>[590906.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4976ee0]
>[590906.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4976ee0] width 1920 pitch 7680 (/4 1920)
>[590906.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26b50]
>[590906.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26b50] width 1920 pitch 7680 (/4 1920)
>[590906.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de6f0]
>[590906.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de6f0] width 1920 pitch 7680 (/4 1920)
>[590906.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26b50]
>[590906.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26b50] width 1920 pitch 7680 (/4 1920)
>[590906.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de6f0]
>[590906.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de6f0] width 1920 pitch 7680 (/4 1920)
>[590906.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889cb0]
>[590906.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889cb0] width 1920 pitch 7680 (/4 1920)
>[590906.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3bc00]
>[590906.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3bc00] width 1920 pitch 7680 (/4 1920)
>[590906.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x505d850]
>[590906.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x505d850] width 1920 pitch 7680 (/4 1920)
>[590906.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4886c10]
>[590906.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4886c10] width 1920 pitch 7680 (/4 1920)
>[590906.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29901d0]
>[590906.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29901d0] width 1920 pitch 7680 (/4 1920)
>[590906.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29900b0]
>[590906.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29900b0] width 1920 pitch 7680 (/4 1920)
>[590907.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de6f0]
>[590907.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de6f0] width 1920 pitch 7680 (/4 1920)
>[590909.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50532e0]
>[590909.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50532e0] width 1920 pitch 7680 (/4 1920)
>[591031.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50926a0]
>[591031.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50926a0] width 1920 pitch 7680 (/4 1920)
>[591046.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591046.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591061.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b905c0]
>[591061.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b905c0] width 1920 pitch 7680 (/4 1920)
>[591076.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591076.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591151.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b905c0]
>[591151.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b905c0] width 1920 pitch 7680 (/4 1920)
>[591166.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591166.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591181.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b905c0]
>[591181.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b905c0] width 1920 pitch 7680 (/4 1920)
>[591211.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591211.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591361.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b905c0]
>[591361.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b905c0] width 1920 pitch 7680 (/4 1920)
>[591376.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d2750]
>[591376.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d2750] width 1920 pitch 7680 (/4 1920)
>[591413.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50461e0]
>[591413.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50461e0] width 1920 pitch 7680 (/4 1920)
>[591414.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591414.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591414.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591414.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591414.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591414.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591414.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591414.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591414.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591414.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591414.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591414.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591414.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591414.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591414.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591414.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591414.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591414.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591414.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591414.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591414.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591414.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591414.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591414.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591414.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591414.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591414.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591414.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591414.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591414.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591414.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591414.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591414.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591414.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591414.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591414.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591414.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591414.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591414.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591414.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591414.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591414.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591415.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591415.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591415.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591415.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591415.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591415.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591415.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eebda0]
>[591415.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eebda0] width 1920 pitch 7680 (/4 1920)
>[591415.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591415.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591415.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591415.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591415.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591415.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591415.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591415.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f2a50]
>[591415.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f2a50] width 1920 pitch 7680 (/4 1920)
>[591415.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591415.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591415.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591415.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591436.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591436.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591451.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28230e0]
>[591451.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28230e0] width 1920 pitch 7680 (/4 1920)
>[591466.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c5a50]
>[591466.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c5a50] width 1920 pitch 7680 (/4 1920)
>[591481.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cc19a0]
>[591481.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cc19a0] width 1920 pitch 7680 (/4 1920)
>[591676.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7c090]
>[591676.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7c090] width 1920 pitch 7680 (/4 1920)
>[591691.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628dab0]
>[591691.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628dab0] width 1920 pitch 7680 (/4 1920)
>[591751.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628dab0]
>[591751.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628dab0] width 1920 pitch 7680 (/4 1920)
>[591766.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c9e0a0]
>[591766.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c9e0a0] width 1920 pitch 7680 (/4 1920)
>[591916.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b89330]
>[591916.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b89330] width 1920 pitch 7680 (/4 1920)
>[591931.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28339b0]
>[591931.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28339b0] width 1920 pitch 7680 (/4 1920)
>[591976.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295d4d0]
>[591976.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295d4d0] width 1920 pitch 7680 (/4 1920)
>[592006.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4004980]
>[592006.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4004980] width 1920 pitch 7680 (/4 1920)
>[592066.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c51120]
>[592066.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c51120] width 1920 pitch 7680 (/4 1920)
>[592096.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ef660]
>[592096.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ef660] width 1920 pitch 7680 (/4 1920)
>[592261.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3063980]
>[592261.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3063980] width 1920 pitch 7680 (/4 1920)
>[592276.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3063980]
>[592276.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3063980] width 1920 pitch 7680 (/4 1920)
>[592306.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3063980]
>[592306.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3063980] width 1920 pitch 7680 (/4 1920)
>[592321.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3030fb0]
>[592321.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3030fb0] width 1920 pitch 7680 (/4 1920)
>[592396.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3063980]
>[592396.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3063980] width 1920 pitch 7680 (/4 1920)
>[592411.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40171d0]
>[592411.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40171d0] width 1920 pitch 7680 (/4 1920)
>[592426.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40171d0]
>[592426.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40171d0] width 1920 pitch 7680 (/4 1920)
>[592441.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e98390]
>[592441.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e98390] width 1920 pitch 7680 (/4 1920)
>[592456.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40171d0]
>[592456.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40171d0] width 1920 pitch 7680 (/4 1920)
>[592471.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98d80]
>[592471.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98d80] width 1920 pitch 7680 (/4 1920)
>[592621.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e07430]
>[592621.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e07430] width 1920 pitch 7680 (/4 1920)
>[592636.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9d6a0]
>[592636.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9d6a0] width 1920 pitch 7680 (/4 1920)
>[592846.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49111e0]
>[592846.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49111e0] width 1920 pitch 7680 (/4 1920)
>[592861.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2938d60]
>[592861.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2938d60] width 1920 pitch 7680 (/4 1920)
>[593027.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fa310]
>[593027.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fa310] width 1920 pitch 7680 (/4 1920)
>[593045.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628d200]
>[593045.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628d200] width 1920 pitch 7680 (/4 1920)
>[593062.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865fe0]
>[593062.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865fe0] width 1920 pitch 7680 (/4 1920)
>[593062.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27af0]
>[593062.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27af0] width 1920 pitch 7680 (/4 1920)
>[593062.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865fe0]
>[593062.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865fe0] width 1920 pitch 7680 (/4 1920)
>[593062.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27af0]
>[593062.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27af0] width 1920 pitch 7680 (/4 1920)
>[593062.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865fe0]
>[593062.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865fe0] width 1920 pitch 7680 (/4 1920)
>[593062.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27af0]
>[593062.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27af0] width 1920 pitch 7680 (/4 1920)
>[593062.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865fe0]
>[593062.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865fe0] width 1920 pitch 7680 (/4 1920)
>[593062.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27af0]
>[593062.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27af0] width 1920 pitch 7680 (/4 1920)
>[593063.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865fe0]
>[593063.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865fe0] width 1920 pitch 7680 (/4 1920)
>[593063.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27af0]
>[593063.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27af0] width 1920 pitch 7680 (/4 1920)
>[593063.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865fe0]
>[593063.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865fe0] width 1920 pitch 7680 (/4 1920)
>[593063.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[593063.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[593064.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[593064.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[593064.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f5bf0]
>[593064.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f5bf0] width 1920 pitch 7680 (/4 1920)
>[593065.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[593065.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[593065.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[593066.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[593066.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c10]
>[593066.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c10] width 1920 pitch 7680 (/4 1920)
>[593067.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[593067.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[593069.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29903f0]
>[593069.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29903f0] width 1920 pitch 7680 (/4 1920)
>[593070.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb4a0]
>[593071.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb4a0] width 1920 pitch 7680 (/4 1920)
>[593071.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063460]
>[593071.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063460] width 1920 pitch 7680 (/4 1920)
>[593071.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a911f0]
>[593071.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a911f0] width 1920 pitch 7680 (/4 1920)
>[593071.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6690]
>[593071.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6690] width 1920 pitch 7680 (/4 1920)
>[593071.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a911f0]
>[593071.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a911f0] width 1920 pitch 7680 (/4 1920)
>[593071.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6690]
>[593071.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6690] width 1920 pitch 7680 (/4 1920)
>[593071.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca79d0]
>[593071.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca79d0] width 1920 pitch 7680 (/4 1920)
>[593071.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497b690]
>[593071.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497b690] width 1920 pitch 7680 (/4 1920)
>[593080.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831820]
>[593080.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831820] width 1920 pitch 7680 (/4 1920)
>[593084.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dbed0]
>[593084.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dbed0] width 1920 pitch 7680 (/4 1920)
>[593084.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[593084.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[593084.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c3ff00]
>[593084.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c3ff00] width 1920 pitch 7680 (/4 1920)
>[593084.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593084.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593084.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593084.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593084.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593084.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593084.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593084.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593084.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593084.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593084.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593084.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593084.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593084.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593084.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593085.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593085.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[593085.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[593085.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[593085.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[593086.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f068c0]
>[593086.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f068c0] width 1920 pitch 7680 (/4 1920)
>[593089.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4889f40]
>[593089.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4889f40] width 1920 pitch 7680 (/4 1920)
>[593093.906] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[593093.906] (II) RADEON(0): Using hsync ranges from config file
>[593093.906] (II) RADEON(0): Using vrefresh ranges from config file
>[593093.906] (II) RADEON(0): Printing DDC gathered Modelines:
>[593093.906] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[593093.906] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[593093.906] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[593093.906] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[593093.906] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[593093.906] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[593093.906] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[593093.906] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[593093.906] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[593093.906] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[593093.906] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[593093.906] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[593093.951] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[593093.951] (II) RADEON(0): Using hsync ranges from config file
>[593093.951] (II) RADEON(0): Using vrefresh ranges from config file
>[593093.951] (II) RADEON(0): Printing DDC gathered Modelines:
>[593093.951] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[593093.951] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[593093.951] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[593093.951] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[593093.951] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[593093.951] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[593093.951] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[593093.951] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[593093.951] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[593093.951] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[593093.951] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[593093.951] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[593093.996] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[593093.996] (II) RADEON(0): Using hsync ranges from config file
>[593093.996] (II) RADEON(0): Using vrefresh ranges from config file
>[593093.996] (II) RADEON(0): Printing DDC gathered Modelines:
>[593093.996] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[593093.996] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[593093.996] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[593093.996] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[593093.996] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[593093.996] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[593093.996] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[593093.996] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[593093.996] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[593093.996] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[593093.996] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[593093.996] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[593100.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a46950]
>[593100.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a46950] width 1920 pitch 7680 (/4 1920)
>[593101.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063460]
>[593101.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063460] width 1920 pitch 7680 (/4 1920)
>[593101.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfea20]
>[593101.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfea20] width 1920 pitch 7680 (/4 1920)
>[593131.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70f30]
>[593131.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70f30] width 1920 pitch 7680 (/4 1920)
>[593161.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[593161.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[593191.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70f30]
>[593191.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70f30] width 1920 pitch 7680 (/4 1920)
>[593326.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[593326.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[593341.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfb4f0]
>[593341.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfb4f0] width 1920 pitch 7680 (/4 1920)
>[593521.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[593521.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[593536.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d90ee0]
>[593536.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d90ee0] width 1920 pitch 7680 (/4 1920)
>[593566.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[593566.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[593581.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[593581.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[593596.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[593596.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[593611.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[593611.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[593776.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294c6a0]
>[593776.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294c6a0] width 1920 pitch 7680 (/4 1920)
>[593791.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247a740]
>[593791.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247a740] width 1920 pitch 7680 (/4 1920)
>[593911.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfb6b0]
>[593911.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfb6b0] width 1920 pitch 7680 (/4 1920)
>[593926.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70f30]
>[593926.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70f30] width 1920 pitch 7680 (/4 1920)
>[593971.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70f30]
>[593971.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70f30] width 1920 pitch 7680 (/4 1920)
>[593986.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c70f30]
>[593986.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c70f30] width 1920 pitch 7680 (/4 1920)
>[594031.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[594031.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[594046.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294dbd0]
>[594046.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294dbd0] width 1920 pitch 7680 (/4 1920)
>[594346.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294c6a0]
>[594346.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294c6a0] width 1920 pitch 7680 (/4 1920)
>[594361.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294dbd0]
>[594361.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294dbd0] width 1920 pitch 7680 (/4 1920)
>[594376.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294dbd0]
>[594376.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294dbd0] width 1920 pitch 7680 (/4 1920)
>[594391.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294dbd0]
>[594391.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294dbd0] width 1920 pitch 7680 (/4 1920)
>[594466.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[594466.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[594496.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294c6a0]
>[594496.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294c6a0] width 1920 pitch 7680 (/4 1920)
>[594586.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[594586.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[594601.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294dbd0]
>[594601.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294dbd0] width 1920 pitch 7680 (/4 1920)
>[594631.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294c6a0]
>[594631.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294c6a0] width 1920 pitch 7680 (/4 1920)
>[594646.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[594646.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[594661.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[594661.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[594676.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[594676.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[594721.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294c6a0]
>[594721.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294c6a0] width 1920 pitch 7680 (/4 1920)
>[594736.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294d870]
>[594736.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294d870] width 1920 pitch 7680 (/4 1920)
>[594766.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[594766.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[594781.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d4270]
>[594781.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d4270] width 1920 pitch 7680 (/4 1920)
>[594826.598] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[594826.598] (II) RADEON(0): Using hsync ranges from config file
>[594826.598] (II) RADEON(0): Using vrefresh ranges from config file
>[594826.598] (II) RADEON(0): Printing DDC gathered Modelines:
>[594826.598] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[594826.598] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[594826.598] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[594826.598] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[594826.598] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[594826.598] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[594826.598] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[594826.598] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[594826.598] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[594826.598] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[594826.598] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[594826.598] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[594826.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294dbd0]
>[594826.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294dbd0] width 1920 pitch 7680 (/4 1920)
>[594826.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec1c70]
>[594826.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec1c70] width 1920 pitch 7680 (/4 1920)
>[594826.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a911f0]
>[594826.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a911f0] width 1920 pitch 7680 (/4 1920)
>[594827.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6c960]
>[594827.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6c960] width 1920 pitch 7680 (/4 1920)
>[594829.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb3a00]
>[594829.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb3a00] width 1920 pitch 7680 (/4 1920)
>[594831.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888a50]
>[594831.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888a50] width 1920 pitch 7680 (/4 1920)
>[594831.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe94e0]
>[594831.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe94e0] width 1920 pitch 7680 (/4 1920)
>[594831.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888a50]
>[594831.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888a50] width 1920 pitch 7680 (/4 1920)
>[594835.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c10]
>[594835.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c10] width 1920 pitch 7680 (/4 1920)
>[594839.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[594839.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[594839.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[594839.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[594839.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628d200]
>[594839.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628d200] width 1920 pitch 7680 (/4 1920)
>[594841.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6690]
>[594841.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6690] width 1920 pitch 7680 (/4 1920)
>[594846.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6690]
>[594846.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6690] width 1920 pitch 7680 (/4 1920)
>[594870.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bd80]
>[594870.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bd80] width 1920 pitch 7680 (/4 1920)
>[594870.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d0f180]
>[594870.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d0f180] width 1920 pitch 7680 (/4 1920)
>[594870.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bd80]
>[594870.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bd80] width 1920 pitch 7680 (/4 1920)
>[594870.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d17050]
>[594870.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d17050] width 1920 pitch 7680 (/4 1920)
>[594870.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bd80]
>[594870.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bd80] width 1920 pitch 7680 (/4 1920)
>[594870.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x256bd80]
>[594870.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x256bd80] width 1920 pitch 7680 (/4 1920)
>[594870.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5097830]
>[594870.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5097830] width 1920 pitch 7680 (/4 1920)
>[594873.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6288500]
>[594873.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6288500] width 1920 pitch 7680 (/4 1920)
>[594873.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50744f0]
>[594873.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50744f0] width 1920 pitch 7680 (/4 1920)
>[594873.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6288500]
>[594873.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6288500] width 1920 pitch 7680 (/4 1920)
>[594873.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50744f0]
>[594873.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50744f0] width 1920 pitch 7680 (/4 1920)
>[594877.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832280]
>[594877.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832280] width 1920 pitch 7680 (/4 1920)
>[594878.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b82750]
>[594878.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b82750] width 1920 pitch 7680 (/4 1920)
>[594878.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401bf80]
>[594878.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401bf80] width 1920 pitch 7680 (/4 1920)
>[594878.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401bf80]
>[594878.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401bf80] width 1920 pitch 7680 (/4 1920)
>[594878.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401bf80]
>[594878.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401bf80] width 1920 pitch 7680 (/4 1920)
>[594878.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a3610]
>[594878.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a3610] width 1920 pitch 7680 (/4 1920)
>[594878.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401bf80]
>[594879.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401bf80] width 1920 pitch 7680 (/4 1920)
>[594879.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a3610]
>[594879.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a3610] width 1920 pitch 7680 (/4 1920)
>[594879.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401bf80]
>[594879.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401bf80] width 1920 pitch 7680 (/4 1920)
>[594879.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a3610]
>[594879.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a3610] width 1920 pitch 7680 (/4 1920)
>[594901.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa19c0]
>[594901.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa19c0] width 1920 pitch 7680 (/4 1920)
>[594916.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933c80]
>[594916.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933c80] width 1920 pitch 7680 (/4 1920)
>[595171.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc31b0]
>[595171.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc31b0] width 1920 pitch 7680 (/4 1920)
>[595201.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62da4c0]
>[595201.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62da4c0] width 1920 pitch 7680 (/4 1920)
>[595347.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595347.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595347.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595347.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595347.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595348.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595348.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595348.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595348.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595348.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595348.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595348.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595348.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595348.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595348.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595348.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595348.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595348.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595349.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595349.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595349.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595349.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595349.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595349.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595349.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595349.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595350.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595350.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595351.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595351.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595351.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595351.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595351.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595351.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595351.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fcfe60]
>[595351.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fcfe60] width 1920 pitch 7680 (/4 1920)
>[595351.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b2480]
>[595351.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b2480] width 1920 pitch 7680 (/4 1920)
>[595351.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394a580]
>[595351.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394a580] width 1920 pitch 7680 (/4 1920)
>[595384.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5010bc0]
>[595384.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5010bc0] width 1920 pitch 7680 (/4 1920)
>[595384.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca230]
>[595384.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca230] width 1920 pitch 7680 (/4 1920)
>[595384.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ca230]
>[595384.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ca230] width 1920 pitch 7680 (/4 1920)
>[595384.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595384.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595384.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc2d0]
>[595384.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc2d0] width 1920 pitch 7680 (/4 1920)
>[595384.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595384.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595384.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dc2d0]
>[595384.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dc2d0] width 1920 pitch 7680 (/4 1920)
>[595385.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b143e0]
>[595385.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b143e0] width 1920 pitch 7680 (/4 1920)
>[595385.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2986920]
>[595385.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2986920] width 1920 pitch 7680 (/4 1920)
>[595385.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x393bd50]
>[595385.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x393bd50] width 1920 pitch 7680 (/4 1920)
>[595385.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2986920]
>[595385.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2986920] width 1920 pitch 7680 (/4 1920)
>[595385.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832100]
>[595385.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832100] width 1920 pitch 7680 (/4 1920)
>[595386.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cef90]
>[595386.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cef90] width 1920 pitch 7680 (/4 1920)
>[595389.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b143e0]
>[595389.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b143e0] width 1920 pitch 7680 (/4 1920)
>[595389.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832100]
>[595389.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832100] width 1920 pitch 7680 (/4 1920)
>[595390.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb9450]
>[595390.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb9450] width 1920 pitch 7680 (/4 1920)
>[595390.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b84980]
>[595390.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b84980] width 1920 pitch 7680 (/4 1920)
>[595390.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595390.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595391.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595391.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595391.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d28e0]
>[595391.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d28e0] width 1920 pitch 7680 (/4 1920)
>[595392.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595392.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595392.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595392.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595392.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d28e0]
>[595392.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d28e0] width 1920 pitch 7680 (/4 1920)
>[595392.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595392.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595392.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d28e0]
>[595392.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d28e0] width 1920 pitch 7680 (/4 1920)
>[595403.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595403.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595404.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d28e0]
>[595404.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d28e0] width 1920 pitch 7680 (/4 1920)
>[595405.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e78210]
>[595405.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e78210] width 1920 pitch 7680 (/4 1920)
>[595405.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbeb0]
>[595405.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbeb0] width 1920 pitch 7680 (/4 1920)
>[595406.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5010bc0]
>[595406.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5010bc0] width 1920 pitch 7680 (/4 1920)
>[595413.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49864b0]
>[595413.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49864b0] width 1920 pitch 7680 (/4 1920)
>[595413.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbeb0]
>[595413.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbeb0] width 1920 pitch 7680 (/4 1920)
>[595413.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49864b0]
>[595413.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49864b0] width 1920 pitch 7680 (/4 1920)
>[595413.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dbeb0]
>[595413.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dbeb0] width 1920 pitch 7680 (/4 1920)
>[595413.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49864b0]
>[595413.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49864b0] width 1920 pitch 7680 (/4 1920)
>[595413.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6225530]
>[595413.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6225530] width 1920 pitch 7680 (/4 1920)
>[595413.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1bda0]
>[595413.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1bda0] width 1920 pitch 7680 (/4 1920)
>[595413.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49864b0]
>[595413.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49864b0] width 1920 pitch 7680 (/4 1920)
>[595414.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd3120]
>[595414.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd3120] width 1920 pitch 7680 (/4 1920)
>[595414.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50925c0]
>[595414.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50925c0] width 1920 pitch 7680 (/4 1920)
>[595414.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd3120]
>[595414.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd3120] width 1920 pitch 7680 (/4 1920)
>[595414.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50925c0]
>[595414.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50925c0] width 1920 pitch 7680 (/4 1920)
>[595417.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f60e0]
>[595417.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f60e0] width 1920 pitch 7680 (/4 1920)
>[595417.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7dc30]
>[595417.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7dc30] width 1920 pitch 7680 (/4 1920)
>[595417.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbbd60]
>[595417.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbbd60] width 1920 pitch 7680 (/4 1920)
>[595417.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c660]
>[595417.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c660] width 1920 pitch 7680 (/4 1920)
>[595417.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508f150]
>[595417.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508f150] width 1920 pitch 7680 (/4 1920)
>[595417.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfbe50]
>[595417.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfbe50] width 1920 pitch 7680 (/4 1920)
>[595417.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x257bb80]
>[595417.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x257bb80] width 1920 pitch 7680 (/4 1920)
>[595417.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0a060]
>[595417.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0a060] width 1920 pitch 7680 (/4 1920)
>[595417.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x257bb80]
>[595417.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x257bb80] width 1920 pitch 7680 (/4 1920)
>[595417.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a0a060]
>[595417.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a0a060] width 1920 pitch 7680 (/4 1920)
>[595426.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x257bb80]
>[595426.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x257bb80] width 1920 pitch 7680 (/4 1920)
>[595441.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[595441.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[595462.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288b8b0]
>[595462.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288b8b0] width 1920 pitch 7680 (/4 1920)
>[595462.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1f30]
>[595462.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1f30] width 1920 pitch 7680 (/4 1920)
>[595462.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[595462.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[595462.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1f30]
>[595462.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1f30] width 1920 pitch 7680 (/4 1920)
>[595462.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[595462.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[595462.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1f30]
>[595462.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1f30] width 1920 pitch 7680 (/4 1920)
>[595462.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[595462.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[595462.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1f30]
>[595462.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1f30] width 1920 pitch 7680 (/4 1920)
>[595462.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[595462.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[595462.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1f30]
>[595462.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1f30] width 1920 pitch 7680 (/4 1920)
>[595462.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[595462.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[595462.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ab1f30]
>[595462.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ab1f30] width 1920 pitch 7680 (/4 1920)
>[595462.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ce6a0]
>[595462.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ce6a0] width 1920 pitch 7680 (/4 1920)
>[595463.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d728b0]
>[595463.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d728b0] width 1920 pitch 7680 (/4 1920)
>[595463.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[595463.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[595463.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5e0]
>[595463.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5e0] width 1920 pitch 7680 (/4 1920)
>[595463.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[595463.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[595463.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d990]
>[595463.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d990] width 1920 pitch 7680 (/4 1920)
>[595463.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[595463.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[595463.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d990]
>[595463.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d990] width 1920 pitch 7680 (/4 1920)
>[595464.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a610]
>[595464.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a610] width 1920 pitch 7680 (/4 1920)
>[595464.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8d990]
>[595464.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8d990] width 1920 pitch 7680 (/4 1920)
>[595464.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a610]
>[595464.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a610] width 1920 pitch 7680 (/4 1920)
>[595464.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[595464.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[595465.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a610]
>[595465.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a610] width 1920 pitch 7680 (/4 1920)
>[595466.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f5bf0]
>[595466.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f5bf0] width 1920 pitch 7680 (/4 1920)
>[595466.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[595467.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[595472.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[595472.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[595472.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x316b400]
>[595472.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x316b400] width 1920 pitch 7680 (/4 1920)
>[595472.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506f0e0]
>[595472.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506f0e0] width 1920 pitch 7680 (/4 1920)
>[595473.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fa630]
>[595473.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fa630] width 1920 pitch 7680 (/4 1920)
>[595473.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5056770]
>[595473.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5056770] width 1920 pitch 7680 (/4 1920)
>[595473.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628eb30]
>[595473.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628eb30] width 1920 pitch 7680 (/4 1920)
>[595473.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16d20]
>[595473.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16d20] width 1920 pitch 7680 (/4 1920)
>[595473.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628eb30]
>[595473.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628eb30] width 1920 pitch 7680 (/4 1920)
>[595473.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16d20]
>[595473.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16d20] width 1920 pitch 7680 (/4 1920)
>[595473.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628eb30]
>[595473.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628eb30] width 1920 pitch 7680 (/4 1920)
>[595476.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1e340]
>[595476.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1e340] width 1920 pitch 7680 (/4 1920)
>[595476.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d4e70]
>[595476.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d4e70] width 1920 pitch 7680 (/4 1920)
>[595476.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f068c0]
>[595476.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f068c0] width 1920 pitch 7680 (/4 1920)
>[595476.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1e50]
>[595476.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1e50] width 1920 pitch 7680 (/4 1920)
>[595476.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497cdb0]
>[595476.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497cdb0] width 1920 pitch 7680 (/4 1920)
>[595477.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62319c0]
>[595477.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62319c0] width 1920 pitch 7680 (/4 1920)
>[595477.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[595477.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[595478.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4004ab0]
>[595478.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4004ab0] width 1920 pitch 7680 (/4 1920)
>[595478.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[595478.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[595478.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4004ab0]
>[595478.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4004ab0] width 1920 pitch 7680 (/4 1920)
>[595478.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[595478.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[595478.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fcc60]
>[595478.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fcc60] width 1920 pitch 7680 (/4 1920)
>[595478.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[595478.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[595478.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fcc60]
>[595478.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fcc60] width 1920 pitch 7680 (/4 1920)
>[595478.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d63d0]
>[595478.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d63d0] width 1920 pitch 7680 (/4 1920)
>[595478.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fcc60]
>[595479.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fcc60] width 1920 pitch 7680 (/4 1920)
>[595479.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a911f0]
>[595479.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a911f0] width 1920 pitch 7680 (/4 1920)
>[595479.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fcc60]
>[595479.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fcc60] width 1920 pitch 7680 (/4 1920)
>[595479.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[595479.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[595479.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[595479.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[595479.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[595479.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[595479.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[595479.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[595479.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d06aa0]
>[595479.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d06aa0] width 1920 pitch 7680 (/4 1920)
>[595479.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[595479.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[595479.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9e160]
>[595479.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9e160] width 1920 pitch 7680 (/4 1920)
>[595479.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[595479.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[595516.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[595516.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[595546.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7d40]
>[595546.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7d40] width 1920 pitch 7680 (/4 1920)
>[595561.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca7d0]
>[595561.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca7d0] width 1920 pitch 7680 (/4 1920)
>[595576.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a220a0]
>[595576.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a220a0] width 1920 pitch 7680 (/4 1920)
>[595591.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a912c0]
>[595591.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a912c0] width 1920 pitch 7680 (/4 1920)
>[595606.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8b90]
>[595606.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8b90] width 1920 pitch 7680 (/4 1920)
>[595726.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b3f0]
>[595726.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b3f0] width 1920 pitch 7680 (/4 1920)
>[595741.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[595741.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[595816.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e82d0]
>[595816.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e82d0] width 1920 pitch 7680 (/4 1920)
>[595876.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4898470]
>[595876.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4898470] width 1920 pitch 7680 (/4 1920)
>[595921.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2db2360]
>[595921.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2db2360] width 1920 pitch 7680 (/4 1920)
>[595951.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[595951.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[595951.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50468d0]
>[595951.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50468d0] width 1920 pitch 7680 (/4 1920)
>[595951.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[595951.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[595951.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[595951.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[595951.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[595951.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[595951.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[595951.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[595951.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[595952.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[595952.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[595952.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[595952.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[595952.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[595952.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[595952.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[595952.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52fd240]
>[595952.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52fd240] width 1920 pitch 7680 (/4 1920)
>[595952.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[595952.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[595952.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[595952.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[595952.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[595952.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[595953.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[595953.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[595953.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4040]
>[595953.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4040] width 1920 pitch 7680 (/4 1920)
>[595954.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394b220]
>[595954.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394b220] width 1920 pitch 7680 (/4 1920)
>[595954.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f540]
>[595954.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f540] width 1920 pitch 7680 (/4 1920)
>[595955.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[595955.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[595955.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8fb70]
>[595955.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8fb70] width 1920 pitch 7680 (/4 1920)
>[595956.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[595956.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[595956.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[595956.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[595956.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cc6d0]
>[595956.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cc6d0] width 1920 pitch 7680 (/4 1920)
>[595956.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031aa0]
>[595956.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031aa0] width 1920 pitch 7680 (/4 1920)
>[595956.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cc6d0]
>[595956.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cc6d0] width 1920 pitch 7680 (/4 1920)
>[595956.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031aa0]
>[595956.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031aa0] width 1920 pitch 7680 (/4 1920)
>[595956.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cc6d0]
>[595956.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cc6d0] width 1920 pitch 7680 (/4 1920)
>[595956.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031aa0]
>[595956.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031aa0] width 1920 pitch 7680 (/4 1920)
>[595981.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e1e70]
>[595981.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e1e70] width 1920 pitch 7680 (/4 1920)
>[595987.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1e340]
>[595987.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1e340] width 1920 pitch 7680 (/4 1920)
>[595989.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d4e70]
>[595989.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d4e70] width 1920 pitch 7680 (/4 1920)
>[595989.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62319c0]
>[595989.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62319c0] width 1920 pitch 7680 (/4 1920)
>[595989.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017dc0]
>[595989.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017dc0] width 1920 pitch 7680 (/4 1920)
>[596026.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4981240]
>[596026.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4981240] width 1920 pitch 7680 (/4 1920)
>[596071.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[596071.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[596086.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[596086.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[596131.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296ef90]
>[596131.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296ef90] width 1920 pitch 7680 (/4 1920)
>[596146.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[596146.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[596341.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296ef90]
>[596341.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296ef90] width 1920 pitch 7680 (/4 1920)
>[596356.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[596356.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[596416.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fcc60]
>[596416.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fcc60] width 1920 pitch 7680 (/4 1920)
>[596431.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b0800]
>[596431.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b0800] width 1920 pitch 7680 (/4 1920)
>[596476.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832660]
>[596476.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832660] width 1920 pitch 7680 (/4 1920)
>[596491.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b3f0]
>[596491.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b3f0] width 1920 pitch 7680 (/4 1920)
>[596506.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f032f0]
>[596506.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f032f0] width 1920 pitch 7680 (/4 1920)
>[596521.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b8ce20]
>[596521.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b8ce20] width 1920 pitch 7680 (/4 1920)
>[596536.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c98780]
>[596536.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c98780] width 1920 pitch 7680 (/4 1920)
>[596551.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd6c0]
>[596551.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd6c0] width 1920 pitch 7680 (/4 1920)
>[596590.663] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[596590.664] (II) RADEON(0): Using hsync ranges from config file
>[596590.664] (II) RADEON(0): Using vrefresh ranges from config file
>[596590.664] (II) RADEON(0): Printing DDC gathered Modelines:
>[596590.664] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[596590.664] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[596590.664] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[596590.664] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[596590.664] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[596590.664] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[596590.664] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[596590.664] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[596590.664] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[596590.664] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[596590.664] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[596590.664] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[596680.663] (II) RADEON(0): RADEONSaveScreen(2)
>[596680.663] (II) RADEON(0): RADEONSaveScreen(0)
>[627714.884] (II) RADEON(0): RADEONSaveScreen(1)
>[627715.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5146270]
>[627715.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5146270] width 1920 pitch 7680 (/4 1920)
>[627720.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[627720.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[627720.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f086d0]
>[627720.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f086d0] width 1920 pitch 7680 (/4 1920)
>[627720.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[627720.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[627720.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f086d0]
>[627720.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f086d0] width 1920 pitch 7680 (/4 1920)
>[627720.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[627720.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[627720.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f086d0]
>[627720.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f086d0] width 1920 pitch 7680 (/4 1920)
>[627720.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[627720.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[627720.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f068c0]
>[627720.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f068c0] width 1920 pitch 7680 (/4 1920)
>[627720.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[627720.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[627722.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28650a0]
>[627722.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28650a0] width 1920 pitch 7680 (/4 1920)
>[627722.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6e7e0]
>[627722.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6e7e0] width 1920 pitch 7680 (/4 1920)
>[627722.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e82d0]
>[627722.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e82d0] width 1920 pitch 7680 (/4 1920)
>[627722.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[627722.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[627722.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504a5c0]
>[627722.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504a5c0] width 1920 pitch 7680 (/4 1920)
>[627722.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efb2d0]
>[627722.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efb2d0] width 1920 pitch 7680 (/4 1920)
>[627722.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29da8f0]
>[627722.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29da8f0] width 1920 pitch 7680 (/4 1920)
>[627722.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fef060]
>[627722.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fef060] width 1920 pitch 7680 (/4 1920)
>[627722.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30ce450]
>[627722.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30ce450] width 1920 pitch 7680 (/4 1920)
>[627726.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4e480]
>[627726.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4e480] width 1920 pitch 7680 (/4 1920)
>[627726.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16d20]
>[627726.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16d20] width 1920 pitch 7680 (/4 1920)
>[627726.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[627726.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[627726.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24712b0]
>[627726.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24712b0] width 1920 pitch 7680 (/4 1920)
>[627726.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5051890]
>[627726.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5051890] width 1920 pitch 7680 (/4 1920)
>[627727.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2930890]
>[627727.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2930890] width 1920 pitch 7680 (/4 1920)
>[627727.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5e0]
>[627727.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5e0] width 1920 pitch 7680 (/4 1920)
>[627727.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b590]
>[627727.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b590] width 1920 pitch 7680 (/4 1920)
>[627727.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d728b0]
>[627727.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d728b0] width 1920 pitch 7680 (/4 1920)
>[627727.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b590]
>[627727.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b590] width 1920 pitch 7680 (/4 1920)
>[627727.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76db0]
>[627727.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76db0] width 1920 pitch 7680 (/4 1920)
>[627727.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b590]
>[627727.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b590] width 1920 pitch 7680 (/4 1920)
>[627727.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76db0]
>[627727.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76db0] width 1920 pitch 7680 (/4 1920)
>[627727.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b590]
>[627727.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b590] width 1920 pitch 7680 (/4 1920)
>[627728.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[627728.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[627728.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x392b590]
>[627728.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x392b590] width 1920 pitch 7680 (/4 1920)
>[627728.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[627728.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[627728.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f540]
>[627728.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f540] width 1920 pitch 7680 (/4 1920)
>[627728.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cbb580]
>[627728.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cbb580] width 1920 pitch 7680 (/4 1920)
>[627729.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[627729.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[627729.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8fb70]
>[627729.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8fb70] width 1920 pitch 7680 (/4 1920)
>[627729.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3abb600]
>[627729.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3abb600] width 1920 pitch 7680 (/4 1920)
>[627729.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3910]
>[627729.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3910] width 1920 pitch 7680 (/4 1920)
>[627729.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[627729.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[627730.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[627730.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[627745.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2b50]
>[627745.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2b50] width 1920 pitch 7680 (/4 1920)
>[627760.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6e7e0]
>[627760.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6e7e0] width 1920 pitch 7680 (/4 1920)
>[627775.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f032f0]
>[627775.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f032f0] width 1920 pitch 7680 (/4 1920)
>[627880.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296ef90]
>[627880.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296ef90] width 1920 pitch 7680 (/4 1920)
>[627895.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[627895.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[627925.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30de740]
>[627925.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30de740] width 1920 pitch 7680 (/4 1920)
>[627940.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2471eb0]
>[627940.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2471eb0] width 1920 pitch 7680 (/4 1920)
>[627985.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[627985.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[628000.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[628000.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[628060.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x252a5e0]
>[628060.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x252a5e0] width 1920 pitch 7680 (/4 1920)
>[628075.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c98780]
>[628075.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c98780] width 1920 pitch 7680 (/4 1920)
>[628135.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76db0]
>[628135.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76db0] width 1920 pitch 7680 (/4 1920)
>[628150.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[628150.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[628225.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c98780]
>[628225.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c98780] width 1920 pitch 7680 (/4 1920)
>[628240.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a912c0]
>[628240.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a912c0] width 1920 pitch 7680 (/4 1920)
>[628300.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[628300.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[628315.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[628315.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[628333.812] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[628333.812] (II) RADEON(0): Using hsync ranges from config file
>[628333.812] (II) RADEON(0): Using vrefresh ranges from config file
>[628333.812] (II) RADEON(0): Printing DDC gathered Modelines:
>[628333.812] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[628333.812] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[628333.812] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[628333.812] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[628333.812] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[628333.812] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[628333.812] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[628333.812] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[628333.812] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[628333.812] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[628333.812] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[628333.812] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[628423.655] (II) RADEON(0): RADEONSaveScreen(2)
>[628423.655] (II) RADEON(0): RADEONSaveScreen(0)
>[629068.348] (II) RADEON(0): RADEONSaveScreen(1)
>[629070.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f5bf0]
>[629070.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f5bf0] width 1920 pitch 7680 (/4 1920)
>[629098.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x513fe60]
>[629098.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x513fe60] width 1920 pitch 7680 (/4 1920)
>[629113.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f032f0]
>[629113.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f032f0] width 1920 pitch 7680 (/4 1920)
>[629125.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[629125.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[629125.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[629125.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[629125.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[629125.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[629125.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[629125.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[629125.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[629125.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[629125.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[629125.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[629125.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[629125.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[629125.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e90f00]
>[629125.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e90f00] width 1920 pitch 7680 (/4 1920)
>[629126.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[629126.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[629126.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[629126.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[629126.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[629126.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[629126.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251d830]
>[629126.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251d830] width 1920 pitch 7680 (/4 1920)
>[629126.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd3fb0]
>[629126.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd3fb0] width 1920 pitch 7680 (/4 1920)
>[629127.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5d90]
>[629127.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5d90] width 1920 pitch 7680 (/4 1920)
>[629127.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f92c0]
>[629127.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f92c0] width 1920 pitch 7680 (/4 1920)
>[629128.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3910]
>[629128.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3910] width 1920 pitch 7680 (/4 1920)
>[629128.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8fb70]
>[629128.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8fb70] width 1920 pitch 7680 (/4 1920)
>[629128.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a3910]
>[629128.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a3910] width 1920 pitch 7680 (/4 1920)
>[629128.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[629128.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[629128.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[629128.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[629128.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[629128.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[629128.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[629128.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[629128.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[629128.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[629128.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[629128.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[629128.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[629129.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[629129.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccab40]
>[629129.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccab40] width 1920 pitch 7680 (/4 1920)
>[629129.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdb920]
>[629129.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdb920] width 1920 pitch 7680 (/4 1920)
>[629203.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef500]
>[629203.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef500] width 1920 pitch 7680 (/4 1920)
>[629218.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f068c0]
>[629218.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f068c0] width 1920 pitch 7680 (/4 1920)
>[629248.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x611c240]
>[629248.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x611c240] width 1920 pitch 7680 (/4 1920)
>[629278.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x250cc40]
>[629278.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x250cc40] width 1920 pitch 7680 (/4 1920)
>[629293.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf820]
>[629293.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf820] width 1920 pitch 7680 (/4 1920)
>[629308.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d728b0]
>[629308.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d728b0] width 1920 pitch 7680 (/4 1920)
>[629353.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f086d0]
>[629353.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f086d0] width 1920 pitch 7680 (/4 1920)
>[629368.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628eb30]
>[629368.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628eb30] width 1920 pitch 7680 (/4 1920)
>[629458.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4981240]
>[629458.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4981240] width 1920 pitch 7680 (/4 1920)
>[629488.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50610f0]
>[629488.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50610f0] width 1920 pitch 7680 (/4 1920)
>[629533.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[629533.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[629548.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8f540]
>[629548.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8f540] width 1920 pitch 7680 (/4 1920)
>[629563.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[629563.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[629578.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[629578.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[629593.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d667b0]
>[629593.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d667b0] width 1920 pitch 7680 (/4 1920)
>[629608.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe3550]
>[629608.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe3550] width 1920 pitch 7680 (/4 1920)
>[629728.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2e2a0]
>[629728.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2e2a0] width 1920 pitch 7680 (/4 1920)
>[629735.948] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[629735.948] (II) RADEON(0): Using hsync ranges from config file
>[629735.948] (II) RADEON(0): Using vrefresh ranges from config file
>[629735.948] (II) RADEON(0): Printing DDC gathered Modelines:
>[629735.948] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[629735.948] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[629735.948] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[629735.948] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[629735.948] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[629735.948] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[629735.948] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[629735.948] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[629735.948] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[629735.948] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[629735.948] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[629735.948] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[629743.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[629743.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[629826.655] (II) RADEON(0): RADEONSaveScreen(2)
>[629826.655] (II) RADEON(0): RADEONSaveScreen(0)
>[631556.576] (II) RADEON(0): RADEONSaveScreen(1)
>[631557.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b3f0]
>[631557.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b3f0] width 1920 pitch 7680 (/4 1920)
>[631565.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b740]
>[631565.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b740] width 1920 pitch 7680 (/4 1920)
>[631565.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[631565.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[631565.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b740]
>[631565.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b740] width 1920 pitch 7680 (/4 1920)
>[631565.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[631565.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[631565.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b740]
>[631565.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b740] width 1920 pitch 7680 (/4 1920)
>[631565.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973760]
>[631565.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973760] width 1920 pitch 7680 (/4 1920)
>[631565.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251b740]
>[631565.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251b740] width 1920 pitch 7680 (/4 1920)
>[631566.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cc6d0]
>[631566.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cc6d0] width 1920 pitch 7680 (/4 1920)
>[631566.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[631566.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[631567.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cc6d0]
>[631567.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cc6d0] width 1920 pitch 7680 (/4 1920)
>[631567.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[631567.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[631568.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7bab0]
>[631568.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7bab0] width 1920 pitch 7680 (/4 1920)
>[631568.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3af8df0]
>[631568.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3af8df0] width 1920 pitch 7680 (/4 1920)
>[631569.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30de740]
>[631569.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30de740] width 1920 pitch 7680 (/4 1920)
>[631569.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9490]
>[631569.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9490] width 1920 pitch 7680 (/4 1920)
>[631569.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[631569.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[631569.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f73a30]
>[631570.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f73a30] width 1920 pitch 7680 (/4 1920)
>[631570.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16a00]
>[631570.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16a00] width 1920 pitch 7680 (/4 1920)
>[631570.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f73a30]
>[631570.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f73a30] width 1920 pitch 7680 (/4 1920)
>[631570.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef500]
>[631570.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef500] width 1920 pitch 7680 (/4 1920)
>[631570.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[631570.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[631570.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2b50]
>[631570.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2b50] width 1920 pitch 7680 (/4 1920)
>[631570.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4040]
>[631570.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4040] width 1920 pitch 7680 (/4 1920)
>[631570.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2b50]
>[631570.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2b50] width 1920 pitch 7680 (/4 1920)
>[631570.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4040]
>[631570.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4040] width 1920 pitch 7680 (/4 1920)
>[631570.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d2b50]
>[631570.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d2b50] width 1920 pitch 7680 (/4 1920)
>[631570.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb4040]
>[631570.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb4040] width 1920 pitch 7680 (/4 1920)
>[631571.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[631571.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[631571.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[631571.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[631571.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[631571.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[631571.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[631571.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[631571.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2838cc0]
>[631571.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2838cc0] width 1920 pitch 7680 (/4 1920)
>[631571.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[631571.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[631571.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4020340]
>[631571.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4020340] width 1920 pitch 7680 (/4 1920)
>[631571.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50089a0]
>[631572.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50089a0] width 1920 pitch 7680 (/4 1920)
>[631572.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4020340]
>[631572.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4020340] width 1920 pitch 7680 (/4 1920)
>[631572.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631572.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631572.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[631572.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[631572.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631572.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631572.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[631572.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[631572.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631572.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631572.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[631572.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[631572.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5093cc0]
>[631572.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5093cc0] width 1920 pitch 7680 (/4 1920)
>[631572.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62319c0]
>[631572.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62319c0] width 1920 pitch 7680 (/4 1920)
>[631654.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe94e0]
>[631654.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe94e0] width 1920 pitch 7680 (/4 1920)
>[631654.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22770]
>[631654.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22770] width 1920 pitch 7680 (/4 1920)
>[631654.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2832660]
>[631654.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2832660] width 1920 pitch 7680 (/4 1920)
>[631654.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb6690]
>[631654.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb6690] width 1920 pitch 7680 (/4 1920)
>[631654.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5056770]
>[631654.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5056770] width 1920 pitch 7680 (/4 1920)
>[631654.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631654.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631655.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631655.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631655.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631655.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631655.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631655.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631655.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631655.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631656.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631656.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631656.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631656.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631656.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631656.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631656.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631656.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631656.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631656.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631656.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631656.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631656.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631656.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631657.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631657.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631657.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631657.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631657.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631657.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631658.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631658.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631658.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631658.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631658.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631658.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631658.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631658.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631658.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631658.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631658.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631658.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631658.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631658.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631658.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2f400]
>[631658.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2f400] width 1920 pitch 7680 (/4 1920)
>[631658.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4881800]
>[631658.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4881800] width 1920 pitch 7680 (/4 1920)
>[631659.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631659.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631659.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631659.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631659.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631659.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631659.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631659.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631659.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631659.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631659.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631659.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631659.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631659.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631659.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631659.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631660.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631660.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631660.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631660.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631660.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631660.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631660.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631660.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631660.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[631660.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[631660.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f005c0]
>[631660.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f005c0] width 1920 pitch 7680 (/4 1920)
>[631660.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9490]
>[631660.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9490] width 1920 pitch 7680 (/4 1920)
>[631661.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dc0750]
>[631661.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dc0750] width 1920 pitch 7680 (/4 1920)
>[631661.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5031aa0]
>[631661.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5031aa0] width 1920 pitch 7680 (/4 1920)
>[631664.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd6c0]
>[631664.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd6c0] width 1920 pitch 7680 (/4 1920)
>[631664.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c98780]
>[631664.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c98780] width 1920 pitch 7680 (/4 1920)
>[631664.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd6c0]
>[631664.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd6c0] width 1920 pitch 7680 (/4 1920)
>[631664.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c98780]
>[631664.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c98780] width 1920 pitch 7680 (/4 1920)
>[631664.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62dd6c0]
>[631664.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62dd6c0] width 1920 pitch 7680 (/4 1920)
>[631664.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c98780]
>[631664.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c98780] width 1920 pitch 7680 (/4 1920)
>[631664.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[631664.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[631665.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631665.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631665.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[631666.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[631666.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631666.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631666.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[631666.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[631666.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631666.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631666.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[631666.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[631666.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631666.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631666.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[631666.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[631666.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d0a0]
>[631666.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d0a0] width 1920 pitch 7680 (/4 1920)
>[631666.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49de7b0]
>[631666.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49de7b0] width 1920 pitch 7680 (/4 1920)
>[631668.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631668.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631668.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631668.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631668.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631668.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631668.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631669.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631669.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631669.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631669.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631669.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631669.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631669.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631669.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631669.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631670.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631670.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631674.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631674.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631675.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631675.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631675.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631675.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631675.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631675.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631675.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631675.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631675.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631675.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631675.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631675.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631675.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a40c70]
>[631675.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a40c70] width 1920 pitch 7680 (/4 1920)
>[631675.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29325f0]
>[631675.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29325f0] width 1920 pitch 7680 (/4 1920)
>[631736.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[631736.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[631739.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631739.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631739.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631739.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631739.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631739.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631739.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a27890]
>[631739.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a27890] width 1920 pitch 7680 (/4 1920)
>[631739.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d8cc0]
>[631739.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d8cc0] width 1920 pitch 7680 (/4 1920)
>[631743.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ca5b0]
>[631743.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ca5b0] width 1920 pitch 7680 (/4 1920)
>[631743.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622a610]
>[631743.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622a610] width 1920 pitch 7680 (/4 1920)
>[631746.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ca5b0]
>[631746.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ca5b0] width 1920 pitch 7680 (/4 1920)
>[631746.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48fa710]
>[631746.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48fa710] width 1920 pitch 7680 (/4 1920)
>[631746.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[631746.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[631746.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[631746.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[631746.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[631746.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[631746.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[631746.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[631746.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[631746.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[631746.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[631746.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[631746.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[631746.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[631746.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[631746.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[631746.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[631746.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[631746.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[631746.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[631746.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24775f0]
>[631746.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24775f0] width 1920 pitch 7680 (/4 1920)
>[631746.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50235f0]
>[631746.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50235f0] width 1920 pitch 7680 (/4 1920)
>[631747.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631747.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631747.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[631747.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[631747.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631747.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631747.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[631747.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[631747.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631747.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631747.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[631747.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[631747.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631747.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631747.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[631747.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[631747.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631747.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631747.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[631747.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[631747.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631747.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631747.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[631747.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[631748.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x248c190]
>[631748.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x248c190] width 1920 pitch 7680 (/4 1920)
>[631748.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[631748.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[631749.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[631749.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[631749.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30371b0]
>[631749.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30371b0] width 1920 pitch 7680 (/4 1920)
>[631749.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536f0a0]
>[631749.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536f0a0] width 1920 pitch 7680 (/4 1920)
>[631751.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52f7f20]
>[631751.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52f7f20] width 1920 pitch 7680 (/4 1920)
>[631766.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d12e0]
>[631766.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d12e0] width 1920 pitch 7680 (/4 1920)
>[631766.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb330]
>[631766.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb330] width 1920 pitch 7680 (/4 1920)
>[631766.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ea5480]
>[631766.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ea5480] width 1920 pitch 7680 (/4 1920)
>[631766.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d12e0]
>[631766.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d12e0] width 1920 pitch 7680 (/4 1920)
>[631766.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb330]
>[631766.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb330] width 1920 pitch 7680 (/4 1920)
>[631766.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb330]
>[631766.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb330] width 1920 pitch 7680 (/4 1920)
>[631766.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506fca0]
>[631766.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506fca0] width 1920 pitch 7680 (/4 1920)
>[631766.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eadb0]
>[631766.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eadb0] width 1920 pitch 7680 (/4 1920)
>[631766.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506fca0]
>[631766.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506fca0] width 1920 pitch 7680 (/4 1920)
>[631766.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eadb0]
>[631766.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eadb0] width 1920 pitch 7680 (/4 1920)
>[631766.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506fca0]
>[631766.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506fca0] width 1920 pitch 7680 (/4 1920)
>[631766.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eadb0]
>[631766.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eadb0] width 1920 pitch 7680 (/4 1920)
>[631767.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eadb0]
>[631767.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eadb0] width 1920 pitch 7680 (/4 1920)
>[631767.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eb330]
>[631767.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eb330] width 1920 pitch 7680 (/4 1920)
>[631767.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[631767.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[631767.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8d430]
>[631767.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8d430] width 1920 pitch 7680 (/4 1920)
>[631767.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[631767.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[631767.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1e50]
>[631767.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1e50] width 1920 pitch 7680 (/4 1920)
>[631767.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[631767.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[631767.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1e50]
>[631767.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1e50] width 1920 pitch 7680 (/4 1920)
>[631767.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[631767.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[631767.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30f1e50]
>[631767.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30f1e50] width 1920 pitch 7680 (/4 1920)
>[631767.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[631767.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[631767.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74ec0]
>[631767.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74ec0] width 1920 pitch 7680 (/4 1920)
>[631767.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d16a0]
>[631767.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d16a0] width 1920 pitch 7680 (/4 1920)
>[631767.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e74ec0]
>[631767.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e74ec0] width 1920 pitch 7680 (/4 1920)
>[631771.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a220a0]
>[631771.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a220a0] width 1920 pitch 7680 (/4 1920)
>[631771.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x301c320]
>[631771.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x301c320] width 1920 pitch 7680 (/4 1920)
>[631771.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdeb0]
>[631771.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdeb0] width 1920 pitch 7680 (/4 1920)
>[631771.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4925590]
>[631771.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4925590] width 1920 pitch 7680 (/4 1920)
>[631841.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c10]
>[631841.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c10] width 1920 pitch 7680 (/4 1920)
>[631856.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3901e30]
>[631856.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3901e30] width 1920 pitch 7680 (/4 1920)
>[631916.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4925590]
>[631916.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4925590] width 1920 pitch 7680 (/4 1920)
>[631931.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4981240]
>[631931.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4981240] width 1920 pitch 7680 (/4 1920)
>[631946.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[631946.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[631961.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[631961.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[631966.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdeb0]
>[631966.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdeb0] width 1920 pitch 7680 (/4 1920)
>[631966.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4869c70]
>[631966.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4869c70] width 1920 pitch 7680 (/4 1920)
>[631966.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3968c10]
>[631966.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3968c10] width 1920 pitch 7680 (/4 1920)
>[631966.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d82e20]
>[631966.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d82e20] width 1920 pitch 7680 (/4 1920)
>[631967.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62319c0]
>[631967.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62319c0] width 1920 pitch 7680 (/4 1920)
>[631967.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f09e30]
>[631967.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f09e30] width 1920 pitch 7680 (/4 1920)
>[631967.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50715b0]
>[631967.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50715b0] width 1920 pitch 7680 (/4 1920)
>[631967.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f086d0]
>[631967.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f086d0] width 1920 pitch 7680 (/4 1920)
>[631968.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6293150]
>[631968.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6293150] width 1920 pitch 7680 (/4 1920)
>[631968.971] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f086d0]
>[631968.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f086d0] width 1920 pitch 7680 (/4 1920)
>[631969.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[631969.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[631969.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[631969.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[631972.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a610]
>[631972.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a610] width 1920 pitch 7680 (/4 1920)
>[631972.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083140]
>[631972.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083140] width 1920 pitch 7680 (/4 1920)
>[631972.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd2930]
>[631973.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd2930] width 1920 pitch 7680 (/4 1920)
>[631973.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[631973.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[631991.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[631991.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[632006.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632006.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632021.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9490]
>[632021.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9490] width 1920 pitch 7680 (/4 1920)
>[632028.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76db0]
>[632028.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76db0] width 1920 pitch 7680 (/4 1920)
>[632029.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40030]
>[632029.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40030] width 1920 pitch 7680 (/4 1920)
>[632029.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f24740]
>[632029.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f24740] width 1920 pitch 7680 (/4 1920)
>[632029.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9a610]
>[632029.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9a610] width 1920 pitch 7680 (/4 1920)
>[632031.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e950]
>[632031.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e950] width 1920 pitch 7680 (/4 1920)
>[632032.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[632032.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[632032.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632032.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632032.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d3320]
>[632032.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d3320] width 1920 pitch 7680 (/4 1920)
>[632051.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295c0a0]
>[632051.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295c0a0] width 1920 pitch 7680 (/4 1920)
>[632064.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4dcb2d0]
>[632064.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4dcb2d0] width 1920 pitch 7680 (/4 1920)
>[632064.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe8f20]
>[632064.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe8f20] width 1920 pitch 7680 (/4 1920)
>[632064.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c8f340]
>[632064.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c8f340] width 1920 pitch 7680 (/4 1920)
>[632064.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509d810]
>[632064.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509d810] width 1920 pitch 7680 (/4 1920)
>[632065.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f6dee0]
>[632065.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f6dee0] width 1920 pitch 7680 (/4 1920)
>[632065.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d620]
>[632065.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d620] width 1920 pitch 7680 (/4 1920)
>[632065.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4826030]
>[632065.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4826030] width 1920 pitch 7680 (/4 1920)
>[632065.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5370e50]
>[632065.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5370e50] width 1920 pitch 7680 (/4 1920)
>[632065.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3032e60]
>[632065.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3032e60] width 1920 pitch 7680 (/4 1920)
>[632065.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830f60]
>[632065.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830f60] width 1920 pitch 7680 (/4 1920)
>[632065.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30159e0]
>[632065.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30159e0] width 1920 pitch 7680 (/4 1920)
>[632065.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fe800]
>[632065.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fe800] width 1920 pitch 7680 (/4 1920)
>[632065.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535b740]
>[632065.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535b740] width 1920 pitch 7680 (/4 1920)
>[632065.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52768d0]
>[632065.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52768d0] width 1920 pitch 7680 (/4 1920)
>[632066.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x402e5e0]
>[632066.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x402e5e0] width 1920 pitch 7680 (/4 1920)
>[632066.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd0660]
>[632066.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd0660] width 1920 pitch 7680 (/4 1920)
>[632066.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4910be0]
>[632066.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4910be0] width 1920 pitch 7680 (/4 1920)
>[632067.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfea20]
>[632067.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfea20] width 1920 pitch 7680 (/4 1920)
>[632067.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb900]
>[632067.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb900] width 1920 pitch 7680 (/4 1920)
>[632067.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eac40]
>[632067.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eac40] width 1920 pitch 7680 (/4 1920)
>[632067.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x394af20]
>[632067.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x394af20] width 1920 pitch 7680 (/4 1920)
>[632067.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b39300]
>[632067.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b39300] width 1920 pitch 7680 (/4 1920)
>[632067.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ca7ff0]
>[632067.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ca7ff0] width 1920 pitch 7680 (/4 1920)
>[632067.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ecea30]
>[632067.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ecea30] width 1920 pitch 7680 (/4 1920)
>[632068.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e97210]
>[632068.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e97210] width 1920 pitch 7680 (/4 1920)
>[632068.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403a810]
>[632068.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403a810] width 1920 pitch 7680 (/4 1920)
>[632068.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x615a1c0]
>[632068.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x615a1c0] width 1920 pitch 7680 (/4 1920)
>[632068.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2bd60]
>[632068.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2bd60] width 1920 pitch 7680 (/4 1920)
>[632068.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b7d590]
>[632068.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b7d590] width 1920 pitch 7680 (/4 1920)
>[632069.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5071bf0]
>[632069.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5071bf0] width 1920 pitch 7680 (/4 1920)
>[632070.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5030980]
>[632070.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5030980] width 1920 pitch 7680 (/4 1920)
>[632070.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca7d0]
>[632070.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca7d0] width 1920 pitch 7680 (/4 1920)
>[632070.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632070.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632070.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca7d0]
>[632070.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca7d0] width 1920 pitch 7680 (/4 1920)
>[632070.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632070.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632070.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ca7d0]
>[632070.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ca7d0] width 1920 pitch 7680 (/4 1920)
>[632070.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632070.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632081.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632081.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632082.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2817af0]
>[632082.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2817af0] width 1920 pitch 7680 (/4 1920)
>[632085.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f22c90]
>[632085.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f22c90] width 1920 pitch 7680 (/4 1920)
>[632085.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[632085.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[632085.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019240]
>[632085.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019240] width 1920 pitch 7680 (/4 1920)
>[632085.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[632085.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[632085.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019240]
>[632085.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019240] width 1920 pitch 7680 (/4 1920)
>[632085.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[632085.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[632085.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019240]
>[632086.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019240] width 1920 pitch 7680 (/4 1920)
>[632086.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[632086.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[632086.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de83c0]
>[632086.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de83c0] width 1920 pitch 7680 (/4 1920)
>[632086.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5ae0]
>[632086.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5ae0] width 1920 pitch 7680 (/4 1920)
>[632086.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1e000]
>[632086.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1e000] width 1920 pitch 7680 (/4 1920)
>[632087.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35310]
>[632087.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35310] width 1920 pitch 7680 (/4 1920)
>[632087.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e7d870]
>[632087.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e7d870] width 1920 pitch 7680 (/4 1920)
>[632087.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38850]
>[632087.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38850] width 1920 pitch 7680 (/4 1920)
>[632087.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35310]
>[632087.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35310] width 1920 pitch 7680 (/4 1920)
>[632087.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c38850]
>[632087.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c38850] width 1920 pitch 7680 (/4 1920)
>[632087.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35310]
>[632087.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35310] width 1920 pitch 7680 (/4 1920)
>[632087.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3017c30]
>[632087.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3017c30] width 1920 pitch 7680 (/4 1920)
>[632087.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35310]
>[632087.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35310] width 1920 pitch 7680 (/4 1920)
>[632087.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d782e0]
>[632087.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d782e0] width 1920 pitch 7680 (/4 1920)
>[632087.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c6c0]
>[632087.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c6c0] width 1920 pitch 7680 (/4 1920)
>[632087.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[632087.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[632087.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3c1a0]
>[632087.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3c1a0] width 1920 pitch 7680 (/4 1920)
>[632087.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[632088.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[632088.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7a70]
>[632088.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7a70] width 1920 pitch 7680 (/4 1920)
>[632088.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309f2d0]
>[632088.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309f2d0] width 1920 pitch 7680 (/4 1920)
>[632088.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7a70]
>[632088.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7a70] width 1920 pitch 7680 (/4 1920)
>[632089.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3159640]
>[632089.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3159640] width 1920 pitch 7680 (/4 1920)
>[632089.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[632089.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[632089.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3159640]
>[632089.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3159640] width 1920 pitch 7680 (/4 1920)
>[632089.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f559f0]
>[632089.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f559f0] width 1920 pitch 7680 (/4 1920)
>[632089.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933c80]
>[632089.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933c80] width 1920 pitch 7680 (/4 1920)
>[632096.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d6f3f0]
>[632096.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d6f3f0] width 1920 pitch 7680 (/4 1920)
>[632109.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632109.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632109.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632109.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632109.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632110.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632110.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632110.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632110.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632110.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632110.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632110.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632110.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632110.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632110.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632110.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632110.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632110.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632110.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632110.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632110.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3940310]
>[632110.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3940310] width 1920 pitch 7680 (/4 1920)
>[632110.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632110.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632111.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[632111.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[632111.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26540]
>[632111.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26540] width 1920 pitch 7680 (/4 1920)
>[632112.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c5d50]
>[632112.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c5d50] width 1920 pitch 7680 (/4 1920)
>[632112.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[632112.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[632112.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062740]
>[632112.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062740] width 1920 pitch 7680 (/4 1920)
>[632112.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[632112.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[632112.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062740]
>[632112.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062740] width 1920 pitch 7680 (/4 1920)
>[632112.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[632112.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[632112.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c5d50]
>[632112.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c5d50] width 1920 pitch 7680 (/4 1920)
>[632112.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[632112.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[632112.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c5d50]
>[632112.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c5d50] width 1920 pitch 7680 (/4 1920)
>[632112.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[632112.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[632112.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ae0130]
>[632112.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ae0130] width 1920 pitch 7680 (/4 1920)
>[632112.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[632112.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[632113.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632113.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632113.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632113.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632113.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632113.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632113.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632113.569] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632113.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632113.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[632113.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[632113.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632113.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632113.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632113.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632113.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632113.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632113.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632113.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29503b0]
>[632113.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29503b0] width 1920 pitch 7680 (/4 1920)
>[632114.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba7fb0]
>[632114.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba7fb0] width 1920 pitch 7680 (/4 1920)
>[632114.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6af70]
>[632114.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6af70] width 1920 pitch 7680 (/4 1920)
>[632114.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a700a0]
>[632114.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a700a0] width 1920 pitch 7680 (/4 1920)
>[632114.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c6af70]
>[632114.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c6af70] width 1920 pitch 7680 (/4 1920)
>[632114.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a700a0]
>[632114.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a700a0] width 1920 pitch 7680 (/4 1920)
>[632114.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2980]
>[632114.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2980] width 1920 pitch 7680 (/4 1920)
>[632114.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eeba60]
>[632114.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eeba60] width 1920 pitch 7680 (/4 1920)
>[632115.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd2980]
>[632115.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd2980] width 1920 pitch 7680 (/4 1920)
>[632115.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eeba60]
>[632115.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eeba60] width 1920 pitch 7680 (/4 1920)
>[632115.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62aa670]
>[632115.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62aa670] width 1920 pitch 7680 (/4 1920)
>[632115.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2982c40]
>[632115.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2982c40] width 1920 pitch 7680 (/4 1920)
>[632115.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28857e0]
>[632115.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28857e0] width 1920 pitch 7680 (/4 1920)
>[632115.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a048a0]
>[632115.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a048a0] width 1920 pitch 7680 (/4 1920)
>[632116.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28857e0]
>[632116.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28857e0] width 1920 pitch 7680 (/4 1920)
>[632116.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b80f60]
>[632116.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b80f60] width 1920 pitch 7680 (/4 1920)
>[632116.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31008e0]
>[632116.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31008e0] width 1920 pitch 7680 (/4 1920)
>[632117.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cfb40]
>[632117.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cfb40] width 1920 pitch 7680 (/4 1920)
>[632117.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4981070]
>[632117.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4981070] width 1920 pitch 7680 (/4 1920)
>[632118.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2477110]
>[632118.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2477110] width 1920 pitch 7680 (/4 1920)
>[632118.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbb090]
>[632118.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbb090] width 1920 pitch 7680 (/4 1920)
>[632118.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c28e0]
>[632118.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c28e0] width 1920 pitch 7680 (/4 1920)
>[632118.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76db0]
>[632118.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76db0] width 1920 pitch 7680 (/4 1920)
>[632118.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c28e0]
>[632118.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c28e0] width 1920 pitch 7680 (/4 1920)
>[632118.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b76db0]
>[632118.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b76db0] width 1920 pitch 7680 (/4 1920)
>[632118.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c28e0]
>[632118.786] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c28e0] width 1920 pitch 7680 (/4 1920)
>[632118.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da26d0]
>[632118.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da26d0] width 1920 pitch 7680 (/4 1920)
>[632118.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c28e0]
>[632118.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c28e0] width 1920 pitch 7680 (/4 1920)
>[632120.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9c3c0]
>[632120.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9c3c0] width 1920 pitch 7680 (/4 1920)
>[632122.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083140]
>[632122.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083140] width 1920 pitch 7680 (/4 1920)
>[632122.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9c3c0]
>[632122.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9c3c0] width 1920 pitch 7680 (/4 1920)
>[632122.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9c3c0]
>[632122.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9c3c0] width 1920 pitch 7680 (/4 1920)
>[632122.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a21320]
>[632122.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a21320] width 1920 pitch 7680 (/4 1920)
>[632122.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7afb0]
>[632122.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7afb0] width 1920 pitch 7680 (/4 1920)
>[632124.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62da170]
>[632124.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62da170] width 1920 pitch 7680 (/4 1920)
>[632124.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c810e0]
>[632124.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c810e0] width 1920 pitch 7680 (/4 1920)
>[632124.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083140]
>[632124.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083140] width 1920 pitch 7680 (/4 1920)
>[632124.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c810e0]
>[632124.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c810e0] width 1920 pitch 7680 (/4 1920)
>[632124.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083140]
>[632124.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083140] width 1920 pitch 7680 (/4 1920)
>[632124.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c810e0]
>[632124.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c810e0] width 1920 pitch 7680 (/4 1920)
>[632124.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a1e50]
>[632124.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a1e50] width 1920 pitch 7680 (/4 1920)
>[632124.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c810e0]
>[632124.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c810e0] width 1920 pitch 7680 (/4 1920)
>[632124.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a1e50]
>[632124.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a1e50] width 1920 pitch 7680 (/4 1920)
>[632124.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c810e0]
>[632124.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c810e0] width 1920 pitch 7680 (/4 1920)
>[632124.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcb5a0]
>[632124.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcb5a0] width 1920 pitch 7680 (/4 1920)
>[632124.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b331d0]
>[632124.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b331d0] width 1920 pitch 7680 (/4 1920)
>[632124.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bcb5a0]
>[632124.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bcb5a0] width 1920 pitch 7680 (/4 1920)
>[632125.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edcd50]
>[632125.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edcd50] width 1920 pitch 7680 (/4 1920)
>[632125.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486c410]
>[632125.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486c410] width 1920 pitch 7680 (/4 1920)
>[632126.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2562f40]
>[632126.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2562f40] width 1920 pitch 7680 (/4 1920)
>[632135.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632135.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6224440]
>[632135.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6224440] width 1920 pitch 7680 (/4 1920)
>[632135.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632135.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114020]
>[632135.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114020] width 1920 pitch 7680 (/4 1920)
>[632135.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632135.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114020]
>[632135.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114020] width 1920 pitch 7680 (/4 1920)
>[632135.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632135.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25356f0]
>[632135.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25356f0] width 1920 pitch 7680 (/4 1920)
>[632135.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632135.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25356f0]
>[632135.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25356f0] width 1920 pitch 7680 (/4 1920)
>[632135.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632135.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25356f0]
>[632135.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25356f0] width 1920 pitch 7680 (/4 1920)
>[632135.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f0a0]
>[632135.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f0a0] width 1920 pitch 7680 (/4 1920)
>[632136.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114050]
>[632136.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114050] width 1920 pitch 7680 (/4 1920)
>[632137.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e89240]
>[632137.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e89240] width 1920 pitch 7680 (/4 1920)
>[632137.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[632137.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[632141.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4905860]
>[632141.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4905860] width 1920 pitch 7680 (/4 1920)
>[632141.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d370]
>[632141.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d370] width 1920 pitch 7680 (/4 1920)
>[632141.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632141.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d370]
>[632141.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d370] width 1920 pitch 7680 (/4 1920)
>[632141.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632141.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d370]
>[632141.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d370] width 1920 pitch 7680 (/4 1920)
>[632141.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632141.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d370]
>[632141.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d370] width 1920 pitch 7680 (/4 1920)
>[632141.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632141.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d370]
>[632141.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d370] width 1920 pitch 7680 (/4 1920)
>[632141.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632141.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1d370]
>[632141.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1d370] width 1920 pitch 7680 (/4 1920)
>[632141.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632141.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c24910]
>[632141.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c24910] width 1920 pitch 7680 (/4 1920)
>[632141.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29eee60]
>[632141.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29eee60] width 1920 pitch 7680 (/4 1920)
>[632142.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d870]
>[632142.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d870] width 1920 pitch 7680 (/4 1920)
>[632142.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497e0f0]
>[632142.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497e0f0] width 1920 pitch 7680 (/4 1920)
>[632142.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e9f0]
>[632142.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e9f0] width 1920 pitch 7680 (/4 1920)
>[632142.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024f60]
>[632142.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024f60] width 1920 pitch 7680 (/4 1920)
>[632142.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b510]
>[632142.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b510] width 1920 pitch 7680 (/4 1920)
>[632142.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024f60]
>[632142.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024f60] width 1920 pitch 7680 (/4 1920)
>[632142.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b510]
>[632142.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b510] width 1920 pitch 7680 (/4 1920)
>[632142.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024f60]
>[632143.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024f60] width 1920 pitch 7680 (/4 1920)
>[632143.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b510]
>[632143.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b510] width 1920 pitch 7680 (/4 1920)
>[632143.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024f60]
>[632143.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024f60] width 1920 pitch 7680 (/4 1920)
>[632143.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b510]
>[632143.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b510] width 1920 pitch 7680 (/4 1920)
>[632143.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024f60]
>[632143.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024f60] width 1920 pitch 7680 (/4 1920)
>[632143.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398b510]
>[632143.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398b510] width 1920 pitch 7680 (/4 1920)
>[632143.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4024f60]
>[632143.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4024f60] width 1920 pitch 7680 (/4 1920)
>[632143.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4019240]
>[632143.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4019240] width 1920 pitch 7680 (/4 1920)
>[632144.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632144.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632144.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[632144.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[632144.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[632144.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[632145.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d750]
>[632145.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d750] width 1920 pitch 7680 (/4 1920)
>[632149.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd9370]
>[632149.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd9370] width 1920 pitch 7680 (/4 1920)
>[632149.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08820]
>[632149.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08820] width 1920 pitch 7680 (/4 1920)
>[632149.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e830]
>[632149.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e830] width 1920 pitch 7680 (/4 1920)
>[632156.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8b9a0]
>[632156.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8b9a0] width 1920 pitch 7680 (/4 1920)
>[632253.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e23eb0]
>[632253.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e23eb0] width 1920 pitch 7680 (/4 1920)
>[632254.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e68e30]
>[632254.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e68e30] width 1920 pitch 7680 (/4 1920)
>[632254.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fd7a70]
>[632254.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fd7a70] width 1920 pitch 7680 (/4 1920)
>[632254.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[632254.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[632256.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94db0]
>[632256.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94db0] width 1920 pitch 7680 (/4 1920)
>[632256.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f1cc0]
>[632257.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f1cc0] width 1920 pitch 7680 (/4 1920)
>[632257.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d7b40]
>[632257.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d7b40] width 1920 pitch 7680 (/4 1920)
>[632257.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f1cc0]
>[632257.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f1cc0] width 1920 pitch 7680 (/4 1920)
>[632274.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a21320]
>[632274.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a21320] width 1920 pitch 7680 (/4 1920)
>[632276.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d53f0]
>[632276.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d53f0] width 1920 pitch 7680 (/4 1920)
>[632276.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4905860]
>[632276.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4905860] width 1920 pitch 7680 (/4 1920)
>[632285.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff5f90]
>[632285.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff5f90] width 1920 pitch 7680 (/4 1920)
>[632290.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2a3f0]
>[632291.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2a3f0] width 1920 pitch 7680 (/4 1920)
>[632291.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509cf70]
>[632291.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509cf70] width 1920 pitch 7680 (/4 1920)
>[632305.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632305.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632305.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632305.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255b910]
>[632305.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255b910] width 1920 pitch 7680 (/4 1920)
>[632306.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b4aed0]
>[632306.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b4aed0] width 1920 pitch 7680 (/4 1920)
>[632307.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d94db0]
>[632307.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d94db0] width 1920 pitch 7680 (/4 1920)
>[632309.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632309.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[632309.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[632309.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401c220]
>[632309.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401c220] width 1920 pitch 7680 (/4 1920)
>[632314.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15870]
>[632314.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15870] width 1920 pitch 7680 (/4 1920)
>[632314.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfe370]
>[632314.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfe370] width 1920 pitch 7680 (/4 1920)
>[632314.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15870]
>[632314.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15870] width 1920 pitch 7680 (/4 1920)
>[632314.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfe370]
>[632314.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfe370] width 1920 pitch 7680 (/4 1920)
>[632314.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15870]
>[632314.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15870] width 1920 pitch 7680 (/4 1920)
>[632314.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfe370]
>[632314.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfe370] width 1920 pitch 7680 (/4 1920)
>[632314.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15870]
>[632314.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15870] width 1920 pitch 7680 (/4 1920)
>[632315.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfe370]
>[632315.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfe370] width 1920 pitch 7680 (/4 1920)
>[632315.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15870]
>[632315.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15870] width 1920 pitch 7680 (/4 1920)
>[632315.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bfe370]
>[632315.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bfe370] width 1920 pitch 7680 (/4 1920)
>[632315.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d15870]
>[632315.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d15870] width 1920 pitch 7680 (/4 1920)
>[632315.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[632315.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[632315.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6240]
>[632315.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6240] width 1920 pitch 7680 (/4 1920)
>[632315.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[632315.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[632315.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc6240]
>[632315.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc6240] width 1920 pitch 7680 (/4 1920)
>[632315.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[632315.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[632315.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b0f6d0]
>[632315.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b0f6d0] width 1920 pitch 7680 (/4 1920)
>[632315.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c90a20]
>[632315.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c90a20] width 1920 pitch 7680 (/4 1920)
>[632323.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a4e60]
>[632323.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a4e60] width 1920 pitch 7680 (/4 1920)
>[632327.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c0e30]
>[632327.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c0e30] width 1920 pitch 7680 (/4 1920)
>[632327.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[632327.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[632327.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[632327.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[632327.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f7200]
>[632327.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f7200] width 1920 pitch 7680 (/4 1920)
>[632327.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[632327.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[632336.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d782e0]
>[632336.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d782e0] width 1920 pitch 7680 (/4 1920)
>[632337.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[632337.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[632338.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f08660]
>[632338.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f08660] width 1920 pitch 7680 (/4 1920)
>[632338.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[632338.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[632338.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7380]
>[632338.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7380] width 1920 pitch 7680 (/4 1920)
>[632366.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x624fa30]
>[632366.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x624fa30] width 1920 pitch 7680 (/4 1920)
>[632381.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aa3e90]
>[632381.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aa3e90] width 1920 pitch 7680 (/4 1920)
>[632405.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d09600]
>[632405.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d09600] width 1920 pitch 7680 (/4 1920)
>[632405.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3114ab0]
>[632405.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3114ab0] width 1920 pitch 7680 (/4 1920)
>[632405.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eabcf0]
>[632405.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eabcf0] width 1920 pitch 7680 (/4 1920)
>[632405.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[632405.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[632406.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[632406.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[632407.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[632407.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[632407.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f59e30]
>[632407.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f59e30] width 1920 pitch 7680 (/4 1920)
>[632407.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[632407.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[632416.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cf6f0]
>[632416.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cf6f0] width 1920 pitch 7680 (/4 1920)
>[632416.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29642d0]
>[632416.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29642d0] width 1920 pitch 7680 (/4 1920)
>[632416.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cf6f0]
>[632416.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cf6f0] width 1920 pitch 7680 (/4 1920)
>[632416.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb2250]
>[632416.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb2250] width 1920 pitch 7680 (/4 1920)
>[632441.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2adc2d0]
>[632441.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2adc2d0] width 1920 pitch 7680 (/4 1920)
>[632471.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f7f0]
>[632471.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f7f0] width 1920 pitch 7680 (/4 1920)
>[632486.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632486.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632516.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632516.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632546.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949340]
>[632546.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949340] width 1920 pitch 7680 (/4 1920)
>[632561.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50925c0]
>[632561.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50925c0] width 1920 pitch 7680 (/4 1920)
>[632576.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c5c610]
>[632576.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c5c610] width 1920 pitch 7680 (/4 1920)
>[632624.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283ede0]
>[632624.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283ede0] width 1920 pitch 7680 (/4 1920)
>[632625.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3950590]
>[632625.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3950590] width 1920 pitch 7680 (/4 1920)
>[632625.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486a400]
>[632625.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486a400] width 1920 pitch 7680 (/4 1920)
>[632625.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3950590]
>[632625.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3950590] width 1920 pitch 7680 (/4 1920)
>[632625.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486a400]
>[632625.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486a400] width 1920 pitch 7680 (/4 1920)
>[632625.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3950590]
>[632625.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3950590] width 1920 pitch 7680 (/4 1920)
>[632625.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[632625.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[632625.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f05160]
>[632625.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f05160] width 1920 pitch 7680 (/4 1920)
>[632625.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8cac0]
>[632625.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8cac0] width 1920 pitch 7680 (/4 1920)
>[632626.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082f80]
>[632626.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082f80] width 1920 pitch 7680 (/4 1920)
>[632626.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[632626.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[632626.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082f80]
>[632626.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082f80] width 1920 pitch 7680 (/4 1920)
>[632626.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd6e0]
>[632626.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd6e0] width 1920 pitch 7680 (/4 1920)
>[632626.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d550]
>[632626.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d550] width 1920 pitch 7680 (/4 1920)
>[632628.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[632628.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[632628.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef500]
>[632628.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef500] width 1920 pitch 7680 (/4 1920)
>[632628.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[632628.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[632628.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[632628.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[632628.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd6e0]
>[632628.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd6e0] width 1920 pitch 7680 (/4 1920)
>[632629.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65570]
>[632629.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65570] width 1920 pitch 7680 (/4 1920)
>[632629.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d69d0]
>[632629.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d69d0] width 1920 pitch 7680 (/4 1920)
>[632630.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65570]
>[632630.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65570] width 1920 pitch 7680 (/4 1920)
>[632630.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497c400]
>[632630.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497c400] width 1920 pitch 7680 (/4 1920)
>[632630.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[632630.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[632630.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497c400]
>[632630.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497c400] width 1920 pitch 7680 (/4 1920)
>[632630.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[632630.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[632630.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497c400]
>[632630.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497c400] width 1920 pitch 7680 (/4 1920)
>[632631.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd6e0]
>[632631.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd6e0] width 1920 pitch 7680 (/4 1920)
>[632632.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486a400]
>[632632.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486a400] width 1920 pitch 7680 (/4 1920)
>[632632.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5021fa0]
>[632632.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5021fa0] width 1920 pitch 7680 (/4 1920)
>[632632.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x486a400]
>[632632.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x486a400] width 1920 pitch 7680 (/4 1920)
>[632632.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d8cac0]
>[632632.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d8cac0] width 1920 pitch 7680 (/4 1920)
>[632632.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2973520]
>[632632.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2973520] width 1920 pitch 7680 (/4 1920)
>[632632.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283ede0]
>[632632.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283ede0] width 1920 pitch 7680 (/4 1920)
>[632633.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d65570]
>[632633.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d65570] width 1920 pitch 7680 (/4 1920)
>[632633.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52d69d0]
>[632633.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52d69d0] width 1920 pitch 7680 (/4 1920)
>[632634.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3950590]
>[632634.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3950590] width 1920 pitch 7680 (/4 1920)
>[632634.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251f0c0]
>[632634.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251f0c0] width 1920 pitch 7680 (/4 1920)
>[632635.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38ef500]
>[632635.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38ef500] width 1920 pitch 7680 (/4 1920)
>[632635.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f05160]
>[632635.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f05160] width 1920 pitch 7680 (/4 1920)
>[632636.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535d550]
>[632636.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535d550] width 1920 pitch 7680 (/4 1920)
>[632636.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501eb50]
>[632636.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501eb50] width 1920 pitch 7680 (/4 1920)
>[632636.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086be0]
>[632636.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086be0] width 1920 pitch 7680 (/4 1920)
>[632636.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a040]
>[632636.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a040] width 1920 pitch 7680 (/4 1920)
>[632636.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482d610]
>[632636.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482d610] width 1920 pitch 7680 (/4 1920)
>[632636.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a16130]
>[632637.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a16130] width 1920 pitch 7680 (/4 1920)
>[632637.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497c400]
>[632637.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497c400] width 1920 pitch 7680 (/4 1920)
>[632637.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[632637.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[632637.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[632637.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[632637.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[632637.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[632637.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[632638.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[632638.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[632638.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[632638.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eb780]
>[632638.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eb780] width 1920 pitch 7680 (/4 1920)
>[632638.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e870]
>[632638.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e870] width 1920 pitch 7680 (/4 1920)
>[632638.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd6e0]
>[632638.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd6e0] width 1920 pitch 7680 (/4 1920)
>[632638.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e870]
>[632638.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e870] width 1920 pitch 7680 (/4 1920)
>[632638.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3efd6e0]
>[632638.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3efd6e0] width 1920 pitch 7680 (/4 1920)
>[632666.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bb4fc0]
>[632666.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bb4fc0] width 1920 pitch 7680 (/4 1920)
>[632681.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50958a0]
>[632681.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50958a0] width 1920 pitch 7680 (/4 1920)
>[632696.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[632696.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[632711.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[632711.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[632801.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cf9690]
>[632801.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cf9690] width 1920 pitch 7680 (/4 1920)
>[632816.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5024fe0]
>[632816.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5024fe0] width 1920 pitch 7680 (/4 1920)
>[632981.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2815000]
>[632981.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2815000] width 1920 pitch 7680 (/4 1920)
>[633011.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f05160]
>[633011.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f05160] width 1920 pitch 7680 (/4 1920)
>[633101.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2f030]
>[633101.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2f030] width 1920 pitch 7680 (/4 1920)
>[633116.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b01c40]
>[633116.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b01c40] width 1920 pitch 7680 (/4 1920)
>[633161.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a02610]
>[633161.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a02610] width 1920 pitch 7680 (/4 1920)
>[633176.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38eaf20]
>[633176.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38eaf20] width 1920 pitch 7680 (/4 1920)
>[633236.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a69630]
>[633236.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a69630] width 1920 pitch 7680 (/4 1920)
>[633239.404] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[633239.404] (II) RADEON(0): Using hsync ranges from config file
>[633239.404] (II) RADEON(0): Using vrefresh ranges from config file
>[633239.404] (II) RADEON(0): Printing DDC gathered Modelines:
>[633239.404] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[633239.404] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[633239.404] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[633239.404] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[633239.404] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[633239.404] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[633239.404] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[633239.404] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[633239.404] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[633239.404] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[633239.404] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[633239.404] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[633329.655] (II) RADEON(0): RADEONSaveScreen(2)
>[633329.655] (II) RADEON(0): RADEONSaveScreen(0)
>[672337.820] (II) RADEON(0): RADEONSaveScreen(1)
>[672365.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398aab0]
>[672365.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398aab0] width 1920 pitch 7680 (/4 1920)
>[672404.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507c110]
>[672404.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507c110] width 1920 pitch 7680 (/4 1920)
>[672405.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98f90]
>[672405.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98f90] width 1920 pitch 7680 (/4 1920)
>[672405.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3034710]
>[672405.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3034710] width 1920 pitch 7680 (/4 1920)
>[672405.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a98f90]
>[672405.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a98f90] width 1920 pitch 7680 (/4 1920)
>[672412.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5178a30]
>[672412.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5178a30] width 1920 pitch 7680 (/4 1920)
>[672413.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39454f0]
>[672413.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39454f0] width 1920 pitch 7680 (/4 1920)
>[672432.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39454f0]
>[672432.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39454f0] width 1920 pitch 7680 (/4 1920)
>[672458.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3a970]
>[672458.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3a970] width 1920 pitch 7680 (/4 1920)
>[672473.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39d11b0]
>[672473.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39d11b0] width 1920 pitch 7680 (/4 1920)
>[672488.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506cb20]
>[672488.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506cb20] width 1920 pitch 7680 (/4 1920)
>[672548.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2aa70]
>[672548.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2aa70] width 1920 pitch 7680 (/4 1920)
>[672563.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbf000]
>[672563.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbf000] width 1920 pitch 7680 (/4 1920)
>[672590.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8b60]
>[672590.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8b60] width 1920 pitch 7680 (/4 1920)
>[672590.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672590.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672590.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672590.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672590.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672623.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672623.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672653.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672653.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672728.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672728.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672743.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672743.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672863.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672863.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672878.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672878.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672908.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672908.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[672923.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672923.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672938.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[672938.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[672953.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[672953.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[673013.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[673013.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[673028.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[673028.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[673058.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[673058.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[673073.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[673073.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[673088.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[673088.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[673103.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165df0]
>[673103.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165df0] width 1920 pitch 7680 (/4 1920)
>[673133.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[673133.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[673163.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062190]
>[673163.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062190] width 1920 pitch 7680 (/4 1920)
>[673190.415] (II) RADEON(0): EDID vendor "ACI", prod id 9368
>[673190.415] (II) RADEON(0): Using hsync ranges from config file
>[673190.415] (II) RADEON(0): Using vrefresh ranges from config file
>[673190.415] (II) RADEON(0): Printing DDC gathered Modelines:
>[673190.415] (II) RADEON(0): Modeline "1920x1080"x0.0  148.50  1920 2008 2052 2200  1080 1084 1089 1125 +hsync +vsync (67.5 kHz eP)
>[673190.415] (II) RADEON(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz e)
>[673190.415] (II) RADEON(0): Modeline "800x600"x0.0   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz e)
>[673190.415] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz e)
>[673190.415] (II) RADEON(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz e)
>[673190.415] (II) RADEON(0): Modeline "640x480"x0.0   30.24  640 704 768 864  480 483 486 525 -hsync -vsync (35.0 kHz e)
>[673190.415] (II) RADEON(0): Modeline "640x480"x0.0   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz e)
>[673190.415] (II) RADEON(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1024x768"x0.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1024x768"x0.0   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz e)
>[673190.415] (II) RADEON(0): Modeline "832x624"x0.0   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz e)
>[673190.415] (II) RADEON(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz e)
>[673190.415] (II) RADEON(0): Modeline "800x600"x0.0   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1152x864"x0.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1280x960"x0.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1440x900"x0.0  106.50  1440 1520 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1600x1200"x0.0  162.00  1600 1664 1856 2160  1200 1201 1204 1250 +hsync +vsync (75.0 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1680x1050"x0.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz e)
>[673190.415] (II) RADEON(0): Modeline "1920x1080"x60.0  172.80  1920 2040 2248 2576  1080 1081 1084 1118 -hsync +vsync (67.1 kHz e)
>[673193.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb620]
>[673193.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb620] width 1920 pitch 7680 (/4 1920)
>[673261.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673261.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673281.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d713e0]
>[673281.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d713e0] width 1920 pitch 7680 (/4 1920)
>[673282.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6ef10]
>[673282.125] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6ef10] width 1920 pitch 7680 (/4 1920)
>[673282.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673282.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673282.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673282.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673282.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673283.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673283.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673285.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673285.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673289.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673289.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673289.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673289.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673289.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673289.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673358.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673358.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673373.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e23e0]
>[673373.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e23e0] width 1920 pitch 7680 (/4 1920)
>[673395.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a03c30]
>[673395.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a03c30] width 1920 pitch 7680 (/4 1920)
>[673397.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673397.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673397.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673397.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673398.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673398.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673403.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673403.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673433.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673433.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673448.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673448.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673457.973] (II) config/udev: removing device PIXART USB OPTICAL MOUSE
>[673457.973] (II) evdev: PIXART USB OPTICAL MOUSE: Close
>[673457.973] (II) UnloadModule: "evdev"
>[673463.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673463.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673478.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673478.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673523.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673523.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673538.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673538.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673583.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673583.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673598.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673598.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673613.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673613.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673628.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673628.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673643.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673643.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673658.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673658.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673673.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673673.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673688.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673688.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673703.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673703.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673718.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673718.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673733.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673733.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673748.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310e950]
>[673748.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310e950] width 1920 pitch 7680 (/4 1920)
>[673763.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310e950]
>[673763.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310e950] width 1920 pitch 7680 (/4 1920)
>[673778.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310e950]
>[673778.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310e950] width 1920 pitch 7680 (/4 1920)
>[673793.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673793.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673808.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310e950]
>[673808.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310e950] width 1920 pitch 7680 (/4 1920)
>[673823.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673823.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673838.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673838.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673853.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673853.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673868.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673868.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673883.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673883.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673903.168] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/mouse1)
>[673903.168] (II) No input driver specified, ignoring this device.
>[673903.168] (II) This device may have been added with another device file.
>[673903.168] (II) config/udev: Adding input device PIXART USB OPTICAL MOUSE (/dev/input/event14)
>[673903.168] (**) PIXART USB OPTICAL MOUSE: Applying InputClass "evdev pointer catchall"
>[673903.168] (II) Using input driver 'evdev' for 'PIXART USB OPTICAL MOUSE'
>[673903.168] 	Option "XkbRules" "evdev"
>[673903.168] 	Option "XkbModel" "evdev"
>[673903.168] 	Option "XkbLayout" "us"
>[673903.168] 	Option "_source" "server/udev"
>[673903.168] 	Option "name" "PIXART USB OPTICAL MOUSE"
>[673903.168] 	Option "path" "/dev/input/event14"
>[673903.168] 	Option "device" "/dev/input/event14"
>[673903.168] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input53/event14"
>[673903.168] 	Option "driver" "evdev"
>[673903.168] (**) PIXART USB OPTICAL MOUSE: always reports core events
>[673903.168] (**) evdev: PIXART USB OPTICAL MOUSE: Device: "/dev/input/event14"
>[673903.168] (--) evdev: PIXART USB OPTICAL MOUSE: Vendor 0x93a Product 0x2510
>[673903.168] (--) evdev: PIXART USB OPTICAL MOUSE: Found 3 mouse buttons
>[673903.168] (--) evdev: PIXART USB OPTICAL MOUSE: Found scroll wheel(s)
>[673903.168] (--) evdev: PIXART USB OPTICAL MOUSE: Found relative axes
>[673903.168] (--) evdev: PIXART USB OPTICAL MOUSE: Found x and y relative axes
>[673903.168] (II) evdev: PIXART USB OPTICAL MOUSE: Configuring as mouse
>[673903.168] (II) evdev: PIXART USB OPTICAL MOUSE: Adding scrollwheel support
>[673903.168] (**) evdev: PIXART USB OPTICAL MOUSE: YAxisMapping: buttons 4 and 5
>[673903.168] (**) evdev: PIXART USB OPTICAL MOUSE: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[673903.168] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1.2/2-1.1.2:1.0/input/input53/event14"
>[673903.168] (II) XINPUT: Adding extended input device "PIXART USB OPTICAL MOUSE" (type: MOUSE, id 10)
>[673903.168] (II) evdev: PIXART USB OPTICAL MOUSE: initialized for relative axes.
>[673903.169] (**) PIXART USB OPTICAL MOUSE: (accel) keeping acceleration scheme 1
>[673903.169] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration profile 0
>[673903.169] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration factor: 2.000
>[673903.169] (**) PIXART USB OPTICAL MOUSE: (accel) acceleration threshold: 4
>[673906.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[673906.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[673907.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310e950]
>[673907.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310e950] width 1920 pitch 7680 (/4 1920)
>[673908.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[673908.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[673908.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ba240]
>[673908.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ba240] width 1920 pitch 7680 (/4 1920)
>[673909.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c7120]
>[673909.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c7120] width 1920 pitch 7680 (/4 1920)
>[673909.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2889d10]
>[673909.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2889d10] width 1920 pitch 7680 (/4 1920)
>[673909.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39e3b40]
>[673909.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39e3b40] width 1920 pitch 7680 (/4 1920)
>[673909.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39f26d0]
>[673909.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39f26d0] width 1920 pitch 7680 (/4 1920)
>[673913.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbc00]
>[673913.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbc00] width 1920 pitch 7680 (/4 1920)
>[673928.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d7b0]
>[673928.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d7b0] width 1920 pitch 7680 (/4 1920)
>[673943.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbc00]
>[673943.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbc00] width 1920 pitch 7680 (/4 1920)
>[673958.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[673958.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[673973.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4911580]
>[673973.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4911580] width 1920 pitch 7680 (/4 1920)
>[674003.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbc00]
>[674003.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbc00] width 1920 pitch 7680 (/4 1920)
>[674018.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fdbc00]
>[674018.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fdbc00] width 1920 pitch 7680 (/4 1920)
>[674033.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d7b0]
>[674033.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d7b0] width 1920 pitch 7680 (/4 1920)
>[674048.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[674048.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[674078.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489c5d0]
>[674078.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489c5d0] width 1920 pitch 7680 (/4 1920)
>[674093.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e31f70]
>[674093.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e31f70] width 1920 pitch 7680 (/4 1920)
>[674108.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4911580]
>[674108.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4911580] width 1920 pitch 7680 (/4 1920)
>[674138.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489c5d0]
>[674138.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489c5d0] width 1920 pitch 7680 (/4 1920)
>[674153.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b75aa0]
>[674153.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b75aa0] width 1920 pitch 7680 (/4 1920)
>[674168.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da9490]
>[674168.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da9490] width 1920 pitch 7680 (/4 1920)
>[674183.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6288f60]
>[674183.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6288f60] width 1920 pitch 7680 (/4 1920)
>[674198.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bff900]
>[674198.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bff900] width 1920 pitch 7680 (/4 1920)
>[674228.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2819a90]
>[674228.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2819a90] width 1920 pitch 7680 (/4 1920)
>[674243.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5277bf0]
>[674243.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5277bf0] width 1920 pitch 7680 (/4 1920)
>[674258.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055790]
>[674258.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055790] width 1920 pitch 7680 (/4 1920)
>[674273.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f59e30]
>[674273.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f59e30] width 1920 pitch 7680 (/4 1920)
>[674288.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d100]
>[674288.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d100] width 1920 pitch 7680 (/4 1920)
>[674303.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008b60]
>[674303.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008b60] width 1920 pitch 7680 (/4 1920)
>[674318.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508e270]
>[674318.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508e270] width 1920 pitch 7680 (/4 1920)
>[674333.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd6d10]
>[674333.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd6d10] width 1920 pitch 7680 (/4 1920)
>[674348.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d52880]
>[674348.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d52880] width 1920 pitch 7680 (/4 1920)
>[674363.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c6390]
>[674363.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c6390] width 1920 pitch 7680 (/4 1920)
>[674378.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4710]
>[674378.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4710] width 1920 pitch 7680 (/4 1920)
>[674393.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29dfd20]
>[674393.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29dfd20] width 1920 pitch 7680 (/4 1920)
>[674408.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0f7f0]
>[674408.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0f7f0] width 1920 pitch 7680 (/4 1920)
>[674438.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29acc30]
>[674438.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29acc30] width 1920 pitch 7680 (/4 1920)
>[674453.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[674453.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[674573.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ed20]
>[674573.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ed20] width 1920 pitch 7680 (/4 1920)
>[674588.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[674588.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[674593.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674593.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674593.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dad1f0]
>[674593.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dad1f0] width 1920 pitch 7680 (/4 1920)
>[674593.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a21e60]
>[674593.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a21e60] width 1920 pitch 7680 (/4 1920)
>[674593.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dad1f0]
>[674593.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dad1f0] width 1920 pitch 7680 (/4 1920)
>[674593.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a21e60]
>[674593.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a21e60] width 1920 pitch 7680 (/4 1920)
>[674593.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dad1f0]
>[674593.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dad1f0] width 1920 pitch 7680 (/4 1920)
>[674593.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6d8a0]
>[674593.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6d8a0] width 1920 pitch 7680 (/4 1920)
>[674593.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674593.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674593.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dad1f0]
>[674593.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dad1f0] width 1920 pitch 7680 (/4 1920)
>[674593.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fc2db0]
>[674593.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fc2db0] width 1920 pitch 7680 (/4 1920)
>[674593.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb6d80]
>[674593.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb6d80] width 1920 pitch 7680 (/4 1920)
>[674593.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a52500]
>[674593.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a52500] width 1920 pitch 7680 (/4 1920)
>[674593.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cb6d80]
>[674593.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cb6d80] width 1920 pitch 7680 (/4 1920)
>[674593.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2558870]
>[674593.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2558870] width 1920 pitch 7680 (/4 1920)
>[674597.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5020e10]
>[674597.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5020e10] width 1920 pitch 7680 (/4 1920)
>[674597.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674597.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674597.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5020e10]
>[674597.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5020e10] width 1920 pitch 7680 (/4 1920)
>[674597.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674597.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674597.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5020e10]
>[674597.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5020e10] width 1920 pitch 7680 (/4 1920)
>[674597.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674597.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674597.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674597.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674597.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674597.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674597.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674597.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674597.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674597.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674597.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674597.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674597.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674597.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674597.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674597.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674597.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674597.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674598.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674598.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674598.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674598.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674598.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674598.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc8770]
>[674598.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc8770] width 1920 pitch 7680 (/4 1920)
>[674598.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e57050]
>[674598.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e57050] width 1920 pitch 7680 (/4 1920)
>[674618.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d24ef0]
>[674618.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d24ef0] width 1920 pitch 7680 (/4 1920)
>[674633.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d24ef0]
>[674633.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d24ef0] width 1920 pitch 7680 (/4 1920)
>[674663.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fec6a0]
>[674663.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fec6a0] width 1920 pitch 7680 (/4 1920)
>[674678.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4029470]
>[674678.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4029470] width 1920 pitch 7680 (/4 1920)
>[674723.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ffcf0]
>[674723.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ffcf0] width 1920 pitch 7680 (/4 1920)
>[674738.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4029470]
>[674738.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4029470] width 1920 pitch 7680 (/4 1920)
>[674753.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39109c0]
>[674753.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39109c0] width 1920 pitch 7680 (/4 1920)
>[674768.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d40210]
>[674768.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d40210] width 1920 pitch 7680 (/4 1920)
>[674783.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e53a10]
>[674783.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e53a10] width 1920 pitch 7680 (/4 1920)
>[674813.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a71030]
>[674813.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a71030] width 1920 pitch 7680 (/4 1920)
>[674828.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c43a40]
>[674828.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c43a40] width 1920 pitch 7680 (/4 1920)
>[674843.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a82e0]
>[674843.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a82e0] width 1920 pitch 7680 (/4 1920)
>[674933.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6293150]
>[674933.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6293150] width 1920 pitch 7680 (/4 1920)
>[674948.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[674948.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[674978.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cf10d0]
>[674978.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cf10d0] width 1920 pitch 7680 (/4 1920)
>[674993.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29834d0]
>[674993.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29834d0] width 1920 pitch 7680 (/4 1920)
>[675068.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e7b850]
>[675068.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e7b850] width 1920 pitch 7680 (/4 1920)
>[675083.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30be720]
>[675083.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30be720] width 1920 pitch 7680 (/4 1920)
>[675098.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a4460]
>[675098.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a4460] width 1920 pitch 7680 (/4 1920)
>[675113.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7da20]
>[675113.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7da20] width 1920 pitch 7680 (/4 1920)
>[675233.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c2be0]
>[675233.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c2be0] width 1920 pitch 7680 (/4 1920)
>[675248.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2986810]
>[675248.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2986810] width 1920 pitch 7680 (/4 1920)
>[675473.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc94c0]
>[675473.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc94c0] width 1920 pitch 7680 (/4 1920)
>[675488.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294cac0]
>[675488.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294cac0] width 1920 pitch 7680 (/4 1920)
>[675503.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dc94c0]
>[675503.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dc94c0] width 1920 pitch 7680 (/4 1920)
>[675518.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294cac0]
>[675518.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294cac0] width 1920 pitch 7680 (/4 1920)
>[675585.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1c760]
>[675585.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1c760] width 1920 pitch 7680 (/4 1920)
>[675585.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c1730]
>[675585.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c1730] width 1920 pitch 7680 (/4 1920)
>[675623.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48882b0]
>[675623.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48882b0] width 1920 pitch 7680 (/4 1920)
>[675638.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294cac0]
>[675638.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294cac0] width 1920 pitch 7680 (/4 1920)
>[675653.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ccaba0]
>[675653.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ccaba0] width 1920 pitch 7680 (/4 1920)
>[675668.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294cac0]
>[675668.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294cac0] width 1920 pitch 7680 (/4 1920)
>[675683.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6293150]
>[675683.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6293150] width 1920 pitch 7680 (/4 1920)
>[675698.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x294cac0]
>[675698.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x294cac0] width 1920 pitch 7680 (/4 1920)
>[675788.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2972c70]
>[675788.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2972c70] width 1920 pitch 7680 (/4 1920)
>[675818.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927750]
>[675818.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927750] width 1920 pitch 7680 (/4 1920)
>[676043.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927750]
>[676043.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927750] width 1920 pitch 7680 (/4 1920)
>[676058.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac230]
>[676058.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac230] width 1920 pitch 7680 (/4 1920)
>[676073.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac230]
>[676073.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac230] width 1920 pitch 7680 (/4 1920)
>[676074.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403dc70]
>[676074.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403dc70] width 1920 pitch 7680 (/4 1920)
>[676074.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481a200]
>[676074.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481a200] width 1920 pitch 7680 (/4 1920)
>[676074.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38d01f0]
>[676074.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38d01f0] width 1920 pitch 7680 (/4 1920)
>[676148.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a7e830]
>[676148.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a7e830] width 1920 pitch 7680 (/4 1920)
>[676163.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f6e0d0]
>[676163.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f6e0d0] width 1920 pitch 7680 (/4 1920)
>[676167.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cee80]
>[676167.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cee80] width 1920 pitch 7680 (/4 1920)
>[676168.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[676168.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[676168.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fa700]
>[676168.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fa700] width 1920 pitch 7680 (/4 1920)
>[676168.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d0f4d0]
>[676168.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d0f4d0] width 1920 pitch 7680 (/4 1920)
>[676187.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676187.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676188.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2962fd0]
>[676188.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2962fd0] width 1920 pitch 7680 (/4 1920)
>[676189.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676189.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676189.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48261e0]
>[676189.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48261e0] width 1920 pitch 7680 (/4 1920)
>[676189.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd22f0]
>[676189.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd22f0] width 1920 pitch 7680 (/4 1920)
>[676189.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832e00]
>[676189.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832e00] width 1920 pitch 7680 (/4 1920)
>[676189.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dd22f0]
>[676189.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dd22f0] width 1920 pitch 7680 (/4 1920)
>[676201.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b2bf0]
>[676201.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b2bf0] width 1920 pitch 7680 (/4 1920)
>[676204.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.359] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676204.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[676204.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[676204.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61efe70]
>[676204.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61efe70] width 1920 pitch 7680 (/4 1920)
>[676208.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48fad00]
>[676208.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48fad00] width 1920 pitch 7680 (/4 1920)
>[676208.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4929dc0]
>[676208.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4929dc0] width 1920 pitch 7680 (/4 1920)
>[676208.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4929dc0]
>[676208.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4929dc0] width 1920 pitch 7680 (/4 1920)
>[676208.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4929dc0]
>[676208.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4929dc0] width 1920 pitch 7680 (/4 1920)
>[676208.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4929dc0]
>[676208.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4929dc0] width 1920 pitch 7680 (/4 1920)
>[676208.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4929dc0]
>[676208.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4929dc0] width 1920 pitch 7680 (/4 1920)
>[676208.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676208.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4929dc0]
>[676208.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4929dc0] width 1920 pitch 7680 (/4 1920)
>[676208.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676208.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676210.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6250d10]
>[676210.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6250d10] width 1920 pitch 7680 (/4 1920)
>[676211.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[676211.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[676212.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b5d0]
>[676212.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b5d0] width 1920 pitch 7680 (/4 1920)
>[676213.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62507c0]
>[676213.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62507c0] width 1920 pitch 7680 (/4 1920)
>[676213.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b5d0]
>[676213.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b5d0] width 1920 pitch 7680 (/4 1920)
>[676220.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927750]
>[676220.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927750] width 1920 pitch 7680 (/4 1920)
>[676238.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4927750]
>[676238.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4927750] width 1920 pitch 7680 (/4 1920)
>[676253.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b3800]
>[676253.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b3800] width 1920 pitch 7680 (/4 1920)
>[676406.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676406.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676407.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676407.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676407.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676407.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676407.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676407.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676407.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676407.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676407.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676407.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676407.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676407.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676407.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676407.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676407.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676407.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676407.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676407.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676407.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676407.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676408.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676408.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676408.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676408.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676408.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676408.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676410.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676410.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676410.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676410.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676410.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676410.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676410.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676410.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676410.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676410.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676410.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676410.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676410.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676410.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676410.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3077060]
>[676410.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3077060] width 1920 pitch 7680 (/4 1920)
>[676410.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676410.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676413.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676413.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676413.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdde0]
>[676413.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdde0] width 1920 pitch 7680 (/4 1920)
>[676413.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676413.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676413.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afdde0]
>[676413.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afdde0] width 1920 pitch 7680 (/4 1920)
>[676415.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676415.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676417.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676417.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676417.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d1c860]
>[676417.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d1c860] width 1920 pitch 7680 (/4 1920)
>[676418.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d7cf30]
>[676418.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d7cf30] width 1920 pitch 7680 (/4 1920)
>[676419.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676419.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676419.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676419.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676419.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676420.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676420.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676420.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676420.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676420.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676422.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f002b0]
>[676422.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f002b0] width 1920 pitch 7680 (/4 1920)
>[676423.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676423.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676423.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676423.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676423.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676424.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676424.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676424.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d25460]
>[676424.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d25460] width 1920 pitch 7680 (/4 1920)
>[676424.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676424.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676424.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676424.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676424.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676424.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676424.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676424.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676424.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676424.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676433.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2465770]
>[676433.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2465770] width 1920 pitch 7680 (/4 1920)
>[676434.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4997330]
>[676434.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4997330] width 1920 pitch 7680 (/4 1920)
>[676434.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082c10]
>[676434.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082c10] width 1920 pitch 7680 (/4 1920)
>[676434.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676434.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676434.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676434.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676434.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b630]
>[676434.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b630] width 1920 pitch 7680 (/4 1920)
>[676434.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676434.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676434.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b630]
>[676434.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b630] width 1920 pitch 7680 (/4 1920)
>[676434.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676434.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676434.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b630]
>[676434.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b630] width 1920 pitch 7680 (/4 1920)
>[676434.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676434.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676434.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b630]
>[676434.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b630] width 1920 pitch 7680 (/4 1920)
>[676434.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676435.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676435.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b630]
>[676435.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b630] width 1920 pitch 7680 (/4 1920)
>[676435.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676435.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676435.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676435.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676435.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676435.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676435.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676435.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676435.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676435.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676435.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676435.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676435.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676435.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676435.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676435.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676435.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676436.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676436.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676436.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676436.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676436.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676436.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676436.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676436.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676436.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676436.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676436.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676436.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676436.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676436.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676436.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676439.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676439.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676439.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676439.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676439.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676439.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676439.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676439.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676439.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676439.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676439.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676439.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676439.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ec56c0]
>[676439.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ec56c0] width 1920 pitch 7680 (/4 1920)
>[676439.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676439.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676439.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3a910]
>[676439.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3a910] width 1920 pitch 7680 (/4 1920)
>[676439.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2888050]
>[676439.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2888050] width 1920 pitch 7680 (/4 1920)
>[676439.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2887ff0]
>[676439.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2887ff0] width 1920 pitch 7680 (/4 1920)
>[676439.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5280]
>[676439.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5280] width 1920 pitch 7680 (/4 1920)
>[676439.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2887ff0]
>[676439.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2887ff0] width 1920 pitch 7680 (/4 1920)
>[676439.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5280]
>[676439.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5280] width 1920 pitch 7680 (/4 1920)
>[676439.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2887ff0]
>[676440.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2887ff0] width 1920 pitch 7680 (/4 1920)
>[676448.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3a910]
>[676448.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3a910] width 1920 pitch 7680 (/4 1920)
>[676448.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676448.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676457.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3a910]
>[676457.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3a910] width 1920 pitch 7680 (/4 1920)
>[676457.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d76e60]
>[676457.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d76e60] width 1920 pitch 7680 (/4 1920)
>[676457.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628e530]
>[676457.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628e530] width 1920 pitch 7680 (/4 1920)
>[676457.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676457.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676463.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4861fa0]
>[676463.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4861fa0] width 1920 pitch 7680 (/4 1920)
>[676469.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676469.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676474.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c3a70]
>[676474.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c3a70] width 1920 pitch 7680 (/4 1920)
>[676474.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676474.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676474.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676474.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676474.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4986840]
>[676474.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4986840] width 1920 pitch 7680 (/4 1920)
>[676475.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3a910]
>[676475.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3a910] width 1920 pitch 7680 (/4 1920)
>[676475.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676475.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676475.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676475.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676475.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676475.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676492.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e9ce0]
>[676492.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e9ce0] width 1920 pitch 7680 (/4 1920)
>[676492.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f34550]
>[676492.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f34550] width 1920 pitch 7680 (/4 1920)
>[676492.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4860010]
>[676492.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4860010] width 1920 pitch 7680 (/4 1920)
>[676492.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4983150]
>[676492.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4983150] width 1920 pitch 7680 (/4 1920)
>[676492.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f58640]
>[676492.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f58640] width 1920 pitch 7680 (/4 1920)
>[676492.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f58640]
>[676492.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f58640] width 1920 pitch 7680 (/4 1920)
>[676492.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f58640]
>[676492.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f58640] width 1920 pitch 7680 (/4 1920)
>[676492.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676492.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f58640]
>[676492.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f58640] width 1920 pitch 7680 (/4 1920)
>[676492.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063510]
>[676492.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063510] width 1920 pitch 7680 (/4 1920)
>[676493.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28be720]
>[676493.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28be720] width 1920 pitch 7680 (/4 1920)
>[676495.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676495.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676495.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676495.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676495.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676495.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676495.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676495.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676496.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676496.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676496.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676496.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676496.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676496.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676496.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676496.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676496.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676496.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676496.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830d40]
>[676496.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830d40] width 1920 pitch 7680 (/4 1920)
>[676496.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2899390]
>[676496.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2899390] width 1920 pitch 7680 (/4 1920)
>[676504.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49198a0]
>[676504.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49198a0] width 1920 pitch 7680 (/4 1920)
>[676504.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676504.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201b30]
>[676504.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201b30] width 1920 pitch 7680 (/4 1920)
>[676504.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48550d0]
>[676504.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48550d0] width 1920 pitch 7680 (/4 1920)
>[676505.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676505.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a8e00]
>[676505.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a8e00] width 1920 pitch 7680 (/4 1920)
>[676505.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6ce0]
>[676505.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6ce0] width 1920 pitch 7680 (/4 1920)
>[676508.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400b3c0]
>[676508.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400b3c0] width 1920 pitch 7680 (/4 1920)
>[676514.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6230c00]
>[676514.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6230c00] width 1920 pitch 7680 (/4 1920)
>[676514.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28c70]
>[676514.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28c70] width 1920 pitch 7680 (/4 1920)
>[676514.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28c70]
>[676514.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28c70] width 1920 pitch 7680 (/4 1920)
>[676514.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28c70]
>[676514.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28c70] width 1920 pitch 7680 (/4 1920)
>[676514.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28c70]
>[676514.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28c70] width 1920 pitch 7680 (/4 1920)
>[676514.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c28c70]
>[676514.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c28c70] width 1920 pitch 7680 (/4 1920)
>[676514.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201bb0]
>[676514.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201bb0] width 1920 pitch 7680 (/4 1920)
>[676514.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6220c70]
>[676514.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6220c70] width 1920 pitch 7680 (/4 1920)
>[676514.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6201bb0]
>[676514.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6201bb0] width 1920 pitch 7680 (/4 1920)
>[676516.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62458d0]
>[676516.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62458d0] width 1920 pitch 7680 (/4 1920)
>[676516.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d00b0]
>[676516.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d00b0] width 1920 pitch 7680 (/4 1920)
>[676516.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62458c0]
>[676516.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62458c0] width 1920 pitch 7680 (/4 1920)
>[676516.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676516.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676516.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676516.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676516.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676516.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676516.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676516.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676516.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676516.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676516.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676516.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676516.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676517.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676517.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676517.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676517.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676517.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676517.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676517.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676517.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676517.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676517.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676517.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676517.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676517.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676517.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c25ff0]
>[676517.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c25ff0] width 1920 pitch 7680 (/4 1920)
>[676517.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48552c0]
>[676517.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48552c0] width 1920 pitch 7680 (/4 1920)
>[676521.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f34450]
>[676521.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f34450] width 1920 pitch 7680 (/4 1920)
>[676521.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492c050]
>[676521.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492c050] width 1920 pitch 7680 (/4 1920)
>[676521.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2864c50]
>[676521.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2864c50] width 1920 pitch 7680 (/4 1920)
>[676521.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1ac60]
>[676521.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1ac60] width 1920 pitch 7680 (/4 1920)
>[676521.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676521.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676521.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676521.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676521.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x628b630]
>[676521.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x628b630] width 1920 pitch 7680 (/4 1920)
>[676521.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4997330]
>[676521.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4997330] width 1920 pitch 7680 (/4 1920)
>[676521.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676521.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676521.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676521.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676521.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676521.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676521.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964a60]
>[676521.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964a60] width 1920 pitch 7680 (/4 1920)
>[676522.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676522.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676523.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676523.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676523.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd3da0]
>[676523.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd3da0] width 1920 pitch 7680 (/4 1920)
>[676523.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676523.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676523.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd3da0]
>[676523.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd3da0] width 1920 pitch 7680 (/4 1920)
>[676538.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a0d70]
>[676538.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a0d70] width 1920 pitch 7680 (/4 1920)
>[676568.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676568.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676606.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676606.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676607.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676607.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676608.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676608.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676608.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676608.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676608.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00240]
>[676608.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00240] width 1920 pitch 7680 (/4 1920)
>[676623.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00240]
>[676623.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00240] width 1920 pitch 7680 (/4 1920)
>[676623.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676623.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676623.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676623.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676623.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676623.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676703.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6300]
>[676703.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6300] width 1920 pitch 7680 (/4 1920)
>[676718.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676718.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676725.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de6300]
>[676725.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de6300] width 1920 pitch 7680 (/4 1920)
>[676725.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676725.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676725.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676725.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676725.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676725.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676727.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f00240]
>[676727.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f00240] width 1920 pitch 7680 (/4 1920)
>[676727.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676727.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676727.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676727.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676727.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676728.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676768.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676768.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676768.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676769.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676769.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676769.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676770.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676770.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676770.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676770.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676770.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676770.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676786.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676786.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676787.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c18b60]
>[676787.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c18b60] width 1920 pitch 7680 (/4 1920)
>[676787.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676787.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676788.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48414b0]
>[676788.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48414b0] width 1920 pitch 7680 (/4 1920)
>[676796.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3062740]
>[676796.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3062740] width 1920 pitch 7680 (/4 1920)
>[676796.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e6ad0]
>[676796.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e6ad0] width 1920 pitch 7680 (/4 1920)
>[676796.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676796.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676796.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e6ad0]
>[676796.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e6ad0] width 1920 pitch 7680 (/4 1920)
>[676809.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2edbd90]
>[676809.556] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2edbd90] width 1920 pitch 7680 (/4 1920)
>[676809.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fbfe30]
>[676809.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fbfe30] width 1920 pitch 7680 (/4 1920)
>[676809.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2d9e0]
>[676809.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2d9e0] width 1920 pitch 7680 (/4 1920)
>[676809.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b73c60]
>[676809.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b73c60] width 1920 pitch 7680 (/4 1920)
>[676820.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063d10]
>[676820.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063d10] width 1920 pitch 7680 (/4 1920)
>[676820.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934fa0]
>[676820.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934fa0] width 1920 pitch 7680 (/4 1920)
>[676820.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063d10]
>[676820.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063d10] width 1920 pitch 7680 (/4 1920)
>[676820.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934fa0]
>[676820.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934fa0] width 1920 pitch 7680 (/4 1920)
>[676823.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676823.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676825.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f76050]
>[676825.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f76050] width 1920 pitch 7680 (/4 1920)
>[676825.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f76050]
>[676825.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f76050] width 1920 pitch 7680 (/4 1920)
>[676825.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500a2d0]
>[676825.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500a2d0] width 1920 pitch 7680 (/4 1920)
>[676825.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f76050]
>[676825.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f76050] width 1920 pitch 7680 (/4 1920)
>[676828.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676828.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676829.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063d10]
>[676829.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063d10] width 1920 pitch 7680 (/4 1920)
>[676829.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5063d10]
>[676829.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5063d10] width 1920 pitch 7680 (/4 1920)
>[676829.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4918b10]
>[676829.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4918b10] width 1920 pitch 7680 (/4 1920)
>[676830.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4918b10]
>[676830.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4918b10] width 1920 pitch 7680 (/4 1920)
>[676830.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4918b10]
>[676830.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4918b10] width 1920 pitch 7680 (/4 1920)
>[676830.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500a2d0]
>[676830.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500a2d0] width 1920 pitch 7680 (/4 1920)
>[676830.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4918b10]
>[676830.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4918b10] width 1920 pitch 7680 (/4 1920)
>[676832.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676832.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676832.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676832.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676832.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676832.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676832.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676832.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676839.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x288a2d0]
>[676839.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x288a2d0] width 1920 pitch 7680 (/4 1920)
>[676839.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676839.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676840.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500a2d0]
>[676840.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500a2d0] width 1920 pitch 7680 (/4 1920)
>[676840.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4915950]
>[676840.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4915950] width 1920 pitch 7680 (/4 1920)
>[676840.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676840.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676840.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676840.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676840.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676840.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676841.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676841.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676841.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500fc00]
>[676841.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500fc00] width 1920 pitch 7680 (/4 1920)
>[676841.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d19000]
>[676841.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d19000] width 1920 pitch 7680 (/4 1920)
>[676849.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd29b0]
>[676849.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd29b0] width 1920 pitch 7680 (/4 1920)
>[676849.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe1b0]
>[676849.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe1b0] width 1920 pitch 7680 (/4 1920)
>[676849.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676849.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676849.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe1b0]
>[676849.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe1b0] width 1920 pitch 7680 (/4 1920)
>[676852.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676852.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676852.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe1b0]
>[676852.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe1b0] width 1920 pitch 7680 (/4 1920)
>[676852.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe1b0]
>[676852.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe1b0] width 1920 pitch 7680 (/4 1920)
>[676852.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676852.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676853.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676853.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676853.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ff740]
>[676853.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ff740] width 1920 pitch 7680 (/4 1920)
>[676854.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39fe1b0]
>[676854.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39fe1b0] width 1920 pitch 7680 (/4 1920)
>[676854.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d508b0]
>[676854.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d508b0] width 1920 pitch 7680 (/4 1920)
>[676854.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4903380]
>[676854.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4903380] width 1920 pitch 7680 (/4 1920)
>[676860.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d508b0]
>[676860.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d508b0] width 1920 pitch 7680 (/4 1920)
>[676860.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5060840]
>[676860.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5060840] width 1920 pitch 7680 (/4 1920)
>[676860.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6298560]
>[676860.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6298560] width 1920 pitch 7680 (/4 1920)
>[676860.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1cd80]
>[676860.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1cd80] width 1920 pitch 7680 (/4 1920)
>[676863.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5060840]
>[676863.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5060840] width 1920 pitch 7680 (/4 1920)
>[676863.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d508b0]
>[676863.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d508b0] width 1920 pitch 7680 (/4 1920)
>[676863.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d508b0]
>[676863.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d508b0] width 1920 pitch 7680 (/4 1920)
>[676863.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d942d0]
>[676863.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d942d0] width 1920 pitch 7680 (/4 1920)
>[676867.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898cf0]
>[676867.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898cf0] width 1920 pitch 7680 (/4 1920)
>[676868.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d508b0]
>[676868.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d508b0] width 1920 pitch 7680 (/4 1920)
>[676868.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d508b0]
>[676868.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d508b0] width 1920 pitch 7680 (/4 1920)
>[676868.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c1cd80]
>[676868.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c1cd80] width 1920 pitch 7680 (/4 1920)
>[676907.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485aaf0]
>[676907.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485aaf0] width 1920 pitch 7680 (/4 1920)
>[676909.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83130]
>[676909.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83130] width 1920 pitch 7680 (/4 1920)
>[676909.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676909.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676909.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676909.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676909.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676909.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676909.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676909.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676909.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676909.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676909.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676909.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676909.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676909.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676909.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676909.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676909.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676909.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676909.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676909.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676909.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676909.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676909.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676909.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676909.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676910.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676910.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20d60]
>[676910.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20d60] width 1920 pitch 7680 (/4 1920)
>[676910.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c89640]
>[676910.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c89640] width 1920 pitch 7680 (/4 1920)
>[676911.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x491cfd0]
>[676911.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x491cfd0] width 1920 pitch 7680 (/4 1920)
>[676911.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898a30]
>[676911.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898a30] width 1920 pitch 7680 (/4 1920)
>[676911.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898a30]
>[676911.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898a30] width 1920 pitch 7680 (/4 1920)
>[676911.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898a30]
>[676911.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898a30] width 1920 pitch 7680 (/4 1920)
>[676911.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898a30]
>[676911.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898a30] width 1920 pitch 7680 (/4 1920)
>[676911.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898a30]
>[676911.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898a30] width 1920 pitch 7680 (/4 1920)
>[676911.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676911.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2898a30]
>[676911.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2898a30] width 1920 pitch 7680 (/4 1920)
>[676911.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f51190]
>[676911.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f51190] width 1920 pitch 7680 (/4 1920)
>[676912.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b64a0]
>[676912.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b64a0] width 1920 pitch 7680 (/4 1920)
>[676912.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[676912.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[676912.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[676912.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[676912.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29e5f90]
>[676912.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29e5f90] width 1920 pitch 7680 (/4 1920)
>[676912.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933ba0]
>[676912.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933ba0] width 1920 pitch 7680 (/4 1920)
>[676912.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933ba0]
>[676912.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933ba0] width 1920 pitch 7680 (/4 1920)
>[676912.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933ba0]
>[676912.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933ba0] width 1920 pitch 7680 (/4 1920)
>[676912.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676912.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933ba0]
>[676912.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933ba0] width 1920 pitch 7680 (/4 1920)
>[676912.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283f850]
>[676912.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283f850] width 1920 pitch 7680 (/4 1920)
>[676946.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676946.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676946.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676946.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676946.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676946.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676946.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676946.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676946.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676946.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676946.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676947.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676947.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676947.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676947.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676947.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676947.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676947.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676947.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676947.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676947.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676947.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676947.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676947.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676947.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c74e0]
>[676947.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c74e0] width 1920 pitch 7680 (/4 1920)
>[676947.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676947.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676947.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50194a0]
>[676947.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50194a0] width 1920 pitch 7680 (/4 1920)
>[676953.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4829d20]
>[676953.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4829d20] width 1920 pitch 7680 (/4 1920)
>[676955.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30b64a0]
>[676955.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30b64a0] width 1920 pitch 7680 (/4 1920)
>[676955.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676955.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676955.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676955.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2950740]
>[676955.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2950740] width 1920 pitch 7680 (/4 1920)
>[676964.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5062d00]
>[676964.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5062d00] width 1920 pitch 7680 (/4 1920)
>[676965.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48414b0]
>[676965.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48414b0] width 1920 pitch 7680 (/4 1920)
>[676965.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48414b0]
>[676965.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48414b0] width 1920 pitch 7680 (/4 1920)
>[676965.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008c20]
>[676965.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008c20] width 1920 pitch 7680 (/4 1920)
>[676965.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008c20]
>[676965.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008c20] width 1920 pitch 7680 (/4 1920)
>[676965.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008c20]
>[676965.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008c20] width 1920 pitch 7680 (/4 1920)
>[676965.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008c20]
>[676965.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008c20] width 1920 pitch 7680 (/4 1920)
>[676965.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008c20]
>[676965.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008c20] width 1920 pitch 7680 (/4 1920)
>[676965.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676965.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5008c20]
>[676965.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5008c20] width 1920 pitch 7680 (/4 1920)
>[676965.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50981a0]
>[676965.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50981a0] width 1920 pitch 7680 (/4 1920)
>[676966.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676966.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676966.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd7700]
>[676966.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd7700] width 1920 pitch 7680 (/4 1920)
>[676966.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f120]
>[676966.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f120] width 1920 pitch 7680 (/4 1920)
>[676966.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f120]
>[676966.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f120] width 1920 pitch 7680 (/4 1920)
>[676973.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[676973.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[676981.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676981.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676983.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28c94d0]
>[676983.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28c94d0] width 1920 pitch 7680 (/4 1920)
>[676983.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255ec00]
>[676983.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255ec00] width 1920 pitch 7680 (/4 1920)
>[676983.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492d7f0]
>[676983.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492d7f0] width 1920 pitch 7680 (/4 1920)
>[676983.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4829a60]
>[676983.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4829a60] width 1920 pitch 7680 (/4 1920)
>[676986.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676986.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676986.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f120]
>[676986.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f120] width 1920 pitch 7680 (/4 1920)
>[676986.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676986.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676986.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676986.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676986.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30a2f10]
>[676986.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30a2f10] width 1920 pitch 7680 (/4 1920)
>[676986.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[676986.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[676986.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676986.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676986.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676986.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676986.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676986.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676986.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676986.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676986.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676986.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676986.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676986.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f27450]
>[676986.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f27450] width 1920 pitch 7680 (/4 1920)
>[676991.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676991.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676992.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[676992.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[676992.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50194a0]
>[676992.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50194a0] width 1920 pitch 7680 (/4 1920)
>[676992.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490b750]
>[676992.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490b750] width 1920 pitch 7680 (/4 1920)
>[676992.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[676992.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677002.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29304b0]
>[677002.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29304b0] width 1920 pitch 7680 (/4 1920)
>[677003.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677003.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677018.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3969e40]
>[677018.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3969e40] width 1920 pitch 7680 (/4 1920)
>[677146.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677146.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677146.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4986c10]
>[677146.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4986c10] width 1920 pitch 7680 (/4 1920)
>[677146.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4986c10]
>[677146.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4986c10] width 1920 pitch 7680 (/4 1920)
>[677146.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b83d0]
>[677146.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b83d0] width 1920 pitch 7680 (/4 1920)
>[677147.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949550]
>[677147.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949550] width 1920 pitch 7680 (/4 1920)
>[677147.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b83d0]
>[677147.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b83d0] width 1920 pitch 7680 (/4 1920)
>[677147.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949550]
>[677147.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949550] width 1920 pitch 7680 (/4 1920)
>[677147.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b83d0]
>[677147.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b83d0] width 1920 pitch 7680 (/4 1920)
>[677147.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949550]
>[677147.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949550] width 1920 pitch 7680 (/4 1920)
>[677147.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b83d0]
>[677147.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b83d0] width 1920 pitch 7680 (/4 1920)
>[677147.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a2690]
>[677147.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a2690] width 1920 pitch 7680 (/4 1920)
>[677147.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485c7e0]
>[677147.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485c7e0] width 1920 pitch 7680 (/4 1920)
>[677147.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[677147.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[677147.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485c7e0]
>[677147.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485c7e0] width 1920 pitch 7680 (/4 1920)
>[677147.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5055e40]
>[677147.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5055e40] width 1920 pitch 7680 (/4 1920)
>[677147.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677147.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677147.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622cec0]
>[677147.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622cec0] width 1920 pitch 7680 (/4 1920)
>[677153.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949550]
>[677153.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949550] width 1920 pitch 7680 (/4 1920)
>[677168.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622cec0]
>[677168.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622cec0] width 1920 pitch 7680 (/4 1920)
>[677183.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677183.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677198.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a734a0]
>[677198.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a734a0] width 1920 pitch 7680 (/4 1920)
>[677241.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949550]
>[677241.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949550] width 1920 pitch 7680 (/4 1920)
>[677241.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df2e0]
>[677241.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df2e0] width 1920 pitch 7680 (/4 1920)
>[677241.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677241.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677241.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677241.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677258.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677258.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677273.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677273.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677288.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2949550]
>[677288.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2949550] width 1920 pitch 7680 (/4 1920)
>[677303.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490acc0]
>[677303.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490acc0] width 1920 pitch 7680 (/4 1920)
>[677312.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df2e0]
>[677312.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df2e0] width 1920 pitch 7680 (/4 1920)
>[677312.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677312.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677312.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677312.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677312.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677312.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677312.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677312.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677312.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677312.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677312.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677312.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677312.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677312.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677312.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677312.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677312.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677312.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677312.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677312.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677312.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677312.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677312.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677313.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677313.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677313.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677313.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677313.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677313.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29760b0]
>[677313.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29760b0] width 1920 pitch 7680 (/4 1920)
>[677313.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677313.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677313.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677313.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677314.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677314.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677322.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677322.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677322.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a734a0]
>[677322.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a734a0] width 1920 pitch 7680 (/4 1920)
>[677322.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677322.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677322.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a734a0]
>[677322.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a734a0] width 1920 pitch 7680 (/4 1920)
>[677322.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677322.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677322.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a734a0]
>[677322.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a734a0] width 1920 pitch 7680 (/4 1920)
>[677322.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677323.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677323.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a734a0]
>[677323.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a734a0] width 1920 pitch 7680 (/4 1920)
>[677323.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677323.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677323.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677323.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677323.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677323.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677323.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677323.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677323.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677323.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677323.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677323.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677323.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843a00]
>[677323.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843a00] width 1920 pitch 7680 (/4 1920)
>[677323.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677323.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677327.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x490afb0]
>[677327.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x490afb0] width 1920 pitch 7680 (/4 1920)
>[677328.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677328.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677328.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df2e0]
>[677328.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df2e0] width 1920 pitch 7680 (/4 1920)
>[677328.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1c10]
>[677328.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1c10] width 1920 pitch 7680 (/4 1920)
>[677378.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[677378.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[677393.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df2e0]
>[677393.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df2e0] width 1920 pitch 7680 (/4 1920)
>[677408.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[677408.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[677423.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29df2e0]
>[677423.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29df2e0] width 1920 pitch 7680 (/4 1920)
>[677478.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4909d40]
>[677478.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4909d40] width 1920 pitch 7680 (/4 1920)
>[677478.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4909d40]
>[677478.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4909d40] width 1920 pitch 7680 (/4 1920)
>[677478.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2966dc0]
>[677478.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2966dc0] width 1920 pitch 7680 (/4 1920)
>[677478.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[677478.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[677483.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4909d40]
>[677483.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4909d40] width 1920 pitch 7680 (/4 1920)
>[677496.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4909d40]
>[677496.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4909d40] width 1920 pitch 7680 (/4 1920)
>[677496.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa190]
>[677496.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa190] width 1920 pitch 7680 (/4 1920)
>[677496.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f74e0]
>[677496.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f74e0] width 1920 pitch 7680 (/4 1920)
>[677496.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa190]
>[677496.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa190] width 1920 pitch 7680 (/4 1920)
>[677508.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f120]
>[677508.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f120] width 1920 pitch 7680 (/4 1920)
>[677509.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa190]
>[677509.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa190] width 1920 pitch 7680 (/4 1920)
>[677512.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa190]
>[677512.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa190] width 1920 pitch 7680 (/4 1920)
>[677512.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5e90]
>[677512.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5e90] width 1920 pitch 7680 (/4 1920)
>[677512.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30fa190]
>[677512.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30fa190] width 1920 pitch 7680 (/4 1920)
>[677513.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144f90]
>[677513.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144f90] width 1920 pitch 7680 (/4 1920)
>[677514.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7b40]
>[677514.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7b40] width 1920 pitch 7680 (/4 1920)
>[677514.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5e90]
>[677514.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5e90] width 1920 pitch 7680 (/4 1920)
>[677514.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[677514.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[677514.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5e90]
>[677514.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5e90] width 1920 pitch 7680 (/4 1920)
>[677514.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[677514.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[677514.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5e90]
>[677514.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5e90] width 1920 pitch 7680 (/4 1920)
>[677514.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[677514.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[677514.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bc5e90]
>[677514.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bc5e90] width 1920 pitch 7680 (/4 1920)
>[677514.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a646e0]
>[677514.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a646e0] width 1920 pitch 7680 (/4 1920)
>[677514.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8df0]
>[677514.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8df0] width 1920 pitch 7680 (/4 1920)
>[677514.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70740]
>[677514.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70740] width 1920 pitch 7680 (/4 1920)
>[677514.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62a8df0]
>[677514.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62a8df0] width 1920 pitch 7680 (/4 1920)
>[677514.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70740]
>[677514.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70740] width 1920 pitch 7680 (/4 1920)
>[677514.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88560]
>[677514.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88560] width 1920 pitch 7680 (/4 1920)
>[677514.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5083d20]
>[677514.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5083d20] width 1920 pitch 7680 (/4 1920)
>[677514.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[677514.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[677543.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x624c1b0]
>[677543.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x624c1b0] width 1920 pitch 7680 (/4 1920)
>[677558.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8840]
>[677558.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8840] width 1920 pitch 7680 (/4 1920)
>[677559.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5049760]
>[677559.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5049760] width 1920 pitch 7680 (/4 1920)
>[677559.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8840]
>[677559.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8840] width 1920 pitch 7680 (/4 1920)
>[677559.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5049760]
>[677559.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5049760] width 1920 pitch 7680 (/4 1920)
>[677560.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8840]
>[677560.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8840] width 1920 pitch 7680 (/4 1920)
>[677569.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677569.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677569.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677569.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677570.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5049760]
>[677570.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5049760] width 1920 pitch 7680 (/4 1920)
>[677570.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677570.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677570.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5049760]
>[677570.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5049760] width 1920 pitch 7680 (/4 1920)
>[677571.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5049760]
>[677571.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5049760] width 1920 pitch 7680 (/4 1920)
>[677571.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677571.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677571.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677571.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677571.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677571.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677571.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677571.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677571.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677571.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677571.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677571.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677571.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677571.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677571.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a8b0]
>[677571.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a8b0] width 1920 pitch 7680 (/4 1920)
>[677571.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677571.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677571.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a8b0]
>[677571.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a8b0] width 1920 pitch 7680 (/4 1920)
>[677572.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677572.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677573.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2a8b0]
>[677573.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2a8b0] width 1920 pitch 7680 (/4 1920)
>[677581.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677581.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677581.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68290]
>[677581.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68290] width 1920 pitch 7680 (/4 1920)
>[677581.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d4c30]
>[677581.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d4c30] width 1920 pitch 7680 (/4 1920)
>[677581.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68290]
>[677581.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68290] width 1920 pitch 7680 (/4 1920)
>[677584.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677585.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677585.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677585.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677585.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677585.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677585.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677585.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677588.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68290]
>[677588.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68290] width 1920 pitch 7680 (/4 1920)
>[677596.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677596.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677596.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68290]
>[677596.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68290] width 1920 pitch 7680 (/4 1920)
>[677596.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677597.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677597.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68290]
>[677597.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68290] width 1920 pitch 7680 (/4 1920)
>[677603.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677603.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677604.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d68290]
>[677604.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d68290] width 1920 pitch 7680 (/4 1920)
>[677604.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677604.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677604.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677604.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677604.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677604.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677618.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6202af0]
>[677618.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6202af0] width 1920 pitch 7680 (/4 1920)
>[677626.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677626.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677626.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048c00]
>[677626.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048c00] width 1920 pitch 7680 (/4 1920)
>[677626.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62af490]
>[677626.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62af490] width 1920 pitch 7680 (/4 1920)
>[677626.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677626.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677631.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bac20]
>[677631.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bac20] width 1920 pitch 7680 (/4 1920)
>[677632.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f08400]
>[677632.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f08400] width 1920 pitch 7680 (/4 1920)
>[677632.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677632.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677632.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677632.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677633.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677633.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677647.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677647.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677647.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677647.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677647.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d010]
>[677647.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d010] width 1920 pitch 7680 (/4 1920)
>[677648.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677648.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677648.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d2d010]
>[677648.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d2d010] width 1920 pitch 7680 (/4 1920)
>[677663.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c81760]
>[677663.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c81760] width 1920 pitch 7680 (/4 1920)
>[677673.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677673.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677673.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677673.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677673.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9ca30]
>[677673.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9ca30] width 1920 pitch 7680 (/4 1920)
>[677673.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677673.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677678.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677678.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677690.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677690.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677690.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677690.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677690.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2933170]
>[677690.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2933170] width 1920 pitch 7680 (/4 1920)
>[677690.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677690.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677708.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d7f40]
>[677708.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d7f40] width 1920 pitch 7680 (/4 1920)
>[677723.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5011a80]
>[677723.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5011a80] width 1920 pitch 7680 (/4 1920)
>[677745.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30c8b60]
>[677745.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30c8b60] width 1920 pitch 7680 (/4 1920)
>[677753.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507b150]
>[677753.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507b150] width 1920 pitch 7680 (/4 1920)
>[677783.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ddd0]
>[677783.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ddd0] width 1920 pitch 7680 (/4 1920)
>[677798.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677798.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677798.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ddd0]
>[677798.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ddd0] width 1920 pitch 7680 (/4 1920)
>[677798.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38fa750]
>[677798.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38fa750] width 1920 pitch 7680 (/4 1920)
>[677798.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ddd0]
>[677798.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ddd0] width 1920 pitch 7680 (/4 1920)
>[677813.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677813.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677817.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677817.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677817.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x535a870]
>[677817.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x535a870] width 1920 pitch 7680 (/4 1920)
>[677819.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fc5f0]
>[677819.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fc5f0] width 1920 pitch 7680 (/4 1920)
>[677819.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fabfb0]
>[677819.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fabfb0] width 1920 pitch 7680 (/4 1920)
>[677819.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fc5f0]
>[677819.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fc5f0] width 1920 pitch 7680 (/4 1920)
>[677828.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677828.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677836.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677836.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677836.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9f3f0]
>[677836.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9f3f0] width 1920 pitch 7680 (/4 1920)
>[677836.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30bac70]
>[677836.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30bac70] width 1920 pitch 7680 (/4 1920)
>[677836.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e9f3f0]
>[677836.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e9f3f0] width 1920 pitch 7680 (/4 1920)
>[677842.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677842.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677842.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0400]
>[677842.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0400] width 1920 pitch 7680 (/4 1920)
>[677842.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677842.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677842.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677842.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677843.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0400]
>[677843.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0400] width 1920 pitch 7680 (/4 1920)
>[677854.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677854.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677854.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0400]
>[677854.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0400] width 1920 pitch 7680 (/4 1920)
>[677854.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677854.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677854.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2de0400]
>[677854.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2de0400] width 1920 pitch 7680 (/4 1920)
>[677885.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02d20]
>[677885.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02d20] width 1920 pitch 7680 (/4 1920)
>[677885.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ba480]
>[677885.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ba480] width 1920 pitch 7680 (/4 1920)
>[677885.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489bc40]
>[677885.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489bc40] width 1920 pitch 7680 (/4 1920)
>[677885.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ba480]
>[677885.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ba480] width 1920 pitch 7680 (/4 1920)
>[677886.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99590]
>[677886.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99590] width 1920 pitch 7680 (/4 1920)
>[677886.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ba480]
>[677886.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ba480] width 1920 pitch 7680 (/4 1920)
>[677886.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x501d7c0]
>[677886.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x501d7c0] width 1920 pitch 7680 (/4 1920)
>[677886.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048030]
>[677886.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048030] width 1920 pitch 7680 (/4 1920)
>[677888.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe340]
>[677888.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe340] width 1920 pitch 7680 (/4 1920)
>[677890.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e02d20]
>[677890.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e02d20] width 1920 pitch 7680 (/4 1920)
>[677890.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe340]
>[677890.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe340] width 1920 pitch 7680 (/4 1920)
>[677890.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677890.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677890.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe340]
>[677890.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe340] width 1920 pitch 7680 (/4 1920)
>[677892.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677892.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677892.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe340]
>[677892.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe340] width 1920 pitch 7680 (/4 1920)
>[677892.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5041b10]
>[677892.808] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5041b10] width 1920 pitch 7680 (/4 1920)
>[677892.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfe340]
>[677892.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfe340] width 1920 pitch 7680 (/4 1920)
>[677903.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9c9b0]
>[677903.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9c9b0] width 1920 pitch 7680 (/4 1920)
>[677917.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5366150]
>[677917.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5366150] width 1920 pitch 7680 (/4 1920)
>[677917.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39422d0]
>[677917.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39422d0] width 1920 pitch 7680 (/4 1920)
>[677917.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677917.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677917.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39422d0]
>[677917.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39422d0] width 1920 pitch 7680 (/4 1920)
>[677918.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f490]
>[677918.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f490] width 1920 pitch 7680 (/4 1920)
>[677931.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5890]
>[677931.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5890] width 1920 pitch 7680 (/4 1920)
>[677931.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32a20]
>[677931.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32a20] width 1920 pitch 7680 (/4 1920)
>[677931.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3afd510]
>[677931.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3afd510] width 1920 pitch 7680 (/4 1920)
>[677931.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c0bc0]
>[677931.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c0bc0] width 1920 pitch 7680 (/4 1920)
>[677933.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d32a20]
>[677933.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d32a20] width 1920 pitch 7680 (/4 1920)
>[677941.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5890]
>[677941.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5890] width 1920 pitch 7680 (/4 1920)
>[677941.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5365b20]
>[677941.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5365b20] width 1920 pitch 7680 (/4 1920)
>[677941.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677941.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677941.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5365b20]
>[677941.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5365b20] width 1920 pitch 7680 (/4 1920)
>[677943.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5365b20]
>[677943.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5365b20] width 1920 pitch 7680 (/4 1920)
>[677943.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677943.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677943.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4911610]
>[677943.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4911610] width 1920 pitch 7680 (/4 1920)
>[677943.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677943.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677946.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492a410]
>[677946.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492a410] width 1920 pitch 7680 (/4 1920)
>[677946.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85f10]
>[677946.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85f10] width 1920 pitch 7680 (/4 1920)
>[677946.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677946.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677946.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c85f10]
>[677946.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c85f10] width 1920 pitch 7680 (/4 1920)
>[677948.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x31143d0]
>[677948.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x31143d0] width 1920 pitch 7680 (/4 1920)
>[677953.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677953.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677953.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72830]
>[677953.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72830] width 1920 pitch 7680 (/4 1920)
>[677953.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x506c210]
>[677953.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x506c210] width 1920 pitch 7680 (/4 1920)
>[677954.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72830]
>[677954.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72830] width 1920 pitch 7680 (/4 1920)
>[677956.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72830]
>[677957.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72830] width 1920 pitch 7680 (/4 1920)
>[677957.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3165a60]
>[677957.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3165a60] width 1920 pitch 7680 (/4 1920)
>[677957.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26d50]
>[677957.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26d50] width 1920 pitch 7680 (/4 1920)
>[677957.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49998f0]
>[677957.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49998f0] width 1920 pitch 7680 (/4 1920)
>[677963.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5890]
>[677963.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5890] width 1920 pitch 7680 (/4 1920)
>[677964.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5890]
>[677964.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5890] width 1920 pitch 7680 (/4 1920)
>[677964.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49998f0]
>[677964.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49998f0] width 1920 pitch 7680 (/4 1920)
>[677964.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0a30]
>[677964.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0a30] width 1920 pitch 7680 (/4 1920)
>[677964.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38bcf90]
>[677964.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38bcf90] width 1920 pitch 7680 (/4 1920)
>[677968.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49998f0]
>[677968.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49998f0] width 1920 pitch 7680 (/4 1920)
>[677968.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fd5890]
>[677968.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fd5890] width 1920 pitch 7680 (/4 1920)
>[677968.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72830]
>[677968.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72830] width 1920 pitch 7680 (/4 1920)
>[677968.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677968.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677968.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd5e70]
>[677969.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd5e70] width 1920 pitch 7680 (/4 1920)
>[677969.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[677969.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[677969.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2985b50]
>[677969.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2985b50] width 1920 pitch 7680 (/4 1920)
>[677969.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd5e70]
>[677969.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd5e70] width 1920 pitch 7680 (/4 1920)
>[677970.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26510]
>[677970.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26510] width 1920 pitch 7680 (/4 1920)
>[677970.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d72830]
>[677970.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d72830] width 1920 pitch 7680 (/4 1920)
>[677970.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26510]
>[677970.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26510] width 1920 pitch 7680 (/4 1920)
>[677971.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d0a30]
>[677971.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d0a30] width 1920 pitch 7680 (/4 1920)
>[677971.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26d50]
>[677971.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26d50] width 1920 pitch 7680 (/4 1920)
>[677971.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0d5a0]
>[677971.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0d5a0] width 1920 pitch 7680 (/4 1920)
>[677982.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26d50]
>[677982.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26d50] width 1920 pitch 7680 (/4 1920)
>[677982.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0d5a0]
>[677982.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0d5a0] width 1920 pitch 7680 (/4 1920)
>[677982.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39422d0]
>[677982.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39422d0] width 1920 pitch 7680 (/4 1920)
>[677982.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f44c90]
>[677982.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f44c90] width 1920 pitch 7680 (/4 1920)
>[677989.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0d5a0]
>[677989.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0d5a0] width 1920 pitch 7680 (/4 1920)
>[677989.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99590]
>[677989.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99590] width 1920 pitch 7680 (/4 1920)
>[677989.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[677989.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[677989.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99590]
>[677989.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99590] width 1920 pitch 7680 (/4 1920)
>[677994.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a99590]
>[677994.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a99590] width 1920 pitch 7680 (/4 1920)
>[677994.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[677994.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[677994.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3caa550]
>[677994.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3caa550] width 1920 pitch 7680 (/4 1920)
>[677994.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a26490]
>[677994.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a26490] width 1920 pitch 7680 (/4 1920)
>[677995.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492a410]
>[677995.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492a410] width 1920 pitch 7680 (/4 1920)
>[677995.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5056a70]
>[677995.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5056a70] width 1920 pitch 7680 (/4 1920)
>[677995.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[677995.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[677995.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x504d980]
>[677995.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x504d980] width 1920 pitch 7680 (/4 1920)
>[678002.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dab40]
>[678002.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dab40] width 1920 pitch 7680 (/4 1920)
>[678002.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964b40]
>[678002.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964b40] width 1920 pitch 7680 (/4 1920)
>[678002.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5014840]
>[678002.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5014840] width 1920 pitch 7680 (/4 1920)
>[678002.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964b40]
>[678002.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964b40] width 1920 pitch 7680 (/4 1920)
>[678004.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964b40]
>[678004.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964b40] width 1920 pitch 7680 (/4 1920)
>[678004.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dab40]
>[678004.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dab40] width 1920 pitch 7680 (/4 1920)
>[678004.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2964b40]
>[678004.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2964b40] width 1920 pitch 7680 (/4 1920)
>[678004.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dab40]
>[678004.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dab40] width 1920 pitch 7680 (/4 1920)
>[678013.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[678013.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[678013.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678013.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678013.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4865c70]
>[678013.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4865c70] width 1920 pitch 7680 (/4 1920)
>[678013.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678013.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678019.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[678019.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[678019.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5099c40]
>[678019.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5099c40] width 1920 pitch 7680 (/4 1920)
>[678019.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50d55b0]
>[678019.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50d55b0] width 1920 pitch 7680 (/4 1920)
>[678019.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[678019.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[678023.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fc7e0]
>[678023.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fc7e0] width 1920 pitch 7680 (/4 1920)
>[678025.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7710]
>[678025.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7710] width 1920 pitch 7680 (/4 1920)
>[678026.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[678026.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[678026.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b989c0]
>[678026.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b989c0] width 1920 pitch 7680 (/4 1920)
>[678026.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[678026.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[678037.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d297d0]
>[678037.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d297d0] width 1920 pitch 7680 (/4 1920)
>[678037.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678037.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678037.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x401a300]
>[678037.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x401a300] width 1920 pitch 7680 (/4 1920)
>[678037.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678037.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678038.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678038.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678049.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c88e10]
>[678049.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c88e10] width 1920 pitch 7680 (/4 1920)
>[678049.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678049.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678049.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4908750]
>[678049.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4908750] width 1920 pitch 7680 (/4 1920)
>[678049.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678049.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678068.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c88e10]
>[678068.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c88e10] width 1920 pitch 7680 (/4 1920)
>[678083.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c88e10]
>[678083.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c88e10] width 1920 pitch 7680 (/4 1920)
>[678098.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678098.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678101.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d33100]
>[678101.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d33100] width 1920 pitch 7680 (/4 1920)
>[678101.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a106a0]
>[678101.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a106a0] width 1920 pitch 7680 (/4 1920)
>[678101.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2da7710]
>[678101.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2da7710] width 1920 pitch 7680 (/4 1920)
>[678101.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28894c0]
>[678101.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28894c0] width 1920 pitch 7680 (/4 1920)
>[678108.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6210050]
>[678108.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6210050] width 1920 pitch 7680 (/4 1920)
>[678108.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6210050]
>[678108.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6210050] width 1920 pitch 7680 (/4 1920)
>[678108.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x620fff0]
>[678108.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x620fff0] width 1920 pitch 7680 (/4 1920)
>[678108.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678108.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678111.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2896db0]
>[678111.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2896db0] width 1920 pitch 7680 (/4 1920)
>[678113.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2896db0]
>[678113.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2896db0] width 1920 pitch 7680 (/4 1920)
>[678118.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678118.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678118.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678118.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678118.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678118.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678118.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678118.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678118.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678118.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678118.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678118.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678118.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678118.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678118.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678118.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678118.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678118.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678118.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678118.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678118.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678118.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678118.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678119.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678119.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678119.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678119.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678119.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678119.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678119.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678119.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678119.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678119.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e0e90]
>[678119.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e0e90] width 1920 pitch 7680 (/4 1920)
>[678121.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678121.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf980]
>[678121.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf980] width 1920 pitch 7680 (/4 1920)
>[678121.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28bf9e0]
>[678121.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28bf9e0] width 1920 pitch 7680 (/4 1920)
>[678128.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a42a20]
>[678128.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a42a20] width 1920 pitch 7680 (/4 1920)
>[678130.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fd2bf0]
>[678130.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fd2bf0] width 1920 pitch 7680 (/4 1920)
>[678131.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481fe20]
>[678131.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481fe20] width 1920 pitch 7680 (/4 1920)
>[678131.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x481fe20]
>[678131.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x481fe20] width 1920 pitch 7680 (/4 1920)
>[678131.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678131.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678131.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678131.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678131.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678131.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678131.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678131.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678131.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678131.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678131.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678131.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678131.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678131.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678131.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678132.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678132.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678132.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678132.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678132.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678132.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678132.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678132.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678132.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678132.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678132.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678132.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678132.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678132.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678132.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678132.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678132.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678132.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678132.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678133.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678133.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678133.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678133.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678133.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678133.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678133.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678133.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678133.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678133.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678133.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678133.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678133.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678133.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678133.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678133.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49def60]
>[678133.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49def60] width 1920 pitch 7680 (/4 1920)
>[678143.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a27c0]
>[678143.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a27c0] width 1920 pitch 7680 (/4 1920)
>[678158.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678158.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678173.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678173.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678191.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678191.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678191.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678191.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678191.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678191.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678191.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678191.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678197.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678197.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678197.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678197.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678197.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678197.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678197.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678197.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678199.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678199.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678199.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678199.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678199.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678199.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678199.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678199.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678200.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678200.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678200.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678200.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678200.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61f4050]
>[678200.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61f4050] width 1920 pitch 7680 (/4 1920)
>[678200.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678200.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678207.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a27c0]
>[678207.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a27c0] width 1920 pitch 7680 (/4 1920)
>[678207.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbdd90]
>[678207.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbdd90] width 1920 pitch 7680 (/4 1920)
>[678207.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b28a30]
>[678207.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b28a30] width 1920 pitch 7680 (/4 1920)
>[678207.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbdd90]
>[678207.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbdd90] width 1920 pitch 7680 (/4 1920)
>[678209.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b28a30]
>[678209.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b28a30] width 1920 pitch 7680 (/4 1920)
>[678209.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b28a30]
>[678209.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b28a30] width 1920 pitch 7680 (/4 1920)
>[678209.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a1a050]
>[678209.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a1a050] width 1920 pitch 7680 (/4 1920)
>[678209.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2865f30]
>[678209.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2865f30] width 1920 pitch 7680 (/4 1920)
>[678210.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2865f30]
>[678210.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2865f30] width 1920 pitch 7680 (/4 1920)
>[678210.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaf40]
>[678210.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaf40] width 1920 pitch 7680 (/4 1920)
>[678210.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678210.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678210.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaf40]
>[678210.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaf40] width 1920 pitch 7680 (/4 1920)
>[678218.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678218.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678219.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5074e30]
>[678219.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5074e30] width 1920 pitch 7680 (/4 1920)
>[678219.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5074e30]
>[678219.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5074e30] width 1920 pitch 7680 (/4 1920)
>[678220.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5074e30]
>[678220.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5074e30] width 1920 pitch 7680 (/4 1920)
>[678220.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5074e30]
>[678220.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5074e30] width 1920 pitch 7680 (/4 1920)
>[678220.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5074fc0]
>[678220.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5074fc0] width 1920 pitch 7680 (/4 1920)
>[678220.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec200]
>[678220.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec200] width 1920 pitch 7680 (/4 1920)
>[678220.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62035e0]
>[678220.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62035e0] width 1920 pitch 7680 (/4 1920)
>[678220.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec200]
>[678220.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec200] width 1920 pitch 7680 (/4 1920)
>[678233.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec200]
>[678233.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec200] width 1920 pitch 7680 (/4 1920)
>[678268.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec200]
>[678268.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec200] width 1920 pitch 7680 (/4 1920)
>[678268.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec200]
>[678268.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec200] width 1920 pitch 7680 (/4 1920)
>[678268.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fec200]
>[678269.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fec200] width 1920 pitch 7680 (/4 1920)
>[678269.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678269.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678274.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5091f20]
>[678274.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5091f20] width 1920 pitch 7680 (/4 1920)
>[678274.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4908b00]
>[678274.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4908b00] width 1920 pitch 7680 (/4 1920)
>[678274.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a106a0]
>[678274.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a106a0] width 1920 pitch 7680 (/4 1920)
>[678274.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6232270]
>[678274.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6232270] width 1920 pitch 7680 (/4 1920)
>[678276.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29662e0]
>[678276.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29662e0] width 1920 pitch 7680 (/4 1920)
>[678276.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac2d0]
>[678276.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac2d0] width 1920 pitch 7680 (/4 1920)
>[678276.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x283cc20]
>[678276.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x283cc20] width 1920 pitch 7680 (/4 1920)
>[678276.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836bc0]
>[678276.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836bc0] width 1920 pitch 7680 (/4 1920)
>[678277.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcaf40]
>[678277.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcaf40] width 1920 pitch 7680 (/4 1920)
>[678277.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678277.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678277.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4b70]
>[678277.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4b70] width 1920 pitch 7680 (/4 1920)
>[678277.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ac280]
>[678277.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ac280] width 1920 pitch 7680 (/4 1920)
>[678285.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987160]
>[678285.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987160] width 1920 pitch 7680 (/4 1920)
>[678285.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987160]
>[678285.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987160] width 1920 pitch 7680 (/4 1920)
>[678285.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29873a0]
>[678285.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29873a0] width 1920 pitch 7680 (/4 1920)
>[678285.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987160]
>[678285.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987160] width 1920 pitch 7680 (/4 1920)
>[678286.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e92780]
>[678286.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e92780] width 1920 pitch 7680 (/4 1920)
>[678286.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29873a0]
>[678286.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29873a0] width 1920 pitch 7680 (/4 1920)
>[678286.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28967d0]
>[678286.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28967d0] width 1920 pitch 7680 (/4 1920)
>[678286.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29873a0]
>[678286.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29873a0] width 1920 pitch 7680 (/4 1920)
>[678288.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49df040]
>[678288.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49df040] width 1920 pitch 7680 (/4 1920)
>[678288.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49df040]
>[678288.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49df040] width 1920 pitch 7680 (/4 1920)
>[678288.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678288.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678288.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49df040]
>[678288.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49df040] width 1920 pitch 7680 (/4 1920)
>[678300.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5086a60]
>[678300.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5086a60] width 1920 pitch 7680 (/4 1920)
>[678300.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678300.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678300.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836c10]
>[678300.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836c10] width 1920 pitch 7680 (/4 1920)
>[678300.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678300.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678355.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678355.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678355.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678355.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678355.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678355.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678355.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836c10]
>[678355.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836c10] width 1920 pitch 7680 (/4 1920)
>[678357.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d39b0]
>[678357.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d39b0] width 1920 pitch 7680 (/4 1920)
>[678357.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d39b0]
>[678357.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d39b0] width 1920 pitch 7680 (/4 1920)
>[678357.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836c10]
>[678357.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836c10] width 1920 pitch 7680 (/4 1920)
>[678357.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29661c0]
>[678357.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29661c0] width 1920 pitch 7680 (/4 1920)
>[678360.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500c240]
>[678360.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500c240] width 1920 pitch 7680 (/4 1920)
>[678360.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842a70]
>[678360.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842a70] width 1920 pitch 7680 (/4 1920)
>[678360.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836c10]
>[678360.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836c10] width 1920 pitch 7680 (/4 1920)
>[678360.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842a70]
>[678360.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842a70] width 1920 pitch 7680 (/4 1920)
>[678363.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314b1c0]
>[678363.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314b1c0] width 1920 pitch 7680 (/4 1920)
>[678363.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aff3d0]
>[678363.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aff3d0] width 1920 pitch 7680 (/4 1920)
>[678363.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49df080]
>[678363.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49df080] width 1920 pitch 7680 (/4 1920)
>[678363.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aff3d0]
>[678363.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aff3d0] width 1920 pitch 7680 (/4 1920)
>[678368.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x503d5b0]
>[678368.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x503d5b0] width 1920 pitch 7680 (/4 1920)
>[678368.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28967d0]
>[678368.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28967d0] width 1920 pitch 7680 (/4 1920)
>[678368.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836c10]
>[678368.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836c10] width 1920 pitch 7680 (/4 1920)
>[678368.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28967d0]
>[678368.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28967d0] width 1920 pitch 7680 (/4 1920)
>[678369.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314b1e0]
>[678369.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314b1e0] width 1920 pitch 7680 (/4 1920)
>[678369.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28967d0]
>[678369.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28967d0] width 1920 pitch 7680 (/4 1920)
>[678369.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987390]
>[678369.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987390] width 1920 pitch 7680 (/4 1920)
>[678369.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2987390]
>[678369.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2987390] width 1920 pitch 7680 (/4 1920)
>[678389.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x298cc80]
>[678389.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x298cc80] width 1920 pitch 7680 (/4 1920)
>[678392.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1e4e0]
>[678392.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1e4e0] width 1920 pitch 7680 (/4 1920)
>[678392.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678392.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678392.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678392.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678392.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678392.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678392.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678392.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678392.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678392.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678392.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678392.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678392.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678392.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678392.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678392.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678392.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678392.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678392.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678392.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678392.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678392.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678392.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678392.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678392.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678393.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678393.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4940]
>[678393.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4940] width 1920 pitch 7680 (/4 1920)
>[678393.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1e4e0]
>[678393.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1e4e0] width 1920 pitch 7680 (/4 1920)
>[678393.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678393.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678393.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678393.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678393.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678394.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678394.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2842d30]
>[678394.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2842d30] width 1920 pitch 7680 (/4 1920)
>[678394.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678394.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678395.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2896d80]
>[678395.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2896d80] width 1920 pitch 7680 (/4 1920)
>[678395.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678395.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678395.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2896d80]
>[678395.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2896d80] width 1920 pitch 7680 (/4 1920)
>[678395.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678395.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678398.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836c10]
>[678398.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836c10] width 1920 pitch 7680 (/4 1920)
>[678428.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678428.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678443.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a9d1d0]
>[678443.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a9d1d0] width 1920 pitch 7680 (/4 1920)
>[678506.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678506.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678507.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295a970]
>[678507.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295a970] width 1920 pitch 7680 (/4 1920)
>[678507.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6232270]
>[678507.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6232270] width 1920 pitch 7680 (/4 1920)
>[678507.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2554ce0]
>[678507.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2554ce0] width 1920 pitch 7680 (/4 1920)
>[678512.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678512.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678512.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678512.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678512.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cee80]
>[678512.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cee80] width 1920 pitch 7680 (/4 1920)
>[678512.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678512.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678515.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a68b0]
>[678515.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a68b0] width 1920 pitch 7680 (/4 1920)
>[678515.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678515.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678515.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a19f20]
>[678515.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a19f20] width 1920 pitch 7680 (/4 1920)
>[678515.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678515.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678517.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2554ce0]
>[678517.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2554ce0] width 1920 pitch 7680 (/4 1920)
>[678517.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2554ce0]
>[678517.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2554ce0] width 1920 pitch 7680 (/4 1920)
>[678517.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cc0180]
>[678517.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cc0180] width 1920 pitch 7680 (/4 1920)
>[678517.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2554ce0]
>[678518.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2554ce0] width 1920 pitch 7680 (/4 1920)
>[678521.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2554ce0]
>[678521.725] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2554ce0] width 1920 pitch 7680 (/4 1920)
>[678521.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678521.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678521.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a19f20]
>[678521.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a19f20] width 1920 pitch 7680 (/4 1920)
>[678521.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a19f20]
>[678521.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a19f20] width 1920 pitch 7680 (/4 1920)
>[678540.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x295a970]
>[678540.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x295a970] width 1920 pitch 7680 (/4 1920)
>[678540.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a19f20]
>[678540.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a19f20] width 1920 pitch 7680 (/4 1920)
>[678540.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678540.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678540.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbfdb0]
>[678540.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbfdb0] width 1920 pitch 7680 (/4 1920)
>[678547.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cbfdb0]
>[678547.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cbfdb0] width 1920 pitch 7680 (/4 1920)
>[678547.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678547.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678547.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1e460]
>[678547.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1e460] width 1920 pitch 7680 (/4 1920)
>[678547.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678547.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678552.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be1870]
>[678552.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be1870] width 1920 pitch 7680 (/4 1920)
>[678552.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be1870]
>[678552.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be1870] width 1920 pitch 7680 (/4 1920)
>[678552.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a7f0]
>[678552.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a7f0] width 1920 pitch 7680 (/4 1920)
>[678552.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a8e0]
>[678552.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a8e0] width 1920 pitch 7680 (/4 1920)
>[678554.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be1870]
>[678554.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be1870] width 1920 pitch 7680 (/4 1920)
>[678554.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1e320]
>[678554.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1e320] width 1920 pitch 7680 (/4 1920)
>[678554.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4885510]
>[678554.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4885510] width 1920 pitch 7680 (/4 1920)
>[678554.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678554.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678556.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a940]
>[678556.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a940] width 1920 pitch 7680 (/4 1920)
>[678556.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0c30]
>[678556.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0c30] width 1920 pitch 7680 (/4 1920)
>[678556.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a7d0]
>[678556.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a7d0] width 1920 pitch 7680 (/4 1920)
>[678556.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0c30]
>[678556.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0c30] width 1920 pitch 7680 (/4 1920)
>[678557.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0c30]
>[678557.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0c30] width 1920 pitch 7680 (/4 1920)
>[678557.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4027950]
>[678557.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4027950] width 1920 pitch 7680 (/4 1920)
>[678557.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678557.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678557.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a940]
>[678557.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a940] width 1920 pitch 7680 (/4 1920)
>[678562.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a940]
>[678562.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a940] width 1920 pitch 7680 (/4 1920)
>[678562.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678562.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678562.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d81c90]
>[678562.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d81c90] width 1920 pitch 7680 (/4 1920)
>[678562.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678562.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678563.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be1870]
>[678563.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be1870] width 1920 pitch 7680 (/4 1920)
>[678563.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678563.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678563.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1e0d0]
>[678563.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1e0d0] width 1920 pitch 7680 (/4 1920)
>[678563.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678563.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678569.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678569.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678579.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678579.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678579.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678579.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678581.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d6b40]
>[678581.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d6b40] width 1920 pitch 7680 (/4 1920)
>[678582.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678582.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678582.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678582.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678582.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[678582.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[678582.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678582.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678582.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30696c0]
>[678582.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30696c0] width 1920 pitch 7680 (/4 1920)
>[678582.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678582.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678582.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678582.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678582.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678582.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678582.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678582.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678582.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678583.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678583.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678583.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678583.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678583.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678583.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678583.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678583.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678583.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678583.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678583.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678583.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678583.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678583.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d01e70]
>[678583.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d01e70] width 1920 pitch 7680 (/4 1920)
>[678583.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49cb6f0]
>[678583.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49cb6f0] width 1920 pitch 7680 (/4 1920)
>[678593.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500df20]
>[678593.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500df20] width 1920 pitch 7680 (/4 1920)
>[678607.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678607.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f2a0]
>[678607.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f2a0] width 1920 pitch 7680 (/4 1920)
>[678607.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49895b0]
>[678607.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49895b0] width 1920 pitch 7680 (/4 1920)
>[678620.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d22310]
>[678620.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d22310] width 1920 pitch 7680 (/4 1920)
>[678620.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x498a2e0]
>[678620.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x498a2e0] width 1920 pitch 7680 (/4 1920)
>[678620.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678620.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x498a2e0]
>[678620.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x498a2e0] width 1920 pitch 7680 (/4 1920)
>[678620.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3166ec0]
>[678620.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3166ec0] width 1920 pitch 7680 (/4 1920)
>[678622.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x500df20]
>[678622.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x500df20] width 1920 pitch 7680 (/4 1920)
>[678622.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e1e6f0]
>[678622.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e1e6f0] width 1920 pitch 7680 (/4 1920)
>[678622.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678622.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678622.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4912e90]
>[678622.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4912e90] width 1920 pitch 7680 (/4 1920)
>[678622.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678622.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678622.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678622.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678622.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678622.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678622.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6abd0]
>[678622.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6abd0] width 1920 pitch 7680 (/4 1920)
>[678622.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678623.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678623.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678623.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678623.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678623.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678623.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678623.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678623.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5080d10]
>[678623.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5080d10] width 1920 pitch 7680 (/4 1920)
>[678623.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5080d10]
>[678623.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5080d10] width 1920 pitch 7680 (/4 1920)
>[678623.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5080d10]
>[678623.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5080d10] width 1920 pitch 7680 (/4 1920)
>[678623.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a6a790]
>[678623.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a6a790] width 1920 pitch 7680 (/4 1920)
>[678623.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[678623.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[678630.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb4c00]
>[678630.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb4c00] width 1920 pitch 7680 (/4 1920)
>[678642.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x51d8c90]
>[678642.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x51d8c90] width 1920 pitch 7680 (/4 1920)
>[678683.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aae290]
>[678683.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aae290] width 1920 pitch 7680 (/4 1920)
>[678698.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aae290]
>[678698.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aae290] width 1920 pitch 7680 (/4 1920)
>[678713.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aae290]
>[678713.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aae290] width 1920 pitch 7680 (/4 1920)
>[678728.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be2e20]
>[678728.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be2e20] width 1920 pitch 7680 (/4 1920)
>[678741.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678741.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678741.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be2e20]
>[678741.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be2e20] width 1920 pitch 7680 (/4 1920)
>[678741.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58520]
>[678741.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58520] width 1920 pitch 7680 (/4 1920)
>[678741.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aae290]
>[678741.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aae290] width 1920 pitch 7680 (/4 1920)
>[678743.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623d380]
>[678743.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623d380] width 1920 pitch 7680 (/4 1920)
>[678746.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623d380]
>[678746.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623d380] width 1920 pitch 7680 (/4 1920)
>[678746.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623d380]
>[678746.793] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623d380] width 1920 pitch 7680 (/4 1920)
>[678746.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623d380]
>[678746.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623d380] width 1920 pitch 7680 (/4 1920)
>[678746.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aae290]
>[678746.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aae290] width 1920 pitch 7680 (/4 1920)
>[678746.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fb60]
>[678746.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fb60] width 1920 pitch 7680 (/4 1920)
>[678746.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678746.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678746.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623d380]
>[678746.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623d380] width 1920 pitch 7680 (/4 1920)
>[678746.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aae290]
>[678746.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aae290] width 1920 pitch 7680 (/4 1920)
>[678746.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fb60]
>[678746.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fb60] width 1920 pitch 7680 (/4 1920)
>[678746.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678746.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678746.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289fb60]
>[678747.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289fb60] width 1920 pitch 7680 (/4 1920)
>[678747.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678747.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe4010]
>[678748.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe4010] width 1920 pitch 7680 (/4 1920)
>[678748.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678748.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cf00]
>[678748.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cf00] width 1920 pitch 7680 (/4 1920)
>[678748.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f58250]
>[678748.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f58250] width 1920 pitch 7680 (/4 1920)
>[678758.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x491e540]
>[678758.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x491e540] width 1920 pitch 7680 (/4 1920)
>[678773.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2886820]
>[678773.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2886820] width 1920 pitch 7680 (/4 1920)
>[678788.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x491e540]
>[678788.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x491e540] width 1920 pitch 7680 (/4 1920)
>[678802.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289a140]
>[678802.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289a140] width 1920 pitch 7680 (/4 1920)
>[678802.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48752d0]
>[678802.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48752d0] width 1920 pitch 7680 (/4 1920)
>[678803.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289a140]
>[678803.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289a140] width 1920 pitch 7680 (/4 1920)
>[678803.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48752d0]
>[678803.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48752d0] width 1920 pitch 7680 (/4 1920)
>[678803.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eeb900]
>[678803.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eeb900] width 1920 pitch 7680 (/4 1920)
>[678803.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48752d0]
>[678803.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48752d0] width 1920 pitch 7680 (/4 1920)
>[678818.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a3ec0]
>[678818.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a3ec0] width 1920 pitch 7680 (/4 1920)
>[678832.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6256680]
>[678832.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6256680] width 1920 pitch 7680 (/4 1920)
>[678832.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048ec0]
>[678832.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048ec0] width 1920 pitch 7680 (/4 1920)
>[678832.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50772d0]
>[678832.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50772d0] width 1920 pitch 7680 (/4 1920)
>[678832.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048ec0]
>[678832.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048ec0] width 1920 pitch 7680 (/4 1920)
>[678832.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50772d0]
>[678832.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50772d0] width 1920 pitch 7680 (/4 1920)
>[678832.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048ec0]
>[678832.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048ec0] width 1920 pitch 7680 (/4 1920)
>[678832.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b835d0]
>[678832.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b835d0] width 1920 pitch 7680 (/4 1920)
>[678832.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fdb6b0]
>[678832.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fdb6b0] width 1920 pitch 7680 (/4 1920)
>[678832.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b835d0]
>[678832.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b835d0] width 1920 pitch 7680 (/4 1920)
>[678832.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fdb6b0]
>[678832.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fdb6b0] width 1920 pitch 7680 (/4 1920)
>[678833.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50772d0]
>[678833.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50772d0] width 1920 pitch 7680 (/4 1920)
>[678833.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678833.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678833.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678833.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678833.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678833.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678833.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678833.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678833.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678833.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678833.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678833.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678833.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678833.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678833.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678833.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678833.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678833.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678833.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678833.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678833.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678833.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678833.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b31980]
>[678833.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b31980] width 1920 pitch 7680 (/4 1920)
>[678833.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc2510]
>[678833.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc2510] width 1920 pitch 7680 (/4 1920)
>[678834.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b31980]
>[678834.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b31980] width 1920 pitch 7680 (/4 1920)
>[678834.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda080]
>[678834.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda080] width 1920 pitch 7680 (/4 1920)
>[678834.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd06f0]
>[678834.434] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd06f0] width 1920 pitch 7680 (/4 1920)
>[678878.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd06f0]
>[678878.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd06f0] width 1920 pitch 7680 (/4 1920)
>[678879.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be3010]
>[678879.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be3010] width 1920 pitch 7680 (/4 1920)
>[678893.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f5e990]
>[678893.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f5e990] width 1920 pitch 7680 (/4 1920)
>[678893.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678893.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e3ea50]
>[678893.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e3ea50] width 1920 pitch 7680 (/4 1920)
>[678893.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2932410]
>[678893.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2932410] width 1920 pitch 7680 (/4 1920)
>[678897.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9e160]
>[678897.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9e160] width 1920 pitch 7680 (/4 1920)
>[678899.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2517fa0]
>[678899.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2517fa0] width 1920 pitch 7680 (/4 1920)
>[678899.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403dc70]
>[678899.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403dc70] width 1920 pitch 7680 (/4 1920)
>[678899.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310e950]
>[678899.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310e950] width 1920 pitch 7680 (/4 1920)
>[678899.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678899.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678899.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678899.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678899.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678899.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678899.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[678899.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[678899.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678899.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678910.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca9c70]
>[678910.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca9c70] width 1920 pitch 7680 (/4 1920)
>[678910.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4982890]
>[678910.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4982890] width 1920 pitch 7680 (/4 1920)
>[678910.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4982850]
>[678910.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4982850] width 1920 pitch 7680 (/4 1920)
>[678925.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[678925.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[678925.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[678925.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[678925.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[678925.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[678925.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[678925.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[678925.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[678925.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[678925.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[678925.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[678925.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[678925.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[678925.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[678925.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[678925.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[678925.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[678925.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[678925.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[678925.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b7d10]
>[678925.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b7d10] width 1920 pitch 7680 (/4 1920)
>[678925.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[678925.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[678925.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x509ca10]
>[678925.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x509ca10] width 1920 pitch 7680 (/4 1920)
>[678925.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d41130]
>[678925.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d41130] width 1920 pitch 7680 (/4 1920)
>[678925.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd06f0]
>[678925.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd06f0] width 1920 pitch 7680 (/4 1920)
>[678925.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[678925.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[678925.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b52440]
>[678925.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b52440] width 1920 pitch 7680 (/4 1920)
>[678925.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08820]
>[678925.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08820] width 1920 pitch 7680 (/4 1920)
>[678925.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[678925.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[678925.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c670]
>[678925.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c670] width 1920 pitch 7680 (/4 1920)
>[678925.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678925.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678925.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c670]
>[678925.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c670] width 1920 pitch 7680 (/4 1920)
>[678925.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[678925.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[678925.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678925.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678925.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[678925.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[678925.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678925.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678925.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b35310]
>[678925.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b35310] width 1920 pitch 7680 (/4 1920)
>[678925.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678925.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678925.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[678926.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[678926.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678926.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678926.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497cdb0]
>[678926.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497cdb0] width 1920 pitch 7680 (/4 1920)
>[678926.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678926.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678926.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16f70]
>[678926.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16f70] width 1920 pitch 7680 (/4 1920)
>[678926.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678926.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678933.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9e160]
>[678933.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9e160] width 1920 pitch 7680 (/4 1920)
>[678933.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[678933.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[678933.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26030]
>[678933.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26030] width 1920 pitch 7680 (/4 1920)
>[678933.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[678934.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[678938.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3163bd0]
>[678938.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3163bd0] width 1920 pitch 7680 (/4 1920)
>[678941.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144f90]
>[678941.825] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144f90] width 1920 pitch 7680 (/4 1920)
>[678941.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c640a0]
>[678941.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c640a0] width 1920 pitch 7680 (/4 1920)
>[678941.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[678941.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[678941.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda080]
>[678941.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda080] width 1920 pitch 7680 (/4 1920)
>[678941.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[678941.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[678941.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda080]
>[678941.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda080] width 1920 pitch 7680 (/4 1920)
>[678941.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[678941.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[678941.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[678941.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[678941.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[678941.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[678941.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[678941.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[678941.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[678941.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[678941.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[678942.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[678942.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[678942.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[678942.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[678942.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[678942.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[678942.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[678942.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[678942.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[678945.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e90b0]
>[678945.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e90b0] width 1920 pitch 7680 (/4 1920)
>[678946.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[678946.358] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[678946.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda080]
>[678946.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda080] width 1920 pitch 7680 (/4 1920)
>[678946.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b31980]
>[678946.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b31980] width 1920 pitch 7680 (/4 1920)
>[678951.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[678951.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[678951.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff1550]
>[678951.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff1550] width 1920 pitch 7680 (/4 1920)
>[678951.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403c670]
>[678951.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403c670] width 1920 pitch 7680 (/4 1920)
>[678951.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06f10]
>[678951.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06f10] width 1920 pitch 7680 (/4 1920)
>[678953.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ed20]
>[678953.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ed20] width 1920 pitch 7680 (/4 1920)
>[678959.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0350]
>[678959.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0350] width 1920 pitch 7680 (/4 1920)
>[678959.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b52440]
>[678959.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b52440] width 1920 pitch 7680 (/4 1920)
>[678959.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048ec0]
>[678959.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048ec0] width 1920 pitch 7680 (/4 1920)
>[678960.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[678960.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[678960.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d82e20]
>[678960.659] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d82e20] width 1920 pitch 7680 (/4 1920)
>[678961.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[678961.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[678961.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1790]
>[678961.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1790] width 1920 pitch 7680 (/4 1920)
>[678961.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbb880]
>[678961.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbb880] width 1920 pitch 7680 (/4 1920)
>[678983.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[678983.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[678998.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7380]
>[678998.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7380] width 1920 pitch 7680 (/4 1920)
>[678998.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[678998.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[678999.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cd06f0]
>[678999.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cd06f0] width 1920 pitch 7680 (/4 1920)
>[678999.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0350]
>[678999.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0350] width 1920 pitch 7680 (/4 1920)
>[678999.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391f390]
>[678999.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391f390] width 1920 pitch 7680 (/4 1920)
>[679000.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b52440]
>[679000.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b52440] width 1920 pitch 7680 (/4 1920)
>[679000.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca9c70]
>[679000.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca9c70] width 1920 pitch 7680 (/4 1920)
>[679000.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c9e160]
>[679000.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c9e160] width 1920 pitch 7680 (/4 1920)
>[679000.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679000.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679000.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[679000.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[679001.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497cdb0]
>[679001.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497cdb0] width 1920 pitch 7680 (/4 1920)
>[679001.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4905860]
>[679001.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4905860] width 1920 pitch 7680 (/4 1920)
>[679001.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b88560]
>[679001.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b88560] width 1920 pitch 7680 (/4 1920)
>[679067.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6255620]
>[679067.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6255620] width 1920 pitch 7680 (/4 1920)
>[679087.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ba5670]
>[679087.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ba5670] width 1920 pitch 7680 (/4 1920)
>[679088.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x310b3f0]
>[679088.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x310b3f0] width 1920 pitch 7680 (/4 1920)
>[679088.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679088.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c60a0]
>[679088.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c60a0] width 1920 pitch 7680 (/4 1920)
>[679088.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679088.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679090.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f1cc0]
>[679090.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f1cc0] width 1920 pitch 7680 (/4 1920)
>[679090.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c640a0]
>[679090.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c640a0] width 1920 pitch 7680 (/4 1920)
>[679090.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f1cc0]
>[679090.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f1cc0] width 1920 pitch 7680 (/4 1920)
>[679090.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c640a0]
>[679090.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c640a0] width 1920 pitch 7680 (/4 1920)
>[679090.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679090.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679090.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679090.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679090.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679090.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679090.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679090.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679090.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679090.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679110.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679110.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679110.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a7960]
>[679111.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a7960] width 1920 pitch 7680 (/4 1920)
>[679111.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679111.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679111.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a7960]
>[679111.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a7960] width 1920 pitch 7680 (/4 1920)
>[679136.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29763b0]
>[679136.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29763b0] width 1920 pitch 7680 (/4 1920)
>[679137.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49079c0]
>[679137.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49079c0] width 1920 pitch 7680 (/4 1920)
>[679137.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49079c0]
>[679137.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49079c0] width 1920 pitch 7680 (/4 1920)
>[679137.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50ac0c0]
>[679137.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50ac0c0] width 1920 pitch 7680 (/4 1920)
>[679140.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50abff0]
>[679140.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50abff0] width 1920 pitch 7680 (/4 1920)
>[679140.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50abff0]
>[679140.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50abff0] width 1920 pitch 7680 (/4 1920)
>[679140.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2929020]
>[679140.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2929020] width 1920 pitch 7680 (/4 1920)
>[679140.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50abff0]
>[679140.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50abff0] width 1920 pitch 7680 (/4 1920)
>[679143.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679143.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679143.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50abff0]
>[679143.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50abff0] width 1920 pitch 7680 (/4 1920)
>[679143.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679143.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679143.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50abff0]
>[679143.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50abff0] width 1920 pitch 7680 (/4 1920)
>[679145.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6255510]
>[679145.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6255510] width 1920 pitch 7680 (/4 1920)
>[679145.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6298260]
>[679145.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6298260] width 1920 pitch 7680 (/4 1920)
>[679145.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934b30]
>[679145.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934b30] width 1920 pitch 7680 (/4 1920)
>[679145.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6298260]
>[679145.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6298260] width 1920 pitch 7680 (/4 1920)
>[679145.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934b30]
>[679145.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934b30] width 1920 pitch 7680 (/4 1920)
>[679145.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6298260]
>[679145.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6298260] width 1920 pitch 7680 (/4 1920)
>[679145.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934b30]
>[679145.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934b30] width 1920 pitch 7680 (/4 1920)
>[679145.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6298260]
>[679145.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6298260] width 1920 pitch 7680 (/4 1920)
>[679145.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934b30]
>[679145.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934b30] width 1920 pitch 7680 (/4 1920)
>[679145.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6298260]
>[679145.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6298260] width 1920 pitch 7680 (/4 1920)
>[679145.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2934b30]
>[679145.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2934b30] width 1920 pitch 7680 (/4 1920)
>[679145.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2976440]
>[679145.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2976440] width 1920 pitch 7680 (/4 1920)
>[679145.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48f1cc0]
>[679145.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48f1cc0] width 1920 pitch 7680 (/4 1920)
>[679145.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cede70]
>[679145.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cede70] width 1920 pitch 7680 (/4 1920)
>[679145.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08820]
>[679145.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08820] width 1920 pitch 7680 (/4 1920)
>[679148.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50abff0]
>[679148.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50abff0] width 1920 pitch 7680 (/4 1920)
>[679163.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08820]
>[679163.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08820] width 1920 pitch 7680 (/4 1920)
>[679166.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b33470]
>[679166.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b33470] width 1920 pitch 7680 (/4 1920)
>[679169.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6255510]
>[679169.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6255510] width 1920 pitch 7680 (/4 1920)
>[679169.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679169.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679169.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679169.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679169.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679169.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679169.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffe6d0]
>[679169.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffe6d0] width 1920 pitch 7680 (/4 1920)
>[679169.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679169.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679170.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2cede70]
>[679170.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2cede70] width 1920 pitch 7680 (/4 1920)
>[679170.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6255510]
>[679170.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6255510] width 1920 pitch 7680 (/4 1920)
>[679170.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6255510]
>[679170.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6255510] width 1920 pitch 7680 (/4 1920)
>[679170.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6255510]
>[679170.409] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6255510] width 1920 pitch 7680 (/4 1920)
>[679170.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679170.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679170.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679170.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679170.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679170.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679170.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679170.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679170.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679170.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2830ad0]
>[679170.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2830ad0] width 1920 pitch 7680 (/4 1920)
>[679170.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49187e0]
>[679170.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49187e0] width 1920 pitch 7680 (/4 1920)
>[679204.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679204.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679204.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679204.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6237250]
>[679204.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6237250] width 1920 pitch 7680 (/4 1920)
>[679204.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5082160]
>[679204.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5082160] width 1920 pitch 7680 (/4 1920)
>[679204.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081e40]
>[679204.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081e40] width 1920 pitch 7680 (/4 1920)
>[679205.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2942f50]
>[679205.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2942f50] width 1920 pitch 7680 (/4 1920)
>[679205.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e550]
>[679205.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e550] width 1920 pitch 7680 (/4 1920)
>[679205.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2942f50]
>[679205.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2942f50] width 1920 pitch 7680 (/4 1920)
>[679205.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e550]
>[679205.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e550] width 1920 pitch 7680 (/4 1920)
>[679205.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2942f50]
>[679205.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2942f50] width 1920 pitch 7680 (/4 1920)
>[679205.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e550]
>[679205.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e550] width 1920 pitch 7680 (/4 1920)
>[679205.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2942f50]
>[679205.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2942f50] width 1920 pitch 7680 (/4 1920)
>[679205.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507e550]
>[679205.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507e550] width 1920 pitch 7680 (/4 1920)
>[679205.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2942f50]
>[679205.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2942f50] width 1920 pitch 7680 (/4 1920)
>[679205.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081ad0]
>[679205.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081ad0] width 1920 pitch 7680 (/4 1920)
>[679205.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679205.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679205.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081ad0]
>[679205.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081ad0] width 1920 pitch 7680 (/4 1920)
>[679205.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679205.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679205.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081ad0]
>[679205.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081ad0] width 1920 pitch 7680 (/4 1920)
>[679205.647] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679205.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679205.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081ad0]
>[679205.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081ad0] width 1920 pitch 7680 (/4 1920)
>[679205.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c2c730]
>[679205.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c2c730] width 1920 pitch 7680 (/4 1920)
>[679205.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5081ad0]
>[679205.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5081ad0] width 1920 pitch 7680 (/4 1920)
>[679207.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679207.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679207.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[679207.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[679207.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7faf0]
>[679207.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7faf0] width 1920 pitch 7680 (/4 1920)
>[679207.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[679207.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[679207.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7faf0]
>[679207.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7faf0] width 1920 pitch 7680 (/4 1920)
>[679207.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679207.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679207.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7faf0]
>[679207.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7faf0] width 1920 pitch 7680 (/4 1920)
>[679207.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679207.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679207.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7faf0]
>[679207.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7faf0] width 1920 pitch 7680 (/4 1920)
>[679207.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679207.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679207.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b7faf0]
>[679207.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b7faf0] width 1920 pitch 7680 (/4 1920)
>[679207.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679207.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679207.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a3dbc0]
>[679207.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a3dbc0] width 1920 pitch 7680 (/4 1920)
>[679207.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679207.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679207.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ce0b0]
>[679207.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ce0b0] width 1920 pitch 7680 (/4 1920)
>[679207.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679207.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679207.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ce0b0]
>[679207.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ce0b0] width 1920 pitch 7680 (/4 1920)
>[679207.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679207.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679207.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ce0b0]
>[679207.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ce0b0] width 1920 pitch 7680 (/4 1920)
>[679207.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20e0d90]
>[679207.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20e0d90] width 1920 pitch 7680 (/4 1920)
>[679207.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49ce0b0]
>[679207.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49ce0b0] width 1920 pitch 7680 (/4 1920)
>[679207.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eda080]
>[679207.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eda080] width 1920 pitch 7680 (/4 1920)
>[679208.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679208.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679208.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd1600]
>[679208.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd1600] width 1920 pitch 7680 (/4 1920)
>[679208.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679208.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679251.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b3e40]
>[679251.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b3e40] width 1920 pitch 7680 (/4 1920)
>[679253.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e4efa0]
>[679253.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e4efa0] width 1920 pitch 7680 (/4 1920)
>[679256.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679256.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679256.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679256.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679256.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679256.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679256.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679256.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679256.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679256.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679257.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679257.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679257.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679257.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679257.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679257.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679257.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679257.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679257.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679257.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679257.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679257.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679257.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679257.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679257.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679257.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679257.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679257.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679257.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679257.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679257.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679257.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679268.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5077b60]
>[679268.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5077b60] width 1920 pitch 7680 (/4 1920)
>[679316.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9e670]
>[679316.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9e670] width 1920 pitch 7680 (/4 1920)
>[679316.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f120]
>[679316.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f120] width 1920 pitch 7680 (/4 1920)
>[679316.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679316.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679316.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821fa0]
>[679316.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821fa0] width 1920 pitch 7680 (/4 1920)
>[679316.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679316.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679316.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821fa0]
>[679316.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821fa0] width 1920 pitch 7680 (/4 1920)
>[679316.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679316.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679316.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821fa0]
>[679316.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821fa0] width 1920 pitch 7680 (/4 1920)
>[679316.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821fa0]
>[679317.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821fa0] width 1920 pitch 7680 (/4 1920)
>[679317.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821fa0]
>[679317.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821fa0] width 1920 pitch 7680 (/4 1920)
>[679317.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821fa0]
>[679317.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821fa0] width 1920 pitch 7680 (/4 1920)
>[679317.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f120]
>[679317.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f120] width 1920 pitch 7680 (/4 1920)
>[679317.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f120]
>[679317.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f120] width 1920 pitch 7680 (/4 1920)
>[679317.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f120]
>[679317.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f120] width 1920 pitch 7680 (/4 1920)
>[679317.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x52b1590]
>[679317.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x52b1590] width 1920 pitch 7680 (/4 1920)
>[679317.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f120]
>[679317.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f120] width 1920 pitch 7680 (/4 1920)
>[679328.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c640a0]
>[679328.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c640a0] width 1920 pitch 7680 (/4 1920)
>[679343.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d8f120]
>[679343.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d8f120] width 1920 pitch 7680 (/4 1920)
>[679358.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9e670]
>[679358.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9e670] width 1920 pitch 7680 (/4 1920)
>[679373.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4905860]
>[679373.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4905860] width 1920 pitch 7680 (/4 1920)
>[679403.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a646e0]
>[679403.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a646e0] width 1920 pitch 7680 (/4 1920)
>[679418.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3016ca0]
>[679418.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3016ca0] width 1920 pitch 7680 (/4 1920)
>[679448.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfc1e0]
>[679448.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfc1e0] width 1920 pitch 7680 (/4 1920)
>[679463.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0350]
>[679463.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0350] width 1920 pitch 7680 (/4 1920)
>[679492.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d17e60]
>[679492.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d17e60] width 1920 pitch 7680 (/4 1920)
>[679492.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679492.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679492.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d17e60]
>[679492.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d17e60] width 1920 pitch 7680 (/4 1920)
>[679492.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679492.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679492.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679492.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679492.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679492.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679492.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679492.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679492.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679492.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679492.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679492.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679492.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679493.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679493.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679493.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679493.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679493.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679493.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679493.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679493.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679493.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679493.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679493.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679493.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679493.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679502.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[679502.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[679504.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfc1e0]
>[679504.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfc1e0] width 1920 pitch 7680 (/4 1920)
>[679504.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edc580]
>[679504.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edc580] width 1920 pitch 7680 (/4 1920)
>[679504.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9e370]
>[679504.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9e370] width 1920 pitch 7680 (/4 1920)
>[679504.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.086] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144f90]
>[679504.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144f90] width 1920 pitch 7680 (/4 1920)
>[679504.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144f90]
>[679504.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144f90] width 1920 pitch 7680 (/4 1920)
>[679504.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144f90]
>[679504.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144f90] width 1920 pitch 7680 (/4 1920)
>[679504.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1790]
>[679504.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1790] width 1920 pitch 7680 (/4 1920)
>[679504.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1790]
>[679504.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1790] width 1920 pitch 7680 (/4 1920)
>[679504.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1790]
>[679504.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1790] width 1920 pitch 7680 (/4 1920)
>[679504.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f2c3f0]
>[679504.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f2c3f0] width 1920 pitch 7680 (/4 1920)
>[679504.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1790]
>[679504.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1790] width 1920 pitch 7680 (/4 1920)
>[679533.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3aee9d0]
>[679533.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3aee9d0] width 1920 pitch 7680 (/4 1920)
>[679534.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29291d0]
>[679534.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29291d0] width 1920 pitch 7680 (/4 1920)
>[679534.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a30d0]
>[679534.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a30d0] width 1920 pitch 7680 (/4 1920)
>[679553.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b5cc0]
>[679553.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b5cc0] width 1920 pitch 7680 (/4 1920)
>[679554.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d590]
>[679554.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d590] width 1920 pitch 7680 (/4 1920)
>[679555.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d6a0]
>[679555.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d6a0] width 1920 pitch 7680 (/4 1920)
>[679555.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679555.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679555.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d6a0]
>[679555.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d6a0] width 1920 pitch 7680 (/4 1920)
>[679555.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679555.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679555.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d6a0]
>[679555.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d6a0] width 1920 pitch 7680 (/4 1920)
>[679555.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679556.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679556.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497d6a0]
>[679556.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497d6a0] width 1920 pitch 7680 (/4 1920)
>[679556.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679556.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679556.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x403dc70]
>[679556.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x403dc70] width 1920 pitch 7680 (/4 1920)
>[679556.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679556.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679556.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922ac0]
>[679556.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922ac0] width 1920 pitch 7680 (/4 1920)
>[679556.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679556.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679556.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922ac0]
>[679556.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922ac0] width 1920 pitch 7680 (/4 1920)
>[679556.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679556.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679556.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922ac0]
>[679556.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922ac0] width 1920 pitch 7680 (/4 1920)
>[679556.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679556.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679556.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4922ac0]
>[679556.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4922ac0] width 1920 pitch 7680 (/4 1920)
>[679556.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50a8590]
>[679557.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50a8590] width 1920 pitch 7680 (/4 1920)
>[679557.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d08820]
>[679557.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d08820] width 1920 pitch 7680 (/4 1920)
>[679557.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b06e90]
>[679557.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b06e90] width 1920 pitch 7680 (/4 1920)
>[679557.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e8d430]
>[679557.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e8d430] width 1920 pitch 7680 (/4 1920)
>[679557.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b0d0]
>[679557.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b0d0] width 1920 pitch 7680 (/4 1920)
>[679557.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3115900]
>[679557.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3115900] width 1920 pitch 7680 (/4 1920)
>[679557.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097630]
>[679557.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097630] width 1920 pitch 7680 (/4 1920)
>[679557.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679557.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679557.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097630]
>[679557.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097630] width 1920 pitch 7680 (/4 1920)
>[679557.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679557.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679557.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097630]
>[679557.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097630] width 1920 pitch 7680 (/4 1920)
>[679557.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679557.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679557.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097630]
>[679557.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097630] width 1920 pitch 7680 (/4 1920)
>[679557.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679557.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679557.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097630]
>[679557.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097630] width 1920 pitch 7680 (/4 1920)
>[679557.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679557.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679557.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3097630]
>[679557.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3097630] width 1920 pitch 7680 (/4 1920)
>[679557.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679557.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679558.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b52440]
>[679558.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b52440] width 1920 pitch 7680 (/4 1920)
>[679558.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28ba240]
>[679558.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28ba240] width 1920 pitch 7680 (/4 1920)
>[679558.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[679558.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[679558.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5144f90]
>[679558.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5144f90] width 1920 pitch 7680 (/4 1920)
>[679559.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ff1790]
>[679559.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ff1790] width 1920 pitch 7680 (/4 1920)
>[679559.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a06d30]
>[679559.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a06d30] width 1920 pitch 7680 (/4 1920)
>[679560.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282e770]
>[679560.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282e770] width 1920 pitch 7680 (/4 1920)
>[679568.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c8a750]
>[679568.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c8a750] width 1920 pitch 7680 (/4 1920)
>[679598.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679598.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679598.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[679598.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[679598.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679598.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679598.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[679598.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[679598.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679598.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679598.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[679598.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[679598.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679598.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679598.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2937dc0]
>[679598.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2937dc0] width 1920 pitch 7680 (/4 1920)
>[679598.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679598.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679598.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28b5ee0]
>[679598.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28b5ee0] width 1920 pitch 7680 (/4 1920)
>[679598.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679598.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679598.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6287ff0]
>[679598.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6287ff0] width 1920 pitch 7680 (/4 1920)
>[679598.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc3550]
>[679599.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc3550] width 1920 pitch 7680 (/4 1920)
>[679599.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6287ff0]
>[679599.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6287ff0] width 1920 pitch 7680 (/4 1920)
>[679599.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fc3550]
>[679599.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fc3550] width 1920 pitch 7680 (/4 1920)
>[679599.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6287ff0]
>[679599.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6287ff0] width 1920 pitch 7680 (/4 1920)
>[679599.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29f8d40]
>[679599.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29f8d40] width 1920 pitch 7680 (/4 1920)
>[679599.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50dbc90]
>[679599.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50dbc90] width 1920 pitch 7680 (/4 1920)
>[679599.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f0d050]
>[679599.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f0d050] width 1920 pitch 7680 (/4 1920)
>[679599.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[679599.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[679599.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679599.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679599.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a646e0]
>[679599.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a646e0] width 1920 pitch 7680 (/4 1920)
>[679599.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38cd740]
>[679600.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38cd740] width 1920 pitch 7680 (/4 1920)
>[679600.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd8d0]
>[679600.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd8d0] width 1920 pitch 7680 (/4 1920)
>[679600.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b0d0]
>[679600.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b0d0] width 1920 pitch 7680 (/4 1920)
>[679600.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48203a0]
>[679600.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48203a0] width 1920 pitch 7680 (/4 1920)
>[679600.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b0d0]
>[679600.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b0d0] width 1920 pitch 7680 (/4 1920)
>[679600.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48203a0]
>[679600.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48203a0] width 1920 pitch 7680 (/4 1920)
>[679600.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b0d0]
>[679600.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b0d0] width 1920 pitch 7680 (/4 1920)
>[679600.111] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48203a0]
>[679600.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48203a0] width 1920 pitch 7680 (/4 1920)
>[679600.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b0d0]
>[679600.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b0d0] width 1920 pitch 7680 (/4 1920)
>[679600.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48203a0]
>[679600.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48203a0] width 1920 pitch 7680 (/4 1920)
>[679600.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x489b0d0]
>[679600.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x489b0d0] width 1920 pitch 7680 (/4 1920)
>[679600.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48203a0]
>[679600.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48203a0] width 1920 pitch 7680 (/4 1920)
>[679601.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679601.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679601.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497cdb0]
>[679601.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497cdb0] width 1920 pitch 7680 (/4 1920)
>[679601.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x255c8b0]
>[679601.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x255c8b0] width 1920 pitch 7680 (/4 1920)
>[679601.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0350]
>[679602.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0350] width 1920 pitch 7680 (/4 1920)
>[679602.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679602.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679602.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f056e0]
>[679602.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f056e0] width 1920 pitch 7680 (/4 1920)
>[679602.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x289ebb0]
>[679602.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x289ebb0] width 1920 pitch 7680 (/4 1920)
>[679613.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29321b0]
>[679613.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29321b0] width 1920 pitch 7680 (/4 1920)
>[679626.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296aed0]
>[679626.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296aed0] width 1920 pitch 7680 (/4 1920)
>[679626.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20ad0]
>[679626.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20ad0] width 1920 pitch 7680 (/4 1920)
>[679626.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296aed0]
>[679626.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296aed0] width 1920 pitch 7680 (/4 1920)
>[679626.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20ad0]
>[679626.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20ad0] width 1920 pitch 7680 (/4 1920)
>[679626.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x296aed0]
>[679626.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x296aed0] width 1920 pitch 7680 (/4 1920)
>[679626.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a20ad0]
>[679626.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a20ad0] width 1920 pitch 7680 (/4 1920)
>[679626.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8970]
>[679626.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8970] width 1920 pitch 7680 (/4 1920)
>[679626.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70f20]
>[679626.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70f20] width 1920 pitch 7680 (/4 1920)
>[679626.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8970]
>[679626.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8970] width 1920 pitch 7680 (/4 1920)
>[679626.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70f20]
>[679626.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70f20] width 1920 pitch 7680 (/4 1920)
>[679626.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ff8970]
>[679626.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ff8970] width 1920 pitch 7680 (/4 1920)
>[679626.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f120]
>[679626.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f120] width 1920 pitch 7680 (/4 1920)
>[679626.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fbc910]
>[679626.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fbc910] width 1920 pitch 7680 (/4 1920)
>[679626.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a4f120]
>[679626.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a4f120] width 1920 pitch 7680 (/4 1920)
>[679626.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4833e10]
>[679626.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4833e10] width 1920 pitch 7680 (/4 1920)
>[679626.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26030]
>[679626.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26030] width 1920 pitch 7680 (/4 1920)
>[679626.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd1600]
>[679626.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd1600] width 1920 pitch 7680 (/4 1920)
>[679627.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ed7b40]
>[679627.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ed7b40] width 1920 pitch 7680 (/4 1920)
>[679627.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5650]
>[679627.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5650] width 1920 pitch 7680 (/4 1920)
>[679627.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49c81f0]
>[679627.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49c81f0] width 1920 pitch 7680 (/4 1920)
>[679627.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a646e0]
>[679627.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a646e0] width 1920 pitch 7680 (/4 1920)
>[679627.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b06e90]
>[679627.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b06e90] width 1920 pitch 7680 (/4 1920)
>[679627.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a646e0]
>[679627.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a646e0] width 1920 pitch 7680 (/4 1920)
>[679627.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62030b0]
>[679627.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62030b0] width 1920 pitch 7680 (/4 1920)
>[679627.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3923eb0]
>[679627.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3923eb0] width 1920 pitch 7680 (/4 1920)
>[679627.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[679627.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[679627.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3923eb0]
>[679627.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3923eb0] width 1920 pitch 7680 (/4 1920)
>[679627.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[679627.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[679627.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3923eb0]
>[679627.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3923eb0] width 1920 pitch 7680 (/4 1920)
>[679627.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[679627.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[679627.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3923eb0]
>[679627.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3923eb0] width 1920 pitch 7680 (/4 1920)
>[679627.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3fcd090]
>[679627.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3fcd090] width 1920 pitch 7680 (/4 1920)
>[679627.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3923eb0]
>[679627.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3923eb0] width 1920 pitch 7680 (/4 1920)
>[679629.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29fa700]
>[679629.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29fa700] width 1920 pitch 7680 (/4 1920)
>[679629.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3bbf680]
>[679629.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3bbf680] width 1920 pitch 7680 (/4 1920)
>[679629.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca4b90]
>[679629.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca4b90] width 1920 pitch 7680 (/4 1920)
>[679629.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2945130]
>[679629.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2945130] width 1920 pitch 7680 (/4 1920)
>[679629.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3944480]
>[679629.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3944480] width 1920 pitch 7680 (/4 1920)
>[679630.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b2d110]
>[679630.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b2d110] width 1920 pitch 7680 (/4 1920)
>[679630.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x536d2a0]
>[679630.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x536d2a0] width 1920 pitch 7680 (/4 1920)
>[679635.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[679635.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[679635.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[679635.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[679635.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[679635.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[679635.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c08d0]
>[679635.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c08d0] width 1920 pitch 7680 (/4 1920)
>[679635.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018fa0]
>[679635.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018fa0] width 1920 pitch 7680 (/4 1920)
>[679635.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018fa0]
>[679635.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018fa0] width 1920 pitch 7680 (/4 1920)
>[679635.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018fa0]
>[679635.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018fa0] width 1920 pitch 7680 (/4 1920)
>[679635.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018fa0]
>[679635.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018fa0] width 1920 pitch 7680 (/4 1920)
>[679635.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cb5a0]
>[679635.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cb5a0] width 1920 pitch 7680 (/4 1920)
>[679635.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5018fa0]
>[679635.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5018fa0] width 1920 pitch 7680 (/4 1920)
>[679637.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x497cdb0]
>[679637.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x497cdb0] width 1920 pitch 7680 (/4 1920)
>[679637.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49a5a20]
>[679637.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49a5a20] width 1920 pitch 7680 (/4 1920)
>[679637.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d16f70]
>[679637.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d16f70] width 1920 pitch 7680 (/4 1920)
>[679637.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfc1e0]
>[679638.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfc1e0] width 1920 pitch 7680 (/4 1920)
>[679638.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[679638.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[679638.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679638.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679638.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[679638.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[679638.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679638.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679638.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[679638.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[679638.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679638.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679638.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[679638.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[679638.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679638.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679638.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[679638.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[679638.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679638.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679638.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400a690]
>[679638.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400a690] width 1920 pitch 7680 (/4 1920)
>[679638.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ebb1e0]
>[679638.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ebb1e0] width 1920 pitch 7680 (/4 1920)
>[679639.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x39dfae0]
>[679639.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x39dfae0] width 1920 pitch 7680 (/4 1920)
>[679639.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a6f800]
>[679639.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a6f800] width 1920 pitch 7680 (/4 1920)
>[679639.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9e670]
>[679639.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9e670] width 1920 pitch 7680 (/4 1920)
>[679640.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cfc1e0]
>[679640.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cfc1e0] width 1920 pitch 7680 (/4 1920)
>[679643.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3915810]
>[679643.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3915810] width 1920 pitch 7680 (/4 1920)
>[679644.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2c13150]
>[679644.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2c13150] width 1920 pitch 7680 (/4 1920)
>[679644.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2963a70]
>[679644.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2963a70] width 1920 pitch 7680 (/4 1920)
>[679644.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4d7ca80]
>[679644.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4d7ca80] width 1920 pitch 7680 (/4 1920)
>[679655.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71ec0]
>[679655.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71ec0] width 1920 pitch 7680 (/4 1920)
>[679655.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679655.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679655.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71ec0]
>[679655.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71ec0] width 1920 pitch 7680 (/4 1920)
>[679655.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679655.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679655.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71ec0]
>[679656.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71ec0] width 1920 pitch 7680 (/4 1920)
>[679656.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679656.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679656.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4f71ec0]
>[679656.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4f71ec0] width 1920 pitch 7680 (/4 1920)
>[679656.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679656.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679656.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4ba0]
>[679656.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4ba0] width 1920 pitch 7680 (/4 1920)
>[679656.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679656.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679656.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4ba0]
>[679656.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4ba0] width 1920 pitch 7680 (/4 1920)
>[679656.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679656.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679656.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24c4ba0]
>[679656.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24c4ba0] width 1920 pitch 7680 (/4 1920)
>[679656.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679656.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679656.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25aa0]
>[679656.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25aa0] width 1920 pitch 7680 (/4 1920)
>[679656.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50473b0]
>[679656.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50473b0] width 1920 pitch 7680 (/4 1920)
>[679656.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a25aa0]
>[679656.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a25aa0] width 1920 pitch 7680 (/4 1920)
>[679657.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2bbd8d0]
>[679657.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2bbd8d0] width 1920 pitch 7680 (/4 1920)
>[679658.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48203a0]
>[679658.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48203a0] width 1920 pitch 7680 (/4 1920)
>[679658.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d9acc0]
>[679658.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d9acc0] width 1920 pitch 7680 (/4 1920)
>[679658.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d41130]
>[679658.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d41130] width 1920 pitch 7680 (/4 1920)
>[679658.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25634b0]
>[679658.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25634b0] width 1920 pitch 7680 (/4 1920)
>[679658.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679658.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679658.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679658.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679658.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679658.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679658.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679658.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679658.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679658.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679658.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679658.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679658.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679658.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679658.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679658.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679658.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679658.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679658.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2fcda20]
>[679658.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2fcda20] width 1920 pitch 7680 (/4 1920)
>[679658.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5048d00]
>[679658.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5048d00] width 1920 pitch 7680 (/4 1920)
>[679658.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca9c70]
>[679658.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca9c70] width 1920 pitch 7680 (/4 1920)
>[679658.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38e7380]
>[679659.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38e7380] width 1920 pitch 7680 (/4 1920)
>[679659.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679659.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679659.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679659.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679659.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679659.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679659.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679659.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679659.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679659.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679659.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679659.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679659.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679659.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679659.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679659.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679659.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b2d480]
>[679659.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b2d480] width 1920 pitch 7680 (/4 1920)
>[679659.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3f89f80]
>[679659.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3f89f80] width 1920 pitch 7680 (/4 1920)
>[679660.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314a780]
>[679660.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314a780] width 1920 pitch 7680 (/4 1920)
>[679660.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b835d0]
>[679660.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b835d0] width 1920 pitch 7680 (/4 1920)
>[679660.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x314a780]
>[679660.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x314a780] width 1920 pitch 7680 (/4 1920)
>[679660.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b835d0]
>[679660.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b835d0] width 1920 pitch 7680 (/4 1920)
>[679660.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x508e860]
>[679660.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x508e860] width 1920 pitch 7680 (/4 1920)
>[679660.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5093a90]
>[679660.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5093a90] width 1920 pitch 7680 (/4 1920)
>[679660.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x251a320]
>[679660.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x251a320] width 1920 pitch 7680 (/4 1920)
>[679660.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x398e030]
>[679660.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x398e030] width 1920 pitch 7680 (/4 1920)
>[679660.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e26030]
>[679660.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e26030] width 1920 pitch 7680 (/4 1920)
>[679660.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[679660.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[679660.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c6c0]
>[679660.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c6c0] width 1920 pitch 7680 (/4 1920)
>[679660.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4820560]
>[679660.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4820560] width 1920 pitch 7680 (/4 1920)
>[679660.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e6c6c0]
>[679660.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e6c6c0] width 1920 pitch 7680 (/4 1920)
>[679660.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ca0350]
>[679660.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ca0350] width 1920 pitch 7680 (/4 1920)
>[679660.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679660.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679660.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d70810]
>[679660.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d70810] width 1920 pitch 7680 (/4 1920)
>[679660.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679660.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679660.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d70810]
>[679660.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d70810] width 1920 pitch 7680 (/4 1920)
>[679660.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679660.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679660.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d70810]
>[679661.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d70810] width 1920 pitch 7680 (/4 1920)
>[679661.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679661.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679661.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679662.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679662.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679662.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679662.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679662.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679662.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679662.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679662.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679662.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679662.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679662.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679662.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679662.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679662.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679662.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679662.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679662.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679662.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679662.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679662.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eb1ca0]
>[679662.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eb1ca0] width 1920 pitch 7680 (/4 1920)
>[679662.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3c31aa0]
>[679662.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3c31aa0] width 1920 pitch 7680 (/4 1920)
>[679664.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679664.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a428d0]
>[679664.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a428d0] width 1920 pitch 7680 (/4 1920)
>[679664.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d83bb0]
>[679664.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d83bb0] width 1920 pitch 7680 (/4 1920)
>[679670.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6a680]
>[679670.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6a680] width 1920 pitch 7680 (/4 1920)
>[679670.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6a680]
>[679670.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6a680] width 1920 pitch 7680 (/4 1920)
>[679670.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6a680]
>[679670.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6a680] width 1920 pitch 7680 (/4 1920)
>[679670.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6a680]
>[679670.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6a680] width 1920 pitch 7680 (/4 1920)
>[679670.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30e20]
>[679670.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30e20] width 1920 pitch 7680 (/4 1920)
>[679670.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30e20]
>[679670.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30e20] width 1920 pitch 7680 (/4 1920)
>[679670.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30e20]
>[679670.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30e20] width 1920 pitch 7680 (/4 1920)
>[679670.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30e20]
>[679670.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30e20] width 1920 pitch 7680 (/4 1920)
>[679670.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eba400]
>[679670.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eba400] width 1920 pitch 7680 (/4 1920)
>[679670.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30e20]
>[679670.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30e20] width 1920 pitch 7680 (/4 1920)
>[679681.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2b30e20]
>[679681.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2b30e20] width 1920 pitch 7680 (/4 1920)
>[679688.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4031530]
>[679688.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4031530] width 1920 pitch 7680 (/4 1920)
>[679698.840] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e89390]
>[679698.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e89390] width 1920 pitch 7680 (/4 1920)
>[679698.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4e89390]
>[679698.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4e89390] width 1920 pitch 7680 (/4 1920)
>[679698.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679698.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679699.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679699.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679699.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x30d82f0]
>[679699.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x30d82f0] width 1920 pitch 7680 (/4 1920)
>[679700.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244690]
>[679700.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244690] width 1920 pitch 7680 (/4 1920)
>[679700.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623b830]
>[679700.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623b830] width 1920 pitch 7680 (/4 1920)
>[679703.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244f60]
>[679703.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244f60] width 1920 pitch 7680 (/4 1920)
>[679719.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fff8c0]
>[679719.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fff8c0] width 1920 pitch 7680 (/4 1920)
>[679793.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x257bd00]
>[679793.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x257bd00] width 1920 pitch 7680 (/4 1920)
>[679796.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9cec0]
>[679796.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9cec0] width 1920 pitch 7680 (/4 1920)
>[679796.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4912fa0]
>[679796.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4912fa0] width 1920 pitch 7680 (/4 1920)
>[679796.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9cec0]
>[679796.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9cec0] width 1920 pitch 7680 (/4 1920)
>[679796.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4912fa0]
>[679796.159] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4912fa0] width 1920 pitch 7680 (/4 1920)
>[679796.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9cec0]
>[679796.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9cec0] width 1920 pitch 7680 (/4 1920)
>[679796.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4912fa0]
>[679796.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4912fa0] width 1920 pitch 7680 (/4 1920)
>[679796.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9cec0]
>[679796.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9cec0] width 1920 pitch 7680 (/4 1920)
>[679796.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6235390]
>[679796.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6235390] width 1920 pitch 7680 (/4 1920)
>[679796.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9cec0]
>[679796.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9cec0] width 1920 pitch 7680 (/4 1920)
>[679796.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679796.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679796.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679796.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679796.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9c7e0]
>[679796.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9c7e0] width 1920 pitch 7680 (/4 1920)
>[679796.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2eda010]
>[679796.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2eda010] width 1920 pitch 7680 (/4 1920)
>[679796.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679796.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679796.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b9c7e0]
>[679796.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b9c7e0] width 1920 pitch 7680 (/4 1920)
>[679796.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679796.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679796.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x507f7a0]
>[679796.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x507f7a0] width 1920 pitch 7680 (/4 1920)
>[679797.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b1c0]
>[679797.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b1c0] width 1920 pitch 7680 (/4 1920)
>[679799.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.509] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.626] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.676] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679799.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4816540]
>[679799.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4816540] width 1920 pitch 7680 (/4 1920)
>[679799.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x492e530]
>[679799.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x492e530] width 1920 pitch 7680 (/4 1920)
>[679808.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2d70810]
>[679808.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2d70810] width 1920 pitch 7680 (/4 1920)
>[679823.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d7b1c0]
>[679823.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d7b1c0] width 1920 pitch 7680 (/4 1920)
>[679838.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e41350]
>[679838.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e41350] width 1920 pitch 7680 (/4 1920)
>[679855.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x297e610]
>[679855.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x297e610] width 1920 pitch 7680 (/4 1920)
>[679855.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679855.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd02c0]
>[679855.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd02c0] width 1920 pitch 7680 (/4 1920)
>[679855.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f0cf20]
>[679855.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f0cf20] width 1920 pitch 7680 (/4 1920)
>[679869.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96730]
>[679869.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96730] width 1920 pitch 7680 (/4 1920)
>[679869.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96730]
>[679869.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96730] width 1920 pitch 7680 (/4 1920)
>[679869.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96730]
>[679869.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96730] width 1920 pitch 7680 (/4 1920)
>[679869.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96730]
>[679869.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96730] width 1920 pitch 7680 (/4 1920)
>[679869.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96730]
>[679869.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96730] width 1920 pitch 7680 (/4 1920)
>[679869.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d96730]
>[679869.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d96730] width 1920 pitch 7680 (/4 1920)
>[679869.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470770]
>[679869.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470770] width 1920 pitch 7680 (/4 1920)
>[679869.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679869.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470770]
>[679869.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470770] width 1920 pitch 7680 (/4 1920)
>[679869.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b1480]
>[679869.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b1480] width 1920 pitch 7680 (/4 1920)
>[679874.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffc540]
>[679874.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffc540] width 1920 pitch 7680 (/4 1920)
>[679874.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffc540]
>[679874.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffc540] width 1920 pitch 7680 (/4 1920)
>[679874.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffc540]
>[679874.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffc540] width 1920 pitch 7680 (/4 1920)
>[679874.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679874.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679874.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679874.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679874.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679874.965] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679874.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679874.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679874.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679874.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679874.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679875.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679875.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ffc540]
>[679875.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ffc540] width 1920 pitch 7680 (/4 1920)
>[679875.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61193f0]
>[679875.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61193f0] width 1920 pitch 7680 (/4 1920)
>[679881.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679881.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679881.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679881.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679881.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679881.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679881.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679881.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679881.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679881.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679881.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6244550]
>[679881.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6244550] width 1920 pitch 7680 (/4 1920)
>[679881.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6117240]
>[679881.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6117240] width 1920 pitch 7680 (/4 1920)
>[679881.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6117240]
>[679881.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6117240] width 1920 pitch 7680 (/4 1920)
>[679881.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd2f20]
>[679881.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd2f20] width 1920 pitch 7680 (/4 1920)
>[679881.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6117240]
>[679881.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6117240] width 1920 pitch 7680 (/4 1920)
>[679911.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee12f0]
>[679911.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee12f0] width 1920 pitch 7680 (/4 1920)
>[679911.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62443c0]
>[679912.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62443c0] width 1920 pitch 7680 (/4 1920)
>[679912.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[679912.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[679912.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62443c0]
>[679912.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62443c0] width 1920 pitch 7680 (/4 1920)
>[679925.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x38c6990]
>[679925.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x38c6990] width 1920 pitch 7680 (/4 1920)
>[679927.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee12f0]
>[679927.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee12f0] width 1920 pitch 7680 (/4 1920)
>[679927.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee12f0]
>[679927.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee12f0] width 1920 pitch 7680 (/4 1920)
>[679927.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x62443c0]
>[679927.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x62443c0] width 1920 pitch 7680 (/4 1920)
>[679928.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c8c0]
>[679928.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c8c0] width 1920 pitch 7680 (/4 1920)
>[679943.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ee12f0]
>[679943.720] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ee12f0] width 1920 pitch 7680 (/4 1920)
>[679958.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c8c0]
>[679958.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c8c0] width 1920 pitch 7680 (/4 1920)
>[679973.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c8c0]
>[679973.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c8c0] width 1920 pitch 7680 (/4 1920)
>[679988.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c8c0]
>[679988.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c8c0] width 1920 pitch 7680 (/4 1920)
>[680003.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x400c8c0]
>[680003.692] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x400c8c0] width 1920 pitch 7680 (/4 1920)
>[680048.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680048.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680063.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49dbf80]
>[680063.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49dbf80] width 1920 pitch 7680 (/4 1920)
>[680108.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680108.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680123.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680123.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680138.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x292cea0]
>[680138.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x292cea0] width 1920 pitch 7680 (/4 1920)
>[680168.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680168.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680183.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49dbf80]
>[680183.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49dbf80] width 1920 pitch 7680 (/4 1920)
>[680198.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49dbf80]
>[680198.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49dbf80] width 1920 pitch 7680 (/4 1920)
>[680206.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680206.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680206.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680206.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680206.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680206.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680206.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680206.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680206.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680206.908] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680206.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680206.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680206.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680206.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680206.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680206.958] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680207.095] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680207.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680208.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680208.925] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680208.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680208.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680208.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680209.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680209.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680209.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680210.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680210.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680210.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5275e60]
>[680210.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5275e60] width 1920 pitch 7680 (/4 1920)
>[680210.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680210.991] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680211.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680211.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680211.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680211.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680211.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680211.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680211.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680211.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680211.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680211.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680211.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680211.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680211.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680211.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680211.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680211.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680211.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680211.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680212.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4906000]
>[680212.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4906000] width 1920 pitch 7680 (/4 1920)
>[680213.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680213.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680213.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680213.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680213.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680213.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680213.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49aa390]
>[680213.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49aa390] width 1920 pitch 7680 (/4 1920)
>[680228.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5275e60]
>[680228.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5275e60] width 1920 pitch 7680 (/4 1920)
>[680237.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680237.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680238.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4989a90]
>[680238.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4989a90] width 1920 pitch 7680 (/4 1920)
>[680238.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680238.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680238.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680238.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680243.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680243.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680258.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680258.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680273.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623c070]
>[680273.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623c070] width 1920 pitch 7680 (/4 1920)
>[680333.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe5b50]
>[680333.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe5b50] width 1920 pitch 7680 (/4 1920)
>[680348.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e9fef0]
>[680348.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e9fef0] width 1920 pitch 7680 (/4 1920)
>[680378.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4934c80]
>[680378.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4934c80] width 1920 pitch 7680 (/4 1920)
>[680393.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x391b740]
>[680393.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x391b740] width 1920 pitch 7680 (/4 1920)
>[680408.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6ee50]
>[680408.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6ee50] width 1920 pitch 7680 (/4 1920)
>[680438.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fe480]
>[680438.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fe480] width 1920 pitch 7680 (/4 1920)
>[680453.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6293150]
>[680453.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6293150] width 1920 pitch 7680 (/4 1920)
>[680468.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x61fe480]
>[680468.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x61fe480] width 1920 pitch 7680 (/4 1920)
>[680483.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6ee50]
>[680483.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6ee50] width 1920 pitch 7680 (/4 1920)
>[680498.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6293150]
>[680498.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6293150] width 1920 pitch 7680 (/4 1920)
>[680513.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6ee50]
>[680513.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6ee50] width 1920 pitch 7680 (/4 1920)
>[680528.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680528.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680543.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x309d100]
>[680543.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x309d100] width 1920 pitch 7680 (/4 1920)
>[680558.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4fe23c0]
>[680558.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4fe23c0] width 1920 pitch 7680 (/4 1920)
>[680678.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680678.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680693.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680693.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680723.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680723.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680728.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28199c0]
>[680728.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28199c0] width 1920 pitch 7680 (/4 1920)
>[680728.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3b6e8f0]
>[680728.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3b6e8f0] width 1920 pitch 7680 (/4 1920)
>[680738.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3edbde0]
>[680738.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3edbde0] width 1920 pitch 7680 (/4 1920)
>[680768.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x622f6e0]
>[680768.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x622f6e0] width 1920 pitch 7680 (/4 1920)
>[680789.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a023d0]
>[680789.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a023d0] width 1920 pitch 7680 (/4 1920)
>[680802.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29b4060]
>[680802.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29b4060] width 1920 pitch 7680 (/4 1920)
>[680802.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a023d0]
>[680802.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a023d0] width 1920 pitch 7680 (/4 1920)
>[680802.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b2920]
>[680802.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b2920] width 1920 pitch 7680 (/4 1920)
>[680802.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a023d0]
>[680802.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a023d0] width 1920 pitch 7680 (/4 1920)
>[680802.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b2920]
>[680802.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b2920] width 1920 pitch 7680 (/4 1920)
>[680802.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a023d0]
>[680802.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a023d0] width 1920 pitch 7680 (/4 1920)
>[680802.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x50b2920]
>[680802.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x50b2920] width 1920 pitch 7680 (/4 1920)
>[680802.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48156b0]
>[680802.704] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48156b0] width 1920 pitch 7680 (/4 1920)
>[680802.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2944170]
>[680802.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2944170] width 1920 pitch 7680 (/4 1920)
>[680813.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2943560]
>[680813.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2943560] width 1920 pitch 7680 (/4 1920)
>[680820.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623ad50]
>[680820.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623ad50] width 1920 pitch 7680 (/4 1920)
>[680822.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3155b20]
>[680822.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3155b20] width 1920 pitch 7680 (/4 1920)
>[680823.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623b140]
>[680823.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623b140] width 1920 pitch 7680 (/4 1920)
>[680823.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578da0]
>[680823.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578da0] width 1920 pitch 7680 (/4 1920)
>[680823.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25c1310]
>[680823.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25c1310] width 1920 pitch 7680 (/4 1920)
>[680826.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578da0]
>[680826.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578da0] width 1920 pitch 7680 (/4 1920)
>[680831.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623ab00]
>[680831.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623ab00] width 1920 pitch 7680 (/4 1920)
>[680831.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578da0]
>[680831.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578da0] width 1920 pitch 7680 (/4 1920)
>[680831.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x499af00]
>[680831.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x499af00] width 1920 pitch 7680 (/4 1920)
>[680888.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c19a0]
>[680888.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c19a0] width 1920 pitch 7680 (/4 1920)
>[680903.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be2e20]
>[680903.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be2e20] width 1920 pitch 7680 (/4 1920)
>[680918.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2578da0]
>[680918.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2578da0] width 1920 pitch 7680 (/4 1920)
>[680933.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x623ab00]
>[680933.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x623ab00] width 1920 pitch 7680 (/4 1920)
>[680948.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x293a410]
>[680948.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x293a410] width 1920 pitch 7680 (/4 1920)
>[680978.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3966c20]
>[680978.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3966c20] width 1920 pitch 7680 (/4 1920)
>[680993.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2512b80]
>[680993.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2512b80] width 1920 pitch 7680 (/4 1920)
>[681008.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3a05e60]
>[681008.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3a05e60] width 1920 pitch 7680 (/4 1920)
>[681023.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e52410]
>[681023.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e52410] width 1920 pitch 7680 (/4 1920)

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Attachments on bug 852936: 608039 | 608040 | 608041