Attachment 614068 Details for Bug 858343 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 468.91 KB, created by dobs on 2012-09-18 17:47:06 UTC

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Creator: dobs

Created: 2012-09-18 17:47:06 UTC

Size: 468.91 KB

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obsolete

>[     7.938] 
>X.Org X Server 1.12.3
>Release Date: 2012-07-09
>[     7.938] X Protocol Version 11, Revision 0
>[     7.938] Build Operating System:  2.6.32-279.2.1.el6.x86_64 
>[     7.938] Current Operating System: Linux wifi.ua-top.net 3.4.6-2.fc17.x86_64 #1 SMP Thu Jul 19 22:54:16 UTC 2012 x86_64
>[     7.960] Kernel command line: BOOT_IMAGE=/vmlinuz-3.4.6-2.fc17.x86_64 root=/dev/mapper/vg_wifi-lv_root ro rd.md=0 rd.dm=0 rd.lvm.lv=vg_wifi/lv_swap KEYTABLE=us quiet SYSFONT=latarcyrheb-sun16 rw rd.info rd.convertfs enforcing=0 rd.luks=0 rd.lvm.lv=vg_wifi/lv_root LANG=en_US.UTF-8 elevator=noop
>[     7.960] Build Date: 20 August 2012  02:12:31AM
>[     7.960] Build ID: xorg-x11-server 1.12.3-1.fc17 
>[     7.960] Current version of pixman: 0.24.4
>[     7.960] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[     7.960] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[     7.962] (==) Log file: "/var/log/Xorg.0.log", Time: Mon Sep 17 22:23:37 2012
>[     7.974] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[     7.974] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[     7.974] (==) No Layout section.  Using the first Screen section.
>[     7.974] (==) No screen section available. Using defaults.
>[     7.974] (**) |-->Screen "Default Screen Section" (0)
>[     7.974] (**) |   |-->Monitor "<default monitor>"
>[     7.976] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[     7.976] (==) Automatically adding devices
>[     7.976] (==) Automatically enabling devices
>[     7.976] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[     7.976] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[     7.976] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[     7.976] (II) Loader magic: 0x7c6ac0
>[     7.976] (II) Module ABI versions:
>[     7.977] 	X.Org ANSI C Emulation: 0.4
>[     7.977] 	X.Org Video Driver: 12.0
>[     7.977] 	X.Org XInput driver : 16.0
>[     7.977] 	X.Org Server Extension : 6.0
>[     7.993] (--) PCI:*(0:1:0:0) 1002:7196:103c:30d7 rev 0, Mem @ 0xd0000000/134217728, 0xdc400000/65536, I/O @ 0x00004000/256, BIOS @ 0x????????/131072
>[     7.993] (II) LoadModule: "extmod"
>[     7.994] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[     7.997] (II) Module extmod: vendor="X.Org Foundation"
>[     7.997] 	compiled for 1.12.3, module version = 1.0.0
>[     7.997] 	Module class: X.Org Server Extension
>[     7.997] 	ABI class: X.Org Server Extension, version 6.0
>[     7.997] (II) Loading extension SELinux
>[     7.997] (II) Loading extension MIT-SCREEN-SAVER
>[     7.997] (II) Loading extension XFree86-VidModeExtension
>[     7.997] (II) Loading extension XFree86-DGA
>[     7.997] (II) Loading extension DPMS
>[     7.997] (II) Loading extension XVideo
>[     7.997] (II) Loading extension XVideo-MotionCompensation
>[     7.997] (II) Loading extension X-Resource
>[     7.997] (II) LoadModule: "dbe"
>[     8.007] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[     8.008] (II) Module dbe: vendor="X.Org Foundation"
>[     8.008] 	compiled for 1.12.3, module version = 1.0.0
>[     8.008] 	Module class: X.Org Server Extension
>[     8.008] 	ABI class: X.Org Server Extension, version 6.0
>[     8.008] (II) Loading extension DOUBLE-BUFFER
>[     8.008] (II) LoadModule: "glx"
>[     8.008] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[     8.008] (II) Module glx: vendor="X.Org Foundation"
>[     8.008] 	compiled for 1.12.3, module version = 1.0.0
>[     8.008] 	ABI class: X.Org Server Extension, version 6.0
>[     8.008] (==) AIGLX enabled
>[     8.008] (II) Loading extension GLX
>[     8.008] (II) LoadModule: "record"
>[     8.008] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[     8.009] (II) Module record: vendor="X.Org Foundation"
>[     8.009] 	compiled for 1.12.3, module version = 1.13.0
>[     8.009] 	Module class: X.Org Server Extension
>[     8.009] 	ABI class: X.Org Server Extension, version 6.0
>[     8.009] (II) Loading extension RECORD
>[     8.009] (II) LoadModule: "dri"
>[     8.009] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[     8.009] (II) Module dri: vendor="X.Org Foundation"
>[     8.009] 	compiled for 1.12.3, module version = 1.0.0
>[     8.009] 	ABI class: X.Org Server Extension, version 6.0
>[     8.009] (II) Loading extension XFree86-DRI
>[     8.009] (II) LoadModule: "dri2"
>[     8.016] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[     8.017] (II) Module dri2: vendor="X.Org Foundation"
>[     8.017] 	compiled for 1.12.3, module version = 1.2.0
>[     8.017] 	ABI class: X.Org Server Extension, version 6.0
>[     8.017] (II) Loading extension DRI2
>[     8.017] (==) Matched ati as autoconfigured driver 0
>[     8.017] (==) Matched vesa as autoconfigured driver 1
>[     8.017] (==) Matched modesetting as autoconfigured driver 2
>[     8.017] (==) Matched fbdev as autoconfigured driver 3
>[     8.017] (==) Assigned the driver to the xf86ConfigLayout
>[     8.017] (II) LoadModule: "ati"
>[     8.017] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[     8.020] (II) Module ati: vendor="X.Org Foundation"
>[     8.020] 	compiled for 1.12.0, module version = 6.14.99
>[     8.020] 	Module class: X.Org Video Driver
>[     8.020] 	ABI class: X.Org Video Driver, version 12.0
>[     8.020] (II) LoadModule: "radeon"
>[     8.020] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[     8.021] (II) Module radeon: vendor="X.Org Foundation"
>[     8.021] 	compiled for 1.12.0, module version = 6.14.99
>[     8.021] 	Module class: X.Org Video Driver
>[     8.021] 	ABI class: X.Org Video Driver, version 12.0
>[     8.021] (II) LoadModule: "vesa"
>[     8.021] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[     8.021] (II) Module vesa: vendor="X.Org Foundation"
>[     8.021] 	compiled for 1.12.0, module version = 2.3.1
>[     8.021] 	Module class: X.Org Video Driver
>[     8.021] 	ABI class: X.Org Video Driver, version 12.0
>[     8.030] (II) LoadModule: "modesetting"
>[     8.030] (II) Loading /usr/lib64/xorg/modules/drivers/modesetting_drv.so
>[     8.030] (II) Module modesetting: vendor="X.Org Foundation"
>[     8.030] 	compiled for 1.12.2, module version = 0.4.0
>[     8.030] 	Module class: X.Org Video Driver
>[     8.030] 	ABI class: X.Org Video Driver, version 12.0
>[     8.030] (II) LoadModule: "fbdev"
>[     8.030] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[     8.031] (II) Module fbdev: vendor="X.Org Foundation"
>[     8.031] 	compiled for 1.11.99.901, module version = 0.4.2
>[     8.031] 	ABI class: X.Org Video Driver, version 12.0
>[     8.031] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[     8.058] (II) VESA: driver for VESA chipsets: vesa
>[     8.058] (II) modesetting: Driver for Modesetting Kernel Drivers: kms
>[     8.059] (II) FBDEV: driver for framebuffer: fbdev
>[     8.059] (++) using VT number 1
>
>[     8.074] (II) [KMS] Kernel modesetting enabled.
>[     8.074] (WW) Falling back to old probe method for vesa
>[     8.074] (WW) Falling back to old probe method for modesetting
>[     8.074] (WW) Falling back to old probe method for fbdev
>[     8.074] (II) Loading sub module "fbdevhw"
>[     8.074] (II) LoadModule: "fbdevhw"
>[     8.075] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[     8.075] (II) Module fbdevhw: vendor="X.Org Foundation"
>[     8.075] 	compiled for 1.12.3, module version = 0.0.2
>[     8.075] 	ABI class: X.Org Video Driver, version 12.0
>[     8.075] (II) RADEON(0): RADEONPreInit_KMS
>[     8.075] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[     8.075] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[     8.075] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[     8.075] (==) RADEON(0): Default visual is TrueColor
>[     8.075] (==) RADEON(0): RGB weight 888
>[     8.075] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[     8.075] (--) RADEON(0): Chipset: "ATI Mobility Radeon X1350" (ChipID = 0x7196)
>[     8.075] (II) RADEON(0): PCIE card detected
>[     8.076] drmOpenDevice: node name is /dev/dri/card0
>[     8.076] drmOpenDevice: open result is 8, (OK)
>[     8.076] drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>[     8.076] drmOpenDevice: node name is /dev/dri/card0
>[     8.076] drmOpenDevice: open result is 8, (OK)
>[     8.076] drmOpenByBusid: drmOpenMinor returns 8
>[     8.076] drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>[     8.076] (II) Loading sub module "exa"
>[     8.076] (II) LoadModule: "exa"
>[     8.076] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[     8.076] (II) Module exa: vendor="X.Org Foundation"
>[     8.076] 	compiled for 1.12.3, module version = 2.5.0
>[     8.076] 	ABI class: X.Org Video Driver, version 12.0
>[     8.076] (II) RADEON(0): KMS Color Tiling: enabled
>[     8.076] (II) RADEON(0): KMS Pageflipping: enabled
>[     8.076] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[     8.124] (II) RADEON(0): Output VGA-0 has no monitor section
>[     8.124] (II) RADEON(0): Output LVDS has no monitor section
>[     8.149] (II) RADEON(0): Output S-video has no monitor section
>[     8.321] (II) RADEON(0): Output DVI-0 has no monitor section
>[     8.355] (II) RADEON(0): EDID for output VGA-0
>[     8.355] (II) RADEON(0): EDID for output LVDS
>[     8.355] (II) RADEON(0): Manufacturer: LPL  Model: a102  Serial#: 0
>[     8.355] (II) RADEON(0): Year: 2007  Week: 0
>[     8.355] (II) RADEON(0): EDID Version: 1.2
>[     8.355] (II) RADEON(0): Digital Display Input
>[     8.355] (II) RADEON(0): Max Image Size [cm]: horiz.: 37  vert.: 23
>[     8.355] (II) RADEON(0): Gamma: 2.20
>[     8.355] (II) RADEON(0): No DPMS capabilities specified
>[     8.355] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[     8.355] (II) RADEON(0): First detailed timing is preferred mode
>[     8.355] (II) RADEON(0): redX: 0.602 redY: 0.349   greenX: 0.323 greenY: 0.551
>[     8.355] (II) RADEON(0): blueX: 0.158 blueY: 0.141   whiteX: 0.313 whiteY: 0.329
>[     8.355] (II) RADEON(0): Manufacturer's mask: 0
>[     8.355] (II) RADEON(0): Supported detailed timing:
>[     8.355] (II) RADEON(0): clock: 96.2 MHz   Image Size:  367 x 230 mm
>[     8.355] (II) RADEON(0): h_active: 1440  h_sync: 1504  h_sync_end 1536 h_blank_end 1760 h_border: 0
>[     8.355] (II) RADEON(0): v_active: 900  v_sync: 901  v_sync_end 904 v_blanking: 912 v_border: 0
>[     8.355] (II) RADEON(0):  LGPhilipsLCD
>[     8.355] (II) RADEON(0):  LP171WP4-TLP1
>[     8.355] (II) RADEON(0): EDID (in hex):
>[     8.355] (II) RADEON(0): 	00ffffffffffff00320c02a100000000
>[     8.355] (II) RADEON(0): 	00110102802517780a1c859a59528d28
>[     8.355] (II) RADEON(0): 	24505400000001010101010101010101
>[     8.355] (II) RADEON(0): 	0101010101019525a04051840c304020
>[     8.355] (II) RADEON(0): 	13006fe6100000190000000000000000
>[     8.355] (II) RADEON(0): 	00000000000000000000000000fe004c
>[     8.355] (II) RADEON(0): 	475068696c6970734c43440a000000fe
>[     8.356] (II) RADEON(0): 	004c503137315750342d544c50310021
>[     8.356] (II) RADEON(0): Printing probed modes for output LVDS
>[     8.356] (II) RADEON(0): Modeline "1440x900"x59.9   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[     8.356] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[     8.356] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[     8.356] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[     8.356] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[     8.356] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[     8.356] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[     8.356] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[     8.356] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[     8.356] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[     8.356] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[     8.356] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[     8.356] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[     8.356] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[     8.356] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[     8.356] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[     8.356] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[     8.356] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[     8.356] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[     8.356] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[     8.356] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[     8.356] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[     8.356] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[     8.356] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[     8.356] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[     8.356] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[     8.386] (II) RADEON(0): EDID for output S-video
>[     8.530] (II) RADEON(0): EDID for output DVI-0
>[     8.530] (II) RADEON(0): Output VGA-0 disconnected
>[     8.530] (II) RADEON(0): Output LVDS connected
>[     8.530] (II) RADEON(0): Output S-video disconnected
>[     8.530] (II) RADEON(0): Output DVI-0 disconnected
>[     8.530] (II) RADEON(0): Using exact sizes for initial modes
>[     8.530] (II) RADEON(0): Output LVDS using initial mode 1440x900 +0+0
>[     8.530] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[     8.530] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:8000000 visible:7ab2000
>[     8.530] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[     8.530] (==) RADEON(0): DPI set to (96, 96)
>[     8.530] (II) Loading sub module "fb"
>[     8.530] (II) LoadModule: "fb"
>[     8.532] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[     8.533] (II) Module fb: vendor="X.Org Foundation"
>[     8.533] 	compiled for 1.12.3, module version = 1.0.0
>[     8.533] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[     8.533] (II) Loading sub module "ramdac"
>[     8.533] (II) LoadModule: "ramdac"
>[     8.533] (II) Module "ramdac" already built-in
>[     8.533] (II) UnloadModule: "vesa"
>[     8.533] (II) Unloading vesa
>[     8.533] (II) UnloadModule: "modesetting"
>[     8.533] (II) Unloading modesetting
>[     8.533] (II) UnloadModule: "fbdev"
>[     8.533] (II) Unloading fbdev
>[     8.533] (II) UnloadSubModule: "fbdevhw"
>[     8.533] (II) Unloading fbdevhw
>[     8.533] (--) Depth 24 pixmap format is 32 bpp
>[     8.534] (II) RADEON(0): [DRI2] Setup complete
>[     8.534] (II) RADEON(0): [DRI2]   DRI driver: r300
>[     8.535] (II) RADEON(0): [DRI2]   VDPAU driver: r300
>[     8.535] (II) RADEON(0): Front buffer size: 5244K
>[     8.535] (II) RADEON(0): VRAM usage limit set to 108356K
>[     8.536] (II) RADEON(0): Initializing backing store
>[     8.536] (==) RADEON(0): Backing store disabled
>[     8.536] (II) RADEON(0): Direct rendering enabled
>[     8.536] (II) RADEON(0): Initializing Acceleration
>[     8.536] (II) RADEON(0): Render acceleration enabled for R300/R400/R500 type cards.
>[     8.536] (II) RADEON(0): Setting EXA maxPitchBytes
>[     8.536] (II) RADEON(0): EngineInit (32/32)
>[     8.536] (II) EXA(0): Driver allocated offscreen pixmaps
>[     8.536] (II) EXA(0): Driver registered support for the following operations:
>[     8.536] (II)         Solid
>[     8.536] (II)         Copy
>[     8.536] (II)         Composite (RENDER acceleration)
>[     8.536] (II)         UploadToScreen
>[     8.536] (II)         DownloadFromScreen
>[     8.536] (II) RADEON(0): Acceleration enabled
>[     8.536] (II) RADEON(0): Initializing DPMS
>[     8.536] (==) RADEON(0): DPMS enabled
>[     8.536] (II) RADEON(0): Initializing Cursor
>[     8.536] (==) RADEON(0): Silken mouse enabled
>[     8.536] (II) RADEON(0): Initializing Xv
>[     8.536] (II) RADEON(0): Set up textured video
>[     8.536] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[     8.536] (II) RADEON(0): [XvMC] Extension initialized.
>[     8.536] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[     8.536] (II) RADEON(0): Initializing kms color map
>[     8.536] (II) RADEON(0): RADEONScreenInit finished
>[     8.537] (--) RandR disabled
>[     8.537] (II) Initializing built-in extension Generic Event Extension
>[     8.537] (II) Initializing built-in extension SHAPE
>[     8.537] (II) Initializing built-in extension MIT-SHM
>[     8.537] (II) Initializing built-in extension XInputExtension
>[     8.537] (II) Initializing built-in extension XTEST
>[     8.537] (II) Initializing built-in extension BIG-REQUESTS
>[     8.537] (II) Initializing built-in extension SYNC
>[     8.537] (II) Initializing built-in extension XKEYBOARD
>[     8.537] (II) Initializing built-in extension XC-MISC
>[     8.537] (II) Initializing built-in extension XINERAMA
>[     8.537] (II) Initializing built-in extension XFIXES
>[     8.537] (II) Initializing built-in extension RENDER
>[     8.537] (II) Initializing built-in extension RANDR
>[     8.537] (II) Initializing built-in extension COMPOSITE
>[     8.537] (II) Initializing built-in extension DAMAGE
>[     8.540] (II) SELinux: Disabled by boolean
>[     8.696] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[     8.696] (II) AIGLX: enabled GLX_INTEL_swap_event
>[     8.696] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[     8.696] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[     8.696] (II) AIGLX: Loaded and initialized r300
>[     8.696] (II) GLX: Initialized DRI2 GL provider for screen 0
>[     8.700] (II) RADEON(0): Setting screen physical size to 381 x 238
>[     8.764] (II) XKB: Reusing cached keymap
>[     8.769] (II) config/udev: Adding input device Power Button (/dev/input/event2)
>[     8.769] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[     8.769] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[     8.769] (II) LoadModule: "evdev"
>[     8.769] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[     8.769] (II) Module evdev: vendor="X.Org Foundation"
>[     8.769] 	compiled for 1.12.0, module version = 2.7.0
>[     8.769] 	Module class: X.Org XInput Driver
>[     8.769] 	ABI class: X.Org XInput driver, version 16.0
>[     8.769] (II) Using input driver 'evdev' for 'Power Button'
>[     8.769] 	Option "XkbRules" "evdev"
>[     8.769] 	Option "XkbModel" "pc105+inet"
>[     8.769] 	Option "XkbLayout" "us"
>[     8.769] 	Option "_source" "server/udev"
>[     8.769] 	Option "name" "Power Button"
>[     8.770] 	Option "path" "/dev/input/event2"
>[     8.770] 	Option "device" "/dev/input/event2"
>[     8.770] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2/event2"
>[     8.770] 	Option "driver" "evdev"
>[     8.770] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[     8.770] (**) Power Button: always reports core events
>[     8.770] (**) evdev: Power Button: Device: "/dev/input/event2"
>[     8.770] (--) evdev: Power Button: Vendor 0 Product 0x1
>[     8.770] (--) evdev: Power Button: Found keys
>[     8.770] (II) evdev: Power Button: Configuring as keyboard
>[     8.770] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input2/event2"
>[     8.770] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[     8.771] (**) Option "xkb_rules" "evdev"
>[     8.771] (**) Option "xkb_model" "pc105+inet"
>[     8.771] (**) Option "xkb_layout" "us"
>[     8.771] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[     8.810] (II) config/udev: Adding input device Video Bus (/dev/input/event6)
>[     8.810] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[     8.810] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[     8.810] (II) Using input driver 'evdev' for 'Video Bus'
>[     8.810] 	Option "XkbRules" "evdev"
>[     8.810] 	Option "XkbModel" "pc105+inet"
>[     8.810] 	Option "XkbLayout" "us"
>[     8.811] 	Option "_source" "server/udev"
>[     8.811] 	Option "name" "Video Bus"
>[     8.811] 	Option "path" "/dev/input/event6"
>[     8.811] 	Option "device" "/dev/input/event6"
>[     8.811] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[     8.811] 	Option "driver" "evdev"
>[     8.811] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[     8.811] (**) Video Bus: always reports core events
>[     8.811] (**) evdev: Video Bus: Device: "/dev/input/event6"
>[     8.811] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[     8.811] (--) evdev: Video Bus: Found keys
>[     8.811] (II) evdev: Video Bus: Configuring as keyboard
>[     8.811] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input6/event6"
>[     8.811] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[     8.811] (**) Option "xkb_rules" "evdev"
>[     8.811] (**) Option "xkb_model" "pc105+inet"
>[     8.811] (**) Option "xkb_layout" "us"
>[     8.811] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[     8.811] (II) XKB: Reusing cached keymap
>[     8.812] (II) config/udev: Adding input device Lid Switch (/dev/input/event1)
>[     8.812] (II) No input driver specified, ignoring this device.
>[     8.812] (II) This device may have been added with another device file.
>[     8.812] (II) config/udev: Adding input device Sleep Button (/dev/input/event0)
>[     8.812] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[     8.812] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[     8.812] (II) Using input driver 'evdev' for 'Sleep Button'
>[     8.812] 	Option "XkbRules" "evdev"
>[     8.812] 	Option "XkbModel" "pc105+inet"
>[     8.812] 	Option "XkbLayout" "us"
>[     8.812] 	Option "_source" "server/udev"
>[     8.812] 	Option "name" "Sleep Button"
>[     8.812] 	Option "path" "/dev/input/event0"
>[     8.812] 	Option "device" "/dev/input/event0"
>[     8.812] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input0/event0"
>[     8.812] 	Option "driver" "evdev"
>[     8.812] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[     8.812] (**) Sleep Button: always reports core events
>[     8.812] (**) evdev: Sleep Button: Device: "/dev/input/event0"
>[     8.812] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[     8.812] (--) evdev: Sleep Button: Found keys
>[     8.812] (II) evdev: Sleep Button: Configuring as keyboard
>[     8.812] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input0/event0"
>[     8.812] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 8)
>[     8.812] (**) Option "xkb_rules" "evdev"
>[     8.812] (**) Option "xkb_model" "pc105+inet"
>[     8.812] (**) Option "xkb_layout" "us"
>[     8.812] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[     8.812] (II) XKB: Reusing cached keymap
>[     8.813] (II) config/udev: Adding input device C-Media USB Headphone Set   (/dev/input/event5)
>[     8.813] (**) C-Media USB Headphone Set  : Applying InputClass "evdev keyboard catchall"
>[     8.813] (**) C-Media USB Headphone Set  : Applying InputClass "system-setup-keyboard"
>[     8.813] (II) Using input driver 'evdev' for 'C-Media USB Headphone Set  '
>[     8.813] 	Option "XkbRules" "evdev"
>[     8.813] 	Option "XkbModel" "pc105+inet"
>[     8.813] 	Option "XkbLayout" "us"
>[     8.813] 	Option "_source" "server/udev"
>[     8.814] 	Option "name" "C-Media USB Headphone Set  "
>[     8.814] 	Option "path" "/dev/input/event5"
>[     8.814] 	Option "device" "/dev/input/event5"
>[     8.814] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.4/2-2.4:1.3/input/input5/event5"
>[     8.814] 	Option "driver" "evdev"
>[     8.814] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[     8.814] (**) C-Media USB Headphone Set  : always reports core events
>[     8.814] (**) evdev: C-Media USB Headphone Set  : Device: "/dev/input/event5"
>[     8.814] (--) evdev: C-Media USB Headphone Set  : Vendor 0xd8c Product 0xc
>[     8.814] (--) evdev: C-Media USB Headphone Set  : Found keys
>[     8.814] (II) evdev: C-Media USB Headphone Set  : Configuring as keyboard
>[     8.814] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.7/usb2/2-2/2-2.4/2-2.4:1.3/input/input5/event5"
>[     8.814] (II) XINPUT: Adding extended input device "C-Media USB Headphone Set  " (type: KEYBOARD, id 9)
>[     8.814] (**) Option "xkb_rules" "evdev"
>[     8.814] (**) Option "xkb_model" "pc105+inet"
>[     8.814] (**) Option "xkb_layout" "us"
>[     8.814] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[     8.814] (II) XKB: Reusing cached keymap
>[     8.815] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event3)
>[     8.815] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[     8.815] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[     8.815] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[     8.815] 	Option "XkbRules" "evdev"
>[     8.815] 	Option "XkbModel" "pc105+inet"
>[     8.815] 	Option "XkbLayout" "us"
>[     8.815] 	Option "_source" "server/udev"
>[     8.815] 	Option "name" "AT Translated Set 2 keyboard"
>[     8.815] 	Option "path" "/dev/input/event3"
>[     8.815] 	Option "device" "/dev/input/event3"
>[     8.815] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input3/event3"
>[     8.815] 	Option "driver" "evdev"
>[     8.815] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[     8.815] (**) AT Translated Set 2 keyboard: always reports core events
>[     8.815] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event3"
>[     8.815] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[     8.815] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[     8.815] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[     8.815] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input3/event3"
>[     8.815] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 10)
>[     8.815] (**) Option "xkb_rules" "evdev"
>[     8.815] (**) Option "xkb_model" "pc105+inet"
>[     8.815] (**) Option "xkb_layout" "us"
>[     8.815] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[     8.815] (II) XKB: Reusing cached keymap
>[     8.816] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event4)
>[     8.816] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[     8.816] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[     8.816] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[     8.816] (II) LoadModule: "synaptics"
>[     8.816] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[     8.816] (II) Module synaptics: vendor="X.Org Foundation"
>[     8.816] 	compiled for 1.12.0, module version = 1.6.2
>[     8.816] 	Module class: X.Org XInput Driver
>[     8.816] 	ABI class: X.Org XInput driver, version 16.0
>[     8.816] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[     8.816] 	Option "_source" "server/udev"
>[     8.816] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[     8.816] 	Option "path" "/dev/input/event4"
>[     8.816] 	Option "device" "/dev/input/event4"
>[     8.816] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio4/input/input4/event4"
>[     8.816] 	Option "driver" "synaptics"
>[     8.816] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[     8.816] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[     8.816] (**) Option "Device" "/dev/input/event4"
>[     8.840] (**) Option "Device" "/dev/input/event4"
>[     8.840] port opened successfully
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5472
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4448
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[     8.840] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[     8.840] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[     8.856] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio4/input/input4/event4"
>[     8.856] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 11)
>[     8.856] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[     8.856] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[     8.856] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.040
>[     8.856] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[     8.856] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[     8.856] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[     8.856] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[     8.856] (**) Option "Device" "/dev/input/event4"
>[     8.856] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[     8.857] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[     8.857] (II) No input driver specified, ignoring this device.
>[     8.857] (II) This device may have been added with another device file.
>[     8.858] (II) config/udev: Adding input device HP WMI hotkeys (/dev/input/event7)
>[     8.858] (**) HP WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[     8.858] (**) HP WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[     8.858] (II) Using input driver 'evdev' for 'HP WMI hotkeys'
>[     8.858] 	Option "XkbRules" "evdev"
>[     8.858] 	Option "XkbModel" "pc105+inet"
>[     8.858] 	Option "XkbLayout" "us"
>[     8.858] 	Option "_source" "server/udev"
>[     8.858] 	Option "name" "HP WMI hotkeys"
>[     8.858] 	Option "path" "/dev/input/event7"
>[     8.858] 	Option "device" "/dev/input/event7"
>[     8.858] 	Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[     8.858] 	Option "driver" "evdev"
>[     8.858] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[     8.858] (**) HP WMI hotkeys: always reports core events
>[     8.858] (**) evdev: HP WMI hotkeys: Device: "/dev/input/event7"
>[     8.858] (--) evdev: HP WMI hotkeys: Vendor 0 Product 0
>[     8.858] (--) evdev: HP WMI hotkeys: Found keys
>[     8.858] (II) evdev: HP WMI hotkeys: Configuring as keyboard
>[     8.858] (**) Option "config_info" "udev:/sys/devices/virtual/input/input7/event7"
>[     8.858] (II) XINPUT: Adding extended input device "HP WMI hotkeys" (type: KEYBOARD, id 12)
>[     8.858] (**) Option "xkb_rules" "evdev"
>[     8.858] (**) Option "xkb_model" "pc105+inet"
>[     8.858] (**) Option "xkb_layout" "us"
>[     8.858] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[     8.858] (II) XKB: Reusing cached keymap
>[     8.868] (II) RADEON(0): RADEONSaveScreen(2)
>[     8.900] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[     8.900] (II) RADEON(0): Printing DDC gathered Modelines:
>[     8.900] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[    10.133] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[    10.133] (II) RADEON(0): Printing DDC gathered Modelines:
>[    10.133] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[    13.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    13.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    13.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    13.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    13.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    14.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a872f0]
>[    14.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a872f0] width 1440 pitch 5888 (/4 1472)
>[    14.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa6900]
>[    14.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa6900] width 1440 pitch 5888 (/4 1472)
>[    15.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.551] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x174b4e0]
>[    15.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x174b4e0] width 1440 pitch 5888 (/4 1472)
>[    15.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    15.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    15.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d90]
>[    16.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d90] width 1440 pitch 5888 (/4 1472)
>[    16.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    16.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    16.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d90]
>[    16.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d90] width 1440 pitch 5888 (/4 1472)
>[    16.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    16.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    16.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d90]
>[    16.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d90] width 1440 pitch 5888 (/4 1472)
>[    16.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    16.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    16.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d90]
>[    16.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d90] width 1440 pitch 5888 (/4 1472)
>[    16.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    16.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    16.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d90]
>[    16.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d90] width 1440 pitch 5888 (/4 1472)
>[    16.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    16.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    16.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d90]
>[    16.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d90] width 1440 pitch 5888 (/4 1472)
>[    16.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aaaee0]
>[    16.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aaaee0] width 1440 pitch 5888 (/4 1472)
>[    16.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1769ec0]
>[    16.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1769ec0] width 1440 pitch 5888 (/4 1472)
>[    17.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d10]
>[    17.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d10] width 1440 pitch 5888 (/4 1472)
>[    17.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    17.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    17.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d10]
>[    17.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d10] width 1440 pitch 5888 (/4 1472)
>[    17.789] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    17.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    18.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa7d10]
>[    18.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa7d10] width 1440 pitch 5888 (/4 1472)
>[    18.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a85fc0]
>[    18.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a85fc0] width 1440 pitch 5888 (/4 1472)
>[    18.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a91790]
>[    18.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a91790] width 1440 pitch 5888 (/4 1472)
>[    19.493] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[    19.493] (II) RADEON(0): Printing DDC gathered Modelines:
>[    19.493] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[    20.697] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[    20.697] (II) RADEON(0): Printing DDC gathered Modelines:
>[    20.697] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[    22.504] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[    22.504] (II) RADEON(0): Printing DDC gathered Modelines:
>[    22.504] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[    31.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a91610]
>[    31.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a91610] width 1440 pitch 5888 (/4 1472)
>[    31.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2050a50]
>[    32.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2050a50] width 1440 pitch 5888 (/4 1472)
>[    32.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b8e40]
>[    32.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b8e40] width 1440 pitch 5888 (/4 1472)
>[    32.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17ee750]
>[    32.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17ee750] width 1440 pitch 5888 (/4 1472)
>[    33.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b8e40]
>[    33.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b8e40] width 1440 pitch 5888 (/4 1472)
>[    34.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x257fd70]
>[    34.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x257fd70] width 1440 pitch 5888 (/4 1472)
>[    34.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b3330]
>[    34.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b3330] width 1440 pitch 5888 (/4 1472)
>[    34.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b3260]
>[    34.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b3260] width 1440 pitch 5888 (/4 1472)
>[    34.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b3330]
>[    34.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b3330] width 1440 pitch 5888 (/4 1472)
>[    36.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25b3210]
>[    36.754] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25b3210] width 1440 pitch 5888 (/4 1472)
>[    37.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2058df0]
>[    37.606] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2058df0] width 1440 pitch 5888 (/4 1472)
>[    37.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    37.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    37.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cbc0]
>[    37.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cbc0] width 1440 pitch 5888 (/4 1472)
>[    39.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205c6f0]
>[    39.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205c6f0] width 1440 pitch 5888 (/4 1472)
>[    39.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205a080]
>[    39.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205a080] width 1440 pitch 5888 (/4 1472)
>[    39.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269d0f0]
>[    39.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269d0f0] width 1440 pitch 5888 (/4 1472)
>[    39.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269b0b0]
>[    39.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269b0b0] width 1440 pitch 5888 (/4 1472)
>[    39.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269d0f0]
>[    39.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269d0f0] width 1440 pitch 5888 (/4 1472)
>[    40.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26409c0]
>[    40.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26409c0] width 1440 pitch 5888 (/4 1472)
>[    45.138] (II) config/udev: Adding input device Dell BT Travel Mouse (/dev/input/mouse1)
>[    45.138] (II) No input driver specified, ignoring this device.
>[    45.138] (II) This device may have been added with another device file.
>[    45.140] (II) config/udev: Adding input device Dell BT Travel Mouse (/dev/input/event8)
>[    45.140] (**) Dell BT Travel Mouse: Applying InputClass "evdev pointer catchall"
>[    45.140] (II) Using input driver 'evdev' for 'Dell BT Travel Mouse'
>[    45.140] 	Option "XkbRules" "evdev"
>[    45.140] 	Option "XkbModel" "evdev"
>[    45.140] 	Option "XkbLayout" "us"
>[    45.140] 	Option "_source" "server/udev"
>[    45.140] 	Option "name" "Dell BT Travel Mouse"
>[    45.140] 	Option "path" "/dev/input/event8"
>[    45.140] 	Option "device" "/dev/input/event8"
>[    45.140] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1:1.0/bluetooth/hci0/hci0:11/input8/event8"
>[    45.140] 	Option "driver" "evdev"
>[    45.140] (**) Dell BT Travel Mouse: always reports core events
>[    45.140] (**) evdev: Dell BT Travel Mouse: Device: "/dev/input/event8"
>[    45.140] (--) evdev: Dell BT Travel Mouse: Vendor 0x46d Product 0xb006
>[    45.140] (--) evdev: Dell BT Travel Mouse: Found 12 mouse buttons
>[    45.140] (--) evdev: Dell BT Travel Mouse: Found scroll wheel(s)
>[    45.140] (--) evdev: Dell BT Travel Mouse: Found relative axes
>[    45.140] (--) evdev: Dell BT Travel Mouse: Found x and y relative axes
>[    45.140] (II) evdev: Dell BT Travel Mouse: Configuring as mouse
>[    45.140] (II) evdev: Dell BT Travel Mouse: Adding scrollwheel support
>[    45.141] (**) evdev: Dell BT Travel Mouse: YAxisMapping: buttons 4 and 5
>[    45.141] (**) evdev: Dell BT Travel Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    45.141] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1:1.0/bluetooth/hci0/hci0:11/input8/event8"
>[    45.141] (II) XINPUT: Adding extended input device "Dell BT Travel Mouse" (type: MOUSE, id 13)
>[    45.141] (II) evdev: Dell BT Travel Mouse: initialized for relative axes.
>[    45.142] (**) Dell BT Travel Mouse: (accel) keeping acceleration scheme 1
>[    45.142] (**) Dell BT Travel Mouse: (accel) acceleration profile 0
>[    45.142] (**) Dell BT Travel Mouse: (accel) acceleration factor: 2.000
>[    45.142] (**) Dell BT Travel Mouse: (accel) acceleration threshold: 4
>[    45.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26b94d0]
>[    45.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26b94d0] width 1440 pitch 5888 (/4 1472)
>[    45.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    45.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    47.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2647b70]
>[    47.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2647b70] width 1440 pitch 5888 (/4 1472)
>[    50.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2647bd0]
>[    51.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2647bd0] width 1440 pitch 5888 (/4 1472)
>[    51.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269ac10]
>[    51.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269ac10] width 1440 pitch 5888 (/4 1472)
>[    51.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269b0b0]
>[    51.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269b0b0] width 1440 pitch 5888 (/4 1472)
>[    51.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2631600]
>[    51.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2631600] width 1440 pitch 5888 (/4 1472)
>[    71.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2641270]
>[    71.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2641270] width 1440 pitch 5888 (/4 1472)
>[    71.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2634210]
>[    71.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2634210] width 1440 pitch 5888 (/4 1472)
>[    71.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205aeb0]
>[    71.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205aeb0] width 1440 pitch 5888 (/4 1472)
>[    71.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633bc0]
>[    71.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633bc0] width 1440 pitch 5888 (/4 1472)
>[    71.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205aeb0]
>[    71.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205aeb0] width 1440 pitch 5888 (/4 1472)
>[    71.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633bc0]
>[    71.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633bc0] width 1440 pitch 5888 (/4 1472)
>[    71.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205aeb0]
>[    71.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205aeb0] width 1440 pitch 5888 (/4 1472)
>[    71.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633bc0]
>[    71.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633bc0] width 1440 pitch 5888 (/4 1472)
>[    71.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205aeb0]
>[    71.392] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205aeb0] width 1440 pitch 5888 (/4 1472)
>[    71.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2611e40]
>[    71.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2611e40] width 1440 pitch 5888 (/4 1472)
>[    71.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260d340]
>[    72.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260d340] width 1440 pitch 5888 (/4 1472)
>[    72.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260d340]
>[    72.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260d340] width 1440 pitch 5888 (/4 1472)
>[    72.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261d240]
>[    72.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261d240] width 1440 pitch 5888 (/4 1472)
>[    72.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x203fbc0]
>[    72.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x203fbc0] width 1440 pitch 5888 (/4 1472)
>[    72.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26121d0]
>[    72.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26121d0] width 1440 pitch 5888 (/4 1472)
>[    72.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614de0]
>[    72.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614de0] width 1440 pitch 5888 (/4 1472)
>[    72.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2614de0]
>[    72.543] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2614de0] width 1440 pitch 5888 (/4 1472)
>[    90.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633bc0]
>[    90.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633bc0] width 1440 pitch 5888 (/4 1472)
>[    91.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264c610]
>[    91.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264c610] width 1440 pitch 5888 (/4 1472)
>[    91.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    91.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    91.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    91.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    91.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    91.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    91.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    91.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    91.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26380f0]
>[    91.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26380f0] width 1440 pitch 5888 (/4 1472)
>[    93.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    93.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    93.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    93.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    93.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    93.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    93.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    93.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    93.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    94.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    94.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    94.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    94.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    94.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    94.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    94.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    94.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    94.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    94.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    94.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    94.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a33d0]
>[    94.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a33d0] width 1440 pitch 5888 (/4 1472)
>[    95.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    95.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    95.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    95.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    95.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2613fa0]
>[    95.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2613fa0] width 1440 pitch 5888 (/4 1472)
>[    95.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    95.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    95.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2613f00]
>[    95.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2613f00] width 1440 pitch 5888 (/4 1472)
>[    95.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    95.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    95.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260d500]
>[    95.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260d500] width 1440 pitch 5888 (/4 1472)
>[    95.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26154f0]
>[    95.401] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26154f0] width 1440 pitch 5888 (/4 1472)
>[    95.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260d500]
>[    95.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260d500] width 1440 pitch 5888 (/4 1472)
>[    95.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2613ee0]
>[    95.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2613ee0] width 1440 pitch 5888 (/4 1472)
>[    95.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x260d500]
>[    95.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x260d500] width 1440 pitch 5888 (/4 1472)
>[    95.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2613ee0]
>[    95.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2613ee0] width 1440 pitch 5888 (/4 1472)
>[    96.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cd30]
>[    96.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cd30] width 1440 pitch 5888 (/4 1472)
>[    96.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269b790]
>[    96.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269b790] width 1440 pitch 5888 (/4 1472)
>[    96.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    96.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    96.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269b790]
>[    96.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269b790] width 1440 pitch 5888 (/4 1472)
>[    96.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    96.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    96.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc80]
>[    96.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc80] width 1440 pitch 5888 (/4 1472)
>[    96.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    96.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    96.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2640db0]
>[    96.335] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2640db0] width 1440 pitch 5888 (/4 1472)
>[    96.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2613ab0]
>[    96.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2613ab0] width 1440 pitch 5888 (/4 1472)
>[    96.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc80]
>[    96.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc80] width 1440 pitch 5888 (/4 1472)
>[    96.745] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205d120]
>[    96.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205d120] width 1440 pitch 5888 (/4 1472)
>[    97.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x263f7f0]
>[    97.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x263f7f0] width 1440 pitch 5888 (/4 1472)
>[    97.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    97.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    97.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    97.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    97.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    97.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    97.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    97.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    97.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    97.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    97.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    97.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    97.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    97.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    97.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    97.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    97.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    98.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    98.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    98.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    98.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    98.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    98.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608a40]
>[    98.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608a40] width 1440 pitch 5888 (/4 1472)
>[    98.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608aa0]
>[    98.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608aa0] width 1440 pitch 5888 (/4 1472)
>[    98.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2608aa0]
>[    98.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2608aa0] width 1440 pitch 5888 (/4 1472)
>[    98.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056d30]
>[    98.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056d30] width 1440 pitch 5888 (/4 1472)
>[    98.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056d30]
>[    98.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056d30] width 1440 pitch 5888 (/4 1472)
>[    98.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269eba0]
>[    98.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269eba0] width 1440 pitch 5888 (/4 1472)
>[    98.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.554] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    98.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    98.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    98.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    98.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    98.728] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    98.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269f490]
>[    98.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269f490] width 1440 pitch 5888 (/4 1472)
>[    98.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205cc20]
>[    98.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205cc20] width 1440 pitch 5888 (/4 1472)
>[    99.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2069fe0]
>[    99.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2069fe0] width 1440 pitch 5888 (/4 1472)
>[    99.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26083c0]
>[    99.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26083c0] width 1440 pitch 5888 (/4 1472)
>[   103.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc840]
>[   103.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc840] width 1440 pitch 5888 (/4 1472)
>[   104.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc840]
>[   104.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc840] width 1440 pitch 5888 (/4 1472)
>[   104.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc4e0]
>[   104.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc4e0] width 1440 pitch 5888 (/4 1472)
>[   104.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bebc0]
>[   104.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bebc0] width 1440 pitch 5888 (/4 1472)
>[   104.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a30a0]
>[   104.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a30a0] width 1440 pitch 5888 (/4 1472)
>[   104.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc510]
>[   104.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc510] width 1440 pitch 5888 (/4 1472)
>[   104.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc980]
>[   104.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc980] width 1440 pitch 5888 (/4 1472)
>[   104.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc910]
>[   104.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc910] width 1440 pitch 5888 (/4 1472)
>[   104.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc980]
>[   104.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc980] width 1440 pitch 5888 (/4 1472)
>[   104.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc9e0]
>[   104.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc9e0] width 1440 pitch 5888 (/4 1472)
>[   104.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a30a0]
>[   104.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a30a0] width 1440 pitch 5888 (/4 1472)
>[   104.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc9e0]
>[   104.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc9e0] width 1440 pitch 5888 (/4 1472)
>[   104.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a30a0]
>[   104.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a30a0] width 1440 pitch 5888 (/4 1472)
>[   105.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc4b0]
>[   105.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc4b0] width 1440 pitch 5888 (/4 1472)
>[   105.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   105.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   105.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc4b0]
>[   105.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc4b0] width 1440 pitch 5888 (/4 1472)
>[   105.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   105.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   105.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc4b0]
>[   106.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc4b0] width 1440 pitch 5888 (/4 1472)
>[   106.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   106.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   106.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc990]
>[   106.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc990] width 1440 pitch 5888 (/4 1472)
>[   106.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   106.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   106.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc990]
>[   106.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc990] width 1440 pitch 5888 (/4 1472)
>[   106.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   106.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   106.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a30a0]
>[   106.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a30a0] width 1440 pitch 5888 (/4 1472)
>[   106.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc990]
>[   106.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc990] width 1440 pitch 5888 (/4 1472)
>[   106.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26a30a0]
>[   106.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26a30a0] width 1440 pitch 5888 (/4 1472)
>[   135.805] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2d0]
>[   135.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2d0] width 1440 pitch 5888 (/4 1472)
>[   135.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   135.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   135.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   135.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   135.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   135.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   135.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   135.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   135.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   136.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   136.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   136.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   136.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   136.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   136.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   136.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   136.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab1e0]
>[   136.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab1e0] width 1440 pitch 5888 (/4 1472)
>[   137.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   137.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   137.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab1e0]
>[   137.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab1e0] width 1440 pitch 5888 (/4 1472)
>[   137.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bc5a0]
>[   137.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bc5a0] width 1440 pitch 5888 (/4 1472)
>[   137.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   137.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   137.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab1e0]
>[   137.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab1e0] width 1440 pitch 5888 (/4 1472)
>[   137.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   137.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   137.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab1e0]
>[   137.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab1e0] width 1440 pitch 5888 (/4 1472)
>[   137.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   137.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   137.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab1e0]
>[   137.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab1e0] width 1440 pitch 5888 (/4 1472)
>[   137.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   137.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   137.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab1e0]
>[   137.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab1e0] width 1440 pitch 5888 (/4 1472)
>[   137.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ab2b0]
>[   137.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ab2b0] width 1440 pitch 5888 (/4 1472)
>[   137.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bf0e0]
>[   137.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bf0e0] width 1440 pitch 5888 (/4 1472)
>[   138.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bf490]
>[   138.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bf490] width 1440 pitch 5888 (/4 1472)
>[   140.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2088560]
>[   140.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2088560] width 1440 pitch 5888 (/4 1472)
>[   140.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2082e50]
>[   140.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2082e50] width 1440 pitch 5888 (/4 1472)
>[   145.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb9b90]
>[   145.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb9b90] width 1440 pitch 5888 (/4 1472)
>[   159.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207dff0]
>[   159.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207dff0] width 1440 pitch 5888 (/4 1472)
>[   159.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264c9b0]
>[   159.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264c9b0] width 1440 pitch 5888 (/4 1472)
>[   160.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264c980]
>[   160.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264c980] width 1440 pitch 5888 (/4 1472)
>[   162.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc7a30]
>[   162.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc7a30] width 1440 pitch 5888 (/4 1472)
>[   162.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d2c0]
>[   162.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d2c0] width 1440 pitch 5888 (/4 1472)
>[   162.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cc40]
>[   162.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cc40] width 1440 pitch 5888 (/4 1472)
>[   168.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc110]
>[   168.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc110] width 1440 pitch 5888 (/4 1472)
>[   171.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[   171.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[   172.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267f560]
>[   172.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267f560] width 1440 pitch 5888 (/4 1472)
>[   189.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   189.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   189.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   189.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   189.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   189.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   189.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   189.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   189.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   189.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   190.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   190.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   190.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   190.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   190.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   190.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   190.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   190.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   191.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   191.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   191.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   191.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   192.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ad8f0]
>[   192.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ad8f0] width 1440 pitch 5888 (/4 1472)
>[   204.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   204.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   204.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   204.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   204.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   204.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   204.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   205.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   205.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   205.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   205.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   205.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   205.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   205.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   205.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   205.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   209.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   209.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   209.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   209.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   209.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   209.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   209.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   209.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   209.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   209.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   209.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   209.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   209.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   209.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   209.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   209.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   209.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   209.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   209.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   209.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   209.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   209.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   210.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   210.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   210.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   210.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   210.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   210.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   210.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   210.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   210.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   210.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   210.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   210.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   210.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   210.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   210.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   210.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   210.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   210.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   210.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   210.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   210.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   210.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   214.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   214.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   214.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   214.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   214.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   214.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   214.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   214.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   214.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   214.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   214.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   214.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   214.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   214.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   214.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   214.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   214.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   214.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   214.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c280]
>[   214.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c280] width 1440 pitch 5888 (/4 1472)
>[   317.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2685a80]
>[   317.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2685a80] width 1440 pitch 5888 (/4 1472)
>[   317.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd3ee0]
>[   317.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd3ee0] width 1440 pitch 5888 (/4 1472)
>[   317.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2685a80]
>[   317.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2685a80] width 1440 pitch 5888 (/4 1472)
>[   317.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   317.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   317.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ad8f0]
>[   317.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ad8f0] width 1440 pitch 5888 (/4 1472)
>[   317.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   317.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   317.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ad8f0]
>[   317.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ad8f0] width 1440 pitch 5888 (/4 1472)
>[   317.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079f40]
>[   317.924] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079f40] width 1440 pitch 5888 (/4 1472)
>[   317.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b1f0]
>[   317.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b1f0] width 1440 pitch 5888 (/4 1472)
>[   321.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc63c0]
>[   321.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc63c0] width 1440 pitch 5888 (/4 1472)
>[   321.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d2c0]
>[   321.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d2c0] width 1440 pitch 5888 (/4 1472)
>[   321.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267fa40]
>[   321.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267fa40] width 1440 pitch 5888 (/4 1472)
>[   321.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc7a30]
>[   321.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc7a30] width 1440 pitch 5888 (/4 1472)
>[   321.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d2c0]
>[   321.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d2c0] width 1440 pitch 5888 (/4 1472)
>[   321.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc63c0]
>[   322.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc63c0] width 1440 pitch 5888 (/4 1472)
>[   322.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207aea0]
>[   322.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207aea0] width 1440 pitch 5888 (/4 1472)
>[   322.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d2c0]
>[   322.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d2c0] width 1440 pitch 5888 (/4 1472)
>[   322.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267fa40]
>[   322.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267fa40] width 1440 pitch 5888 (/4 1472)
>[   322.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc63c0]
>[   322.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc63c0] width 1440 pitch 5888 (/4 1472)
>[   322.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc63c0]
>[   322.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc63c0] width 1440 pitch 5888 (/4 1472)
>[   322.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267fa40]
>[   322.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267fa40] width 1440 pitch 5888 (/4 1472)
>[   322.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc7a30]
>[   322.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc7a30] width 1440 pitch 5888 (/4 1472)
>[   322.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d2c0]
>[   322.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d2c0] width 1440 pitch 5888 (/4 1472)
>[   437.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d9f0]
>[   437.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d9f0] width 1440 pitch 5888 (/4 1472)
>[   437.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   437.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   437.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd1d40]
>[   437.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd1d40] width 1440 pitch 5888 (/4 1472)
>[   437.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d9f0]
>[   437.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d9f0] width 1440 pitch 5888 (/4 1472)
>[   437.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd1d40]
>[   437.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd1d40] width 1440 pitch 5888 (/4 1472)
>[   437.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205ef60]
>[   437.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205ef60] width 1440 pitch 5888 (/4 1472)
>[   437.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d9f0]
>[   437.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d9f0] width 1440 pitch 5888 (/4 1472)
>[   437.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205ef60]
>[   437.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205ef60] width 1440 pitch 5888 (/4 1472)
>[   437.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d9f0]
>[   437.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d9f0] width 1440 pitch 5888 (/4 1472)
>[   437.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205ef60]
>[   437.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205ef60] width 1440 pitch 5888 (/4 1472)
>[   437.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   437.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   437.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x205ef60]
>[   437.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x205ef60] width 1440 pitch 5888 (/4 1472)
>[   437.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   437.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   441.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f500]
>[   441.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f500] width 1440 pitch 5888 (/4 1472)
>[   441.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680a20]
>[   441.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680a20] width 1440 pitch 5888 (/4 1472)
>[   441.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f500]
>[   441.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f500] width 1440 pitch 5888 (/4 1472)
>[   441.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680a20]
>[   441.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680a20] width 1440 pitch 5888 (/4 1472)
>[   441.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f500]
>[   441.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f500] width 1440 pitch 5888 (/4 1472)
>[   441.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680a20]
>[   441.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680a20] width 1440 pitch 5888 (/4 1472)
>[   441.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   441.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   441.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680a20]
>[   441.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680a20] width 1440 pitch 5888 (/4 1472)
>[   441.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   441.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   441.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680a60]
>[   441.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680a60] width 1440 pitch 5888 (/4 1472)
>[   441.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d9f0]
>[   441.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d9f0] width 1440 pitch 5888 (/4 1472)
>[   441.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680a60]
>[   441.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680a60] width 1440 pitch 5888 (/4 1472)
>[   441.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d9f0]
>[   441.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d9f0] width 1440 pitch 5888 (/4 1472)
>[   638.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   638.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   638.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   638.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   638.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   638.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   638.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   638.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   638.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   638.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   638.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   638.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   638.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   638.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   638.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   638.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   638.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   638.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   638.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   638.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   642.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   642.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   642.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   642.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   642.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   642.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   642.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   642.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   642.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   642.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   642.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   642.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   642.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   642.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   643.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   643.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   643.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   643.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   643.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   643.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.242] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   643.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   643.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   643.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   643.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   643.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   643.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   643.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   643.341] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   647.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   647.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   647.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   647.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   650.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   650.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   650.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   650.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   650.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   650.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   650.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   650.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   650.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   650.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   650.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   650.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   650.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   650.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   650.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   650.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.749] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   650.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   650.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   650.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   650.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc9360]
>[   656.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc9360] width 1440 pitch 5888 (/4 1472)
>[   656.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   656.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   656.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   656.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   656.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.843] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   656.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   656.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   656.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   656.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   656.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   656.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   656.923] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   656.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   656.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   656.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   656.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207f860]
>[   656.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207f860] width 1440 pitch 5888 (/4 1472)
>[   656.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   656.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   805.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0e0]
>[   805.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0e0] width 1440 pitch 5888 (/4 1472)
>[   806.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bda40]
>[   806.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bda40] width 1440 pitch 5888 (/4 1472)
>[   806.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0e0]
>[   806.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0e0] width 1440 pitch 5888 (/4 1472)
>[   808.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd1610]
>[   808.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd1610] width 1440 pitch 5888 (/4 1472)
>[   908.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   909.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   909.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   909.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   909.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   909.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   909.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   909.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   909.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   909.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   909.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   909.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   909.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   909.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   909.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   909.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   909.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   909.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   909.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   909.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   913.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   913.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   913.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   913.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   913.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   913.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   913.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   913.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   913.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   913.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   913.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   913.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   913.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   913.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   918.679] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   918.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   918.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   918.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[   918.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[   918.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   918.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   918.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   918.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   918.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   918.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   918.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   918.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   918.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   918.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   918.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   918.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   918.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   918.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   918.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   922.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[   922.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[   922.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   922.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   922.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[   922.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[   922.945] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   922.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   922.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[   922.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[   922.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   922.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   922.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   923.009] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   923.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   923.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   923.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20814e0]
>[   923.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20814e0] width 1440 pitch 5888 (/4 1472)
>[   923.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   923.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   923.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[   923.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[   923.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[   923.126] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[   923.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[   923.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1218.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1218.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1218.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1218.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1218.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1218.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1218.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1218.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1218.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1218.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1218.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1218.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1218.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1218.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1222.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1222.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1222.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1222.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1222.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1222.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1222.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1222.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1222.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1222.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1222.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1222.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1222.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1222.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1224.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1224.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1224.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1224.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1224.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1224.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1224.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1224.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1224.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1224.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1224.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1224.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1224.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1225.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1225.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1225.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1225.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1225.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1225.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1225.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1225.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1225.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1225.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1225.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1225.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1225.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1229.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1229.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1229.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1229.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1229.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1229.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1229.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1229.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1229.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1229.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1229.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1229.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1229.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1229.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1373.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fcc1e0]
>[  1373.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fcc1e0] width 1440 pitch 5888 (/4 1472)
>[  1373.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207b0c0]
>[  1373.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207b0c0] width 1440 pitch 5888 (/4 1472)
>[  1376.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26852c0]
>[  1376.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26852c0] width 1440 pitch 5888 (/4 1472)
>[  1376.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680280]
>[  1376.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680280] width 1440 pitch 5888 (/4 1472)
>[  1377.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680280]
>[  1377.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680280] width 1440 pitch 5888 (/4 1472)
>[  1377.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd91d0]
>[  1377.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd91d0] width 1440 pitch 5888 (/4 1472)
>[  1377.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680280]
>[  1377.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680280] width 1440 pitch 5888 (/4 1472)
>[  1377.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd8ec0]
>[  1377.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd8ec0] width 1440 pitch 5888 (/4 1472)
>[  1377.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680280]
>[  1377.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680280] width 1440 pitch 5888 (/4 1472)
>[  1377.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd8ec0]
>[  1377.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd8ec0] width 1440 pitch 5888 (/4 1472)
>[  1377.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680280]
>[  1377.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680280] width 1440 pitch 5888 (/4 1472)
>[  1377.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd8ec0]
>[  1377.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd8ec0] width 1440 pitch 5888 (/4 1472)
>[  1377.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26857a0]
>[  1377.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26857a0] width 1440 pitch 5888 (/4 1472)
>[  1377.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2685800]
>[  1377.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2685800] width 1440 pitch 5888 (/4 1472)
>[  1377.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2680790]
>[  1377.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2680790] width 1440 pitch 5888 (/4 1472)
>[  1401.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0d10]
>[  1401.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0d10] width 1440 pitch 5888 (/4 1472)
>[  1460.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1460.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1460.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1460.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.138] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1460.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1460.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1460.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1460.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1460.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1460.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1460.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1460.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1460.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1460.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1460.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1460.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1460.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1460.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1460.291] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1460.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1467.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1467.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1467.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1467.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1467.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1467.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.129] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1467.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1467.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.148] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1467.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1467.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1467.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1467.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1467.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1467.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1499.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1499.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1499.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1499.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1503.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1503.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1503.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1503.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.285] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1503.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1503.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1503.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.318] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1503.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1503.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1503.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1503.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1503.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1503.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1503.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1503.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1503.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1503.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1503.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1503.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1503.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1511.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe0c60]
>[  1511.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe0c60] width 1440 pitch 5888 (/4 1472)
>[  1512.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802e0]
>[  1512.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802e0] width 1440 pitch 5888 (/4 1472)
>[  1616.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26802b0]
>[  1616.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26802b0] width 1440 pitch 5888 (/4 1472)
>[  1617.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2659980]
>[  1617.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2659980] width 1440 pitch 5888 (/4 1472)
>[  1617.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2659980]
>[  1617.575] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2659980] width 1440 pitch 5888 (/4 1472)
>[  1617.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ad950]
>[  1617.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ad950] width 1440 pitch 5888 (/4 1472)
>[  1669.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1669.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1669.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1669.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1669.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1669.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1669.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1669.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1669.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1669.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1669.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1669.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1669.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1669.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1669.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1669.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1669.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1669.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1669.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1669.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1677.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1677.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1677.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1677.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1677.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1677.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1677.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1677.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1677.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cd20]
>[  1677.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cd20] width 1440 pitch 5888 (/4 1472)
>[  1677.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1677.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1677.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d7b0]
>[  1677.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d7b0] width 1440 pitch 5888 (/4 1472)
>[  1677.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1677.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1677.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d7b0]
>[  1677.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d7b0] width 1440 pitch 5888 (/4 1472)
>[  1677.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1677.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1677.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d7b0]
>[  1677.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d7b0] width 1440 pitch 5888 (/4 1472)
>[  1677.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1677.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1677.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d7b0]
>[  1677.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d7b0] width 1440 pitch 5888 (/4 1472)
>[  1701.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2081690]
>[  1701.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2081690] width 1440 pitch 5888 (/4 1472)
>[  1701.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2659920]
>[  1701.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2659920] width 1440 pitch 5888 (/4 1472)
>[  1709.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207a1b0]
>[  1709.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207a1b0] width 1440 pitch 5888 (/4 1472)
>[  1709.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2689ef0]
>[  1709.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2689ef0] width 1440 pitch 5888 (/4 1472)
>[  1709.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2689ef0]
>[  1709.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2689ef0] width 1440 pitch 5888 (/4 1472)
>[  1709.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26592c0]
>[  1709.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26592c0] width 1440 pitch 5888 (/4 1472)
>[  1715.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26592c0]
>[  1715.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26592c0] width 1440 pitch 5888 (/4 1472)
>[  1715.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  1715.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  1715.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267f630]
>[  1715.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267f630] width 1440 pitch 5888 (/4 1472)
>[  1715.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c4c0]
>[  1715.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c4c0] width 1440 pitch 5888 (/4 1472)
>[  1721.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265efc0]
>[  1721.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265efc0] width 1440 pitch 5888 (/4 1472)
>[  1721.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  1721.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  1721.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26592c0]
>[  1721.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26592c0] width 1440 pitch 5888 (/4 1472)
>[  1721.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26592c0]
>[  1721.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26592c0] width 1440 pitch 5888 (/4 1472)
>[  1728.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  1728.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  1728.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  1728.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  1728.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1728.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1728.982] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  1728.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  1740.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a300]
>[  1740.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a300] width 1440 pitch 5888 (/4 1472)
>[  1740.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20806f0]
>[  1740.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20806f0] width 1440 pitch 5888 (/4 1472)
>[  1740.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26592c0]
>[  1740.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26592c0] width 1440 pitch 5888 (/4 1472)
>[  1740.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20806f0]
>[  1740.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20806f0] width 1440 pitch 5888 (/4 1472)
>[  1748.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20806f0]
>[  1748.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20806f0] width 1440 pitch 5888 (/4 1472)
>[  1749.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20807e0]
>[  1749.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20807e0] width 1440 pitch 5888 (/4 1472)
>[  1749.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1749.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1749.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26623c0]
>[  1749.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26623c0] width 1440 pitch 5888 (/4 1472)
>[  1843.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c3d0]
>[  1843.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c3d0] width 1440 pitch 5888 (/4 1472)
>[  1843.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1843.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1843.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c3d0]
>[  1843.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c3d0] width 1440 pitch 5888 (/4 1472)
>[  1843.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1843.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1843.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c3d0]
>[  1843.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c3d0] width 1440 pitch 5888 (/4 1472)
>[  1843.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1843.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1843.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c3d0]
>[  1843.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c3d0] width 1440 pitch 5888 (/4 1472)
>[  1843.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1843.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1843.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c3d0]
>[  1843.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c3d0] width 1440 pitch 5888 (/4 1472)
>[  1843.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1843.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1843.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c3d0]
>[  1843.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c3d0] width 1440 pitch 5888 (/4 1472)
>[  1843.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1843.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1844.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1844.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1844.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.353] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.620] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1844.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1844.753] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1844.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1844.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1867.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1867.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1867.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1867.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1867.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1867.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1867.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1867.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1867.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1867.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1867.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1867.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1867.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1867.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1867.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1867.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1867.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1867.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1867.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1867.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1867.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1867.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1867.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  1867.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  1871.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1871.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1871.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1871.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1871.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1871.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1871.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1871.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1871.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1871.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1871.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1871.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1871.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.916] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1871.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1871.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1871.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1871.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662420]
>[  1871.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662420] width 1440 pitch 5888 (/4 1472)
>[  1871.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6390]
>[  1871.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6390] width 1440 pitch 5888 (/4 1472)
>[  1875.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1875.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1875.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  1876.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1876.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1876.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  1876.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1876.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1876.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  1876.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1876.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1876.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  1876.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1876.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1876.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  1876.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1876.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1876.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.170] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  1876.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd6360]
>[  1876.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd6360] width 1440 pitch 5888 (/4 1472)
>[  1876.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20772d0]
>[  1876.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20772d0] width 1440 pitch 5888 (/4 1472)
>[  2008.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2664990]
>[  2008.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2664990] width 1440 pitch 5888 (/4 1472)
>[  2011.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2672dd0]
>[  2011.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2672dd0] width 1440 pitch 5888 (/4 1472)
>[  2100.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  2100.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  2100.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26706b0]
>[  2100.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26706b0] width 1440 pitch 5888 (/4 1472)
>[  2100.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2100.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2100.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  2100.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  2100.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2100.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2100.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2100.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2100.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2100.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2100.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2100.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2100.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dfe0]
>[  2100.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dfe0] width 1440 pitch 5888 (/4 1472)
>[  2100.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2100.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2100.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dfe0]
>[  2100.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dfe0] width 1440 pitch 5888 (/4 1472)
>[  2106.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  2107.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  2107.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661d60]
>[  2107.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661d60] width 1440 pitch 5888 (/4 1472)
>[  2107.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dfe0]
>[  2107.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dfe0] width 1440 pitch 5888 (/4 1472)
>[  2107.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661d60]
>[  2107.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661d60] width 1440 pitch 5888 (/4 1472)
>[  2107.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dfe0]
>[  2107.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dfe0] width 1440 pitch 5888 (/4 1472)
>[  2107.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661d60]
>[  2107.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661d60] width 1440 pitch 5888 (/4 1472)
>[  2107.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dfe0]
>[  2107.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dfe0] width 1440 pitch 5888 (/4 1472)
>[  2107.121] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661d60]
>[  2107.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661d60] width 1440 pitch 5888 (/4 1472)
>[  2107.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266dfe0]
>[  2107.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266dfe0] width 1440 pitch 5888 (/4 1472)
>[  2107.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26713d0]
>[  2107.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26713d0] width 1440 pitch 5888 (/4 1472)
>[  2107.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266f280]
>[  2107.202] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266f280] width 1440 pitch 5888 (/4 1472)
>[  2107.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2107.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2107.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26713d0]
>[  2107.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26713d0] width 1440 pitch 5888 (/4 1472)
>[  2167.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2675800]
>[  2167.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2675800] width 1440 pitch 5888 (/4 1472)
>[  2169.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266eca0]
>[  2169.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266eca0] width 1440 pitch 5888 (/4 1472)
>[  2211.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26649d0]
>[  2211.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26649d0] width 1440 pitch 5888 (/4 1472)
>[  2212.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266cd30]
>[  2212.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266cd30] width 1440 pitch 5888 (/4 1472)
>[  2215.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2668ef0]
>[  2215.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2668ef0] width 1440 pitch 5888 (/4 1472)
>[  2215.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266efa0]
>[  2215.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266efa0] width 1440 pitch 5888 (/4 1472)
>[  2257.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2257.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2258.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266cd30]
>[  2258.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266cd30] width 1440 pitch 5888 (/4 1472)
>[  2309.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2309.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2309.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2309.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2309.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2309.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2309.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.337] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2309.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2309.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2309.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2309.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2309.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2309.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2309.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2309.420] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2309.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2309.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2309.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2309.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2309.470] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2317.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2317.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2317.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2317.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2317.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2317.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2317.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2317.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2317.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2317.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2317.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2317.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2317.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2317.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2317.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2317.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2317.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2317.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2321.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2321.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2321.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2321.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2321.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2321.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2321.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2321.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2321.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2321.900] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2321.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2321.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2321.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2321.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2321.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2321.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2321.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2321.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2321.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2322.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2322.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2322.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2515.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2515.742] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2515.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2515.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2515.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2515.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2515.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2515.843] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.859] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2515.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2515.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.893] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2515.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2515.909] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2515.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2515.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2519.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2519.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2519.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2519.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2519.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2519.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2519.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2519.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2519.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2519.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2519.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2520.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2520.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2520.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2520.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2520.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2520.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2520.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2520.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2520.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2520.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2520.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2520.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x265f120]
>[  2520.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x265f120] width 1440 pitch 5888 (/4 1472)
>[  2520.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207c410]
>[  2520.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207c410] width 1440 pitch 5888 (/4 1472)
>[  2572.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26713d0]
>[  2572.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26713d0] width 1440 pitch 5888 (/4 1472)
>[  2572.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  2572.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  2572.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26706b0]
>[  2572.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26706b0] width 1440 pitch 5888 (/4 1472)
>[  2572.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266efa0]
>[  2572.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266efa0] width 1440 pitch 5888 (/4 1472)
>[  2572.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266f280]
>[  2572.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266f280] width 1440 pitch 5888 (/4 1472)
>[  2572.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662060]
>[  2572.654] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662060] width 1440 pitch 5888 (/4 1472)
>[  2572.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2572.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2572.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2662060]
>[  2572.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2662060] width 1440 pitch 5888 (/4 1472)
>[  2572.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2572.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266f280]
>[  2573.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266f280] width 1440 pitch 5888 (/4 1472)
>[  2573.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266efa0]
>[  2573.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266efa0] width 1440 pitch 5888 (/4 1472)
>[  2573.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26706b0]
>[  2573.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26706b0] width 1440 pitch 5888 (/4 1472)
>[  2573.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  2573.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  2573.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26713d0]
>[  2573.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26713d0] width 1440 pitch 5888 (/4 1472)
>[  2573.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266eca0]
>[  2573.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266eca0] width 1440 pitch 5888 (/4 1472)
>[  2573.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266f280]
>[  2573.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266f280] width 1440 pitch 5888 (/4 1472)
>[  2573.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2573.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2573.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2573.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2573.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2574.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2574.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2574.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2574.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2574.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2574.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2574.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2574.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666170]
>[  2574.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666170] width 1440 pitch 5888 (/4 1472)
>[  2578.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26713d0]
>[  2578.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26713d0] width 1440 pitch 5888 (/4 1472)
>[  2578.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  2578.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  2578.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266efa0]
>[  2578.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266efa0] width 1440 pitch 5888 (/4 1472)
>[  2578.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2578.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2578.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2578.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2578.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2578.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2578.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2578.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2578.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2578.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2578.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2578.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2578.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2578.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2578.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2578.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  2578.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x266fef0]
>[  2578.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x266fef0] width 1440 pitch 5888 (/4 1472)
>[  2578.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  2578.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3097.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3097.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3097.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3097.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3097.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3097.236] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3097.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3097.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3097.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3097.270] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3097.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3097.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3097.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3097.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3097.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3097.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3097.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3097.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3101.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3101.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3101.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3101.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.408] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3101.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3101.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3101.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3101.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3101.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3101.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3101.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3101.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3101.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3101.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.150] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.200] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3157.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3157.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3157.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3157.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3161.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666190]
>[  3161.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666190] width 1440 pitch 5888 (/4 1472)
>[  3161.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267f630]
>[  3161.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267f630] width 1440 pitch 5888 (/4 1472)
>[  3161.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666190]
>[  3161.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666190] width 1440 pitch 5888 (/4 1472)
>[  3161.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267f630]
>[  3161.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267f630] width 1440 pitch 5888 (/4 1472)
>[  3161.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3161.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3161.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3161.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3161.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3161.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3161.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3161.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3161.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3161.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3161.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3161.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3161.513] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd4190]
>[  3161.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd4190] width 1440 pitch 5888 (/4 1472)
>[  3161.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3161.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3231.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3231.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3231.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3231.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3231.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3231.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3231.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3231.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3231.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3231.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3231.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3231.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3231.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3231.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3231.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3231.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3231.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3231.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3233.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3233.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3233.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3233.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3233.081] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3233.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3233.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3233.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3233.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3233.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3234.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc3700]
>[  3234.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc3700] width 1440 pitch 5888 (/4 1472)
>[  3234.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3234.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3236.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26601c0]
>[  3236.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26601c0] width 1440 pitch 5888 (/4 1472)
>[  3236.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3236.102] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3239.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2672950]
>[  3239.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2672950] width 1440 pitch 5888 (/4 1472)
>[  3239.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ca80]
>[  3240.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ca80] width 1440 pitch 5888 (/4 1472)
>[  3240.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ca80]
>[  3240.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ca80] width 1440 pitch 5888 (/4 1472)
>[  3240.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3240.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26757c0]
>[  3240.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26757c0] width 1440 pitch 5888 (/4 1472)
>[  3240.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ca80]
>[  3240.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ca80] width 1440 pitch 5888 (/4 1472)
>[  3240.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ca80]
>[  3240.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ca80] width 1440 pitch 5888 (/4 1472)
>[  3240.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264ca80]
>[  3240.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264ca80] width 1440 pitch 5888 (/4 1472)
>[  3240.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3240.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3240.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3240.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3240.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3240.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x268a330]
>[  3240.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x268a330] width 1440 pitch 5888 (/4 1472)
>[  3240.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26613c0]
>[  3240.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26613c0] width 1440 pitch 5888 (/4 1472)
>[  3341.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3341.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3341.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3341.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3341.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3341.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3341.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3341.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3341.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3341.733] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3341.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3341.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3341.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3341.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3341.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3341.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3341.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3341.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3341.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3341.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3341.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3341.833] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3341.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3341.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3345.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3345.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3345.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3345.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3345.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3345.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3345.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3345.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3345.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3345.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3345.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3345.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3345.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3345.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3345.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3345.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3345.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3346.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3346.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3346.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3346.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3346.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3346.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3346.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3346.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cd40]
>[  3346.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cd40] width 1440 pitch 5888 (/4 1472)
>[  3360.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2661ca0]
>[  3360.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2661ca0] width 1440 pitch 5888 (/4 1472)
>[  3361.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cbd0]
>[  3361.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cbd0] width 1440 pitch 5888 (/4 1472)
>[  3361.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd5580]
>[  3361.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd5580] width 1440 pitch 5888 (/4 1472)
>[  3361.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd5580]
>[  3361.504] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd5580] width 1440 pitch 5888 (/4 1472)
>[  3362.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2633180]
>[  3362.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2633180] width 1440 pitch 5888 (/4 1472)
>[  3362.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x206a2c0]
>[  3362.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x206a2c0] width 1440 pitch 5888 (/4 1472)
>[  3362.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26086d0]
>[  3362.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26086d0] width 1440 pitch 5888 (/4 1472)
>[  3362.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x206a2c0]
>[  3362.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x206a2c0] width 1440 pitch 5888 (/4 1472)
>[  3362.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26086d0]
>[  3362.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26086d0] width 1440 pitch 5888 (/4 1472)
>[  3362.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x206a2c0]
>[  3362.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x206a2c0] width 1440 pitch 5888 (/4 1472)
>[  3362.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26086d0]
>[  3362.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26086d0] width 1440 pitch 5888 (/4 1472)
>[  3362.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x206a2c0]
>[  3362.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x206a2c0] width 1440 pitch 5888 (/4 1472)
>[  3362.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26086d0]
>[  3362.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26086d0] width 1440 pitch 5888 (/4 1472)
>[  3362.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x206a2c0]
>[  3362.739] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x206a2c0] width 1440 pitch 5888 (/4 1472)
>[  3362.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26086d0]
>[  3362.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26086d0] width 1440 pitch 5888 (/4 1472)
>[  3362.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x206a2c0]
>[  3362.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x206a2c0] width 1440 pitch 5888 (/4 1472)
>[  3362.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26086d0]
>[  3362.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26086d0] width 1440 pitch 5888 (/4 1472)
>[  3364.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c9770]
>[  3364.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c9770] width 1440 pitch 5888 (/4 1472)
>[  3364.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766610]
>[  3364.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766610] width 1440 pitch 5888 (/4 1472)
>[  3364.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766610]
>[  3364.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766610] width 1440 pitch 5888 (/4 1472)
>[  3364.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766610]
>[  3364.374] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766610] width 1440 pitch 5888 (/4 1472)
>[  3364.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2765880]
>[  3364.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2765880] width 1440 pitch 5888 (/4 1472)
>[  3364.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766610]
>[  3364.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766610] width 1440 pitch 5888 (/4 1472)
>[  3364.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cbd0]
>[  3364.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cbd0] width 1440 pitch 5888 (/4 1472)
>[  3364.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766610]
>[  3364.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766610] width 1440 pitch 5888 (/4 1472)
>[  3364.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cbd0]
>[  3364.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cbd0] width 1440 pitch 5888 (/4 1472)
>[  3364.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2766610]
>[  3364.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2766610] width 1440 pitch 5888 (/4 1472)
>[  3383.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056560]
>[  3383.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056560] width 1440 pitch 5888 (/4 1472)
>[  3384.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27b2b90]
>[  3384.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27b2b90] width 1440 pitch 5888 (/4 1472)
>[  3384.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fad5f0]
>[  3384.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fad5f0] width 1440 pitch 5888 (/4 1472)
>[  3384.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d7f20]
>[  3384.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d7f20] width 1440 pitch 5888 (/4 1472)
>[  3405.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x275f890]
>[  3405.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x275f890] width 1440 pitch 5888 (/4 1472)
>[  3422.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27625b0]
>[  3422.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27625b0] width 1440 pitch 5888 (/4 1472)
>[  3427.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d4540]
>[  3427.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d4540] width 1440 pitch 5888 (/4 1472)
>[  3428.547] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x202bd40]
>[  3428.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x202bd40] width 1440 pitch 5888 (/4 1472)
>[  3428.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5340]
>[  3428.776] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5340] width 1440 pitch 5888 (/4 1472)
>[  3428.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7d20]
>[  3428.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7d20] width 1440 pitch 5888 (/4 1472)
>[  3440.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20080a0]
>[  3440.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20080a0] width 1440 pitch 5888 (/4 1472)
>[  3475.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc4f00]
>[  3475.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc4f00] width 1440 pitch 5888 (/4 1472)
>[  3476.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc4820]
>[  3476.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc4820] width 1440 pitch 5888 (/4 1472)
>[  3476.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa66d0]
>[  3476.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa66d0] width 1440 pitch 5888 (/4 1472)
>[  3476.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa66d0]
>[  3476.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa66d0] width 1440 pitch 5888 (/4 1472)
>[  3482.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x200bd00]
>[  3482.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x200bd00] width 1440 pitch 5888 (/4 1472)
>[  3482.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  3482.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  3483.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  3483.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  3483.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cbef0]
>[  3483.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cbef0] width 1440 pitch 5888 (/4 1472)
>[  3560.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d4e70]
>[  3560.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d4e70] width 1440 pitch 5888 (/4 1472)
>[  3560.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3560.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3560.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3560.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3560.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3560.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3560.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3560.468] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3560.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3560.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3560.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3560.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3560.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3560.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3560.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3560.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3560.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3560.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3560.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3560.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3560.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3560.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3564.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x264cca0]
>[  3564.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x264cca0] width 1440 pitch 5888 (/4 1472)
>[  3564.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3564.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3645.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3645.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3645.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3645.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3645.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3645.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3645.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3645.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3645.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3645.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3645.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3645.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3646.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3646.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3646.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3646.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3646.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3646.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3646.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3646.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3646.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x267e770]
>[  3646.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x267e770] width 1440 pitch 5888 (/4 1472)
>[  3647.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079e60]
>[  3647.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079e60] width 1440 pitch 5888 (/4 1472)
>[  3647.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3647.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3647.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3647.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3647.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cb70]
>[  3647.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cb70] width 1440 pitch 5888 (/4 1472)
>[  3647.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3647.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3647.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261cb70]
>[  3647.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261cb70] width 1440 pitch 5888 (/4 1472)
>[  3729.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207d770]
>[  3729.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207d770] width 1440 pitch 5888 (/4 1472)
>[  3730.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008ec0]
>[  3730.135] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008ec0] width 1440 pitch 5888 (/4 1472)
>[  3730.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2708680]
>[  3730.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2708680] width 1440 pitch 5888 (/4 1472)
>[  3730.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2708680]
>[  3730.235] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2708680] width 1440 pitch 5888 (/4 1472)
>[  3741.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1faa390]
>[  3741.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1faa390] width 1440 pitch 5888 (/4 1472)
>[  3745.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d4d60]
>[  3745.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d4d60] width 1440 pitch 5888 (/4 1472)
>[  3745.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd5790]
>[  3745.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd5790] width 1440 pitch 5888 (/4 1472)
>[  3745.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d4d60]
>[  3745.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d4d60] width 1440 pitch 5888 (/4 1472)
>[  3745.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd5790]
>[  3745.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd5790] width 1440 pitch 5888 (/4 1472)
>[  3745.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d4d60]
>[  3745.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d4d60] width 1440 pitch 5888 (/4 1472)
>[  3745.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd5790]
>[  3745.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd5790] width 1440 pitch 5888 (/4 1472)
>[  3745.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5900]
>[  3745.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5900] width 1440 pitch 5888 (/4 1472)
>[  3746.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fab2b0]
>[  3746.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fab2b0] width 1440 pitch 5888 (/4 1472)
>[  3746.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1850]
>[  3746.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1850] width 1440 pitch 5888 (/4 1472)
>[  3747.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079fa0]
>[  3747.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079fa0] width 1440 pitch 5888 (/4 1472)
>[  3747.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5900]
>[  3747.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5900] width 1440 pitch 5888 (/4 1472)
>[  3747.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079fa0]
>[  3747.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079fa0] width 1440 pitch 5888 (/4 1472)
>[  3747.909] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5900]
>[  3747.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5900] width 1440 pitch 5888 (/4 1472)
>[  3747.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079fa0]
>[  3748.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079fa0] width 1440 pitch 5888 (/4 1472)
>[  3748.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5900]
>[  3748.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5900] width 1440 pitch 5888 (/4 1472)
>[  3748.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279d850]
>[  3748.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279d850] width 1440 pitch 5888 (/4 1472)
>[  3748.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27adc80]
>[  3749.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27adc80] width 1440 pitch 5888 (/4 1472)
>[  3749.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6360]
>[  3749.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6360] width 1440 pitch 5888 (/4 1472)
>[  3749.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1cb0]
>[  3749.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1cb0] width 1440 pitch 5888 (/4 1472)
>[  3749.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1a20]
>[  3749.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1a20] width 1440 pitch 5888 (/4 1472)
>[  3749.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1cb0]
>[  3749.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1cb0] width 1440 pitch 5888 (/4 1472)
>[  3749.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1a20]
>[  3749.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1a20] width 1440 pitch 5888 (/4 1472)
>[  3749.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1cb0]
>[  3749.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1cb0] width 1440 pitch 5888 (/4 1472)
>[  3749.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1a20]
>[  3749.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1a20] width 1440 pitch 5888 (/4 1472)
>[  3749.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1cb0]
>[  3749.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1cb0] width 1440 pitch 5888 (/4 1472)
>[  3750.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df650]
>[  3750.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df650] width 1440 pitch 5888 (/4 1472)
>[  3750.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  3750.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  3750.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df650]
>[  3750.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df650] width 1440 pitch 5888 (/4 1472)
>[  3750.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  3750.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  3750.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27b84f0]
>[  3750.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27b84f0] width 1440 pitch 5888 (/4 1472)
>[  3750.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  3750.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  3750.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27b84f0]
>[  3750.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27b84f0] width 1440 pitch 5888 (/4 1472)
>[  3750.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27b8550]
>[  3750.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27b8550] width 1440 pitch 5888 (/4 1472)
>[  3750.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26edb50]
>[  3750.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26edb50] width 1440 pitch 5888 (/4 1472)
>[  3751.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc8770]
>[  3751.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc8770] width 1440 pitch 5888 (/4 1472)
>[  3752.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd28a0]
>[  3752.142] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd28a0] width 1440 pitch 5888 (/4 1472)
>[  3752.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a1e0]
>[  3752.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a1e0] width 1440 pitch 5888 (/4 1472)
>[  3752.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd28a0]
>[  3752.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd28a0] width 1440 pitch 5888 (/4 1472)
>[  3758.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26de140]
>[  3758.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26de140] width 1440 pitch 5888 (/4 1472)
>[  3759.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6060]
>[  3759.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6060] width 1440 pitch 5888 (/4 1472)
>[  3759.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6060]
>[  3759.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6060] width 1440 pitch 5888 (/4 1472)
>[  3759.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6060]
>[  3759.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6060] width 1440 pitch 5888 (/4 1472)
>[  3759.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e6060]
>[  3759.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e6060] width 1440 pitch 5888 (/4 1472)
>[  3759.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  3759.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  3759.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  3759.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  3759.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  3759.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  3759.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3759.883] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3759.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3759.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3759.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3759.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3759.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3759.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3759.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3760.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3760.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3760.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3760.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3760.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3760.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3760.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3760.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3760.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3760.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3760.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3760.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3760.101] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3760.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1be0]
>[  3760.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1be0] width 1440 pitch 5888 (/4 1472)
>[  3760.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3760.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3762.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3762.787] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3762.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3762.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3762.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3762.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3762.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3762.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3762.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3762.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3762.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3762.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3762.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3762.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3762.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008de0]
>[  3762.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008de0] width 1440 pitch 5888 (/4 1472)
>[  3762.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008e40]
>[  3762.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008e40] width 1440 pitch 5888 (/4 1472)
>[  3762.977] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3763.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3768.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3769.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3769.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3769.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3769.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3769.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3769.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3769.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3769.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761010]
>[  3769.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761010] width 1440 pitch 5888 (/4 1472)
>[  3769.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3769.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3769.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3769.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3769.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3769.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3769.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3769.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3769.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3769.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3769.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3769.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  3769.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26801e0]
>[  3769.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26801e0] width 1440 pitch 5888 (/4 1472)
>[  3769.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  3769.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 1440 pitch 5888 (/4 1472)
>[  4588.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fee10]
>[  4588.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fee10] width 1440 pitch 5888 (/4 1472)
>[  4588.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276dd10]
>[  4588.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276dd10] width 1440 pitch 5888 (/4 1472)
>[  4588.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cac70]
>[  4588.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cac70] width 1440 pitch 5888 (/4 1472)
>[  4588.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fee10]
>[  4588.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fee10] width 1440 pitch 5888 (/4 1472)
>[  4589.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1c00]
>[  4589.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1c00] width 1440 pitch 5888 (/4 1472)
>[  4589.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276dd10]
>[  4589.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276dd10] width 1440 pitch 5888 (/4 1472)
>[  4589.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1c00]
>[  4589.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1c00] width 1440 pitch 5888 (/4 1472)
>[  4590.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fee10]
>[  4590.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fee10] width 1440 pitch 5888 (/4 1472)
>[  4590.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cac70]
>[  4590.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cac70] width 1440 pitch 5888 (/4 1472)
>[  4590.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  4590.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  4590.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27657e0]
>[  4590.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27657e0] width 1440 pitch 5888 (/4 1472)
>[  4590.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27657e0]
>[  4590.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27657e0] width 1440 pitch 5888 (/4 1472)
>[  4590.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27657e0]
>[  4590.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27657e0] width 1440 pitch 5888 (/4 1472)
>[  4590.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  4590.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  4592.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fea70]
>[  4592.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fea70] width 1440 pitch 5888 (/4 1472)
>[  4694.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c0c0]
>[  4694.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c0c0] width 1440 pitch 5888 (/4 1472)
>[  4694.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4694.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4694.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02b0]
>[  4694.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02b0] width 1440 pitch 5888 (/4 1472)
>[  4694.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276da30]
>[  4694.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276da30] width 1440 pitch 5888 (/4 1472)
>[  4694.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276da90]
>[  4694.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276da90] width 1440 pitch 5888 (/4 1472)
>[  4694.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276da30]
>[  4694.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276da30] width 1440 pitch 5888 (/4 1472)
>[  4694.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe940]
>[  4694.158] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe940] width 1440 pitch 5888 (/4 1472)
>[  4694.160] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02b0]
>[  4694.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02b0] width 1440 pitch 5888 (/4 1472)
>[  4694.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe940]
>[  4694.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe940] width 1440 pitch 5888 (/4 1472)
>[  4694.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02b0]
>[  4694.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02b0] width 1440 pitch 5888 (/4 1472)
>[  4694.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c090]
>[  4694.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c090] width 1440 pitch 5888 (/4 1472)
>[  4694.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e0280]
>[  4694.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e0280] width 1440 pitch 5888 (/4 1472)
>[  4694.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025aa0]
>[  4694.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025aa0] width 1440 pitch 5888 (/4 1472)
>[  4699.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4699.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4699.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4699.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4699.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4699.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4699.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025b00]
>[  4699.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025b00] width 1440 pitch 5888 (/4 1472)
>[  4699.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4699.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4699.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4699.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4699.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025b00]
>[  4699.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025b00] width 1440 pitch 5888 (/4 1472)
>[  4699.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4699.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4699.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c8d0]
>[  4699.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c8d0] width 1440 pitch 5888 (/4 1472)
>[  4699.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4699.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4699.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276da30]
>[  4699.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276da30] width 1440 pitch 5888 (/4 1472)
>[  4699.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4699.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4806.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4806.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4806.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4806.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4806.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4806.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4806.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4806.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.295] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4806.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4806.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4806.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4806.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4806.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4806.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4810.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4810.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4810.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4810.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4810.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4810.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4810.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4810.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4810.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4810.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4810.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269c060]
>[  4810.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269c060] width 1440 pitch 5888 (/4 1472)
>[  4810.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd45f0]
>[  4810.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd45f0] width 1440 pitch 5888 (/4 1472)
>[  4817.104] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[  4817.104] (II) RADEON(0): Printing DDC gathered Modelines:
>[  4817.104] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[  4835.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4835.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4835.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02d0]
>[  4835.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02d0] width 1440 pitch 5888 (/4 1472)
>[  4835.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4835.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4835.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02d0]
>[  4835.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02d0] width 1440 pitch 5888 (/4 1472)
>[  4835.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4836.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4836.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02d0]
>[  4836.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02d0] width 1440 pitch 5888 (/4 1472)
>[  4836.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4836.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4836.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02d0]
>[  4836.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02d0] width 1440 pitch 5888 (/4 1472)
>[  4836.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4836.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4836.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02d0]
>[  4836.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02d0] width 1440 pitch 5888 (/4 1472)
>[  4836.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4836.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4836.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e02d0]
>[  4836.127] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e02d0] width 1440 pitch 5888 (/4 1472)
>[  4836.129] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26c54c0]
>[  4836.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26c54c0] width 1440 pitch 5888 (/4 1472)
>[  4840.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4840.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa870]
>[  4840.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa870] width 1440 pitch 5888 (/4 1472)
>[  4840.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4840.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa870]
>[  4840.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa870] width 1440 pitch 5888 (/4 1472)
>[  4840.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4840.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa870]
>[  4840.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa870] width 1440 pitch 5888 (/4 1472)
>[  4840.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4840.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa870]
>[  4840.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa870] width 1440 pitch 5888 (/4 1472)
>[  4840.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4840.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa870]
>[  4840.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa870] width 1440 pitch 5888 (/4 1472)
>[  4840.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4840.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa870]
>[  4840.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa870] width 1440 pitch 5888 (/4 1472)
>[  4840.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e1740]
>[  4840.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e1740] width 1440 pitch 5888 (/4 1472)
>[  4921.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e4e0]
>[  4921.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e4e0] width 1440 pitch 5888 (/4 1472)
>[  4964.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278bca0]
>[  4964.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278bca0] width 1440 pitch 5888 (/4 1472)
>[  5030.439] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5030.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5030.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5030.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5030.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5030.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5030.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5030.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5030.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5030.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5030.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5030.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5030.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5030.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5030.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5030.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5030.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5030.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5030.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5030.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5034.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5034.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5034.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5034.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5034.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5034.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5034.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5034.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5034.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5034.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5034.760] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5034.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5034.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5034.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5034.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5034.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5034.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5034.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5034.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5034.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5034.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5034.874] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5038.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5038.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5038.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5038.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5038.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5038.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5038.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5038.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5038.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5038.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.645] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5038.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5038.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5038.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5038.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5038.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5038.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5038.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5038.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5038.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afabf0]
>[  5038.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afabf0] width 1440 pitch 5888 (/4 1472)
>[  5042.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5042.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5042.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5042.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5042.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5042.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5042.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5042.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5042.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5042.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5042.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5042.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5042.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5042.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5042.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5042.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5042.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5042.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5042.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5042.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5042.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa980]
>[  5042.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa980] width 1440 pitch 5888 (/4 1472)
>[  5042.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa90]
>[  5042.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa90] width 1440 pitch 5888 (/4 1472)
>[  5051.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26fe9a0]
>[  5051.108] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26fe9a0] width 1440 pitch 5888 (/4 1472)
>[  5051.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5051.292] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5229.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a55850]
>[  5229.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a55850] width 1440 pitch 5888 (/4 1472)
>[  5229.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x277f620]
>[  5229.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x277f620] width 1440 pitch 5888 (/4 1472)
>[  5241.528] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a55e60]
>[  5241.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a55e60] width 1440 pitch 5888 (/4 1472)
>[  5241.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af95c0]
>[  5241.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af95c0] width 1440 pitch 5888 (/4 1472)
>[  5241.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afab30]
>[  5241.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afab30] width 1440 pitch 5888 (/4 1472)
>[  5246.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af95c0]
>[  5246.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af95c0] width 1440 pitch 5888 (/4 1472)
>[  5246.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5246.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5246.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5246.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5246.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af95c0]
>[  5246.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af95c0] width 1440 pitch 5888 (/4 1472)
>[  5246.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1768fc0]
>[  5246.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1768fc0] width 1440 pitch 5888 (/4 1472)
>[  5246.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5246.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5246.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afab30]
>[  5246.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afab30] width 1440 pitch 5888 (/4 1472)
>[  5246.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5246.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5246.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afab30]
>[  5246.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afab30] width 1440 pitch 5888 (/4 1472)
>[  5246.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5246.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5246.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afab30]
>[  5246.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afab30] width 1440 pitch 5888 (/4 1472)
>[  5250.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5250.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5250.710] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5250.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5250.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5250.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5250.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5250.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5250.759] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5250.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5250.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5250.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5250.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5250.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5250.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5250.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5250.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5250.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5250.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5250.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5250.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2989830]
>[  5250.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2989830] width 1440 pitch 5888 (/4 1472)
>[  5254.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2989830]
>[  5254.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2989830] width 1440 pitch 5888 (/4 1472)
>[  5254.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af95c0]
>[  5254.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af95c0] width 1440 pitch 5888 (/4 1472)
>[  5254.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5254.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5255.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5255.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5255.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5255.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5255.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbff00]
>[  5255.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbff00] width 1440 pitch 5888 (/4 1472)
>[  5255.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2989830]
>[  5255.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2989830] width 1440 pitch 5888 (/4 1472)
>[  5255.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5255.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5255.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaef0]
>[  5255.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaef0] width 1440 pitch 5888 (/4 1472)
>[  5255.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afab30]
>[  5255.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afab30] width 1440 pitch 5888 (/4 1472)
>[  5255.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2989830]
>[  5255.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2989830] width 1440 pitch 5888 (/4 1472)
>[  5255.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afab30]
>[  5255.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afab30] width 1440 pitch 5888 (/4 1472)
>[  5255.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5255.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5255.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2791cf0]
>[  5255.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2791cf0] width 1440 pitch 5888 (/4 1472)
>[  5256.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5256.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5256.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5256.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5256.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5256.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5256.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5256.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5256.970] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5256.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5257.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5257.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5257.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5257.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5257.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5257.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5257.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5257.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5257.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5257.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5257.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5257.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5257.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5257.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5258.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5258.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5259.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5259.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5259.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa000]
>[  5259.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa000] width 1440 pitch 5888 (/4 1472)
>[  5259.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5259.069] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5259.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5259.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5259.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5259.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5259.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5259.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5259.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2025ac0]
>[  5259.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2025ac0] width 1440 pitch 5888 (/4 1472)
>[  5259.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5259.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5259.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5259.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5259.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5259.232] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5259.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9960]
>[  5259.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9960] width 1440 pitch 5888 (/4 1472)
>[  5259.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5259.266] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5433.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ece10]
>[  5433.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ece10] width 1440 pitch 5888 (/4 1472)
>[  5433.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26eccb0]
>[  5433.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26eccb0] width 1440 pitch 5888 (/4 1472)
>[  5437.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a69f10]
>[  5437.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a69f10] width 1440 pitch 5888 (/4 1472)
>[  5438.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27790d0]
>[  5438.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27790d0] width 1440 pitch 5888 (/4 1472)
>[  5438.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281ec80]
>[  5438.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281ec80] width 1440 pitch 5888 (/4 1472)
>[  5438.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5438.559] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5451.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5451.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5451.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5451.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5451.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5451.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5451.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5451.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5451.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5451.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5451.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5451.677] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5451.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5451.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5451.713] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5451.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5451.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5451.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5454.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5454.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5455.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5455.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5455.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5455.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5459.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5459.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5459.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5459.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5459.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5459.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5459.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5459.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5459.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5459.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5459.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5459.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5459.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5459.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5459.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27f0380]
>[  5459.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27f0380] width 1440 pitch 5888 (/4 1472)
>[  5459.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5459.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5459.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281fcb0]
>[  5459.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281fcb0] width 1440 pitch 5888 (/4 1472)
>[  5459.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281f860]
>[  5459.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281f860] width 1440 pitch 5888 (/4 1472)
>[  5459.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2820390]
>[  5459.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2820390] width 1440 pitch 5888 (/4 1472)
>[  5459.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70b40]
>[  5459.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70b40] width 1440 pitch 5888 (/4 1472)
>[  5463.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a67420]
>[  5463.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a67420] width 1440 pitch 5888 (/4 1472)
>[  5463.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28201a0]
>[  5463.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28201a0] width 1440 pitch 5888 (/4 1472)
>[  5463.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281fcb0]
>[  5463.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281fcb0] width 1440 pitch 5888 (/4 1472)
>[  5463.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a67460]
>[  5463.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a67460] width 1440 pitch 5888 (/4 1472)
>[  5463.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281fcb0]
>[  5463.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281fcb0] width 1440 pitch 5888 (/4 1472)
>[  5463.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70b40]
>[  5463.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70b40] width 1440 pitch 5888 (/4 1472)
>[  5463.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x281fcb0]
>[  5463.439] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x281fcb0] width 1440 pitch 5888 (/4 1472)
>[  5463.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x280f9d0]
>[  5463.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x280f9d0] width 1440 pitch 5888 (/4 1472)
>[  5463.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a70b40]
>[  5463.485] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a70b40] width 1440 pitch 5888 (/4 1472)
>[  5463.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28201a0]
>[  5463.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28201a0] width 1440 pitch 5888 (/4 1472)
>[  5475.892] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a700a0]
>[  5475.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a700a0] width 1440 pitch 5888 (/4 1472)
>[  5479.110] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5479.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5674.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5674.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5674.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5674.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5674.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5674.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5674.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5674.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5674.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5674.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5674.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5674.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5674.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5674.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5674.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5674.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5674.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5674.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5674.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5674.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5674.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5674.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5674.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5674.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.650] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.670] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5678.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5678.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5678.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5678.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5761.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2771dd0]
>[  5761.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2771dd0] width 1440 pitch 5888 (/4 1472)
>[  5761.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2771dd0]
>[  5761.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2771dd0] width 1440 pitch 5888 (/4 1472)
>[  5761.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2771dd0]
>[  5761.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2771dd0] width 1440 pitch 5888 (/4 1472)
>[  5761.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e460]
>[  5761.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e460] width 1440 pitch 5888 (/4 1472)
>[  5761.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e460]
>[  5761.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e460] width 1440 pitch 5888 (/4 1472)
>[  5761.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e460]
>[  5761.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e460] width 1440 pitch 5888 (/4 1472)
>[  5761.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e460]
>[  5761.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e460] width 1440 pitch 5888 (/4 1472)
>[  5761.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e460]
>[  5761.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e460] width 1440 pitch 5888 (/4 1472)
>[  5761.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e460]
>[  5761.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e460] width 1440 pitch 5888 (/4 1472)
>[  5761.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5761.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5761.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5761.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5761.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5762.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5762.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5762.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5762.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5762.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5762.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5762.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5762.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5762.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5762.179] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5762.191] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5762.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5762.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5762.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5762.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5762.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5762.291] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5762.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5762.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5762.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279e590]
>[  5762.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279e590] width 1440 pitch 5888 (/4 1472)
>[  5764.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5764.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5764.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5764.193] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5764.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5764.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5764.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5764.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5764.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5764.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5764.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.563] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.578] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.627] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.629] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.677] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.760] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.860] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.879] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.894] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5764.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5764.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5764.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5764.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5768.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5768.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5768.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5768.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5768.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5768.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5768.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279e670]
>[  5768.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279e670] width 1440 pitch 5888 (/4 1472)
>[  5768.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5768.349] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5768.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5768.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5768.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5768.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5768.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5768.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5768.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5768.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5768.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5768.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5768.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5768.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5768.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5768.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5768.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5768.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5845.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5845.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5845.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5845.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5845.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5845.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5845.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5845.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5845.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5845.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5845.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5845.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5845.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5845.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5845.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5845.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5845.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5845.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5845.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5845.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5846.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5846.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5846.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5846.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5846.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5846.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5847.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5847.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5847.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5847.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5847.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5847.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5847.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5847.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5849.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x202a200]
>[  5849.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x202a200] width 1440 pitch 5888 (/4 1472)
>[  5850.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x202a200]
>[  5850.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x202a200] width 1440 pitch 5888 (/4 1472)
>[  5850.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x202a200]
>[  5850.219] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x202a200] width 1440 pitch 5888 (/4 1472)
>[  5850.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.252] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.269] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.319] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5850.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279a310]
>[  5850.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279a310] width 1440 pitch 5888 (/4 1472)
>[  5850.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5850.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5865.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5865.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5865.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5865.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5865.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5865.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5865.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5865.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5865.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5865.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5865.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5865.986] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5865.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5866.003] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5866.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5866.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5866.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5866.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5866.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5866.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5866.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5866.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5866.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5866.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5866.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5866.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5870.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5870.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5870.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5870.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5870.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5870.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5870.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5870.174] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5870.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5870.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5870.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5870.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5870.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5870.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5870.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5870.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5870.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  5870.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  5870.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  5870.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  5870.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5870.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5870.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26ecc50]
>[  5870.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26ecc50] width 1440 pitch 5888 (/4 1472)
>[  5870.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  5870.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  5945.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26feef0]
>[  5945.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26feef0] width 1440 pitch 5888 (/4 1472)
>[  5958.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632900]
>[  5958.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632900] width 1440 pitch 5888 (/4 1472)
>[  5959.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26328e0]
>[  5959.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26328e0] width 1440 pitch 5888 (/4 1472)
>[  5980.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26328e0]
>[  5980.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26328e0] width 1440 pitch 5888 (/4 1472)
>[  5981.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008d20]
>[  5981.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008d20] width 1440 pitch 5888 (/4 1472)
>[  5981.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761870]
>[  5981.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761870] width 1440 pitch 5888 (/4 1472)
>[  5981.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc6580]
>[  5981.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc6580] width 1440 pitch 5888 (/4 1472)
>[  5981.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056460]
>[  5981.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056460] width 1440 pitch 5888 (/4 1472)
>[  5981.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cac70]
>[  5981.961] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cac70] width 1440 pitch 5888 (/4 1472)
>[  5981.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd9170]
>[  5981.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd9170] width 1440 pitch 5888 (/4 1472)
>[  5982.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  5982.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  5982.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd9170]
>[  5982.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd9170] width 1440 pitch 5888 (/4 1472)
>[  5982.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  5982.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  5982.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd9170]
>[  5982.161] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd9170] width 1440 pitch 5888 (/4 1472)
>[  5982.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  5982.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  5982.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd9170]
>[  5982.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd9170] width 1440 pitch 5888 (/4 1472)
>[  5982.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  5982.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  5982.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd9170]
>[  5982.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd9170] width 1440 pitch 5888 (/4 1472)
>[  5982.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  5982.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  5983.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd9170]
>[  5983.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd9170] width 1440 pitch 5888 (/4 1472)
>[  5983.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056460]
>[  5983.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056460] width 1440 pitch 5888 (/4 1472)
>[  5983.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761870]
>[  5983.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761870] width 1440 pitch 5888 (/4 1472)
>[  5983.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a7a0]
>[  5983.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a7a0] width 1440 pitch 5888 (/4 1472)
>[  5983.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5983.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5983.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e3f0]
>[  5983.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e3f0] width 1440 pitch 5888 (/4 1472)
>[  5983.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a6f0]
>[  5983.929] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a6f0] width 1440 pitch 5888 (/4 1472)
>[  5983.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a6f0]
>[  5983.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a6f0] width 1440 pitch 5888 (/4 1472)
>[  5983.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5983.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5983.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5984.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5984.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5984.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5984.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5984.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5984.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5984.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5984.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5984.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5984.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5984.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5984.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5984.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5984.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5984.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5984.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x278e390]
>[  5984.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x278e390] width 1440 pitch 5888 (/4 1472)
>[  5984.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0780]
>[  5984.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0780] width 1440 pitch 5888 (/4 1472)
>[  5993.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d1910]
>[  5993.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d1910] width 1440 pitch 5888 (/4 1472)
>[  5998.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0460]
>[  5998.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0460] width 1440 pitch 5888 (/4 1472)
>[  5998.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d1650]
>[  5998.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d1650] width 1440 pitch 5888 (/4 1472)
>[  5998.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0460]
>[  5998.879] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0460] width 1440 pitch 5888 (/4 1472)
>[  5998.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d1650]
>[  5998.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d1650] width 1440 pitch 5888 (/4 1472)
>[  5998.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0460]
>[  5998.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0460] width 1440 pitch 5888 (/4 1472)
>[  5998.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d1650]
>[  5998.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d1650] width 1440 pitch 5888 (/4 1472)
>[  5998.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  5999.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  5999.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0460]
>[  5999.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0460] width 1440 pitch 5888 (/4 1472)
>[  5999.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  5999.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6000.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0ff0]
>[  6000.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0ff0] width 1440 pitch 5888 (/4 1472)
>[  6000.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6000.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6000.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a60c80]
>[  6000.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a60c80] width 1440 pitch 5888 (/4 1472)
>[  6000.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6000.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6000.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a60c80]
>[  6000.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a60c80] width 1440 pitch 5888 (/4 1472)
>[  6000.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6000.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6000.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a60c80]
>[  6000.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a60c80] width 1440 pitch 5888 (/4 1472)
>[  6000.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6000.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6000.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a60c80]
>[  6000.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a60c80] width 1440 pitch 5888 (/4 1472)
>[  6000.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6000.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6004.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a60c80]
>[  6004.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a60c80] width 1440 pitch 5888 (/4 1472)
>[  6012.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6012.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6012.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6012.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6012.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cd340]
>[  6012.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cd340] width 1440 pitch 5888 (/4 1472)
>[  6012.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6012.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6012.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cd340]
>[  6012.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cd340] width 1440 pitch 5888 (/4 1472)
>[  6012.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6012.477] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6012.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cd340]
>[  6012.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cd340] width 1440 pitch 5888 (/4 1472)
>[  6012.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6012.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6012.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6012.527] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6012.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6012.560] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6012.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e2540]
>[  6012.577] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e2540] width 1440 pitch 5888 (/4 1472)
>[  6012.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299aca0]
>[  6012.594] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299aca0] width 1440 pitch 5888 (/4 1472)
>[  6012.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2995f70]
>[  6012.610] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2995f70] width 1440 pitch 5888 (/4 1472)
>[  6015.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fdd4d0]
>[  6015.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fdd4d0] width 1440 pitch 5888 (/4 1472)
>[  6015.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e2540]
>[  6015.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e2540] width 1440 pitch 5888 (/4 1472)
>[  6015.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056460]
>[  6015.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056460] width 1440 pitch 5888 (/4 1472)
>[  6015.341] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cac70]
>[  6015.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cac70] width 1440 pitch 5888 (/4 1472)
>[  6015.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc6580]
>[  6015.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc6580] width 1440 pitch 5888 (/4 1472)
>[  6015.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2055bb0]
>[  6015.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2055bb0] width 1440 pitch 5888 (/4 1472)
>[  6015.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fdd4d0]
>[  6015.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fdd4d0] width 1440 pitch 5888 (/4 1472)
>[  6015.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27e2540]
>[  6015.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27e2540] width 1440 pitch 5888 (/4 1472)
>[  6015.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2056460]
>[  6015.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2056460] width 1440 pitch 5888 (/4 1472)
>[  6015.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fdd4d0]
>[  6015.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fdd4d0] width 1440 pitch 5888 (/4 1472)
>[  6015.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2055bb0]
>[  6015.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2055bb0] width 1440 pitch 5888 (/4 1472)
>[  6015.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc6580]
>[  6015.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc6580] width 1440 pitch 5888 (/4 1472)
>[  6015.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26cac70]
>[  6015.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26cac70] width 1440 pitch 5888 (/4 1472)
>[  6015.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc6580]
>[  6015.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc6580] width 1440 pitch 5888 (/4 1472)
>[  6061.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6061.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6061.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6061.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6061.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6061.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6061.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6061.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6061.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6061.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6061.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6061.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6061.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6061.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6061.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6061.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6061.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6061.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6061.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6061.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6061.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6061.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6061.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6061.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6065.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fdd4d0]
>[  6065.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fdd4d0] width 1440 pitch 5888 (/4 1472)
>[  6065.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a3c0]
>[  6065.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a3c0] width 1440 pitch 5888 (/4 1472)
>[  6065.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6065.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6065.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6065.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6065.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2995f70]
>[  6065.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2995f70] width 1440 pitch 5888 (/4 1472)
>[  6065.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6065.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6065.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6065.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6065.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6065.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6065.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6065.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6065.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6065.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6065.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a670e0]
>[  6065.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a670e0] width 1440 pitch 5888 (/4 1472)
>[  6065.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6065.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6072.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a3c0]
>[  6072.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a3c0] width 1440 pitch 5888 (/4 1472)
>[  6072.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26efcd0]
>[  6072.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26efcd0] width 1440 pitch 5888 (/4 1472)
>[  6072.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a3c0]
>[  6072.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a3c0] width 1440 pitch 5888 (/4 1472)
>[  6072.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26efcd0]
>[  6072.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26efcd0] width 1440 pitch 5888 (/4 1472)
>[  6072.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6072.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6072.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079d60]
>[  6072.759] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079d60] width 1440 pitch 5888 (/4 1472)
>[  6072.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6072.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6072.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079d60]
>[  6072.809] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079d60] width 1440 pitch 5888 (/4 1472)
>[  6072.827] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6072.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6072.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079d60]
>[  6072.876] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079d60] width 1440 pitch 5888 (/4 1472)
>[  6072.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6072.910] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6073.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6073.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6073.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6073.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6073.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6073.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6073.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6073.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6074.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6074.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6074.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a3c0]
>[  6074.194] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a3c0] width 1440 pitch 5888 (/4 1472)
>[  6074.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa70]
>[  6074.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa70] width 1440 pitch 5888 (/4 1472)
>[  6075.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a5a3c0]
>[  6075.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a5a3c0] width 1440 pitch 5888 (/4 1472)
>[  6075.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa70]
>[  6075.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa70] width 1440 pitch 5888 (/4 1472)
>[  6076.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afaa70]
>[  6076.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afaa70] width 1440 pitch 5888 (/4 1472)
>[  6076.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6076.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6076.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2079d60]
>[  6076.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2079d60] width 1440 pitch 5888 (/4 1472)
>[  6076.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6076.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6076.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  6076.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 1440 pitch 5888 (/4 1472)
>[  6076.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x202c420]
>[  6076.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x202c420] width 1440 pitch 5888 (/4 1472)
>[  6076.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6076.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6076.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6076.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6076.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6076.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6076.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6077.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6077.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6077.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6077.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6077.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6077.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6077.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6077.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20102a0]
>[  6077.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20102a0] width 1440 pitch 5888 (/4 1472)
>[  6228.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6228.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6228.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6228.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6228.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6228.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6228.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6228.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6228.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6228.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6228.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6228.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6228.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6228.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6228.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6228.393] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6228.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6228.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6228.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6228.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6228.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6228.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6228.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6228.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6232.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6232.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6232.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6232.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6339.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6339.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6339.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6339.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6339.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6339.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.646] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6339.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6339.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6339.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6339.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6339.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6339.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6339.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6339.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6343.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6343.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6343.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6343.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6343.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6343.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6343.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6343.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6343.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6343.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6343.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6343.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6343.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6343.903] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6343.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6343.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6343.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6343.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6343.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6343.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 1440 pitch 5888 (/4 1472)
>[  6399.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6399.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6399.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6399.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6399.080] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6399.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6399.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6399.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6399.113] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6399.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6399.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6399.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6399.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6399.227] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6399.241] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6399.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6399.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6399.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6399.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6399.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6399.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6399.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6399.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6399.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6399.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6399.678] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6399.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6399.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6399.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6399.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6399.915] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6399.928] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6399.930] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6399.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6399.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6399.962] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6399.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6399.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6399.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6399.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6399.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6400.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6400.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6400.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6400.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6400.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6400.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6400.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6400.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27911c0]
>[  6400.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27911c0] width 1440 pitch 5888 (/4 1472)
>[  6400.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6400.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6400.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6400.111] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6400.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6400.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6400.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6400.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6400.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  6400.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 1440 pitch 5888 (/4 1472)
>[  6400.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6400.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6400.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6400.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6400.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6400.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6400.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6400.229] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6400.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6400.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6400.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6400.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6400.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e9780]
>[  6400.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e9780] width 1440 pitch 5888 (/4 1472)
>[  6400.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6400.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6404.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6404.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6404.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6404.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6422.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6422.455] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6422.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6422.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6422.519] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6422.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6422.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6422.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6422.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6422.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6422.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6422.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6422.624] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6422.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.641] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.707] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.724] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.726] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.741] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.776] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.791] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6426.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6426.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6426.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6426.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.261] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.263] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.297] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6430.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26df3a0]
>[  6430.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26df3a0] width 1440 pitch 5888 (/4 1472)
>[  6430.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd43e0]
>[  6430.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd43e0] width 1440 pitch 5888 (/4 1472)
>[  6434.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6434.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6434.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6434.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6434.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6434.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6434.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6434.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6434.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6434.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6434.568] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6434.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6434.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6434.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6434.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6434.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6434.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29d0550]
>[  6434.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29d0550] width 1440 pitch 5888 (/4 1472)
>[  6434.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709340]
>[  6434.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709340] width 1440 pitch 5888 (/4 1472)
>[  6449.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6449.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6449.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6449.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6449.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6449.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6449.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6449.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6449.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6449.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6449.663] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6449.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6449.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6449.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6449.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6449.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6449.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6449.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6450.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6450.082] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6450.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6450.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6450.128] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6450.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6450.660] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1150]
>[  6450.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1150] width 1440 pitch 5888 (/4 1472)
>[  6450.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc10f0]
>[  6450.716] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc10f0] width 1440 pitch 5888 (/4 1472)
>[  6451.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a5f0]
>[  6451.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a5f0] width 1440 pitch 5888 (/4 1472)
>[  6452.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a5f0]
>[  6452.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a5f0] width 1440 pitch 5888 (/4 1472)
>[  6452.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a5f0]
>[  6452.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a5f0] width 1440 pitch 5888 (/4 1472)
>[  6452.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.668] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a5f0]
>[  6452.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a5f0] width 1440 pitch 5888 (/4 1472)
>[  6452.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a5f0]
>[  6452.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a5f0] width 1440 pitch 5888 (/4 1472)
>[  6452.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe3de0]
>[  6452.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe3de0] width 1440 pitch 5888 (/4 1472)
>[  6452.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a570]
>[  6452.802] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a570] width 1440 pitch 5888 (/4 1472)
>[  6452.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe3de0]
>[  6452.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe3de0] width 1440 pitch 5888 (/4 1472)
>[  6452.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a570]
>[  6452.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a570] width 1440 pitch 5888 (/4 1472)
>[  6452.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a570]
>[  6452.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a570] width 1440 pitch 5888 (/4 1472)
>[  6452.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a570]
>[  6452.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a570] width 1440 pitch 5888 (/4 1472)
>[  6452.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.919] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a570]
>[  6452.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a570] width 1440 pitch 5888 (/4 1472)
>[  6452.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6452.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6452.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe3de0]
>[  6452.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe3de0] width 1440 pitch 5888 (/4 1472)
>[  6452.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6452.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6452.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6453.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6453.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6453.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6453.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6453.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6453.345] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6453.386] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6453.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6453.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6453.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6453.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6453.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6453.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6453.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6453.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6454.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6454.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6454.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6454.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6454.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269a970]
>[  6454.404] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269a970] width 1440 pitch 5888 (/4 1472)
>[  6454.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269aad0]
>[  6454.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269aad0] width 1440 pitch 5888 (/4 1472)
>[  6457.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fe4e90]
>[  6457.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fe4e90] width 1440 pitch 5888 (/4 1472)
>[  6457.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0390]
>[  6457.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0390] width 1440 pitch 5888 (/4 1472)
>[  6457.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x261caa0]
>[  6457.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x261caa0] width 1440 pitch 5888 (/4 1472)
>[  6457.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0390]
>[  6457.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0390] width 1440 pitch 5888 (/4 1472)
>[  6457.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0440]
>[  6457.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0440] width 1440 pitch 5888 (/4 1472)
>[  6457.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0390]
>[  6457.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0390] width 1440 pitch 5888 (/4 1472)
>[  6457.728] (II) RADEON(0): EDID vendor "LPL", prod id 41218
>[  6457.728] (II) RADEON(0): Printing DDC gathered Modelines:
>[  6457.728] (II) RADEON(0): Modeline "1440x900"x0.0   96.21  1440 1504 1536 1760  900 901 904 912 -hsync -vsync (54.7 kHz eP)
>[  6458.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cf530]
>[  6458.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cf530] width 1440 pitch 5888 (/4 1472)
>[  6458.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ced30]
>[  6458.224] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ced30] width 1440 pitch 5888 (/4 1472)
>[  6464.084] (II) RADEON(0): Allocate new frame buffer 2657x1024 stride 2688
>[  6464.086] (II) RADEON(0): VRAM usage limit set to 103399K
>[  6465.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1bc7450]
>[  6465.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1bc7450] width 2657 pitch 10752 (/4 2688)
>[  6465.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c8cc0]
>[  6465.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c8cc0] width 2657 pitch 10752 (/4 2688)
>[  6466.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a8760]
>[  6466.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a8760] width 2657 pitch 10752 (/4 2688)
>[  6466.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ff7940]
>[  6466.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ff7940] width 2657 pitch 10752 (/4 2688)
>[  6478.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666a50]
>[  6478.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666a50] width 2657 pitch 10752 (/4 2688)
>[  6486.635] (II) RADEON(0): Allocate new frame buffer 2720x960 stride 2752
>[  6486.638] (II) RADEON(0): VRAM usage limit set to 103788K
>[  6488.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279efd0]
>[  6488.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279efd0] width 2720 pitch 11008 (/4 2752)
>[  6488.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2a7e0]
>[  6488.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2a7e0] width 2720 pitch 11008 (/4 2752)
>[  6488.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a9ab40]
>[  6488.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a9ab40] width 2720 pitch 11008 (/4 2752)
>[  6488.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2991c80]
>[  6488.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2991c80] width 2720 pitch 11008 (/4 2752)
>[  6488.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bfae0]
>[  6488.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bfae0] width 2720 pitch 11008 (/4 2752)
>[  6488.473] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  6488.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2720 pitch 11008 (/4 2752)
>[  6488.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afc0f0]
>[  6488.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afc0f0] width 2720 pitch 11008 (/4 2752)
>[  6488.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28276e0]
>[  6488.562] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28276e0] width 2720 pitch 11008 (/4 2752)
>[  6488.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afc0f0]
>[  6488.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afc0f0] width 2720 pitch 11008 (/4 2752)
>[  6488.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28276e0]
>[  6488.629] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28276e0] width 2720 pitch 11008 (/4 2752)
>[  6488.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afc0f0]
>[  6488.662] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afc0f0] width 2720 pitch 11008 (/4 2752)
>[  6488.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28276e0]
>[  6488.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28276e0] width 2720 pitch 11008 (/4 2752)
>[  6490.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bfae0]
>[  6490.979] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bfae0] width 2720 pitch 11008 (/4 2752)
>[  6491.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c8a50]
>[  6491.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c8a50] width 2720 pitch 11008 (/4 2752)
>[  6491.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x200c9c0]
>[  6491.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x200c9c0] width 2720 pitch 11008 (/4 2752)
>[  6491.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x25bfae0]
>[  6491.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x25bfae0] width 2720 pitch 11008 (/4 2752)
>[  6491.118] (II) RADEON(0): Allocate new frame buffer 2657x1024 stride 2688
>[  6491.187] (II) RADEON(0): VRAM usage limit set to 103399K
>[  6492.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c7270]
>[  6492.770] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c7270] width 2657 pitch 10752 (/4 2688)
>[  6492.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29cec70]
>[  6492.921] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29cec70] width 2657 pitch 10752 (/4 2688)
>[  6492.925] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x200ce90]
>[  6492.957] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x200ce90] width 2657 pitch 10752 (/4 2688)
>[  6492.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x200ce90]
>[  6493.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x200ce90] width 2657 pitch 10752 (/4 2688)
>[  6493.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28228e0]
>[  6493.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28228e0] width 2657 pitch 10752 (/4 2688)
>[  6496.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a71570]
>[  6496.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a71570] width 2657 pitch 10752 (/4 2688)
>[  6496.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cd2c0]
>[  6496.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cd2c0] width 2657 pitch 10752 (/4 2688)
>[  6496.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afc0f0]
>[  6496.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afc0f0] width 2657 pitch 10752 (/4 2688)
>[  6496.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2031b90]
>[  6496.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2031b90] width 2657 pitch 10752 (/4 2688)
>[  6496.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28276e0]
>[  6496.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28276e0] width 2657 pitch 10752 (/4 2688)
>[  6497.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  6497.109] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  6497.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a29e20]
>[  6497.185] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a29e20] width 2657 pitch 10752 (/4 2688)
>[  6497.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  6497.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  6497.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a29e20]
>[  6497.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a29e20] width 2657 pitch 10752 (/4 2688)
>[  6497.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  6497.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  6498.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a29e20]
>[  6498.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a29e20] width 2657 pitch 10752 (/4 2688)
>[  6499.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c8990]
>[  6499.103] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c8990] width 2657 pitch 10752 (/4 2688)
>[  6499.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282a9b0]
>[  6499.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282a9b0] width 2657 pitch 10752 (/4 2688)
>[  6499.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afb3f0]
>[  6499.300] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afb3f0] width 2657 pitch 10752 (/4 2688)
>[  6499.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2632290]
>[  6499.354] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2632290] width 2657 pitch 10752 (/4 2688)
>[  6510.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20087c0]
>[  6510.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20087c0] width 2657 pitch 10752 (/4 2688)
>[  6510.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd0250]
>[  6510.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd0250] width 2657 pitch 10752 (/4 2688)
>[  6511.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27073f0]
>[  6511.179] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27073f0] width 2657 pitch 10752 (/4 2688)
>[  6511.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2821750]
>[  6511.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2821750] width 2657 pitch 10752 (/4 2688)
>[  6530.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29a31c0]
>[  6530.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29a31c0] width 2657 pitch 10752 (/4 2688)
>[  6533.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2827880]
>[  6533.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2827880] width 2657 pitch 10752 (/4 2688)
>[  6574.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c53a0]
>[  6574.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c53a0] width 2657 pitch 10752 (/4 2688)
>[  6591.739] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x28269a0]
>[  6591.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x28269a0] width 2657 pitch 10752 (/4 2688)
>[  6864.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666a50]
>[  6864.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666a50] width 2657 pitch 10752 (/4 2688)
>[  6937.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836480]
>[  6937.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836480] width 2657 pitch 10752 (/4 2688)
>[  6941.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  6941.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  6996.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  6996.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 2657 pitch 10752 (/4 2688)
>[  6998.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  6998.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 2657 pitch 10752 (/4 2688)
>[  6998.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa9250]
>[  6998.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa9250] width 2657 pitch 10752 (/4 2688)
>[  6998.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2080620]
>[  6998.435] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2080620] width 2657 pitch 10752 (/4 2688)
>[  7148.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5110]
>[  7148.660] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5110] width 2657 pitch 10752 (/4 2688)
>[  7149.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x276d8a0]
>[  7149.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x276d8a0] width 2657 pitch 10752 (/4 2688)
>[  7149.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008e00]
>[  7149.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008e00] width 2657 pitch 10752 (/4 2688)
>[  7149.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27cd2c0]
>[  7149.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27cd2c0] width 2657 pitch 10752 (/4 2688)
>[  7150.244] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  7150.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 2657 pitch 10752 (/4 2688)
>[  7150.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29ced30]
>[  7150.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29ced30] width 2657 pitch 10752 (/4 2688)
>[  7150.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26caf70]
>[  7150.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26caf70] width 2657 pitch 10752 (/4 2688)
>[  7150.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fd5cc0]
>[  7150.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fd5cc0] width 2657 pitch 10752 (/4 2688)
>[  7682.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2007270]
>[  7682.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2007270] width 2657 pitch 10752 (/4 2688)
>[  7682.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e97e0]
>[  7682.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e97e0] width 2657 pitch 10752 (/4 2688)
>[  7682.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2007270]
>[  7682.168] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2007270] width 2657 pitch 10752 (/4 2688)
>[  7682.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207a070]
>[  7682.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207a070] width 2657 pitch 10752 (/4 2688)
>[  7682.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e97e0]
>[  7682.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e97e0] width 2657 pitch 10752 (/4 2688)
>[  7682.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e97e0]
>[  7683.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e97e0] width 2657 pitch 10752 (/4 2688)
>[  7683.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x207a070]
>[  7683.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x207a070] width 2657 pitch 10752 (/4 2688)
>[  7683.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e97e0]
>[  7683.085] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e97e0] width 2657 pitch 10752 (/4 2688)
>[  7687.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e97e0]
>[  7687.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e97e0] width 2657 pitch 10752 (/4 2688)
>[  7688.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7430]
>[  7688.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7430] width 2657 pitch 10752 (/4 2688)
>[  7688.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761e60]
>[  7688.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761e60] width 2657 pitch 10752 (/4 2688)
>[  7688.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1768fc0]
>[  7688.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1768fc0] width 2657 pitch 10752 (/4 2688)
>[  7690.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1768fc0]
>[  7690.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1768fc0] width 2657 pitch 10752 (/4 2688)
>[  7690.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x299b440]
>[  7690.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x299b440] width 2657 pitch 10752 (/4 2688)
>[  7690.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  7690.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 2657 pitch 10752 (/4 2688)
>[  7690.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  7690.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 2657 pitch 10752 (/4 2688)
>[  7691.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27a0360]
>[  7691.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27a0360] width 2657 pitch 10752 (/4 2688)
>[  7692.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  7692.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  7693.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5110]
>[  7693.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5110] width 2657 pitch 10752 (/4 2688)
>[  7693.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008e00]
>[  7693.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008e00] width 2657 pitch 10752 (/4 2688)
>[  7693.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2008e00]
>[  7693.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2008e00] width 2657 pitch 10752 (/4 2688)
>[  7693.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27ee880]
>[  7693.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27ee880] width 2657 pitch 10752 (/4 2688)
>[  7693.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709d70]
>[  7693.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709d70] width 2657 pitch 10752 (/4 2688)
>[  7695.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26e58e0]
>[  7696.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26e58e0] width 2657 pitch 10752 (/4 2688)
>[  7696.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279f440]
>[  7696.850] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279f440] width 2657 pitch 10752 (/4 2688)
>[  7696.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2799d30]
>[  7696.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2799d30] width 2657 pitch 10752 (/4 2688)
>[  7696.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x279f500]
>[  7696.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x279f500] width 2657 pitch 10752 (/4 2688)
>[  7830.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2761380]
>[  7830.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2761380] width 2657 pitch 10752 (/4 2688)
>[  7831.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc1660]
>[  7831.845] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc1660] width 2657 pitch 10752 (/4 2688)
>[  7831.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2c090]
>[  7831.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2c090] width 2657 pitch 10752 (/4 2688)
>[  7831.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2839920]
>[  7831.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2839920] width 2657 pitch 10752 (/4 2688)
>[  7837.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2835cf0]
>[  7837.360] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2835cf0] width 2657 pitch 10752 (/4 2688)
>[  7837.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a53de0]
>[  7837.960] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a53de0] width 2657 pitch 10752 (/4 2688)
>[  7838.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2836640]
>[  7838.710] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2836640] width 2657 pitch 10752 (/4 2688)
>[  7838.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1768fc0]
>[  7838.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1768fc0] width 2657 pitch 10752 (/4 2688)
>[  8678.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  8678.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 2657 pitch 10752 (/4 2688)
>[  8690.711] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1afa770]
>[  8690.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1afa770] width 2657 pitch 10752 (/4 2688)
>[  8692.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666a50]
>[  8692.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666a50] width 2657 pitch 10752 (/4 2688)
>[  8692.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc13a0]
>[  8692.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc13a0] width 2657 pitch 10752 (/4 2688)
>[  8692.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666a50]
>[  8692.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666a50] width 2657 pitch 10752 (/4 2688)
>[  8692.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc13a0]
>[  8692.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc13a0] width 2657 pitch 10752 (/4 2688)
>[  8692.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666a50]
>[  8692.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666a50] width 2657 pitch 10752 (/4 2688)
>[  8692.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc13a0]
>[  8692.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc13a0] width 2657 pitch 10752 (/4 2688)
>[  8692.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa71f0]
>[  8692.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa71f0] width 2657 pitch 10752 (/4 2688)
>[  8692.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fc13a0]
>[  8692.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fc13a0] width 2657 pitch 10752 (/4 2688)
>[  8693.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  8693.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  8693.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269bc60]
>[  8693.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269bc60] width 2657 pitch 10752 (/4 2688)
>[  8693.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  8693.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  8693.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269bc60]
>[  8693.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269bc60] width 2657 pitch 10752 (/4 2688)
>[  8693.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  8693.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  8694.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x269bc60]
>[  8694.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x269bc60] width 2657 pitch 10752 (/4 2688)
>[  8694.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fa7970]
>[  8694.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fa7970] width 2657 pitch 10752 (/4 2688)
>[  8694.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x27616f0]
>[  8694.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x27616f0] width 2657 pitch 10752 (/4 2688)
>[  8694.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2709d70]
>[  8694.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2709d70] width 2657 pitch 10752 (/4 2688)
>[  8694.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x282a960]
>[  8694.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x282a960] width 2657 pitch 10752 (/4 2688)
>[  8694.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2a2c000]
>[  8694.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2a2c000] width 2657 pitch 10752 (/4 2688)
>[  8696.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5110]
>[  8696.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5110] width 2657 pitch 10752 (/4 2688)
>[  8703.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c6820]
>[  8703.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c6820] width 2657 pitch 10752 (/4 2688)
>[  8703.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5110]
>[  8703.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5110] width 2657 pitch 10752 (/4 2688)
>[  8703.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c6820]
>[  8703.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c6820] width 2657 pitch 10752 (/4 2688)
>[  8703.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5110]
>[  8703.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5110] width 2657 pitch 10752 (/4 2688)
>[  8703.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x29c6820]
>[  8703.494] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x29c6820] width 2657 pitch 10752 (/4 2688)
>[  8703.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d5110]
>[  8703.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d5110] width 2657 pitch 10752 (/4 2688)
>[  8705.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x26d63f0]
>[  8706.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x26d63f0] width 2657 pitch 10752 (/4 2688)
>[  8706.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20243c0]
>[  8706.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20243c0] width 2657 pitch 10752 (/4 2688)
>[  8706.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2666a50]
>[  8706.203] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2666a50] width 2657 pitch 10752 (/4 2688)
>[  8706.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20243c0]
>[  8706.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20243c0] width 2657 pitch 10752 (/4 2688)
>[  8706.284] 
>[  8706.284] Backtrace:
>[  8706.286] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652a6]
>[  8706.286] 1: /usr/bin/Xorg (0x400000+0x6a289) [0x46a289]
>[  8706.286] 2: /lib64/libpthread.so.0 (0x3980400000+0xefe0) [0x398040efe0]
>[  8706.286] 3: /usr/lib64/dri/r300_dri.so (0x7f768ea23000+0x3dc7e) [0x7f768ea60c7e]
>[  8706.286] 4: /usr/lib64/xorg/modules/extensions/libdri2.so (0x7f7690624000+0x1bcc) [0x7f7690625bcc]
>[  8706.286] 5: /usr/lib64/xorg/modules/extensions/libdri2.so (0x7f7690624000+0x1c28) [0x7f7690625c28]
>[  8706.286] 6: /usr/bin/Xorg (TraverseTree+0x29) [0x45c459]
>[  8706.286] 7: /usr/lib64/xorg/modules/extensions/libdri2.so (DRI2SwapBuffers+0x17a) [0x7f7690626caa]
>[  8706.286] 8: /usr/lib64/xorg/modules/extensions/libdri2.so (0x7f7690624000+0x3f42) [0x7f7690627f42]
>[  8706.286] 9: /usr/bin/Xorg (0x400000+0x3444a) [0x43444a]
>[  8706.286] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[  8706.286] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3980021735]
>[  8706.286] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[  8706.286] 
>[  8706.286] Segmentation fault at address 0x48
>[  8706.286] 
>Fatal server error:
>[  8706.287] Caught signal 11 (Segmentation fault). Server aborting
>[  8706.287] 
>[  8706.287] 
>Please consult the Fedora Project support 
>	 at http://wiki.x.org
> for help. 
>[  8706.287] Please also check the log file at "/var/log/Xorg.0.log" for additional information.
>[  8706.287] 
>[  8706.293] (II) evdev: Power Button: Close
>[  8706.294] (II) UnloadModule: "evdev"
>[  8706.301] (II) evdev: Video Bus: Close
>[  8706.301] (II) UnloadModule: "evdev"
>[  8706.309] (II) evdev: Sleep Button: Close
>[  8706.309] (II) UnloadModule: "evdev"
>[  8706.317] (II) evdev: C-Media USB Headphone Set  : Close
>[  8706.317] (II) UnloadModule: "evdev"
>[  8706.325] (II) evdev: AT Translated Set 2 keyboard: Close
>[  8706.325] (II) UnloadModule: "evdev"
>[  8706.363] (II) UnloadModule: "synaptics"
>[  8706.369] (II) evdev: HP WMI hotkeys: Close
>[  8706.369] (II) UnloadModule: "evdev"
>[  8706.386] (II) evdev: Dell BT Travel Mouse: Close
>[  8706.386] (II) UnloadModule: "evdev"
>[  8706.387] (II) AIGLX: Suspending AIGLX clients for VT switch
>[  8706.387] (II) RADEON(0): RADEONLeaveVT_KMS
>[  8706.387] (II) RADEON(0): Ok, leaving now...
>[  8708.280] Server terminated with error (1). Closing log file.

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Attachments on bug 858343: 614067 | 614068 | 614069