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Red Hat Bugzilla – Attachment 614373 Details for
Bug 849223
RHEL5 Xen SR-IOV VF PCI passthru does not work to RHEL6 HVM guest; no interrupts received on the guest VF
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qemu-dm log (with debug patch) about successful msi-x initialization in RHEL-5 guest
rhel5.log (text/plain), 9.20 KB, created by
Laszlo Ersek
on 2012-09-19 13:37:26 UTC
(
hide
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Description:
qemu-dm log (with debug patch) about successful msi-x initialization in RHEL-5 guest
Filename:
MIME Type:
Creator:
Laszlo Ersek
Created:
2012-09-19 13:37:26 UTC
Size:
9.20 KB
patch
obsolete
>domid: 27 >qemu: the number of cpus is 2 >Using file in read-write mode >Watching /local/domain/27/logdirty/next-active >Watching /local/domain/0/device-model/27/command >xs_read(): vncpasswd get error. /vm/46f937eb-be5f-4fd6-2f0b-e65a220572eb/vncpasswd. >char device redirected to /dev/pts/1 >qemu_map_cache_init nr_buckets = 10000 >shared page at pfn 3ffff >buffered io page at pfn 3fffd >xs_read(/vm/46f937eb-be5f-4fd6-2f0b-e65a220572eb/rtc/timeoffset): read error >register_real_device: Assigning real physical device 06:10.2 ... >pt_dev_is_virtfn: 0000:06:10.2 is a SR-IOV Virtual Function >pt_register_regions: IO region registered (size=0x00004000 base_addr=0xde504004) >pt_register_regions: IO region registered (size=0x00004000 base_addr=0xde604004) >pt_msix_init: get MSI-X table bar base de604000 >pt_msix_init: mapping physical MSI-X table to 2b430f65f000 >register_real_device: Real physical device 06:10.2 registered successfuly! >register_real_device: Assigning real physical device 06:10.3 ... >pt_dev_is_virtfn: 0000:06:10.3 is a SR-IOV Virtual Function >pt_register_regions: IO region registered (size=0x00004000 base_addr=0xde704004) >pt_register_regions: IO region registered (size=0x00004000 base_addr=0xde804004) >pt_msix_init: get MSI-X table bar base de804000 >pt_msix_init: mapping physical MSI-X table to 2b430f660000 >register_real_device: Real physical device 06:10.3 registered successfuly! >I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0 >Triggered log-dirty buffer switch >I/O request not ready: 0, ptr: 0, port: 0, data: 0, count: 0, size: 0 >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:2] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:02h][Length:2] >pt_iomem_map: e_phys=f4000000 maddr=de504000 type=0 len=16384 index=0 first_map=1 >pt_iomem_map: 1 >pt_iomem_map: 3 >pt_iomem_map: 4 >pt_iomem_map: e_phys=f4004000 maddr=de604000 type=0 len=16384 index=3 first_map=1 >pt_iomem_map: 1 >pt_iomem_map: 3 >pt_iomem_map: 4 >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:2] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:02h][Length:2] >pt_iomem_map: e_phys=f4008000 maddr=de704000 type=0 len=16384 index=0 first_map=1 >pt_iomem_map: 1 >pt_iomem_map: 3 >pt_iomem_map: 4 >pt_iomem_map: e_phys=f400c000 maddr=de804000 type=0 len=16384 index=3 first_map=1 >pt_iomem_map: 1 >pt_iomem_map: 3 >pt_iomem_map: 4 >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >gpe_en_write: addr=0x1f6c, val=0x0. >gpe_sts_write: addr=0x1f68, val=0xff. >gpe_en_write: addr=0x1f6d, val=0x0. >gpe_sts_write: addr=0x1f69, val=0xff. >gpe_en_write: addr=0x1f6e, val=0x0. >gpe_sts_write: addr=0x1f6a, val=0xff. >gpe_en_write: addr=0x1f6f, val=0x0. >gpe_sts_write: addr=0x1f6b, val=0xff. >gpe_en_write: addr=0x1f6c, val=0x8. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pt_pci_write_config: Guest attempt to set address to unused Base Address Register. [00:06.0][Offset:30h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >pt_pci_write_config: Guest attempt to set address to unused Base Address Register. [00:07.0][Offset:30h][Length:4] >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pt_msixctrl_reg_write: emu_mask=0000 ro_mask=3fff valid_mask=ffff writable_mask=0000 >pt_msixctrl_reg_write: value=8002 dev_value=0002 >pt_msixctrl_reg_write: old_ctrl:0002h new_ctrl:0002h >pt_msixctrl_reg_write: throughable_mask=ffff new_value=8002pt_msixctrl_reg_write: 1 >pt_msix_update: 1 >pt_msix_update: 2: 0 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: 3 >pt_msix_update_one: now update msix entry 0 with pirq ff gvec b9 >pt_msix_update_one: 4 >pt_msix_update: 2: 1 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: 3 >pt_msix_update_one: now update msix entry 1 with pirq fe gvec c1 >pt_msix_update_one: 4 >pt_msix_update: 2: 2 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: 3 >pt_msix_update_one: now update msix entry 2 with pirq fd gvec c9 >pt_msix_update_one: 4 >pt_msixctrl_reg_write: msix_enabled=1 >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pt_msixctrl_reg_write: emu_mask=0000 ro_mask=3fff valid_mask=ffff writable_mask=0000 >pt_msixctrl_reg_write: value=8002 dev_value=0002 >pt_msixctrl_reg_write: old_ctrl:0002h new_ctrl:0002h >pt_msixctrl_reg_write: throughable_mask=ffff new_value=8002pt_msixctrl_reg_write: 1 >pt_msix_update: 1 >pt_msix_update: 2: 0 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: 3 >pt_msix_update_one: now update msix entry 0 with pirq fc gvec d1 >pt_msix_update_one: 4 >pt_msix_update: 2: 1 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: 3 >pt_msix_update_one: now update msix entry 1 with pirq fb gvec d9 >pt_msix_update_one: 4 >pt_msix_update: 2: 2 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: 3 >pt_msix_update_one: now update msix entry 2 with pirq fa gvec e1 >pt_msix_update_one: 4 >pt_msixctrl_reg_write: msix_enabled=1 >ACPI PCI hotplug: read addr=0x10c1, val=0xf. >ACPI PCI hotplug: read addr=0x10c2, val=0xf. >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: now update msix entry 1 with pirq fe gvec c1 >pt_msix_update_one: 4 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: now update msix entry 1 with pirq fe gvec c1 >pt_msix_update_one: 4 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: now update msix entry 0 with pirq ff gvec b9 >pt_msix_update_one: 4 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: now update msix entry 0 with pirq ff gvec b9 >pt_msix_update_one: 4 >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: now update msix entry 0 with pirq ff gvec b9 >pt_msix_update_one: 4 >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:06.0][Offset:00h][Length:4] >pt_pci_read_config: Warning: Return ALL F from libpci read. [00:07.0][Offset:00h][Length:4] >pci_msix_writel: 1 >pci_msix_writel: 1 >pci_msix_writel: 2 >pci_msix_writel: 1 >pci_msix_writel: 3 >pci_msix_writel: 4 >pt_msix_update_one: 1 >pt_msix_update_one: 2 >pt_msix_update_one: now update msix entry 0 with pirq ff gvec b9 >pt_msix_update_one: 4
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