Attachment 617541 Details for Bug 849223 – qemu-dm debug messages (v2), with PCI BDFs

[patch] qemu-dm debug messages (v2), with PCI BDFs

0001-more-debug-messages-for-bz849223-print-PCI-BDFs-too.patch (text/plain), 7.98 KB, created by Laszlo Ersek on 2012-09-26 12:50:12 UTC

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Creator: Laszlo Ersek

Created: 2012-09-26 12:50:12 UTC

Size: 7.98 KB

patch

obsolete

>From c553dba833298995ace3b5d57927096456f88998 Mon Sep 17 00:00:00 2001
>From: Laszlo Ersek <lersek@redhat.com>
>Date: Wed, 19 Sep 2012 14:49:44 +0200
>Subject: [PATCH] more debug messages for bz849223; print PCI BDFs too
>
>
>Signed-off-by: Laszlo Ersek <lersek@redhat.com>
>---
> tools/ioemu/hw/pass-through.c |   26 ++++++++++++++++++++++++--
> tools/ioemu/hw/pt-msi.c       |   35 +++++++++++++++++++++++++++++++++--
> 2 files changed, 57 insertions(+), 4 deletions(-)
>
>diff --git a/tools/ioemu/hw/pass-through.c b/tools/ioemu/hw/pass-through.c
>index 1a18f44..e16a937 100644
>--- a/tools/ioemu/hw/pass-through.c
>+++ b/tools/ioemu/hw/pass-through.c
>@@ -868,6 +868,8 @@ void pt_iomem_map(PCIDevice *d, int i, uint32_t e_phys, uint32_t e_size,
>     assigned_device->bases[i].e_physbase = e_phys;
>     assigned_device->bases[i].e_size= e_size;
> 
>+    PT_LOG("%02x:%02x.%x\n", pci_bus_num(d->bus), (d->devfn >> 3) & 0x1F,
>+        (d->devfn & 0x7));
>     PT_LOG("e_phys=%08x maddr=%lx type=%d len=%d index=%d first_map=%d\n",
>         e_phys, (unsigned long)assigned_device->bases[i].access.maddr,
>         type, e_size, i, first_map);
>@@ -875,8 +877,12 @@ void pt_iomem_map(PCIDevice *d, int i, uint32_t e_phys, uint32_t e_size,
>     if ( e_size == 0 )
>         return;
> 
>+    PT_LOG("1\n");
>+
>     if ( !first_map && old_ebase != -1 )
>     {
>+        PT_LOG("2\n");
>+
>         add_msix_mapping(assigned_device, i);
>         /* Remove old mapping */
>         ret = xc_domain_memory_mapping(xc_handle, domid,
>@@ -891,9 +897,13 @@ void pt_iomem_map(PCIDevice *d, int i, uint32_t e_phys, uint32_t e_size,
>         }
>     }
> 
>+    PT_LOG("3\n");
>+
>     /* map only valid guest address */
>     if (e_phys != -1)
>     {
>+        PT_LOG("4\n");
>+
>         /* Create new mapping */
>         ret = xc_domain_memory_mapping(xc_handle, domid,
>                 assigned_device->bases[i].e_physbase >> XC_PAGE_SHIFT,
>@@ -910,8 +920,10 @@ void pt_iomem_map(PCIDevice *d, int i, uint32_t e_phys, uint32_t e_size,
>         if ( ret != 0 )
>             PT_LOG("Error: remove MSI-X mmio mapping failed!\n");
> 
>-        if ( old_ebase != e_phys && old_ebase != -1 )
>+        if ( old_ebase != e_phys && old_ebase != -1 ) {
>+            PT_LOG("5\n");
>             pt_msix_update_remap(assigned_device, i);
>+        }
>     }
> }
> 
>@@ -3007,8 +3019,14 @@ static int pt_msixctrl_reg_write(struct pt_dev *ptdev,
>     uint16_t throughable_mask = 0;
>     uint16_t old_ctrl = cfg_entry->data;
> 
>+    PT_LOG("%02x:%02x.%x\n", pci_bus_num(ptdev->dev.bus),
>+        (ptdev->dev.devfn >> 3) & 0x1F, (ptdev->dev.devfn & 0x7));
>+
>     /* modify emulate register */
>     writable_mask = reg->emu_mask & ~reg->ro_mask & valid_mask;
>+    PT_LOG("emu_mask=%04x ro_mask=%04x valid_mask=%04x writable_mask=%04x\n",
>+           reg->emu_mask, reg->ro_mask, valid_mask, writable_mask);
>+    PT_LOG("value=%04x dev_value=%04x\n", *value, dev_value);
>     cfg_entry->data = ((*value & writable_mask) |
>                        (cfg_entry->data & ~writable_mask));
> 
>@@ -3017,12 +3035,16 @@ static int pt_msixctrl_reg_write(struct pt_dev *ptdev,
>     /* create value for writing to I/O device register */
>     throughable_mask = ~reg->emu_mask & valid_mask;
>     *value = ((*value & throughable_mask) | (dev_value & ~throughable_mask));
>+    PT_LOG("throughable_mask=%04x new_value=%04x\n", throughable_mask, *value);
> 
>     /* update MSI-X */
>-    if ((*value & PCI_MSIX_ENABLE) && !(*value & PCI_MSIX_MASK))
>+    if ((*value & PCI_MSIX_ENABLE) && !(*value & PCI_MSIX_MASK)) {
>+        PT_LOG("1\n");
>         pt_msix_update(ptdev);
>+    }
> 
>     ptdev->msix->enabled = !!(*value & PCI_MSIX_ENABLE);
>+    PT_LOG("msix_enabled=%d\n", ptdev->msix->enabled);
> 
>     return 0;
> }
>diff --git a/tools/ioemu/hw/pt-msi.c b/tools/ioemu/hw/pt-msi.c
>index 6c94bde..e05b0e2 100644
>--- a/tools/ioemu/hw/pt-msi.c
>+++ b/tools/ioemu/hw/pt-msi.c
>@@ -192,12 +192,17 @@ static int pt_msix_update_one(struct pt_dev *dev, int entry_nr)
>     uint32_t gflags = __get_msi_gflags(entry->io_mem[2], gaddr);
>     int ret;
> 
>+    PT_LOG("%02x:%02x.%x -- 1\n", pci_bus_num(dev->dev.bus),
>+        (dev->dev.devfn >> 3) & 0x1F, (dev->dev.devfn & 0x7));
>     if ( !entry->flags )
>         return 0;
> 
>+    PT_LOG("2\n");
>+
>     /* Check if this entry is already mapped */
>     if ( entry->pirq == -1 )
>     {
>+        PT_LOG("3\n");
>         ret = xc_physdev_map_pirq_msi(xc_handle, domid, AUTO_ASSIGN, &pirq,
>                                 dev->pci_dev->dev << 3 | dev->pci_dev->func,
>                                 dev->pci_dev->bus, entry_nr,
>@@ -220,6 +225,7 @@ static int pt_msix_update_one(struct pt_dev *dev, int entry_nr)
>         return ret;
>     }
> 
>+    PT_LOG("4\n");
>     entry->flags = 0;
> 
>     return 0;
>@@ -234,8 +240,12 @@ int pt_msix_update(struct pt_dev *dev)
>               dev->pci_dev->dev << 3 | dev->pci_dev->func,
>               dev->pci_dev->bus, dev->msix->mmio_base_addr);
> 
>+    PT_LOG("%02x:%02x.%x -- 1\n", pci_bus_num(dev->dev.bus),
>+        (dev->dev.devfn >> 3) & 0x1F, (dev->dev.devfn & 0x7));
>     for ( i = 0; i < msix->total_entries; i++ )
>     {
>+        PT_LOG("%02x:%02x.%x -- 2: %d\n", pci_bus_num(dev->dev.bus),
>+            (dev->dev.devfn >> 3) & 0x1F, (dev->dev.devfn & 0x7), i);
>         pt_msix_update_one(dev, i);
>     }
> 
>@@ -297,14 +307,20 @@ int pt_msix_update_remap(struct pt_dev *dev, int bar_index)
>     struct msix_entry_info *entry;
>     int i, ret;
> 
>+    PT_LOG("%02x:%02x.%x -- 1, bar_index=%d\n", pci_bus_num(dev->dev.bus),
>+        (dev->dev.devfn >> 3) & 0x1F, (dev->dev.devfn & 0x7), bar_index);
>     if ( !(dev->msix && dev->msix->bar_index == bar_index) )
>         return 0;
> 
>+    PT_LOG("2\n");
>     for ( i = 0; i < dev->msix->total_entries; i++ )
>     {
>+        PT_LOG("3: %d\n", i);
>         entry = &dev->msix->msix_entry[i];
>         if ( entry->pirq != -1 )
>         {
>+            PT_LOG("4: %d\n", i);
>+
>             ret = xc_domain_unbind_pt_irq(xc_handle, domid, entry->pirq,
>                                           PT_IRQ_TYPE_MSI, 0, 0, 0, 0);
>             if ( ret )
>@@ -333,6 +349,9 @@ static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
>     void *phys_off;
>     uint32_t vec_ctrl;
> 
>+    PT_LOG("%02x:%02x.%x -- 1: addr=%016llx val=%08x\n",
>+        pci_bus_num(dev->dev.bus), (dev->dev.devfn >> 3) & 0x1F,
>+        (dev->dev.devfn & 0x7), (long long unsigned)addr, val);
>     if ( addr % 4 )
>     {
>         PT_LOG("unaligned dword access to MSI-X table, addr %016lx\n",
>@@ -344,6 +363,10 @@ static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
>     entry = &msix->msix_entry[entry_nr];
>     offset = ((addr - msix->mmio_base_addr) % 16) / 4;
> 
>+    PT_LOG("%02x:%02x.%x: entry_nr=%d offset=%d\n", pci_bus_num(dev->dev.bus),
>+        (dev->dev.devfn >> 3) & 0x1F, (dev->dev.devfn & 0x7), entry_nr,
>+        offset);
>+
>     /*
>      * If Xen intercepts the mask bit access, io_mem[3] may not be
>      * up-to-date. Read from hardware directly.
>@@ -351,6 +374,9 @@ static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
>     phys_off = dev->msix->phys_iomem_base + 16 * entry_nr + 12;
>     vec_ctrl = *(uint32_t *)phys_off;
> 
>+    PT_LOG("%02x:%02x.%x: vec_ctrl=%08x\n", pci_bus_num(dev->dev.bus),
>+        (dev->dev.devfn >> 3) & 0x1F, (dev->dev.devfn & 0x7), vec_ctrl);
>+
>     if ( offset != 3 && msix->enabled && !(vec_ctrl & 0x1) )
>     {
>         PT_LOG("can not update msix entry %d since MSI-X is already \
>@@ -358,14 +384,19 @@ static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
>         return;
>     }
> 
>-    if ( offset != 3 && entry->io_mem[offset] != val )
>+    if ( offset != 3 && entry->io_mem[offset] != val ) {
>+        PT_LOG("2\n");
>         entry->flags = 1;
>+    }
>     entry->io_mem[offset] = val;
> 
>     if ( offset == 3 )
>     {
>-        if ( msix->enabled && !(val & 0x1) )
>+        PT_LOG("3\n");
>+        if ( msix->enabled && !(val & 0x1) ) {
>+            PT_LOG("4\n");
>             pt_msix_update_one(dev, entry_nr);
>+        }
>         mask_physical_msix_entry(dev, entry_nr, entry->io_mem[3] & 0x1);
>     }
> }
>-- 
>1.7.1
>

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Attachments on bug 849223: 606043 | 606044 | 606045 | 606046 | 606050 | 606051 | 606365 | 606370 | 606639 | 610520 | 611505 | 613668 | 614372 | 614373 | 614374 | 614596 | 615391 | 615392 | 615482 | 616740 | 617217 | 617218 | 617260 | 617261 | 617528 | 617541 | 617718 | 618009 | 618145 | 618240 | 618241 | 618312