Attachment 633139 Details for Bug 869883 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 446.81 KB, created by Steevithak on 2012-10-25 04:22:37 UTC

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Creator: Steevithak

Created: 2012-10-25 04:22:37 UTC

Size: 446.81 KB

patch

obsolete

>[    24.888] 
>X.Org X Server 1.12.3
>Release Date: 2012-07-09
>[    24.888] X Protocol Version 11, Revision 0
>[    24.888] Build Operating System:  2.6.32-220.17.1.el6.x86_64 
>[    24.888] Current Operating System: Linux localhost.localdomain 3.6.2-4.fc17.x86_64 #1 SMP Wed Oct 17 02:43:21 UTC 2012 x86_64
>[    24.889] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.2-4.fc17.x86_64 root=/dev/mapper/vg-lv_root ro rd.md=0 rd.dm=0 KEYTABLE=us SYSFONT=True rd.lvm.lv=vg/lv_root rd.luks=0 rd.lvm.lv=vg/lv_swap LANG=en_US.UTF-8 rhgb quiet
>[    24.889] Build Date: 20 September 2012  07:51:23AM
>[    24.889] Build ID: xorg-x11-server 1.12.3-2.fc17 
>[    24.889] Current version of pixman: 0.24.4
>[    24.889] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    24.889] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    24.889] (==) Log file: "/var/log/Xorg.0.log", Time: Mon Oct 22 05:15:38 2012
>[    24.915] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    24.915] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    24.915] (==) No Layout section.  Using the first Screen section.
>[    24.915] (==) No screen section available. Using defaults.
>[    24.915] (**) |-->Screen "Default Screen Section" (0)
>[    24.915] (**) |   |-->Monitor "<default monitor>"
>[    24.915] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    24.915] (==) Automatically adding devices
>[    24.915] (==) Automatically enabling devices
>[    24.915] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    24.915] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    24.915] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    24.915] (II) Loader magic: 0x7c6ac0
>[    24.915] (II) Module ABI versions:
>[    24.915] 	X.Org ANSI C Emulation: 0.4
>[    24.915] 	X.Org Video Driver: 12.0
>[    24.915] 	X.Org XInput driver : 16.0
>[    24.915] 	X.Org Server Extension : 6.0
>[    24.916] (--) PCI:*(0:2:0:0) 1002:9553:1028:0413 rev 0, Mem @ 0xd0000000/268435456, 0xcfef0000/65536, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    24.917] (II) LoadModule: "extmod"
>[    24.917] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    24.917] (II) Module extmod: vendor="X.Org Foundation"
>[    24.917] 	compiled for 1.12.3, module version = 1.0.0
>[    24.917] 	Module class: X.Org Server Extension
>[    24.917] 	ABI class: X.Org Server Extension, version 6.0
>[    24.917] (II) Loading extension SELinux
>[    24.917] (II) Loading extension MIT-SCREEN-SAVER
>[    24.917] (II) Loading extension XFree86-VidModeExtension
>[    24.917] (II) Loading extension XFree86-DGA
>[    24.917] (II) Loading extension DPMS
>[    24.918] (II) Loading extension XVideo
>[    24.918] (II) Loading extension XVideo-MotionCompensation
>[    24.918] (II) Loading extension X-Resource
>[    24.918] (II) LoadModule: "dbe"
>[    24.918] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    24.918] (II) Module dbe: vendor="X.Org Foundation"
>[    24.918] 	compiled for 1.12.3, module version = 1.0.0
>[    24.918] 	Module class: X.Org Server Extension
>[    24.918] 	ABI class: X.Org Server Extension, version 6.0
>[    24.918] (II) Loading extension DOUBLE-BUFFER
>[    24.918] (II) LoadModule: "glx"
>[    24.918] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    24.918] (II) Module glx: vendor="X.Org Foundation"
>[    24.918] 	compiled for 1.12.3, module version = 1.0.0
>[    24.918] 	ABI class: X.Org Server Extension, version 6.0
>[    24.918] (==) AIGLX enabled
>[    24.918] (II) Loading extension GLX
>[    24.918] (II) LoadModule: "record"
>[    24.918] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    24.918] (II) Module record: vendor="X.Org Foundation"
>[    24.918] 	compiled for 1.12.3, module version = 1.13.0
>[    24.918] 	Module class: X.Org Server Extension
>[    24.918] 	ABI class: X.Org Server Extension, version 6.0
>[    24.918] (II) Loading extension RECORD
>[    24.918] (II) LoadModule: "dri"
>[    24.918] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    24.919] (II) Module dri: vendor="X.Org Foundation"
>[    24.919] 	compiled for 1.12.3, module version = 1.0.0
>[    24.919] 	ABI class: X.Org Server Extension, version 6.0
>[    24.919] (II) Loading extension XFree86-DRI
>[    24.919] (II) LoadModule: "dri2"
>[    24.919] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    24.919] (II) Module dri2: vendor="X.Org Foundation"
>[    24.919] 	compiled for 1.12.3, module version = 1.2.0
>[    24.919] 	ABI class: X.Org Server Extension, version 6.0
>[    24.919] (II) Loading extension DRI2
>[    24.919] (==) Matched ati as autoconfigured driver 0
>[    24.919] (==) Matched vesa as autoconfigured driver 1
>[    24.919] (==) Matched modesetting as autoconfigured driver 2
>[    24.919] (==) Matched fbdev as autoconfigured driver 3
>[    24.919] (==) Assigned the driver to the xf86ConfigLayout
>[    24.919] (II) LoadModule: "ati"
>[    24.919] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    24.919] (II) Module ati: vendor="X.Org Foundation"
>[    24.919] 	compiled for 1.12.0, module version = 6.14.99
>[    24.919] 	Module class: X.Org Video Driver
>[    24.919] 	ABI class: X.Org Video Driver, version 12.0
>[    24.919] (II) LoadModule: "radeon"
>[    24.919] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    24.919] (II) Module radeon: vendor="X.Org Foundation"
>[    24.919] 	compiled for 1.12.0, module version = 6.14.99
>[    24.919] 	Module class: X.Org Video Driver
>[    24.920] 	ABI class: X.Org Video Driver, version 12.0
>[    24.920] (II) LoadModule: "vesa"
>[    24.920] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    24.920] (II) Module vesa: vendor="X.Org Foundation"
>[    24.920] 	compiled for 1.12.0, module version = 2.3.1
>[    24.920] 	Module class: X.Org Video Driver
>[    24.920] 	ABI class: X.Org Video Driver, version 12.0
>[    24.920] (II) LoadModule: "modesetting"
>[    24.950] (WW) Warning, couldn't open module modesetting
>[    24.950] (II) UnloadModule: "modesetting"
>[    24.950] (II) Unloading modesetting
>[    24.950] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    24.950] (II) LoadModule: "fbdev"
>[    24.950] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    24.950] (II) Module fbdev: vendor="X.Org Foundation"
>[    24.950] 	compiled for 1.11.99.901, module version = 0.4.2
>[    24.950] 	ABI class: X.Org Video Driver, version 12.0
>[    24.950] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    24.955] (II) VESA: driver for VESA chipsets: vesa
>[    24.955] (II) FBDEV: driver for framebuffer: fbdev
>[    24.955] (++) using VT number 1
>
>[    24.956] (II) [KMS] Kernel modesetting enabled.
>[    24.956] (WW) Falling back to old probe method for vesa
>[    24.956] (WW) Falling back to old probe method for fbdev
>[    24.956] (II) Loading sub module "fbdevhw"
>[    24.956] (II) LoadModule: "fbdevhw"
>[    24.956] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    24.956] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    24.956] 	compiled for 1.12.3, module version = 0.0.2
>[    24.956] 	ABI class: X.Org Video Driver, version 12.0
>[    24.956] (II) RADEON(0): RADEONPreInit_KMS
>[    24.956] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    24.956] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    24.956] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    24.956] (==) RADEON(0): Default visual is TrueColor
>[    24.957] (==) RADEON(0): RGB weight 888
>[    24.957] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    24.957] (--) RADEON(0): Chipset: "ATI Mobility Radeon 4500 Series" (ChipID = 0x9553)
>[    24.957] (II) RADEON(0): PCIE card detected
>[    24.957] drmOpenDevice: node name is /dev/dri/card0
>[    24.957] drmOpenDevice: open result is 8, (OK)
>[    24.957] drmOpenByBusid: Searching for BusID pci:0000:02:00.0
>[    24.957] drmOpenDevice: node name is /dev/dri/card0
>[    24.957] drmOpenDevice: open result is 8, (OK)
>[    24.957] drmOpenByBusid: drmOpenMinor returns 8
>[    24.957] drmOpenByBusid: drmGetBusid reports pci:0000:02:00.0
>[    24.957] (II) Loading sub module "exa"
>[    24.957] (II) LoadModule: "exa"
>[    24.957] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    24.957] (II) Module exa: vendor="X.Org Foundation"
>[    24.957] 	compiled for 1.12.3, module version = 2.5.0
>[    24.957] 	ABI class: X.Org Video Driver, version 12.0
>[    24.957] (II) RADEON(0): KMS Color Tiling: enabled
>[    24.957] (II) RADEON(0): KMS Pageflipping: enabled
>[    24.957] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    24.972] (II) RADEON(0): Output VGA-0 has no monitor section
>[    24.974] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    24.974] (II) RADEON(0): Output LVDS has no monitor section
>[    24.989] (II) RADEON(0): EDID for output VGA-0
>[    24.991] (II) RADEON(0): EDID for output HDMI-0
>[    24.991] (II) RADEON(0): EDID for output LVDS
>[    24.991] (II) RADEON(0): Manufacturer: LGD  Model: 20b  Serial#: 0
>[    24.991] (II) RADEON(0): Year: 2009  Week: 0
>[    24.991] (II) RADEON(0): EDID Version: 1.3
>[    24.991] (II) RADEON(0): Digital Display Input
>[    24.991] (II) RADEON(0): Max Image Size [cm]: horiz.: 35  vert.: 19
>[    24.991] (II) RADEON(0): Gamma: 2.20
>[    24.991] (II) RADEON(0): No DPMS capabilities specified
>[    24.991] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    24.991] (II) RADEON(0): First detailed timing is preferred mode
>[    24.991] (II) RADEON(0): redX: 0.617 redY: 0.349   greenX: 0.313 greenY: 0.595
>[    24.991] (II) RADEON(0): blueX: 0.151 blueY: 0.056   whiteX: 0.313 whiteY: 0.329
>[    24.992] (II) RADEON(0): Manufacturer's mask: 0
>[    24.992] (II) RADEON(0): Supported detailed timing:
>[    24.992] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    24.992] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    24.992] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    24.992] (II) RADEON(0): Supported detailed timing:
>[    24.992] (II) RADEON(0): clock: 138.5 MHz   Image Size:  345 x 194 mm
>[    24.992] (II) RADEON(0): h_active: 1920  h_sync: 1968  h_sync_end 2000 h_blank_end 2080 h_border: 0
>[    24.992] (II) RADEON(0): v_active: 1080  v_sync: 1083  v_sync_end 1088 v_blanking: 1111 v_border: 0
>[    24.992] (II) RADEON(0):  H162K[80]156WF1
>[    24.992] (II) RADEON(0): Unknown vendor-specific block 0
>[    24.992] (II) RADEON(0): EDID (in hex):
>[    24.992] (II) RADEON(0): 	00ffffffffffff0030e40b0200000000
>[    24.992] (II) RADEON(0): 	00130103902313780a15d59e59509826
>[    24.992] (II) RADEON(0): 	0e505400000001010101010101010101
>[    24.992] (II) RADEON(0): 	0101010101011a3680a070381f403020
>[    24.992] (II) RADEON(0): 	350059c21000001b1a3680a070381f40
>[    24.992] (II) RADEON(0): 	3020350059c21000001b000000fe0048
>[    24.992] (II) RADEON(0): 	3136324b803135365746310a00000000
>[    24.992] (II) RADEON(0): 	00000000000000000002010a202000e6
>[    24.992] (II) RADEON(0): Printing probed modes for output LVDS
>[    24.992] (II) RADEON(0): Modeline "1920x1080"x59.9  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    24.992] (II) RADEON(0): Modeline "1680x1050"x60.0  146.25  1680 1784 1960 2240  1050 1053 1059 1089 -hsync +vsync (65.3 kHz)
>[    24.992] (II) RADEON(0): Modeline "1400x1050"x60.0  122.00  1400 1488 1640 1880  1050 1052 1064 1082 +hsync +vsync (64.9 kHz d)
>[    24.992] (II) RADEON(0): Modeline "1400x1050"x60.0  121.75  1400 1488 1632 1864  1050 1053 1057 1089 -hsync +vsync (65.3 kHz)
>[    24.992] (II) RADEON(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>[    24.992] (II) RADEON(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz d)
>[    24.992] (II) RADEON(0): Modeline "1440x900"x59.9  106.50  1440 1528 1672 1904  900 903 909 934 -hsync +vsync (55.9 kHz)
>[    24.992] (II) RADEON(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz d)
>[    24.992] (II) RADEON(0): Modeline "1280x960"x59.9  101.25  1280 1360 1488 1696  960 963 967 996 -hsync +vsync (59.7 kHz)
>[    24.992] (II) RADEON(0): Modeline "1280x854"x59.9   89.25  1280 1352 1480 1680  854 857 867 887 -hsync +vsync (53.1 kHz)
>[    24.992] (II) RADEON(0): Modeline "1280x800"x59.8   83.50  1280 1352 1480 1680  800 803 809 831 -hsync +vsync (49.7 kHz)
>[    24.992] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    24.992] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    24.992] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    24.992] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    24.992] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    24.993] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    24.993] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    24.993] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    24.993] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    24.993] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    24.993] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    24.993] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    24.993] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    24.993] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    24.993] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    24.993] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    24.993] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    24.993] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    24.993] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    24.993] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    24.993] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    24.993] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    24.993] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    24.993] (II) RADEON(0): Output VGA-0 disconnected
>[    24.993] (II) RADEON(0): Output HDMI-0 disconnected
>[    24.993] (II) RADEON(0): Output LVDS connected
>[    24.993] (II) RADEON(0): Using exact sizes for initial modes
>[    24.993] (II) RADEON(0): Output LVDS using initial mode 1920x1080 +0+0
>[    24.993] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    24.993] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:20000000 visible:f7d7000
>[    24.993] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    24.993] (==) RADEON(0): DPI set to (96, 96)
>[    24.993] (II) Loading sub module "fb"
>[    24.993] (II) LoadModule: "fb"
>[    24.994] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    24.994] (II) Module fb: vendor="X.Org Foundation"
>[    24.995] 	compiled for 1.12.3, module version = 1.0.0
>[    24.995] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    24.995] (II) Loading sub module "ramdac"
>[    24.995] (II) LoadModule: "ramdac"
>[    24.995] (II) Module "ramdac" already built-in
>[    24.995] (II) UnloadModule: "vesa"
>[    24.995] (II) Unloading vesa
>[    24.995] (II) UnloadModule: "fbdev"
>[    24.995] (II) Unloading fbdev
>[    24.995] (II) UnloadSubModule: "fbdevhw"
>[    24.995] (II) Unloading fbdevhw
>[    24.995] (--) Depth 24 pixmap format is 32 bpp
>[    24.995] (II) RADEON(0): [DRI2] Setup complete
>[    24.995] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    24.995] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    24.995] (II) RADEON(0): Front buffer size: 8100K
>[    24.995] (II) RADEON(0): VRAM usage limit set to 221119K
>[    24.995] (II) RADEON(0): Initializing backing store
>[    24.995] (==) RADEON(0): Backing store disabled
>[    24.995] (II) RADEON(0): Direct rendering enabled
>[    24.996] (II) RADEON(0): Initializing Acceleration
>[    24.996] (II) RADEON(0): Setting EXA maxPitchBytes
>[    24.996] (II) EXA(0): Driver allocated offscreen pixmaps
>[    24.996] (II) EXA(0): Driver registered support for the following operations:
>[    24.996] (II)         Solid
>[    24.996] (II)         Copy
>[    24.996] (II)         Composite (RENDER acceleration)
>[    24.996] (II)         UploadToScreen
>[    24.996] (II)         DownloadFromScreen
>[    24.996] (II) RADEON(0): Acceleration enabled
>[    24.996] (II) RADEON(0): Initializing DPMS
>[    24.996] (==) RADEON(0): DPMS enabled
>[    24.996] (II) RADEON(0): Initializing Cursor
>[    24.996] (==) RADEON(0): Silken mouse enabled
>[    24.996] (II) RADEON(0): Initializing Xv
>[    24.996] (II) RADEON(0): Set up textured video
>[    24.996] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    24.996] (II) RADEON(0): [XvMC] Extension initialized.
>[    24.996] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    24.996] (II) RADEON(0): Initializing kms color map
>[    24.996] (II) RADEON(0): RADEONScreenInit finished
>[    24.996] (--) RandR disabled
>[    24.996] (II) Initializing built-in extension Generic Event Extension
>[    24.997] (II) Initializing built-in extension SHAPE
>[    24.997] (II) Initializing built-in extension MIT-SHM
>[    24.997] (II) Initializing built-in extension XInputExtension
>[    24.997] (II) Initializing built-in extension XTEST
>[    24.997] (II) Initializing built-in extension BIG-REQUESTS
>[    24.997] (II) Initializing built-in extension SYNC
>[    24.997] (II) Initializing built-in extension XKEYBOARD
>[    24.997] (II) Initializing built-in extension XC-MISC
>[    24.997] (II) Initializing built-in extension XINERAMA
>[    24.997] (II) Initializing built-in extension XFIXES
>[    24.997] (II) Initializing built-in extension RENDER
>[    24.997] (II) Initializing built-in extension RANDR
>[    24.997] (II) Initializing built-in extension COMPOSITE
>[    24.997] (II) Initializing built-in extension DAMAGE
>[    25.000] (II) SELinux: Disabled by boolean
>[    25.833] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    25.833] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    25.833] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    25.833] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    25.834] (II) AIGLX: Loaded and initialized r600
>[    25.834] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    25.837] (II) RADEON(0): Setting screen physical size to 508 x 285
>[    25.943] (II) XKB: Reusing cached keymap
>[    25.948] (II) config/udev: Adding input device Power Button (/dev/input/event3)
>[    25.948] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    25.948] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    25.948] (II) LoadModule: "evdev"
>[    25.948] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    25.949] (II) Module evdev: vendor="X.Org Foundation"
>[    25.949] 	compiled for 1.12.0, module version = 2.7.0
>[    25.949] 	Module class: X.Org XInput Driver
>[    25.949] 	ABI class: X.Org XInput driver, version 16.0
>[    25.949] (II) Using input driver 'evdev' for 'Power Button'
>[    25.949] 	Option "XkbRules" "evdev"
>[    25.949] 	Option "XkbModel" "pc105+inet"
>[    25.949] 	Option "XkbLayout" "us"
>[    25.949] 	Option "_source" "server/udev"
>[    25.949] 	Option "name" "Power Button"
>[    25.949] 	Option "path" "/dev/input/event3"
>[    25.949] 	Option "device" "/dev/input/event3"
>[    25.949] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    25.949] 	Option "driver" "evdev"
>[    25.949] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.949] (**) Power Button: always reports core events
>[    25.949] (**) evdev: Power Button: Device: "/dev/input/event3"
>[    25.949] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    25.949] (--) evdev: Power Button: Found keys
>[    25.949] (II) evdev: Power Button: Configuring as keyboard
>[    25.949] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    25.949] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    25.949] (**) Option "xkb_rules" "evdev"
>[    25.949] (**) Option "xkb_model" "pc105+inet"
>[    25.949] (**) Option "xkb_layout" "us"
>[    25.950] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.985] (II) config/udev: Adding input device Video Bus (/dev/input/event7)
>[    25.985] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    25.985] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    25.985] (II) Using input driver 'evdev' for 'Video Bus'
>[    25.985] 	Option "XkbRules" "evdev"
>[    25.985] 	Option "XkbModel" "pc105+inet"
>[    25.985] 	Option "XkbLayout" "us"
>[    25.985] 	Option "_source" "server/udev"
>[    25.985] 	Option "name" "Video Bus"
>[    25.985] 	Option "path" "/dev/input/event7"
>[    25.985] 	Option "device" "/dev/input/event7"
>[    25.985] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input7/event7"
>[    25.985] 	Option "driver" "evdev"
>[    25.985] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.985] (**) Video Bus: always reports core events
>[    25.985] (**) evdev: Video Bus: Device: "/dev/input/event7"
>[    25.985] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    25.985] (--) evdev: Video Bus: Found keys
>[    25.985] (II) evdev: Video Bus: Configuring as keyboard
>[    25.985] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input7/event7"
>[    25.985] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    25.985] (**) Option "xkb_rules" "evdev"
>[    25.985] (**) Option "xkb_model" "pc105+inet"
>[    25.985] (**) Option "xkb_layout" "us"
>[    25.985] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.985] (II) XKB: Reusing cached keymap
>[    25.987] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    25.987] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    25.987] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    25.987] (II) Using input driver 'evdev' for 'Power Button'
>[    25.987] 	Option "XkbRules" "evdev"
>[    25.987] 	Option "XkbModel" "pc105+inet"
>[    25.987] 	Option "XkbLayout" "us"
>[    25.987] 	Option "_source" "server/udev"
>[    25.987] 	Option "name" "Power Button"
>[    25.987] 	Option "path" "/dev/input/event0"
>[    25.987] 	Option "device" "/dev/input/event0"
>[    25.987] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    25.987] 	Option "driver" "evdev"
>[    25.987] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.987] (**) Power Button: always reports core events
>[    25.987] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    25.987] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    25.987] (--) evdev: Power Button: Found keys
>[    25.987] (II) evdev: Power Button: Configuring as keyboard
>[    25.987] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    25.987] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[    25.987] (**) Option "xkb_rules" "evdev"
>[    25.987] (**) Option "xkb_model" "pc105+inet"
>[    25.987] (**) Option "xkb_layout" "us"
>[    25.987] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.987] (II) XKB: Reusing cached keymap
>[    25.988] (II) config/udev: Adding input device Lid Switch (/dev/input/event2)
>[    25.988] (II) No input driver specified, ignoring this device.
>[    25.988] (II) This device may have been added with another device file.
>[    25.989] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    25.989] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    25.989] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    25.989] (II) Using input driver 'evdev' for 'Sleep Button'
>[    25.989] 	Option "XkbRules" "evdev"
>[    25.989] 	Option "XkbModel" "pc105+inet"
>[    25.989] 	Option "XkbLayout" "us"
>[    25.989] 	Option "_source" "server/udev"
>[    25.989] 	Option "name" "Sleep Button"
>[    25.989] 	Option "path" "/dev/input/event1"
>[    25.989] 	Option "device" "/dev/input/event1"
>[    25.989] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    25.989] 	Option "driver" "evdev"
>[    25.989] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.989] (**) Sleep Button: always reports core events
>[    25.989] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    25.989] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    25.989] (--) evdev: Sleep Button: Found keys
>[    25.989] (II) evdev: Sleep Button: Configuring as keyboard
>[    25.989] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    25.989] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 9)
>[    25.989] (**) Option "xkb_rules" "evdev"
>[    25.989] (**) Option "xkb_model" "pc105+inet"
>[    25.989] (**) Option "xkb_layout" "us"
>[    25.989] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.990] (II) XKB: Reusing cached keymap
>[    25.991] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP,pcm=3 (/dev/input/event11)
>[    25.991] (II) No input driver specified, ignoring this device.
>[    25.991] (II) This device may have been added with another device file.
>[    25.991] (II) config/udev: Adding input device Laptop_Integrated_Webcam_2M (/dev/input/event9)
>[    25.991] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "evdev keyboard catchall"
>[    25.991] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "system-setup-keyboard"
>[    25.991] (II) Using input driver 'evdev' for 'Laptop_Integrated_Webcam_2M'
>[    25.991] 	Option "XkbRules" "evdev"
>[    25.991] 	Option "XkbModel" "pc105+inet"
>[    25.991] 	Option "XkbLayout" "us"
>[    25.991] 	Option "_source" "server/udev"
>[    25.991] 	Option "name" "Laptop_Integrated_Webcam_2M"
>[    25.991] 	Option "path" "/dev/input/event9"
>[    25.991] 	Option "device" "/dev/input/event9"
>[    25.992] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input9/event9"
>[    25.992] 	Option "driver" "evdev"
>[    25.992] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.992] (**) Laptop_Integrated_Webcam_2M: always reports core events
>[    25.992] (**) evdev: Laptop_Integrated_Webcam_2M: Device: "/dev/input/event9"
>[    25.992] (--) evdev: Laptop_Integrated_Webcam_2M: Vendor 0xc45 Product 0x6417
>[    25.992] (--) evdev: Laptop_Integrated_Webcam_2M: Found keys
>[    25.992] (II) evdev: Laptop_Integrated_Webcam_2M: Configuring as keyboard
>[    25.992] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input9/event9"
>[    25.992] (II) XINPUT: Adding extended input device "Laptop_Integrated_Webcam_2M" (type: KEYBOARD, id 10)
>[    25.992] (**) Option "xkb_rules" "evdev"
>[    25.992] (**) Option "xkb_model" "pc105+inet"
>[    25.992] (**) Option "xkb_layout" "us"
>[    25.992] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.992] (II) XKB: Reusing cached keymap
>[    25.993] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event10)
>[    25.993] (II) No input driver specified, ignoring this device.
>[    25.993] (II) This device may have been added with another device file.
>[    25.994] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/event6)
>[    25.994] (**) Dell Dell USB Optical Mouse: Applying InputClass "evdev pointer catchall"
>[    25.994] (II) Using input driver 'evdev' for 'Dell Dell USB Optical Mouse'
>[    25.994] 	Option "XkbRules" "evdev"
>[    25.994] 	Option "XkbModel" "evdev"
>[    25.994] 	Option "XkbLayout" "us"
>[    25.994] 	Option "_source" "server/udev"
>[    25.994] 	Option "name" "Dell Dell USB Optical Mouse"
>[    25.994] 	Option "path" "/dev/input/event6"
>[    25.994] 	Option "device" "/dev/input/event6"
>[    25.994] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input6/event6"
>[    25.994] 	Option "driver" "evdev"
>[    25.994] (**) Dell Dell USB Optical Mouse: always reports core events
>[    25.994] (**) evdev: Dell Dell USB Optical Mouse: Device: "/dev/input/event6"
>[    25.994] (--) evdev: Dell Dell USB Optical Mouse: Vendor 0x413c Product 0x3012
>[    25.994] (--) evdev: Dell Dell USB Optical Mouse: Found 3 mouse buttons
>[    25.994] (--) evdev: Dell Dell USB Optical Mouse: Found scroll wheel(s)
>[    25.994] (--) evdev: Dell Dell USB Optical Mouse: Found relative axes
>[    25.994] (--) evdev: Dell Dell USB Optical Mouse: Found x and y relative axes
>[    25.994] (II) evdev: Dell Dell USB Optical Mouse: Configuring as mouse
>[    25.994] (II) evdev: Dell Dell USB Optical Mouse: Adding scrollwheel support
>[    25.994] (**) evdev: Dell Dell USB Optical Mouse: YAxisMapping: buttons 4 and 5
>[    25.994] (**) evdev: Dell Dell USB Optical Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    25.994] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb2/2-1/2-1.1/2-1.1:1.0/input/input6/event6"
>[    25.994] (II) XINPUT: Adding extended input device "Dell Dell USB Optical Mouse" (type: MOUSE, id 11)
>[    25.994] (II) evdev: Dell Dell USB Optical Mouse: initialized for relative axes.
>[    25.994] (**) Dell Dell USB Optical Mouse: (accel) keeping acceleration scheme 1
>[    25.994] (**) Dell Dell USB Optical Mouse: (accel) acceleration profile 0
>[    25.994] (**) Dell Dell USB Optical Mouse: (accel) acceleration factor: 2.000
>[    25.994] (**) Dell Dell USB Optical Mouse: (accel) acceleration threshold: 4
>[    25.994] (II) config/udev: Adding input device Dell Dell USB Optical Mouse (/dev/input/mouse1)
>[    25.994] (II) No input driver specified, ignoring this device.
>[    25.994] (II) This device may have been added with another device file.
>[    25.995] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event4)
>[    25.995] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    25.995] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    25.995] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    25.995] 	Option "XkbRules" "evdev"
>[    25.995] 	Option "XkbModel" "pc105+inet"
>[    25.995] 	Option "XkbLayout" "us"
>[    25.995] 	Option "_source" "server/udev"
>[    25.995] 	Option "name" "AT Translated Set 2 keyboard"
>[    25.995] 	Option "path" "/dev/input/event4"
>[    25.995] 	Option "device" "/dev/input/event4"
>[    25.995] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    25.995] 	Option "driver" "evdev"
>[    25.995] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    25.995] (**) AT Translated Set 2 keyboard: always reports core events
>[    25.995] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event4"
>[    25.995] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    25.995] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    25.995] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    25.995] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    25.995] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 12)
>[    25.995] (**) Option "xkb_rules" "evdev"
>[    25.995] (**) Option "xkb_model" "pc105+inet"
>[    25.995] (**) Option "xkb_layout" "us"
>[    25.995] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    25.995] (II) XKB: Reusing cached keymap
>[    25.995] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    25.996] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    25.996] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    25.996] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    25.996] (II) LoadModule: "synaptics"
>[    25.996] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    25.996] (II) Module synaptics: vendor="X.Org Foundation"
>[    25.996] 	compiled for 1.12.3, module version = 1.6.2
>[    25.996] 	Module class: X.Org XInput Driver
>[    25.996] 	ABI class: X.Org XInput driver, version 16.0
>[    25.996] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    25.996] 	Option "_source" "server/udev"
>[    25.996] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    25.996] 	Option "path" "/dev/input/event5"
>[    25.996] 	Option "device" "/dev/input/event5"
>[    25.996] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    25.996] 	Option "driver" "synaptics"
>[    25.996] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    25.996] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    25.996] (**) Option "Device" "/dev/input/event5"
>[    26.023] (**) Option "Device" "/dev/input/event5"
>[    26.023] port opened successfully
>[    26.023] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5836
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4908
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    26.023] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    26.023] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    26.037] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    26.037] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 13)
>[    26.037] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    26.037] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    26.037] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.036
>[    26.037] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    26.037] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    26.037] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    26.037] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    26.037] (**) Option "Device" "/dev/input/event5"
>[    26.038] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    26.038] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[    26.038] (II) No input driver specified, ignoring this device.
>[    26.038] (II) This device may have been added with another device file.
>[    26.039] (II) config/udev: Adding input device Dell WMI hotkeys (/dev/input/event8)
>[    26.039] (**) Dell WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    26.039] (**) Dell WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    26.039] (II) Using input driver 'evdev' for 'Dell WMI hotkeys'
>[    26.039] 	Option "XkbRules" "evdev"
>[    26.039] 	Option "XkbModel" "pc105+inet"
>[    26.039] 	Option "XkbLayout" "us"
>[    26.039] 	Option "_source" "server/udev"
>[    26.039] 	Option "name" "Dell WMI hotkeys"
>[    26.039] 	Option "path" "/dev/input/event8"
>[    26.039] 	Option "device" "/dev/input/event8"
>[    26.039] 	Option "config_info" "udev:/sys/devices/virtual/input/input8/event8"
>[    26.039] 	Option "driver" "evdev"
>[    26.039] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    26.039] (**) Dell WMI hotkeys: always reports core events
>[    26.039] (**) evdev: Dell WMI hotkeys: Device: "/dev/input/event8"
>[    26.040] (--) evdev: Dell WMI hotkeys: Vendor 0 Product 0
>[    26.040] (--) evdev: Dell WMI hotkeys: Found keys
>[    26.040] (II) evdev: Dell WMI hotkeys: Configuring as keyboard
>[    26.040] (**) Option "config_info" "udev:/sys/devices/virtual/input/input8/event8"
>[    26.040] (II) XINPUT: Adding extended input device "Dell WMI hotkeys" (type: KEYBOARD, id 14)
>[    26.040] (**) Option "xkb_rules" "evdev"
>[    26.040] (**) Option "xkb_model" "pc105+inet"
>[    26.040] (**) Option "xkb_layout" "us"
>[    26.040] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    26.040] (II) XKB: Reusing cached keymap
>[    26.052] (II) RADEON(0): RADEONSaveScreen(2)
>[    26.073] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    26.073] (II) RADEON(0): Printing DDC gathered Modelines:
>[    26.073] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    27.526] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    27.526] (II) RADEON(0): Printing DDC gathered Modelines:
>[    27.526] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    29.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0380]
>[    29.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0380] width 1920 pitch 7680 (/4 1920)
>[    29.289] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0320]
>[    29.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0320] width 1920 pitch 7680 (/4 1920)
>[    29.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0380]
>[    29.321] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0380] width 1920 pitch 7680 (/4 1920)
>[    29.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0320]
>[    29.338] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0320] width 1920 pitch 7680 (/4 1920)
>[    29.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0380]
>[    29.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0380] width 1920 pitch 7680 (/4 1920)
>[    29.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0320]
>[    29.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0320] width 1920 pitch 7680 (/4 1920)
>[    29.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0380]
>[    29.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0380] width 1920 pitch 7680 (/4 1920)
>[    29.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0320]
>[    29.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0320] width 1920 pitch 7680 (/4 1920)
>[    29.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0380]
>[    29.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0380] width 1920 pitch 7680 (/4 1920)
>[    29.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0320]
>[    29.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0320] width 1920 pitch 7680 (/4 1920)
>[    29.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0380]
>[    29.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0380] width 1920 pitch 7680 (/4 1920)
>[    29.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac0320]
>[    29.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac0320] width 1920 pitch 7680 (/4 1920)
>[    29.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.671] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.724] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.738] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.741] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.822] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.855] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.872] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.905] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    29.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    29.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    29.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    29.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.005] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.091] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.105] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.124] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.139] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.158] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.205] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    30.208] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2290]
>[    30.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2290] width 1920 pitch 7680 (/4 1920)
>[    30.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    30.239] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.209] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.431] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.623] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.657] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.706] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.723] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.757] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.773] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.807] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.857] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    31.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    31.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    31.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    31.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    32.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    32.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    32.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    32.074] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.076] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.090] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    32.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    32.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.112] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    32.126] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    32.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    32.162] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    32.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    32.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    32.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    32.838] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    32.858] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    33.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    33.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    33.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    33.275] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    33.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    33.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    33.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1781800]
>[    33.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1781800] width 1920 pitch 7680 (/4 1920)
>[    34.077] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ac2230]
>[    34.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ac2230] width 1920 pitch 7680 (/4 1920)
>[    36.276] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    36.276] (II) RADEON(0): Printing DDC gathered Modelines:
>[    36.276] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    38.160] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    38.160] (II) RADEON(0): Printing DDC gathered Modelines:
>[    38.160] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    38.512] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[    38.512] (II) RADEON(0): Printing DDC gathered Modelines:
>[    38.512] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[    51.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af15e0]
>[    51.806] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af15e0] width 1920 pitch 7680 (/4 1920)
>[    51.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af0b70]
>[    51.823] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af0b70] width 1920 pitch 7680 (/4 1920)
>[    51.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af15e0]
>[    51.839] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af15e0] width 1920 pitch 7680 (/4 1920)
>[    51.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af0b70]
>[    51.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af0b70] width 1920 pitch 7680 (/4 1920)
>[    52.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af15e0]
>[    52.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af15e0] width 1920 pitch 7680 (/4 1920)
>[    52.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    52.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.474] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.591] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    53.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    53.607] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    53.612] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    53.624] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    61.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    61.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    61.261] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    61.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    61.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    61.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    61.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    61.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    62.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5000]
>[    62.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5000] width 1920 pitch 7680 (/4 1920)
>[    62.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x17e3f40]
>[    62.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x17e3f40] width 1920 pitch 7680 (/4 1920)
>[    62.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af93e0]
>[    62.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af93e0] width 1920 pitch 7680 (/4 1920)
>[    62.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af9440]
>[    62.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af9440] width 1920 pitch 7680 (/4 1920)
>[    62.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af93e0]
>[    62.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af93e0] width 1920 pitch 7680 (/4 1920)
>[    62.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    62.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    62.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af93e0]
>[    62.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af93e0] width 1920 pitch 7680 (/4 1920)
>[    62.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1af5060]
>[    62.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1af5060] width 1920 pitch 7680 (/4 1920)
>[    69.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c4fb70]
>[    69.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c4fb70] width 1920 pitch 7680 (/4 1920)
>[    69.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c774f0]
>[    69.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c774f0] width 1920 pitch 7680 (/4 1920)
>[    70.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5f5a0]
>[    70.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5f5a0] width 1920 pitch 7680 (/4 1920)
>[    70.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c66e40]
>[    70.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c66e40] width 1920 pitch 7680 (/4 1920)
>[    70.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5f5a0]
>[    70.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5f5a0] width 1920 pitch 7680 (/4 1920)
>[    70.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c66e40]
>[    70.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c66e40] width 1920 pitch 7680 (/4 1920)
>[    70.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5f5a0]
>[    70.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5f5a0] width 1920 pitch 7680 (/4 1920)
>[   109.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d174b0]
>[   109.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d174b0] width 1920 pitch 7680 (/4 1920)
>[   124.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d42990]
>[   124.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d42990] width 1920 pitch 7680 (/4 1920)
>[   124.868] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d2afc0]
>[   124.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d2afc0] width 1920 pitch 7680 (/4 1920)
>[   132.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e12a50]
>[   132.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e12a50] width 1920 pitch 7680 (/4 1920)
>[   154.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d51370]
>[   154.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d51370] width 1920 pitch 7680 (/4 1920)
>[   184.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ed2340]
>[   184.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ed2340] width 1920 pitch 7680 (/4 1920)
>[   199.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e36930]
>[   199.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e36930] width 1920 pitch 7680 (/4 1920)
>[   214.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[   214.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[   274.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2e5f0]
>[   274.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2e5f0] width 1920 pitch 7680 (/4 1920)
>[   318.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[   319.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[   319.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f03050]
>[   319.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f03050] width 1920 pitch 7680 (/4 1920)
>[   334.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[   334.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[   349.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[   349.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[   349.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f03cf0]
>[   349.087] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f03cf0] width 1920 pitch 7680 (/4 1920)
>[   394.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[   394.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[   409.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[   409.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[   409.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f35910]
>[   409.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f35910] width 1920 pitch 7680 (/4 1920)
>[   439.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f03cf0]
>[   439.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f03cf0] width 1920 pitch 7680 (/4 1920)
>[   439.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aab830]
>[   439.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aab830] width 1920 pitch 7680 (/4 1920)
>[   454.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efb880]
>[   454.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efb880] width 1920 pitch 7680 (/4 1920)
>[   469.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3e800]
>[   469.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3e800] width 1920 pitch 7680 (/4 1920)
>[   469.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aabec0]
>[   469.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aabec0] width 1920 pitch 7680 (/4 1920)
>[   484.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2233ff0]
>[   484.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2233ff0] width 1920 pitch 7680 (/4 1920)
>[   514.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[   514.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[   529.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[   529.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[   529.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[   529.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[   543.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[   544.007] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[   559.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f45f40]
>[   559.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f45f40] width 1920 pitch 7680 (/4 1920)
>[   559.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245c80]
>[   559.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245c80] width 1920 pitch 7680 (/4 1920)
>[   574.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2063840]
>[   574.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2063840] width 1920 pitch 7680 (/4 1920)
>[   634.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f31510]
>[   634.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f31510] width 1920 pitch 7680 (/4 1920)
>[   649.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6e2f0]
>[   649.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6e2f0] width 1920 pitch 7680 (/4 1920)
>[   649.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[   649.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[   694.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[   694.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[   799.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f322f0]
>[   799.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f322f0] width 1920 pitch 7680 (/4 1920)
>[   814.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[   814.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[   889.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[   889.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[   919.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22291b0]
>[   919.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22291b0] width 1920 pitch 7680 (/4 1920)
>[   919.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee7050]
>[   919.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee7050] width 1920 pitch 7680 (/4 1920)
>[   934.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[   934.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[   949.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[   949.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[   949.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e36930]
>[   949.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e36930] width 1920 pitch 7680 (/4 1920)
>[  1009.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223bcf0]
>[  1009.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223bcf0] width 1920 pitch 7680 (/4 1920)
>[  1009.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eef780]
>[  1009.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eef780] width 1920 pitch 7680 (/4 1920)
>[  1024.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eef780]
>[  1024.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eef780] width 1920 pitch 7680 (/4 1920)
>[  1038.436] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  1038.436] (II) RADEON(0): Printing DDC gathered Modelines:
>[  1038.436] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[  1039.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2238dd0]
>[  1039.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2238dd0] width 1920 pitch 7680 (/4 1920)
>[  1039.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f45f40]
>[  1039.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f45f40] width 1920 pitch 7680 (/4 1920)
>[  1128.981] (II) RADEON(0): RADEONSaveScreen(2)
>[  1128.981] (II) RADEON(0): RADEONSaveScreen(0)
>[  9353.652] (II) RADEON(0): RADEONSaveScreen(1)
>[  9367.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec31d0]
>[  9367.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec31d0] width 1920 pitch 7680 (/4 1920)
>[  9400.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f328b0]
>[  9400.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f328b0] width 1920 pitch 7680 (/4 1920)
>[  9400.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec4740]
>[  9400.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec4740] width 1920 pitch 7680 (/4 1920)
>[  9415.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec4740]
>[  9415.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec4740] width 1920 pitch 7680 (/4 1920)
>[  9445.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f328b0]
>[  9445.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f328b0] width 1920 pitch 7680 (/4 1920)
>[  9460.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f03fd0]
>[  9460.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f03fd0] width 1920 pitch 7680 (/4 1920)
>[  9460.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec5360]
>[  9460.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec5360] width 1920 pitch 7680 (/4 1920)
>[  9610.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e36930]
>[  9610.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e36930] width 1920 pitch 7680 (/4 1920)
>[  9610.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e36930]
>[  9610.444] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e36930] width 1920 pitch 7680 (/4 1920)
>[  9625.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[  9625.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[  9655.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f038b0]
>[  9655.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f038b0] width 1920 pitch 7680 (/4 1920)
>[  9670.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f35f50]
>[  9670.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f35f50] width 1920 pitch 7680 (/4 1920)
>[  9670.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223d880]
>[  9670.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223d880] width 1920 pitch 7680 (/4 1920)
>[  9685.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6c5b0]
>[  9685.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6c5b0] width 1920 pitch 7680 (/4 1920)
>[  9700.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[  9700.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[  9700.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f014d0]
>[  9700.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f014d0] width 1920 pitch 7680 (/4 1920)
>[  9715.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2238570]
>[  9715.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2238570] width 1920 pitch 7680 (/4 1920)
>[  9730.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[  9730.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[  9745.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e36930]
>[  9745.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e36930] width 1920 pitch 7680 (/4 1920)
>[  9760.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[  9760.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[  9760.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1780080]
>[  9760.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1780080] width 1920 pitch 7680 (/4 1920)
>[  9775.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1780080]
>[  9775.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1780080] width 1920 pitch 7680 (/4 1920)
>[  9790.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e36930]
>[  9790.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e36930] width 1920 pitch 7680 (/4 1920)
>[  9790.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22400f0]
>[  9790.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22400f0] width 1920 pitch 7680 (/4 1920)
>[  9820.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f37210]
>[  9820.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f37210] width 1920 pitch 7680 (/4 1920)
>[  9850.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223ffb0]
>[  9850.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223ffb0] width 1920 pitch 7680 (/4 1920)
>[  9850.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d582b0]
>[  9850.608] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d582b0] width 1920 pitch 7680 (/4 1920)
>[  9880.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b240]
>[  9880.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b240] width 1920 pitch 7680 (/4 1920)
>[  9880.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245610]
>[  9880.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245610] width 1920 pitch 7680 (/4 1920)
>[  9895.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2228bb0]
>[  9895.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2228bb0] width 1920 pitch 7680 (/4 1920)
>[  9910.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2b830]
>[  9910.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2b830] width 1920 pitch 7680 (/4 1920)
>[  9955.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1780080]
>[  9955.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1780080] width 1920 pitch 7680 (/4 1920)
>[  9966.807] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[  9966.807] (II) RADEON(0): Printing DDC gathered Modelines:
>[  9966.807] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 10056.990] (II) RADEON(0): RADEONSaveScreen(2)
>[ 10056.990] (II) RADEON(0): RADEONSaveScreen(0)
>[ 10440.330] (II) RADEON(0): RADEONSaveScreen(1)
>[ 10441.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437f0]
>[ 10441.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437f0] width 1920 pitch 7680 (/4 1920)
>[ 10834.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10834.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10834.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10834.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10834.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.835] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10834.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10834.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10834.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10834.947] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10834.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10835.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63f40]
>[ 10835.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63f40] width 1920 pitch 7680 (/4 1920)
>[ 10835.580] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f41d00]
>[ 10835.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f41d00] width 1920 pitch 7680 (/4 1920)
>[ 10835.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec3a20]
>[ 10835.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec3a20] width 1920 pitch 7680 (/4 1920)
>[ 10835.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa04e0]
>[ 10835.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa04e0] width 1920 pitch 7680 (/4 1920)
>[ 10835.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec3a20]
>[ 10835.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec3a20] width 1920 pitch 7680 (/4 1920)
>[ 10835.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa04e0]
>[ 10835.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa04e0] width 1920 pitch 7680 (/4 1920)
>[ 10835.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 10835.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 10835.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aa04e0]
>[ 10835.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aa04e0] width 1920 pitch 7680 (/4 1920)
>[ 10836.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec3a20]
>[ 10836.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec3a20] width 1920 pitch 7680 (/4 1920)
>[ 10996.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ed0660]
>[ 10996.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ed0660] width 1920 pitch 7680 (/4 1920)
>[ 11011.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a62130]
>[ 11011.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a62130] width 1920 pitch 7680 (/4 1920)
>[ 11266.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11266.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11281.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d5db50]
>[ 11281.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d5db50] width 1920 pitch 7680 (/4 1920)
>[ 11296.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11296.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11311.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a62130]
>[ 11311.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a62130] width 1920 pitch 7680 (/4 1920)
>[ 11356.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11356.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11371.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d5db50]
>[ 11371.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d5db50] width 1920 pitch 7680 (/4 1920)
>[ 11416.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11416.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11446.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11446.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11491.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11491.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11506.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242d50]
>[ 11506.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242d50] width 1920 pitch 7680 (/4 1920)
>[ 11521.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a62130]
>[ 11521.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a62130] width 1920 pitch 7680 (/4 1920)
>[ 11551.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2a190]
>[ 11551.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2a190] width 1920 pitch 7680 (/4 1920)
>[ 11566.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245a00]
>[ 11566.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245a00] width 1920 pitch 7680 (/4 1920)
>[ 11596.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f10890]
>[ 11596.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f10890] width 1920 pitch 7680 (/4 1920)
>[ 11626.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a62130]
>[ 11626.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a62130] width 1920 pitch 7680 (/4 1920)
>[ 11671.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d5db50]
>[ 11671.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d5db50] width 1920 pitch 7680 (/4 1920)
>[ 11731.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec32d0]
>[ 11731.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec32d0] width 1920 pitch 7680 (/4 1920)
>[ 11746.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250700]
>[ 11746.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250700] width 1920 pitch 7680 (/4 1920)
>[ 11776.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d5db50]
>[ 11776.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d5db50] width 1920 pitch 7680 (/4 1920)
>[ 11836.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63ee0]
>[ 11836.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63ee0] width 1920 pitch 7680 (/4 1920)
>[ 11926.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f00f10]
>[ 11926.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f00f10] width 1920 pitch 7680 (/4 1920)
>[ 11971.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f53e80]
>[ 11971.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f53e80] width 1920 pitch 7680 (/4 1920)
>[ 11986.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a62750]
>[ 11986.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a62750] width 1920 pitch 7680 (/4 1920)
>[ 11986.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3c9e0]
>[ 11986.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3c9e0] width 1920 pitch 7680 (/4 1920)
>[ 12001.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ecfb60]
>[ 12001.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ecfb60] width 1920 pitch 7680 (/4 1920)
>[ 12016.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f45c90]
>[ 12016.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f45c90] width 1920 pitch 7680 (/4 1920)
>[ 12031.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f02800]
>[ 12031.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f02800] width 1920 pitch 7680 (/4 1920)
>[ 12061.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f53d10]
>[ 12061.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f53d10] width 1920 pitch 7680 (/4 1920)
>[ 12076.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0bbb0]
>[ 12076.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0bbb0] width 1920 pitch 7680 (/4 1920)
>[ 12106.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f39360]
>[ 12106.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f39360] width 1920 pitch 7680 (/4 1920)
>[ 12121.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222fb00]
>[ 12121.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222fb00] width 1920 pitch 7680 (/4 1920)
>[ 12136.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0bbb0]
>[ 12136.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0bbb0] width 1920 pitch 7680 (/4 1920)
>[ 12151.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f29b10]
>[ 12151.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f29b10] width 1920 pitch 7680 (/4 1920)
>[ 12316.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244f10]
>[ 12316.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244f10] width 1920 pitch 7680 (/4 1920)
>[ 12331.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f63ee0]
>[ 12331.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f63ee0] width 1920 pitch 7680 (/4 1920)
>[ 12346.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2243b90]
>[ 12346.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2243b90] width 1920 pitch 7680 (/4 1920)
>[ 12361.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2243b90]
>[ 12361.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2243b90] width 1920 pitch 7680 (/4 1920)
>[ 12436.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f6d640]
>[ 12436.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f6d640] width 1920 pitch 7680 (/4 1920)
>[ 12466.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f6d640]
>[ 12466.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f6d640] width 1920 pitch 7680 (/4 1920)
>[ 12667.837] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 12667.837] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 12667.837] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 12757.991] (II) RADEON(0): RADEONSaveScreen(2)
>[ 12757.991] (II) RADEON(0): RADEONSaveScreen(0)
>[ 13263.850] (II) RADEON(0): RADEONSaveScreen(1)
>[ 13264.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65700]
>[ 13264.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65700] width 1920 pitch 7680 (/4 1920)
>[ 13295.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5f110]
>[ 13295.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5f110] width 1920 pitch 7680 (/4 1920)
>[ 13310.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18dde50]
>[ 13310.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18dde50] width 1920 pitch 7680 (/4 1920)
>[ 13331.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0fa90]
>[ 13331.389] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0fa90] width 1920 pitch 7680 (/4 1920)
>[ 13331.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0fa90]
>[ 13331.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0fa90] width 1920 pitch 7680 (/4 1920)
>[ 13340.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f36500]
>[ 13340.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f36500] width 1920 pitch 7680 (/4 1920)
>[ 13370.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253730]
>[ 13370.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253730] width 1920 pitch 7680 (/4 1920)
>[ 13385.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eff7e0]
>[ 13385.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eff7e0] width 1920 pitch 7680 (/4 1920)
>[ 13400.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ce460]
>[ 13400.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ce460] width 1920 pitch 7680 (/4 1920)
>[ 13415.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eff7e0]
>[ 13415.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eff7e0] width 1920 pitch 7680 (/4 1920)
>[ 13430.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x18ce460]
>[ 13430.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x18ce460] width 1920 pitch 7680 (/4 1920)
>[ 13445.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c36ff0]
>[ 13445.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c36ff0] width 1920 pitch 7680 (/4 1920)
>[ 13475.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f4fc20]
>[ 13475.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f4fc20] width 1920 pitch 7680 (/4 1920)
>[ 13580.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253730]
>[ 13580.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253730] width 1920 pitch 7680 (/4 1920)
>[ 13685.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f45ea0]
>[ 13685.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f45ea0] width 1920 pitch 7680 (/4 1920)
>[ 13700.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f45ea0]
>[ 13700.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f45ea0] width 1920 pitch 7680 (/4 1920)
>[ 13730.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f06bf0]
>[ 13730.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f06bf0] width 1920 pitch 7680 (/4 1920)
>[ 13745.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f05e30]
>[ 13745.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f05e30] width 1920 pitch 7680 (/4 1920)
>[ 13760.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224f5e0]
>[ 13760.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224f5e0] width 1920 pitch 7680 (/4 1920)
>[ 13775.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f32960]
>[ 13775.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f32960] width 1920 pitch 7680 (/4 1920)
>[ 13932.790] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 13932.790] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 13932.790] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 13953.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a96d0]
>[ 13953.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a96d0] width 1920 pitch 7680 (/4 1920)
>[ 14000.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eda980]
>[ 14000.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eda980] width 1920 pitch 7680 (/4 1920)
>[ 14015.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eda980]
>[ 14015.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eda980] width 1920 pitch 7680 (/4 1920)
>[ 14015.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3d4e0]
>[ 14015.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3d4e0] width 1920 pitch 7680 (/4 1920)
>[ 14075.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a96d0]
>[ 14075.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a96d0] width 1920 pitch 7680 (/4 1920)
>[ 14090.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee6460]
>[ 14090.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee6460] width 1920 pitch 7680 (/4 1920)
>[ 14120.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250780]
>[ 14120.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250780] width 1920 pitch 7680 (/4 1920)
>[ 14135.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a96d0]
>[ 14135.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a96d0] width 1920 pitch 7680 (/4 1920)
>[ 14135.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13ee0]
>[ 14135.177] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13ee0] width 1920 pitch 7680 (/4 1920)
>[ 14210.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee6460]
>[ 14210.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee6460] width 1920 pitch 7680 (/4 1920)
>[ 14225.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22367b0]
>[ 14225.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22367b0] width 1920 pitch 7680 (/4 1920)
>[ 14255.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aacd0]
>[ 14255.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aacd0] width 1920 pitch 7680 (/4 1920)
>[ 14270.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f05ba0]
>[ 14270.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f05ba0] width 1920 pitch 7680 (/4 1920)
>[ 14300.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22441d0]
>[ 14300.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22441d0] width 1920 pitch 7680 (/4 1920)
>[ 14315.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0c430]
>[ 14315.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0c430] width 1920 pitch 7680 (/4 1920)
>[ 14553.230] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 14553.231] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 14553.231] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 14642.983] (II) RADEON(0): RADEONSaveScreen(2)
>[ 14642.983] (II) RADEON(0): RADEONSaveScreen(0)
>[ 16421.812] (II) RADEON(0): RADEONSaveScreen(1)
>[ 16426.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22142c0]
>[ 16426.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22142c0] width 1920 pitch 7680 (/4 1920)
>[ 16468.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222f220]
>[ 16468.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222f220] width 1920 pitch 7680 (/4 1920)
>[ 16468.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0c370]
>[ 16468.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0c370] width 1920 pitch 7680 (/4 1920)
>[ 16483.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0c370]
>[ 16483.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0c370] width 1920 pitch 7680 (/4 1920)
>[ 16498.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222dae0]
>[ 16498.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222dae0] width 1920 pitch 7680 (/4 1920)
>[ 16513.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221df00]
>[ 16513.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221df00] width 1920 pitch 7680 (/4 1920)
>[ 16558.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2249e30]
>[ 16558.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2249e30] width 1920 pitch 7680 (/4 1920)
>[ 16603.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224a360]
>[ 16603.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224a360] width 1920 pitch 7680 (/4 1920)
>[ 16648.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221df00]
>[ 16648.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221df00] width 1920 pitch 7680 (/4 1920)
>[ 16663.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fdbf0]
>[ 16663.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fdbf0] width 1920 pitch 7680 (/4 1920)
>[ 16738.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 16738.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 16753.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221df00]
>[ 16753.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221df00] width 1920 pitch 7680 (/4 1920)
>[ 16813.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221df00]
>[ 16813.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221df00] width 1920 pitch 7680 (/4 1920)
>[ 16828.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d43e20]
>[ 16828.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d43e20] width 1920 pitch 7680 (/4 1920)
>[ 16903.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ec9700]
>[ 16903.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ec9700] width 1920 pitch 7680 (/4 1920)
>[ 16918.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222dae0]
>[ 16918.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222dae0] width 1920 pitch 7680 (/4 1920)
>[ 16963.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 16963.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 16978.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a9a90]
>[ 16978.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a9a90] width 1920 pitch 7680 (/4 1920)
>[ 17097.712] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 17097.712] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 17097.712] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 17187.990] (II) RADEON(0): RADEONSaveScreen(2)
>[ 17187.990] (II) RADEON(0): RADEONSaveScreen(0)
>[ 17247.641] (II) RADEON(0): RADEONSaveScreen(1)
>[ 17248.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fa840]
>[ 17248.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fa840] width 1920 pitch 7680 (/4 1920)
>[ 17257.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3fa0]
>[ 17257.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3fa0] width 1920 pitch 7680 (/4 1920)
>[ 17264.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 17264.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 17279.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226d220]
>[ 17279.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226d220] width 1920 pitch 7680 (/4 1920)
>[ 17294.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ff80]
>[ 17294.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ff80] width 1920 pitch 7680 (/4 1920)
>[ 17309.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e4a0]
>[ 17309.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e4a0] width 1920 pitch 7680 (/4 1920)
>[ 17324.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 17324.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 17354.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ff80]
>[ 17354.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ff80] width 1920 pitch 7680 (/4 1920)
>[ 17354.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efae90]
>[ 17354.411] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efae90] width 1920 pitch 7680 (/4 1920)
>[ 17369.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ff80]
>[ 17369.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ff80] width 1920 pitch 7680 (/4 1920)
>[ 17384.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 17384.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 17564.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ff80]
>[ 17564.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ff80] width 1920 pitch 7680 (/4 1920)
>[ 17594.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 17594.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 17609.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227e1b0]
>[ 17609.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227e1b0] width 1920 pitch 7680 (/4 1920)
>[ 17624.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2271060]
>[ 17624.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2271060] width 1920 pitch 7680 (/4 1920)
>[ 17639.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 17639.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 17654.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ff80]
>[ 17654.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ff80] width 1920 pitch 7680 (/4 1920)
>[ 17714.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 17714.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 17729.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221ff80]
>[ 17729.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221ff80] width 1920 pitch 7680 (/4 1920)
>[ 17744.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a1dde0]
>[ 17744.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a1dde0] width 1920 pitch 7680 (/4 1920)
>[ 17759.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2271060]
>[ 17759.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2271060] width 1920 pitch 7680 (/4 1920)
>[ 17789.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a1dca0]
>[ 17789.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a1dca0] width 1920 pitch 7680 (/4 1920)
>[ 17804.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252a10]
>[ 17804.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252a10] width 1920 pitch 7680 (/4 1920)
>[ 17849.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22251c0]
>[ 17849.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22251c0] width 1920 pitch 7680 (/4 1920)
>[ 17864.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c63770]
>[ 17864.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c63770] width 1920 pitch 7680 (/4 1920)
>[ 17894.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e14b30]
>[ 17894.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e14b30] width 1920 pitch 7680 (/4 1920)
>[ 17906.039] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 17906.039] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 17906.039] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 17924.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221c130]
>[ 17924.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221c130] width 1920 pitch 7680 (/4 1920)
>[ 17924.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a03b0]
>[ 17924.609] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a03b0] width 1920 pitch 7680 (/4 1920)
>[ 17933.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 17933.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 17933.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c103c0]
>[ 17933.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c103c0] width 1920 pitch 7680 (/4 1920)
>[ 17933.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1faf0]
>[ 17933.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1faf0] width 1920 pitch 7680 (/4 1920)
>[ 17934.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c12c40]
>[ 17934.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c12c40] width 1920 pitch 7680 (/4 1920)
>[ 17939.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2271060]
>[ 17939.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2271060] width 1920 pitch 7680 (/4 1920)
>[ 17945.762] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2297da0]
>[ 17945.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2297da0] width 1920 pitch 7680 (/4 1920)
>[ 17954.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22416f0]
>[ 17954.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22416f0] width 1920 pitch 7680 (/4 1920)
>[ 17980.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2281030]
>[ 17980.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2281030] width 1920 pitch 7680 (/4 1920)
>[ 17980.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225a40]
>[ 17980.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225a40] width 1920 pitch 7680 (/4 1920)
>[ 17980.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2214450]
>[ 17980.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2214450] width 1920 pitch 7680 (/4 1920)
>[ 17980.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c27560]
>[ 17980.655] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c27560] width 1920 pitch 7680 (/4 1920)
>[ 18044.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228e0f0]
>[ 18044.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228e0f0] width 1920 pitch 7680 (/4 1920)
>[ 18059.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c12c40]
>[ 18059.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c12c40] width 1920 pitch 7680 (/4 1920)
>[ 18089.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c12c40]
>[ 18089.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c12c40] width 1920 pitch 7680 (/4 1920)
>[ 18104.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253400]
>[ 18104.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253400] width 1920 pitch 7680 (/4 1920)
>[ 18164.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65140]
>[ 18164.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65140] width 1920 pitch 7680 (/4 1920)
>[ 18179.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c103c0]
>[ 18179.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c103c0] width 1920 pitch 7680 (/4 1920)
>[ 18209.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65140]
>[ 18209.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65140] width 1920 pitch 7680 (/4 1920)
>[ 18209.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 18209.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 18224.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7e60]
>[ 18224.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7e60] width 1920 pitch 7680 (/4 1920)
>[ 18254.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c3f750]
>[ 18254.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c3f750] width 1920 pitch 7680 (/4 1920)
>[ 18269.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262910]
>[ 18269.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262910] width 1920 pitch 7680 (/4 1920)
>[ 18284.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 18284.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 18299.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d41a0]
>[ 18299.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d41a0] width 1920 pitch 7680 (/4 1920)
>[ 18314.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267030]
>[ 18314.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267030] width 1920 pitch 7680 (/4 1920)
>[ 18329.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f520f0]
>[ 18329.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f520f0] width 1920 pitch 7680 (/4 1920)
>[ 18389.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228e2a0]
>[ 18389.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228e2a0] width 1920 pitch 7680 (/4 1920)
>[ 18404.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65140]
>[ 18404.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65140] width 1920 pitch 7680 (/4 1920)
>[ 18479.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 18479.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 18494.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 18494.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 18509.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 18509.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 18524.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0ac00]
>[ 18524.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0ac00] width 1920 pitch 7680 (/4 1920)
>[ 18539.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65140]
>[ 18539.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65140] width 1920 pitch 7680 (/4 1920)
>[ 18584.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65140]
>[ 18584.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65140] width 1920 pitch 7680 (/4 1920)
>[ 18599.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5dc010]
>[ 18599.010] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5dc010] width 1920 pitch 7680 (/4 1920)
>[ 18719.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65140]
>[ 18719.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65140] width 1920 pitch 7680 (/4 1920)
>[ 18734.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c23fc0]
>[ 18734.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c23fc0] width 1920 pitch 7680 (/4 1920)
>[ 18785.762] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 18785.762] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 18785.762] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 18818.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c16240]
>[ 18818.441] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c16240] width 1920 pitch 7680 (/4 1920)
>[ 18824.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 18824.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 18854.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 18854.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 18854.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224b6a0]
>[ 18854.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224b6a0] width 1920 pitch 7680 (/4 1920)
>[ 18869.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3bb0]
>[ 18869.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3bb0] width 1920 pitch 7680 (/4 1920)
>[ 18884.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 18884.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 18884.043] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c23fc0]
>[ 18884.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c23fc0] width 1920 pitch 7680 (/4 1920)
>[ 18944.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228c5e0]
>[ 18944.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228c5e0] width 1920 pitch 7680 (/4 1920)
>[ 18959.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227ff00]
>[ 18959.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227ff00] width 1920 pitch 7680 (/4 1920)
>[ 19019.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484c520]
>[ 19019.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484c520] width 1920 pitch 7680 (/4 1920)
>[ 19034.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221aa00]
>[ 19034.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221aa00] width 1920 pitch 7680 (/4 1920)
>[ 19064.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c102a0]
>[ 19064.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c102a0] width 1920 pitch 7680 (/4 1920)
>[ 19079.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 19079.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 19124.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 19124.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 19139.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 19139.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 19169.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22716c0]
>[ 19169.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22716c0] width 1920 pitch 7680 (/4 1920)
>[ 19184.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2297c50]
>[ 19184.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2297c50] width 1920 pitch 7680 (/4 1920)
>[ 19199.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e130]
>[ 19199.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e130] width 1920 pitch 7680 (/4 1920)
>[ 19214.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e130]
>[ 19214.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e130] width 1920 pitch 7680 (/4 1920)
>[ 19229.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 19229.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 19274.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e130]
>[ 19274.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e130] width 1920 pitch 7680 (/4 1920)
>[ 19289.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22416f0]
>[ 19289.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22416f0] width 1920 pitch 7680 (/4 1920)
>[ 19319.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19319.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 19334.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19334.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 19409.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 19409.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 19424.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19424.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 19484.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16de0]
>[ 19484.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16de0] width 1920 pitch 7680 (/4 1920)
>[ 19499.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2224dd0]
>[ 19499.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2224dd0] width 1920 pitch 7680 (/4 1920)
>[ 19604.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19604.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 19619.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e130]
>[ 19619.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e130] width 1920 pitch 7680 (/4 1920)
>[ 19634.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19634.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 19656.901] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 19656.901] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 19656.901] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 19664.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0df00]
>[ 19664.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0df00] width 1920 pitch 7680 (/4 1920)
>[ 19679.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267030]
>[ 19679.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267030] width 1920 pitch 7680 (/4 1920)
>[ 19754.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19754.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 19769.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3bd0]
>[ 19769.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 19799.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267030]
>[ 19799.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267030] width 1920 pitch 7680 (/4 1920)
>[ 19814.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267030]
>[ 19814.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267030] width 1920 pitch 7680 (/4 1920)
>[ 19829.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3bd0]
>[ 19829.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 19844.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 19844.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 19859.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 19859.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 19874.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 19874.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 19889.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 19889.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 19904.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3bd0]
>[ 19904.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 19949.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 19949.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 19964.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0df00]
>[ 19964.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0df00] width 1920 pitch 7680 (/4 1920)
>[ 19979.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3bd0]
>[ 19979.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 19994.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 19994.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 20054.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d3bd0]
>[ 20054.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d3bd0] width 1920 pitch 7680 (/4 1920)
>[ 20069.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 20069.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 20099.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221fda0]
>[ 20099.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221fda0] width 1920 pitch 7680 (/4 1920)
>[ 20114.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 20114.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 20129.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228e5e0]
>[ 20129.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228e5e0] width 1920 pitch 7680 (/4 1920)
>[ 20324.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 20324.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 20354.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d8ff0]
>[ 20354.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d8ff0] width 1920 pitch 7680 (/4 1920)
>[ 20399.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c14d20]
>[ 20399.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c14d20] width 1920 pitch 7680 (/4 1920)
>[ 20414.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fc4a0]
>[ 20414.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fc4a0] width 1920 pitch 7680 (/4 1920)
>[ 20459.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e82b0]
>[ 20459.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e82b0] width 1920 pitch 7680 (/4 1920)
>[ 20474.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c457f0]
>[ 20474.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c457f0] width 1920 pitch 7680 (/4 1920)
>[ 20474.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f655c0]
>[ 20474.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f655c0] width 1920 pitch 7680 (/4 1920)
>[ 20489.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c414d0]
>[ 20489.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c414d0] width 1920 pitch 7680 (/4 1920)
>[ 20504.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 20504.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 20519.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 20519.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 20534.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fc4a0]
>[ 20534.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fc4a0] width 1920 pitch 7680 (/4 1920)
>[ 20564.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e82b0]
>[ 20564.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e82b0] width 1920 pitch 7680 (/4 1920)
>[ 20564.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b08080]
>[ 20564.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b08080] width 1920 pitch 7680 (/4 1920)
>[ 20579.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b08080]
>[ 20579.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b08080] width 1920 pitch 7680 (/4 1920)
>[ 20654.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a0760]
>[ 20654.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a0760] width 1920 pitch 7680 (/4 1920)
>[ 20669.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fc4a0]
>[ 20669.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fc4a0] width 1920 pitch 7680 (/4 1920)
>[ 20684.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c414d0]
>[ 20684.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c414d0] width 1920 pitch 7680 (/4 1920)
>[ 20684.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b08080]
>[ 20684.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b08080] width 1920 pitch 7680 (/4 1920)
>[ 20699.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c14d20]
>[ 20699.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c14d20] width 1920 pitch 7680 (/4 1920)
>[ 20714.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292720]
>[ 20714.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292720] width 1920 pitch 7680 (/4 1920)
>[ 20729.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 20729.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 20759.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 20759.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 20789.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b08080]
>[ 20789.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b08080] width 1920 pitch 7680 (/4 1920)
>[ 20830.182] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 20830.182] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 20830.182] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 20834.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf0700]
>[ 20834.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf0700] width 1920 pitch 7680 (/4 1920)
>[ 20864.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c14d20]
>[ 20864.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c14d20] width 1920 pitch 7680 (/4 1920)
>[ 20894.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 20894.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 20909.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c414d0]
>[ 20909.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c414d0] width 1920 pitch 7680 (/4 1920)
>[ 20939.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292720]
>[ 20939.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292720] width 1920 pitch 7680 (/4 1920)
>[ 20954.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292720]
>[ 20954.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292720] width 1920 pitch 7680 (/4 1920)
>[ 20984.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228a1e0]
>[ 20984.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228a1e0] width 1920 pitch 7680 (/4 1920)
>[ 20999.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228e590]
>[ 20999.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228e590] width 1920 pitch 7680 (/4 1920)
>[ 21059.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c102a0]
>[ 21059.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c102a0] width 1920 pitch 7680 (/4 1920)
>[ 21074.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e130]
>[ 21074.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e130] width 1920 pitch 7680 (/4 1920)
>[ 21089.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c414d0]
>[ 21089.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c414d0] width 1920 pitch 7680 (/4 1920)
>[ 21104.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c102a0]
>[ 21104.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c102a0] width 1920 pitch 7680 (/4 1920)
>[ 21119.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf8630]
>[ 21119.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf8630] width 1920 pitch 7680 (/4 1920)
>[ 21149.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 21149.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 21164.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c1ea30]
>[ 21164.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c1ea30] width 1920 pitch 7680 (/4 1920)
>[ 21209.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2299860]
>[ 21209.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2299860] width 1920 pitch 7680 (/4 1920)
>[ 21224.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c214e0]
>[ 21224.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c214e0] width 1920 pitch 7680 (/4 1920)
>[ 21329.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22903d0]
>[ 21329.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22903d0] width 1920 pitch 7680 (/4 1920)
>[ 21344.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22903d0]
>[ 21344.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22903d0] width 1920 pitch 7680 (/4 1920)
>[ 21449.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 21449.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 21464.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a0760]
>[ 21464.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a0760] width 1920 pitch 7680 (/4 1920)
>[ 21539.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 21539.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 21554.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 21554.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 21599.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 21599.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 21614.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b08760]
>[ 21614.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b08760] width 1920 pitch 7680 (/4 1920)
>[ 21629.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 21629.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 21644.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22119f0]
>[ 21644.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22119f0] width 1920 pitch 7680 (/4 1920)
>[ 21689.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d92b0]
>[ 21689.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d92b0] width 1920 pitch 7680 (/4 1920)
>[ 21704.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x483fd00]
>[ 21704.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x483fd00] width 1920 pitch 7680 (/4 1920)
>[ 21734.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482b7d0]
>[ 21734.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482b7d0] width 1920 pitch 7680 (/4 1920)
>[ 21749.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x483b0c0]
>[ 21749.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x483b0c0] width 1920 pitch 7680 (/4 1920)
>[ 21764.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482b7d0]
>[ 21764.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482b7d0] width 1920 pitch 7680 (/4 1920)
>[ 21779.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5d4b0]
>[ 21779.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5d4b0] width 1920 pitch 7680 (/4 1920)
>[ 21794.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x483b0c0]
>[ 21794.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x483b0c0] width 1920 pitch 7680 (/4 1920)
>[ 21809.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482b870]
>[ 21809.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482b870] width 1920 pitch 7680 (/4 1920)
>[ 21854.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x483b0c0]
>[ 21854.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x483b0c0] width 1920 pitch 7680 (/4 1920)
>[ 21869.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf1530]
>[ 21869.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf1530] width 1920 pitch 7680 (/4 1920)
>[ 21899.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf1530]
>[ 21899.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf1530] width 1920 pitch 7680 (/4 1920)
>[ 21914.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a667c0]
>[ 21914.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a667c0] width 1920 pitch 7680 (/4 1920)
>[ 21929.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a5f4e0]
>[ 21929.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a5f4e0] width 1920 pitch 7680 (/4 1920)
>[ 21944.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac2b40]
>[ 21944.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac2b40] width 1920 pitch 7680 (/4 1920)
>[ 21959.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac0360]
>[ 21959.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac0360] width 1920 pitch 7680 (/4 1920)
>[ 21961.513] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 21961.513] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 21961.513] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 21974.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac1920]
>[ 21974.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac1920] width 1920 pitch 7680 (/4 1920)
>[ 22004.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac0360]
>[ 22004.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac0360] width 1920 pitch 7680 (/4 1920)
>[ 22034.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484bf80]
>[ 22034.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484bf80] width 1920 pitch 7680 (/4 1920)
>[ 22049.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 22049.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 22064.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c41360]
>[ 22064.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c41360] width 1920 pitch 7680 (/4 1920)
>[ 22094.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0e4b0]
>[ 22094.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0e4b0] width 1920 pitch 7680 (/4 1920)
>[ 22109.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 22109.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 22139.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c12b30]
>[ 22139.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c12b30] width 1920 pitch 7680 (/4 1920)
>[ 22154.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c414d0]
>[ 22154.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c414d0] width 1920 pitch 7680 (/4 1920)
>[ 22154.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 22154.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 22169.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf7e40]
>[ 22169.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf7e40] width 1920 pitch 7680 (/4 1920)
>[ 22244.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c414d0]
>[ 22244.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c414d0] width 1920 pitch 7680 (/4 1920)
>[ 22259.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 22259.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 22349.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eb87b0]
>[ 22349.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eb87b0] width 1920 pitch 7680 (/4 1920)
>[ 22379.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228f230]
>[ 22379.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228f230] width 1920 pitch 7680 (/4 1920)
>[ 22424.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c17b20]
>[ 22424.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c17b20] width 1920 pitch 7680 (/4 1920)
>[ 22439.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 22439.075] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 22544.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eb87b0]
>[ 22544.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eb87b0] width 1920 pitch 7680 (/4 1920)
>[ 22559.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 22559.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 22567.636] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 22567.636] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 22567.636] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 22574.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227db10]
>[ 22574.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227db10] width 1920 pitch 7680 (/4 1920)
>[ 22589.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c457c0]
>[ 22589.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c457c0] width 1920 pitch 7680 (/4 1920)
>[ 22604.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226ff60]
>[ 22604.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226ff60] width 1920 pitch 7680 (/4 1920)
>[ 22694.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a64b0]
>[ 22694.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a64b0] width 1920 pitch 7680 (/4 1920)
>[ 22724.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a64b0]
>[ 22724.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a64b0] width 1920 pitch 7680 (/4 1920)
>[ 22754.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ace960]
>[ 22754.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ace960] width 1920 pitch 7680 (/4 1920)
>[ 22784.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d6a60]
>[ 22784.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d6a60] width 1920 pitch 7680 (/4 1920)
>[ 22814.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c28f10]
>[ 22814.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c28f10] width 1920 pitch 7680 (/4 1920)
>[ 22829.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab60d0]
>[ 22829.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab60d0] width 1920 pitch 7680 (/4 1920)
>[ 22889.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf06d0]
>[ 22889.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf06d0] width 1920 pitch 7680 (/4 1920)
>[ 22904.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e16bc0]
>[ 22904.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e16bc0] width 1920 pitch 7680 (/4 1920)
>[ 22919.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c23e90]
>[ 22919.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c23e90] width 1920 pitch 7680 (/4 1920)
>[ 22919.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf06d0]
>[ 22919.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf06d0] width 1920 pitch 7680 (/4 1920)
>[ 23039.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482fc90]
>[ 23039.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482fc90] width 1920 pitch 7680 (/4 1920)
>[ 23054.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6800]
>[ 23054.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6800] width 1920 pitch 7680 (/4 1920)
>[ 23069.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7bd90]
>[ 23069.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7bd90] width 1920 pitch 7680 (/4 1920)
>[ 23099.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287cf0]
>[ 23099.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287cf0] width 1920 pitch 7680 (/4 1920)
>[ 23114.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228ba60]
>[ 23114.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228ba60] width 1920 pitch 7680 (/4 1920)
>[ 23129.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228ba60]
>[ 23129.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228ba60] width 1920 pitch 7680 (/4 1920)
>[ 23144.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6800]
>[ 23144.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6800] width 1920 pitch 7680 (/4 1920)
>[ 23174.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6800]
>[ 23174.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6800] width 1920 pitch 7680 (/4 1920)
>[ 23189.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2287cf0]
>[ 23189.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2287cf0] width 1920 pitch 7680 (/4 1920)
>[ 23264.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6800]
>[ 23264.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6800] width 1920 pitch 7680 (/4 1920)
>[ 23279.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f52090]
>[ 23279.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f52090] width 1920 pitch 7680 (/4 1920)
>[ 23414.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad9170]
>[ 23414.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad9170] width 1920 pitch 7680 (/4 1920)
>[ 23429.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e39d10]
>[ 23429.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e39d10] width 1920 pitch 7680 (/4 1920)
>[ 23459.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aab5c0]
>[ 23459.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aab5c0] width 1920 pitch 7680 (/4 1920)
>[ 23474.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226ff60]
>[ 23474.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226ff60] width 1920 pitch 7680 (/4 1920)
>[ 23491.819] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 23491.819] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 23491.819] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 23504.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aab5c0]
>[ 23504.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aab5c0] width 1920 pitch 7680 (/4 1920)
>[ 23504.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab6700]
>[ 23504.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab6700] width 1920 pitch 7680 (/4 1920)
>[ 23519.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f68c80]
>[ 23519.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f68c80] width 1920 pitch 7680 (/4 1920)
>[ 23534.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228ba60]
>[ 23534.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228ba60] width 1920 pitch 7680 (/4 1920)
>[ 23534.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e39d10]
>[ 23534.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e39d10] width 1920 pitch 7680 (/4 1920)
>[ 23579.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c392a0]
>[ 23579.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c392a0] width 1920 pitch 7680 (/4 1920)
>[ 23594.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad1ce0]
>[ 23594.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad1ce0] width 1920 pitch 7680 (/4 1920)
>[ 23609.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 23609.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 23654.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a2d20]
>[ 23654.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a2d20] width 1920 pitch 7680 (/4 1920)
>[ 23684.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2ebf0]
>[ 23684.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2ebf0] width 1920 pitch 7680 (/4 1920)
>[ 23699.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c457c0]
>[ 23699.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c457c0] width 1920 pitch 7680 (/4 1920)
>[ 23729.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a2d20]
>[ 23729.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a2d20] width 1920 pitch 7680 (/4 1920)
>[ 23774.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22992a0]
>[ 23774.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22992a0] width 1920 pitch 7680 (/4 1920)
>[ 23789.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d2280]
>[ 23789.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d2280] width 1920 pitch 7680 (/4 1920)
>[ 23804.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484c0a0]
>[ 23804.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484c0a0] width 1920 pitch 7680 (/4 1920)
>[ 23819.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 23819.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 23849.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c7c0]
>[ 23849.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c7c0] width 1920 pitch 7680 (/4 1920)
>[ 23864.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c7c0]
>[ 23864.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c7c0] width 1920 pitch 7680 (/4 1920)
>[ 23879.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229a300]
>[ 23879.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229a300] width 1920 pitch 7680 (/4 1920)
>[ 23894.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c7c0]
>[ 23894.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c7c0] width 1920 pitch 7680 (/4 1920)
>[ 23924.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a1d360]
>[ 23924.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a1d360] width 1920 pitch 7680 (/4 1920)
>[ 23939.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c457c0]
>[ 23939.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c457c0] width 1920 pitch 7680 (/4 1920)
>[ 23954.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c286e0]
>[ 23954.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c286e0] width 1920 pitch 7680 (/4 1920)
>[ 23969.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a5820]
>[ 23969.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a5820] width 1920 pitch 7680 (/4 1920)
>[ 24104.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c1c280]
>[ 24104.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c1c280] width 1920 pitch 7680 (/4 1920)
>[ 24119.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2297c30]
>[ 24119.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2297c30] width 1920 pitch 7680 (/4 1920)
>[ 24134.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22258b0]
>[ 24134.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22258b0] width 1920 pitch 7680 (/4 1920)
>[ 24149.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf79a0]
>[ 24149.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf79a0] width 1920 pitch 7680 (/4 1920)
>[ 24164.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae0890]
>[ 24164.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae0890] width 1920 pitch 7680 (/4 1920)
>[ 24179.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22258b0]
>[ 24179.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22258b0] width 1920 pitch 7680 (/4 1920)
>[ 24224.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229dce0]
>[ 24224.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229dce0] width 1920 pitch 7680 (/4 1920)
>[ 24239.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c454a0]
>[ 24239.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c454a0] width 1920 pitch 7680 (/4 1920)
>[ 24254.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad6390]
>[ 24254.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad6390] width 1920 pitch 7680 (/4 1920)
>[ 24269.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831390]
>[ 24269.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831390] width 1920 pitch 7680 (/4 1920)
>[ 24314.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831390]
>[ 24314.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831390] width 1920 pitch 7680 (/4 1920)
>[ 24329.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9e730]
>[ 24329.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9e730] width 1920 pitch 7680 (/4 1920)
>[ 24359.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf79a0]
>[ 24359.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf79a0] width 1920 pitch 7680 (/4 1920)
>[ 24404.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4843000]
>[ 24404.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4843000] width 1920 pitch 7680 (/4 1920)
>[ 24434.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf79a0]
>[ 24434.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf79a0] width 1920 pitch 7680 (/4 1920)
>[ 24449.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x483d6d0]
>[ 24449.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x483d6d0] width 1920 pitch 7680 (/4 1920)
>[ 24449.050] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7060]
>[ 24449.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7060] width 1920 pitch 7680 (/4 1920)
>[ 24479.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac4c90]
>[ 24479.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac4c90] width 1920 pitch 7680 (/4 1920)
>[ 24509.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac4c90]
>[ 24509.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac4c90] width 1920 pitch 7680 (/4 1920)
>[ 24539.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22258b0]
>[ 24539.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22258b0] width 1920 pitch 7680 (/4 1920)
>[ 24554.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a78f10]
>[ 24554.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a78f10] width 1920 pitch 7680 (/4 1920)
>[ 24569.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4849d20]
>[ 24569.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4849d20] width 1920 pitch 7680 (/4 1920)
>[ 24614.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637140]
>[ 24614.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637140] width 1920 pitch 7680 (/4 1920)
>[ 24644.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4830a70]
>[ 24644.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4830a70] width 1920 pitch 7680 (/4 1920)
>[ 24749.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d79470]
>[ 24749.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d79470] width 1920 pitch 7680 (/4 1920)
>[ 24764.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a619c0]
>[ 24764.071] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a619c0] width 1920 pitch 7680 (/4 1920)
>[ 24792.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292720]
>[ 24792.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292720] width 1920 pitch 7680 (/4 1920)
>[ 24792.798] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c697d0]
>[ 24792.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c697d0] width 1920 pitch 7680 (/4 1920)
>[ 24792.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a2d20]
>[ 24792.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a2d20] width 1920 pitch 7680 (/4 1920)
>[ 24792.836] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c697d0]
>[ 24792.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c697d0] width 1920 pitch 7680 (/4 1920)
>[ 24792.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a2d20]
>[ 24792.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a2d20] width 1920 pitch 7680 (/4 1920)
>[ 24792.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c697d0]
>[ 24792.895] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c697d0] width 1920 pitch 7680 (/4 1920)
>[ 24792.898] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a2d20]
>[ 24792.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a2d20] width 1920 pitch 7680 (/4 1920)
>[ 24792.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c214e0]
>[ 24792.941] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c214e0] width 1920 pitch 7680 (/4 1920)
>[ 24792.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c103c0]
>[ 24792.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c103c0] width 1920 pitch 7680 (/4 1920)
>[ 24792.980] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6800]
>[ 24792.995] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6800] width 1920 pitch 7680 (/4 1920)
>[ 24792.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c103c0]
>[ 24793.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c103c0] width 1920 pitch 7680 (/4 1920)
>[ 24793.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6800]
>[ 24793.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6800] width 1920 pitch 7680 (/4 1920)
>[ 24794.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b9b0]
>[ 24794.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 24809.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c14d20]
>[ 24809.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c14d20] width 1920 pitch 7680 (/4 1920)
>[ 24884.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efb1c0]
>[ 24884.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efb1c0] width 1920 pitch 7680 (/4 1920)
>[ 24887.608] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 24887.608] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 24887.608] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 24887.693] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24887.693] (II) RADEON(0): RADEONSaveScreen(0)
>[ 24888.667] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 24888.667] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 24888.667] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 24891.110] (II) AIGLX: Suspending AIGLX clients for VT switch
>[ 24891.110] (II) RADEON(0): RADEONLeaveVT_KMS
>[ 24891.110] (II) RADEON(0): Ok, leaving now...
>[ 24895.846] (II) config/udev: removing device Dell Dell USB Optical Mouse
>[ 24895.847] (II) evdev: Dell Dell USB Optical Mouse: Close
>[ 24895.847] (II) UnloadModule: "evdev"
>[ 24895.859] (II) AIGLX: Resuming AIGLX clients after VT switch
>[ 24895.859] (II) RADEON(0): RADEONEnterVT_KMS
>[ 24895.878] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 24895.878] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 24895.878] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 24895.884] (II) RADEON(0): RADEONSaveScreen(2)
>[ 24895.884] (II) RADEON(0): RADEONSaveScreen(1)
>[ 24895.884] (**) Option "Device" "/dev/input/event5"
>[ 24895.884] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[ 24896.497] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 24896.497] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 24896.497] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 24904.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c14d20]
>[ 24904.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c14d20] width 1920 pitch 7680 (/4 1920)
>[ 24907.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b5310]
>[ 24907.889] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b5310] width 1920 pitch 7680 (/4 1920)
>[ 24914.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22111e0]
>[ 24914.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22111e0] width 1920 pitch 7680 (/4 1920)
>[ 24929.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 24929.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 24944.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 24944.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 24989.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f50fc0]
>[ 24989.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f50fc0] width 1920 pitch 7680 (/4 1920)
>[ 25004.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 25004.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 25019.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd2a0]
>[ 25019.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd2a0] width 1920 pitch 7680 (/4 1920)
>[ 25034.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x196ada0]
>[ 25034.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x196ada0] width 1920 pitch 7680 (/4 1920)
>[ 25034.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 25034.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 25049.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f50fc0]
>[ 25049.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f50fc0] width 1920 pitch 7680 (/4 1920)
>[ 25064.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eac7e0]
>[ 25064.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eac7e0] width 1920 pitch 7680 (/4 1920)
>[ 25199.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d786a0]
>[ 25199.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d786a0] width 1920 pitch 7680 (/4 1920)
>[ 25214.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5f310]
>[ 25214.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5f310] width 1920 pitch 7680 (/4 1920)
>[ 25214.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf8510]
>[ 25214.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf8510] width 1920 pitch 7680 (/4 1920)
>[ 25229.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf8510]
>[ 25229.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf8510] width 1920 pitch 7680 (/4 1920)
>[ 25244.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f3230]
>[ 25244.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f3230] width 1920 pitch 7680 (/4 1920)
>[ 25244.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf8510]
>[ 25244.258] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf8510] width 1920 pitch 7680 (/4 1920)
>[ 25259.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223b200]
>[ 25259.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223b200] width 1920 pitch 7680 (/4 1920)
>[ 25289.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e4e0]
>[ 25289.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e4e0] width 1920 pitch 7680 (/4 1920)
>[ 25304.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262060]
>[ 25304.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262060] width 1920 pitch 7680 (/4 1920)
>[ 25304.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262260]
>[ 25304.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262260] width 1920 pitch 7680 (/4 1920)
>[ 25319.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e4e0]
>[ 25319.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e4e0] width 1920 pitch 7680 (/4 1920)
>[ 25329.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cfd20]
>[ 25329.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cfd20] width 1920 pitch 7680 (/4 1920)
>[ 25337.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227d300]
>[ 25337.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227d300] width 1920 pitch 7680 (/4 1920)
>[ 25337.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae3780]
>[ 25337.801] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae3780] width 1920 pitch 7680 (/4 1920)
>[ 25337.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f433b0]
>[ 25337.818] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f433b0] width 1920 pitch 7680 (/4 1920)
>[ 25337.837] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2c680]
>[ 25337.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2c680] width 1920 pitch 7680 (/4 1920)
>[ 25337.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f433b0]
>[ 25337.868] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f433b0] width 1920 pitch 7680 (/4 1920)
>[ 25337.876] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2c680]
>[ 25337.901] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2c680] width 1920 pitch 7680 (/4 1920)
>[ 25337.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f433b0]
>[ 25337.918] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f433b0] width 1920 pitch 7680 (/4 1920)
>[ 25337.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2c680]
>[ 25337.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2c680] width 1920 pitch 7680 (/4 1920)
>[ 25337.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f433b0]
>[ 25337.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f433b0] width 1920 pitch 7680 (/4 1920)
>[ 25338.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2c680]
>[ 25338.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2c680] width 1920 pitch 7680 (/4 1920)
>[ 25349.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464e4e0]
>[ 25349.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464e4e0] width 1920 pitch 7680 (/4 1920)
>[ 25364.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4f680]
>[ 25364.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4f680] width 1920 pitch 7680 (/4 1920)
>[ 25366.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22764e0]
>[ 25366.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22764e0] width 1920 pitch 7680 (/4 1920)
>[ 25404.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b26380]
>[ 25404.906] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b26380] width 1920 pitch 7680 (/4 1920)
>[ 25404.979] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae3780]
>[ 25405.006] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae3780] width 1920 pitch 7680 (/4 1920)
>[ 25405.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 25405.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 25405.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae3780]
>[ 25405.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae3780] width 1920 pitch 7680 (/4 1920)
>[ 25469.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b58810]
>[ 25469.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b58810] width 1920 pitch 7680 (/4 1920)
>[ 25484.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae9420]
>[ 25484.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae9420] width 1920 pitch 7680 (/4 1920)
>[ 25484.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5eb20]
>[ 25484.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5eb20] width 1920 pitch 7680 (/4 1920)
>[ 25499.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5eb20]
>[ 25499.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5eb20] width 1920 pitch 7680 (/4 1920)
>[ 25503.829] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae8cb0]
>[ 25503.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae8cb0] width 1920 pitch 7680 (/4 1920)
>[ 25512.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229ebf0]
>[ 25512.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229ebf0] width 1920 pitch 7680 (/4 1920)
>[ 25512.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39cb0]
>[ 25512.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39cb0] width 1920 pitch 7680 (/4 1920)
>[ 25512.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 25512.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 25512.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39cb0]
>[ 25512.461] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39cb0] width 1920 pitch 7680 (/4 1920)
>[ 25512.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 25512.478] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 25512.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39cb0]
>[ 25512.495] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39cb0] width 1920 pitch 7680 (/4 1920)
>[ 25512.497] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 25512.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 25512.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39cb0]
>[ 25512.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39cb0] width 1920 pitch 7680 (/4 1920)
>[ 25512.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 25512.561] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 25512.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39cb0]
>[ 25512.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39cb0] width 1920 pitch 7680 (/4 1920)
>[ 25514.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39cb0]
>[ 25514.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39cb0] width 1920 pitch 7680 (/4 1920)
>[ 25514.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229ebf0]
>[ 25514.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229ebf0] width 1920 pitch 7680 (/4 1920)
>[ 25529.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242330]
>[ 25529.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242330] width 1920 pitch 7680 (/4 1920)
>[ 25544.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222dae0]
>[ 25544.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222dae0] width 1920 pitch 7680 (/4 1920)
>[ 25589.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244cb0]
>[ 25589.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244cb0] width 1920 pitch 7680 (/4 1920)
>[ 25593.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eb9ce0]
>[ 25593.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eb9ce0] width 1920 pitch 7680 (/4 1920)
>[ 25593.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264050]
>[ 25593.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264050] width 1920 pitch 7680 (/4 1920)
>[ 25599.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf63e0]
>[ 25599.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf63e0] width 1920 pitch 7680 (/4 1920)
>[ 25599.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eb9ce0]
>[ 25599.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eb9ce0] width 1920 pitch 7680 (/4 1920)
>[ 25604.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 25604.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 25739.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5b50]
>[ 25739.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5b50] width 1920 pitch 7680 (/4 1920)
>[ 25754.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6cfb0]
>[ 25754.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6cfb0] width 1920 pitch 7680 (/4 1920)
>[ 25829.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264050]
>[ 25829.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264050] width 1920 pitch 7680 (/4 1920)
>[ 25844.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c38a30]
>[ 25844.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c38a30] width 1920 pitch 7680 (/4 1920)
>[ 25852.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f44180]
>[ 25852.221] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f44180] width 1920 pitch 7680 (/4 1920)
>[ 25852.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 25852.254] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 25852.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f44180]
>[ 25852.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f44180] width 1920 pitch 7680 (/4 1920)
>[ 25852.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 25852.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 25859.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c38a30]
>[ 25859.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c38a30] width 1920 pitch 7680 (/4 1920)
>[ 25874.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f14730]
>[ 25874.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f14730] width 1920 pitch 7680 (/4 1920)
>[ 25934.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2fa40]
>[ 25934.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2fa40] width 1920 pitch 7680 (/4 1920)
>[ 25949.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cf6a00]
>[ 25949.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cf6a00] width 1920 pitch 7680 (/4 1920)
>[ 25964.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 25964.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 25994.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5b50]
>[ 25994.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5b50] width 1920 pitch 7680 (/4 1920)
>[ 26009.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d10e70]
>[ 26009.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d10e70] width 1920 pitch 7680 (/4 1920)
>[ 26024.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2227d60]
>[ 26024.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2227d60] width 1920 pitch 7680 (/4 1920)
>[ 26039.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f44180]
>[ 26039.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f44180] width 1920 pitch 7680 (/4 1920)
>[ 26069.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5b50]
>[ 26069.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5b50] width 1920 pitch 7680 (/4 1920)
>[ 26084.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d10e70]
>[ 26084.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d10e70] width 1920 pitch 7680 (/4 1920)
>[ 26129.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae92f0]
>[ 26129.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae92f0] width 1920 pitch 7680 (/4 1920)
>[ 26144.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cf6a00]
>[ 26144.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cf6a00] width 1920 pitch 7680 (/4 1920)
>[ 26159.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f14730]
>[ 26159.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f14730] width 1920 pitch 7680 (/4 1920)
>[ 26174.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228cdb0]
>[ 26174.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228cdb0] width 1920 pitch 7680 (/4 1920)
>[ 26513.225] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 26513.225] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 26513.226] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 26602.970] (II) RADEON(0): RADEONSaveScreen(2)
>[ 26602.970] (II) RADEON(0): RADEONSaveScreen(0)
>[ 27826.200] (II) RADEON(0): RADEONSaveScreen(1)
>[ 27826.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228cdb0]
>[ 27826.949] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228cdb0] width 1920 pitch 7680 (/4 1920)
>[ 27857.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae92f0]
>[ 27857.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae92f0] width 1920 pitch 7680 (/4 1920)
>[ 27902.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2e8a0]
>[ 27902.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2e8a0] width 1920 pitch 7680 (/4 1920)
>[ 27917.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b6a6d0]
>[ 27917.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b6a6d0] width 1920 pitch 7680 (/4 1920)
>[ 27950.961] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a652f0]
>[ 27950.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a652f0] width 1920 pitch 7680 (/4 1920)
>[ 27951.238] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1fe10]
>[ 27951.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1fe10] width 1920 pitch 7680 (/4 1920)
>[ 27951.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263040]
>[ 27951.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263040] width 1920 pitch 7680 (/4 1920)
>[ 27951.389] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46482a0]
>[ 27951.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46482a0] width 1920 pitch 7680 (/4 1920)
>[ 27951.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263040]
>[ 27951.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263040] width 1920 pitch 7680 (/4 1920)
>[ 27951.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46482a0]
>[ 27951.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46482a0] width 1920 pitch 7680 (/4 1920)
>[ 27951.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263040]
>[ 27951.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263040] width 1920 pitch 7680 (/4 1920)
>[ 27951.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46482a0]
>[ 27951.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46482a0] width 1920 pitch 7680 (/4 1920)
>[ 27951.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263040]
>[ 27951.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263040] width 1920 pitch 7680 (/4 1920)
>[ 27951.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46482a0]
>[ 27951.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46482a0] width 1920 pitch 7680 (/4 1920)
>[ 27951.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4841b70]
>[ 27951.784] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4841b70] width 1920 pitch 7680 (/4 1920)
>[ 27952.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c16cd0]
>[ 27952.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c16cd0] width 1920 pitch 7680 (/4 1920)
>[ 27952.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4841b70]
>[ 27952.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4841b70] width 1920 pitch 7680 (/4 1920)
>[ 27952.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c16cd0]
>[ 27952.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c16cd0] width 1920 pitch 7680 (/4 1920)
>[ 27952.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4841b70]
>[ 27952.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4841b70] width 1920 pitch 7680 (/4 1920)
>[ 27952.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c16cd0]
>[ 27952.452] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c16cd0] width 1920 pitch 7680 (/4 1920)
>[ 27952.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c18170]
>[ 27952.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c18170] width 1920 pitch 7680 (/4 1920)
>[ 27952.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c16cd0]
>[ 27952.535] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c16cd0] width 1920 pitch 7680 (/4 1920)
>[ 27952.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d84ad0]
>[ 27952.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d84ad0] width 1920 pitch 7680 (/4 1920)
>[ 27952.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c16cd0]
>[ 27952.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c16cd0] width 1920 pitch 7680 (/4 1920)
>[ 27952.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aebf80]
>[ 27952.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aebf80] width 1920 pitch 7680 (/4 1920)
>[ 27952.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f5590]
>[ 27952.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f5590] width 1920 pitch 7680 (/4 1920)
>[ 27962.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b7a040]
>[ 27962.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b7a040] width 1920 pitch 7680 (/4 1920)
>[ 27977.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b74eb0]
>[ 27977.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b74eb0] width 1920 pitch 7680 (/4 1920)
>[ 27977.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b7a040]
>[ 27977.072] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b7a040] width 1920 pitch 7680 (/4 1920)
>[ 27992.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2218a00]
>[ 27992.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2218a00] width 1920 pitch 7680 (/4 1920)
>[ 28022.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482dff0]
>[ 28022.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482dff0] width 1920 pitch 7680 (/4 1920)
>[ 28037.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2253680]
>[ 28037.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2253680] width 1920 pitch 7680 (/4 1920)
>[ 28052.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8e320]
>[ 28052.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8e320] width 1920 pitch 7680 (/4 1920)
>[ 28067.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b74e00]
>[ 28067.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b74e00] width 1920 pitch 7680 (/4 1920)
>[ 28082.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46477e0]
>[ 28082.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46477e0] width 1920 pitch 7680 (/4 1920)
>[ 28097.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46459d0]
>[ 28097.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46459d0] width 1920 pitch 7680 (/4 1920)
>[ 28127.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d4af30]
>[ 28127.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d4af30] width 1920 pitch 7680 (/4 1920)
>[ 28202.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3ff90]
>[ 28202.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3ff90] width 1920 pitch 7680 (/4 1920)
>[ 28217.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2219ae0]
>[ 28217.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2219ae0] width 1920 pitch 7680 (/4 1920)
>[ 28337.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464a5c0]
>[ 28337.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464a5c0] width 1920 pitch 7680 (/4 1920)
>[ 28352.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464a5c0]
>[ 28352.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464a5c0] width 1920 pitch 7680 (/4 1920)
>[ 28397.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228deb0]
>[ 28397.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228deb0] width 1920 pitch 7680 (/4 1920)
>[ 28412.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efee10]
>[ 28412.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efee10] width 1920 pitch 7680 (/4 1920)
>[ 28427.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228deb0]
>[ 28427.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228deb0] width 1920 pitch 7680 (/4 1920)
>[ 28457.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2e8a0]
>[ 28457.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2e8a0] width 1920 pitch 7680 (/4 1920)
>[ 28472.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2e8a0]
>[ 28472.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2e8a0] width 1920 pitch 7680 (/4 1920)
>[ 28562.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228deb0]
>[ 28562.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228deb0] width 1920 pitch 7680 (/4 1920)
>[ 28577.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c65f20]
>[ 28577.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c65f20] width 1920 pitch 7680 (/4 1920)
>[ 28607.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efee10]
>[ 28607.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efee10] width 1920 pitch 7680 (/4 1920)
>[ 28622.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x464a5c0]
>[ 28622.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x464a5c0] width 1920 pitch 7680 (/4 1920)
>[ 28682.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c65f20]
>[ 28682.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c65f20] width 1920 pitch 7680 (/4 1920)
>[ 28697.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c9d0]
>[ 28697.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c9d0] width 1920 pitch 7680 (/4 1920)
>[ 28731.691] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 28731.691] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 28731.691] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 28821.991] (II) RADEON(0): RADEONSaveScreen(2)
>[ 28821.991] (II) RADEON(0): RADEONSaveScreen(0)
>[ 37961.554] (II) RADEON(0): RADEONSaveScreen(1)
>[ 37968.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2a710]
>[ 37968.976] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2a710] width 1920 pitch 7680 (/4 1920)
>[ 38022.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6ccc0]
>[ 38022.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6ccc0] width 1920 pitch 7680 (/4 1920)
>[ 38067.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f1c4a0]
>[ 38067.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f1c4a0] width 1920 pitch 7680 (/4 1920)
>[ 38097.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f1c4a0]
>[ 38097.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f1c4a0] width 1920 pitch 7680 (/4 1920)
>[ 38112.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484b9d0]
>[ 38112.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484b9d0] width 1920 pitch 7680 (/4 1920)
>[ 38127.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229e6a0]
>[ 38127.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229e6a0] width 1920 pitch 7680 (/4 1920)
>[ 38142.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2e8a0]
>[ 38142.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2e8a0] width 1920 pitch 7680 (/4 1920)
>[ 38187.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f6ba30]
>[ 38187.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f6ba30] width 1920 pitch 7680 (/4 1920)
>[ 38202.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d0d1f0]
>[ 38202.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d0d1f0] width 1920 pitch 7680 (/4 1920)
>[ 38217.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d6e20]
>[ 38217.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d6e20] width 1920 pitch 7680 (/4 1920)
>[ 38232.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6dfc0]
>[ 38232.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6dfc0] width 1920 pitch 7680 (/4 1920)
>[ 38262.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227aa60]
>[ 38262.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227aa60] width 1920 pitch 7680 (/4 1920)
>[ 38277.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221b5c0]
>[ 38277.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221b5c0] width 1920 pitch 7680 (/4 1920)
>[ 38292.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3f5a0]
>[ 38292.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3f5a0] width 1920 pitch 7680 (/4 1920)
>[ 38307.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ed3e50]
>[ 38307.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ed3e50] width 1920 pitch 7680 (/4 1920)
>[ 38322.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0e320]
>[ 38322.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0e320] width 1920 pitch 7680 (/4 1920)
>[ 38352.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224d6a0]
>[ 38352.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224d6a0] width 1920 pitch 7680 (/4 1920)
>[ 38367.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2261e10]
>[ 38367.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2261e10] width 1920 pitch 7680 (/4 1920)
>[ 38457.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d17610]
>[ 38457.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d17610] width 1920 pitch 7680 (/4 1920)
>[ 38472.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d17610]
>[ 38472.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d17610] width 1920 pitch 7680 (/4 1920)
>[ 38517.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d17610]
>[ 38517.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d17610] width 1920 pitch 7680 (/4 1920)
>[ 38532.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229ad50]
>[ 38532.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229ad50] width 1920 pitch 7680 (/4 1920)
>[ 38622.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d59920]
>[ 38622.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d59920] width 1920 pitch 7680 (/4 1920)
>[ 38637.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b39530]
>[ 38637.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b39530] width 1920 pitch 7680 (/4 1920)
>[ 38697.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b43b60]
>[ 38697.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b43b60] width 1920 pitch 7680 (/4 1920)
>[ 38712.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfe4b0]
>[ 38712.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfe4b0] width 1920 pitch 7680 (/4 1920)
>[ 38742.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f6ba30]
>[ 38742.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f6ba30] width 1920 pitch 7680 (/4 1920)
>[ 38757.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d660]
>[ 38757.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d660] width 1920 pitch 7680 (/4 1920)
>[ 38787.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d44530]
>[ 38787.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d44530] width 1920 pitch 7680 (/4 1920)
>[ 38817.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b43b60]
>[ 38817.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b43b60] width 1920 pitch 7680 (/4 1920)
>[ 38817.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b45f00]
>[ 38817.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b45f00] width 1920 pitch 7680 (/4 1920)
>[ 38832.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 38832.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 38847.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46357c0]
>[ 38847.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46357c0] width 1920 pitch 7680 (/4 1920)
>[ 38862.038] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46357c0]
>[ 38862.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46357c0] width 1920 pitch 7680 (/4 1920)
>[ 38877.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 38877.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 38892.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 38892.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 38907.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf62f0]
>[ 38907.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf62f0] width 1920 pitch 7680 (/4 1920)
>[ 38937.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482fc60]
>[ 38937.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482fc60] width 1920 pitch 7680 (/4 1920)
>[ 38967.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4bc40]
>[ 38967.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4bc40] width 1920 pitch 7680 (/4 1920)
>[ 39012.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fd880]
>[ 39012.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fd880] width 1920 pitch 7680 (/4 1920)
>[ 39027.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af0a80]
>[ 39027.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af0a80] width 1920 pitch 7680 (/4 1920)
>[ 39132.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c11510]
>[ 39132.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c11510] width 1920 pitch 7680 (/4 1920)
>[ 39147.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224df10]
>[ 39147.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224df10] width 1920 pitch 7680 (/4 1920)
>[ 39162.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5bd0]
>[ 39162.070] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5bd0] width 1920 pitch 7680 (/4 1920)
>[ 39164.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab0990]
>[ 39164.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab0990] width 1920 pitch 7680 (/4 1920)
>[ 39171.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b40180]
>[ 39171.628] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b40180] width 1920 pitch 7680 (/4 1920)
>[ 39171.630] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2de90]
>[ 39171.644] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2de90] width 1920 pitch 7680 (/4 1920)
>[ 39171.646] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cddb0]
>[ 39171.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cddb0] width 1920 pitch 7680 (/4 1920)
>[ 39171.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f2de90]
>[ 39171.687] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f2de90] width 1920 pitch 7680 (/4 1920)
>[ 39171.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292bc0]
>[ 39171.728] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292bc0] width 1920 pitch 7680 (/4 1920)
>[ 39171.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5bd0]
>[ 39171.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5bd0] width 1920 pitch 7680 (/4 1920)
>[ 39171.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292bc0]
>[ 39171.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292bc0] width 1920 pitch 7680 (/4 1920)
>[ 39171.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9560]
>[ 39171.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9560] width 1920 pitch 7680 (/4 1920)
>[ 39171.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224f790]
>[ 39171.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224f790] width 1920 pitch 7680 (/4 1920)
>[ 39171.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b40180]
>[ 39171.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b40180] width 1920 pitch 7680 (/4 1920)
>[ 39171.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9560]
>[ 39171.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9560] width 1920 pitch 7680 (/4 1920)
>[ 39184.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0dcd0]
>[ 39184.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0dcd0] width 1920 pitch 7680 (/4 1920)
>[ 39192.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c36ce0]
>[ 39192.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c36ce0] width 1920 pitch 7680 (/4 1920)
>[ 39206.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229b7b0]
>[ 39206.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229b7b0] width 1920 pitch 7680 (/4 1920)
>[ 39207.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad8d60]
>[ 39207.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad8d60] width 1920 pitch 7680 (/4 1920)
>[ 39212.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa2760]
>[ 39212.694] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa2760] width 1920 pitch 7680 (/4 1920)
>[ 39212.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9560]
>[ 39212.744] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9560] width 1920 pitch 7680 (/4 1920)
>[ 39212.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2277120]
>[ 39212.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2277120] width 1920 pitch 7680 (/4 1920)
>[ 39212.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cddb0]
>[ 39212.944] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cddb0] width 1920 pitch 7680 (/4 1920)
>[ 39222.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22618e0]
>[ 39222.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22618e0] width 1920 pitch 7680 (/4 1920)
>[ 39237.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292bc0]
>[ 39237.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292bc0] width 1920 pitch 7680 (/4 1920)
>[ 39244.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d681a0]
>[ 39244.953] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d681a0] width 1920 pitch 7680 (/4 1920)
>[ 39245.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229f4f0]
>[ 39245.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229f4f0] width 1920 pitch 7680 (/4 1920)
>[ 39252.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b402e0]
>[ 39252.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b402e0] width 1920 pitch 7680 (/4 1920)
>[ 39267.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b72ec0]
>[ 39267.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b72ec0] width 1920 pitch 7680 (/4 1920)
>[ 39327.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab0a70]
>[ 39327.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab0a70] width 1920 pitch 7680 (/4 1920)
>[ 39342.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224e780]
>[ 39342.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224e780] width 1920 pitch 7680 (/4 1920)
>[ 39353.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e92340]
>[ 39354.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e92340] width 1920 pitch 7680 (/4 1920)
>[ 39432.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ea4cf0]
>[ 39432.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ea4cf0] width 1920 pitch 7680 (/4 1920)
>[ 39432.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c34490]
>[ 39432.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c34490] width 1920 pitch 7680 (/4 1920)
>[ 39447.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x482a480]
>[ 39447.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x482a480] width 1920 pitch 7680 (/4 1920)
>[ 39552.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56e370]
>[ 39552.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56e370] width 1920 pitch 7680 (/4 1920)
>[ 39552.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c17890]
>[ 39552.151] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c17890] width 1920 pitch 7680 (/4 1920)
>[ 39567.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c16d10]
>[ 39567.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c16d10] width 1920 pitch 7680 (/4 1920)
>[ 39604.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4844350]
>[ 39604.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4844350] width 1920 pitch 7680 (/4 1920)
>[ 39657.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab32a0]
>[ 39657.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab32a0] width 1920 pitch 7680 (/4 1920)
>[ 39687.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c16d10]
>[ 39687.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c16d10] width 1920 pitch 7680 (/4 1920)
>[ 39762.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ad1180]
>[ 39762.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ad1180] width 1920 pitch 7680 (/4 1920)
>[ 39762.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22196b0]
>[ 39762.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22196b0] width 1920 pitch 7680 (/4 1920)
>[ 39777.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0aed0]
>[ 39777.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0aed0] width 1920 pitch 7680 (/4 1920)
>[ 39867.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abb3d0]
>[ 39867.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abb3d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abec90]
>[ 39872.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abec90] width 1920 pitch 7680 (/4 1920)
>[ 39872.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abe5d0]
>[ 39872.225] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abe5d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 39872.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 39872.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abe5d0]
>[ 39872.259] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abe5d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 39872.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 39872.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abe5d0]
>[ 39872.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abe5d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 39872.309] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 39872.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abe5d0]
>[ 39872.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abe5d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 39872.343] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 39872.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abe5d0]
>[ 39872.359] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abe5d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 39872.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 39872.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abe5d0]
>[ 39872.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abe5d0] width 1920 pitch 7680 (/4 1920)
>[ 39872.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 39872.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 39881.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e49e40]
>[ 39881.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e49e40] width 1920 pitch 7680 (/4 1920)
>[ 39882.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c1ca0]
>[ 39882.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c1ca0] width 1920 pitch 7680 (/4 1920)
>[ 39888.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa566240]
>[ 39888.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa566240] width 1920 pitch 7680 (/4 1920)
>[ 39897.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa563ab0]
>[ 39897.062] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa563ab0] width 1920 pitch 7680 (/4 1920)
>[ 40018.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e68830]
>[ 40018.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e68830] width 1920 pitch 7680 (/4 1920)
>[ 40018.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9fe30]
>[ 40018.243] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9fe30] width 1920 pitch 7680 (/4 1920)
>[ 40018.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d219c0]
>[ 40018.311] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d219c0] width 1920 pitch 7680 (/4 1920)
>[ 40018.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0a170]
>[ 40018.327] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0a170] width 1920 pitch 7680 (/4 1920)
>[ 40018.329] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d219c0]
>[ 40018.344] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d219c0] width 1920 pitch 7680 (/4 1920)
>[ 40018.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0a170]
>[ 40018.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0a170] width 1920 pitch 7680 (/4 1920)
>[ 40018.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d219c0]
>[ 40018.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d219c0] width 1920 pitch 7680 (/4 1920)
>[ 40018.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0a170]
>[ 40018.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0a170] width 1920 pitch 7680 (/4 1920)
>[ 40018.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d219c0]
>[ 40018.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d219c0] width 1920 pitch 7680 (/4 1920)
>[ 40018.472] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0a170]
>[ 40018.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0a170] width 1920 pitch 7680 (/4 1920)
>[ 40023.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cf77e0]
>[ 40023.982] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cf77e0] width 1920 pitch 7680 (/4 1920)
>[ 40047.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c38a30]
>[ 40047.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c38a30] width 1920 pitch 7680 (/4 1920)
>[ 40062.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5f3e50]
>[ 40062.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5f3e50] width 1920 pitch 7680 (/4 1920)
>[ 40174.290] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a1940]
>[ 40174.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a1940] width 1920 pitch 7680 (/4 1920)
>[ 40174.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 40174.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 40174.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbfe30]
>[ 40174.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbfe30] width 1920 pitch 7680 (/4 1920)
>[ 40174.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 40174.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 40178.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e48c60]
>[ 40178.541] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e48c60] width 1920 pitch 7680 (/4 1920)
>[ 40197.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d70600]
>[ 40197.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d70600] width 1920 pitch 7680 (/4 1920)
>[ 40197.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22185b0]
>[ 40197.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22185b0] width 1920 pitch 7680 (/4 1920)
>[ 40197.428] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d70600]
>[ 40197.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d70600] width 1920 pitch 7680 (/4 1920)
>[ 40197.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0b8d0]
>[ 40197.590] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0b8d0] width 1920 pitch 7680 (/4 1920)
>[ 40202.441] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7f7b0]
>[ 40202.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7f7b0] width 1920 pitch 7680 (/4 1920)
>[ 40213.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b5b9b0]
>[ 40213.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b5b9b0] width 1920 pitch 7680 (/4 1920)
>[ 40213.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c1ca0]
>[ 40213.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c1ca0] width 1920 pitch 7680 (/4 1920)
>[ 40213.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afd5e0]
>[ 40213.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afd5e0] width 1920 pitch 7680 (/4 1920)
>[ 40219.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b01cf0]
>[ 40220.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b01cf0] width 1920 pitch 7680 (/4 1920)
>[ 40227.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4833e60]
>[ 40227.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4833e60] width 1920 pitch 7680 (/4 1920)
>[ 40242.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b1c820]
>[ 40242.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b1c820] width 1920 pitch 7680 (/4 1920)
>[ 40287.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d3b480]
>[ 40287.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d3b480] width 1920 pitch 7680 (/4 1920)
>[ 40302.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae3700]
>[ 40302.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae3700] width 1920 pitch 7680 (/4 1920)
>[ 40332.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b60400]
>[ 40332.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b60400] width 1920 pitch 7680 (/4 1920)
>[ 40347.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0b8d0]
>[ 40347.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0b8d0] width 1920 pitch 7680 (/4 1920)
>[ 40421.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b6b800]
>[ 40421.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b6b800] width 1920 pitch 7680 (/4 1920)
>[ 40421.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 40421.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 40421.427] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40421.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40421.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 40421.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 40435.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40435.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40435.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a1940]
>[ 40435.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a1940] width 1920 pitch 7680 (/4 1920)
>[ 40435.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40435.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40435.746] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a1940]
>[ 40435.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a1940] width 1920 pitch 7680 (/4 1920)
>[ 40435.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40435.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40435.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a1940]
>[ 40435.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a1940] width 1920 pitch 7680 (/4 1920)
>[ 40436.277] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40436.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40436.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a1940]
>[ 40436.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a1940] width 1920 pitch 7680 (/4 1920)
>[ 40436.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40436.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40436.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a1940]
>[ 40436.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a1940] width 1920 pitch 7680 (/4 1920)
>[ 40436.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10740]
>[ 40436.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10740] width 1920 pitch 7680 (/4 1920)
>[ 40437.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56e370]
>[ 40437.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56e370] width 1920 pitch 7680 (/4 1920)
>[ 40437.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c1ca0]
>[ 40437.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c1ca0] width 1920 pitch 7680 (/4 1920)
>[ 40437.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48442f0]
>[ 40437.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48442f0] width 1920 pitch 7680 (/4 1920)
>[ 40437.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c1ca0]
>[ 40437.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c1ca0] width 1920 pitch 7680 (/4 1920)
>[ 40437.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48442f0]
>[ 40437.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48442f0] width 1920 pitch 7680 (/4 1920)
>[ 40437.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c1ca0]
>[ 40437.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c1ca0] width 1920 pitch 7680 (/4 1920)
>[ 40437.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48442f0]
>[ 40437.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48442f0] width 1920 pitch 7680 (/4 1920)
>[ 40437.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c1ca0]
>[ 40437.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c1ca0] width 1920 pitch 7680 (/4 1920)
>[ 40482.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa5ea0]
>[ 40482.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa5ea0] width 1920 pitch 7680 (/4 1920)
>[ 40497.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d043c0]
>[ 40497.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d043c0] width 1920 pitch 7680 (/4 1920)
>[ 40497.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d20240]
>[ 40497.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d20240] width 1920 pitch 7680 (/4 1920)
>[ 40527.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be2930]
>[ 40527.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be2930] width 1920 pitch 7680 (/4 1920)
>[ 40527.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e513f0]
>[ 40527.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e513f0] width 1920 pitch 7680 (/4 1920)
>[ 40534.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2e2a0]
>[ 40534.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2e2a0] width 1920 pitch 7680 (/4 1920)
>[ 40542.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a97b00]
>[ 40542.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a97b00] width 1920 pitch 7680 (/4 1920)
>[ 40557.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa569af0]
>[ 40557.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa569af0] width 1920 pitch 7680 (/4 1920)
>[ 40572.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a96380]
>[ 40572.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a96380] width 1920 pitch 7680 (/4 1920)
>[ 40587.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a96380]
>[ 40587.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a96380] width 1920 pitch 7680 (/4 1920)
>[ 40635.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b738c0]
>[ 40635.260] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b738c0] width 1920 pitch 7680 (/4 1920)
>[ 40635.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b1c100]
>[ 40635.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b1c100] width 1920 pitch 7680 (/4 1920)
>[ 40635.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e93f00]
>[ 40635.310] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e93f00] width 1920 pitch 7680 (/4 1920)
>[ 40635.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a78b30]
>[ 40635.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a78b30] width 1920 pitch 7680 (/4 1920)
>[ 40635.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75380]
>[ 40635.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75380] width 1920 pitch 7680 (/4 1920)
>[ 40635.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc9dc0]
>[ 40635.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc9dc0] width 1920 pitch 7680 (/4 1920)
>[ 40635.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75380]
>[ 40635.410] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75380] width 1920 pitch 7680 (/4 1920)
>[ 40635.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc9dc0]
>[ 40635.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc9dc0] width 1920 pitch 7680 (/4 1920)
>[ 40635.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75380]
>[ 40635.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75380] width 1920 pitch 7680 (/4 1920)
>[ 40635.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc9dc0]
>[ 40635.460] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc9dc0] width 1920 pitch 7680 (/4 1920)
>[ 40635.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75380]
>[ 40635.510] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75380] width 1920 pitch 7680 (/4 1920)
>[ 40657.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4adaa80]
>[ 40657.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4adaa80] width 1920 pitch 7680 (/4 1920)
>[ 40662.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abb010]
>[ 40662.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abb010] width 1920 pitch 7680 (/4 1920)
>[ 40677.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8cd20]
>[ 40677.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8cd20] width 1920 pitch 7680 (/4 1920)
>[ 40692.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2ec20]
>[ 40692.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2ec20] width 1920 pitch 7680 (/4 1920)
>[ 40722.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbd7b0]
>[ 40722.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbd7b0] width 1920 pitch 7680 (/4 1920)
>[ 40737.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abad20]
>[ 40737.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abad20] width 1920 pitch 7680 (/4 1920)
>[ 40782.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa49e0]
>[ 40782.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa49e0] width 1920 pitch 7680 (/4 1920)
>[ 40785.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bd61f0]
>[ 40785.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bd61f0] width 1920 pitch 7680 (/4 1920)
>[ 40797.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4649970]
>[ 40797.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4649970] width 1920 pitch 7680 (/4 1920)
>[ 40797.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be0550]
>[ 40797.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be0550] width 1920 pitch 7680 (/4 1920)
>[ 40812.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a212b0]
>[ 40812.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a212b0] width 1920 pitch 7680 (/4 1920)
>[ 40827.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46379c0]
>[ 40827.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46379c0] width 1920 pitch 7680 (/4 1920)
>[ 40830.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 40830.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 40830.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 40830.450] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 40830.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 40830.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 40830.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 40830.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 40830.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 40830.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 40830.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 40830.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 40830.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 40830.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 40830.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 40830.551] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 40830.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 40830.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 40830.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 40830.584] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 40830.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250590]
>[ 40830.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250590] width 1920 pitch 7680 (/4 1920)
>[ 40830.661] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 40830.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 40840.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbc3f0]
>[ 40840.443] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbc3f0] width 1920 pitch 7680 (/4 1920)
>[ 40842.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d64450]
>[ 40842.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d64450] width 1920 pitch 7680 (/4 1920)
>[ 40857.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96100]
>[ 40857.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96100] width 1920 pitch 7680 (/4 1920)
>[ 40857.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b6ed60]
>[ 40857.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b6ed60] width 1920 pitch 7680 (/4 1920)
>[ 40887.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 40887.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 40902.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463da10]
>[ 40902.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463da10] width 1920 pitch 7680 (/4 1920)
>[ 40917.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463d840]
>[ 40917.020] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463d840] width 1920 pitch 7680 (/4 1920)
>[ 40917.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5f0ac0]
>[ 40917.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5f0ac0] width 1920 pitch 7680 (/4 1920)
>[ 40932.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd120]
>[ 40932.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd120] width 1920 pitch 7680 (/4 1920)
>[ 40947.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463da10]
>[ 40947.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463da10] width 1920 pitch 7680 (/4 1920)
>[ 40947.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228db60]
>[ 40947.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228db60] width 1920 pitch 7680 (/4 1920)
>[ 40972.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d64450]
>[ 40972.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d64450] width 1920 pitch 7680 (/4 1920)
>[ 40972.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831cf0]
>[ 40972.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831cf0] width 1920 pitch 7680 (/4 1920)
>[ 40972.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc690]
>[ 40972.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc690] width 1920 pitch 7680 (/4 1920)
>[ 40972.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831cf0]
>[ 40972.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831cf0] width 1920 pitch 7680 (/4 1920)
>[ 40972.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc690]
>[ 40972.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc690] width 1920 pitch 7680 (/4 1920)
>[ 40972.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831cf0]
>[ 40972.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831cf0] width 1920 pitch 7680 (/4 1920)
>[ 40972.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc690]
>[ 40972.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc690] width 1920 pitch 7680 (/4 1920)
>[ 40972.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831cf0]
>[ 40972.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831cf0] width 1920 pitch 7680 (/4 1920)
>[ 40972.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc690]
>[ 40972.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc690] width 1920 pitch 7680 (/4 1920)
>[ 40972.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831cf0]
>[ 40972.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831cf0] width 1920 pitch 7680 (/4 1920)
>[ 40972.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc690]
>[ 40972.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc690] width 1920 pitch 7680 (/4 1920)
>[ 40972.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831cf0]
>[ 40972.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831cf0] width 1920 pitch 7680 (/4 1920)
>[ 40975.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4644a80]
>[ 40975.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4644a80] width 1920 pitch 7680 (/4 1920)
>[ 40975.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40975.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40975.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc55f0]
>[ 40975.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc55f0] width 1920 pitch 7680 (/4 1920)
>[ 40975.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40975.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40975.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc55f0]
>[ 40975.667] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc55f0] width 1920 pitch 7680 (/4 1920)
>[ 40975.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40975.701] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40975.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc55f0]
>[ 40975.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc55f0] width 1920 pitch 7680 (/4 1920)
>[ 40975.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40975.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40975.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc55f0]
>[ 40975.834] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc55f0] width 1920 pitch 7680 (/4 1920)
>[ 40975.897] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40975.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40976.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc55f0]
>[ 40976.368] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc55f0] width 1920 pitch 7680 (/4 1920)
>[ 40976.559] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40976.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40976.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc55f0]
>[ 40976.651] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc55f0] width 1920 pitch 7680 (/4 1920)
>[ 40976.862] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 40976.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 40977.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651b60]
>[ 40977.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651b60] width 1920 pitch 7680 (/4 1920)
>[ 40977.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463fdc0]
>[ 40977.302] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463fdc0] width 1920 pitch 7680 (/4 1920)
>[ 40977.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc5380]
>[ 40977.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc5380] width 1920 pitch 7680 (/4 1920)
>[ 40977.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463fdc0]
>[ 40977.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463fdc0] width 1920 pitch 7680 (/4 1920)
>[ 40977.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc5380]
>[ 40977.419] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc5380] width 1920 pitch 7680 (/4 1920)
>[ 40977.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463fdc0]
>[ 40977.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463fdc0] width 1920 pitch 7680 (/4 1920)
>[ 41007.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa2810]
>[ 41007.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa2810] width 1920 pitch 7680 (/4 1920)
>[ 41037.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee6890]
>[ 41037.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee6890] width 1920 pitch 7680 (/4 1920)
>[ 41045.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 41045.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 41045.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad200]
>[ 41045.123] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad200] width 1920 pitch 7680 (/4 1920)
>[ 41045.143] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad200]
>[ 41045.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad200] width 1920 pitch 7680 (/4 1920)
>[ 41045.159] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d627a0]
>[ 41045.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d627a0] width 1920 pitch 7680 (/4 1920)
>[ 41045.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad200]
>[ 41045.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad200] width 1920 pitch 7680 (/4 1920)
>[ 41045.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d627a0]
>[ 41045.207] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d627a0] width 1920 pitch 7680 (/4 1920)
>[ 41045.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad200]
>[ 41045.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad200] width 1920 pitch 7680 (/4 1920)
>[ 41045.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d627a0]
>[ 41045.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d627a0] width 1920 pitch 7680 (/4 1920)
>[ 41045.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad200]
>[ 41045.274] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad200] width 1920 pitch 7680 (/4 1920)
>[ 41045.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d627a0]
>[ 41045.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d627a0] width 1920 pitch 7680 (/4 1920)
>[ 41045.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aad200]
>[ 41045.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aad200] width 1920 pitch 7680 (/4 1920)
>[ 41047.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56e370]
>[ 41047.709] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56e370] width 1920 pitch 7680 (/4 1920)
>[ 41047.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 41047.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 41047.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b04e40]
>[ 41047.826] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b04e40] width 1920 pitch 7680 (/4 1920)
>[ 41047.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 41047.975] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 41052.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463da10]
>[ 41052.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463da10] width 1920 pitch 7680 (/4 1920)
>[ 41067.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a212b0]
>[ 41067.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a212b0] width 1920 pitch 7680 (/4 1920)
>[ 41068.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4643a40]
>[ 41068.819] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4643a40] width 1920 pitch 7680 (/4 1920)
>[ 41082.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7eea0]
>[ 41082.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7eea0] width 1920 pitch 7680 (/4 1920)
>[ 41127.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae9440]
>[ 41127.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae9440] width 1920 pitch 7680 (/4 1920)
>[ 41136.145] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b37160]
>[ 41136.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b37160] width 1920 pitch 7680 (/4 1920)
>[ 41136.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e20310]
>[ 41136.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e20310] width 1920 pitch 7680 (/4 1920)
>[ 41136.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a92540]
>[ 41136.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a92540] width 1920 pitch 7680 (/4 1920)
>[ 41142.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc7c0]
>[ 41142.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc7c0] width 1920 pitch 7680 (/4 1920)
>[ 41209.830] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4956ee0]
>[ 41209.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4956ee0] width 1920 pitch 7680 (/4 1920)
>[ 41217.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4eee40]
>[ 41217.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4eee40] width 1920 pitch 7680 (/4 1920)
>[ 41232.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x229e7f0]
>[ 41232.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x229e7f0] width 1920 pitch 7680 (/4 1920)
>[ 41292.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9fe40]
>[ 41292.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9fe40] width 1920 pitch 7680 (/4 1920)
>[ 41292.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41292.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41307.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef4800]
>[ 41307.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef4800] width 1920 pitch 7680 (/4 1920)
>[ 41352.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bb5d80]
>[ 41352.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bb5d80] width 1920 pitch 7680 (/4 1920)
>[ 41352.188] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22924d0]
>[ 41352.208] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22924d0] width 1920 pitch 7680 (/4 1920)
>[ 41367.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9fe40]
>[ 41367.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9fe40] width 1920 pitch 7680 (/4 1920)
>[ 41382.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5adead0]
>[ 41382.066] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5adead0] width 1920 pitch 7680 (/4 1920)
>[ 41382.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d39070]
>[ 41382.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d39070] width 1920 pitch 7680 (/4 1920)
>[ 41397.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240760]
>[ 41397.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240760] width 1920 pitch 7680 (/4 1920)
>[ 41412.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a62c50]
>[ 41412.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a62c50] width 1920 pitch 7680 (/4 1920)
>[ 41419.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a8f8d0]
>[ 41419.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a8f8d0] width 1920 pitch 7680 (/4 1920)
>[ 41427.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4651470]
>[ 41427.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4651470] width 1920 pitch 7680 (/4 1920)
>[ 41442.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a98ac0]
>[ 41442.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a98ac0] width 1920 pitch 7680 (/4 1920)
>[ 41450.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdbda0]
>[ 41450.371] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdbda0] width 1920 pitch 7680 (/4 1920)
>[ 41450.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41450.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41450.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x58984f0]
>[ 41450.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x58984f0] width 1920 pitch 7680 (/4 1920)
>[ 41450.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41450.638] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41457.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a98ac0]
>[ 41457.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a98ac0] width 1920 pitch 7680 (/4 1920)
>[ 41464.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a0f1d0]
>[ 41464.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a0f1d0] width 1920 pitch 7680 (/4 1920)
>[ 41465.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4af0d30]
>[ 41465.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4af0d30] width 1920 pitch 7680 (/4 1920)
>[ 41465.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a0f1d0]
>[ 41465.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a0f1d0] width 1920 pitch 7680 (/4 1920)
>[ 41466.944] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b41020]
>[ 41466.969] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b41020] width 1920 pitch 7680 (/4 1920)
>[ 41466.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41467.016] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41467.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b41020]
>[ 41467.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b41020] width 1920 pitch 7680 (/4 1920)
>[ 41467.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a97be0]
>[ 41467.218] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a97be0] width 1920 pitch 7680 (/4 1920)
>[ 41474.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbe1c0]
>[ 41474.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbe1c0] width 1920 pitch 7680 (/4 1920)
>[ 41487.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b03f90]
>[ 41487.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b03f90] width 1920 pitch 7680 (/4 1920)
>[ 41496.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c13000]
>[ 41496.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c13000] width 1920 pitch 7680 (/4 1920)
>[ 41496.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41496.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41496.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a1e6a0]
>[ 41496.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a1e6a0] width 1920 pitch 7680 (/4 1920)
>[ 41496.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41496.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41496.479] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a1e6a0]
>[ 41496.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a1e6a0] width 1920 pitch 7680 (/4 1920)
>[ 41496.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41496.508] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41496.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a1e6a0]
>[ 41496.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a1e6a0] width 1920 pitch 7680 (/4 1920)
>[ 41496.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636d10]
>[ 41496.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636d10] width 1920 pitch 7680 (/4 1920)
>[ 41496.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b04a00]
>[ 41496.592] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b04a00] width 1920 pitch 7680 (/4 1920)
>[ 41496.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbdff0]
>[ 41496.642] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbdff0] width 1920 pitch 7680 (/4 1920)
>[ 41500.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa71c0]
>[ 41500.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa71c0] width 1920 pitch 7680 (/4 1920)
>[ 41517.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b21c50]
>[ 41517.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b21c50] width 1920 pitch 7680 (/4 1920)
>[ 41577.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a65560]
>[ 41577.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a65560] width 1920 pitch 7680 (/4 1920)
>[ 41592.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3e520]
>[ 41592.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3e520] width 1920 pitch 7680 (/4 1920)
>[ 41594.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8e320]
>[ 41594.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8e320] width 1920 pitch 7680 (/4 1920)
>[ 41594.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3e520]
>[ 41594.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3e520] width 1920 pitch 7680 (/4 1920)
>[ 41594.828] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8e320]
>[ 41594.854] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8e320] width 1920 pitch 7680 (/4 1920)
>[ 41594.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b3e520]
>[ 41594.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b3e520] width 1920 pitch 7680 (/4 1920)
>[ 41594.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a0b170]
>[ 41594.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a0b170] width 1920 pitch 7680 (/4 1920)
>[ 41595.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ad5ac0]
>[ 41595.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ad5ac0] width 1920 pitch 7680 (/4 1920)
>[ 41595.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ad5ac0]
>[ 41595.172] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ad5ac0] width 1920 pitch 7680 (/4 1920)
>[ 41595.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa564410]
>[ 41595.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa564410] width 1920 pitch 7680 (/4 1920)
>[ 41595.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d418a0]
>[ 41595.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d418a0] width 1920 pitch 7680 (/4 1920)
>[ 41595.649] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa564410]
>[ 41595.672] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa564410] width 1920 pitch 7680 (/4 1920)
>[ 41595.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d418a0]
>[ 41595.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d418a0] width 1920 pitch 7680 (/4 1920)
>[ 41596.097] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8e320]
>[ 41596.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8e320] width 1920 pitch 7680 (/4 1920)
>[ 41596.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a8e320]
>[ 41596.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a8e320] width 1920 pitch 7680 (/4 1920)
>[ 41596.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a620b0]
>[ 41596.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a620b0] width 1920 pitch 7680 (/4 1920)
>[ 41596.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4f500]
>[ 41596.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4f500] width 1920 pitch 7680 (/4 1920)
>[ 41596.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a620b0]
>[ 41596.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a620b0] width 1920 pitch 7680 (/4 1920)
>[ 41596.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222bdc0]
>[ 41596.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222bdc0] width 1920 pitch 7680 (/4 1920)
>[ 41607.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484f4a0]
>[ 41607.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484f4a0] width 1920 pitch 7680 (/4 1920)
>[ 41620.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b73510]
>[ 41620.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b73510] width 1920 pitch 7680 (/4 1920)
>[ 41622.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56d350]
>[ 41622.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56d350] width 1920 pitch 7680 (/4 1920)
>[ 41637.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f31960]
>[ 41637.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f31960] width 1920 pitch 7680 (/4 1920)
>[ 41643.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56d350]
>[ 41643.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56d350] width 1920 pitch 7680 (/4 1920)
>[ 41644.047] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e7cb80]
>[ 41644.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e7cb80] width 1920 pitch 7680 (/4 1920)
>[ 41644.813] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4949c90]
>[ 41644.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4949c90] width 1920 pitch 7680 (/4 1920)
>[ 41644.918] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242e80]
>[ 41644.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242e80] width 1920 pitch 7680 (/4 1920)
>[ 41644.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a0b0a0]
>[ 41644.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a0b0a0] width 1920 pitch 7680 (/4 1920)
>[ 41645.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242e80]
>[ 41645.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242e80] width 1920 pitch 7680 (/4 1920)
>[ 41652.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa564410]
>[ 41652.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa564410] width 1920 pitch 7680 (/4 1920)
>[ 41654.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56f180]
>[ 41654.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56f180] width 1920 pitch 7680 (/4 1920)
>[ 41667.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa53bbd0]
>[ 41667.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa53bbd0] width 1920 pitch 7680 (/4 1920)
>[ 41682.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4acbbe0]
>[ 41682.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4acbbe0] width 1920 pitch 7680 (/4 1920)
>[ 41684.709] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4acbbe0]
>[ 41684.727] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4acbbe0] width 1920 pitch 7680 (/4 1920)
>[ 41684.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aca940]
>[ 41684.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aca940] width 1920 pitch 7680 (/4 1920)
>[ 41684.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242e80]
>[ 41684.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242e80] width 1920 pitch 7680 (/4 1920)
>[ 41684.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aca940]
>[ 41684.977] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aca940] width 1920 pitch 7680 (/4 1920)
>[ 41716.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bceb60]
>[ 41716.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bceb60] width 1920 pitch 7680 (/4 1920)
>[ 41716.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f1bcc0]
>[ 41716.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f1bcc0] width 1920 pitch 7680 (/4 1920)
>[ 41716.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222bdc0]
>[ 41716.169] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222bdc0] width 1920 pitch 7680 (/4 1920)
>[ 41716.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f1bcc0]
>[ 41716.286] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f1bcc0] width 1920 pitch 7680 (/4 1920)
>[ 41723.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e86460]
>[ 41723.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e86460] width 1920 pitch 7680 (/4 1920)
>[ 41727.314] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa563100]
>[ 41727.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa563100] width 1920 pitch 7680 (/4 1920)
>[ 41727.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa563100]
>[ 41727.395] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa563100] width 1920 pitch 7680 (/4 1920)
>[ 41727.420] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3ec30]
>[ 41727.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3ec30] width 1920 pitch 7680 (/4 1920)
>[ 41727.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa563100]
>[ 41727.595] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa563100] width 1920 pitch 7680 (/4 1920)
>[ 41731.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef1c30]
>[ 41731.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef1c30] width 1920 pitch 7680 (/4 1920)
>[ 41739.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c1b3a0]
>[ 41739.350] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c1b3a0] width 1920 pitch 7680 (/4 1920)
>[ 41739.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630180]
>[ 41739.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630180] width 1920 pitch 7680 (/4 1920)
>[ 41739.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 41739.405] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 41739.408] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630180]
>[ 41739.422] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630180] width 1920 pitch 7680 (/4 1920)
>[ 41739.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 41739.438] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 41739.442] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630180]
>[ 41739.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630180] width 1920 pitch 7680 (/4 1920)
>[ 41739.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 41739.472] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 41739.475] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630180]
>[ 41739.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630180] width 1920 pitch 7680 (/4 1920)
>[ 41739.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 41739.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 41739.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630180]
>[ 41739.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630180] width 1920 pitch 7680 (/4 1920)
>[ 41739.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463a590]
>[ 41739.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463a590] width 1920 pitch 7680 (/4 1920)
>[ 41750.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c65d60]
>[ 41750.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c65d60] width 1920 pitch 7680 (/4 1920)
>[ 41758.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d4dab0]
>[ 41758.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d4dab0] width 1920 pitch 7680 (/4 1920)
>[ 41758.073] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 41758.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 41758.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc2cd0]
>[ 41758.121] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc2cd0] width 1920 pitch 7680 (/4 1920)
>[ 41758.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 41758.137] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 41758.139] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc2cd0]
>[ 41758.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc2cd0] width 1920 pitch 7680 (/4 1920)
>[ 41758.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 41758.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 41758.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc2cd0]
>[ 41758.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc2cd0] width 1920 pitch 7680 (/4 1920)
>[ 41758.190] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 41758.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 41758.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc2cd0]
>[ 41758.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc2cd0] width 1920 pitch 7680 (/4 1920)
>[ 41758.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 41758.237] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 41758.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc2cd0]
>[ 41758.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc2cd0] width 1920 pitch 7680 (/4 1920)
>[ 41758.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c0c490]
>[ 41758.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c0c490] width 1920 pitch 7680 (/4 1920)
>[ 41762.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ad7ae0]
>[ 41762.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ad7ae0] width 1920 pitch 7680 (/4 1920)
>[ 41802.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d48330]
>[ 41802.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d48330] width 1920 pitch 7680 (/4 1920)
>[ 41817.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d483d0]
>[ 41817.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d483d0] width 1920 pitch 7680 (/4 1920)
>[ 41847.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef21d0]
>[ 41847.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef21d0] width 1920 pitch 7680 (/4 1920)
>[ 41862.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4acf290]
>[ 41862.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4acf290] width 1920 pitch 7680 (/4 1920)
>[ 41982.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9a590]
>[ 41982.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9a590] width 1920 pitch 7680 (/4 1920)
>[ 41997.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b042a0]
>[ 41997.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b042a0] width 1920 pitch 7680 (/4 1920)
>[ 42011.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e7d8e0]
>[ 42011.175] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e7d8e0] width 1920 pitch 7680 (/4 1920)
>[ 42011.213] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4950e50]
>[ 42011.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4950e50] width 1920 pitch 7680 (/4 1920)
>[ 42011.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5a70]
>[ 42011.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5a70] width 1920 pitch 7680 (/4 1920)
>[ 42011.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0ee0]
>[ 42011.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0ee0] width 1920 pitch 7680 (/4 1920)
>[ 42011.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484f4a0]
>[ 42011.493] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484f4a0] width 1920 pitch 7680 (/4 1920)
>[ 42015.589] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56d350]
>[ 42015.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56d350] width 1920 pitch 7680 (/4 1920)
>[ 42015.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa79a0]
>[ 42015.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa79a0] width 1920 pitch 7680 (/4 1920)
>[ 42015.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1fe10]
>[ 42015.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1fe10] width 1920 pitch 7680 (/4 1920)
>[ 42015.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484f4a0]
>[ 42015.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484f4a0] width 1920 pitch 7680 (/4 1920)
>[ 42060.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240760]
>[ 42060.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240760] width 1920 pitch 7680 (/4 1920)
>[ 42060.680] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c0f4e0]
>[ 42060.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c0f4e0] width 1920 pitch 7680 (/4 1920)
>[ 42060.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e75380]
>[ 42060.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e75380] width 1920 pitch 7680 (/4 1920)
>[ 42060.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c45a10]
>[ 42060.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c45a10] width 1920 pitch 7680 (/4 1920)
>[ 42060.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbc5c0]
>[ 42060.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbc5c0] width 1920 pitch 7680 (/4 1920)
>[ 42060.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c45a10]
>[ 42060.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c45a10] width 1920 pitch 7680 (/4 1920)
>[ 42060.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a96380]
>[ 42060.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a96380] width 1920 pitch 7680 (/4 1920)
>[ 42061.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48442f0]
>[ 42061.079] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48442f0] width 1920 pitch 7680 (/4 1920)
>[ 42061.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa5ea0]
>[ 42061.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa5ea0] width 1920 pitch 7680 (/4 1920)
>[ 42061.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ede460]
>[ 42061.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ede460] width 1920 pitch 7680 (/4 1920)
>[ 42061.626] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa562750]
>[ 42061.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa562750] width 1920 pitch 7680 (/4 1920)
>[ 42061.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f16560]
>[ 42061.989] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f16560] width 1920 pitch 7680 (/4 1920)
>[ 42062.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13a70]
>[ 42062.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13a70] width 1920 pitch 7680 (/4 1920)
>[ 42062.058] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d418a0]
>[ 42062.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d418a0] width 1920 pitch 7680 (/4 1920)
>[ 42062.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13a70]
>[ 42062.117] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13a70] width 1920 pitch 7680 (/4 1920)
>[ 42062.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be4320]
>[ 42062.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be4320] width 1920 pitch 7680 (/4 1920)
>[ 42062.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13a70]
>[ 42062.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13a70] width 1920 pitch 7680 (/4 1920)
>[ 42062.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be4320]
>[ 42062.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be4320] width 1920 pitch 7680 (/4 1920)
>[ 42072.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x196ada0]
>[ 42072.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x196ada0] width 1920 pitch 7680 (/4 1920)
>[ 42087.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463da10]
>[ 42087.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463da10] width 1920 pitch 7680 (/4 1920)
>[ 42097.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f31db0]
>[ 42097.244] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f31db0] width 1920 pitch 7680 (/4 1920)
>[ 42102.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d4bc50]
>[ 42102.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d4bc50] width 1920 pitch 7680 (/4 1920)
>[ 42112.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0fd70]
>[ 42112.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0fd70] width 1920 pitch 7680 (/4 1920)
>[ 42112.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6ea70]
>[ 42112.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6ea70] width 1920 pitch 7680 (/4 1920)
>[ 42112.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa562750]
>[ 42112.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa562750] width 1920 pitch 7680 (/4 1920)
>[ 42112.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6ea70]
>[ 42112.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6ea70] width 1920 pitch 7680 (/4 1920)
>[ 42112.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa562750]
>[ 42112.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa562750] width 1920 pitch 7680 (/4 1920)
>[ 42112.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6ea70]
>[ 42112.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6ea70] width 1920 pitch 7680 (/4 1920)
>[ 42112.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa562750]
>[ 42112.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa562750] width 1920 pitch 7680 (/4 1920)
>[ 42112.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6ea70]
>[ 42112.507] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6ea70] width 1920 pitch 7680 (/4 1920)
>[ 42112.509] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa562750]
>[ 42112.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa562750] width 1920 pitch 7680 (/4 1920)
>[ 42112.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6ea70]
>[ 42112.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6ea70] width 1920 pitch 7680 (/4 1920)
>[ 42112.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa562750]
>[ 42112.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa562750] width 1920 pitch 7680 (/4 1920)
>[ 42112.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d6ea70]
>[ 42112.640] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d6ea70] width 1920 pitch 7680 (/4 1920)
>[ 42127.957] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4636880]
>[ 42127.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4636880] width 1920 pitch 7680 (/4 1920)
>[ 42132.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e49a70]
>[ 42132.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e49a70] width 1920 pitch 7680 (/4 1920)
>[ 42147.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e17770]
>[ 42147.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e17770] width 1920 pitch 7680 (/4 1920)
>[ 42162.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aec570]
>[ 42162.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aec570] width 1920 pitch 7680 (/4 1920)
>[ 42177.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4647270]
>[ 42177.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4647270] width 1920 pitch 7680 (/4 1920)
>[ 42192.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2235b90]
>[ 42192.038] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2235b90] width 1920 pitch 7680 (/4 1920)
>[ 42207.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b6ecc0]
>[ 42207.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b6ecc0] width 1920 pitch 7680 (/4 1920)
>[ 42222.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4af2250]
>[ 42222.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4af2250] width 1920 pitch 7680 (/4 1920)
>[ 42330.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d0d650]
>[ 42330.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d0d650] width 1920 pitch 7680 (/4 1920)
>[ 42330.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48504f0]
>[ 42330.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48504f0] width 1920 pitch 7680 (/4 1920)
>[ 42330.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ede460]
>[ 42330.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ede460] width 1920 pitch 7680 (/4 1920)
>[ 42330.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48504f0]
>[ 42330.783] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48504f0] width 1920 pitch 7680 (/4 1920)
>[ 42348.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4632770]
>[ 42348.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4632770] width 1920 pitch 7680 (/4 1920)
>[ 42402.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e7f840]
>[ 42402.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e7f840] width 1920 pitch 7680 (/4 1920)
>[ 42417.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e22ed0]
>[ 42417.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e22ed0] width 1920 pitch 7680 (/4 1920)
>[ 42462.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d4e9e0]
>[ 42462.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d4e9e0] width 1920 pitch 7680 (/4 1920)
>[ 42492.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a56650]
>[ 42492.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a56650] width 1920 pitch 7680 (/4 1920)
>[ 42507.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a9b8c0]
>[ 42507.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a9b8c0] width 1920 pitch 7680 (/4 1920)
>[ 42537.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4968c90]
>[ 42537.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4968c90] width 1920 pitch 7680 (/4 1920)
>[ 42552.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be5530]
>[ 42552.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be5530] width 1920 pitch 7680 (/4 1920)
>[ 42612.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbcd10]
>[ 42612.060] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbcd10] width 1920 pitch 7680 (/4 1920)
>[ 42620.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac3740]
>[ 42620.934] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac3740] width 1920 pitch 7680 (/4 1920)
>[ 42620.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a4c40]
>[ 42621.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a4c40] width 1920 pitch 7680 (/4 1920)
>[ 42621.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac3740]
>[ 42621.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac3740] width 1920 pitch 7680 (/4 1920)
>[ 42621.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a4c40]
>[ 42621.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a4c40] width 1920 pitch 7680 (/4 1920)
>[ 42627.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee4fa0]
>[ 42627.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee4fa0] width 1920 pitch 7680 (/4 1920)
>[ 42642.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbc010]
>[ 42642.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbc010] width 1920 pitch 7680 (/4 1920)
>[ 42657.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5c3080]
>[ 42657.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5c3080] width 1920 pitch 7680 (/4 1920)
>[ 42672.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aef410]
>[ 42672.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aef410] width 1920 pitch 7680 (/4 1920)
>[ 42702.057] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdea60]
>[ 42702.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdea60] width 1920 pitch 7680 (/4 1920)
>[ 42717.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e78190]
>[ 42717.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e78190] width 1920 pitch 7680 (/4 1920)
>[ 42732.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af5730]
>[ 42732.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af5730] width 1920 pitch 7680 (/4 1920)
>[ 42746.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e71340]
>[ 42746.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e71340] width 1920 pitch 7680 (/4 1920)
>[ 42747.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226b3e0]
>[ 42747.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226b3e0] width 1920 pitch 7680 (/4 1920)
>[ 42759.529] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac7490]
>[ 42759.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac7490] width 1920 pitch 7680 (/4 1920)
>[ 42759.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef68c0]
>[ 42759.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef68c0] width 1920 pitch 7680 (/4 1920)
>[ 42759.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aea660]
>[ 42759.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aea660] width 1920 pitch 7680 (/4 1920)
>[ 42762.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5d2c0]
>[ 42762.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5d2c0] width 1920 pitch 7680 (/4 1920)
>[ 42767.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa54d320]
>[ 42767.141] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa54d320] width 1920 pitch 7680 (/4 1920)
>[ 42771.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac73f0]
>[ 42771.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac73f0] width 1920 pitch 7680 (/4 1920)
>[ 42771.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa54d320]
>[ 42771.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa54d320] width 1920 pitch 7680 (/4 1920)
>[ 42771.907] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d3430]
>[ 42771.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d3430] width 1920 pitch 7680 (/4 1920)
>[ 42771.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42771.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42771.997] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c06450]
>[ 42772.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c06450] width 1920 pitch 7680 (/4 1920)
>[ 42772.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42772.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42772.105] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42772.106] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42772.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42772.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42772.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42772.658] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42772.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c06450]
>[ 42772.708] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c06450] width 1920 pitch 7680 (/4 1920)
>[ 42772.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42772.775] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42772.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c06450]
>[ 42772.891] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c06450] width 1920 pitch 7680 (/4 1920)
>[ 42773.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4832c50]
>[ 42773.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4832c50] width 1920 pitch 7680 (/4 1920)
>[ 42773.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bb96c0]
>[ 42773.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bb96c0] width 1920 pitch 7680 (/4 1920)
>[ 42773.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a4aa80]
>[ 42773.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a4aa80] width 1920 pitch 7680 (/4 1920)
>[ 42773.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e56180]
>[ 42773.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e56180] width 1920 pitch 7680 (/4 1920)
>[ 42773.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a4aa80]
>[ 42773.524] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a4aa80] width 1920 pitch 7680 (/4 1920)
>[ 42773.527] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3f5a0]
>[ 42773.558] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3f5a0] width 1920 pitch 7680 (/4 1920)
>[ 42773.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a4aa80]
>[ 42773.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a4aa80] width 1920 pitch 7680 (/4 1920)
>[ 42779.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 42779.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 42779.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48452b0]
>[ 42779.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48452b0] width 1920 pitch 7680 (/4 1920)
>[ 42779.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4f500]
>[ 42779.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4f500] width 1920 pitch 7680 (/4 1920)
>[ 42780.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x48452b0]
>[ 42780.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x48452b0] width 1920 pitch 7680 (/4 1920)
>[ 42787.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4967970]
>[ 42787.691] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4967970] width 1920 pitch 7680 (/4 1920)
>[ 42804.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac87c0]
>[ 42804.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac87c0] width 1920 pitch 7680 (/4 1920)
>[ 42804.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be14a0]
>[ 42804.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be14a0] width 1920 pitch 7680 (/4 1920)
>[ 42804.638] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa56c6c0]
>[ 42804.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa56c6c0] width 1920 pitch 7680 (/4 1920)
>[ 42804.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be14a0]
>[ 42804.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be14a0] width 1920 pitch 7680 (/4 1920)
>[ 42807.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4957010]
>[ 42807.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4957010] width 1920 pitch 7680 (/4 1920)
>[ 42819.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e62d60]
>[ 42819.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e62d60] width 1920 pitch 7680 (/4 1920)
>[ 42819.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c26170]
>[ 42819.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c26170] width 1920 pitch 7680 (/4 1920)
>[ 42819.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a49b0]
>[ 42819.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a49b0] width 1920 pitch 7680 (/4 1920)
>[ 42819.672] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4848ed0]
>[ 42819.695] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4848ed0] width 1920 pitch 7680 (/4 1920)
>[ 42826.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef4200]
>[ 42826.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef4200] width 1920 pitch 7680 (/4 1920)
>[ 42837.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493fad0]
>[ 42837.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493fad0] width 1920 pitch 7680 (/4 1920)
>[ 42867.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96170]
>[ 42867.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96170] width 1920 pitch 7680 (/4 1920)
>[ 42867.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9d100]
>[ 42867.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9d100] width 1920 pitch 7680 (/4 1920)
>[ 42882.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0100]
>[ 42882.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0100] width 1920 pitch 7680 (/4 1920)
>[ 42897.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a18ae0]
>[ 42897.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a18ae0] width 1920 pitch 7680 (/4 1920)
>[ 42898.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9d080]
>[ 42898.959] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9d080] width 1920 pitch 7680 (/4 1920)
>[ 42912.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x495ffe0]
>[ 42912.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x495ffe0] width 1920 pitch 7680 (/4 1920)
>[ 42922.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4961aa0]
>[ 42922.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4961aa0] width 1920 pitch 7680 (/4 1920)
>[ 42922.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0100]
>[ 42922.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0100] width 1920 pitch 7680 (/4 1920)
>[ 42922.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7b7d0]
>[ 42922.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7b7d0] width 1920 pitch 7680 (/4 1920)
>[ 42922.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0100]
>[ 42922.361] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0100] width 1920 pitch 7680 (/4 1920)
>[ 42922.364] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7b7d0]
>[ 42922.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7b7d0] width 1920 pitch 7680 (/4 1920)
>[ 42922.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0100]
>[ 42922.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0100] width 1920 pitch 7680 (/4 1920)
>[ 42922.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7b7d0]
>[ 42922.428] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7b7d0] width 1920 pitch 7680 (/4 1920)
>[ 42922.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0100]
>[ 42922.445] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0100] width 1920 pitch 7680 (/4 1920)
>[ 42922.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7b7d0]
>[ 42922.479] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7b7d0] width 1920 pitch 7680 (/4 1920)
>[ 42922.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0100]
>[ 42922.512] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0100] width 1920 pitch 7680 (/4 1920)
>[ 42922.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7b7d0]
>[ 42922.545] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7b7d0] width 1920 pitch 7680 (/4 1920)
>[ 42927.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x494c2f0]
>[ 42927.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x494c2f0] width 1920 pitch 7680 (/4 1920)
>[ 42927.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a9d080]
>[ 42927.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a9d080] width 1920 pitch 7680 (/4 1920)
>[ 42933.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4926780]
>[ 42933.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4926780] width 1920 pitch 7680 (/4 1920)
>[ 42942.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be7d30]
>[ 42942.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be7d30] width 1920 pitch 7680 (/4 1920)
>[ 42957.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e82360]
>[ 42957.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e82360] width 1920 pitch 7680 (/4 1920)
>[ 42957.228] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4abd980]
>[ 42957.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4abd980] width 1920 pitch 7680 (/4 1920)
>[ 42971.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa54cba0]
>[ 42971.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa54cba0] width 1920 pitch 7680 (/4 1920)
>[ 42971.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493c490]
>[ 42971.618] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493c490] width 1920 pitch 7680 (/4 1920)
>[ 42971.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648cc0]
>[ 42971.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648cc0] width 1920 pitch 7680 (/4 1920)
>[ 42971.655] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493c490]
>[ 42971.685] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493c490] width 1920 pitch 7680 (/4 1920)
>[ 42971.688] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648cc0]
>[ 42971.718] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648cc0] width 1920 pitch 7680 (/4 1920)
>[ 42971.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493c490]
>[ 42971.751] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493c490] width 1920 pitch 7680 (/4 1920)
>[ 42971.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648cc0]
>[ 42971.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648cc0] width 1920 pitch 7680 (/4 1920)
>[ 42971.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493c490]
>[ 42971.785] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493c490] width 1920 pitch 7680 (/4 1920)
>[ 42971.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4648cc0]
>[ 42971.851] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4648cc0] width 1920 pitch 7680 (/4 1920)
>[ 42977.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b6a5f0]
>[ 42977.289] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b6a5f0] width 1920 pitch 7680 (/4 1920)
>[ 42977.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e56180]
>[ 42977.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e56180] width 1920 pitch 7680 (/4 1920)
>[ 42977.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e80d70]
>[ 42977.372] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e80d70] width 1920 pitch 7680 (/4 1920)
>[ 42977.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b484a0]
>[ 42977.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b484a0] width 1920 pitch 7680 (/4 1920)
>[ 42977.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493c490]
>[ 42977.425] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493c490] width 1920 pitch 7680 (/4 1920)
>[ 42977.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abb3d0]
>[ 42977.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abb3d0] width 1920 pitch 7680 (/4 1920)
>[ 42977.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac26a0]
>[ 42977.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac26a0] width 1920 pitch 7680 (/4 1920)
>[ 42977.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ade650]
>[ 42977.539] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ade650] width 1920 pitch 7680 (/4 1920)
>[ 42977.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c29420]
>[ 42977.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c29420] width 1920 pitch 7680 (/4 1920)
>[ 42987.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 42987.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 42988.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493a630]
>[ 42988.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493a630] width 1920 pitch 7680 (/4 1920)
>[ 42992.373] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4af9730]
>[ 42992.385] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4af9730] width 1920 pitch 7680 (/4 1920)
>[ 42992.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 42992.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 42992.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf0f0]
>[ 42992.518] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf0f0] width 1920 pitch 7680 (/4 1920)
>[ 42992.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5d2c0]
>[ 42992.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5d2c0] width 1920 pitch 7680 (/4 1920)
>[ 42996.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4925590]
>[ 42996.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4925590] width 1920 pitch 7680 (/4 1920)
>[ 43003.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d2c40]
>[ 43003.777] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d2c40] width 1920 pitch 7680 (/4 1920)
>[ 43003.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43003.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43003.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43003.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43004.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ecfbe0]
>[ 43004.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ecfbe0] width 1920 pitch 7680 (/4 1920)
>[ 43010.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac75a0]
>[ 43010.643] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac75a0] width 1920 pitch 7680 (/4 1920)
>[ 43013.911] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4edc10]
>[ 43013.935] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4edc10] width 1920 pitch 7680 (/4 1920)
>[ 43013.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 43014.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 43014.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee4fa0]
>[ 43014.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee4fa0] width 1920 pitch 7680 (/4 1920)
>[ 43014.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 43014.186] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 43015.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43015.136] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43015.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43015.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43015.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43015.220] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43015.230] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43015.253] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43015.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43015.287] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43015.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43015.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43015.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43015.387] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43015.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43015.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43015.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43015.954] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43016.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43016.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43016.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43016.187] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43016.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242180]
>[ 43016.238] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242180] width 1920 pitch 7680 (/4 1920)
>[ 43016.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4120]
>[ 43016.454] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4120] width 1920 pitch 7680 (/4 1920)
>[ 43016.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7f00]
>[ 43016.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7f00] width 1920 pitch 7680 (/4 1920)
>[ 43016.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13a70]
>[ 43016.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13a70] width 1920 pitch 7680 (/4 1920)
>[ 43016.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252da0]
>[ 43016.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252da0] width 1920 pitch 7680 (/4 1920)
>[ 43016.927] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13a70]
>[ 43016.955] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13a70] width 1920 pitch 7680 (/4 1920)
>[ 43016.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252da0]
>[ 43016.988] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252da0] width 1920 pitch 7680 (/4 1920)
>[ 43016.990] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e13a70]
>[ 43017.004] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e13a70] width 1920 pitch 7680 (/4 1920)
>[ 43017.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252da0]
>[ 43017.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252da0] width 1920 pitch 7680 (/4 1920)
>[ 43020.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee1d70]
>[ 43020.491] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee1d70] width 1920 pitch 7680 (/4 1920)
>[ 43020.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e85c00]
>[ 43020.674] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e85c00] width 1920 pitch 7680 (/4 1920)
>[ 43029.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b06430]
>[ 43029.574] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b06430] width 1920 pitch 7680 (/4 1920)
>[ 43035.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252da0]
>[ 43035.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252da0] width 1920 pitch 7680 (/4 1920)
>[ 43035.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223a2a0]
>[ 43035.788] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223a2a0] width 1920 pitch 7680 (/4 1920)
>[ 43035.793] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5a70]
>[ 43035.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5a70] width 1920 pitch 7680 (/4 1920)
>[ 43035.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 43035.837] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 43035.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5a70]
>[ 43035.853] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5a70] width 1920 pitch 7680 (/4 1920)
>[ 43035.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 43035.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 43035.873] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5a70]
>[ 43035.887] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5a70] width 1920 pitch 7680 (/4 1920)
>[ 43035.894] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 43035.920] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 43035.923] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee5a70]
>[ 43035.936] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee5a70] width 1920 pitch 7680 (/4 1920)
>[ 43035.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 43035.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 43041.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4957cf0]
>[ 43041.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4957cf0] width 1920 pitch 7680 (/4 1920)
>[ 43047.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4946be0]
>[ 43047.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4946be0] width 1920 pitch 7680 (/4 1920)
>[ 43053.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x485a340]
>[ 43053.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x485a340] width 1920 pitch 7680 (/4 1920)
>[ 43053.560] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b268a0]
>[ 43053.585] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b268a0] width 1920 pitch 7680 (/4 1920)
>[ 43053.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e69f0]
>[ 43053.634] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e69f0] width 1920 pitch 7680 (/4 1920)
>[ 43053.756] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef68c0]
>[ 43053.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef68c0] width 1920 pitch 7680 (/4 1920)
>[ 43057.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bb9a20]
>[ 43057.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bb9a20] width 1920 pitch 7680 (/4 1920)
>[ 43065.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac70b0]
>[ 43065.743] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac70b0] width 1920 pitch 7680 (/4 1920)
>[ 43065.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 43065.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 43065.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463d840]
>[ 43065.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463d840] width 1920 pitch 7680 (/4 1920)
>[ 43065.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 43065.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 43065.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463d840]
>[ 43065.828] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463d840] width 1920 pitch 7680 (/4 1920)
>[ 43065.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 43065.844] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 43065.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463d840]
>[ 43065.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463d840] width 1920 pitch 7680 (/4 1920)
>[ 43065.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 43065.877] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 43065.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463d840]
>[ 43065.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463d840] width 1920 pitch 7680 (/4 1920)
>[ 43065.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1efd380]
>[ 43065.927] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1efd380] width 1920 pitch 7680 (/4 1920)
>[ 43065.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x463d840]
>[ 43065.994] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x463d840] width 1920 pitch 7680 (/4 1920)
>[ 43072.642] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bfae00]
>[ 43072.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bfae00] width 1920 pitch 7680 (/4 1920)
>[ 43092.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ac2030]
>[ 43092.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ac2030] width 1920 pitch 7680 (/4 1920)
>[ 43107.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c3aa40]
>[ 43107.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c3aa40] width 1920 pitch 7680 (/4 1920)
>[ 43120.962] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4925190]
>[ 43120.972] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4925190] width 1920 pitch 7680 (/4 1920)
>[ 43122.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc3d00]
>[ 43122.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc3d00] width 1920 pitch 7680 (/4 1920)
>[ 43137.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b4a790]
>[ 43137.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b4a790] width 1920 pitch 7680 (/4 1920)
>[ 43152.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b4a790]
>[ 43152.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b4a790] width 1920 pitch 7680 (/4 1920)
>[ 43167.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49e9000]
>[ 43167.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49e9000] width 1920 pitch 7680 (/4 1920)
>[ 43182.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc9360]
>[ 43182.021] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc9360] width 1920 pitch 7680 (/4 1920)
>[ 43197.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae40e0]
>[ 43197.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae40e0] width 1920 pitch 7680 (/4 1920)
>[ 43212.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae40e0]
>[ 43212.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae40e0] width 1920 pitch 7680 (/4 1920)
>[ 43227.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae40e0]
>[ 43227.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae40e0] width 1920 pitch 7680 (/4 1920)
>[ 43234.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e358b0]
>[ 43234.271] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e358b0] width 1920 pitch 7680 (/4 1920)
>[ 43234.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7fce0]
>[ 43234.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7fce0] width 1920 pitch 7680 (/4 1920)
>[ 43234.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43234.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43234.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b03580]
>[ 43234.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b03580] width 1920 pitch 7680 (/4 1920)
>[ 43234.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 43234.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 43234.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b03580]
>[ 43234.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b03580] width 1920 pitch 7680 (/4 1920)
>[ 43234.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 43234.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 43234.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b03580]
>[ 43234.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b03580] width 1920 pitch 7680 (/4 1920)
>[ 43234.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ab2080]
>[ 43234.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ab2080] width 1920 pitch 7680 (/4 1920)
>[ 43234.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b03580]
>[ 43234.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b03580] width 1920 pitch 7680 (/4 1920)
>[ 43266.912] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4964ac0]
>[ 43266.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4964ac0] width 1920 pitch 7680 (/4 1920)
>[ 43272.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac20c0]
>[ 43272.044] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac20c0] width 1920 pitch 7680 (/4 1920)
>[ 43275.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdb2b0]
>[ 43275.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdb2b0] width 1920 pitch 7680 (/4 1920)
>[ 43275.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ad3790]
>[ 43275.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ad3790] width 1920 pitch 7680 (/4 1920)
>[ 43275.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43275.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43275.621] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ad3790]
>[ 43275.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ad3790] width 1920 pitch 7680 (/4 1920)
>[ 43275.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43275.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43287.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4710]
>[ 43287.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4710] width 1920 pitch 7680 (/4 1920)
>[ 43302.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d3c510]
>[ 43302.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d3c510] width 1920 pitch 7680 (/4 1920)
>[ 43317.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2233070]
>[ 43317.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2233070] width 1920 pitch 7680 (/4 1920)
>[ 43332.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7acb0]
>[ 43332.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7acb0] width 1920 pitch 7680 (/4 1920)
>[ 43362.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e913d0]
>[ 43362.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e913d0] width 1920 pitch 7680 (/4 1920)
>[ 43369.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae4800]
>[ 43369.173] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae4800] width 1920 pitch 7680 (/4 1920)
>[ 43369.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7b6c0]
>[ 43369.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7b6c0] width 1920 pitch 7680 (/4 1920)
>[ 43369.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aca940]
>[ 43369.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aca940] width 1920 pitch 7680 (/4 1920)
>[ 43369.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7b6c0]
>[ 43369.223] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7b6c0] width 1920 pitch 7680 (/4 1920)
>[ 43369.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aca940]
>[ 43369.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aca940] width 1920 pitch 7680 (/4 1920)
>[ 43369.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7b6c0]
>[ 43369.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7b6c0] width 1920 pitch 7680 (/4 1920)
>[ 43369.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ecc310]
>[ 43369.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ecc310] width 1920 pitch 7680 (/4 1920)
>[ 43369.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a62c50]
>[ 43369.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a62c50] width 1920 pitch 7680 (/4 1920)
>[ 43369.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43369.340] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43369.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a62c50]
>[ 43369.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a62c50] width 1920 pitch 7680 (/4 1920)
>[ 43369.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43369.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43369.412] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5adfe50]
>[ 43369.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5adfe50] width 1920 pitch 7680 (/4 1920)
>[ 43377.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fa5d0]
>[ 43377.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fa5d0] width 1920 pitch 7680 (/4 1920)
>[ 43392.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4acdd10]
>[ 43392.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4acdd10] width 1920 pitch 7680 (/4 1920)
>[ 43407.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e38b10]
>[ 43407.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e38b10] width 1920 pitch 7680 (/4 1920)
>[ 43421.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d2320]
>[ 43421.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d2320] width 1920 pitch 7680 (/4 1920)
>[ 43458.033] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4968ce0]
>[ 43458.067] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4968ce0] width 1920 pitch 7680 (/4 1920)
>[ 43458.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43458.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43458.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43458.112] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43458.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43458.128] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43458.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43458.145] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43458.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43458.162] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43458.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43458.178] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43458.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43458.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43458.197] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43458.212] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43458.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43458.228] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43458.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262320]
>[ 43458.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262320] width 1920 pitch 7680 (/4 1920)
>[ 43458.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2220800]
>[ 43458.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2220800] width 1920 pitch 7680 (/4 1920)
>[ 43497.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d25820]
>[ 43497.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d25820] width 1920 pitch 7680 (/4 1920)
>[ 43497.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bb8d90]
>[ 43497.861] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bb8d90] width 1920 pitch 7680 (/4 1920)
>[ 43512.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1cfc8a0]
>[ 43512.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1cfc8a0] width 1920 pitch 7680 (/4 1920)
>[ 43527.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5abb3d0]
>[ 43527.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5abb3d0] width 1920 pitch 7680 (/4 1920)
>[ 43557.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b484a0]
>[ 43557.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b484a0] width 1920 pitch 7680 (/4 1920)
>[ 43572.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be14a0]
>[ 43572.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be14a0] width 1920 pitch 7680 (/4 1920)
>[ 43574.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222cf30]
>[ 43574.810] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222cf30] width 1920 pitch 7680 (/4 1920)
>[ 43587.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224bc70]
>[ 43587.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224bc70] width 1920 pitch 7680 (/4 1920)
>[ 43602.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa4330]
>[ 43602.045] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa4330] width 1920 pitch 7680 (/4 1920)
>[ 43602.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49d3110]
>[ 43602.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49d3110] width 1920 pitch 7680 (/4 1920)
>[ 43632.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4645aa0]
>[ 43632.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4645aa0] width 1920 pitch 7680 (/4 1920)
>[ 43647.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ea4bf0]
>[ 43647.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ea4bf0] width 1920 pitch 7680 (/4 1920)
>[ 43650.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4adfed0]
>[ 43650.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4adfed0] width 1920 pitch 7680 (/4 1920)
>[ 43650.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222f220]
>[ 43650.484] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222f220] width 1920 pitch 7680 (/4 1920)
>[ 43650.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d25820]
>[ 43650.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d25820] width 1920 pitch 7680 (/4 1920)
>[ 43650.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bdf3b0]
>[ 43650.684] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bdf3b0] width 1920 pitch 7680 (/4 1920)
>[ 43662.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7b90]
>[ 43662.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7b90] width 1920 pitch 7680 (/4 1920)
>[ 43662.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e56180]
>[ 43662.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e56180] width 1920 pitch 7680 (/4 1920)
>[ 43677.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bea1e0]
>[ 43677.056] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bea1e0] width 1920 pitch 7680 (/4 1920)
>[ 43692.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e78190]
>[ 43692.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e78190] width 1920 pitch 7680 (/4 1920)
>[ 43696.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf9a0]
>[ 43696.926] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf9a0] width 1920 pitch 7680 (/4 1920)
>[ 43707.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a955c0]
>[ 43707.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a955c0] width 1920 pitch 7680 (/4 1920)
>[ 43722.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630180]
>[ 43722.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630180] width 1920 pitch 7680 (/4 1920)
>[ 43737.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e2ec40]
>[ 43737.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e2ec40] width 1920 pitch 7680 (/4 1920)
>[ 43752.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c1d980]
>[ 43752.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c1d980] width 1920 pitch 7680 (/4 1920)
>[ 43767.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa0ee0]
>[ 43767.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa0ee0] width 1920 pitch 7680 (/4 1920)
>[ 43782.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f4bb0]
>[ 43782.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f4bb0] width 1920 pitch 7680 (/4 1920)
>[ 43827.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831ea0]
>[ 43827.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831ea0] width 1920 pitch 7680 (/4 1920)
>[ 43842.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4abfa70]
>[ 43842.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4abfa70] width 1920 pitch 7680 (/4 1920)
>[ 43857.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c1d980]
>[ 43857.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c1d980] width 1920 pitch 7680 (/4 1920)
>[ 43872.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ea6b30]
>[ 43872.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ea6b30] width 1920 pitch 7680 (/4 1920)
>[ 43887.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7eea0]
>[ 43887.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7eea0] width 1920 pitch 7680 (/4 1920)
>[ 43890.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ed9cc0]
>[ 43890.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ed9cc0] width 1920 pitch 7680 (/4 1920)
>[ 43891.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7880]
>[ 43891.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7880] width 1920 pitch 7680 (/4 1920)
>[ 43902.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d530]
>[ 43902.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d530] width 1920 pitch 7680 (/4 1920)
>[ 43910.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae7880]
>[ 43910.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae7880] width 1920 pitch 7680 (/4 1920)
>[ 43910.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3e510]
>[ 43910.696] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3e510] width 1920 pitch 7680 (/4 1920)
>[ 43910.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c145c0]
>[ 43910.712] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c145c0] width 1920 pitch 7680 (/4 1920)
>[ 43910.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3e510]
>[ 43910.729] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3e510] width 1920 pitch 7680 (/4 1920)
>[ 43910.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c145c0]
>[ 43910.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c145c0] width 1920 pitch 7680 (/4 1920)
>[ 43910.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3e510]
>[ 43910.762] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3e510] width 1920 pitch 7680 (/4 1920)
>[ 43910.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c145c0]
>[ 43910.779] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c145c0] width 1920 pitch 7680 (/4 1920)
>[ 43910.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3e510]
>[ 43910.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3e510] width 1920 pitch 7680 (/4 1920)
>[ 43910.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c145c0]
>[ 43910.812] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c145c0] width 1920 pitch 7680 (/4 1920)
>[ 43910.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3e510]
>[ 43910.829] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3e510] width 1920 pitch 7680 (/4 1920)
>[ 43910.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5c145c0]
>[ 43910.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5c145c0] width 1920 pitch 7680 (/4 1920)
>[ 43911.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43911.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43911.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afa5b0]
>[ 43911.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afa5b0] width 1920 pitch 7680 (/4 1920)
>[ 43911.978] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43912.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43912.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afa5b0]
>[ 43912.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afa5b0] width 1920 pitch 7680 (/4 1920)
>[ 43912.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43912.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43912.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afa5b0]
>[ 43912.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afa5b0] width 1920 pitch 7680 (/4 1920)
>[ 43912.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43912.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43912.309] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afa5b0]
>[ 43912.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afa5b0] width 1920 pitch 7680 (/4 1920)
>[ 43912.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43912.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43912.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afa5b0]
>[ 43912.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afa5b0] width 1920 pitch 7680 (/4 1920)
>[ 43913.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43913.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43913.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afa5b0]
>[ 43913.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afa5b0] width 1920 pitch 7680 (/4 1920)
>[ 43914.530] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d706a0]
>[ 43914.566] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d706a0] width 1920 pitch 7680 (/4 1920)
>[ 43915.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f44180]
>[ 43915.377] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f44180] width 1920 pitch 7680 (/4 1920)
>[ 43915.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1d6a0]
>[ 43915.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1d6a0] width 1920 pitch 7680 (/4 1920)
>[ 43915.447] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc3d40]
>[ 43915.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc3d40] width 1920 pitch 7680 (/4 1920)
>[ 43915.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1d6a0]
>[ 43915.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1d6a0] width 1920 pitch 7680 (/4 1920)
>[ 43915.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc3d40]
>[ 43915.550] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc3d40] width 1920 pitch 7680 (/4 1920)
>[ 43915.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1d6a0]
>[ 43915.583] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1d6a0] width 1920 pitch 7680 (/4 1920)
>[ 43915.587] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bc3d40]
>[ 43915.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bc3d40] width 1920 pitch 7680 (/4 1920)
>[ 43917.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b0a170]
>[ 43917.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b0a170] width 1920 pitch 7680 (/4 1920)
>[ 43932.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d530]
>[ 43932.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d530] width 1920 pitch 7680 (/4 1920)
>[ 43934.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f17e10]
>[ 43934.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f17e10] width 1920 pitch 7680 (/4 1920)
>[ 43934.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f44180]
>[ 43934.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f44180] width 1920 pitch 7680 (/4 1920)
>[ 43934.685] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aa4040]
>[ 43934.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aa4040] width 1920 pitch 7680 (/4 1920)
>[ 43934.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f3dfa0]
>[ 43934.832] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f3dfa0] width 1920 pitch 7680 (/4 1920)
>[ 43947.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c68220]
>[ 43947.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c68220] width 1920 pitch 7680 (/4 1920)
>[ 43962.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4afd410]
>[ 43962.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4afd410] width 1920 pitch 7680 (/4 1920)
>[ 43968.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9910]
>[ 43968.226] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9910] width 1920 pitch 7680 (/4 1920)
>[ 43968.264] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1d6a0]
>[ 43968.276] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1d6a0] width 1920 pitch 7680 (/4 1920)
>[ 43968.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4859f40]
>[ 43968.326] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4859f40] width 1920 pitch 7680 (/4 1920)
>[ 43968.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a12320]
>[ 43968.476] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a12320] width 1920 pitch 7680 (/4 1920)
>[ 43968.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x484b340]
>[ 43968.526] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x484b340] width 1920 pitch 7680 (/4 1920)
>[ 44037.010] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac98e0]
>[ 44037.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac98e0] width 1920 pitch 7680 (/4 1920)
>[ 44040.062] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96170]
>[ 44040.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96170] width 1920 pitch 7680 (/4 1920)
>[ 44040.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228adf0]
>[ 44040.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228adf0] width 1920 pitch 7680 (/4 1920)
>[ 44040.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267140]
>[ 44040.201] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267140] width 1920 pitch 7680 (/4 1920)
>[ 44040.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228adf0]
>[ 44040.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228adf0] width 1920 pitch 7680 (/4 1920)
>[ 44045.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2262fe0]
>[ 44045.442] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2262fe0] width 1920 pitch 7680 (/4 1920)
>[ 44045.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd5f0]
>[ 44045.471] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd5f0] width 1920 pitch 7680 (/4 1920)
>[ 44045.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bd51d0]
>[ 44045.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bd51d0] width 1920 pitch 7680 (/4 1920)
>[ 44045.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd5f0]
>[ 44045.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd5f0] width 1920 pitch 7680 (/4 1920)
>[ 44045.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bd51d0]
>[ 44045.522] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bd51d0] width 1920 pitch 7680 (/4 1920)
>[ 44045.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd5f0]
>[ 44045.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd5f0] width 1920 pitch 7680 (/4 1920)
>[ 44045.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bd51d0]
>[ 44045.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bd51d0] width 1920 pitch 7680 (/4 1920)
>[ 44045.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd5f0]
>[ 44045.572] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd5f0] width 1920 pitch 7680 (/4 1920)
>[ 44045.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bd51d0]
>[ 44045.588] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bd51d0] width 1920 pitch 7680 (/4 1920)
>[ 44045.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd5f0]
>[ 44045.605] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd5f0] width 1920 pitch 7680 (/4 1920)
>[ 44045.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bd51d0]
>[ 44045.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bd51d0] width 1920 pitch 7680 (/4 1920)
>[ 44045.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd5f0]
>[ 44045.705] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd5f0] width 1920 pitch 7680 (/4 1920)
>[ 44052.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22113a0]
>[ 44052.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22113a0] width 1920 pitch 7680 (/4 1920)
>[ 44054.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f25e80]
>[ 44054.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f25e80] width 1920 pitch 7680 (/4 1920)
>[ 44067.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493da90]
>[ 44067.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493da90] width 1920 pitch 7680 (/4 1920)
>[ 44082.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4acbdf0]
>[ 44082.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4acbdf0] width 1920 pitch 7680 (/4 1920)
>[ 44097.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222dae0]
>[ 44097.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222dae0] width 1920 pitch 7680 (/4 1920)
>[ 44119.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a61ba0]
>[ 44119.182] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a61ba0] width 1920 pitch 7680 (/4 1920)
>[ 44119.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d8400]
>[ 44119.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d8400] width 1920 pitch 7680 (/4 1920)
>[ 44119.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b1f0]
>[ 44119.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b1f0] width 1920 pitch 7680 (/4 1920)
>[ 44119.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2282e90]
>[ 44119.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2282e90] width 1920 pitch 7680 (/4 1920)
>[ 44143.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44143.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44143.247] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44143.267] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44143.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44143.301] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44143.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44143.317] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44143.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44143.351] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44143.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44143.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44143.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44143.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44143.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44143.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44143.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44143.501] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44143.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44143.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44144.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44144.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44144.240] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44144.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44144.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44144.568] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44144.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44144.652] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44144.861] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44144.885] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44145.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44145.603] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44145.606] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44145.619] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44145.622] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44145.636] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44145.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44145.653] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44145.657] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44145.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44145.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44145.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44145.691] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44145.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44145.708] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44145.736] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44145.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44145.769] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44145.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44145.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44145.808] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1969870]
>[ 44145.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1969870] width 1920 pitch 7680 (/4 1920)
>[ 44145.859] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b747c0]
>[ 44145.869] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b747c0] width 1920 pitch 7680 (/4 1920)
>[ 44202.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22773f0]
>[ 44202.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22773f0] width 1920 pitch 7680 (/4 1920)
>[ 44217.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222adf0]
>[ 44217.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222adf0] width 1920 pitch 7680 (/4 1920)
>[ 44247.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2283a00]
>[ 44247.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2283a00] width 1920 pitch 7680 (/4 1920)
>[ 44247.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f3ac0]
>[ 44247.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f3ac0] width 1920 pitch 7680 (/4 1920)
>[ 44262.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1c5b1f0]
>[ 44262.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1c5b1f0] width 1920 pitch 7680 (/4 1920)
>[ 44277.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ada5c0]
>[ 44277.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ada5c0] width 1920 pitch 7680 (/4 1920)
>[ 44277.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7e80]
>[ 44277.078] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7e80] width 1920 pitch 7680 (/4 1920)
>[ 44292.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee1600]
>[ 44292.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee1600] width 1920 pitch 7680 (/4 1920)
>[ 44337.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d7bd0]
>[ 44337.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d7bd0] width 1920 pitch 7680 (/4 1920)
>[ 44337.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c164e0]
>[ 44337.144] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c164e0] width 1920 pitch 7680 (/4 1920)
>[ 44352.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d04990]
>[ 44352.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d04990] width 1920 pitch 7680 (/4 1920)
>[ 44382.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242c30]
>[ 44382.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242c30] width 1920 pitch 7680 (/4 1920)
>[ 44397.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e26c00]
>[ 44397.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e26c00] width 1920 pitch 7680 (/4 1920)
>[ 44397.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222adf0]
>[ 44397.192] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222adf0] width 1920 pitch 7680 (/4 1920)
>[ 44457.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5f5da0]
>[ 44457.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5f5da0] width 1920 pitch 7680 (/4 1920)
>[ 44457.227] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f61040]
>[ 44457.241] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f61040] width 1920 pitch 7680 (/4 1920)
>[ 44502.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e85880]
>[ 44502.011] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e85880] width 1920 pitch 7680 (/4 1920)
>[ 44547.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aff640]
>[ 44547.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aff640] width 1920 pitch 7680 (/4 1920)
>[ 44562.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d0680]
>[ 44562.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d0680] width 1920 pitch 7680 (/4 1920)
>[ 44599.041] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d0680]
>[ 44599.057] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d0680] width 1920 pitch 7680 (/4 1920)
>[ 44599.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22aa7b0]
>[ 44599.089] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22aa7b0] width 1920 pitch 7680 (/4 1920)
>[ 44599.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e26c00]
>[ 44599.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e26c00] width 1920 pitch 7680 (/4 1920)
>[ 44599.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c400e0]
>[ 44599.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c400e0] width 1920 pitch 7680 (/4 1920)
>[ 44599.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e26c00]
>[ 44599.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e26c00] width 1920 pitch 7680 (/4 1920)
>[ 44599.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c400e0]
>[ 44599.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c400e0] width 1920 pitch 7680 (/4 1920)
>[ 44599.363] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e26c00]
>[ 44599.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e26c00] width 1920 pitch 7680 (/4 1920)
>[ 44599.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c400e0]
>[ 44599.424] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c400e0] width 1920 pitch 7680 (/4 1920)
>[ 44599.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e26c00]
>[ 44599.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e26c00] width 1920 pitch 7680 (/4 1920)
>[ 44599.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c400e0]
>[ 44599.523] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c400e0] width 1920 pitch 7680 (/4 1920)
>[ 44600.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222adf0]
>[ 44600.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222adf0] width 1920 pitch 7680 (/4 1920)
>[ 44600.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c44a90]
>[ 44600.058] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c44a90] width 1920 pitch 7680 (/4 1920)
>[ 44600.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222adf0]
>[ 44600.091] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222adf0] width 1920 pitch 7680 (/4 1920)
>[ 44600.098] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c44a90]
>[ 44600.124] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c44a90] width 1920 pitch 7680 (/4 1920)
>[ 44600.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222adf0]
>[ 44600.157] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222adf0] width 1920 pitch 7680 (/4 1920)
>[ 44600.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c44a90]
>[ 44600.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c44a90] width 1920 pitch 7680 (/4 1920)
>[ 44600.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x222adf0]
>[ 44600.234] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x222adf0] width 1920 pitch 7680 (/4 1920)
>[ 44600.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a65290]
>[ 44600.774] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a65290] width 1920 pitch 7680 (/4 1920)
>[ 44600.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ada5c0]
>[ 44601.008] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ada5c0] width 1920 pitch 7680 (/4 1920)
>[ 44601.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2227340]
>[ 44601.308] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2227340] width 1920 pitch 7680 (/4 1920)
>[ 44667.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226ade0]
>[ 44667.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226ade0] width 1920 pitch 7680 (/4 1920)
>[ 44682.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2267140]
>[ 44682.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2267140] width 1920 pitch 7680 (/4 1920)
>[ 44697.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ede460]
>[ 44697.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ede460] width 1920 pitch 7680 (/4 1920)
>[ 44712.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2271060]
>[ 44712.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2271060] width 1920 pitch 7680 (/4 1920)
>[ 44787.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2292580]
>[ 44787.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2292580] width 1920 pitch 7680 (/4 1920)
>[ 44802.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b48100]
>[ 44802.024] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b48100] width 1920 pitch 7680 (/4 1920)
>[ 44817.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c10e10]
>[ 44817.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c10e10] width 1920 pitch 7680 (/4 1920)
>[ 44832.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f0f4a0]
>[ 44832.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f0f4a0] width 1920 pitch 7680 (/4 1920)
>[ 44922.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6b9a760]
>[ 44922.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6b9a760] width 1920 pitch 7680 (/4 1920)
>[ 44937.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e913d0]
>[ 44937.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e913d0] width 1920 pitch 7680 (/4 1920)
>[ 45050.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4834500]
>[ 45050.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4834500] width 1920 pitch 7680 (/4 1920)
>[ 45147.013] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d44530]
>[ 45147.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d44530] width 1920 pitch 7680 (/4 1920)
>[ 45162.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45162.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45192.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bbc5c0]
>[ 45192.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bbc5c0] width 1920 pitch 7680 (/4 1920)
>[ 45207.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f44180]
>[ 45207.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f44180] width 1920 pitch 7680 (/4 1920)
>[ 45215.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fc650]
>[ 45215.993] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fc650] width 1920 pitch 7680 (/4 1920)
>[ 45216.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4ae9420]
>[ 45216.043] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4ae9420] width 1920 pitch 7680 (/4 1920)
>[ 45216.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a0d020]
>[ 45216.076] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a0d020] width 1920 pitch 7680 (/4 1920)
>[ 45216.092] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c125f0]
>[ 45216.110] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c125f0] width 1920 pitch 7680 (/4 1920)
>[ 45216.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228adf0]
>[ 45216.143] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228adf0] width 1920 pitch 7680 (/4 1920)
>[ 45216.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e1a5e0]
>[ 45216.176] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e1a5e0] width 1920 pitch 7680 (/4 1920)
>[ 45216.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b4eb20]
>[ 45216.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b4eb20] width 1920 pitch 7680 (/4 1920)
>[ 45216.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b76980]
>[ 45216.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b76980] width 1920 pitch 7680 (/4 1920)
>[ 45216.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f60fb0]
>[ 45216.794] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f60fb0] width 1920 pitch 7680 (/4 1920)
>[ 45217.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45217.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45217.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f60fb0]
>[ 45217.328] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f60fb0] width 1920 pitch 7680 (/4 1920)
>[ 45217.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45217.612] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45218.189] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f60fb0]
>[ 45218.211] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f60fb0] width 1920 pitch 7680 (/4 1920)
>[ 45218.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45218.245] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45218.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f60fb0]
>[ 45218.278] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f60fb0] width 1920 pitch 7680 (/4 1920)
>[ 45218.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45218.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45218.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f60fb0]
>[ 45218.345] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f60fb0] width 1920 pitch 7680 (/4 1920)
>[ 45218.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45218.378] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45218.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f60fb0]
>[ 45218.412] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f60fb0] width 1920 pitch 7680 (/4 1920)
>[ 45218.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bde080]
>[ 45218.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bde080] width 1920 pitch 7680 (/4 1920)
>[ 45218.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c39520]
>[ 45218.511] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c39520] width 1920 pitch 7680 (/4 1920)
>[ 45218.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b6f120]
>[ 45218.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b6f120] width 1920 pitch 7680 (/4 1920)
>[ 45225.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x49510f0]
>[ 45225.272] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x49510f0] width 1920 pitch 7680 (/4 1920)
>[ 45225.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef13a0]
>[ 45225.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef13a0] width 1920 pitch 7680 (/4 1920)
>[ 45226.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f57d60]
>[ 45226.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f57d60] width 1920 pitch 7680 (/4 1920)
>[ 45226.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7030]
>[ 45226.768] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7030] width 1920 pitch 7680 (/4 1920)
>[ 45229.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7030]
>[ 45229.104] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7030] width 1920 pitch 7680 (/4 1920)
>[ 45229.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5ec40]
>[ 45229.154] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5ec40] width 1920 pitch 7680 (/4 1920)
>[ 45229.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e8cf60]
>[ 45229.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e8cf60] width 1920 pitch 7680 (/4 1920)
>[ 45229.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e8cf60]
>[ 45229.571] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e8cf60] width 1920 pitch 7680 (/4 1920)
>[ 45229.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831da0]
>[ 45229.688] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831da0] width 1920 pitch 7680 (/4 1920)
>[ 45229.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5ec40]
>[ 45229.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5ec40] width 1920 pitch 7680 (/4 1920)
>[ 45229.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5ec40]
>[ 45229.771] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5ec40] width 1920 pitch 7680 (/4 1920)
>[ 45229.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f57d60]
>[ 45229.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f57d60] width 1920 pitch 7680 (/4 1920)
>[ 45229.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e8cf60]
>[ 45229.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e8cf60] width 1920 pitch 7680 (/4 1920)
>[ 45229.847] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54410]
>[ 45229.871] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54410] width 1920 pitch 7680 (/4 1920)
>[ 45229.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2f4c0]
>[ 45229.904] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2f4c0] width 1920 pitch 7680 (/4 1920)
>[ 45229.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54410]
>[ 45229.971] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54410] width 1920 pitch 7680 (/4 1920)
>[ 45230.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d7d40]
>[ 45230.204] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d7d40] width 1920 pitch 7680 (/4 1920)
>[ 45230.278] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5c4a0]
>[ 45230.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5c4a0] width 1920 pitch 7680 (/4 1920)
>[ 45230.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a9f80]
>[ 45230.505] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a9f80] width 1920 pitch 7680 (/4 1920)
>[ 45230.682] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bb6fe0]
>[ 45230.721] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bb6fe0] width 1920 pitch 7680 (/4 1920)
>[ 45230.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f5ec40]
>[ 45230.755] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f5ec40] width 1920 pitch 7680 (/4 1920)
>[ 45230.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac28b0]
>[ 45231.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac28b0] width 1920 pitch 7680 (/4 1920)
>[ 45231.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e8cf60]
>[ 45231.355] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e8cf60] width 1920 pitch 7680 (/4 1920)
>[ 45234.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4845380]
>[ 45234.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4845380] width 1920 pitch 7680 (/4 1920)
>[ 45234.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f3690]
>[ 45234.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f3690] width 1920 pitch 7680 (/4 1920)
>[ 45237.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4845380]
>[ 45237.394] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4845380] width 1920 pitch 7680 (/4 1920)
>[ 45238.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6b740]
>[ 45238.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6b740] width 1920 pitch 7680 (/4 1920)
>[ 45238.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5adf550]
>[ 45238.811] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5adf550] width 1920 pitch 7680 (/4 1920)
>[ 45238.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6b740]
>[ 45238.878] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6b740] width 1920 pitch 7680 (/4 1920)
>[ 45238.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5adf550]
>[ 45238.912] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5adf550] width 1920 pitch 7680 (/4 1920)
>[ 45238.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6b740]
>[ 45238.945] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6b740] width 1920 pitch 7680 (/4 1920)
>[ 45238.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5adf550]
>[ 45238.978] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5adf550] width 1920 pitch 7680 (/4 1920)
>[ 45238.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6b740]
>[ 45239.012] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6b740] width 1920 pitch 7680 (/4 1920)
>[ 45239.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef3450]
>[ 45239.028] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef3450] width 1920 pitch 7680 (/4 1920)
>[ 45247.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22866f0]
>[ 45247.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22866f0] width 1920 pitch 7680 (/4 1920)
>[ 45247.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4aa57d0]
>[ 45247.761] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4aa57d0] width 1920 pitch 7680 (/4 1920)
>[ 45252.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2241750]
>[ 45252.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2241750] width 1920 pitch 7680 (/4 1920)
>[ 45255.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2241890]
>[ 45255.726] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2241890] width 1920 pitch 7680 (/4 1920)
>[ 45267.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1a6b740]
>[ 45267.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1a6b740] width 1920 pitch 7680 (/4 1920)
>[ 45267.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae5800]
>[ 45268.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae5800] width 1920 pitch 7680 (/4 1920)
>[ 45281.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54c70]
>[ 45281.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54c70] width 1920 pitch 7680 (/4 1920)
>[ 45282.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54c70]
>[ 45282.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54c70] width 1920 pitch 7680 (/4 1920)
>[ 45282.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa561950]
>[ 45282.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa561950] width 1920 pitch 7680 (/4 1920)
>[ 45282.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54c70]
>[ 45282.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54c70] width 1920 pitch 7680 (/4 1920)
>[ 45282.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa561950]
>[ 45282.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa561950] width 1920 pitch 7680 (/4 1920)
>[ 45282.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54c70]
>[ 45282.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54c70] width 1920 pitch 7680 (/4 1920)
>[ 45282.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa561950]
>[ 45282.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa561950] width 1920 pitch 7680 (/4 1920)
>[ 45282.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54c70]
>[ 45282.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54c70] width 1920 pitch 7680 (/4 1920)
>[ 45282.824] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa561950]
>[ 45282.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa561950] width 1920 pitch 7680 (/4 1920)
>[ 45283.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae5800]
>[ 45283.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae5800] width 1920 pitch 7680 (/4 1920)
>[ 45283.338] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d5e8e0]
>[ 45283.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d5e8e0] width 1920 pitch 7680 (/4 1920)
>[ 45283.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ae5800]
>[ 45283.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ae5800] width 1920 pitch 7680 (/4 1920)
>[ 45284.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d5e8e0]
>[ 45284.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d5e8e0] width 1920 pitch 7680 (/4 1920)
>[ 45284.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eb1ad0]
>[ 45284.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eb1ad0] width 1920 pitch 7680 (/4 1920)
>[ 45284.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e197d0]
>[ 45284.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e197d0] width 1920 pitch 7680 (/4 1920)
>[ 45284.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1eb1ad0]
>[ 45284.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1eb1ad0] width 1920 pitch 7680 (/4 1920)
>[ 45284.358] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4ef960]
>[ 45284.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4ef960] width 1920 pitch 7680 (/4 1920)
>[ 45284.392] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4efa50]
>[ 45284.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4efa50] width 1920 pitch 7680 (/4 1920)
>[ 45284.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4ef960]
>[ 45284.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4ef960] width 1920 pitch 7680 (/4 1920)
>[ 45284.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4efa50]
>[ 45284.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4efa50] width 1920 pitch 7680 (/4 1920)
>[ 45284.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5cd710]
>[ 45284.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5cd710] width 1920 pitch 7680 (/4 1920)
>[ 45285.147] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a34d0]
>[ 45285.167] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a34d0] width 1920 pitch 7680 (/4 1920)
>[ 45285.339] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c17990]
>[ 45285.366] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c17990] width 1920 pitch 7680 (/4 1920)
>[ 45285.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4adf9e0]
>[ 45285.416] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4adf9e0] width 1920 pitch 7680 (/4 1920)
>[ 45311.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b00ce0]
>[ 45311.821] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b00ce0] width 1920 pitch 7680 (/4 1920)
>[ 45342.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2289400]
>[ 45342.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2289400] width 1920 pitch 7680 (/4 1920)
>[ 45342.494] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22893a0]
>[ 45342.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22893a0] width 1920 pitch 7680 (/4 1920)
>[ 45348.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4be4ac0]
>[ 45348.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4be4ac0] width 1920 pitch 7680 (/4 1920)
>[ 45353.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f6c410]
>[ 45353.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f6c410] width 1920 pitch 7680 (/4 1920)
>[ 45353.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f6c410]
>[ 45353.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f6c410] width 1920 pitch 7680 (/4 1920)
>[ 45354.029] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a60670]
>[ 45354.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a60670] width 1920 pitch 7680 (/4 1920)
>[ 45354.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d2b120]
>[ 45354.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d2b120] width 1920 pitch 7680 (/4 1920)
>[ 45357.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a60670]
>[ 45357.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a60670] width 1920 pitch 7680 (/4 1920)
>[ 45359.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f57d60]
>[ 45359.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f57d60] width 1920 pitch 7680 (/4 1920)
>[ 45359.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f57d60]
>[ 45359.459] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f57d60] width 1920 pitch 7680 (/4 1920)
>[ 45359.481] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f3690]
>[ 45359.492] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f3690] width 1920 pitch 7680 (/4 1920)
>[ 45359.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1f57d60]
>[ 45359.542] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1f57d60] width 1920 pitch 7680 (/4 1920)
>[ 45359.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2f4c0]
>[ 45359.693] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2f4c0] width 1920 pitch 7680 (/4 1920)
>[ 45387.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e8cf60]
>[ 45387.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e8cf60] width 1920 pitch 7680 (/4 1920)
>[ 45401.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d40860]
>[ 45401.426] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d40860] width 1920 pitch 7680 (/4 1920)
>[ 45417.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a62a60]
>[ 45417.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a62a60] width 1920 pitch 7680 (/4 1920)
>[ 45437.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bf6210]
>[ 45437.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bf6210] width 1920 pitch 7680 (/4 1920)
>[ 45437.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831da0]
>[ 45437.873] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831da0] width 1920 pitch 7680 (/4 1920)
>[ 45437.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ee9ca0]
>[ 45437.907] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ee9ca0] width 1920 pitch 7680 (/4 1920)
>[ 45438.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831da0]
>[ 45438.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831da0] width 1920 pitch 7680 (/4 1920)
>[ 45445.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac28b0]
>[ 45445.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac28b0] width 1920 pitch 7680 (/4 1920)
>[ 45447.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e85ee0]
>[ 45447.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e85ee0] width 1920 pitch 7680 (/4 1920)
>[ 45462.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5620f0]
>[ 45462.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5620f0] width 1920 pitch 7680 (/4 1920)
>[ 45462.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aac070]
>[ 45462.576] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aac070] width 1920 pitch 7680 (/4 1920)
>[ 45492.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b58c50]
>[ 45492.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b58c50] width 1920 pitch 7680 (/4 1920)
>[ 45492.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b58bf0]
>[ 45492.601] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b58bf0] width 1920 pitch 7680 (/4 1920)
>[ 45502.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d58100]
>[ 45502.970] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d58100] width 1920 pitch 7680 (/4 1920)
>[ 45503.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7030]
>[ 45503.025] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7030] width 1920 pitch 7680 (/4 1920)
>[ 45503.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a62a60]
>[ 45503.059] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a62a60] width 1920 pitch 7680 (/4 1920)
>[ 45503.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a7030]
>[ 45503.209] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a7030] width 1920 pitch 7680 (/4 1920)
>[ 45507.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4831da0]
>[ 45507.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4831da0] width 1920 pitch 7680 (/4 1920)
>[ 45522.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54410]
>[ 45522.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54410] width 1920 pitch 7680 (/4 1920)
>[ 45522.608] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46473a0]
>[ 45522.625] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46473a0] width 1920 pitch 7680 (/4 1920)
>[ 45551.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa4f3690]
>[ 45551.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa4f3690] width 1920 pitch 7680 (/4 1920)
>[ 45552.044] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4b06210]
>[ 45552.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4b06210] width 1920 pitch 7680 (/4 1920)
>[ 45582.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4af81c0]
>[ 45582.040] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4af81c0] width 1920 pitch 7680 (/4 1920)
>[ 45582.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ea7800]
>[ 45582.673] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ea7800] width 1920 pitch 7680 (/4 1920)
>[ 45597.046] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x199fa30]
>[ 45597.068] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x199fa30] width 1920 pitch 7680 (/4 1920)
>[ 45609.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x6be9b40]
>[ 45609.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x6be9b40] width 1920 pitch 7680 (/4 1920)
>[ 45609.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2f4c0]
>[ 45609.528] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2f4c0] width 1920 pitch 7680 (/4 1920)
>[ 45609.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x46473a0]
>[ 45609.578] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x46473a0] width 1920 pitch 7680 (/4 1920)
>[ 45609.692] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c2f4c0]
>[ 45609.711] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c2f4c0] width 1920 pitch 7680 (/4 1920)
>[ 45616.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e6f50]
>[ 45616.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e6f50] width 1920 pitch 7680 (/4 1920)
>[ 45627.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a63150]
>[ 45627.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a63150] width 1920 pitch 7680 (/4 1920)
>[ 45672.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5ac28b0]
>[ 45672.029] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5ac28b0] width 1920 pitch 7680 (/4 1920)
>[ 45687.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2281430]
>[ 45687.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2281430] width 1920 pitch 7680 (/4 1920)
>[ 45688.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aec820]
>[ 45688.092] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aec820] width 1920 pitch 7680 (/4 1920)
>[ 45689.503] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a96170]
>[ 45689.536] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a96170] width 1920 pitch 7680 (/4 1920)
>[ 45702.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224df10]
>[ 45702.036] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224df10] width 1920 pitch 7680 (/4 1920)
>[ 45717.016] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2aa3050]
>[ 45717.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2aa3050] width 1920 pitch 7680 (/4 1920)
>[ 45730.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5d09b0]
>[ 45730.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5d09b0] width 1920 pitch 7680 (/4 1920)
>[ 45732.008] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4630300]
>[ 45732.027] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4630300] width 1920 pitch 7680 (/4 1920)
>[ 45895.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d7f8b0]
>[ 45895.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d7f8b0] width 1920 pitch 7680 (/4 1920)
>[ 45895.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4a0d020]
>[ 45895.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4a0d020] width 1920 pitch 7680 (/4 1920)
>[ 45895.545] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22113a0]
>[ 45895.557] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22113a0] width 1920 pitch 7680 (/4 1920)
>[ 45936.811] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x493cf40]
>[ 45936.824] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x493cf40] width 1920 pitch 7680 (/4 1920)
>[ 45972.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4bec010]
>[ 45972.019] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4bec010] width 1920 pitch 7680 (/4 1920)
>[ 45987.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c35700]
>[ 45987.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c35700] width 1920 pitch 7680 (/4 1920)
>[ 45987.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2229610]
>[ 45987.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2229610] width 1920 pitch 7680 (/4 1920)
>[ 45992.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x462fc40]
>[ 45992.268] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x462fc40] width 1920 pitch 7680 (/4 1920)
>[ 45992.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef4800]
>[ 45992.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef4800] width 1920 pitch 7680 (/4 1920)
>[ 45992.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2229610]
>[ 45992.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2229610] width 1920 pitch 7680 (/4 1920)
>[ 45992.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef4800]
>[ 45992.520] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef4800] width 1920 pitch 7680 (/4 1920)
>[ 46028.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5db6b0]
>[ 46028.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5db6b0] width 1920 pitch 7680 (/4 1920)
>[ 46047.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a7d040]
>[ 46047.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a7d040] width 1920 pitch 7680 (/4 1920)
>[ 46047.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242e60]
>[ 46047.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242e60] width 1920 pitch 7680 (/4 1920)
>[ 46062.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e85880]
>[ 46062.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e85880] width 1920 pitch 7680 (/4 1920)
>[ 46077.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ce6290]
>[ 46077.054] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ce6290] width 1920 pitch 7680 (/4 1920)
>[ 46077.156] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4949760]
>[ 46077.171] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4949760] width 1920 pitch 7680 (/4 1920)
>[ 46092.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4acd080]
>[ 46092.033] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4acd080] width 1920 pitch 7680 (/4 1920)
>[ 46107.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b47f10]
>[ 46107.061] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b47f10] width 1920 pitch 7680 (/4 1920)
>[ 46107.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5fb300]
>[ 46107.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5fb300] width 1920 pitch 7680 (/4 1920)
>[ 46129.294] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c11da0]
>[ 46129.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c11da0] width 1920 pitch 7680 (/4 1920)
>[ 46129.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22435e0]
>[ 46129.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22435e0] width 1920 pitch 7680 (/4 1920)
>[ 46129.445] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b57740]
>[ 46129.455] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b57740] width 1920 pitch 7680 (/4 1920)
>[ 46129.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e52eb0]
>[ 46129.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e52eb0] width 1920 pitch 7680 (/4 1920)
>[ 46182.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2229610]
>[ 46182.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2229610] width 1920 pitch 7680 (/4 1920)
>[ 46197.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0xa5e5f20]
>[ 46197.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0xa5e5f20] width 1920 pitch 7680 (/4 1920)
>[ 46212.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225670]
>[ 46212.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225670] width 1920 pitch 7680 (/4 1920)
>[ 46227.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1e54e00]
>[ 46227.026] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1e54e00] width 1920 pitch 7680 (/4 1920)
>[ 46377.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5b1c670]
>[ 46377.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5b1c670] width 1920 pitch 7680 (/4 1920)
>[ 46392.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5a94fa0]
>[ 46392.042] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5a94fa0] width 1920 pitch 7680 (/4 1920)
>[ 46409.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x228d4f0]
>[ 46409.273] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x228d4f0] width 1920 pitch 7680 (/4 1920)
>[ 46409.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9d80]
>[ 46409.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9d80] width 1920 pitch 7680 (/4 1920)
>[ 46409.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637860]
>[ 46409.323] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637860] width 1920 pitch 7680 (/4 1920)
>[ 46409.326] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46409.339] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46409.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637860]
>[ 46409.357] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637860] width 1920 pitch 7680 (/4 1920)
>[ 46409.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46409.373] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46409.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637860]
>[ 46409.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637860] width 1920 pitch 7680 (/4 1920)
>[ 46409.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46409.407] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46409.409] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637860]
>[ 46409.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637860] width 1920 pitch 7680 (/4 1920)
>[ 46409.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46409.440] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46409.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637860]
>[ 46409.457] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637860] width 1920 pitch 7680 (/4 1920)
>[ 46409.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46409.473] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46409.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4637860]
>[ 46409.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4637860] width 1920 pitch 7680 (/4 1920)
>[ 46409.510] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46409.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46416.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4c13460]
>[ 46416.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4c13460] width 1920 pitch 7680 (/4 1920)
>[ 46416.245] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46416.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46416.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1ef9d80]
>[ 46416.312] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1ef9d80] width 1920 pitch 7680 (/4 1920)
>[ 46416.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5aaf640]
>[ 46416.462] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5aaf640] width 1920 pitch 7680 (/4 1920)
>[ 46417.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.262] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46417.280] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46417.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46417.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.329] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46417.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46417.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46417.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46417.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46417.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46417.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46417.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46417.429] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46417.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46417.452] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46417.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46417.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46417.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46417.529] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46417.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46417.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46418.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46418.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46418.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46418.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46418.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.377] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1aef610]
>[ 46418.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1aef610] width 1920 pitch 7680 (/4 1920)
>[ 46418.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x5af43b0]
>[ 46418.437] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x5af43b0] width 1920 pitch 7680 (/4 1920)
>[ 46418.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1d249e0]
>[ 46418.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1d249e0] width 1920 pitch 7680 (/4 1920)
>[ 46421.005] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 46421.005] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 46421.005] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 46421.013] (II) RADEON(0): RADEONSaveScreen(2)
>[ 46421.013] (II) RADEON(0): RADEONSaveScreen(0)
>[ 46421.950] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46421.950] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46421.950] 
>[ 46421.950] Backtrace:
>[ 46421.995] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46421.995] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46421.995] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46421.995] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46421.995] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46421.995] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46421.995] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.995] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46421.996] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.996] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46421.996] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46421.996] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46421.996] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46421.996] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46421.996] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46421.996] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46421.996] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46421.996] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46421.996] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46421.996] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46421.996] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46421.996] 
>[ 46421.996] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46421.996] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46421.996] 
>[ 46421.996] Backtrace:
>[ 46421.996] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46421.996] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46421.996] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46421.996] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46421.996] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46421.996] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46421.996] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.996] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46421.996] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.996] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46421.996] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46421.996] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46421.996] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46421.996] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46421.996] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46421.996] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46421.996] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46421.996] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46421.996] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46421.996] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46421.996] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46421.997] 
>[ 46421.997] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46421.997] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46421.997] 
>[ 46421.997] Backtrace:
>[ 46421.997] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46421.997] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46421.997] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46421.997] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46421.997] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46421.997] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46421.997] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.997] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46421.997] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.997] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46421.997] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46421.997] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46421.997] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46421.997] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46421.997] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46421.997] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46421.997] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46421.997] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46421.997] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46421.997] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46421.997] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46421.997] 
>[ 46421.997] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46421.997] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46421.997] 
>[ 46421.997] Backtrace:
>[ 46421.997] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46421.997] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46421.997] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46421.997] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46421.997] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46421.997] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46421.997] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.997] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46421.997] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.997] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46421.997] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46421.997] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46421.997] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46421.997] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46421.998] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46421.998] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46421.998] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46421.998] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46421.998] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46421.998] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46421.998] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46421.998] 
>[ 46421.998] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46421.998] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46421.998] 
>[ 46421.998] Backtrace:
>[ 46421.998] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46421.998] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46421.998] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46421.998] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46421.998] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46421.998] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46421.998] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.998] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46421.998] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.998] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46421.998] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46421.998] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46421.998] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46421.998] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46421.998] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46421.998] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46421.998] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46421.998] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46421.998] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46421.998] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46421.998] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46421.998] 
>[ 46421.998] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46421.998] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46421.998] 
>[ 46421.998] Backtrace:
>[ 46421.998] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46421.998] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46421.998] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46421.998] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46421.998] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46421.999] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46421.999] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.999] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46421.999] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46421.999] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46421.999] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46421.999] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46421.999] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46421.999] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46421.999] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46421.999] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46421.999] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46421.999] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46421.999] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46421.999] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.000] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.000] 
>[ 46422.000] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.000] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.000] 
>[ 46422.000] Backtrace:
>[ 46422.000] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.000] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.000] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.000] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.000] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.000] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.000] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.000] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46422.000] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.001] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46422.001] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46422.001] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46422.001] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46422.001] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46422.001] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46422.001] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46422.001] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46422.001] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46422.001] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.001] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.001] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.001] 
>[ 46422.001] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.001] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.001] 
>[ 46422.001] Backtrace:
>[ 46422.001] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.001] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.001] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.002] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.002] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.002] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.002] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.002] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46422.002] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.002] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46422.002] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46422.002] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46422.002] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46422.002] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46422.002] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46422.002] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46422.002] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46422.002] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46422.002] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.003] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.003] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.003] 
>[ 46422.003] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.003] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.003] 
>[ 46422.003] Backtrace:
>[ 46422.003] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.003] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.003] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.003] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.003] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.003] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.003] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.003] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46422.003] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.003] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46422.003] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46422.003] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46422.003] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46422.003] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46422.003] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46422.003] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46422.003] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46422.003] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46422.003] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.003] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.003] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.003] 
>[ 46422.003] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.003] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.003] 
>[ 46422.003] Backtrace:
>[ 46422.003] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.003] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.003] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.003] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.003] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.003] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.003] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.003] 7: /usr/bin/Xorg (0x400000+0x6aba0) [0x46aba0]
>[ 46422.004] 8: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.004] 9: /lib64/libc.so.6 (ioctl+0x7) [0x3b3e2ea2f7]
>[ 46422.004] 10: /lib64/libdrm.so.2 (drmIoctl+0x28) [0x33e96035f8]
>[ 46422.004] 11: /lib64/libdrm.so.2 (drmModeConnectorSetProperty+0x1d) [0x33e960763d]
>[ 46422.004] 12: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0x7b7dc) [0x7f1da29147dc]
>[ 46422.004] 13: /usr/lib64/xorg/modules/drivers/radeon_drv.so (0x7f1da2899000+0xd3583) [0x7f1da296c583]
>[ 46422.004] 14: /usr/bin/Xorg (dixSaveScreens+0x22e) [0x461b5e]
>[ 46422.004] 15: /usr/bin/Xorg (DPMSSet+0x147) [0x4805b7]
>[ 46422.004] 16: /usr/lib64/xorg/modules/extensions/libextmod.so (0x7f1da3a6e000+0x1af36) [0x7f1da3a88f36]
>[ 46422.004] 17: /usr/bin/Xorg (0x400000+0x3447a) [0x43447a]
>[ 46422.004] 18: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.004] 19: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.004] 20: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.004] 
>[ 46422.010] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.010] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.010] 
>[ 46422.010] Backtrace:
>[ 46422.010] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.010] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.010] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.010] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.010] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.010] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.010] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.010] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.010] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.010] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.010] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.010] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.010] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.010] 
>[ 46422.010] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.010] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.010] 
>[ 46422.010] Backtrace:
>[ 46422.010] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.010] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.010] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.010] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.010] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.011] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.011] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.011] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.011] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.011] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.011] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.011] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.011] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.011] 
>[ 46422.027] (II) RADEON(0): EDID vendor "LGD", prod id 523
>[ 46422.028] (II) RADEON(0): Printing DDC gathered Modelines:
>[ 46422.028] (II) RADEON(0): Modeline "1920x1080"x0.0  138.50  1920 1968 2000 2080  1080 1083 1088 1111 +hsync -vsync (66.6 kHz eP)
>[ 46422.094] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.094] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.094] 
>[ 46422.094] Backtrace:
>[ 46422.094] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.094] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.094] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.094] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.095] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.095] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.095] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.095] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.095] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.095] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.095] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.095] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.095] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.095] 
>[ 46422.095] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.095] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.095] 
>[ 46422.095] Backtrace:
>[ 46422.095] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.095] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.096] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.096] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.096] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.096] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.096] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.096] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.096] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.096] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.096] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.096] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.096] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.096] 
>[ 46422.142] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.142] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.142] 
>[ 46422.142] Backtrace:
>[ 46422.142] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.142] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.142] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.142] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.142] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.142] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.142] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.142] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.142] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.142] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.143] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.143] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.143] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.143] 
>[ 46422.143] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.143] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.143] 
>[ 46422.143] Backtrace:
>[ 46422.143] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.143] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.143] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.143] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.143] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.143] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.143] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.143] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.143] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.143] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.143] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.143] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.143] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.143] 
>[ 46422.179] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.179] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.179] 
>[ 46422.179] Backtrace:
>[ 46422.179] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.179] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.179] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.179] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.179] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.179] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.179] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.179] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.179] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.179] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.180] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.180] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.180] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.180] 
>[ 46422.180] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.180] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.180] 
>[ 46422.180] Backtrace:
>[ 46422.180] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.180] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.180] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.180] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.180] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.180] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.180] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.180] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.180] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.181] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.181] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.181] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.181] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.181] 
>[ 46422.457] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.457] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.457] 
>[ 46422.457] Backtrace:
>[ 46422.457] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.457] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.457] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.457] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.457] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.457] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.457] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.457] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.457] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.457] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.457] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.457] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.457] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.457] 
>[ 46422.457] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.457] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.457] 
>[ 46422.457] Backtrace:
>[ 46422.457] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.457] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.457] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.457] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.457] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.457] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.457] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.458] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.458] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.458] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.458] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.458] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.458] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.458] 
>[ 46422.721] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.721] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.721] 
>[ 46422.721] Backtrace:
>[ 46422.721] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.721] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.721] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.721] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.721] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.721] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.721] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.721] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.721] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.721] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.721] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.721] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.721] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.721] 
>[ 46422.721] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.721] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.721] 
>[ 46422.721] Backtrace:
>[ 46422.722] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.722] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.722] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.722] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.722] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.722] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.722] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.722] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.722] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.722] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.722] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.722] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.722] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.722] 
>[ 46422.961] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.961] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.961] 
>[ 46422.961] Backtrace:
>[ 46422.961] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.961] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.961] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.961] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.961] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.961] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.961] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.961] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.961] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.961] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.961] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.961] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.961] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.961] 
>[ 46422.961] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46422.962] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46422.962] 
>[ 46422.962] Backtrace:
>[ 46422.962] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46422.962] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46422.962] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46422.962] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46422.962] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46422.962] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46422.962] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46422.962] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46422.962] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46422.962] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46422.962] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46422.962] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46422.962] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46422.962] 
>[ 46423.130] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46423.130] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46423.130] 
>[ 46423.130] Backtrace:
>[ 46423.130] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46423.131] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46423.131] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46423.131] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46423.131] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46423.131] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46423.131] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46423.131] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46423.131] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46423.131] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46423.131] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46423.131] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46423.131] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46423.131] 
>[ 46423.131] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46423.131] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46423.131] 
>[ 46423.131] Backtrace:
>[ 46423.132] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46423.132] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46423.132] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46423.132] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46423.132] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46423.132] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46423.132] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46423.132] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46423.132] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46423.132] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46423.132] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46423.132] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46423.132] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46423.132] 
>[ 46423.202] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46423.202] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46423.202] 
>[ 46423.203] Backtrace:
>[ 46423.203] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46423.203] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46423.203] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46423.203] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46423.203] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46423.203] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46423.203] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46423.203] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46423.203] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46423.203] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46423.203] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46423.203] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46423.203] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46423.203] 
>[ 46423.203] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46423.203] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46423.203] 
>[ 46423.203] Backtrace:
>[ 46423.203] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46423.203] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46423.203] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46423.203] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46423.203] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46423.203] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46423.203] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46423.204] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46423.204] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46423.204] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46423.204] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46423.204] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46423.204] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46423.204] 
>[ 46423.396] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46423.396] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46423.396] 
>[ 46423.396] Backtrace:
>[ 46423.396] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46423.396] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46423.396] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46423.396] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46423.396] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46423.396] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46423.396] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46423.396] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46423.396] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46423.396] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46423.396] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46423.396] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46423.396] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46423.396] 
>[ 46423.396] BUG: triggered 'if (priv->num_active_touches > priv->num_slots)'
>[ 46423.396] BUG: synaptics.c:3122 in UpdateTouchState()
>[ 46423.396] 
>[ 46423.396] Backtrace:
>[ 46423.396] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[ 46423.396] 1: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x2e77) [0x7f1d9f4f0e77]
>[ 46423.396] 2: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x4563) [0x7f1d9f4f2563]
>[ 46423.397] 3: /usr/lib64/xorg/modules/input/synaptics_drv.so (0x7f1d9f4ee000+0x6fa4) [0x7f1d9f4f4fa4]
>[ 46423.397] 4: /usr/bin/Xorg (0x400000+0x807b7) [0x4807b7]
>[ 46423.397] 5: /usr/bin/Xorg (0x400000+0xa4ab0) [0x4a4ab0]
>[ 46423.397] 6: /lib64/libpthread.so.0 (0x319fa00000+0xefe0) [0x319fa0efe0]
>[ 46423.397] 7: /lib64/libc.so.6 (__select+0x13) [0x3b3e2ea9c3]
>[ 46423.397] 8: /usr/bin/Xorg (WaitForSomething+0x190) [0x462850]
>[ 46423.397] 9: /usr/bin/Xorg (0x400000+0x34141) [0x434141]
>[ 46423.397] 10: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[ 46423.397] 11: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3b3e221735]
>[ 46423.397] 12: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[ 46423.397]

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Attachments on bug 869883: 633139 | 633140 | 633141