Attachment 634496 Details for Bug 870740 – File: Xorg.0.log

File: Xorg.0.log

Xorg.0.log (text/plain), 377.96 KB, created by Malar Kannan on 2012-10-28 11:39:05 UTC

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Creator: Malar Kannan

Created: 2012-10-28 11:39:05 UTC

Size: 377.96 KB

patch

obsolete

>[    31.653] 
>X.Org X Server 1.12.3
>Release Date: 2012-07-09
>[    31.653] X Protocol Version 11, Revision 0
>[    31.653] Build Operating System:  2.6.32-220.17.1.el6.x86_64 
>[    31.653] Current Operating System: Linux localhost.localdomain 3.6.2-4.fc17.x86_64 #1 SMP Wed Oct 17 02:43:21 UTC 2012 x86_64
>[    31.653] Kernel command line: BOOT_IMAGE=/vmlinuz-3.6.2-4.fc17.x86_64 root=/dev/mapper/vg-lv_root ro rd.md=0 rd.dm=0 KEYTABLE=us SYSFONT=True rd.lvm.lv=vg/lv_root rd.luks=0 rd.lvm.lv=vg/lv_swap LANG=en_US.UTF-8 rhgb quiet
>[    31.653] Build Date: 20 September 2012  07:51:23AM
>[    31.653] Build ID: xorg-x11-server 1.12.3-2.fc17 
>[    31.653] Current version of pixman: 0.24.4
>[    31.653] 	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>[    31.653] Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>[    31.654] (==) Log file: "/var/log/Xorg.0.log", Time: Thu Oct 25 11:12:10 2012
>[    31.671] (==) Using config directory: "/etc/X11/xorg.conf.d"
>[    31.671] (==) Using system config directory "/usr/share/X11/xorg.conf.d"
>[    31.671] (==) No Layout section.  Using the first Screen section.
>[    31.671] (==) No screen section available. Using defaults.
>[    31.671] (**) |-->Screen "Default Screen Section" (0)
>[    31.671] (**) |   |-->Monitor "<default monitor>"
>[    31.671] (==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>[    31.671] (==) Automatically adding devices
>[    31.671] (==) Automatically enabling devices
>[    31.671] (==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>[    31.671] (==) ModulePath set to "/usr/lib64/xorg/modules"
>[    31.671] (II) The server relies on udev to provide the list of input devices.
>	If no devices become available, reconfigure udev or disable AutoAddDevices.
>[    31.671] (II) Loader magic: 0x7c6ac0
>[    31.671] (II) Module ABI versions:
>[    31.671] 	X.Org ANSI C Emulation: 0.4
>[    31.671] 	X.Org Video Driver: 12.0
>[    31.671] 	X.Org XInput driver : 16.0
>[    31.671] 	X.Org Server Extension : 6.0
>[    31.673] (--) PCI:*(0:1:0:0) 1002:9553:1028:02be rev 0, Mem @ 0xd0000000/268435456, 0xfc000000/65536, I/O @ 0x00002000/256, BIOS @ 0x????????/131072
>[    31.673] (II) LoadModule: "extmod"
>[    31.673] (II) Loading /usr/lib64/xorg/modules/extensions/libextmod.so
>[    31.674] (II) Module extmod: vendor="X.Org Foundation"
>[    31.674] 	compiled for 1.12.3, module version = 1.0.0
>[    31.674] 	Module class: X.Org Server Extension
>[    31.674] 	ABI class: X.Org Server Extension, version 6.0
>[    31.674] (II) Loading extension SELinux
>[    31.674] (II) Loading extension MIT-SCREEN-SAVER
>[    31.674] (II) Loading extension XFree86-VidModeExtension
>[    31.674] (II) Loading extension XFree86-DGA
>[    31.674] (II) Loading extension DPMS
>[    31.674] (II) Loading extension XVideo
>[    31.674] (II) Loading extension XVideo-MotionCompensation
>[    31.674] (II) Loading extension X-Resource
>[    31.674] (II) LoadModule: "dbe"
>[    31.674] (II) Loading /usr/lib64/xorg/modules/extensions/libdbe.so
>[    31.674] (II) Module dbe: vendor="X.Org Foundation"
>[    31.674] 	compiled for 1.12.3, module version = 1.0.0
>[    31.674] 	Module class: X.Org Server Extension
>[    31.674] 	ABI class: X.Org Server Extension, version 6.0
>[    31.674] (II) Loading extension DOUBLE-BUFFER
>[    31.675] (II) LoadModule: "glx"
>[    31.675] (II) Loading /usr/lib64/xorg/modules/extensions/libglx.so
>[    31.675] (II) Module glx: vendor="X.Org Foundation"
>[    31.675] 	compiled for 1.12.3, module version = 1.0.0
>[    31.675] 	ABI class: X.Org Server Extension, version 6.0
>[    31.675] (==) AIGLX enabled
>[    31.675] (II) Loading extension GLX
>[    31.675] (II) LoadModule: "record"
>[    31.675] (II) Loading /usr/lib64/xorg/modules/extensions/librecord.so
>[    31.675] (II) Module record: vendor="X.Org Foundation"
>[    31.675] 	compiled for 1.12.3, module version = 1.13.0
>[    31.675] 	Module class: X.Org Server Extension
>[    31.675] 	ABI class: X.Org Server Extension, version 6.0
>[    31.675] (II) Loading extension RECORD
>[    31.675] (II) LoadModule: "dri"
>[    31.675] (II) Loading /usr/lib64/xorg/modules/extensions/libdri.so
>[    31.676] (II) Module dri: vendor="X.Org Foundation"
>[    31.676] 	compiled for 1.12.3, module version = 1.0.0
>[    31.676] 	ABI class: X.Org Server Extension, version 6.0
>[    31.676] (II) Loading extension XFree86-DRI
>[    31.676] (II) LoadModule: "dri2"
>[    31.676] (II) Loading /usr/lib64/xorg/modules/extensions/libdri2.so
>[    31.676] (II) Module dri2: vendor="X.Org Foundation"
>[    31.676] 	compiled for 1.12.3, module version = 1.2.0
>[    31.676] 	ABI class: X.Org Server Extension, version 6.0
>[    31.676] (II) Loading extension DRI2
>[    31.676] (==) Matched ati as autoconfigured driver 0
>[    31.676] (==) Matched vesa as autoconfigured driver 1
>[    31.676] (==) Matched modesetting as autoconfigured driver 2
>[    31.676] (==) Matched fbdev as autoconfigured driver 3
>[    31.676] (==) Assigned the driver to the xf86ConfigLayout
>[    31.676] (II) LoadModule: "ati"
>[    31.676] (II) Loading /usr/lib64/xorg/modules/drivers/ati_drv.so
>[    31.677] (II) Module ati: vendor="X.Org Foundation"
>[    31.677] 	compiled for 1.12.0, module version = 6.14.99
>[    31.677] 	Module class: X.Org Video Driver
>[    31.677] 	ABI class: X.Org Video Driver, version 12.0
>[    31.677] (II) LoadModule: "radeon"
>[    31.677] (II) Loading /usr/lib64/xorg/modules/drivers/radeon_drv.so
>[    31.677] (II) Module radeon: vendor="X.Org Foundation"
>[    31.677] 	compiled for 1.12.0, module version = 6.14.99
>[    31.677] 	Module class: X.Org Video Driver
>[    31.677] 	ABI class: X.Org Video Driver, version 12.0
>[    31.677] (II) LoadModule: "vesa"
>[    31.677] (II) Loading /usr/lib64/xorg/modules/drivers/vesa_drv.so
>[    31.677] (II) Module vesa: vendor="X.Org Foundation"
>[    31.677] 	compiled for 1.12.0, module version = 2.3.1
>[    31.677] 	Module class: X.Org Video Driver
>[    31.677] 	ABI class: X.Org Video Driver, version 12.0
>[    31.677] (II) LoadModule: "modesetting"
>[    31.678] (WW) Warning, couldn't open module modesetting
>[    31.678] (II) UnloadModule: "modesetting"
>[    31.678] (II) Unloading modesetting
>[    31.678] (EE) Failed to load module "modesetting" (module does not exist, 0)
>[    31.678] (II) LoadModule: "fbdev"
>[    31.678] (II) Loading /usr/lib64/xorg/modules/drivers/fbdev_drv.so
>[    31.678] (II) Module fbdev: vendor="X.Org Foundation"
>[    31.678] 	compiled for 1.11.99.901, module version = 0.4.2
>[    31.678] 	ABI class: X.Org Video Driver, version 12.0
>[    31.678] (II) RADEON: Driver for ATI Radeon chipsets:
>	ATI Radeon Mobility X600 (M24) 3150 (PCIE), ATI FireMV 2400 (PCI),
>	ATI Radeon Mobility X300 (M24) 3152 (PCIE),
>	ATI FireGL M24 GL 3154 (PCIE), ATI FireMV 2400 3155 (PCI),
>	ATI Radeon X600 (RV380) 3E50 (PCIE),
>	ATI FireGL V3200 (RV380) 3E54 (PCIE), ATI Radeon IGP320 (A3) 4136,
>	ATI Radeon IGP330/340/350 (A4) 4137, ATI Radeon 9500 AD (AGP),
>	ATI Radeon 9500 AE (AGP), ATI Radeon 9600TX AF (AGP),
>	ATI FireGL Z1 AG (AGP), ATI Radeon 9800SE AH (AGP),
>	ATI Radeon 9800 AI (AGP), ATI Radeon 9800 AJ (AGP),
>	ATI FireGL X2 AK (AGP), ATI Radeon 9600 AP (AGP),
>	ATI Radeon 9600SE AQ (AGP), ATI Radeon 9600XT AR (AGP),
>	ATI Radeon 9600 AS (AGP), ATI FireGL T2 AT (AGP), ATI Radeon 9650,
>	ATI FireGL RV360 AV (AGP), ATI Radeon 7000 IGP (A4+) 4237,
>	ATI Radeon 8500 AIW BB (AGP), ATI Radeon IGP320M (U1) 4336,
>	ATI Radeon IGP330M/340M/350M (U2) 4337,
>	ATI Radeon Mobility 7000 IGP 4437, ATI Radeon 9000/PRO If (AGP/PCI),
>	ATI Radeon 9000 Ig (AGP/PCI), ATI Radeon X800 (R420) JH (AGP),
>	ATI Radeon X800PRO (R420) JI (AGP),
>	ATI Radeon X800SE (R420) JJ (AGP), ATI Radeon X800 (R420) JK (AGP),
>	ATI Radeon X800 (R420) JL (AGP), ATI FireGL X3 (R420) JM (AGP),
>	ATI Radeon Mobility 9800 (M18) JN (AGP),
>	ATI Radeon X800 SE (R420) (AGP), ATI Radeon X800XT (R420) JP (AGP),
>	ATI Radeon X800 VE (R420) JT (AGP), ATI Radeon X850 (R480) (AGP),
>	ATI Radeon X850 XT (R480) (AGP), ATI Radeon X850 SE (R480) (AGP),
>	ATI Radeon X850 PRO (R480) (AGP), ATI Radeon X850 XT PE (R480) (AGP),
>	ATI Radeon Mobility M7 LW (AGP),
>	ATI Mobility FireGL 7800 M7 LX (AGP),
>	ATI Radeon Mobility M6 LY (AGP), ATI Radeon Mobility M6 LZ (AGP),
>	ATI FireGL Mobility 9000 (M9) Ld (AGP),
>	ATI Radeon Mobility 9000 (M9) Lf (AGP),
>	ATI Radeon Mobility 9000 (M9) Lg (AGP), ATI FireMV 2400 PCI,
>	ATI Radeon 9700 Pro ND (AGP), ATI Radeon 9700/9500Pro NE (AGP),
>	ATI Radeon 9600TX NF (AGP), ATI FireGL X1 NG (AGP),
>	ATI Radeon 9800PRO NH (AGP), ATI Radeon 9800 NI (AGP),
>	ATI FireGL X2 NK (AGP), ATI Radeon 9800XT NJ (AGP),
>	ATI Radeon Mobility 9600/9700 (M10/M11) NP (AGP),
>	ATI Radeon Mobility 9600 (M10) NQ (AGP),
>	ATI Radeon Mobility 9600 (M11) NR (AGP),
>	ATI Radeon Mobility 9600 (M10) NS (AGP),
>	ATI FireGL Mobility T2 (M10) NT (AGP),
>	ATI FireGL Mobility T2e (M11) NV (AGP), ATI Radeon QD (AGP),
>	ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP),
>	ATI FireGL 8700/8800 QH (AGP), ATI Radeon 8500 QL (AGP),
>	ATI Radeon 9100 QM (AGP), ATI Radeon 7500 QW (AGP/PCI),
>	ATI Radeon 7500 QX (AGP/PCI), ATI Radeon VE/7000 QY (AGP/PCI),
>	ATI Radeon VE/7000 QZ (AGP/PCI), ATI ES1000 515E (PCI),
>	ATI Radeon Mobility X300 (M22) 5460 (PCIE),
>	ATI Radeon Mobility X600 SE (M24C) 5462 (PCIE),
>	ATI FireGL M22 GL 5464 (PCIE), ATI Radeon X800 (R423) UH (PCIE),
>	ATI Radeon X800PRO (R423) UI (PCIE),
>	ATI Radeon X800LE (R423) UJ (PCIE),
>	ATI Radeon X800SE (R423) UK (PCIE),
>	ATI Radeon X800 XTP (R430) (PCIE), ATI Radeon X800 XL (R430) (PCIE),
>	ATI Radeon X800 SE (R430) (PCIE), ATI Radeon X800 (R430) (PCIE),
>	ATI FireGL V7100 (R423) (PCIE), ATI FireGL V5100 (R423) UQ (PCIE),
>	ATI FireGL unknown (R423) UR (PCIE),
>	ATI FireGL unknown (R423) UT (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility FireGL V5000 (M26) (PCIE),
>	ATI Mobility Radeon X700 XL (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Mobility Radeon X700 (M26) (PCIE),
>	ATI Radeon X550XTX 5657 (PCIE), ATI Radeon 9100 IGP (A5) 5834,
>	ATI Radeon Mobility 9100 IGP (U3) 5835,
>	ATI Radeon XPRESS 200 5954 (PCIE),
>	ATI Radeon XPRESS 200M 5955 (PCIE), ATI Radeon 9250 5960 (AGP),
>	ATI Radeon 9200 5961 (AGP), ATI Radeon 9200 5962 (AGP),
>	ATI Radeon 9200SE 5964 (AGP), ATI FireMV 2200 (PCI),
>	ATI ES1000 5969 (PCI), ATI Radeon XPRESS 200 5974 (PCIE),
>	ATI Radeon XPRESS 200M 5975 (PCIE),
>	ATI Radeon XPRESS 200 5A41 (PCIE),
>	ATI Radeon XPRESS 200M 5A42 (PCIE),
>	ATI Radeon XPRESS 200 5A61 (PCIE),
>	ATI Radeon XPRESS 200M 5A62 (PCIE),
>	ATI Radeon X300 (RV370) 5B60 (PCIE),
>	ATI Radeon X600 (RV370) 5B62 (PCIE),
>	ATI Radeon X550 (RV370) 5B63 (PCIE),
>	ATI FireGL V3100 (RV370) 5B64 (PCIE),
>	ATI FireMV 2200 PCIE (RV370) 5B65 (PCIE),
>	ATI Radeon Mobility 9200 (M9+) 5C61 (AGP),
>	ATI Radeon Mobility 9200 (M9+) 5C63 (AGP),
>	ATI Mobility Radeon X800 XT (M28) (PCIE),
>	ATI Mobility FireGL V5100 (M28) (PCIE),
>	ATI Mobility Radeon X800 (M28) (PCIE), ATI Radeon X850 5D4C (PCIE),
>	ATI Radeon X850 XT PE (R480) (PCIE),
>	ATI Radeon X850 SE (R480) (PCIE), ATI Radeon X850 PRO (R480) (PCIE),
>	ATI unknown Radeon / FireGL (R480) 5D50 (PCIE),
>	ATI Radeon X850 XT (R480) (PCIE),
>	ATI Radeon X800XT (R423) 5D57 (PCIE),
>	ATI FireGL V5000 (RV410) (PCIE), ATI Radeon X700 XT (RV410) (PCIE),
>	ATI Radeon X700 PRO (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X700 (RV410) (PCIE),
>	ATI Radeon X700 SE (RV410) (PCIE), ATI Radeon X1800,
>	ATI Mobility Radeon X1800 XT, ATI Mobility Radeon X1800,
>	ATI Mobility FireGL V7200, ATI FireGL V7200, ATI FireGL V5300,
>	ATI Mobility FireGL V7100, ATI Radeon X1800, ATI Radeon X1800,
>	ATI Radeon X1800, ATI Radeon X1800, ATI Radeon X1800,
>	ATI FireGL V7300, ATI FireGL V7350, ATI Radeon X1600, ATI RV505,
>	ATI Radeon X1300/X1550, ATI Radeon X1550, ATI M54-GL,
>	ATI Mobility Radeon X1400, ATI Radeon X1300/X1550,
>	ATI Radeon X1550 64-bit, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Mobility Radeon X1300,
>	ATI Mobility Radeon X1300, ATI Radeon X1300, ATI Radeon X1300,
>	ATI RV505, ATI RV505, ATI FireGL V3300, ATI FireGL V3350,
>	ATI Radeon X1300, ATI Radeon X1550 64-bit, ATI Radeon X1300/X1550,
>	ATI Radeon X1600, ATI Radeon X1300/X1550, ATI Mobility Radeon X1450,
>	ATI Radeon X1300/X1550, ATI Mobility Radeon X2300,
>	ATI Mobility Radeon X2300, ATI Mobility Radeon X1350,
>	ATI Mobility Radeon X1350, ATI Mobility Radeon X1450,
>	ATI Radeon X1300, ATI Radeon X1550, ATI Mobility Radeon X1350,
>	ATI FireMV 2250, ATI Radeon X1550 64-bit, ATI Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1600, ATI Radeon X1600,
>	ATI Mobility FireGL V5200, ATI Mobility Radeon X1600,
>	ATI Radeon X1650, ATI Radeon X1650, ATI Radeon X1600,
>	ATI Radeon X1300 XT/X1600 Pro, ATI FireGL V3400,
>	ATI Mobility FireGL V5250, ATI Mobility Radeon X1700,
>	ATI Mobility Radeon X1700 XT, ATI FireGL V5200,
>	ATI Mobility Radeon X1700, ATI Radeon X2300HD,
>	ATI Mobility Radeon HD 2300, ATI Mobility Radeon HD 2300,
>	ATI Radeon X1950, ATI Radeon X1900, ATI Radeon X1950,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI Radeon X1900, ATI Radeon X1900, ATI Radeon X1900,
>	ATI AMD Stream Processor, ATI Radeon X1900, ATI Radeon X1950,
>	ATI RV560, ATI RV560, ATI Mobility Radeon X1900, ATI RV560,
>	ATI Radeon X1950 GT, ATI RV570, ATI RV570, ATI FireGL V7400,
>	ATI RV560, ATI Radeon X1650, ATI Radeon X1650, ATI RV560,
>	ATI Radeon 9100 PRO IGP 7834, ATI Radeon Mobility 9200 IGP 7835,
>	ATI Radeon X1200, ATI Radeon X1200, ATI Radeon X1200,
>	ATI Radeon X1200, ATI Radeon X1200, ATI RS740, ATI RS740M, ATI RS740,
>	ATI RS740M, ATI Radeon HD 2900 XT, ATI Radeon HD 2900 XT,
>	ATI Radeon HD 2900 XT, ATI Radeon HD 2900 Pro, ATI Radeon HD 2900 GT,
>	ATI FireGL V8650, ATI FireGL V8600, ATI FireGL V7600,
>	ATI Radeon 4800 Series, ATI Radeon HD 4870 x2,
>	ATI Radeon 4800 Series, ATI Radeon HD 4850 x2,
>	ATI FirePro V8750 (FireGL), ATI FirePro V7760 (FireGL),
>	ATI Mobility RADEON HD 4850, ATI Mobility RADEON HD 4850 X2,
>	ATI Radeon 4800 Series, ATI FirePro RV770, AMD FireStream 9270,
>	AMD FireStream 9250, ATI FirePro V8700 (FireGL),
>	ATI Mobility RADEON HD 4870, ATI Mobility RADEON M98,
>	ATI Mobility RADEON HD 4870, ATI Radeon 4800 Series,
>	ATI Radeon 4800 Series, ATI FirePro M7750, ATI M98, ATI M98, ATI M98,
>	ATI Mobility Radeon HD 4650, ATI Radeon RV730 (AGP),
>	ATI Mobility Radeon HD 4670, ATI FirePro M5750,
>	ATI Mobility Radeon HD 4670, ATI Radeon RV730 (AGP),
>	ATI RV730XT [Radeon HD 4670], ATI RADEON E4600,
>	ATI Radeon HD 4600 Series, ATI RV730 PRO [Radeon HD 4650],
>	ATI FirePro V7750 (FireGL), ATI FirePro V5700 (FireGL),
>	ATI FirePro V3750 (FireGL), ATI Mobility Radeon HD 4830,
>	ATI Mobility Radeon HD 4850, ATI FirePro M7740, ATI RV740,
>	ATI Radeon HD 4770, ATI Radeon HD 4700 Series, ATI Radeon HD 4770,
>	ATI FirePro M5750, ATI RV610, ATI Radeon HD 2400 XT,
>	ATI Radeon HD 2400 Pro, ATI Radeon HD 2400 PRO AGP, ATI FireGL V4000,
>	ATI RV610, ATI Radeon HD 2350, ATI Mobility Radeon HD 2400 XT,
>	ATI Mobility Radeon HD 2400, ATI RADEON E2400, ATI RV610,
>	ATI FireMV 2260, ATI RV670, ATI Radeon HD3870,
>	ATI Mobility Radeon HD 3850, ATI Radeon HD3850,
>	ATI Mobility Radeon HD 3850 X2, ATI RV670,
>	ATI Mobility Radeon HD 3870, ATI Mobility Radeon HD 3870 X2,
>	ATI Radeon HD3870 X2, ATI FireGL V7700, ATI Radeon HD3850,
>	ATI Radeon HD3690, AMD Firestream 9170, ATI Radeon HD 4550,
>	ATI Radeon RV710, ATI Radeon RV710, ATI Radeon RV710,
>	ATI Radeon HD 4350, ATI Mobility Radeon 4300 Series,
>	ATI Mobility Radeon 4500 Series, ATI Mobility Radeon 4500 Series,
>	ATI FirePro RG220, ATI Mobility Radeon 4330, ATI RV630,
>	ATI Mobility Radeon HD 2600, ATI Mobility Radeon HD 2600 XT,
>	ATI Radeon HD 2600 XT AGP, ATI Radeon HD 2600 Pro AGP,
>	ATI Radeon HD 2600 XT, ATI Radeon HD 2600 Pro, ATI Gemini RV630,
>	ATI Gemini Mobility Radeon HD 2600 XT, ATI FireGL V5600,
>	ATI FireGL V3600, ATI Radeon HD 2600 LE,
>	ATI Mobility FireGL Graphics Processor, ATI Radeon HD 3470,
>	ATI Mobility Radeon HD 3430, ATI Mobility Radeon HD 3400 Series,
>	ATI Radeon HD 3450, ATI Radeon HD 3450, ATI Radeon HD 3430,
>	ATI Radeon HD 3450, ATI FirePro V3700, ATI FireMV 2450,
>	ATI FireMV 2260, ATI FireMV 2260, ATI Radeon HD 3600 Series,
>	ATI Radeon HD 3650 AGP, ATI Radeon HD 3600 PRO,
>	ATI Radeon HD 3600 XT, ATI Radeon HD 3600 PRO,
>	ATI Mobility Radeon HD 3650, ATI Mobility Radeon HD 3670,
>	ATI Mobility FireGL V5700, ATI Mobility FireGL V5725,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3200 Graphics, ATI Radeon 3100 Graphics,
>	ATI Radeon HD 3300 Graphics, ATI Radeon HD 3200 Graphics,
>	ATI Radeon 3000 Graphics, SUMO, SUMO, SUMO2, SUMO2, SUMO2, SUMO2,
>	SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, SUMO, ATI Radeon HD 4200,
>	ATI Radeon 4100, ATI Mobility Radeon HD 4200,
>	ATI Mobility Radeon 4100, ATI Radeon HD 4290, ATI Radeon HD 4250,
>	AMD Radeon HD 6310 Graphics, AMD Radeon HD 6310 Graphics,
>	AMD Radeon HD 6250 Graphics, AMD Radeon HD 6250 Graphics,
>	AMD Radeon HD 6300 Series Graphics,
>	AMD Radeon HD 6200 Series Graphics, PALM, PALM, CYPRESS,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, AMD Firestream 9370,
>	AMD Firestream 9350, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5800 Series,
>	ATI Radeon HD 5800 Series, ATI Radeon HD 5900 Series,
>	ATI Radeon HD 5900 Series, ATI Mobility Radeon HD 5800 Series,
>	ATI Mobility Radeon HD 5800 Series,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI Mobility Radeon HD 5800 Series, ATI Radeon HD 5700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Radeon HD 5700 Series, ATI Radeon HD 6700 Series,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon HD 5570,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI Radeon HD 5670,
>	ATI Radeon HD 5570, ATI Radeon HD 5500 Series, REDWOOD,
>	ATI Mobility Radeon HD 5000 Series,
>	ATI Mobility Radeon HD 5000 Series, ATI Mobility Radeon Graphics,
>	ATI Mobility Radeon Graphics, CEDAR,
>	ATI FirePro (FireGL) Graphics Adapter,
>	ATI FirePro (FireGL) Graphics Adapter, ATI FirePro 2270, CEDAR,
>	ATI Radeon HD 5450, CEDAR, CEDAR, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN, CAYMAN,
>	AMD Radeon HD 6900 Series, AMD Radeon HD 6900 Series, CAYMAN, CAYMAN,
>	CAYMAN, AMD Radeon HD 6900M Series, Mobility Radeon HD 6000 Series,
>	BARTS, BARTS, Mobility Radeon HD 6000 Series,
>	Mobility Radeon HD 6000 Series, BARTS, BARTS, BARTS, BARTS,
>	AMD Radeon HD 6800 Series, AMD Radeon HD 6800 Series,
>	AMD Radeon HD 6700 Series, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS, TURKS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS,
>	CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, CAICOS, ARUBA, ARUBA, ARUBA,
>	ARUBA, ARUBA, ARUBA, ARUBA
>[    31.694] (II) VESA: driver for VESA chipsets: vesa
>[    31.694] (II) FBDEV: driver for framebuffer: fbdev
>[    31.694] (++) using VT number 1
>
>[    31.696] (II) [KMS] Kernel modesetting enabled.
>[    31.696] (WW) Falling back to old probe method for vesa
>[    31.696] (WW) Falling back to old probe method for fbdev
>[    31.696] (II) Loading sub module "fbdevhw"
>[    31.696] (II) LoadModule: "fbdevhw"
>[    31.696] (II) Loading /usr/lib64/xorg/modules/libfbdevhw.so
>[    31.696] (II) Module fbdevhw: vendor="X.Org Foundation"
>[    31.696] 	compiled for 1.12.3, module version = 0.0.2
>[    31.696] 	ABI class: X.Org Video Driver, version 12.0
>[    31.696] (II) RADEON(0): RADEONPreInit_KMS
>[    31.696] (II) RADEON(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>[    31.696] (==) RADEON(0): Depth 24, (--) framebuffer bpp 32
>[    31.696] (II) RADEON(0): Pixel depth = 24 bits stored in 4 bytes (32 bpp pixmaps)
>[    31.696] (==) RADEON(0): Default visual is TrueColor
>[    31.696] (==) RADEON(0): RGB weight 888
>[    31.696] (II) RADEON(0): Using 8 bits per RGB (8 bit DAC)
>[    31.696] (--) RADEON(0): Chipset: "ATI Mobility Radeon 4500 Series" (ChipID = 0x9553)
>[    31.697] (II) RADEON(0): PCIE card detected
>[    31.697] drmOpenDevice: node name is /dev/dri/card0
>[    31.697] drmOpenDevice: open result is 8, (OK)
>[    31.697] drmOpenByBusid: Searching for BusID pci:0000:01:00.0
>[    31.697] drmOpenDevice: node name is /dev/dri/card0
>[    31.697] drmOpenDevice: open result is 8, (OK)
>[    31.697] drmOpenByBusid: drmOpenMinor returns 8
>[    31.697] drmOpenByBusid: drmGetBusid reports pci:0000:01:00.0
>[    31.697] (II) Loading sub module "exa"
>[    31.697] (II) LoadModule: "exa"
>[    31.697] (II) Loading /usr/lib64/xorg/modules/libexa.so
>[    31.697] (II) Module exa: vendor="X.Org Foundation"
>[    31.697] 	compiled for 1.12.3, module version = 2.5.0
>[    31.697] 	ABI class: X.Org Video Driver, version 12.0
>[    31.697] (II) RADEON(0): KMS Color Tiling: enabled
>[    31.697] (II) RADEON(0): KMS Pageflipping: enabled
>[    31.697] (II) RADEON(0): SwapBuffers wait for vsync: enabled
>[    31.716] (II) RADEON(0): Output VGA-0 has no monitor section
>[    31.718] (II) RADEON(0): Output HDMI-0 has no monitor section
>[    31.718] (II) RADEON(0): Output LVDS has no monitor section
>[    31.738] (II) RADEON(0): EDID for output VGA-0
>[    31.742] (II) RADEON(0): EDID for output HDMI-0
>[    31.742] (II) RADEON(0): EDID for output LVDS
>[    31.742] (II) RADEON(0): Manufacturer: SEC  Model: 5441  Serial#: 0
>[    31.742] (II) RADEON(0): Year: 2008  Week: 0
>[    31.742] (II) RADEON(0): EDID Version: 1.3
>[    31.742] (II) RADEON(0): Digital Display Input
>[    31.742] (II) RADEON(0): Max Image Size [cm]: horiz.: 34  vert.: 19
>[    31.742] (II) RADEON(0): Gamma: 2.20
>[    31.742] (II) RADEON(0): No DPMS capabilities specified
>[    31.742] (II) RADEON(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>[    31.742] (II) RADEON(0): First detailed timing is preferred mode
>[    31.742] (II) RADEON(0): redX: 0.580 redY: 0.340   greenX: 0.310 greenY: 0.550
>[    31.742] (II) RADEON(0): blueX: 0.155 blueY: 0.155   whiteX: 0.313 whiteY: 0.329
>[    31.742] (II) RADEON(0): Manufacturer's mask: 0
>[    31.742] (II) RADEON(0): Supported detailed timing:
>[    31.742] (II) RADEON(0): clock: 72.3 MHz   Image Size:  353 x 198 mm
>[    31.742] (II) RADEON(0): h_active: 1366  h_sync: 1414  h_sync_end 1446 h_blank_end 1526 h_border: 0
>[    31.742] (II) RADEON(0): v_active: 768  v_sync: 770  v_sync_end 775 v_blanking: 790 v_border: 0
>[    31.742] (II) RADEON(0): Supported detailed timing:
>[    31.742] (II) RADEON(0): clock: 72.3 MHz   Image Size:  344 x 194 mm
>[    31.742] (II) RADEON(0): h_active: 1366  h_sync: 1414  h_sync_end 1446 h_blank_end 1526 h_border: 0
>[    31.742] (II) RADEON(0): v_active: 768  v_sync: 770  v_sync_end 775 v_blanking: 790 v_border: 0
>[    31.742] (II) RADEON(0):  C970J[80]156AT
>[    31.742] (II) RADEON(0): Unknown vendor-specific block 0
>[    31.742] (II) RADEON(0): EDID (in hex):
>[    31.742] (II) RADEON(0): 	00ffffffffffff004ca3415400000000
>[    31.742] (II) RADEON(0): 	00120103902213780a87f594574f8c27
>[    31.742] (II) RADEON(0): 	27505400000001010101010101010101
>[    31.742] (II) RADEON(0): 	010101010101411c56a0500016303020
>[    31.742] (II) RADEON(0): 	250061c61000001a411c56a050001630
>[    31.742] (II) RADEON(0): 	3020250058c21000001a000000fe0043
>[    31.742] (II) RADEON(0): 	3937304a8031353641540a2000000000
>[    31.743] (II) RADEON(0): 	00000000000000000001010a2020003e
>[    31.743] (II) RADEON(0): Printing probed modes for output LVDS
>[    31.743] (II) RADEON(0): Modeline "1366x768"x60.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[    31.743] (II) RADEON(0): Modeline "1280x720"x59.9   74.50  1280 1344 1472 1664  720 723 728 748 -hsync +vsync (44.8 kHz)
>[    31.743] (II) RADEON(0): Modeline "1152x768"x59.8   71.75  1152 1216 1328 1504  768 771 781 798 -hsync +vsync (47.7 kHz)
>[    31.743] (II) RADEON(0): Modeline "1024x768"x120.1  133.47  1024 1100 1212 1400  768 768 770 794 doublescan -hsync +vsync (95.3 kHz d)
>[    31.743] (II) RADEON(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz d)
>[    31.743] (II) RADEON(0): Modeline "1024x768"x59.9   63.50  1024 1072 1176 1328  768 771 775 798 -hsync +vsync (47.8 kHz)
>[    31.743] (II) RADEON(0): Modeline "960x720"x120.0  117.00  960 1024 1128 1300  720 720 722 750 doublescan -hsync +vsync (90.0 kHz d)
>[    31.743] (II) RADEON(0): Modeline "928x696"x120.1  109.15  928 976 1088 1264  696 696 698 719 doublescan -hsync +vsync (86.4 kHz d)
>[    31.743] (II) RADEON(0): Modeline "896x672"x120.0  102.40  896 960 1060 1224  672 672 674 697 doublescan -hsync +vsync (83.7 kHz d)
>[    31.743] (II) RADEON(0): Modeline "800x600"x120.0   81.00  800 832 928 1080  600 600 602 625 doublescan +hsync +vsync (75.0 kHz d)
>[    31.743] (II) RADEON(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz d)
>[    31.743] (II) RADEON(0): Modeline "800x600"x59.9   38.25  800 832 912 1024  600 603 607 624 -hsync +vsync (37.4 kHz)
>[    31.743] (II) RADEON(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz d)
>[    31.743] (II) RADEON(0): Modeline "848x480"x59.7   31.50  848 872 952 1056  480 483 493 500 -hsync +vsync (29.8 kHz)
>[    31.743] (II) RADEON(0): Modeline "700x525"x120.0   61.00  700 744 820 940  525 526 532 541 doublescan +hsync +vsync (64.9 kHz d)
>[    31.743] (II) RADEON(0): Modeline "720x480"x59.7   26.75  720 744 808 896  480 483 493 500 -hsync +vsync (29.9 kHz)
>[    31.743] (II) RADEON(0): Modeline "640x512"x120.0   54.00  640 664 720 844  512 512 514 533 doublescan +hsync +vsync (64.0 kHz d)
>[    31.743] (II) RADEON(0): Modeline "640x480"x120.0   54.00  640 688 744 900  480 480 482 500 doublescan +hsync +vsync (60.0 kHz d)
>[    31.743] (II) RADEON(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz d)
>[    31.743] (II) RADEON(0): Modeline "640x480"x59.4   23.75  640 664 720 800  480 483 487 500 -hsync +vsync (29.7 kHz)
>[    31.743] (II) RADEON(0): Modeline "512x384"x120.0   32.50  512 524 592 672  384 385 388 403 doublescan -hsync -vsync (48.4 kHz d)
>[    31.743] (II) RADEON(0): Modeline "400x300"x120.6   20.00  400 420 484 528  300 300 302 314 doublescan +hsync +vsync (37.9 kHz d)
>[    31.743] (II) RADEON(0): Modeline "400x300"x112.7   18.00  400 412 448 512  300 300 301 312 doublescan +hsync +vsync (35.2 kHz d)
>[    31.743] (II) RADEON(0): Modeline "320x240"x120.1   12.59  320 328 376 400  240 245 246 262 doublescan -hsync -vsync (31.5 kHz d)
>[    31.743] (II) RADEON(0): Output VGA-0 disconnected
>[    31.743] (II) RADEON(0): Output HDMI-0 disconnected
>[    31.743] (II) RADEON(0): Output LVDS connected
>[    31.743] (II) RADEON(0): Using exact sizes for initial modes
>[    31.743] (II) RADEON(0): Output LVDS using initial mode 1366x768 +0+0
>[    31.743] (II) RADEON(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>[    31.743] (II) RADEON(0): mem size init: gart size :1fdff000 vram size: s:20000000 visible:fba0000
>[    31.743] (II) RADEON(0): EXA: Driver will allow EXA pixmaps in VRAM
>[    31.743] (==) RADEON(0): DPI set to (96, 96)
>[    31.743] (II) Loading sub module "fb"
>[    31.743] (II) LoadModule: "fb"
>[    31.743] (II) Loading /usr/lib64/xorg/modules/libfb.so
>[    31.744] (II) Module fb: vendor="X.Org Foundation"
>[    31.744] 	compiled for 1.12.3, module version = 1.0.0
>[    31.744] 	ABI class: X.Org ANSI C Emulation, version 0.4
>[    31.744] (II) Loading sub module "ramdac"
>[    31.744] (II) LoadModule: "ramdac"
>[    31.744] (II) Module "ramdac" already built-in
>[    31.744] (II) UnloadModule: "vesa"
>[    31.744] (II) Unloading vesa
>[    31.744] (II) UnloadModule: "fbdev"
>[    31.744] (II) Unloading fbdev
>[    31.744] (II) UnloadSubModule: "fbdevhw"
>[    31.744] (II) Unloading fbdevhw
>[    31.744] (--) Depth 24 pixmap format is 32 bpp
>[    31.744] (II) RADEON(0): [DRI2] Setup complete
>[    31.744] (II) RADEON(0): [DRI2]   DRI driver: r600
>[    31.744] (II) RADEON(0): [DRI2]   VDPAU driver: r600
>[    31.744] (II) RADEON(0): Front buffer size: 4224K
>[    31.744] (II) RADEON(0): VRAM usage limit set to 228096K
>[    31.744] (II) RADEON(0): Initializing backing store
>[    31.744] (==) RADEON(0): Backing store disabled
>[    31.744] (II) RADEON(0): Direct rendering enabled
>[    31.744] (II) RADEON(0): Initializing Acceleration
>[    31.744] (II) RADEON(0): Setting EXA maxPitchBytes
>[    31.744] (II) EXA(0): Driver allocated offscreen pixmaps
>[    31.744] (II) EXA(0): Driver registered support for the following operations:
>[    31.744] (II)         Solid
>[    31.744] (II)         Copy
>[    31.744] (II)         Composite (RENDER acceleration)
>[    31.744] (II)         UploadToScreen
>[    31.744] (II)         DownloadFromScreen
>[    31.744] (II) RADEON(0): Acceleration enabled
>[    31.744] (II) RADEON(0): Initializing DPMS
>[    31.744] (==) RADEON(0): DPMS enabled
>[    31.744] (II) RADEON(0): Initializing Cursor
>[    31.744] (==) RADEON(0): Silken mouse enabled
>[    31.745] (II) RADEON(0): Initializing Xv
>[    31.745] (II) RADEON(0): Set up textured video
>[    31.745] (II) RADEON(0): [XvMC] Associated with Radeon Textured Video.
>[    31.745] (II) RADEON(0): [XvMC] Extension initialized.
>[    31.745] (II) RADEON(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>[    31.745] (II) RADEON(0): Initializing kms color map
>[    31.745] (II) RADEON(0): RADEONScreenInit finished
>[    31.745] (--) RandR disabled
>[    31.745] (II) Initializing built-in extension Generic Event Extension
>[    31.745] (II) Initializing built-in extension SHAPE
>[    31.745] (II) Initializing built-in extension MIT-SHM
>[    31.745] (II) Initializing built-in extension XInputExtension
>[    31.745] (II) Initializing built-in extension XTEST
>[    31.745] (II) Initializing built-in extension BIG-REQUESTS
>[    31.745] (II) Initializing built-in extension SYNC
>[    31.745] (II) Initializing built-in extension XKEYBOARD
>[    31.745] (II) Initializing built-in extension XC-MISC
>[    31.745] (II) Initializing built-in extension XINERAMA
>[    31.745] (II) Initializing built-in extension XFIXES
>[    31.745] (II) Initializing built-in extension RENDER
>[    31.745] (II) Initializing built-in extension RANDR
>[    31.745] (II) Initializing built-in extension COMPOSITE
>[    31.745] (II) Initializing built-in extension DAMAGE
>[    31.764] (II) SELinux: Disabled by boolean
>[    32.707] (II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>[    32.707] (II) AIGLX: enabled GLX_INTEL_swap_event
>[    32.707] (II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>[    32.707] (II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>[    32.708] (II) AIGLX: Loaded and initialized r600
>[    32.708] (II) GLX: Initialized DRI2 GL provider for screen 0
>[    32.709] (II) RADEON(0): Setting screen physical size to 361 x 203
>[    32.784] (II) XKB: Reusing cached keymap
>[    32.786] (II) config/udev: Adding input device Power Button (/dev/input/event3)
>[    32.786] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    32.787] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    32.787] (II) LoadModule: "evdev"
>[    32.787] (II) Loading /usr/lib64/xorg/modules/input/evdev_drv.so
>[    32.787] (II) Module evdev: vendor="X.Org Foundation"
>[    32.787] 	compiled for 1.12.0, module version = 2.7.0
>[    32.787] 	Module class: X.Org XInput Driver
>[    32.787] 	ABI class: X.Org XInput driver, version 16.0
>[    32.787] (II) Using input driver 'evdev' for 'Power Button'
>[    32.787] 	Option "XkbRules" "evdev"
>[    32.787] 	Option "XkbModel" "pc105+inet"
>[    32.787] 	Option "XkbLayout" "us"
>[    32.787] 	Option "_source" "server/udev"
>[    32.787] 	Option "name" "Power Button"
>[    32.787] 	Option "path" "/dev/input/event3"
>[    32.787] 	Option "device" "/dev/input/event3"
>[    32.787] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    32.787] 	Option "driver" "evdev"
>[    32.787] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.787] (**) Power Button: always reports core events
>[    32.787] (**) evdev: Power Button: Device: "/dev/input/event3"
>[    32.787] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    32.787] (--) evdev: Power Button: Found keys
>[    32.787] (II) evdev: Power Button: Configuring as keyboard
>[    32.787] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/LNXPWRBN:00/input/input3/event3"
>[    32.787] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 6)
>[    32.787] (**) Option "xkb_rules" "evdev"
>[    32.787] (**) Option "xkb_model" "pc105+inet"
>[    32.787] (**) Option "xkb_layout" "us"
>[    32.788] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.809] (II) config/udev: Adding input device Video Bus (/dev/input/event8)
>[    32.810] (**) Video Bus: Applying InputClass "evdev keyboard catchall"
>[    32.810] (**) Video Bus: Applying InputClass "system-setup-keyboard"
>[    32.810] (II) Using input driver 'evdev' for 'Video Bus'
>[    32.810] 	Option "XkbRules" "evdev"
>[    32.810] 	Option "XkbModel" "pc105+inet"
>[    32.810] 	Option "XkbLayout" "us"
>[    32.810] 	Option "_source" "server/udev"
>[    32.810] 	Option "name" "Video Bus"
>[    32.810] 	Option "path" "/dev/input/event8"
>[    32.810] 	Option "device" "/dev/input/event8"
>[    32.810] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input8/event8"
>[    32.810] 	Option "driver" "evdev"
>[    32.810] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.810] (**) Video Bus: always reports core events
>[    32.810] (**) evdev: Video Bus: Device: "/dev/input/event8"
>[    32.810] (--) evdev: Video Bus: Vendor 0 Product 0x6
>[    32.810] (--) evdev: Video Bus: Found keys
>[    32.810] (II) evdev: Video Bus: Configuring as keyboard
>[    32.810] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0A08:00/device:01/LNXVIDEO:00/input/input8/event8"
>[    32.810] (II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD, id 7)
>[    32.810] (**) Option "xkb_rules" "evdev"
>[    32.810] (**) Option "xkb_model" "pc105+inet"
>[    32.810] (**) Option "xkb_layout" "us"
>[    32.810] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.810] (II) XKB: Reusing cached keymap
>[    32.810] (II) config/udev: Adding input device Power Button (/dev/input/event0)
>[    32.810] (**) Power Button: Applying InputClass "evdev keyboard catchall"
>[    32.810] (**) Power Button: Applying InputClass "system-setup-keyboard"
>[    32.810] (II) Using input driver 'evdev' for 'Power Button'
>[    32.810] 	Option "XkbRules" "evdev"
>[    32.810] 	Option "XkbModel" "pc105+inet"
>[    32.810] 	Option "XkbLayout" "us"
>[    32.810] 	Option "_source" "server/udev"
>[    32.810] 	Option "name" "Power Button"
>[    32.810] 	Option "path" "/dev/input/event0"
>[    32.810] 	Option "device" "/dev/input/event0"
>[    32.810] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    32.810] 	Option "driver" "evdev"
>[    32.810] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.810] (**) Power Button: always reports core events
>[    32.810] (**) evdev: Power Button: Device: "/dev/input/event0"
>[    32.810] (--) evdev: Power Button: Vendor 0 Product 0x1
>[    32.810] (--) evdev: Power Button: Found keys
>[    32.810] (II) evdev: Power Button: Configuring as keyboard
>[    32.811] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0C:00/input/input0/event0"
>[    32.811] (II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD, id 8)
>[    32.811] (**) Option "xkb_rules" "evdev"
>[    32.811] (**) Option "xkb_model" "pc105+inet"
>[    32.811] (**) Option "xkb_layout" "us"
>[    32.811] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.811] (II) XKB: Reusing cached keymap
>[    32.811] (II) config/udev: Adding input device Lid Switch (/dev/input/event2)
>[    32.811] (II) No input driver specified, ignoring this device.
>[    32.811] (II) This device may have been added with another device file.
>[    32.811] (II) config/udev: Adding input device Sleep Button (/dev/input/event1)
>[    32.811] (**) Sleep Button: Applying InputClass "evdev keyboard catchall"
>[    32.811] (**) Sleep Button: Applying InputClass "system-setup-keyboard"
>[    32.811] (II) Using input driver 'evdev' for 'Sleep Button'
>[    32.811] 	Option "XkbRules" "evdev"
>[    32.811] 	Option "XkbModel" "pc105+inet"
>[    32.811] 	Option "XkbLayout" "us"
>[    32.811] 	Option "_source" "server/udev"
>[    32.811] 	Option "name" "Sleep Button"
>[    32.811] 	Option "path" "/dev/input/event1"
>[    32.811] 	Option "device" "/dev/input/event1"
>[    32.811] 	Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    32.811] 	Option "driver" "evdev"
>[    32.811] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.811] (**) Sleep Button: always reports core events
>[    32.811] (**) evdev: Sleep Button: Device: "/dev/input/event1"
>[    32.811] (--) evdev: Sleep Button: Vendor 0 Product 0x3
>[    32.811] (--) evdev: Sleep Button: Found keys
>[    32.811] (II) evdev: Sleep Button: Configuring as keyboard
>[    32.811] (**) Option "config_info" "udev:/sys/devices/LNXSYSTM:00/device:00/PNP0C0E:00/input/input1/event1"
>[    32.812] (II) XINPUT: Adding extended input device "Sleep Button" (type: KEYBOARD, id 9)
>[    32.812] (**) Option "xkb_rules" "evdev"
>[    32.812] (**) Option "xkb_model" "pc105+inet"
>[    32.812] (**) Option "xkb_layout" "us"
>[    32.812] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.812] (II) XKB: Reusing cached keymap
>[    32.812] (II) config/udev: Adding input device HDA ATI HDMI HDMI/DP,pcm=3 (/dev/input/event12)
>[    32.812] (II) No input driver specified, ignoring this device.
>[    32.812] (II) This device may have been added with another device file.
>[    32.812] (II) config/udev: Adding input device HID 413c:8157 (/dev/input/event6)
>[    32.812] (**) HID 413c:8157: Applying InputClass "evdev keyboard catchall"
>[    32.812] (**) HID 413c:8157: Applying InputClass "system-setup-keyboard"
>[    32.812] (II) Using input driver 'evdev' for 'HID 413c:8157'
>[    32.812] 	Option "XkbRules" "evdev"
>[    32.812] 	Option "XkbModel" "pc105+inet"
>[    32.812] 	Option "XkbLayout" "us"
>[    32.812] 	Option "_source" "server/udev"
>[    32.812] 	Option "name" "HID 413c:8157"
>[    32.812] 	Option "path" "/dev/input/event6"
>[    32.812] 	Option "device" "/dev/input/event6"
>[    32.812] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1:1.0/input/input6/event6"
>[    32.812] 	Option "driver" "evdev"
>[    32.812] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.812] (**) HID 413c:8157: always reports core events
>[    32.813] (**) evdev: HID 413c:8157: Device: "/dev/input/event6"
>[    32.813] (--) evdev: HID 413c:8157: Vendor 0x413c Product 0x8157
>[    32.813] (--) evdev: HID 413c:8157: Found keys
>[    32.813] (II) evdev: HID 413c:8157: Configuring as keyboard
>[    32.813] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.1/3-1.1:1.0/input/input6/event6"
>[    32.813] (II) XINPUT: Adding extended input device "HID 413c:8157" (type: KEYBOARD, id 10)
>[    32.813] (**) Option "xkb_rules" "evdev"
>[    32.813] (**) Option "xkb_model" "pc105+inet"
>[    32.813] (**) Option "xkb_layout" "us"
>[    32.813] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.813] (II) XKB: Reusing cached keymap
>[    32.813] (II) config/udev: Adding input device HID 413c:8158 (/dev/input/event7)
>[    32.813] (**) HID 413c:8158: Applying InputClass "evdev pointer catchall"
>[    32.813] (II) Using input driver 'evdev' for 'HID 413c:8158'
>[    32.813] 	Option "XkbRules" "evdev"
>[    32.813] 	Option "XkbModel" "evdev"
>[    32.813] 	Option "XkbLayout" "us"
>[    32.813] 	Option "_source" "server/udev"
>[    32.813] 	Option "name" "HID 413c:8158"
>[    32.813] 	Option "path" "/dev/input/event7"
>[    32.813] 	Option "device" "/dev/input/event7"
>[    32.813] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.2/3-1.2:1.0/input/input7/event7"
>[    32.813] 	Option "driver" "evdev"
>[    32.813] (**) HID 413c:8158: always reports core events
>[    32.813] (**) evdev: HID 413c:8158: Device: "/dev/input/event7"
>[    32.813] (--) evdev: HID 413c:8158: Vendor 0x413c Product 0x8158
>[    32.813] (--) evdev: HID 413c:8158: Found 3 mouse buttons
>[    32.813] (--) evdev: HID 413c:8158: Found relative axes
>[    32.813] (--) evdev: HID 413c:8158: Found x and y relative axes
>[    32.813] (II) evdev: HID 413c:8158: Configuring as mouse
>[    32.813] (**) evdev: HID 413c:8158: YAxisMapping: buttons 4 and 5
>[    32.813] (**) evdev: HID 413c:8158: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[    32.813] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.0/usb3/3-1/3-1.2/3-1.2:1.0/input/input7/event7"
>[    32.813] (II) XINPUT: Adding extended input device "HID 413c:8158" (type: MOUSE, id 11)
>[    32.814] (II) evdev: HID 413c:8158: initialized for relative axes.
>[    32.814] (**) HID 413c:8158: (accel) keeping acceleration scheme 1
>[    32.814] (**) HID 413c:8158: (accel) acceleration profile 0
>[    32.814] (**) HID 413c:8158: (accel) acceleration factor: 2.000
>[    32.814] (**) HID 413c:8158: (accel) acceleration threshold: 4
>[    32.814] (II) config/udev: Adding input device HID 413c:8158 (/dev/input/mouse1)
>[    32.814] (II) No input driver specified, ignoring this device.
>[    32.814] (II) This device may have been added with another device file.
>[    32.814] (II) config/udev: Adding input device Laptop_Integrated_Webcam_2M (/dev/input/event10)
>[    32.814] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "evdev keyboard catchall"
>[    32.814] (**) Laptop_Integrated_Webcam_2M: Applying InputClass "system-setup-keyboard"
>[    32.814] (II) Using input driver 'evdev' for 'Laptop_Integrated_Webcam_2M'
>[    32.814] 	Option "XkbRules" "evdev"
>[    32.814] 	Option "XkbModel" "pc105+inet"
>[    32.814] 	Option "XkbLayout" "us"
>[    32.814] 	Option "_source" "server/udev"
>[    32.814] 	Option "name" "Laptop_Integrated_Webcam_2M"
>[    32.814] 	Option "path" "/dev/input/event10"
>[    32.814] 	Option "device" "/dev/input/event10"
>[    32.814] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.7/usb1/1-6/1-6:1.0/input/input10/event10"
>[    32.814] 	Option "driver" "evdev"
>[    32.814] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.814] (**) Laptop_Integrated_Webcam_2M: always reports core events
>[    32.814] (**) evdev: Laptop_Integrated_Webcam_2M: Device: "/dev/input/event10"
>[    32.814] (--) evdev: Laptop_Integrated_Webcam_2M: Vendor 0xc45 Product 0x63ea
>[    32.814] (--) evdev: Laptop_Integrated_Webcam_2M: Found keys
>[    32.814] (II) evdev: Laptop_Integrated_Webcam_2M: Configuring as keyboard
>[    32.814] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1a.7/usb1/1-6/1-6:1.0/input/input10/event10"
>[    32.815] (II) XINPUT: Adding extended input device "Laptop_Integrated_Webcam_2M" (type: KEYBOARD, id 12)
>[    32.815] (**) Option "xkb_rules" "evdev"
>[    32.815] (**) Option "xkb_model" "pc105+inet"
>[    32.815] (**) Option "xkb_layout" "us"
>[    32.815] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.815] (II) XKB: Reusing cached keymap
>[    32.815] (II) config/udev: Adding input device HDA Intel Mic (/dev/input/event11)
>[    32.815] (II) No input driver specified, ignoring this device.
>[    32.815] (II) This device may have been added with another device file.
>[    32.815] (II) config/udev: Adding input device AT Translated Set 2 keyboard (/dev/input/event4)
>[    32.815] (**) AT Translated Set 2 keyboard: Applying InputClass "evdev keyboard catchall"
>[    32.815] (**) AT Translated Set 2 keyboard: Applying InputClass "system-setup-keyboard"
>[    32.815] (II) Using input driver 'evdev' for 'AT Translated Set 2 keyboard'
>[    32.815] 	Option "XkbRules" "evdev"
>[    32.815] 	Option "XkbModel" "pc105+inet"
>[    32.815] 	Option "XkbLayout" "us"
>[    32.815] 	Option "_source" "server/udev"
>[    32.815] 	Option "name" "AT Translated Set 2 keyboard"
>[    32.815] 	Option "path" "/dev/input/event4"
>[    32.815] 	Option "device" "/dev/input/event4"
>[    32.815] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    32.815] 	Option "driver" "evdev"
>[    32.815] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.815] (**) AT Translated Set 2 keyboard: always reports core events
>[    32.815] (**) evdev: AT Translated Set 2 keyboard: Device: "/dev/input/event4"
>[    32.815] (--) evdev: AT Translated Set 2 keyboard: Vendor 0x1 Product 0x1
>[    32.816] (--) evdev: AT Translated Set 2 keyboard: Found keys
>[    32.816] (II) evdev: AT Translated Set 2 keyboard: Configuring as keyboard
>[    32.816] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio0/input/input4/event4"
>[    32.816] (II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD, id 13)
>[    32.816] (**) Option "xkb_rules" "evdev"
>[    32.816] (**) Option "xkb_model" "pc105+inet"
>[    32.816] (**) Option "xkb_layout" "us"
>[    32.816] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.816] (II) XKB: Reusing cached keymap
>[    32.816] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/event5)
>[    32.816] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "evdev touchpad catchall"
>[    32.816] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "touchpad catchall"
>[    32.816] (**) SynPS/2 Synaptics TouchPad: Applying InputClass "Default clickpad buttons"
>[    32.816] (II) LoadModule: "synaptics"
>[    32.816] (II) Loading /usr/lib64/xorg/modules/input/synaptics_drv.so
>[    32.816] (II) Module synaptics: vendor="X.Org Foundation"
>[    32.816] 	compiled for 1.12.3, module version = 1.6.2
>[    32.817] 	Module class: X.Org XInput Driver
>[    32.817] 	ABI class: X.Org XInput driver, version 16.0
>[    32.817] (II) Using input driver 'synaptics' for 'SynPS/2 Synaptics TouchPad'
>[    32.817] 	Option "_source" "server/udev"
>[    32.817] 	Option "name" "SynPS/2 Synaptics TouchPad"
>[    32.817] 	Option "path" "/dev/input/event5"
>[    32.817] 	Option "device" "/dev/input/event5"
>[    32.817] 	Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    32.817] 	Option "driver" "synaptics"
>[    32.817] 	Option "SoftButtonAreas" "50% 0 82% 0 0 0 0 0"
>[    32.817] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    32.817] (**) Option "Device" "/dev/input/event5"
>[    32.838] (**) Option "Device" "/dev/input/event5"
>[    32.838] port opened successfully
>[    32.838] (II) synaptics: SynPS/2 Synaptics TouchPad: ignoring touch events for semi-multitouch device
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5836
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4908
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: finger width range 0 - 15
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: buttons: left right double triple
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: Vendor 0x2 Product 0x7
>[    32.838] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    32.838] (**) SynPS/2 Synaptics TouchPad: always reports core events
>[    32.848] (**) Option "config_info" "udev:/sys/devices/platform/i8042/serio1/input/input5/event5"
>[    32.848] (II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD, id 14)
>[    32.848] (**) synaptics: SynPS/2 Synaptics TouchPad: (accel) MinSpeed is now constant deceleration 2.5
>[    32.848] (**) synaptics: SynPS/2 Synaptics TouchPad: MaxSpeed is now 1.75
>[    32.848] (**) synaptics: SynPS/2 Synaptics TouchPad: AccelFactor is now 0.036
>[    32.849] (**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>[    32.849] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration profile 1
>[    32.849] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration factor: 2.000
>[    32.849] (**) SynPS/2 Synaptics TouchPad: (accel) acceleration threshold: 4
>[    32.849] (**) Option "Device" "/dev/input/event5"
>[    32.849] (--) synaptics: SynPS/2 Synaptics TouchPad: touchpad found
>[    32.850] (II) config/udev: Adding input device SynPS/2 Synaptics TouchPad (/dev/input/mouse0)
>[    32.850] (II) No input driver specified, ignoring this device.
>[    32.850] (II) This device may have been added with another device file.
>[    32.851] (II) config/udev: Adding input device Dell WMI hotkeys (/dev/input/event9)
>[    32.851] (**) Dell WMI hotkeys: Applying InputClass "evdev keyboard catchall"
>[    32.852] (**) Dell WMI hotkeys: Applying InputClass "system-setup-keyboard"
>[    32.852] (II) Using input driver 'evdev' for 'Dell WMI hotkeys'
>[    32.852] 	Option "XkbRules" "evdev"
>[    32.852] 	Option "XkbModel" "pc105+inet"
>[    32.852] 	Option "XkbLayout" "us"
>[    32.852] 	Option "_source" "server/udev"
>[    32.852] 	Option "name" "Dell WMI hotkeys"
>[    32.852] 	Option "path" "/dev/input/event9"
>[    32.852] 	Option "device" "/dev/input/event9"
>[    32.852] 	Option "config_info" "udev:/sys/devices/virtual/input/input9/event9"
>[    32.852] 	Option "driver" "evdev"
>[    32.852] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[    32.852] (**) Dell WMI hotkeys: always reports core events
>[    32.852] (**) evdev: Dell WMI hotkeys: Device: "/dev/input/event9"
>[    32.852] (--) evdev: Dell WMI hotkeys: Vendor 0 Product 0
>[    32.852] (--) evdev: Dell WMI hotkeys: Found keys
>[    32.852] (II) evdev: Dell WMI hotkeys: Configuring as keyboard
>[    32.852] (**) Option "config_info" "udev:/sys/devices/virtual/input/input9/event9"
>[    32.852] (II) XINPUT: Adding extended input device "Dell WMI hotkeys" (type: KEYBOARD, id 15)
>[    32.852] (**) Option "xkb_rules" "evdev"
>[    32.852] (**) Option "xkb_model" "pc105+inet"
>[    32.852] (**) Option "xkb_layout" "us"
>[    32.852] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[    32.852] (II) XKB: Reusing cached keymap
>[    32.864] (II) RADEON(0): RADEONSaveScreen(2)
>[    32.882] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[    32.882] (II) RADEON(0): Printing DDC gathered Modelines:
>[    32.882] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[    34.896] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[    34.896] (II) RADEON(0): Printing DDC gathered Modelines:
>[    34.897] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[    98.138] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[    98.138] (II) RADEON(0): Printing DDC gathered Modelines:
>[    98.138] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[    98.445] (II) RADEON(0): Allocate new frame buffer 3286x1080 stride 3296
>[    98.445] (II) RADEON(0): VRAM usage limit set to 219383K
>[   100.060] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c5250]
>[   100.083] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c5250] width 3286 pitch 13184 (/4 3296)
>[   100.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c5ff0]
>[   100.316] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c5ff0] width 3286 pitch 13184 (/4 3296)
>[   100.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c6290]
>[   100.533] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c6290] width 3286 pitch 13184 (/4 3296)
>[   113.696] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c6290]
>[   113.719] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c6290] width 3286 pitch 13184 (/4 3296)
>[   113.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21931d0]
>[   113.752] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21931d0] width 3286 pitch 13184 (/4 3296)
>[   113.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c6290]
>[   113.800] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c6290] width 3286 pitch 13184 (/4 3296)
>[   126.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.039] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.183] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.210] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.233] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.256] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.283] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.333] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.367] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.380] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.400] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.423] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.489] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.492] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.639] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.643] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.690] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.693] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.767] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.790] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.840] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.867] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.890] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   126.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   126.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   126.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   126.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   127.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   127.356] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   127.357] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   127.383] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   127.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   127.406] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   127.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   127.433] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   127.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   127.456] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   127.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   127.490] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   127.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   127.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   127.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   127.540] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   128.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   128.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   128.577] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   128.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   128.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   128.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   129.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   129.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   129.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   129.307] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   129.788] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   129.817] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   130.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   130.041] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   130.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   130.257] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   130.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   130.458] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   130.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   130.617] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   130.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   130.841] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   131.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   131.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   131.730] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d900]
>[   131.758] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d900] width 3286 pitch 13184 (/4 3296)
>[   132.107] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x218d8a0]
>[   132.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x218d8a0] width 3286 pitch 13184 (/4 3296)
>[   132.460] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21a78d0]
>[   134.154] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[   134.155] (II) RADEON(0): Printing DDC gathered Modelines:
>[   134.155] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[   138.376] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[   138.376] (II) RADEON(0): Printing DDC gathered Modelines:
>[   138.376] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[   138.789] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[   138.789] (II) RADEON(0): Printing DDC gathered Modelines:
>[   138.789] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[   146.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201f20]
>[   146.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201f20] width 3286 pitch 13184 (/4 3296)
>[   146.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201ec0]
>[   147.001] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201ec0] width 3286 pitch 13184 (/4 3296)
>[   147.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201f20]
>[   147.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201f20] width 3286 pitch 13184 (/4 3296)
>[   147.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201ec0]
>[   147.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201ec0] width 3286 pitch 13184 (/4 3296)
>[   147.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201f20]
>[   147.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201f20] width 3286 pitch 13184 (/4 3296)
>[   147.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   147.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   148.823] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   148.852] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   148.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   148.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   148.881] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   148.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   148.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   148.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   148.931] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   148.952] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   148.952] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   148.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   148.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   149.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   149.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   149.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   149.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   149.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   149.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   149.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   149.400] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   149.418] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   149.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205b00]
>[   149.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205b00] width 3286 pitch 13184 (/4 3296)
>[   164.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   164.189] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   177.279] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   177.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   177.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   177.514] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.544] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   177.546] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   177.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   177.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   177.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   177.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   177.597] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   177.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   177.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   177.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   177.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   177.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   177.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   177.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   177.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   177.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   177.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   181.714] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   181.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.746] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   181.747] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   181.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.795] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   181.796] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   181.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   181.831] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   181.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   181.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   181.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   181.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   181.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   181.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   181.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   203.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   203.552] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   203.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   203.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   203.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   203.602] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   203.611] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   203.635] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   203.656] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   203.669] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   203.676] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   203.702] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   203.722] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   203.735] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   203.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   203.985] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   204.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   204.035] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   204.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   204.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   204.272] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   204.296] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   204.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   204.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   204.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   204.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   204.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   204.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   204.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   204.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   204.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   204.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   204.443] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   204.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   204.477] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   204.502] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.052] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.303] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.336] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.342] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.369] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.375] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.402] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.410] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.436] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.444] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.478] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.531] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.586] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.797] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.822] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   205.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   205.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   205.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   205.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   206.002] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   206.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   206.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   206.031] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   206.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   206.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   206.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   206.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   206.803] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   206.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   206.836] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   206.844] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   206.870] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   206.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   206.903] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   206.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   206.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   206.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   206.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   206.969] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   206.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   207.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   207.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   207.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   207.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   207.572] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   207.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   207.807] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   207.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   208.104] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   208.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   208.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209550]
>[   208.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209550] width 3286 pitch 13184 (/4 3296)
>[   209.485] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22094f0]
>[   209.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22094f0] width 3286 pitch 13184 (/4 3296)
>[   212.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   212.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   212.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   212.621] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   212.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   212.772] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   212.775] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   212.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   212.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   212.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   212.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   213.022] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   213.028] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   213.055] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   213.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   213.088] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   213.093] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   213.122] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   213.127] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   213.155] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   213.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   213.188] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   213.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   213.222] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   213.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   213.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   213.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   213.805] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   213.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   214.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   214.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   214.322] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   215.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   215.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   215.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   215.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   216.005] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   216.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   216.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   216.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   216.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   216.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   216.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   216.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   216.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   216.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   216.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   216.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   216.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   216.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   216.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   216.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   216.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   217.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   217.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   217.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   223.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2171bc0]
>[   223.342] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2171bc0] width 3286 pitch 13184 (/4 3296)
>[   223.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   223.396] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   263.462] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   263.488] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   263.495] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   263.521] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   264.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   264.388] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   264.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   264.421] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   265.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   265.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   266.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   266.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   266.496] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   266.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   266.526] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   266.555] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   266.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   266.589] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   266.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   266.622] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   266.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   266.656] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   266.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   266.689] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   266.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   266.722] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   266.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2205aa0]
>[   266.756] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2205aa0] width 3286 pitch 13184 (/4 3296)
>[   266.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   266.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   267.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   267.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   267.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   267.306] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   267.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   267.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   267.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   267.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   267.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   267.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   267.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   267.446] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   267.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   267.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   268.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   268.856] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   268.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   268.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   268.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   268.940] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   268.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   268.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   269.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   269.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   269.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   269.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   269.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   269.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   269.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   269.956] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   269.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   269.990] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   269.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   270.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   270.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   270.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   270.048] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   270.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   270.075] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   270.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   270.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   270.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   270.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   270.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   270.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   270.190] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   270.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   270.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   270.214] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2209860]
>[   270.240] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2209860] width 3286 pitch 13184 (/4 3296)
>[   270.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2201d00]
>[   270.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2201d00] width 3286 pitch 13184 (/4 3296)
>[   271.090] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c7750]
>[   271.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c7750] width 3286 pitch 13184 (/4 3296)
>[   271.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242430]
>[   271.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242430] width 3286 pitch 13184 (/4 3296)
>[   271.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c8dd0]
>[   271.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c8dd0] width 3286 pitch 13184 (/4 3296)
>[   271.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242430]
>[   271.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242430] width 3286 pitch 13184 (/4 3296)
>[   271.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c8dd0]
>[   271.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c8dd0] width 3286 pitch 13184 (/4 3296)
>[   271.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242430]
>[   271.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242430] width 3286 pitch 13184 (/4 3296)
>[   271.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c8dd0]
>[   271.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c8dd0] width 3286 pitch 13184 (/4 3296)
>[   271.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242430]
>[   271.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242430] width 3286 pitch 13184 (/4 3296)
>[   271.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c8dd0]
>[   271.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c8dd0] width 3286 pitch 13184 (/4 3296)
>[   271.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2242430]
>[   271.573] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2242430] width 3286 pitch 13184 (/4 3296)
>[   277.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   277.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   277.764] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   277.792] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   277.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   277.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   277.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   277.842] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   277.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   277.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   277.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   277.892] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   277.896] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   277.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   277.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   277.942] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   277.946] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   277.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   277.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   277.992] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   277.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   278.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   278.361] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   278.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   278.393] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   278.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   278.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   278.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   278.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   278.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   278.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   278.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   278.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   278.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   278.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   278.593] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   278.594] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   278.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   278.627] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   278.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   279.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   279.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   279.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   279.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   279.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   279.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   281.306] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   281.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   281.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22437b0]
>[   281.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22437b0] width 3286 pitch 13184 (/4 3296)
>[   281.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240f90]
>[   281.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240f90] width 3286 pitch 13184 (/4 3296)
>[   281.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2245920]
>[   281.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2245920] width 3286 pitch 13184 (/4 3296)
>[   282.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bd030]
>[   282.093] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bd030] width 3286 pitch 13184 (/4 3296)
>[   282.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d12b0]
>[   282.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d12b0] width 3286 pitch 13184 (/4 3296)
>[   282.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bd030]
>[   282.160] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bd030] width 3286 pitch 13184 (/4 3296)
>[   282.164] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   282.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   282.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bd030]
>[   282.210] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bd030] width 3286 pitch 13184 (/4 3296)
>[   282.212] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fbf2f0]
>[   282.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fbf2f0] width 3286 pitch 13184 (/4 3296)
>[   282.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20bd030]
>[   282.246] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20bd030] width 3286 pitch 13184 (/4 3296)
>[   283.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22361a0]
>[   283.611] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22361a0] width 3286 pitch 13184 (/4 3296)
>[   283.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   283.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   283.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   283.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   283.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   283.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   283.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   283.827] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   283.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   283.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   283.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   283.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   283.973] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   283.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   284.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   284.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   284.610] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   284.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   284.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   284.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   284.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c6c0]
>[   284.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c6c0] width 3286 pitch 13184 (/4 3296)
>[   284.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   284.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   284.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   284.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   284.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   284.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   284.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   284.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   284.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c6c0]
>[   284.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c6c0] width 3286 pitch 13184 (/4 3296)
>[   285.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22239f0]
>[   285.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22239f0] width 3286 pitch 13184 (/4 3296)
>[   285.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2223990]
>[   285.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2223990] width 3286 pitch 13184 (/4 3296)
>[   285.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c6c0]
>[   285.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c6c0] width 3286 pitch 13184 (/4 3296)
>[   285.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20ca580]
>[   285.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20ca580] width 3286 pitch 13184 (/4 3296)
>[   285.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2254df0]
>[   285.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2254df0] width 3286 pitch 13184 (/4 3296)
>[   285.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258df0]
>[   285.661] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258df0] width 3286 pitch 13184 (/4 3296)
>[   285.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22567a0]
>[   285.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22567a0] width 3286 pitch 13184 (/4 3296)
>[   285.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20ca580]
>[   285.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20ca580] width 3286 pitch 13184 (/4 3296)
>[   285.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22567a0]
>[   285.745] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22567a0] width 3286 pitch 13184 (/4 3296)
>[   285.748] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20ca580]
>[   285.778] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20ca580] width 3286 pitch 13184 (/4 3296)
>[   285.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22567a0]
>[   285.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22567a0] width 3286 pitch 13184 (/4 3296)
>[   286.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225590]
>[   286.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225590] width 3286 pitch 13184 (/4 3296)
>[   286.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22274c0]
>[   286.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22274c0] width 3286 pitch 13184 (/4 3296)
>[   286.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2226510]
>[   286.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2226510] width 3286 pitch 13184 (/4 3296)
>[   558.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2231390]
>[   558.932] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2231390] width 3286 pitch 13184 (/4 3296)
>[   560.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225fd0]
>[   560.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225fd0] width 3286 pitch 13184 (/4 3296)
>[   560.313] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2231390]
>[   560.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2231390] width 3286 pitch 13184 (/4 3296)
>[   560.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225fd0]
>[   560.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225fd0] width 3286 pitch 13184 (/4 3296)
>[   560.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2231390]
>[   560.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2231390] width 3286 pitch 13184 (/4 3296)
>[   560.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225fd0]
>[   560.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225fd0] width 3286 pitch 13184 (/4 3296)
>[   560.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2231390]
>[   560.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2231390] width 3286 pitch 13184 (/4 3296)
>[   560.493] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225fd0]
>[   560.516] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225fd0] width 3286 pitch 13184 (/4 3296)
>[   560.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2231390]
>[   560.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2231390] width 3286 pitch 13184 (/4 3296)
>[   561.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225fd0]
>[   561.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225fd0] width 3286 pitch 13184 (/4 3296)
>[   561.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2259000]
>[   561.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2259000] width 3286 pitch 13184 (/4 3296)
>[   561.619] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22489e0]
>[   561.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22489e0] width 3286 pitch 13184 (/4 3296)
>[   561.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2259000]
>[   561.666] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2259000] width 3286 pitch 13184 (/4 3296)
>[   561.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24732c0]
>[   561.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24732c0] width 3286 pitch 13184 (/4 3296)
>[   562.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c910]
>[   562.391] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c910] width 3286 pitch 13184 (/4 3296)
>[   562.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2285670]
>[   562.449] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2285670] width 3286 pitch 13184 (/4 3296)
>[   562.457] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c910]
>[   562.483] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c910] width 3286 pitch 13184 (/4 3296)
>[   562.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2285670]
>[   562.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2285670] width 3286 pitch 13184 (/4 3296)
>[   562.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c910]
>[   562.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c910] width 3286 pitch 13184 (/4 3296)
>[   562.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2285670]
>[   562.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2285670] width 3286 pitch 13184 (/4 3296)
>[   562.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247c910]
>[   562.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247c910] width 3286 pitch 13184 (/4 3296)
>[   562.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2285670]
>[   562.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2285670] width 3286 pitch 13184 (/4 3296)
>[   562.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226f540]
>[   563.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226f540] width 3286 pitch 13184 (/4 3296)
>[   567.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22842f0]
>[   567.553] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22842f0] width 3286 pitch 13184 (/4 3296)
>[   569.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a9890]
>[   569.686] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a9890] width 3286 pitch 13184 (/4 3296)
>[   571.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2227440]
>[   571.053] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2227440] width 3286 pitch 13184 (/4 3296)
>[   571.858] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   571.886] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   571.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   571.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   571.914] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   571.937] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   571.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   571.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   571.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   571.987] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   571.989] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.037] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.039] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.122] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.503] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.507] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.537] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.543] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.604] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.613] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.641] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.670] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   572.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   572.703] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   572.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   572.737] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   573.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   573.304] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   573.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250670]
>[   573.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250670] width 3286 pitch 13184 (/4 3296)
>[   573.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217e10]
>[   573.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217e10] width 3286 pitch 13184 (/4 3296)
>[   573.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   573.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   573.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217e10]
>[   573.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217e10] width 3286 pitch 13184 (/4 3296)
>[   574.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221bca0]
>[   574.320] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221bca0] width 3286 pitch 13184 (/4 3296)
>[   574.344] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x216f610]
>[   574.370] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x216f610] width 3286 pitch 13184 (/4 3296)
>[   574.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d12b0]
>[   574.403] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d12b0] width 3286 pitch 13184 (/4 3296)
>[   574.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x216f610]
>[   574.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x216f610] width 3286 pitch 13184 (/4 3296)
>[   574.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d12b0]
>[   574.453] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d12b0] width 3286 pitch 13184 (/4 3296)
>[   574.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x216f610]
>[   574.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x216f610] width 3286 pitch 13184 (/4 3296)
>[   574.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f54d20]
>[   574.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f54d20] width 3286 pitch 13184 (/4 3296)
>[   574.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x216f610]
>[   574.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x216f610] width 3286 pitch 13184 (/4 3296)
>[   574.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f54d20]
>[   574.570] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f54d20] width 3286 pitch 13184 (/4 3296)
>[   574.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x216f610]
>[   574.596] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x216f610] width 3286 pitch 13184 (/4 3296)
>[   578.695] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a83a0]
>[   578.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a83a0] width 3286 pitch 13184 (/4 3296)
>[   578.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a8450]
>[   578.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a8450] width 3286 pitch 13184 (/4 3296)
>[   578.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a83a0]
>[   578.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a83a0] width 3286 pitch 13184 (/4 3296)
>[   578.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a8450]
>[   578.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a8450] width 3286 pitch 13184 (/4 3296)
>[   578.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a83a0]
>[   578.838] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a83a0] width 3286 pitch 13184 (/4 3296)
>[   578.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a8450]
>[   578.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a8450] width 3286 pitch 13184 (/4 3296)
>[   578.865] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a83a0]
>[   578.888] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a83a0] width 3286 pitch 13184 (/4 3296)
>[   578.891] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a8450]
>[   578.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a8450] width 3286 pitch 13184 (/4 3296)
>[   578.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20ca360]
>[   578.938] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20ca360] width 3286 pitch 13184 (/4 3296)
>[   578.965] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a8450]
>[   578.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a8450] width 3286 pitch 13184 (/4 3296)
>[   579.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22360b0]
>[   579.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22360b0] width 3286 pitch 13184 (/4 3296)
>[   579.734] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2224c60]
>[   579.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2224c60] width 3286 pitch 13184 (/4 3296)
>[   580.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2224c60]
>[   580.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2224c60] width 3286 pitch 13184 (/4 3296)
>[   580.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22208d0]
>[   580.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22208d0] width 3286 pitch 13184 (/4 3296)
>[   580.119] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22250e0]
>[   580.146] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22250e0] width 3286 pitch 13184 (/4 3296)
>[   580.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2224c60]
>[   580.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2224c60] width 3286 pitch 13184 (/4 3296)
>[   580.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2225150]
>[   580.305] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2225150] width 3286 pitch 13184 (/4 3296)
>[   580.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22250e0]
>[   580.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22250e0] width 3286 pitch 13184 (/4 3296)
>[   580.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22846d0]
>[   580.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22846d0] width 3286 pitch 13184 (/4 3296)
>[   580.856] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c5d0]
>[   580.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c5d0] width 3286 pitch 13184 (/4 3296)
>[   580.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c570]
>[   580.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c570] width 3286 pitch 13184 (/4 3296)
>[   580.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2418220]
>[   580.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2418220] width 3286 pitch 13184 (/4 3296)
>[   580.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   580.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   581.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2275c30]
>[   581.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2275c30] width 3286 pitch 13184 (/4 3296)
>[   581.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3cea940]
>[   581.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3cea940] width 3286 pitch 13184 (/4 3296)
>[   581.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d2f0]
>[   581.119] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d2f0] width 3286 pitch 13184 (/4 3296)
>[   581.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f4c0]
>[   581.156] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f4c0] width 3286 pitch 13184 (/4 3296)
>[   581.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470280]
>[   581.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470280] width 3286 pitch 13184 (/4 3296)
>[   581.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d2f0]
>[   581.206] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d2f0] width 3286 pitch 13184 (/4 3296)
>[   581.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2470280]
>[   581.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2470280] width 3286 pitch 13184 (/4 3296)
>[   581.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d2f0]
>[   581.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d2f0] width 3286 pitch 13184 (/4 3296)
>[   582.761] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2392c10]
>[   582.789] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2392c10] width 3286 pitch 13184 (/4 3296)
>[   582.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23de5a0]
>[   582.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23de5a0] width 3286 pitch 13184 (/4 3296)
>[   582.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23dede0]
>[   582.875] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23dede0] width 3286 pitch 13184 (/4 3296)
>[   582.880] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23dec10]
>[   582.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23dec10] width 3286 pitch 13184 (/4 3296)
>[   582.916] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23deec0]
>[   582.939] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23deec0] width 3286 pitch 13184 (/4 3296)
>[   582.943] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23de750]
>[   582.973] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23de750] width 3286 pitch 13184 (/4 3296)
>[   582.975] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23deec0]
>[   582.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23deec0] width 3286 pitch 13184 (/4 3296)
>[   582.998] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23dec10]
>[   583.023] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23dec10] width 3286 pitch 13184 (/4 3296)
>[   583.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23deec0]
>[   583.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23deec0] width 3286 pitch 13184 (/4 3296)
>[   583.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227ea70]
>[   583.469] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227ea70] width 3286 pitch 13184 (/4 3296)
>[   584.712] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22676a0]
>[   584.740] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22676a0] width 3286 pitch 13184 (/4 3296)
>[   585.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   585.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   585.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d2ec0]
>[   585.196] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d2ec0] width 3286 pitch 13184 (/4 3296)
>[   585.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   585.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   585.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d2ec0]
>[   585.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d2ec0] width 3286 pitch 13184 (/4 3296)
>[   585.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   585.290] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   585.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d2ec0]
>[   585.324] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d2ec0] width 3286 pitch 13184 (/4 3296)
>[   585.327] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d2ec0]
>[   585.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d2ec0] width 3286 pitch 13184 (/4 3296)
>[   585.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   585.390] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   589.206] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x235ec60]
>[   589.255] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x235ec60] width 3286 pitch 13184 (/4 3296)
>[   589.260] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   589.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   589.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24721f0]
>[   589.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24721f0] width 3286 pitch 13184 (/4 3296)
>[   589.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   589.346] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   589.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24721f0]
>[   589.375] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24721f0] width 3286 pitch 13184 (/4 3296)
>[   589.376] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2256c80]
>[   589.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2256c80] width 3286 pitch 13184 (/4 3296)
>[   589.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24721f0]
>[   589.475] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24721f0] width 3286 pitch 13184 (/4 3296)
>[   589.476] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23560d0]
>[   589.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23560d0] width 3286 pitch 13184 (/4 3296)
>[   589.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2497180]
>[   589.525] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2497180] width 3286 pitch 13184 (/4 3296)
>[   604.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d98b0]
>[   604.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d98b0] width 3286 pitch 13184 (/4 3296)
>[   606.480] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238fde0]
>[   606.506] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238fde0] width 3286 pitch 13184 (/4 3296)
>[   606.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23ec160]
>[   606.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23ec160] width 3286 pitch 13184 (/4 3296)
>[   606.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23d9910]
>[   606.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23d9910] width 3286 pitch 13184 (/4 3296)
>[   606.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238fd20]
>[   606.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238fd20] width 3286 pitch 13184 (/4 3296)
>[   606.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2363190]
>[   606.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2363190] width 3286 pitch 13184 (/4 3296)
>[   606.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496270]
>[   606.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496270] width 3286 pitch 13184 (/4 3296)
>[   606.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2363190]
>[   606.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2363190] width 3286 pitch 13184 (/4 3296)
>[   606.668] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496270]
>[   606.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496270] width 3286 pitch 13184 (/4 3296)
>[   606.738] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24825c0]
>[   606.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24825c0] width 3286 pitch 13184 (/4 3296)
>[   609.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20c9620]
>[   609.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20c9620] width 3286 pitch 13184 (/4 3296)
>[   615.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   615.933] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   615.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   615.950] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   615.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   615.967] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   615.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   615.983] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   615.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   616.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   616.001] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   616.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   616.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.066] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   616.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   616.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   616.134] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   616.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   616.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   616.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0440]
>[   616.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0440] width 3286 pitch 13184 (/4 3296)
>[   616.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0440]
>[   616.500] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0440] width 3286 pitch 13184 (/4 3296)
>[   616.506] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.534] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0440]
>[   616.567] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0440] width 3286 pitch 13184 (/4 3296)
>[   616.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   616.600] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   616.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0440]
>[   616.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0440] width 3286 pitch 13184 (/4 3296)
>[   617.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   617.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   617.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0440]
>[   617.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0440] width 3286 pitch 13184 (/4 3296)
>[   617.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   617.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   618.257] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x1fb0440]
>[   618.284] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x1fb0440] width 3286 pitch 13184 (/4 3296)
>[   618.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2237110]
>[   618.384] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2237110] width 3286 pitch 13184 (/4 3296)
>[   618.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[   618.451] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 3286 pitch 13184 (/4 3296)
>[   618.857] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2233c50]
>[   618.884] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2233c50] width 3286 pitch 13184 (/4 3296)
>[   618.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22333c0]
>[   618.917] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22333c0] width 3286 pitch 13184 (/4 3296)
>[   618.926] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2246270]
>[   618.951] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2246270] width 3286 pitch 13184 (/4 3296)
>[   618.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2202060]
>[   618.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2202060] width 3286 pitch 13184 (/4 3296)
>[   618.988] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247d530]
>[   619.018] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247d530] width 3286 pitch 13184 (/4 3296)
>[   619.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c8520]
>[   619.051] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c8520] width 3286 pitch 13184 (/4 3296)
>[   619.059] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2498d10]
>[   619.084] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2498d10] width 3286 pitch 13184 (/4 3296)
>[   619.089] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21c8520]
>[   619.118] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21c8520] width 3286 pitch 13184 (/4 3296)
>[   619.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2392ed0]
>[   619.184] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2392ed0] width 3286 pitch 13184 (/4 3296)
>[   619.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249dde0]
>[   619.251] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249dde0] width 3286 pitch 13184 (/4 3296)
>[   619.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2392ed0]
>[   619.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2392ed0] width 3286 pitch 13184 (/4 3296)
>[   619.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249dde0]
>[   619.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249dde0] width 3286 pitch 13184 (/4 3296)
>[   648.246] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   648.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 3286 pitch 13184 (/4 3296)
>[   648.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   648.294] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 3286 pitch 13184 (/4 3296)
>[   648.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   648.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 3286 pitch 13184 (/4 3296)
>[   648.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   648.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 3286 pitch 13184 (/4 3296)
>[   648.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   648.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 3286 pitch 13184 (/4 3296)
>[   648.772] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   648.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 3286 pitch 13184 (/4 3296)
>[   648.809] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   648.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 3286 pitch 13184 (/4 3296)
>[   648.877] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   648.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 3286 pitch 13184 (/4 3296)
>[   648.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   648.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 3286 pitch 13184 (/4 3296)
>[   649.368] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   649.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 3286 pitch 13184 (/4 3296)
>[   649.884] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   649.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 3286 pitch 13184 (/4 3296)
>[   649.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221a740]
>[   649.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221a740] width 3286 pitch 13184 (/4 3296)
>[   650.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d410]
>[   650.046] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d410] width 3286 pitch 13184 (/4 3296)
>[   650.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245e700]
>[   650.077] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245e700] width 3286 pitch 13184 (/4 3296)
>[   650.079] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d410]
>[   650.096] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d410] width 3286 pitch 13184 (/4 3296)
>[   651.397] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221b0c0]
>[   651.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221b0c0] width 3286 pitch 13184 (/4 3296)
>[   651.603] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2277b70]
>[   651.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2277b70] width 3286 pitch 13184 (/4 3296)
>[   651.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2358ef0]
>[   651.679] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2358ef0] width 3286 pitch 13184 (/4 3296)
>[   657.737] (II) RADEON(0): EDID vendor "SEC", prod id 21569
>[   657.737] (II) RADEON(0): Printing DDC gathered Modelines:
>[   657.737] (II) RADEON(0): Modeline "1366x768"x0.0   72.33  1366 1414 1446 1526  768 770 775 790 +hsync -vsync (47.4 kHz eP)
>[   664.550] (II) RADEON(0): Allocate new frame buffer 1920x1080 stride 1920
>[   664.577] (II) RADEON(0): VRAM usage limit set to 224607K
>[   664.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227a870]
>[   664.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227a870] width 1920 pitch 7680 (/4 1920)
>[   664.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226f390]
>[   664.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226f390] width 1920 pitch 7680 (/4 1920)
>[   664.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227a870]
>[   664.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227a870] width 1920 pitch 7680 (/4 1920)
>[   664.721] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252370]
>[   664.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252370] width 1920 pitch 7680 (/4 1920)
>[   664.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227ead0]
>[   664.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227ead0] width 1920 pitch 7680 (/4 1920)
>[   664.878] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x20d1100]
>[   664.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x20d1100] width 1920 pitch 7680 (/4 1920)
>[   664.886] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3010]
>[   664.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3010] width 1920 pitch 7680 (/4 1920)
>[   664.959] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21ccf70]
>[   664.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21ccf70] width 1920 pitch 7680 (/4 1920)
>[   665.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250af0]
>[   665.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250af0] width 1920 pitch 7680 (/4 1920)
>[   665.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2459e90]
>[   665.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2459e90] width 1920 pitch 7680 (/4 1920)
>[   665.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.317] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.351] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   665.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2167320]
>[   665.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2167320] width 1920 pitch 7680 (/4 1920)
>[   665.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2252520]
>[   665.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2252520] width 1920 pitch 7680 (/4 1920)
>[   670.178] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2281990]
>[   670.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2281990] width 1920 pitch 7680 (/4 1920)
>[   671.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   671.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   671.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   671.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   671.936] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   671.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   671.991] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   672.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   672.130] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   672.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce49a0]
>[   674.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce49a0] width 1920 pitch 7680 (/4 1920)
>[   674.596] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   674.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   674.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.689] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   674.731] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   674.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.796] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   674.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   674.832] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.846] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   674.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.896] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   674.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   674.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   674.941] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   674.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   675.403] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   675.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   675.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   675.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   675.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[   675.496] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[   675.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   675.546] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   675.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   675.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   675.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   675.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   676.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   676.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   676.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   676.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   677.303] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   677.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   677.438] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   677.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   677.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   677.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   677.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   677.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   677.882] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   677.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   677.902] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   677.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   677.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   677.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   677.932] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   677.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   677.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   677.963] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   677.966] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   677.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   677.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   677.996] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   678.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   678.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   678.023] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   678.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   678.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   678.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   678.072] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2393e20]
>[   678.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2393e20] width 1920 pitch 7680 (/4 1920)
>[   678.088] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2263e50]
>[   678.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2263e50] width 1920 pitch 7680 (/4 1920)
>[   714.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2219c10]
>[   714.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2219c10] width 1920 pitch 7680 (/4 1920)
>[   714.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24997a0]
>[   714.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24997a0] width 1920 pitch 7680 (/4 1920)
>[   814.678] (II) config/udev: Adding input device Microsoft MicrosoftÂ® Nano Transceiver v2.0 (/dev/input/event14)
>[   814.678] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "evdev pointer catchall"
>[   814.678] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "evdev keyboard catchall"
>[   814.678] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "system-setup-keyboard"
>[   814.678] (II) Using input driver 'evdev' for 'Microsoft MicrosoftÂ® Nano Transceiver v2.0'
>[   814.678] 	Option "XkbRules" "evdev"
>[   814.678] 	Option "XkbModel" "pc105+inet"
>[   814.678] 	Option "XkbLayout" "us"
>[   814.678] 	Option "_source" "server/udev"
>[   814.678] 	Option "name" "Microsoft MicrosoftÂ® Nano Transceiver v2.0"
>[   814.678] 	Option "path" "/dev/input/event14"
>[   814.678] 	Option "device" "/dev/input/event14"
>[   814.678] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.1/input/input14/event14"
>[   814.678] 	Option "driver" "evdev"
>[   814.678] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[   814.678] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: always reports core events
>[   814.678] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Device: "/dev/input/event14"
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x20 [1023..0]
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Vendor 0x45e Product 0x745
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found 9 mouse buttons
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found scroll wheel(s)
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found relative axes
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found x and y relative axes
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found absolute axes
>[   814.678] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Forcing absolute x/y axes to exist.
>[   814.678] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found keys
>[   814.678] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Configuring as mouse
>[   814.678] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Configuring as keyboard
>[   814.678] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Adding scrollwheel support
>[   814.678] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: YAxisMapping: buttons 4 and 5
>[   814.678] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[   814.678] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.1/input/input14/event14"
>[   814.678] (II) XINPUT: Adding extended input device "Microsoft MicrosoftÂ® Nano Transceiver v2.0" (type: KEYBOARD, id 16)
>[   814.678] (**) Option "xkb_rules" "evdev"
>[   814.678] (**) Option "xkb_model" "pc105+inet"
>[   814.679] (**) Option "xkb_layout" "us"
>[   814.679] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[   814.679] (II) XKB: Reusing cached keymap
>[   814.680] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: initialized for relative axes.
>[   814.680] (WW) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: ignoring absolute axes.
>[   814.680] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) keeping acceleration scheme 1
>[   814.680] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) acceleration profile 0
>[   814.680] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) acceleration factor: 2.000
>[   814.680] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) acceleration threshold: 4
>[   814.682] (II) config/udev: Adding input device Microsoft MicrosoftÂ® Nano Transceiver v2.0 (/dev/input/event13)
>[   814.682] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "evdev keyboard catchall"
>[   814.682] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "system-setup-keyboard"
>[   814.682] (II) Using input driver 'evdev' for 'Microsoft MicrosoftÂ® Nano Transceiver v2.0'
>[   814.682] 	Option "XkbRules" "evdev"
>[   814.682] 	Option "XkbModel" "pc105+inet"
>[   814.682] 	Option "XkbLayout" "us"
>[   814.682] 	Option "_source" "server/udev"
>[   814.682] 	Option "name" "Microsoft MicrosoftÂ® Nano Transceiver v2.0"
>[   814.682] 	Option "path" "/dev/input/event13"
>[   814.682] 	Option "device" "/dev/input/event13"
>[   814.682] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.0/input/input13/event13"
>[   814.682] 	Option "driver" "evdev"
>[   814.682] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[   814.682] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: always reports core events
>[   814.682] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Device: "/dev/input/event13"
>[   814.682] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Vendor 0x45e Product 0x745
>[   814.682] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found keys
>[   814.682] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Configuring as keyboard
>[   814.682] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.0/input/input13/event13"
>[   814.682] (II) XINPUT: Adding extended input device "Microsoft MicrosoftÂ® Nano Transceiver v2.0" (type: KEYBOARD, id 17)
>[   814.682] (**) Option "xkb_rules" "evdev"
>[   814.682] (**) Option "xkb_model" "pc105+inet"
>[   814.682] (**) Option "xkb_layout" "us"
>[   814.682] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[   814.682] (II) XKB: Reusing cached keymap
>[   814.687] (II) config/udev: Adding input device Microsoft MicrosoftÂ® Nano Transceiver v2.0 (/dev/input/event15)
>[   814.687] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "evdev keyboard catchall"
>[   814.687] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "system-setup-keyboard"
>[   814.687] (II) Using input driver 'evdev' for 'Microsoft MicrosoftÂ® Nano Transceiver v2.0'
>[   814.687] 	Option "XkbRules" "evdev"
>[   814.687] 	Option "XkbModel" "pc105+inet"
>[   814.687] 	Option "XkbLayout" "us"
>[   814.687] 	Option "_source" "server/udev"
>[   814.687] 	Option "name" "Microsoft MicrosoftÂ® Nano Transceiver v2.0"
>[   814.687] 	Option "path" "/dev/input/event15"
>[   814.687] 	Option "device" "/dev/input/event15"
>[   814.687] 	Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.2/input/input15/event15"
>[   814.687] 	Option "driver" "evdev"
>[   814.687] 	Option "XkbOptions" "terminate:ctrl_alt_bksp,"
>[   814.687] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: always reports core events
>[   814.687] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Device: "/dev/input/event15"
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x1 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x4 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x5 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x6 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x7 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x8 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x10 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x11 [1..-1]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x12 [1..-1]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x20 [1023..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x28 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x29 [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2a [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2b [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2c [255..0]
>[   814.687] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2d [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2e [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x2f [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x30 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x31 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x32 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x33 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x34 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x35 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x36 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x37 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x38 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x39 [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3a [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3b [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3c [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3d [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3e [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: absolute axis 0x3f [255..0]
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Vendor 0x45e Product 0x745
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found 1 mouse buttons
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found scroll wheel(s)
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found relative axes
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found absolute axes
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found absolute multitouch axes
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found x and y absolute axes
>[   814.688] (--) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Found keys
>[   814.688] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Configuring as mouse
>[   814.688] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Configuring as keyboard
>[   814.688] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Adding scrollwheel support
>[   814.688] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: YAxisMapping: buttons 4 and 5
>[   814.688] (**) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>[   814.688] (**) Option "config_info" "udev:/sys/devices/pci0000:00/0000:00:1d.0/usb6/6-2/6-2:1.2/input/input15/event15"
>[   814.688] (II) XINPUT: Adding extended input device "Microsoft MicrosoftÂ® Nano Transceiver v2.0" (type: KEYBOARD, id 18)
>[   814.688] (**) Option "xkb_rules" "evdev"
>[   814.688] (**) Option "xkb_model" "pc105+inet"
>[   814.688] (**) Option "xkb_layout" "us"
>[   814.688] (**) Option "xkb_options" "terminate:ctrl_alt_bksp,"
>[   814.688] (II) XKB: Reusing cached keymap
>[   814.688] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: initialized for relative axes.
>[   814.688] (WW) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: ignoring absolute axes.
>[   814.688] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) keeping acceleration scheme 1
>[   814.688] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) acceleration profile 0
>[   814.688] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) acceleration factor: 2.000
>[   814.688] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: (accel) acceleration threshold: 4
>[   814.692] (II) config/udev: Adding input device Microsoft MicrosoftÂ® Nano Transceiver v2.0 (/dev/input/mouse2)
>[   814.692] (**) Microsoft MicrosoftÂ® Nano Transceiver v2.0: Applying InputClass "system-setup-keyboard"
>[   814.692] (II) No input driver specified, ignoring this device.
>[   814.692] (II) This device may have been added with another device file.
>[   964.527] (II) XKB: Reusing cached keymap
>[   964.527] (II) XKB: Reusing cached keymap
>[  1022.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2250c70]
>[  1022.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2250c70] width 1920 pitch 7680 (/4 1920)
>[  1022.640] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.707] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.749] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.834] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.870] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1022.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1022.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1022.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1022.994] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1023.013] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1023.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1023.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1023.735] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1023.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1024.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1024.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.574] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1050.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1050.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1050.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1050.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1050.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1050.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.699] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1050.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1050.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1050.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1050.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.767] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1050.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1050.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1050.814] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x223faf0]
>[  1050.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x223faf0] width 1920 pitch 7680 (/4 1920)
>[  1053.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1053.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1182.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca650]
>[  1182.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca650] width 1920 pitch 7680 (/4 1920)
>[  1182.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1182.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca650]
>[  1182.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca650] width 1920 pitch 7680 (/4 1920)
>[  1182.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1182.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca650]
>[  1182.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca650] width 1920 pitch 7680 (/4 1920)
>[  1182.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1182.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca650]
>[  1182.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca650] width 1920 pitch 7680 (/4 1920)
>[  1182.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1182.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca650]
>[  1182.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca650] width 1920 pitch 7680 (/4 1920)
>[  1182.470] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d710]
>[  1182.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d710] width 1920 pitch 7680 (/4 1920)
>[  1182.499] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22ca650]
>[  1182.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22ca650] width 1920 pitch 7680 (/4 1920)
>[  1182.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2219730]
>[  1182.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2219730] width 1920 pitch 7680 (/4 1920)
>[  1372.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1372.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1374.362] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24800c0]
>[  1374.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24800c0] width 1920 pitch 7680 (/4 1920)
>[  1374.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391f20]
>[  1374.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391f20] width 1920 pitch 7680 (/4 1920)
>[  1374.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247fe90]
>[  1374.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247fe90] width 1920 pitch 7680 (/4 1920)
>[  1374.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2391f20]
>[  1374.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2391f20] width 1920 pitch 7680 (/4 1920)
>[  1376.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2481450]
>[  1376.113] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2481450] width 1920 pitch 7680 (/4 1920)
>[  1376.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240d0e0]
>[  1376.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240d0e0] width 1920 pitch 7680 (/4 1920)
>[  1376.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce9450]
>[  1376.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce9450] width 1920 pitch 7680 (/4 1920)
>[  1381.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2457dc0]
>[  1381.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2457dc0] width 1920 pitch 7680 (/4 1920)
>[  1382.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241aef0]
>[  1382.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241aef0] width 1920 pitch 7680 (/4 1920)
>[  1382.211] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241afc0]
>[  1382.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241afc0] width 1920 pitch 7680 (/4 1920)
>[  1382.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1382.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1382.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2269620]
>[  1382.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2269620] width 1920 pitch 7680 (/4 1920)
>[  1382.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241adc0]
>[  1382.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241adc0] width 1920 pitch 7680 (/4 1920)
>[  1382.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ab70]
>[  1382.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ab70] width 1920 pitch 7680 (/4 1920)
>[  1382.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ad60]
>[  1382.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ad60] width 1920 pitch 7680 (/4 1920)
>[  1382.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ab70]
>[  1382.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ab70] width 1920 pitch 7680 (/4 1920)
>[  1382.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ad60]
>[  1382.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ad60] width 1920 pitch 7680 (/4 1920)
>[  1382.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ab70]
>[  1382.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ab70] width 1920 pitch 7680 (/4 1920)
>[  1382.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ad60]
>[  1382.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ad60] width 1920 pitch 7680 (/4 1920)
>[  1382.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f8e0]
>[  1382.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f8e0] width 1920 pitch 7680 (/4 1920)
>[  1386.287] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458260]
>[  1386.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458260] width 1920 pitch 7680 (/4 1920)
>[  1386.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5b20]
>[  1386.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5b20] width 1920 pitch 7680 (/4 1920)
>[  1386.388] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1386.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1386.436] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5b20]
>[  1386.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5b20] width 1920 pitch 7680 (/4 1920)
>[  1386.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1386.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1386.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241adc0]
>[  1386.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241adc0] width 1920 pitch 7680 (/4 1920)
>[  1386.554] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1386.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1386.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241adc0]
>[  1386.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241adc0] width 1920 pitch 7680 (/4 1920)
>[  1386.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1386.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1387.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1387.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1387.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1387.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1387.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f8e0]
>[  1387.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f8e0] width 1920 pitch 7680 (/4 1920)
>[  1387.705] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1387.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1397.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1397.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1397.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1397.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1397.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1397.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1397.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1397.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1397.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1397.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1397.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1397.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1397.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1397.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1397.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1397.579] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1398.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1398.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1398.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221edb0]
>[  1398.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221edb0] width 1920 pitch 7680 (/4 1920)
>[  1398.634] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1398.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1401.395] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1401.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1401.426] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1401.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1401.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1401.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1401.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1401.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1401.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1401.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1401.571] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1401.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1401.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1401.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1401.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1401.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1401.690] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1401.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1402.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1402.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1402.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1402.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1402.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1402.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1402.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1402.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1403.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1403.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1403.161] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1403.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1403.186] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1403.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1403.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1403.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1403.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1403.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1403.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1403.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1403.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1403.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1403.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1403.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1403.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454c80]
>[  1403.427] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454c80] width 1920 pitch 7680 (/4 1920)
>[  1403.437] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241adc0]
>[  1403.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241adc0] width 1920 pitch 7680 (/4 1920)
>[  1403.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1403.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1404.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241abe0]
>[  1404.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241abe0] width 1920 pitch 7680 (/4 1920)
>[  1404.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1404.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1405.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1405.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1405.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1405.263] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1405.275] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1405.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1405.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1405.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1405.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1405.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1405.385] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1405.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1405.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1405.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1405.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1405.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1405.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1405.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1405.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1405.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1406.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1406.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1406.293] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1406.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1406.343] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1406.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1406.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1406.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1406.469] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1406.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1406.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1406.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1406.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1406.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1406.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1406.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1406.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1406.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1406.658] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1406.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1407.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24553b0]
>[  1407.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24553b0] width 1920 pitch 7680 (/4 1920)
>[  1407.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1407.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1407.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1407.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1407.623] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1407.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1407.637] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1407.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1407.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1407.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1407.703] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1407.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1407.736] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1407.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1407.769] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1407.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1407.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1407.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1407.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1407.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1407.869] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1407.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1408.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1408.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1408.592] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1408.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1408.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1408.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1408.654] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454cd0]
>[  1408.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454cd0] width 1920 pitch 7680 (/4 1920)
>[  1408.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1408.713] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1415.064] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1415.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1422.887] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1422.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1422.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1422.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1422.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1422.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1422.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1422.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1423.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1423.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1423.042] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1423.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1423.071] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f890]
>[  1423.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f890] width 1920 pitch 7680 (/4 1920)
>[  1423.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1423.152] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1423.168] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1423.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1423.669] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1423.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1424.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1424.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1424.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1424.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1424.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1424.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1424.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1424.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1424.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1424.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1424.402] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.723] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1424.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1424.754] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1424.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1424.820] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.854] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1424.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1424.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.913] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.922] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1424.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1424.954] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1424.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1424.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1425.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1425.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1425.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1425.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1425.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1425.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1425.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1425.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1425.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1425.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1425.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1425.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1425.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1425.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1425.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1425.253] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1425.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1425.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1425.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1431.662] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1431.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1431.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1431.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1431.725] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1431.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1431.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1431.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1431.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1431.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1431.821] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1431.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1431.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1431.902] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1431.913] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1431.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1432.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1432.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1432.652] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1432.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1432.953] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5ab0]
>[  1432.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5ab0] width 1920 pitch 7680 (/4 1920)
>[  1433.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22160c0]
>[  1433.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22160c0] width 1920 pitch 7680 (/4 1920)
>[  1433.963] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec0e0]
>[  1433.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec0e0] width 1920 pitch 7680 (/4 1920)
>[  1434.004] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1434.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1434.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1434.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1434.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1434.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1434.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1434.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1434.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1434.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1434.170] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1434.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1434.221] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1434.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1434.742] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1434.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1434.955] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1434.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1435.273] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1435.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1436.942] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1436.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1437.792] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b090]
>[  1437.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b090] width 1920 pitch 7680 (/4 1920)
>[  1440.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x240f8d0]
>[  1440.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x240f8d0] width 1920 pitch 7680 (/4 1920)
>[  1441.014] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1441.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1441.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1441.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1441.137] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1441.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1441.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1441.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1441.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1441.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1441.242] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1441.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1441.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1441.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1441.300] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1441.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1442.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1442.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1442.396] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1442.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1442.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1442.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1442.544] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1442.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1442.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1442.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1442.602] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1442.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1442.636] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1442.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1442.671] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1442.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1442.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1442.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1442.778] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1442.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1442.906] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1442.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1443.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1443.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1443.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1443.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1443.537] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1443.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1443.842] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1443.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1444.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1444.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1447.564] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1447.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1447.644] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1447.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1447.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1447.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1448.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1448.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1448.921] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1448.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1454.135] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1454.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1454.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1454.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1455.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1455.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1455.645] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1455.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1456.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1457.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1457.078] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1457.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1457.108] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22169a0]
>[  1457.133] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22169a0] width 1920 pitch 7680 (/4 1920)
>[  1457.142] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec5c0]
>[  1457.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec5c0] width 1920 pitch 7680 (/4 1920)
>[  1457.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22169a0]
>[  1457.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22169a0] width 1920 pitch 7680 (/4 1920)
>[  1457.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24ec5c0]
>[  1457.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24ec5c0] width 1920 pitch 7680 (/4 1920)
>[  1457.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22169a0]
>[  1457.293] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22169a0] width 1920 pitch 7680 (/4 1920)
>[  1457.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2480060]
>[  1457.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2480060] width 1920 pitch 7680 (/4 1920)
>[  1480.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411bd0]
>[  1480.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411bd0] width 1920 pitch 7680 (/4 1920)
>[  1480.295] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411b70]
>[  1480.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411b70] width 1920 pitch 7680 (/4 1920)
>[  1480.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411bd0]
>[  1480.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411bd0] width 1920 pitch 7680 (/4 1920)
>[  1480.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411b70]
>[  1480.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411b70] width 1920 pitch 7680 (/4 1920)
>[  1480.394] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411bd0]
>[  1480.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411bd0] width 1920 pitch 7680 (/4 1920)
>[  1480.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411b70]
>[  1480.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411b70] width 1920 pitch 7680 (/4 1920)
>[  1480.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411bd0]
>[  1480.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411bd0] width 1920 pitch 7680 (/4 1920)
>[  1480.518] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411b70]
>[  1480.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411b70] width 1920 pitch 7680 (/4 1920)
>[  1480.536] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411bd0]
>[  1480.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411bd0] width 1920 pitch 7680 (/4 1920)
>[  1481.074] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1481.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1481.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24119b0]
>[  1481.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24119b0] width 1920 pitch 7680 (/4 1920)
>[  1481.604] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1481.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1484.993] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411a00]
>[  1485.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411a00] width 1920 pitch 7680 (/4 1920)
>[  1486.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411a00]
>[  1486.379] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411a00] width 1920 pitch 7680 (/4 1920)
>[  1486.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1486.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1486.429] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1486.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1486.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1486.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1486.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1486.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1486.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1486.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1486.555] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1486.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1486.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1486.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1486.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1486.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1487.948] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1487.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1487.981] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1488.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1488.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1488.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1488.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1488.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1488.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1488.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1488.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1488.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1488.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1488.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1488.185] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1488.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1488.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1488.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1488.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217550]
>[  1488.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217550] width 1920 pitch 7680 (/4 1920)
>[  1488.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1488.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1489.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1489.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1489.595] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1489.675] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1489.687] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24119b0]
>[  1489.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24119b0] width 1920 pitch 7680 (/4 1920)
>[  1489.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1489.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1489.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411c00]
>[  1489.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411c00] width 1920 pitch 7680 (/4 1920)
>[  1489.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce6000]
>[  1489.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce6000] width 1920 pitch 7680 (/4 1920)
>[  1489.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2411c00]
>[  1489.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2411c00] width 1920 pitch 7680 (/4 1920)
>[  1489.866] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d140]
>[  1489.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d140] width 1920 pitch 7680 (/4 1920)
>[  1538.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24091d0]
>[  1538.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24091d0] width 1920 pitch 7680 (/4 1920)
>[  1538.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e7e0]
>[  1538.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e7e0] width 1920 pitch 7680 (/4 1920)
>[  1538.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1538.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1538.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390e70]
>[  1538.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390e70] width 1920 pitch 7680 (/4 1920)
>[  1538.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1538.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1538.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390e70]
>[  1538.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390e70] width 1920 pitch 7680 (/4 1920)
>[  1538.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1538.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1538.422] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390e70]
>[  1538.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390e70] width 1920 pitch 7680 (/4 1920)
>[  1538.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1538.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1538.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241db20]
>[  1538.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241db20] width 1920 pitch 7680 (/4 1920)
>[  1538.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1538.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1538.562] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241db20]
>[  1538.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241db20] width 1920 pitch 7680 (/4 1920)
>[  1539.051] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24091d0]
>[  1539.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24091d0] width 1920 pitch 7680 (/4 1920)
>[  1539.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241db00]
>[  1539.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241db00] width 1920 pitch 7680 (/4 1920)
>[  1539.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1539.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1545.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1545.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1545.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1545.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1545.069] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1545.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1545.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1545.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1545.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1545.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1545.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1545.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1545.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1545.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1545.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1545.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1545.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390f80]
>[  1545.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390f80] width 1920 pitch 7680 (/4 1920)
>[  1546.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24091d0]
>[  1546.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24091d0] width 1920 pitch 7680 (/4 1920)
>[  1546.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce5f40]
>[  1546.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce5f40] width 1920 pitch 7680 (/4 1920)
>[  1547.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e4e0]
>[  1547.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e4e0] width 1920 pitch 7680 (/4 1920)
>[  1547.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1547.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1547.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e4e0]
>[  1547.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e4e0] width 1920 pitch 7680 (/4 1920)
>[  1547.553] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1547.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1547.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e4e0]
>[  1547.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e4e0] width 1920 pitch 7680 (/4 1920)
>[  1547.620] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1547.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1547.653] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e4e0]
>[  1547.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e4e0] width 1920 pitch 7680 (/4 1920)
>[  1547.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1547.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1547.740] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e4e0]
>[  1547.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e4e0] width 1920 pitch 7680 (/4 1920)
>[  1547.763] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e440]
>[  1547.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e440] width 1920 pitch 7680 (/4 1920)
>[  1548.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390df0]
>[  1548.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390df0] width 1920 pitch 7680 (/4 1920)
>[  1548.505] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d890]
>[  1548.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d890] width 1920 pitch 7680 (/4 1920)
>[  1548.801] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390df0]
>[  1548.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390df0] width 1920 pitch 7680 (/4 1920)
>[  1553.743] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e2a0]
>[  1553.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e2a0] width 1920 pitch 7680 (/4 1920)
>[  1553.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d8e0]
>[  1553.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d8e0] width 1920 pitch 7680 (/4 1920)
>[  1554.011] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e2a0]
>[  1554.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e2a0] width 1920 pitch 7680 (/4 1920)
>[  1554.035] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d8e0]
>[  1554.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d8e0] width 1920 pitch 7680 (/4 1920)
>[  1554.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e2a0]
>[  1554.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e2a0] width 1920 pitch 7680 (/4 1920)
>[  1554.102] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d8e0]
>[  1554.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d8e0] width 1920 pitch 7680 (/4 1920)
>[  1554.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e2a0]
>[  1554.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e2a0] width 1920 pitch 7680 (/4 1920)
>[  1554.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d8e0]
>[  1554.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d8e0] width 1920 pitch 7680 (/4 1920)
>[  1554.204] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e2a0]
>[  1554.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e2a0] width 1920 pitch 7680 (/4 1920)
>[  1554.239] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241d8e0]
>[  1554.279] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241d8e0] width 1920 pitch 7680 (/4 1920)
>[  1554.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390f80]
>[  1554.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390f80] width 1920 pitch 7680 (/4 1920)
>[  1555.020] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2390f80]
>[  1555.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2390f80] width 1920 pitch 7680 (/4 1920)
>[  1555.320] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247e7e0]
>[  1555.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247e7e0] width 1920 pitch 7680 (/4 1920)
>[  1559.561] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241a180]
>[  1559.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241a180] width 1920 pitch 7680 (/4 1920)
>[  1560.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb80]
>[  1560.250] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb80] width 1920 pitch 7680 (/4 1920)
>[  1560.259] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1560.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1560.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1560.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1573.096] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1573.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1573.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1573.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1573.133] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1573.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1573.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1573.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1573.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1573.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1573.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1573.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1573.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1573.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1573.216] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1573.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1573.234] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1573.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1573.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1573.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1573.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1573.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1573.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1573.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1573.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1573.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1573.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1573.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1577.305] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.332] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1577.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1577.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1577.415] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1577.448] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1577.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1577.532] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419390]
>[  1577.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419390] width 1920 pitch 7680 (/4 1920)
>[  1577.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1577.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.540] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1578.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1578.582] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1578.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1578.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1578.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1578.648] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.665] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1578.680] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1578.681] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.698] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1578.730] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1578.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1578.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1578.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1578.765] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1578.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1689.174] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241a180]
>[  1689.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241a180] width 1920 pitch 7680 (/4 1920)
>[  1689.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1689.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1689.310] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1689.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1689.325] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1689.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1689.372] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1689.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1689.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1689.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1689.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1689.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1689.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1689.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1689.504] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1689.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1689.535] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1689.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1689.590] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1689.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1690.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1690.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1690.335] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1690.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1690.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1690.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1692.934] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1692.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1693.172] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419f20]
>[  1693.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419f20] width 1920 pitch 7680 (/4 1920)
>[  1693.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1693.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1693.222] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1693.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1693.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1693.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1693.285] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1693.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1693.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1693.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1693.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1693.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1693.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1693.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1693.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1693.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1694.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1694.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1694.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1694.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1709.307] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1709.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1709.323] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1709.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1709.356] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1709.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1709.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1709.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1709.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1709.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1709.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1709.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1709.489] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1709.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1709.523] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1709.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1709.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1709.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1710.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1710.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1710.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1710.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1710.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1710.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1710.269] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1710.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1710.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1710.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1710.336] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1710.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1710.370] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1710.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1710.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1710.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1710.418] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1710.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1711.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.070] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.136] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.169] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.203] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.786] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.819] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.852] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1711.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1711.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1711.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1711.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1712.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1712.566] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241a1c0]
>[  1712.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241a1c0] width 1920 pitch 7680 (/4 1920)
>[  1712.784] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1712.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1713.082] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241a1c0]
>[  1713.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241a1c0] width 1920 pitch 7680 (/4 1920)
>[  1713.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1713.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1713.430] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1713.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1713.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1713.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1713.539] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1713.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1713.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1713.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1713.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1713.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1713.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1713.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1713.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1713.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1713.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1713.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1713.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1713.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1713.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1713.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1714.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1714.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1714.534] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1714.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1714.835] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1714.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1718.040] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1718.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1718.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1718.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1718.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1718.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1718.116] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1718.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1718.150] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1718.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1718.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1718.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1718.218] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1718.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1718.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1718.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1718.281] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1718.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1718.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1718.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1718.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1718.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1719.083] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1719.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1719.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241daa0]
>[  1719.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241daa0] width 1920 pitch 7680 (/4 1920)
>[  1720.795] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1720.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1720.818] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1720.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1720.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1720.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1720.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1720.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1720.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1720.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1720.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1720.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1720.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1721.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1721.017] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1721.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1721.065] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1721.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1721.542] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1721.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1721.567] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1721.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1721.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1721.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1721.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1721.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1721.683] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1721.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1721.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1721.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1721.750] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1721.781] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1721.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1721.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1721.815] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1721.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1722.229] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1722.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1722.250] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1722.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1722.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1722.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1722.322] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1722.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1722.350] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1722.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1722.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1722.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1722.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1722.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1722.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1722.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1722.500] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1722.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1722.520] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1722.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1726.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1726.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1726.605] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1726.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1726.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1726.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1726.675] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1726.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1726.706] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1726.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1726.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1726.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1726.770] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1726.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1726.800] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1726.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1727.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1727.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1727.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458180]
>[  1727.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458180] width 1920 pitch 7680 (/4 1920)
>[  1727.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217b60]
>[  1727.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217b60] width 1920 pitch 7680 (/4 1920)
>[  1742.379] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1742.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1743.007] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1743.073] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1743.140] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419720]
>[  1743.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419720] width 1920 pitch 7680 (/4 1920)
>[  1743.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1743.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1743.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419720]
>[  1743.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419720] width 1920 pitch 7680 (/4 1920)
>[  1745.027] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1745.095] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  1745.157] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2458020]
>[  1745.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2458020] width 1920 pitch 7680 (/4 1920)
>[  2035.270] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ca10]
>[  2035.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ca10] width 1920 pitch 7680 (/4 1920)
>[  2035.288] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a50]
>[  2035.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a50] width 1920 pitch 7680 (/4 1920)
>[  2035.321] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24279f0]
>[  2035.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24279f0] width 1920 pitch 7680 (/4 1920)
>[  2035.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a50]
>[  2035.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a50] width 1920 pitch 7680 (/4 1920)
>[  2035.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24279f0]
>[  2035.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24279f0] width 1920 pitch 7680 (/4 1920)
>[  2035.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a50]
>[  2035.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a50] width 1920 pitch 7680 (/4 1920)
>[  2035.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24279f0]
>[  2035.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24279f0] width 1920 pitch 7680 (/4 1920)
>[  2035.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a50]
>[  2035.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a50] width 1920 pitch 7680 (/4 1920)
>[  2035.522] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24279f0]
>[  2035.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24279f0] width 1920 pitch 7680 (/4 1920)
>[  2035.565] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a50]
>[  2035.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a50] width 1920 pitch 7680 (/4 1920)
>[  2036.348] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24279f0]
>[  2036.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24279f0] width 1920 pitch 7680 (/4 1920)
>[  2036.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a50]
>[  2036.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a50] width 1920 pitch 7680 (/4 1920)
>[  2036.893] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24279f0]
>[  2036.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24279f0] width 1920 pitch 7680 (/4 1920)
>[  2036.996] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ca10]
>[  2037.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ca10] width 1920 pitch 7680 (/4 1920)
>[  2037.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c940]
>[  2037.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c940] width 1920 pitch 7680 (/4 1920)
>[  2037.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420e10]
>[  2037.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420e10] width 1920 pitch 7680 (/4 1920)
>[  2037.101] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c940]
>[  2037.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c940] width 1920 pitch 7680 (/4 1920)
>[  2037.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420e10]
>[  2037.153] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420e10] width 1920 pitch 7680 (/4 1920)
>[  2037.155] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2413ee0]
>[  2037.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2413ee0] width 1920 pitch 7680 (/4 1920)
>[  2098.889] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2098.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2098.905] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2278920]
>[  2098.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2278920] width 1920 pitch 7680 (/4 1920)
>[  2098.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2098.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2098.987] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2278920]
>[  2099.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2278920] width 1920 pitch 7680 (/4 1920)
>[  2099.019] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2099.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2099.063] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2278920]
>[  2099.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2278920] width 1920 pitch 7680 (/4 1920)
>[  2099.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2099.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2099.153] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2278920]
>[  2099.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2278920] width 1920 pitch 7680 (/4 1920)
>[  2099.702] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2099.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2099.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2278920]
>[  2099.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2278920] width 1920 pitch 7680 (/4 1920)
>[  2100.191] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2100.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2100.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2100.376] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2100.390] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427940]
>[  2100.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427940] width 1920 pitch 7680 (/4 1920)
>[  2100.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24275c0]
>[  2100.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24275c0] width 1920 pitch 7680 (/4 1920)
>[  2100.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2100.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2100.465] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427940]
>[  2100.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427940] width 1920 pitch 7680 (/4 1920)
>[  2101.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2101.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2103.200] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e7d00]
>[  2103.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e7d00] width 1920 pitch 7680 (/4 1920)
>[  2103.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2103.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2107.109] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427940]
>[  2107.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427940] width 1920 pitch 7680 (/4 1920)
>[  2107.144] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2107.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2107.231] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2107.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2107.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2107.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2107.301] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2107.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2107.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2107.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2107.367] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2107.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2107.401] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2107.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2107.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2107.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2107.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2107.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2107.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2107.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2107.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2108.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2108.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2108.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2108.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2108.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2108.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2108.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2109.154] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2109.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2109.928] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2109.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2110.360] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2110.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2110.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2110.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2110.417] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2110.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2110.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2110.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2110.483] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2110.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2110.517] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2110.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2110.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2110.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2110.583] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2110.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2110.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2420700]
>[  2110.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2420700] width 1920 pitch 7680 (/4 1920)
>[  2110.632] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427940]
>[  2110.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427940] width 1920 pitch 7680 (/4 1920)
>[  2276.248] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d12b0]
>[  2276.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d12b0] width 1920 pitch 7680 (/4 1920)
>[  2278.391] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2278.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2278.450] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f555e0]
>[  2278.486] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f555e0] width 1920 pitch 7680 (/4 1920)
>[  2278.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c6a0]
>[  2278.564] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c6a0] width 1920 pitch 7680 (/4 1920)
>[  2278.938] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22445e0]
>[  2278.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22445e0] width 1920 pitch 7680 (/4 1920)
>[  2278.951] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c6a0]
>[  2278.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c6a0] width 1920 pitch 7680 (/4 1920)
>[  2278.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22445e0]
>[  2278.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22445e0] width 1920 pitch 7680 (/4 1920)
>[  2278.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c6a0]
>[  2278.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c6a0] width 1920 pitch 7680 (/4 1920)
>[  2278.999] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22445e0]
>[  2279.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22445e0] width 1920 pitch 7680 (/4 1920)
>[  2279.015] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c6a0]
>[  2279.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c6a0] width 1920 pitch 7680 (/4 1920)
>[  2279.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22445e0]
>[  2279.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22445e0] width 1920 pitch 7680 (/4 1920)
>[  2279.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c6a0]
>[  2279.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c6a0] width 1920 pitch 7680 (/4 1920)
>[  2279.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22445e0]
>[  2279.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22445e0] width 1920 pitch 7680 (/4 1920)
>[  2279.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x227c6a0]
>[  2279.120] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x227c6a0] width 1920 pitch 7680 (/4 1920)
>[  2279.131] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2279.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2279.152] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[  2279.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 1920 pitch 7680 (/4 1920)
>[  2279.252] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[  2279.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[  2279.908] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217cd0]
>[  2279.943] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217cd0] width 1920 pitch 7680 (/4 1920)
>[  2280.024] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2219c80]
>[  2280.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2219c80] width 1920 pitch 7680 (/4 1920)
>[  2280.810] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2280.862] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2282.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e62a0]
>[  2282.140] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e62a0] width 1920 pitch 7680 (/4 1920)
>[  2282.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217cd0]
>[  2282.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217cd0] width 1920 pitch 7680 (/4 1920)
>[  2282.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2282.195] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2282.199] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce49a0]
>[  2282.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce49a0] width 1920 pitch 7680 (/4 1920)
>[  2282.215] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d4f0]
>[  2282.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d4f0] width 1920 pitch 7680 (/4 1920)
>[  2282.232] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce49a0]
>[  2282.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce49a0] width 1920 pitch 7680 (/4 1920)
>[  2282.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217cd0]
>[  2282.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217cd0] width 1920 pitch 7680 (/4 1920)
>[  2282.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce49a0]
>[  2282.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce49a0] width 1920 pitch 7680 (/4 1920)
>[  2282.298] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217cd0]
>[  2282.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217cd0] width 1920 pitch 7680 (/4 1920)
>[  2282.864] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2246110]
>[  2282.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2246110] width 1920 pitch 7680 (/4 1920)
>[  2282.929] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2246180]
>[  2282.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2246180] width 1920 pitch 7680 (/4 1920)
>[  2288.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2217cd0]
>[  2288.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2217cd0] width 1920 pitch 7680 (/4 1920)
>[  2288.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d4f0]
>[  2288.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d4f0] width 1920 pitch 7680 (/4 1920)
>[  2288.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2427a60]
>[  2288.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2427a60] width 1920 pitch 7680 (/4 1920)
>[  2288.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[  2288.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[  2288.482] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d4f0]
>[  2288.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d4f0] width 1920 pitch 7680 (/4 1920)
>[  2288.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[  2288.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[  2288.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d4f0]
>[  2288.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d4f0] width 1920 pitch 7680 (/4 1920)
>[  2288.549] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22839d0]
>[  2288.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22839d0] width 1920 pitch 7680 (/4 1920)
>[  2288.615] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221d4f0]
>[  2288.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221d4f0] width 1920 pitch 7680 (/4 1920)
>[  2289.171] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2289.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2289.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2289.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2289.225] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2289.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2289.256] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2289.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2289.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2289.314] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2289.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2289.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2289.353] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2289.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2289.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2289.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2289.459] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2289.464] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2289.593] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2289.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2289.985] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2289.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2290.201] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2290.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2290.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2290.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2290.618] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241fb10]
>[  2290.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241fb10] width 1920 pitch 7680 (/4 1920)
>[  2290.673] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce3fc0]
>[  2290.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce3fc0] width 1920 pitch 7680 (/4 1920)
>[  2290.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24182f0]
>[  2290.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24182f0] width 1920 pitch 7680 (/4 1920)
>[  2290.885] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce49a0]
>[  2290.911] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce49a0] width 1920 pitch 7680 (/4 1920)
>[  2290.949] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x247d590]
>[  2290.974] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x247d590] width 1920 pitch 7680 (/4 1920)
>[  2290.986] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245d590]
>[  2291.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245d590] width 1920 pitch 7680 (/4 1920)
>[  2291.026] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224bdd0]
>[  2291.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224bdd0] width 1920 pitch 7680 (/4 1920)
>[  2291.061] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224bdd0]
>[  2291.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224bdd0] width 1920 pitch 7680 (/4 1920)
>[  2291.217] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245b2a0]
>[  2291.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245b2a0] width 1920 pitch 7680 (/4 1920)
>[  2291.235] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2243190]
>[  2291.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2243190] width 1920 pitch 7680 (/4 1920)
>[  2291.271] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245b2a0]
>[  2291.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245b2a0] width 1920 pitch 7680 (/4 1920)
>[  2297.875] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x21d12b0]
>[  2297.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x21d12b0] width 1920 pitch 7680 (/4 1920)
>[  2301.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2207640]
>[  2301.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2207640] width 1920 pitch 7680 (/4 1920)
>[  2301.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2163ea0]
>[  2301.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2163ea0] width 1920 pitch 7680 (/4 1920)
>[  2304.920] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24670d0]
>[  2304.946] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24670d0] width 1920 pitch 7680 (/4 1920)
>[  2309.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x237ccc0]
>[  2309.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x237ccc0] width 1920 pitch 7680 (/4 1920)
>[  2321.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x244cd00]
>[  2321.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x244cd00] width 1920 pitch 7680 (/4 1920)
>[  2336.284] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249a1d0]
>[  2336.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249a1d0] width 1920 pitch 7680 (/4 1920)
>[  2336.312] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245b210]
>[  2336.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245b210] width 1920 pitch 7680 (/4 1920)
>[  2336.440] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2336.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2336.454] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2336.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2336.487] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2336.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2336.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2336.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2336.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2336.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2336.586] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2336.614] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2336.617] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2336.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2336.635] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2336.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2336.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2336.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2336.667] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2336.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2336.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2336.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2337.255] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2337.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2337.474] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2337.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2337.774] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2244fc0]
>[  2337.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2244fc0] width 1920 pitch 7680 (/4 1920)
>[  2339.972] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246f3f0]
>[  2339.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246f3f0] width 1920 pitch 7680 (/4 1920)
>[  2340.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245cf30]
>[  2340.922] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245cf30] width 1920 pitch 7680 (/4 1920)
>[  2340.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2340.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2341.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238fc90]
>[  2341.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238fc90] width 1920 pitch 7680 (/4 1920)
>[  2341.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2341.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2341.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238fc90]
>[  2341.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238fc90] width 1920 pitch 7680 (/4 1920)
>[  2341.084] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2341.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2341.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238fc90]
>[  2341.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238fc90] width 1920 pitch 7680 (/4 1920)
>[  2341.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2419ae0]
>[  2341.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2419ae0] width 1920 pitch 7680 (/4 1920)
>[  2341.167] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x238fc90]
>[  2341.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x238fc90] width 1920 pitch 7680 (/4 1920)
>[  2391.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226fe30]
>[  2391.107] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226fe30] width 1920 pitch 7680 (/4 1920)
>[  2392.781] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2222930]
>[  2392.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2222930] width 1920 pitch 7680 (/4 1920)
>[  2393.515] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23dabf0]
>[  2393.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23dabf0] width 1920 pitch 7680 (/4 1920)
>[  2393.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249a420]
>[  2393.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249a420] width 1920 pitch 7680 (/4 1920)
>[  2393.785] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2440c50]
>[  2393.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2440c50] width 1920 pitch 7680 (/4 1920)
>[  2413.180] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2d50]
>[  2413.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2d50] width 1920 pitch 7680 (/4 1920)
>[  2423.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2423.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2423.812] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2fa0]
>[  2423.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2fa0] width 1920 pitch 7680 (/4 1920)
>[  2423.910] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b3060]
>[  2423.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b3060] width 1920 pitch 7680 (/4 1920)
>[  2423.939] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2ff0]
>[  2423.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2ff0] width 1920 pitch 7680 (/4 1920)
>[  2423.995] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2424.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2424.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b3060]
>[  2424.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b3060] width 1920 pitch 7680 (/4 1920)
>[  2424.054] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2424.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2424.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b3060]
>[  2424.114] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b3060] width 1920 pitch 7680 (/4 1920)
>[  2424.125] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2424.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2424.181] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b3060]
>[  2424.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b3060] width 1920 pitch 7680 (/4 1920)
>[  2424.607] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2424.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2424.719] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b3060]
>[  2424.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b3060] width 1920 pitch 7680 (/4 1920)
>[  2424.937] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2424.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2424.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2410]
>[  2424.998] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2410] width 1920 pitch 7680 (/4 1920)
>[  2425.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2425.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2425.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2410]
>[  2425.064] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2410] width 1920 pitch 7680 (/4 1920)
>[  2425.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2425.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2425.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2410]
>[  2425.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2410] width 1920 pitch 7680 (/4 1920)
>[  2425.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2c70]
>[  2425.164] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2c70] width 1920 pitch 7680 (/4 1920)
>[  2425.165] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2410]
>[  2425.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2410] width 1920 pitch 7680 (/4 1920)
>[  2425.182] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258c30]
>[  2425.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258c30] width 1920 pitch 7680 (/4 1920)
>[  2425.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24b2410]
>[  2425.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24b2410] width 1920 pitch 7680 (/4 1920)
>[  2475.870] [dix] cannot disable device, still paired. This is a bug. 
>[  2475.871] [dix] cannot disable device, still paired. This is a bug. 
>[  2510.964] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2496780]
>[  2510.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2496780] width 1920 pitch 7680 (/4 1920)
>[  2511.697] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e72a0]
>[  2511.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e72a0] width 1920 pitch 7680 (/4 1920)
>[  2511.733] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221c240]
>[  2511.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221c240] width 1920 pitch 7680 (/4 1920)
>[  2511.806] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24a6790]
>[  2511.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24a6790] width 1920 pitch 7680 (/4 1920)
>[  3468.960] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258980]
>[  3468.981] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258980] width 1920 pitch 7680 (/4 1920)
>[  3494.099] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258650]
>[  3494.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258650] width 1920 pitch 7680 (/4 1920)
>[  3494.117] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2356180]
>[  3494.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2356180] width 1920 pitch 7680 (/4 1920)
>[  3511.471] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2356180]
>[  3511.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2356180] width 1920 pitch 7680 (/4 1920)
>[  3554.992] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.015] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3555.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3555.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3555.032] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.048] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3555.049] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3555.065] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3555.067] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3555.087] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3555.098] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3555.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.115] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3555.118] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3555.131] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3555.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3555.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3555.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3555.166] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3555.183] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3555.198] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3555.202] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3555.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3559.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241c0b0]
>[  3559.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241c0b0] width 1920 pitch 7680 (/4 1920)
>[  3563.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3563.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3568.114] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3568.132] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3568.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3568.148] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3568.149] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3568.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3568.177] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3568.181] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3568.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3568.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3568.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3568.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3568.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3568.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3568.249] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3568.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3568.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3568.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3568.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3568.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3568.302] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3568.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3568.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3568.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.382] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.501] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3572.521] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264d00]
>[  3572.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264d00] width 1920 pitch 7680 (/4 1920)
>[  3572.538] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241bfe0]
>[  3572.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241bfe0] width 1920 pitch 7680 (/4 1920)
>[  3804.192] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.215] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.248] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.265] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.266] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.282] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.282] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.315] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.348] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.349] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.365] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.366] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.381] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.383] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.399] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.415] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.416] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3804.433] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3804.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3804.449] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3804.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.446] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.465] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3808.466] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3808.482] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.486] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.498] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3808.511] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3808.515] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.524] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3808.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3808.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.569] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3808.584] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3808.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.600] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.615] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3808.616] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3808.632] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.633] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.648] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3808.650] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3808.665] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3808.666] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3808.681] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.664] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.682] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3812.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3812.698] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.700] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.715] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3812.716] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3812.732] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.732] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.748] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3812.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3812.765] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3812.783] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3812.798] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.799] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3812.816] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3812.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.839] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.848] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  3812.851] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b830]
>[  3812.865] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b830] width 1920 pitch 7680 (/4 1920)
>[  3812.871] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b990]
>[  3812.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b990] width 1920 pitch 7680 (/4 1920)
>[  5899.132] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241b960]
>[  5899.166] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241b960] width 1920 pitch 7680 (/4 1920)
>[  5900.030] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2264c30]
>[  5900.094] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2264c30] width 1920 pitch 7680 (/4 1920)
>[  5900.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240410]
>[  5900.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240410] width 1920 pitch 7680 (/4 1920)
>[  5900.340] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258c30]
>[  5900.382] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258c30] width 1920 pitch 7680 (/4 1920)
>[  5900.576] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258c30]
>[  5900.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258c30] width 1920 pitch 7680 (/4 1920)
>[  5901.205] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258c30]
>[  5901.277] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258c30] width 1920 pitch 7680 (/4 1920)
>[  5901.296] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22585b0]
>[  5901.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22585b0] width 1920 pitch 7680 (/4 1920)
>[  5901.318] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2266580]
>[  5901.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2266580] width 1920 pitch 7680 (/4 1920)
>[  5901.541] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249b3a0]
>[  5901.565] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249b3a0] width 1920 pitch 7680 (/4 1920)
>[  5901.601] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258c30]
>[  5901.633] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258c30] width 1920 pitch 7680 (/4 1920)
>[  5901.678] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2258c30]
>[  5901.699] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2258c30] width 1920 pitch 7680 (/4 1920)
>[  5901.744] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24997a0]
>[  5901.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24997a0] width 1920 pitch 7680 (/4 1920)
>[  5910.779] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24997a0]
>[  5910.799] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24997a0] width 1920 pitch 7680 (/4 1920)
>[  5911.461] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x241ba90]
>[  5911.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x241ba90] width 1920 pitch 7680 (/4 1920)
>[  5911.550] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249caa0]
>[  5911.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249caa0] width 1920 pitch 7680 (/4 1920)
>[  5911.625] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249cf90]
>[  5911.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249cf90] width 1920 pitch 7680 (/4 1920)
>[  5912.195] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249cc40]
>[  5912.216] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249cc40] width 1920 pitch 7680 (/4 1920)
>[  5912.233] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x249cbe0]
>[  5912.249] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x249cbe0] width 1920 pitch 7680 (/4 1920)
>[  5912.777] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5912.782] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5912.790] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226bad0]
>[  5912.815] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226bad0] width 1920 pitch 7680 (/4 1920)
>[  5912.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5912.849] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5912.855] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226bad0]
>[  5912.882] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226bad0] width 1920 pitch 7680 (/4 1920)
>[  5912.888] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5912.915] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5912.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226bad0]
>[  5912.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226bad0] width 1920 pitch 7680 (/4 1920)
>[  5912.974] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5912.999] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5913.036] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226bad0]
>[  5913.049] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226bad0] width 1920 pitch 7680 (/4 1920)
>[  5913.570] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5913.599] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5913.794] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226bad0]
>[  5913.816] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226bad0] width 1920 pitch 7680 (/4 1920)
>[  5913.845] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5913.866] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5914.094] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226bad0]
>[  5914.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226bad0] width 1920 pitch 7680 (/4 1920)
>[  5914.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x226c3b0]
>[  5914.299] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x226c3b0] width 1920 pitch 7680 (/4 1920)
>[  5914.304] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24cfc10]
>[  5914.334] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24cfc10] width 1920 pitch 7680 (/4 1920)
>[  5914.355] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9970]
>[  5914.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9970] width 1920 pitch 7680 (/4 1920)
>[  5914.405] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e99d0]
>[  5914.432] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e99d0] width 1920 pitch 7680 (/4 1920)
>[  5914.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24d1fd0]
>[  5914.466] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24d1fd0] width 1920 pitch 7680 (/4 1920)
>[  5914.468] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2395e20]
>[  5914.499] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2395e20] width 1920 pitch 7680 (/4 1920)
>[  5914.502] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e9970]
>[  5914.532] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e9970] width 1920 pitch 7680 (/4 1920)
>[  5914.533] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x24e99d0]
>[  5914.549] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x24e99d0] width 1920 pitch 7680 (/4 1920)
>[  5920.874] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a4780]
>[  5920.899] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a4780] width 1920 pitch 7680 (/4 1920)
>[  5921.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22870f0]
>[  5921.099] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22870f0] width 1920 pitch 7680 (/4 1920)
>[  5921.100] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22a41e0]
>[  5921.116] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22a41e0] width 1920 pitch 7680 (/4 1920)
>[  5921.134] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22870f0]
>[  5921.149] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22870f0] width 1920 pitch 7680 (/4 1920)
>[  6151.386] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f048b0]
>[  6151.399] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f048b0] width 1920 pitch 7680 (/4 1920)
>[  6152.012] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ef0ae0]
>[  6152.032] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ef0ae0] width 1920 pitch 7680 (/4 1920)
>[  6152.085] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22092b0]
>[  6152.100] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22092b0] width 1920 pitch 7680 (/4 1920)
>[  6152.138] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22092c0]
>[  6152.165] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22092c0] width 1920 pitch 7680 (/4 1920)
>[  6157.316] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcbfa0]
>[  6157.332] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcbfa0] width 1920 pitch 7680 (/4 1920)
>[  6157.490] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2356950]
>[  6157.517] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2356950] width 1920 pitch 7680 (/4 1920)
>[  6157.573] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f048b0]
>[  6157.582] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f048b0] width 1920 pitch 7680 (/4 1920)
>[  6157.585] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2efbf90]
>[  6157.616] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2efbf90] width 1920 pitch 7680 (/4 1920)
>[  6872.628] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x440f960]
>[  6872.649] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x440f960] width 1920 pitch 7680 (/4 1920)
>[  6872.651] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6872.683] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6872.684] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x440f960]
>[  6872.700] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x440f960] width 1920 pitch 7680 (/4 1920)
>[  6872.701] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6872.717] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6872.720] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x440f960]
>[  6872.734] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x440f960] width 1920 pitch 7680 (/4 1920)
>[  6872.737] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6872.750] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6872.753] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x440f960]
>[  6872.766] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x440f960] width 1920 pitch 7680 (/4 1920)
>[  6873.406] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6873.417] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6873.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6873.966] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6873.968] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6873.984] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6873.984] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6874.000] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6874.002] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6874.017] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6874.018] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6874.034] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6874.034] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6874.050] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6874.060] (II) RADEON(0): RADEONSaveScreen(2)
>[  6874.060] (II) RADEON(0): RADEONSaveScreen(0)
>[  6894.528] (II) RADEON(0): RADEONSaveScreen(1)
>[  6894.768] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6894.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6894.787] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e4f610]
>[  6894.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e4f610] width 1920 pitch 7680 (/4 1920)
>[  6912.860] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2df9cd0]
>[  6912.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2df9cd0] width 1920 pitch 7680 (/4 1920)
>[  6912.895] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6912.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6913.045] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6913.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6913.086] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6913.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6913.146] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6913.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6913.184] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6913.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6913.219] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6913.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6913.254] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6913.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6913.315] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6913.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6913.639] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6913.664] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6913.825] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6913.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6914.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6914.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6914.352] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6914.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6915.387] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6915.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6915.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4406890]
>[  6915.763] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4406890] width 1920 pitch 7680 (/4 1920)
>[  6916.333] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  6916.363] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  6916.369] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6916.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6916.411] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6916.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6916.453] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e0b580]
>[  6916.513] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e0b580] width 1920 pitch 7680 (/4 1920)
>[  6916.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6916.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6916.552] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2f1d470]
>[  6916.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2f1d470] width 1920 pitch 7680 (/4 1920)
>[  6916.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e69ad0]
>[  6916.630] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e69ad0] width 1920 pitch 7680 (/4 1920)
>[  6916.631] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2b2b0]
>[  6916.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2b2b0] width 1920 pitch 7680 (/4 1920)
>[  6919.863] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e5ec70]
>[  6919.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e5ec70] width 1920 pitch 7680 (/4 1920)
>[  6920.068] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2249f40]
>[  6920.080] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2249f40] width 1920 pitch 7680 (/4 1920)
>[  6920.115] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2249e40]
>[  6920.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2249e40] width 1920 pitch 7680 (/4 1920)
>[  6922.194] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7eff0]
>[  6922.217] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7eff0] width 1920 pitch 7680 (/4 1920)
>[  6926.276] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x4038550]
>[  6926.325] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x4038550] width 1920 pitch 7680 (/4 1920)
>[  6926.337] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e85480]
>[  6926.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e85480] width 1920 pitch 7680 (/4 1920)
>[  6926.421] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3df54c0]
>[  6926.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3df54c0] width 1920 pitch 7680 (/4 1920)
>[  6926.556] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e85480]
>[  6926.580] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e85480] width 1920 pitch 7680 (/4 1920)
>[  6964.262] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6964.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6964.292] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6964.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6964.347] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6964.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6964.423] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6964.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6964.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6964.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6964.557] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6964.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6965.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6965.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6965.220] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6965.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6965.525] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6965.563] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6984.003] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6984.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6984.056] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e935a0]
>[  6984.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e935a0] width 1920 pitch 7680 (/4 1920)
>[  6984.106] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6984.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6984.151] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e935a0]
>[  6984.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e935a0] width 1920 pitch 7680 (/4 1920)
>[  6984.193] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6984.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6984.237] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e935a0]
>[  6984.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e935a0] width 1920 pitch 7680 (/4 1920)
>[  6984.286] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3eb13f0]
>[  6984.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3eb13f0] width 1920 pitch 7680 (/4 1920)
>[  6988.458] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6988.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6988.512] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6988.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6988.558] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6988.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6988.614] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6988.663] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6988.674] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6988.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6988.718] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6988.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6988.751] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6988.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6989.163] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6989.163] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6989.267] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6989.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6989.773] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6989.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6989.791] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6989.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6989.872] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6989.880] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6989.919] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6989.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6989.976] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6989.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6990.025] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6990.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6990.268] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6990.280] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6990.324] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6990.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6990.374] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6990.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6990.419] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6990.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6990.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6990.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6990.516] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6990.530] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6991.328] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6991.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6991.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6991.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.123] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.175] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.180] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.223] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.230] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.283] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.297] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.334] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.435] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.456] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.609] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.647] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.659] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.704] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.804] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e66c30]
>[  6992.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e66c30] width 1920 pitch 7680 (/4 1920)
>[  6992.853] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dea520]
>[  6992.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dea520] width 1920 pitch 7680 (/4 1920)
>[  6992.899] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e935a0]
>[  6992.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e935a0] width 1920 pitch 7680 (/4 1920)
>[  6996.464] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e56520]
>[  6996.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e56520] width 1920 pitch 7680 (/4 1920)
>[  6998.319] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  6998.330] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  6998.331] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51a50]
>[  6998.352] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51a50] width 1920 pitch 7680 (/4 1920)
>[  6998.354] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e55450]
>[  6998.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e55450] width 1920 pitch 7680 (/4 1920)
>[  6998.381] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  6998.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  6998.398] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7d0d0]
>[  6998.413] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7d0d0] width 1920 pitch 7680 (/4 1920)
>[  6998.414] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  6998.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  6998.432] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7d0d0]
>[  6998.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7d0d0] width 1920 pitch 7680 (/4 1920)
>[  6998.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  6998.463] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  6998.467] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7d0d0]
>[  6998.480] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7d0d0] width 1920 pitch 7680 (/4 1920)
>[  6998.488] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  6998.497] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  6998.508] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e7d0d0]
>[  6998.531] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e7d0d0] width 1920 pitch 7680 (/4 1920)
>[  6998.579] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  6998.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7002.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x404dc70]
>[  7002.813] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x404dc70] width 1920 pitch 7680 (/4 1920)
>[  7008.330] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7008.347] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7008.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e942c0]
>[  7008.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e942c0] width 1920 pitch 7680 (/4 1920)
>[  7008.434] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d6b320]
>[  7008.447] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d6b320] width 1920 pitch 7680 (/4 1920)
>[  7008.588] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e942c0]
>[  7008.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e942c0] width 1920 pitch 7680 (/4 1920)
>[  7012.365] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e3f020]
>[  7012.380] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e3f020] width 1920 pitch 7680 (/4 1920)
>[  7020.727] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7020.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7020.755] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.782] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7020.802] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.814] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.817] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.831] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7020.833] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.848] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.864] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7020.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.883] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7020.900] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.917] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.931] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7020.933] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.950] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7020.967] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7020.980] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7020.983] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7020.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7021.000] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7021.014] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7021.021] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51900]
>[  7021.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51900] width 1920 pitch 7680 (/4 1920)
>[  7021.274] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40530b0]
>[  7021.281] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40530b0] width 1920 pitch 7680 (/4 1920)
>[  7021.299] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e73550]
>[  7021.313] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e73550] width 1920 pitch 7680 (/4 1920)
>[  7021.826] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7021.830] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7021.841] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7021.897] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7021.904] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7021.947] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7021.958] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7021.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7022.052] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7022.063] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7022.196] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7022.231] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7022.591] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7022.631] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7022.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7022.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7023.053] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7023.097] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7023.103] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7023.147] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7023.176] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40525e0]
>[  7023.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40525e0] width 1920 pitch 7680 (/4 1920)
>[  7023.717] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7023.747] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7023.758] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  7023.797] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  7023.803] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7023.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7023.850] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  7023.881] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  7023.890] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7023.930] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7023.940] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2dcb530]
>[  7023.997] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2dcb530] width 1920 pitch 7680 (/4 1920)
>[  7024.009] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e39860]
>[  7024.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e39860] width 1920 pitch 7680 (/4 1920)
>[  7385.729] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22c3fc0]
>[  7385.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22c3fc0] width 1920 pitch 7680 (/4 1920)
>[  7386.924] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d2cac0]
>[  7386.968] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d2cac0] width 1920 pitch 7680 (/4 1920)
>[  7387.037] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x23e5fe0]
>[  7387.047] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x23e5fe0] width 1920 pitch 7680 (/4 1920)
>[  7394.413] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2ded1e0]
>[  7394.430] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2ded1e0] width 1920 pitch 7680 (/4 1920)
>[  7397.491] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x246c3a0]
>[  7397.547] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x246c3a0] width 1920 pitch 7680 (/4 1920)
>[  7397.757] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2429c20]
>[  7397.780] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2429c20] width 1920 pitch 7680 (/4 1920)
>[  7401.686] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x22b9050]
>[  7401.697] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x22b9050] width 1920 pitch 7680 (/4 1920)
>[  7402.424] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2429c20]
>[  7402.467] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2429c20] width 1920 pitch 7680 (/4 1920)
>[  7402.498] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e46200]
>[  7402.538] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e46200] width 1920 pitch 7680 (/4 1920)
>[  7402.575] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e82b90]
>[  7402.597] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e82b90] width 1920 pitch 7680 (/4 1920)
>[  7412.404] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da5610]
>[  7412.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da5610] width 1920 pitch 7680 (/4 1920)
>[  7413.141] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da5610]
>[  7413.199] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da5610] width 1920 pitch 7680 (/4 1920)
>[  7413.226] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da5610]
>[  7413.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da5610] width 1920 pitch 7680 (/4 1920)
>[  7413.251] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e469f0]
>[  7413.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e469f0] width 1920 pitch 7680 (/4 1920)
>[  7413.956] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da5610]
>[  7413.964] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da5610] width 1920 pitch 7680 (/4 1920)
>[  7414.187] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da5610]
>[  7414.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da5610] width 1920 pitch 7680 (/4 1920)
>[  7414.598] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e469f0]
>[  7414.637] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e469f0] width 1920 pitch 7680 (/4 1920)
>[  7414.694] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3da5610]
>[  7414.714] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3da5610] width 1920 pitch 7680 (/4 1920)
>[  7414.715] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x40530b0]
>[  7414.731] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x40530b0] width 1920 pitch 7680 (/4 1920)
>[  7425.599] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e73680]
>[  7425.613] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e73680] width 1920 pitch 7680 (/4 1920)
>[  7428.120] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2e2b2b0]
>[  7428.130] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2e2b2b0] width 1920 pitch 7680 (/4 1920)
>[  7428.173] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51b00]
>[  7428.197] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51b00] width 1920 pitch 7680 (/4 1920)
>[  7428.198] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3d84660]
>[  7428.214] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3d84660] width 1920 pitch 7680 (/4 1920)
>[  7428.236] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e51b00]
>[  7428.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e51b00] width 1920 pitch 7680 (/4 1920)
>[  7428.384] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3e73680]
>[  7428.397] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3e73680] width 1920 pitch 7680 (/4 1920)
>[  7435.771] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3dd5190]
>[  7435.804] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3dd5190] width 1920 pitch 7680 (/4 1920)
>[  7437.752] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2454ed0]
>[  7437.764] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2454ed0] width 1920 pitch 7680 (/4 1920)
>[  7437.766] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7437.820] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7437.846] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x221f4b0]
>[  7437.847] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x221f4b0] width 1920 pitch 7680 (/4 1920)
>[  7437.849] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245ae90]
>[  7437.863] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245ae90] width 1920 pitch 7680 (/4 1920)
>[  7437.867] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2456600]
>[  7437.898] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2456600] width 1920 pitch 7680 (/4 1920)
>[  7437.901] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245ae90]
>[  7437.914] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245ae90] width 1920 pitch 7680 (/4 1920)
>[  7437.935] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2456600]
>[  7437.948] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2456600] width 1920 pitch 7680 (/4 1920)
>[  7438.022] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x245ae90]
>[  7438.030] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x245ae90] width 1920 pitch 7680 (/4 1920)
>[  7444.207] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7444.213] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7444.224] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7444.247] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7444.265] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7444.298] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7444.308] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7444.331] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7444.346] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7444.364] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7444.371] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7444.398] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7444.407] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7444.431] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7444.463] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7444.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7445.006] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7445.031] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7445.055] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7445.081] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7445.243] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7445.264] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7445.311] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7445.362] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7445.378] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240410]
>[  7445.414] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240410] width 1920 pitch 7680 (/4 1920)
>[  7445.425] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7445.448] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7445.451] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240410]
>[  7445.481] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240410] width 1920 pitch 7680 (/4 1920)
>[  7445.484] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7445.514] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7445.519] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240410]
>[  7445.548] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240410] width 1920 pitch 7680 (/4 1920)
>[  7445.548] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x3ce7870]
>[  7445.581] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x3ce7870] width 1920 pitch 7680 (/4 1920)
>[  7445.581] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x2240410]
>[  7445.598] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x2240410] width 1920 pitch 7680 (/4 1920)
>[  7447.258] (II) RADEON(0): radeon_dri2_schedule_flip:665 fevent[0x224ccd0]
>[  7447.288] (II) RADEON(0): radeon_dri2_flip_event_handler:1069 fevent[0x224ccd0] width 1920 pitch 7680 (/4 1920)
>[  7512.037] 
>[  7512.037] Backtrace:
>[  7512.388] 0: /usr/bin/Xorg (xorg_backtrace+0x36) [0x4652d6]
>[  7512.388] 1: /usr/bin/Xorg (0x400000+0x6a2b9) [0x46a2b9]
>[  7512.388] 2: /lib64/libpthread.so.0 (0x3925000000+0xefe0) [0x392500efe0]
>[  7512.388] 3: /usr/bin/Xorg (IsParent+0x15) [0x43bce5]
>[  7512.388] 4: /usr/bin/Xorg (0x400000+0x38d7f) [0x438d7f]
>[  7512.388] 5: /usr/bin/Xorg (0x400000+0x39923) [0x439923]
>[  7512.388] 6: /usr/bin/Xorg (0x400000+0x3f14b) [0x43f14b]
>[  7512.388] 7: /usr/bin/Xorg (0x400000+0x10abab) [0x50abab]
>[  7512.388] 8: /usr/bin/Xorg (0x400000+0x12ba0f) [0x52ba0f]
>[  7512.388] 9: /usr/bin/Xorg (mieqProcessDeviceEvent+0x1b5) [0x551905]
>[  7512.388] 10: /usr/bin/Xorg (mieqProcessInputEvents+0xf8) [0x551a28]
>[  7512.388] 11: /usr/bin/Xorg (ProcessInputEvents+0x9) [0x480839]
>[  7512.388] 12: /usr/bin/Xorg (0x400000+0x34132) [0x434132]
>[  7512.388] 13: /usr/bin/Xorg (0x400000+0x23485) [0x423485]
>[  7512.388] 14: /lib64/libc.so.6 (__libc_start_main+0xf5) [0x3924821735]
>[  7512.388] 15: /usr/bin/Xorg (0x400000+0x2375d) [0x42375d]
>[  7512.388] 
>[  7512.388] Segmentation fault at address 0x100000028
>[  7512.388] 
>Fatal server error:
>[  7512.390] Caught signal 11 (Segmentation fault). Server aborting
>[  7512.390] 
>[  7512.390] 
>Please consult the Fedora Project support 
>	 at http://wiki.x.org
> for help. 
>[  7512.390] Please also check the log file at "/var/log/Xorg.0.log" for additional information.
>[  7512.390] 
>[  7512.398] (II) evdev: Power Button: Close
>[  7512.398] (II) UnloadModule: "evdev"
>[  7512.403] (II) evdev: Video Bus: Close
>[  7512.403] (II) UnloadModule: "evdev"
>[  7512.408] (II) evdev: Power Button: Close
>[  7512.408] (II) UnloadModule: "evdev"
>[  7512.413] (II) evdev: Sleep Button: Close
>[  7512.413] (II) UnloadModule: "evdev"
>[  7512.418] (II) evdev: HID 413c:8157: Close
>[  7512.418] (II) UnloadModule: "evdev"
>[  7512.429] (II) evdev: HID 413c:8158: Close
>[  7512.429] (II) UnloadModule: "evdev"
>[  7512.439] (II) evdev: Laptop_Integrated_Webcam_2M: Close
>[  7512.439] (II) UnloadModule: "evdev"
>[  7512.444] (II) evdev: AT Translated Set 2 keyboard: Close
>[  7512.444] (II) UnloadModule: "evdev"
>[  7512.462] (II) UnloadModule: "synaptics"
>[  7512.467] (II) evdev: Dell WMI hotkeys: Close
>[  7512.467] (II) UnloadModule: "evdev"
>[  7512.472] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Close
>[  7512.472] (II) UnloadModule: "evdev"
>[  7512.475] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Close
>[  7512.475] (II) UnloadModule: "evdev"
>[  7512.480] (II) evdev: Microsoft MicrosoftÂ® Nano Transceiver v2.0: Close
>[  7512.480] (II) UnloadModule: "evdev"
>[  7512.481] (II) AIGLX: Suspending AIGLX clients for VT switch
>[  7512.481] (II) RADEON(0): RADEONLeaveVT_KMS
>[  7512.481] (II) RADEON(0): Ok, leaving now...

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Attachments on bug 870740: 634496 | 634497 | 634498 | 634499